{"diffoscope-json-version": 1, "source1": "/srv/reproducible-results/rbuild-debian/tmp.Isi2aht1Ag/b1/gr-iqbal_0.38.2-1_armhf.changes", "source2": "/srv/reproducible-results/rbuild-debian/tmp.Isi2aht1Ag/b2/gr-iqbal_0.38.2-1_armhf.changes", "unified_diff": null, "details": [{"source1": "Files", "source2": "Files", "unified_diff": "@@ -1,4 +1,4 @@\n \n- b784f1514d2012cdba310a1ed2812499 170536 libdevel optional gr-iqbal_0.38.2-1_armhf.deb\n+ 30a78a0353c0941cee1c4e4985a28722 170580 libdevel optional gr-iqbal_0.38.2-1_armhf.deb\n 125dfbe36fe7c6d03dcc53d5d9fd4191 465564 debug optional libgnuradio-iqbalance3.9.0-dbgsym_0.38.2-1_armhf.deb\n fdd646c258ec9158ef7e16e10ad5766d 19748 libs optional libgnuradio-iqbalance3.9.0_0.38.2-1_armhf.deb\n"}, {"source1": "gr-iqbal_0.38.2-1_armhf.deb", "source2": "gr-iqbal_0.38.2-1_armhf.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2021-11-10 04:54:46.000000 debian-binary\n -rw-r--r-- 0 0 0 6064 2021-11-10 04:54:46.000000 control.tar.xz\n--rw-r--r-- 0 0 0 164280 2021-11-10 04:54:46.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 164324 2021-11-10 04:54:46.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "./usr/lib/python3/dist-packages/gnuradio/iqbalance/iqbalance_python.cpython-39-arm-linux-gnueabihf.so", "source2": "./usr/lib/python3/dist-packages/gnuradio/iqbalance/iqbalance_python.cpython-39-arm-linux-gnueabihf.so", "unified_diff": null, "details": [{"source1": "readelf --wide --sections {}", "source2": "readelf --wide --sections {}", "unified_diff": "@@ -2,21 +2,21 @@\n \n Section Headers:\n [Nr] Name Type Addr Off Size ES Flg Lk Inf Al\n [ 0] NULL 00000000 000000 000000 00 0 0 0\n [ 1] .note.gnu.build-id NOTE 00000114 000114 000024 00 A 0 0 4\n [ 2] .gnu.hash GNU_HASH 00000138 000138 0000f4 04 A 3 0 4\n [ 3] .dynsym DYNSYM 0000022c 00022c 001060 10 A 4 3 4\n- [ 4] .dynstr STRTAB 0000128c 00128c 001d63 00 A 0 0 1\n- [ 5] .gnu.version VERSYM 00002ff0 002ff0 00020c 02 A 3 0 2\n- [ 6] .gnu.version_r VERNEED 000031fc 0031fc 000170 00 A 4 4 4\n- [ 7] .rel.dyn REL 0000336c 00336c 000898 08 A 3 0 4\n- [ 8] .rel.plt REL 00003c04 003c04 000520 08 AI 3 21 4\n- [ 9] .init PROGBITS 00004124 004124 00000c 00 AX 0 0 4\n- [10] .plt PROGBITS 00004130 004130 0007dc 04 AX 0 0 4\n+ [ 4] .dynstr STRTAB 0000128c 00128c 001d65 00 A 0 0 1\n+ [ 5] .gnu.version VERSYM 00002ff2 002ff2 00020c 02 A 3 0 2\n+ [ 6] .gnu.version_r VERNEED 00003200 003200 000170 00 A 4 4 4\n+ [ 7] .rel.dyn REL 00003370 003370 000898 08 A 3 0 4\n+ [ 8] .rel.plt REL 00003c08 003c08 000520 08 AI 3 21 4\n+ [ 9] .init PROGBITS 00004128 004128 00000c 00 AX 0 0 4\n+ [10] .plt PROGBITS 00004134 004134 0007dc 04 AX 0 0 4\n [11] .text PROGBITS 00004910 004910 0107c4 00 AX 0 0 8\n [12] .fini PROGBITS 000150d4 0150d4 000008 00 AX 0 0 4\n [13] .rodata PROGBITS 000150dc 0150dc 001cac 00 A 0 0 4\n [14] .ARM.extab PROGBITS 00016d88 016d88 001731 00 A 0 0 4\n [15] .ARM.exidx ARM_EXIDX 000184bc 0184bc 000480 00 AL 11 0 4\n [16] .eh_frame PROGBITS 0001893c 01893c 000004 00 A 0 0 4\n [17] .init_array INIT_ARRAY 00028ac8 018ac8 000008 04 WA 0 0 4\n"}, {"source1": "readelf --wide --symbols {}", "source2": "readelf --wide --symbols {}", "unified_diff": "@@ -1,12 +1,12 @@\n \n Symbol table '.dynsym' contains 262 entries:\n Num: Value Size Type Bind Vis Ndx Name\n 0: 00000000 0 NOTYPE LOCAL DEFAULT UND \n- 1: 00004124 0 SECTION LOCAL DEFAULT 9 .init\n+ 1: 00004128 0 SECTION LOCAL DEFAULT 9 .init\n 2: 000293b0 0 SECTION LOCAL DEFAULT 22 .data\n 3: 00000000 0 FUNC GLOBAL DEFAULT UND PyTuple_SetItem\n 4: 00000000 0 FUNC GLOBAL DEFAULT UND PyObject_Repr\n 5: 00000000 0 FUNC GLOBAL DEFAULT UND _Znwj@GLIBCXX_3.4 (2)\n 6: 00000000 0 OBJECT GLOBAL DEFAULT UND PyInstanceMethod_Type\n 7: 00000000 0 OBJECT GLOBAL DEFAULT UND PyExc_ValueError\n 8: 00000000 0 FUNC GLOBAL DEFAULT UND _ZNSt15__exception_ptr13exception_ptr9_M_addrefEv@CXXABI_1.3.13 (3)\n"}, {"source1": "readelf --wide --relocs {}", "source2": "readelf --wide --relocs {}", "unified_diff": "@@ -1,9 +1,9 @@\n \n-Relocation section '.rel.dyn' at offset 0x336c contains 275 entries:\n+Relocation section '.rel.dyn' at offset 0x3370 contains 275 entries:\n Offset Info Type Sym. Value Symbol's Name\n 00028ac8 00000017 R_ARM_RELATIVE \n 00028acc 00000017 R_ARM_RELATIVE \n 00028ad0 00000017 R_ARM_RELATIVE \n 00028ad4 00000017 R_ARM_RELATIVE \n 00028ae0 00000017 R_ARM_RELATIVE \n 00028ae4 00000017 R_ARM_RELATIVE \n@@ -273,15 +273,15 @@\n 00029394 0000d915 R_ARM_GLOB_DAT 00000000 _ITM_registerTMCloneTable\n 00029398 0000dd15 R_ARM_GLOB_DAT 00000000 __cxa_finalize@GLIBC_2.4\n 0002939c 0000f215 R_ARM_GLOB_DAT 0000a0c9 _ZN2gr9iqbalance6fix_cc7set_magEf\n 000293a4 0000e115 R_ARM_GLOB_DAT 00000000 _ZTVNSt7__cxx1115basic_stringbufIcSt11char_traitsIcESaIcEEE@GLIBCXX_3.4.21\n 000293a8 0000f515 R_ARM_GLOB_DAT 0000a12d _ZNK2gr9iqbalance10optimize_c3magEv\n 000293ac 0000e515 R_ARM_GLOB_DAT 00000000 _ZNSt8ios_base4InitD1Ev@GLIBCXX_3.4\n \n-Relocation section '.rel.plt' at offset 0x3c04 contains 164 entries:\n+Relocation section '.rel.plt' at offset 0x3c08 contains 164 entries:\n Offset Info Type Sym. Value Symbol's Name\n 0002900c 00000316 R_ARM_JUMP_SLOT 00000000 PyTuple_SetItem\n 00029010 00000416 R_ARM_JUMP_SLOT 00000000 PyObject_Repr\n 00029014 00000516 R_ARM_JUMP_SLOT 00000000 _Znwj@GLIBCXX_3.4\n 00029018 00000816 R_ARM_JUMP_SLOT 00000000 _ZNSt15__exception_ptr13exception_ptr9_M_addrefEv@CXXABI_1.3.13\n 0002901c 00000916 R_ARM_JUMP_SLOT 00000000 PyLong_AsLong\n 00029020 00000a16 R_ARM_JUMP_SLOT 00000000 PyLong_FromSsize_t\n"}, {"source1": "readelf --wide --dynamic {}", "source2": "readelf --wide --dynamic {}", "unified_diff": "@@ -5,30 +5,30 @@\n 0x00000001 (NEEDED) Shared library: [libgnuradio-iqbalance.so.3.9.0]\n 0x00000001 (NEEDED) Shared library: [libgnuradio-runtime.so.3.9.4]\n 0x00000001 (NEEDED) Shared library: [liblog4cpp.so.5]\n 0x00000001 (NEEDED) Shared library: [libstdc++.so.6]\n 0x00000001 (NEEDED) Shared library: [libgcc_s.so.1]\n 0x00000001 (NEEDED) Shared library: [libc.so.6]\n 0x00000001 (NEEDED) Shared library: [ld-linux-armhf.so.3]\n- 0x0000000c (INIT) 0x4124\n+ 0x0000000c (INIT) 0x4128\n 0x0000000d (FINI) 0x150d4\n 0x00000019 (INIT_ARRAY) 0x28ac8\n 0x0000001b (INIT_ARRAYSZ) 8 (bytes)\n 0x0000001a (FINI_ARRAY) 0x28ad0\n 0x0000001c (FINI_ARRAYSZ) 4 (bytes)\n 0x6ffffef5 (GNU_HASH) 0x138\n 0x00000005 (STRTAB) 0x128c\n 0x00000006 (SYMTAB) 0x22c\n- 0x0000000a (STRSZ) 7523 (bytes)\n+ 0x0000000a (STRSZ) 7525 (bytes)\n 0x0000000b (SYMENT) 16 (bytes)\n 0x00000003 (PLTGOT) 0x29000\n 0x00000002 (PLTRELSZ) 1312 (bytes)\n 0x00000014 (PLTREL) REL\n- 0x00000017 (JMPREL) 0x3c04\n- 0x00000011 (REL) 0x336c\n+ 0x00000017 (JMPREL) 0x3c08\n+ 0x00000011 (REL) 0x3370\n 0x00000012 (RELSZ) 2200 (bytes)\n 0x00000013 (RELENT) 8 (bytes)\n- 0x6ffffffe (VERNEED) 0x31fc\n+ 0x6ffffffe (VERNEED) 0x3200\n 0x6fffffff (VERNEEDNUM) 4\n- 0x6ffffff0 (VERSYM) 0x2ff0\n+ 0x6ffffff0 (VERSYM) 0x2ff2\n 0x6ffffffa (RELCOUNT) 125\n 0x00000000 (NULL) 0x0\n"}, {"source1": "readelf --wide --notes {}", "source2": "readelf --wide --notes {}", "unified_diff": "@@ -1,4 +1,4 @@\n \n Displaying notes found in: .note.gnu.build-id\n Owner Data size \tDescription\n- GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 5915c8495c7a1963c01cab65f46794f4272e45ce\n+ GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 01efa8c32e814c70b07fc4ecefba492ff704593c\n"}, {"source1": "readelf --wide --version-info {}", "source2": "readelf --wide --version-info {}", "unified_diff": "@@ -1,10 +1,10 @@\n \n Version symbols section '.gnu.version' contains 262 entries:\n- Addr: 0x0000000000002ff0 Offset: 0x002ff0 Link: 3 (.dynsym)\n+ Addr: 0x0000000000002ff2 Offset: 0x002ff2 Link: 3 (.dynsym)\n 000: 0 (*local*) 0 (*local*) 0 (*local*) 1 (*global*) \n 004: 1 (*global*) 2 (GLIBCXX_3.4) 1 (*global*) 1 (*global*) \n 008: 3 (CXXABI_1.3.13) 1 (*global*) 1 (*global*) 2 (GLIBCXX_3.4)\n 00c: 4 (CXXABI_ARM_1.3.3) 2 (GLIBCXX_3.4) 1 (*global*) 1 (*global*) \n 010: 1 (*global*) 5 (GLIBCXX_3.4.21) 1 (*global*) 6 (GLIBC_2.4) \n 014: 2 (GLIBCXX_3.4) 1 (*global*) 1 (*global*) 1 (*global*) \n 018: 1 (*global*) 1 (*global*) 1 (*global*) 7 (GLIBC_2.4) \n@@ -65,15 +65,15 @@\n 0f4: 1 (*global*) 1 (*global*) 1 (*global*) 1 (*global*) \n 0f8: 1 (*global*) 1 (*global*) 1 (*global*) 1 (*global*) \n 0fc: 1 (*global*) 1 (*global*) 1 (*global*) 1 (*global*) \n 100: 1 (*global*) 1 (*global*) 1 (*global*) 1 (*global*) \n 104: 1 (*global*) 1 (*global*) \n \n Version needs section '.gnu.version_r' contains 4 entries:\n- Addr: 0x00000000000031fc Offset: 0x0031fc Link: 4 (.dynstr)\n+ Addr: 0x0000000000003200 Offset: 0x003200 Link: 4 (.dynstr)\n 000000: Version: 1 File: libgcc_s.so.1 Cnt: 3\n 0x0010: Name: GCC_3.0 Flags: none Version: 20\n 0x0020: Name: GCC_3.5 Flags: none Version: 10\n 0x0030: Name: GCC_3.3.1 Flags: none Version: 8\n 0x0040: Version: 1 File: ld-linux-armhf.so.3 Cnt: 1\n 0x0050: Name: GLIBC_2.4 Flags: none Version: 7\n 0x0060: Version: 1 File: libc.so.6 Cnt: 2\n"}, {"source1": "readelf --wide --decompress --hex-dump=.dynstr {}", "source2": "readelf --wide --decompress --hex-dump=.dynstr {}", "unified_diff": "@@ -466,9 +466,9 @@\n 0x00002f7c 00474c49 42435858 5f332e34 2e323100 .GLIBCXX_3.4.21.\n 0x00002f8c 43585841 42495f41 524d5f31 2e332e33 CXXABI_ARM_1.3.3\n 0x00002f9c 00435858 4142495f 312e332e 31330047 .CXXABI_1.3.13.G\n 0x00002fac 4c494243 58585f33 2e340000 00000000 LIBCXX_3.4......\n 0x00002fbc 00000000 00000000 00000000 00000000 ................\n 0x00002fcc 00000000 00000000 00000000 00000000 ................\n 0x00002fdc 00000000 00000000 00000000 00000000 ................\n- 0x00002fec 000000 ...\n+ 0x00002fec 00000000 00 .....\n \n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.init {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.init {}", "unified_diff": "@@ -1,9 +1,9 @@\n \n \n \n Disassembly of section .init:\n \n-00004124 <.init>:\n+00004128 <.init>:\n \tpush\t{r3, lr}\n-\tbl\t5228 \n+\tbl\t5228 \n \tpop\t{r3, pc}\n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt {}", "unified_diff": "@@ -1,837 +1,837 @@\n \n \n \n Disassembly of section .plt:\n \n-00004130 :\n+00004134 :\n \tpush\t{lr}\t\t; (str lr, [sp, #-4]!)\n-\tldr\tlr, [pc, #4]\t; 4140 \n+\tldr\tlr, [pc, #4]\t; 4144 \n \tadd\tlr, pc, lr\n \tldr\tpc, [lr, #8]!\n-\tandeq\tr4, r2, r0, asr #29\n+\t\t\t; instruction: 0x00024ebc\n \n-00004144 :\n+00004148 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3776]!\t; 0xec0\n+\tldr\tpc, [ip, #3772]!\t; 0xebc\n \n-00004150 :\n+00004154 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3768]!\t; 0xeb8\n+\tldr\tpc, [ip, #3764]!\t; 0xeb4\n \n-0000415c :\n+00004160 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3760]!\t; 0xeb0\n+\tldr\tpc, [ip, #3756]!\t; 0xeac\n \n-00004168 :\n+0000416c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3752]!\t; 0xea8\n+\tldr\tpc, [ip, #3748]!\t; 0xea4\n \n-00004174 :\n+00004178 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3744]!\t; 0xea0\n+\tldr\tpc, [ip, #3740]!\t; 0xe9c\n \n-00004180 :\n+00004184 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3736]!\t; 0xe98\n+\tldr\tpc, [ip, #3732]!\t; 0xe94\n \n-0000418c :\n+00004190 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3728]!\t; 0xe90\n+\tldr\tpc, [ip, #3724]!\t; 0xe8c\n \n-00004198 <__aeabi_atexit@plt>:\n+0000419c <__aeabi_atexit@plt>:\n \t\t\t; instruction: 0xe7fd4778\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3716]!\t; 0xe84\n+\tldr\tpc, [ip, #3712]!\t; 0xe80\n \n-000041a8 :\n+000041ac :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3708]!\t; 0xe7c\n+\tldr\tpc, [ip, #3704]!\t; 0xe78\n \n-000041b4 , std::allocator >::~basic_ostringstream()@plt>:\n+000041b8 , std::allocator >::~basic_ostringstream()@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3700]!\t; 0xe74\n+\tldr\tpc, [ip, #3696]!\t; 0xe70\n \n-000041c0 :\n+000041c4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3692]!\t; 0xe6c\n+\tldr\tpc, [ip, #3688]!\t; 0xe68\n \n-000041cc :\n+000041d0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3684]!\t; 0xe64\n+\tldr\tpc, [ip, #3680]!\t; 0xe60\n \n-000041d8 :\n+000041dc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3676]!\t; 0xe5c\n+\tldr\tpc, [ip, #3672]!\t; 0xe58\n \n-000041e4 :\n+000041e8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3668]!\t; 0xe54\n+\tldr\tpc, [ip, #3664]!\t; 0xe50\n \n-000041f0 :\n+000041f4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3660]!\t; 0xe4c\n+\tldr\tpc, [ip, #3656]!\t; 0xe48\n \n-000041fc :\n+00004200 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3652]!\t; 0xe44\n+\tldr\tpc, [ip, #3648]!\t; 0xe40\n \n-00004208 :\n+0000420c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3644]!\t; 0xe3c\n+\tldr\tpc, [ip, #3640]!\t; 0xe38\n \n-00004214 :\n+00004218 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3636]!\t; 0xe34\n+\tldr\tpc, [ip, #3632]!\t; 0xe30\n \n-00004220 :\n+00004224 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3628]!\t; 0xe2c\n+\tldr\tpc, [ip, #3624]!\t; 0xe28\n \n-0000422c <__gcc_personality_v0@plt>:\n+00004230 <__gcc_personality_v0@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3620]!\t; 0xe24\n+\tldr\tpc, [ip, #3616]!\t; 0xe20\n \n-00004238 :\n+0000423c :\n \t\t\t; instruction: 0xe7fd4778\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3608]!\t; 0xe18\n+\tldr\tpc, [ip, #3604]!\t; 0xe14\n \n-00004248 :\n+0000424c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3600]!\t; 0xe10\n+\tldr\tpc, [ip, #3596]!\t; 0xe0c\n \n-00004254 :\n+00004258 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3592]!\t; 0xe08\n+\tldr\tpc, [ip, #3588]!\t; 0xe04\n \n-00004260 :\n+00004264 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3584]!\t; 0xe00\n+\tldr\tpc, [ip, #3580]!\t; 0xdfc\n \n-0000426c , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>:\n+00004270 , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3576]!\t; 0xdf8\n+\tldr\tpc, [ip, #3572]!\t; 0xdf4\n \n-00004278 :\n+0000427c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3568]!\t; 0xdf0\n+\tldr\tpc, [ip, #3564]!\t; 0xdec\n \n-00004284 <__cxa_begin_catch@plt>:\n+00004288 <__cxa_begin_catch@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3560]!\t; 0xde8\n+\tldr\tpc, [ip, #3556]!\t; 0xde4\n \n-00004290 <__aeabi_uidivmod@plt>:\n+00004294 <__aeabi_uidivmod@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3552]!\t; 0xde0\n+\tldr\tpc, [ip, #3548]!\t; 0xddc\n \n-0000429c :\n+000042a0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3544]!\t; 0xdd8\n+\tldr\tpc, [ip, #3540]!\t; 0xdd4\n \n-000042a8 :\n+000042ac :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3536]!\t; 0xdd0\n+\tldr\tpc, [ip, #3532]!\t; 0xdcc\n \n-000042b4 :\n+000042b8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3528]!\t; 0xdc8\n+\tldr\tpc, [ip, #3524]!\t; 0xdc4\n \n-000042c0 <__cxa_allocate_exception@plt>:\n+000042c4 <__cxa_allocate_exception@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3520]!\t; 0xdc0\n+\tldr\tpc, [ip, #3516]!\t; 0xdbc\n \n-000042cc :\n+000042d0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3512]!\t; 0xdb8\n+\tldr\tpc, [ip, #3508]!\t; 0xdb4\n \n-000042d8 :\n+000042dc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3504]!\t; 0xdb0\n+\tldr\tpc, [ip, #3500]!\t; 0xdac\n \n-000042e4 :\n+000042e8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3496]!\t; 0xda8\n+\tldr\tpc, [ip, #3492]!\t; 0xda4\n \n-000042f0 :\n+000042f4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3488]!\t; 0xda0\n+\tldr\tpc, [ip, #3484]!\t; 0xd9c\n \n-000042fc , std::allocator >::_M_assign(std::__cxx11::basic_string, std::allocator > const&)@plt>:\n+00004300 , std::allocator >::_M_assign(std::__cxx11::basic_string, std::allocator > const&)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3480]!\t; 0xd98\n+\tldr\tpc, [ip, #3476]!\t; 0xd94\n \n-00004308 :\n+0000430c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3472]!\t; 0xd90\n+\tldr\tpc, [ip, #3468]!\t; 0xd8c\n \n-00004314 :\n+00004318 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3464]!\t; 0xd88\n+\tldr\tpc, [ip, #3460]!\t; 0xd84\n \n-00004320 :\n+00004324 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3456]!\t; 0xd80\n+\tldr\tpc, [ip, #3452]!\t; 0xd7c\n \n-0000432c :\n+00004330 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3448]!\t; 0xd78\n+\tldr\tpc, [ip, #3444]!\t; 0xd74\n \n-00004338 :\n+0000433c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3440]!\t; 0xd70\n+\tldr\tpc, [ip, #3436]!\t; 0xd6c\n \n-00004344 <__cxa_guard_abort@plt>:\n+00004348 <__cxa_guard_abort@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3432]!\t; 0xd68\n+\tldr\tpc, [ip, #3428]!\t; 0xd64\n \n-00004350 <__cxa_guard_release@plt>:\n+00004354 <__cxa_guard_release@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3424]!\t; 0xd60\n+\tldr\tpc, [ip, #3420]!\t; 0xd5c\n \n-0000435c :\n+00004360 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3416]!\t; 0xd58\n+\tldr\tpc, [ip, #3412]!\t; 0xd54\n \n-00004368 :\n+0000436c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3408]!\t; 0xd50\n+\tldr\tpc, [ip, #3404]!\t; 0xd4c\n \n-00004374 :\n+00004378 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3400]!\t; 0xd48\n+\tldr\tpc, [ip, #3396]!\t; 0xd44\n \n-00004380 :\n+00004384 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3392]!\t; 0xd40\n+\tldr\tpc, [ip, #3388]!\t; 0xd3c\n \n-0000438c :\n+00004390 :\n \t\t\t; instruction: 0xe7fd4778\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3380]!\t; 0xd34\n+\tldr\tpc, [ip, #3376]!\t; 0xd30\n \n-0000439c :\n+000043a0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3372]!\t; 0xd2c\n+\tldr\tpc, [ip, #3368]!\t; 0xd28\n \n-000043a8 :\n+000043ac :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3364]!\t; 0xd24\n+\tldr\tpc, [ip, #3360]!\t; 0xd20\n \n-000043b4 :\n+000043b8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3356]!\t; 0xd1c\n+\tldr\tpc, [ip, #3352]!\t; 0xd18\n \n-000043c0 :\n+000043c4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3348]!\t; 0xd14\n+\tldr\tpc, [ip, #3344]!\t; 0xd10\n \n-000043cc , std::allocator >::swap(std::__cxx11::basic_string, std::allocator >&)@plt>:\n+000043d0 , std::allocator >::swap(std::__cxx11::basic_string, std::allocator >&)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3340]!\t; 0xd0c\n+\tldr\tpc, [ip, #3336]!\t; 0xd08\n \n-000043d8 <__cxa_free_exception@plt>:\n+000043dc <__cxa_free_exception@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3332]!\t; 0xd04\n+\tldr\tpc, [ip, #3328]!\t; 0xd00\n \n-000043e4 :\n+000043e8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3324]!\t; 0xcfc\n+\tldr\tpc, [ip, #3320]!\t; 0xcf8\n \n-000043f0 :\n+000043f4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3316]!\t; 0xcf4\n+\tldr\tpc, [ip, #3312]!\t; 0xcf0\n \n-000043fc , std::allocator >::insert(unsigned int, char const*)@plt>:\n+00004400 , std::allocator >::insert(unsigned int, char const*)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3308]!\t; 0xcec\n+\tldr\tpc, [ip, #3304]!\t; 0xce8\n \n-00004408 :\n+0000440c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3300]!\t; 0xce4\n+\tldr\tpc, [ip, #3296]!\t; 0xce0\n \n-00004414 <_Py_Dealloc@plt>:\n+00004418 <_Py_Dealloc@plt>:\n \t\t\t; instruction: 0xe7fd4778\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3288]!\t; 0xcd8\n+\tldr\tpc, [ip, #3284]!\t; 0xcd4\n \n-00004424 :\n+00004428 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3280]!\t; 0xcd0\n+\tldr\tpc, [ip, #3276]!\t; 0xccc\n \n-00004430 :\n+00004434 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3272]!\t; 0xcc8\n+\tldr\tpc, [ip, #3268]!\t; 0xcc4\n \n-0000443c :\n+00004440 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3264]!\t; 0xcc0\n+\tldr\tpc, [ip, #3260]!\t; 0xcbc\n \n-00004448 :\n+0000444c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3256]!\t; 0xcb8\n+\tldr\tpc, [ip, #3252]!\t; 0xcb4\n \n-00004454 :\n+00004458 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3248]!\t; 0xcb0\n+\tldr\tpc, [ip, #3244]!\t; 0xcac\n \n-00004460 :\n+00004464 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3240]!\t; 0xca8\n+\tldr\tpc, [ip, #3236]!\t; 0xca4\n \n-0000446c :\n+00004470 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3232]!\t; 0xca0\n+\tldr\tpc, [ip, #3228]!\t; 0xc9c\n \n-00004478 , std::allocator >::push_back(char)@plt>:\n+0000447c , std::allocator >::push_back(char)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3224]!\t; 0xc98\n+\tldr\tpc, [ip, #3220]!\t; 0xc94\n \n-00004484 <_PyObject_GetDictPtr@plt>:\n+00004488 <_PyObject_GetDictPtr@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3216]!\t; 0xc90\n+\tldr\tpc, [ip, #3212]!\t; 0xc8c\n \n-00004490 :\n+00004494 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3208]!\t; 0xc88\n+\tldr\tpc, [ip, #3204]!\t; 0xc84\n \n-0000449c :\n+000044a0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3200]!\t; 0xc80\n+\tldr\tpc, [ip, #3196]!\t; 0xc7c\n \n-000044a8 <__cxa_demangle@plt>:\n+000044ac <__cxa_demangle@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3192]!\t; 0xc78\n+\tldr\tpc, [ip, #3188]!\t; 0xc74\n \n-000044b4 :\n+000044b8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3184]!\t; 0xc70\n+\tldr\tpc, [ip, #3180]!\t; 0xc6c\n \n-000044c0 :\n+000044c4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3176]!\t; 0xc68\n+\tldr\tpc, [ip, #3172]!\t; 0xc64\n \n-000044cc :\n+000044d0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3168]!\t; 0xc60\n+\tldr\tpc, [ip, #3164]!\t; 0xc5c\n \n-000044d8 :\n+000044dc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3160]!\t; 0xc58\n+\tldr\tpc, [ip, #3156]!\t; 0xc54\n \n-000044e4 :\n+000044e8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3152]!\t; 0xc50\n+\tldr\tpc, [ip, #3148]!\t; 0xc4c\n \n-000044f0 :\n+000044f4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3144]!\t; 0xc48\n+\tldr\tpc, [ip, #3140]!\t; 0xc44\n \n-000044fc , std::allocator >::rfind(char const*, unsigned int, unsigned int) const@plt>:\n+00004500 , std::allocator >::rfind(char const*, unsigned int, unsigned int) const@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3136]!\t; 0xc40\n+\tldr\tpc, [ip, #3132]!\t; 0xc3c\n \n-00004508 :\n+0000450c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3128]!\t; 0xc38\n+\tldr\tpc, [ip, #3124]!\t; 0xc34\n \n-00004514 , std::allocator >::_M_append(char const*, unsigned int)@plt>:\n+00004518 , std::allocator >::_M_append(char const*, unsigned int)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3120]!\t; 0xc30\n+\tldr\tpc, [ip, #3116]!\t; 0xc2c\n \n-00004520 , std::allocator >::find(char, unsigned int) const@plt>:\n+00004524 , std::allocator >::find(char, unsigned int) const@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3112]!\t; 0xc28\n+\tldr\tpc, [ip, #3108]!\t; 0xc24\n \n-0000452c :\n+00004530 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3104]!\t; 0xc20\n+\tldr\tpc, [ip, #3100]!\t; 0xc1c\n \n-00004538 , std::allocator >::_M_construct(unsigned int, char)@plt>:\n+0000453c , std::allocator >::_M_construct(unsigned int, char)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3096]!\t; 0xc18\n+\tldr\tpc, [ip, #3092]!\t; 0xc14\n \n-00004544 :\n+00004548 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3088]!\t; 0xc10\n+\tldr\tpc, [ip, #3084]!\t; 0xc0c\n \n-00004550 :\n+00004554 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3080]!\t; 0xc08\n+\tldr\tpc, [ip, #3076]!\t; 0xc04\n \n-0000455c :\n+00004560 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3072]!\t; 0xc00\n+\tldr\tpc, [ip, #3068]!\t; 0xbfc\n \n-00004568 :\n+0000456c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3064]!\t; 0xbf8\n+\tldr\tpc, [ip, #3060]!\t; 0xbf4\n \n-00004574 :\n+00004578 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3056]!\t; 0xbf0\n+\tldr\tpc, [ip, #3052]!\t; 0xbec\n \n-00004580 :\n+00004584 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3048]!\t; 0xbe8\n+\tldr\tpc, [ip, #3044]!\t; 0xbe4\n \n-0000458c :\n+00004590 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3040]!\t; 0xbe0\n+\tldr\tpc, [ip, #3036]!\t; 0xbdc\n \n-00004598 <__stack_chk_fail@plt>:\n+0000459c <__stack_chk_fail@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3032]!\t; 0xbd8\n+\tldr\tpc, [ip, #3028]!\t; 0xbd4\n \n-000045a4 :\n+000045a8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3024]!\t; 0xbd0\n+\tldr\tpc, [ip, #3020]!\t; 0xbcc\n \n-000045b0 <__dynamic_cast@plt>:\n+000045b4 <__dynamic_cast@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3016]!\t; 0xbc8\n+\tldr\tpc, [ip, #3012]!\t; 0xbc4\n \n-000045bc :\n+000045c0 :\n \t\t\t; instruction: 0xe7fd4778\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #3004]!\t; 0xbbc\n+\tldr\tpc, [ip, #3000]!\t; 0xbb8\n \n-000045cc :\n+000045d0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2996]!\t; 0xbb4\n+\tldr\tpc, [ip, #2992]!\t; 0xbb0\n \n-000045d8 :\n+000045dc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2988]!\t; 0xbac\n+\tldr\tpc, [ip, #2984]!\t; 0xba8\n \n-000045e4 :\n+000045e8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2980]!\t; 0xba4\n+\tldr\tpc, [ip, #2976]!\t; 0xba0\n \n-000045f0 :\n+000045f4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2972]!\t; 0xb9c\n+\tldr\tpc, [ip, #2968]!\t; 0xb98\n \n-000045fc :\n+00004600 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2964]!\t; 0xb94\n+\tldr\tpc, [ip, #2960]!\t; 0xb90\n \n-00004608 :\n+0000460c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2956]!\t; 0xb8c\n+\tldr\tpc, [ip, #2952]!\t; 0xb88\n \n-00004614 , std::allocator > const&)@plt>:\n+00004618 , std::allocator > const&)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2948]!\t; 0xb84\n+\tldr\tpc, [ip, #2944]!\t; 0xb80\n \n-00004620 :\n+00004624 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2940]!\t; 0xb7c\n+\tldr\tpc, [ip, #2936]!\t; 0xb78\n \n-0000462c >& std::__ostream_insert >(std::basic_ostream >&, char const*, int)@plt>:\n+00004630 >& std::__ostream_insert >(std::basic_ostream >&, char const*, int)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2932]!\t; 0xb74\n+\tldr\tpc, [ip, #2928]!\t; 0xb70\n \n-00004638 :\n+0000463c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2924]!\t; 0xb6c\n+\tldr\tpc, [ip, #2920]!\t; 0xb68\n \n-00004644 :\n+00004648 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2916]!\t; 0xb64\n+\tldr\tpc, [ip, #2912]!\t; 0xb60\n \n-00004650 :\n+00004654 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2908]!\t; 0xb5c\n+\tldr\tpc, [ip, #2904]!\t; 0xb58\n \n-0000465c :\n+00004660 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2900]!\t; 0xb54\n+\tldr\tpc, [ip, #2896]!\t; 0xb50\n \n-00004668 :\n+0000466c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2892]!\t; 0xb4c\n+\tldr\tpc, [ip, #2888]!\t; 0xb48\n \n-00004674 >::init(std::basic_streambuf >*)@plt>:\n+00004678 >::init(std::basic_streambuf >*)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2884]!\t; 0xb44\n+\tldr\tpc, [ip, #2880]!\t; 0xb40\n \n-00004680 :\n+00004684 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2876]!\t; 0xb3c\n+\tldr\tpc, [ip, #2872]!\t; 0xb38\n \n-0000468c :\n+00004690 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2868]!\t; 0xb34\n+\tldr\tpc, [ip, #2864]!\t; 0xb30\n \n-00004698 :\n+0000469c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2860]!\t; 0xb2c\n+\tldr\tpc, [ip, #2856]!\t; 0xb28\n \n-000046a4 :\n+000046a8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2852]!\t; 0xb24\n+\tldr\tpc, [ip, #2848]!\t; 0xb20\n \n-000046b0 :\n+000046b4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2844]!\t; 0xb1c\n+\tldr\tpc, [ip, #2840]!\t; 0xb18\n \n-000046bc <__aeabi_uidiv@plt>:\n+000046c0 <__aeabi_uidiv@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2836]!\t; 0xb14\n+\tldr\tpc, [ip, #2832]!\t; 0xb10\n \n-000046c8 :\n+000046cc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2828]!\t; 0xb0c\n+\tldr\tpc, [ip, #2824]!\t; 0xb08\n \n-000046d4 <__cxa_rethrow@plt>:\n+000046d8 <__cxa_rethrow@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2820]!\t; 0xb04\n+\tldr\tpc, [ip, #2816]!\t; 0xb00\n \n-000046e0 :\n+000046e4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2812]!\t; 0xafc\n+\tldr\tpc, [ip, #2808]!\t; 0xaf8\n \n-000046ec :\n+000046f0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2804]!\t; 0xaf4\n+\tldr\tpc, [ip, #2800]!\t; 0xaf0\n \n-000046f8 :\n+000046fc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2796]!\t; 0xaec\n+\tldr\tpc, [ip, #2792]!\t; 0xae8\n \n-00004704 :\n+00004708 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2788]!\t; 0xae4\n+\tldr\tpc, [ip, #2784]!\t; 0xae0\n \n-00004710 :\n+00004714 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2780]!\t; 0xadc\n+\tldr\tpc, [ip, #2776]!\t; 0xad8\n \n-0000471c :\n+00004720 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2772]!\t; 0xad4\n+\tldr\tpc, [ip, #2768]!\t; 0xad0\n \n-00004728 :\n+0000472c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2764]!\t; 0xacc\n+\tldr\tpc, [ip, #2760]!\t; 0xac8\n \n-00004734 :\n+00004738 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2756]!\t; 0xac4\n+\tldr\tpc, [ip, #2752]!\t; 0xac0\n \n-00004740 :\n+00004744 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2748]!\t; 0xabc\n+\tldr\tpc, [ip, #2744]!\t; 0xab8\n \n-0000474c :\n+00004750 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2740]!\t; 0xab4\n+\tldr\tpc, [ip, #2736]!\t; 0xab0\n \n-00004758 :\n+0000475c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2732]!\t; 0xaac\n+\tldr\tpc, [ip, #2728]!\t; 0xaa8\n \n-00004764 , std::allocator > const&)@plt>:\n+00004768 , std::allocator > const&)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2724]!\t; 0xaa4\n+\tldr\tpc, [ip, #2720]!\t; 0xaa0\n \n-00004770 <__cxa_end_catch@plt>:\n+00004774 <__cxa_end_catch@plt>:\n \t\t\t; instruction: 0xe7fd4778\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2712]!\t; 0xa98\n+\tldr\tpc, [ip, #2708]!\t; 0xa94\n \n-00004780 :\n+00004784 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2704]!\t; 0xa90\n+\tldr\tpc, [ip, #2700]!\t; 0xa8c\n \n-0000478c :\n+00004790 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2696]!\t; 0xa88\n+\tldr\tpc, [ip, #2692]!\t; 0xa84\n \n-00004798 <__gxx_personality_v0@plt>:\n+0000479c <__gxx_personality_v0@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2688]!\t; 0xa80\n+\tldr\tpc, [ip, #2684]!\t; 0xa7c\n \n-000047a4 :\n+000047a8 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2680]!\t; 0xa78\n+\tldr\tpc, [ip, #2676]!\t; 0xa74\n \n-000047b0 :\n+000047b4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2672]!\t; 0xa70\n+\tldr\tpc, [ip, #2668]!\t; 0xa6c\n \n-000047bc , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>:\n+000047c0 , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2664]!\t; 0xa68\n+\tldr\tpc, [ip, #2660]!\t; 0xa64\n \n-000047c8 <_PyThreadState_UncheckedGet@plt>:\n+000047cc <_PyThreadState_UncheckedGet@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2656]!\t; 0xa60\n+\tldr\tpc, [ip, #2652]!\t; 0xa5c\n \n-000047d4 <__cxa_throw@plt>:\n+000047d8 <__cxa_throw@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2648]!\t; 0xa58\n+\tldr\tpc, [ip, #2644]!\t; 0xa54\n \n-000047e0 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>:\n+000047e4 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2640]!\t; 0xa50\n+\tldr\tpc, [ip, #2636]!\t; 0xa4c\n \n-000047ec <_PyType_Lookup@plt>:\n+000047f0 <_PyType_Lookup@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2632]!\t; 0xa48\n+\tldr\tpc, [ip, #2628]!\t; 0xa44\n \n-000047f8 :\n+000047fc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2624]!\t; 0xa40\n+\tldr\tpc, [ip, #2620]!\t; 0xa3c\n \n-00004804 <_Unwind_Resume@plt>:\n+00004808 <_Unwind_Resume@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2616]!\t; 0xa38\n+\tldr\tpc, [ip, #2612]!\t; 0xa34\n \n-00004810 :\n+00004814 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2608]!\t; 0xa30\n+\tldr\tpc, [ip, #2604]!\t; 0xa2c\n \n-0000481c <__cxa_guard_acquire@plt>:\n+00004820 <__cxa_guard_acquire@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2600]!\t; 0xa28\n+\tldr\tpc, [ip, #2596]!\t; 0xa24\n \n-00004828 :\n+0000482c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2592]!\t; 0xa20\n+\tldr\tpc, [ip, #2588]!\t; 0xa1c\n \n-00004834 :\n+00004838 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2584]!\t; 0xa18\n+\tldr\tpc, [ip, #2580]!\t; 0xa14\n \n-00004840 :\n+00004844 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2576]!\t; 0xa10\n+\tldr\tpc, [ip, #2572]!\t; 0xa0c\n \n-0000484c :\n+00004850 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2568]!\t; 0xa08\n+\tldr\tpc, [ip, #2564]!\t; 0xa04\n \n-00004858 :\n+0000485c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2560]!\t; 0xa00\n+\tldr\tpc, [ip, #2556]!\t; 0x9fc\n \n-00004864 :\n+00004868 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2552]!\t; 0x9f8\n+\tldr\tpc, [ip, #2548]!\t; 0x9f4\n \n-00004870 <__gmon_start__@plt>:\n+00004874 <__gmon_start__@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2544]!\t; 0x9f0\n+\tldr\tpc, [ip, #2540]!\t; 0x9ec\n \n-0000487c :\n+00004880 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2536]!\t; 0x9e8\n+\tldr\tpc, [ip, #2532]!\t; 0x9e4\n \n-00004888 :\n+0000488c :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2528]!\t; 0x9e0\n+\tldr\tpc, [ip, #2524]!\t; 0x9dc\n \n-00004894 :\n+00004898 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2520]!\t; 0x9d8\n+\tldr\tpc, [ip, #2516]!\t; 0x9d4\n \n-000048a0 , std::allocator >::append(char const*)@plt>:\n+000048a4 , std::allocator >::append(char const*)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2512]!\t; 0x9d0\n+\tldr\tpc, [ip, #2508]!\t; 0x9cc\n \n-000048ac , std::allocator >::_M_erase(unsigned int, unsigned int)@plt>:\n+000048b0 , std::allocator >::_M_erase(unsigned int, unsigned int)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2504]!\t; 0x9c8\n+\tldr\tpc, [ip, #2500]!\t; 0x9c4\n \n-000048b8 :\n+000048bc :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2496]!\t; 0x9c0\n+\tldr\tpc, [ip, #2492]!\t; 0x9bc\n \n-000048c4 <__cxa_finalize@plt>:\n+000048c8 <__cxa_finalize@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2488]!\t; 0x9b8\n+\tldr\tpc, [ip, #2484]!\t; 0x9b4\n \n-000048d0 :\n+000048d4 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2480]!\t; 0x9b0\n+\tldr\tpc, [ip, #2476]!\t; 0x9ac\n \n-000048dc :\n+000048e0 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2472]!\t; 0x9a8\n+\tldr\tpc, [ip, #2468]!\t; 0x9a4\n \n-000048e8 :\n+000048ec :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2464]!\t; 0x9a0\n+\tldr\tpc, [ip, #2460]!\t; 0x99c\n \n-000048f4 , std::allocator >::_M_mutate(unsigned int, unsigned int, char const*, unsigned int)@plt>:\n+000048f8 , std::allocator >::_M_mutate(unsigned int, unsigned int, char const*, unsigned int)@plt>:\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2456]!\t; 0x998\n+\tldr\tpc, [ip, #2452]!\t; 0x994\n \n-00004900 :\n+00004904 :\n \tadd\tip, pc, #0, 12\n \tadd\tip, ip, #36, 20\t; 0x24000\n-\tldr\tpc, [ip, #2448]!\t; 0x990\n+\tldr\tpc, [ip, #2444]!\t; 0x98c\n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {}", "unified_diff": "@@ -4,47 +4,47 @@\n Disassembly of section .text:\n \n 00004910 :\n \t\t\t; instruction: 0x4601b530\n \taddlt\tr4, r3, ip, lsl #26\n \tldrbtmi\tr2, [sp], #-8\n \t\t\t; instruction: 0xf7ff9101\n-\tstmdbls\tr1, {r4, r6, r7, sl, fp, sp, lr, pc}\n+\tstmdbls\tr1, {r1, r4, r6, r7, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7ff4604\n-\tbmi\t23fb88 \n+\tbmi\t23fb90 \n \tblmi\t2161b4 \n \tstmiapl\tr9!, {r1, r3, r5, r7, fp, ip, lr}^\n-\tsvc\t0x004ef7ff\n+\tsvc\t0x0050f7ff\n \tstrtmi\tr4, [r0], -r3, lsl #12\n \t\t\t; instruction: 0xf7ff461c\n-\tstrtmi\tlr, [r0], -ip, asr #26\n-\tsvc\t0x005ef7ff\n+\tstrtmi\tlr, [r0], -lr, asr #26\n+\tsvc\t0x0060f7ff\n \tandeq\tr4, r2, r2, ror #13\n \tandeq\tr0, r0, r8, lsr #6\n \tandeq\tr0, r0, r0, lsr #7\n \t\t\t; instruction: 0x4601b530\n \taddlt\tr4, r3, ip, lsl #26\n \tldrbtmi\tr2, [sp], #-8\n \t\t\t; instruction: 0xf7ff9101\n-\tstmdbls\tr1, {r1, r2, r3, r5, r7, sl, fp, sp, lr, pc}\n+\tstmdbls\tr1, {r4, r5, r7, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7ff4604\n-\tbmi\t240564 \n+\tbmi\t24056c \n \tblmi\t2161f8 \n \tstmiapl\tr9!, {r1, r3, r5, r7, fp, ip, lr}^\n-\tsvc\t0x002cf7ff\n+\tsvc\t0x002ef7ff\n \tstrtmi\tr4, [r0], -r3, lsl #12\n \t\t\t; instruction: 0xf7ff461c\n-\tstrtmi\tlr, [r0], -sl, lsr #26\n-\tsvc\t0x003cf7ff\n+\tstrtmi\tlr, [r0], -ip, lsr #26\n+\tsvc\t0x003ef7ff\n \tmuleq\tr2, lr, r6\n \tandeq\tr0, r0, r8, lsr #6\n \tandeq\tr0, r0, r0, lsr #7\n \t\t\t; instruction: 0x4605b538\n \t\t\t; instruction: 0xf7ff201c\n-\t\t\t; instruction: 0x4604ec90\n+\t\t\t; instruction: 0x4604ec92\n \tblmi\t59eb4c \n \t\t\t; instruction: 0xf103447b\n \t\t\t; instruction: 0x33200208\n \tstmib\tr4, {r1, r5, r7, r8, sp, lr}^\n \tldmiblt\tr0!, {ip, sp}\n \tldrdcs\tlr, [r2], -r5\n \tblmi\t45cc4c \n@@ -53,29 +53,29 @@\n \t\t\t; instruction: 0xf1030103\n \t\t\t; instruction: 0xf1030534\n \teorvs\tr0, r5, ip, ror r1\n \t\t\t; instruction: 0xf103447a\n \tstrtmi\tr0, [r0], -ip, asr #10\n \tcmnvs\tr5, ip, ror #6\n \t\t\t; instruction: 0xf7ff61a3\n-\tstmdavs\tr3, {r3, r4, r5, r6, r7, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3, {r1, r3, r4, r5, r6, r7, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0x479868db\n \tstrmi\tlr, [r3], -r4, ror #15\n \tldrmi\tr4, [ip], -r0, lsr #12\n-\tldcl\t7, cr15, [r0], #1020\t; 0x3fc\n+\tldcl\t7, cr15, [r2], #1020\t; 0x3fc\n \t\t\t; instruction: 0xf7ff4620\n-\tsvclt\t0x0000ef04\n+\tsvclt\t0x0000ef06\n \tmuleq\tr2, ip, r2\n \tandeq\tr4, r2, r2, lsl #5\n \tstrdeq\tr7, [r0], -r5\n \t\t\t; instruction: 0x4605b538\n \tstmdavs\tfp!, {r2, r3, r4, sp}\n \tldccc\t8, cr15, [r0], {83}\t; 0x53\n \t\t\t; instruction: 0xf7ff441d\n-\t\t\t; instruction: 0x4604ec52\n+\t\t\t; instruction: 0x4604ec54\n \tstmdavs\tr8!, {r1, r2, r4, r8, r9, fp, lr}^\n \t\t\t; instruction: 0xf103447b\n \t\t\t; instruction: 0x33200208\n \tstmib\tr4, {r1, r5, r7, r8, sp, lr}^\n \tldmiblt\tr0!, {ip, sp}\n \tldrdcs\tlr, [r2], -r5\n \tblmi\t45ccc8 \n@@ -84,27 +84,27 @@\n \t\t\t; instruction: 0xf1030103\n \t\t\t; instruction: 0xf1030534\n \teorvs\tr0, r5, ip, ror r1\n \t\t\t; instruction: 0xf103447a\n \tstrtmi\tr0, [r0], -ip, asr #10\n \tcmnvs\tr5, ip, ror #6\n \t\t\t; instruction: 0xf7ff61a3\n-\tstmdavs\tr3, {r1, r3, r4, r5, r7, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3, {r2, r3, r4, r5, r7, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0x479868db\n \tstrmi\tlr, [r3], -r4, ror #15\n \tldrmi\tr4, [ip], -r0, lsr #12\n-\tldc\t7, cr15, [r2], #1020\t; 0x3fc\n+\tldc\t7, cr15, [r4], #1020\t; 0x3fc\n \t\t\t; instruction: 0xf7ff4620\n-\tsvclt\t0x0000eec6\n+\tsvclt\t0x0000eec8\n \tandeq\tr4, r2, r0, lsr #4\n \tandeq\tr4, r2, r6, lsl #4\n \tandeq\tr7, r0, r9, ror r5\n \t\t\t; instruction: 0x4605b538\n \t\t\t; instruction: 0xf7ff201c\n-\t\t\t; instruction: 0x4604ec18\n+\t\t\t; instruction: 0x4604ec1a\n \tblmi\t59ec3c \n \t\t\t; instruction: 0xf103447b\n \t\t\t; instruction: 0x33200208\n \tstmib\tr4, {r1, r5, r7, r8, sp, lr}^\n \tldmiblt\tr0!, {ip, sp}\n \tldrdcs\tlr, [r2], -r5\n \tblmi\t45cd3c \n@@ -113,29 +113,29 @@\n \t\t\t; instruction: 0xf1030103\n \t\t\t; instruction: 0xf10305a8\n \tstrdvs\tr0, [r5], -r0\t; \n \t\t\t; instruction: 0xf103447a\n \tstrtmi\tr0, [r0], -r0, asr #11\n \tcmnvs\tr5, r0, ror #7\n \t\t\t; instruction: 0xf7ff61a3\n-\tstmdavs\tr3, {r7, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3, {r1, r7, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0x479868db\n \tstrmi\tlr, [r3], -r4, ror #15\n \tldrmi\tr4, [ip], -r0, lsr #12\n-\tldcl\t7, cr15, [r8], #-1020\t; 0xfffffc04\n+\tldcl\t7, cr15, [sl], #-1020\t; 0xfffffc04\n \t\t\t; instruction: 0xf7ff4620\n-\tsvclt\t0x0000ee8c\n+\tsvclt\t0x0000ee8e\n \tandeq\tr4, r2, ip, lsr #3\n \tmuleq\tr2, r2, r1\n \tmuleq\tr0, r1, sp\n \t\t\t; instruction: 0x4605b538\n \tstmdavs\tfp!, {r2, r3, r4, sp}\n \tldccc\t8, cr15, [r0], {83}\t; 0x53\n \t\t\t; instruction: 0xf7ff441d\n-\t\t\t; instruction: 0x4604ebda\n+\t\t\t; instruction: 0x4604ebdc\n \tstmdavs\tr8!, {r1, r2, r4, r8, r9, fp, lr}^\n \t\t\t; instruction: 0xf103447b\n \t\t\t; instruction: 0x33200208\n \tstmib\tr4, {r1, r5, r7, r8, sp, lr}^\n \tldmiblt\tr0!, {ip, sp}\n \tldrdcs\tlr, [r2], -r5\n \tblmi\t45cdb8 \n@@ -144,76 +144,76 @@\n \t\t\t; instruction: 0xf1030103\n \t\t\t; instruction: 0xf10305a8\n \tstrdvs\tr0, [r5], -r0\t; \n \t\t\t; instruction: 0xf103447a\n \tstrtmi\tr0, [r0], -r0, asr #11\n \tcmnvs\tr5, r0, ror #7\n \t\t\t; instruction: 0xf7ff61a3\n-\tstmdavs\tr3, {r1, r6, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3, {r2, r6, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0x479868db\n \tstrmi\tlr, [r3], -r4, ror #15\n \tldrmi\tr4, [ip], -r0, lsr #12\n-\tldc\t7, cr15, [sl], #-1020\t; 0xfffffc04\n+\tldc\t7, cr15, [ip], #-1020\t; 0xfffffc04\n \t\t\t; instruction: 0xf7ff4620\n-\tsvclt\t0x0000ee4e\n+\tsvclt\t0x0000ee50\n \tandeq\tr4, r2, r0, lsr r1\n \tandeq\tr4, r2, r6, lsl r1\n \tandeq\tr6, r0, r5, lsl sp\n \t\t\t; instruction: 0x4604b510\n \ttstlt\tr8, r0, lsl #17\n \tbne\t25f00c \n-\tstc\t7, cr15, [r4], {255}\t; 0xff\n+\tstc\t7, cr15, [r6], {255}\t; 0xff\n \ttstcs\tr4, r0, lsr #12\n \t\t\t; instruction: 0x4010e8bd\n-\tbllt\tfff42b94 \n+\tbllt\tfffc2b94 \n \tmvnsmi\tlr, sp, lsr #18\n \tbmi\tb163b0 \n \tblmi\tb30dcc \n \tstmdbge\tr3, {r1, r3, r4, r5, r6, sl, lr}\n \tstcge\t6, cr4, [r5, #-32]\t; 0xffffffe0\n \tldmpl\tr3, {r0, r8, ip, pc}^\n \tmovwls\tr6, #38939\t; 0x981b\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0xf8c4f001\n \tstrtmi\tr9, [r0], -r1, lsl #18\n-\tstc\t7, cr15, [sl, #-1020]!\t; 0xfffffc04\n+\tstc\t7, cr15, [ip, #-1020]!\t; 0xfffffc04\n \tadcmi\tr9, r8, #196608\t; 0x30000\n \tstmdbls\tr5, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7ff3101\n-\tblmi\t87fb5c \n+\tblmi\t87fb64 \n \tstreq\tpc, [r8], -r4, lsl #2\n \tstreq\tpc, [ip, -r4, lsl #2]\n \tldmdaeq\tr0, {r2, r8, ip, sp, lr, pc}\n \tandcs\tr4, r0, #2063597568\t; 0x7b000000\n \tadcvs\tr3, r2, r8, lsl #6\n \tandcs\tlr, r3, #196, 18\t; 0x310000\n \t\t\t; instruction: 0x46424639\n \teorvs\tr4, r3, r0, lsr r6\n-\tstcl\t7, cr15, [ip, #1020]\t; 0x3fc\n+\tstcl\t7, cr15, [lr, #1020]\t; 0x3fc\n \tblls\tfcc68 \n \tadcmi\tr4, fp, #4, 12\t; 0x400000\n \tstmdbls\tr5, {r2, ip, lr, pc}\n \ttstcc\tr1, r8, lsl r6\n-\tbl\tff142c08 \n+\tbl\tff1c2c08 \n \t\t\t; instruction: 0xf7ff4620\n-\t\t\t; instruction: 0x4605edfc\n+\t\t\t; instruction: 0x4605edfe\n \t\t\t; instruction: 0xf00b4640\n \tshsaxmi\tpc, r8, r9\t; \n \t\t\t; instruction: 0xff56f00b\n \t\t\t; instruction: 0xf00b4630\n \tqsaxmi\tpc, r0, r3\t; \n-\tldc\t7, cr15, [r2], #1020\t; 0x3fc\n+\tldc\t7, cr15, [r4], #1020\t; 0x3fc\n \t\t\t; instruction: 0xf7ff4628\n-\tbmi\t2c03e4 \n+\tbmi\t2c03ec \n \tldrbtmi\tr4, [sl], #-2823\t; 0xfffff4f9\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r9, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0xf7ffd001\n-\tandlt\tlr, sl, sl, lsr #25\n+\tandlt\tlr, sl, ip, lsr #25\n \tldrhhi\tlr, [r0, #141]!\t; 0x8d\n \tandeq\tr4, r2, ip, asr r4\n \t\t\t; instruction: 0x000002b8\n \tmuleq\tr2, r0, r1\n \tandeq\tr4, r2, sl, asr #7\n \tmvnsmi\tlr, #737280\t; 0xb4000\n \tldmdami\tr2!, {r2, r9, sl, lr}^\n@@ -247,15 +247,15 @@\n \tstrle\tr0, [ip, #-2011]!\t; 0xfffff825\n \tldrbtmi\tr4, [fp], #-2907\t; 0xfffff4a5\n \tmovwcs\tlr, #6611\t; 0x19d3\n \tmovwcs\tlr, #2500\t; 0x9c4\n \tmovwcc\tfp, #16699\t; 0x413b\n \tsvcne\t0x0000e853\n \tstmda\tr3, {r0, r8, ip, sp}^\n-\tbcs\t94f4 \n+\tbcs\t94f4 \n \tblmi\t15794d8 \n \tldrbtmi\tr4, [fp], #-1584\t; 0xfffff9d0\n \tadceq\tpc, r8, #-1073741824\t; 0xc0000000\n \t\t\t; instruction: 0xf1039206\n \tmvncc\tr0, #192, 4\n \tmovwcs\tlr, #47565\t; 0xb9cd\n \tblx\tffec0d2a \n@@ -264,17 +264,17 @@\n \tldrbtmi\tr4, [sl], #-2887\t; 0xfffff4b9\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, sp, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0x4620d150\n \tpop\t{r0, r1, r2, r3, ip, sp, pc}\n \t\t\t; instruction: 0xf7ff83f0\n-\tstmdacs\tr0, {r1, r2, r4, r5, r6, r8, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r3, r4, r5, r6, r8, sl, fp, sp, lr, pc}\n \tandscs\tsp, ip, lr, asr #1\n-\tb\t442d3c \n+\tb\t4c2d3c \n \tstmdals\tr7, {r0, r1, r2, r9, sl, lr}\n \tldrbtmi\tr4, [fp], #-2883\t; 0xfffff4bd\n \t\t\t; instruction: 0xf1036078\n \t\t\t; instruction: 0x33200208\n \tldrhtvs\tr6, [fp], -sl\n \tstmdavs\tr3, {r4, r8, ip, sp, pc}\n \t\t\t; instruction: 0x479868db\n@@ -284,53 +284,53 @@\n \tbls\t217a58 \n \tadcsvs\tr4, sl, fp, ror r4\n \tadceq\tpc, r8, #-1073741824\t; 0xc0000000\n \t\t\t; instruction: 0xf103603a\n \tmvncc\tr0, #192, 4\n \t\t\t; instruction: 0xf849617a\n \t\t\t; instruction: 0xf7ff3f18\n-\tsbcvs\tlr, r7, lr, ror #19\n+\tstrdvs\tlr, [r7], #144\t; 0x90\n \tsvcmi\t0x00344680\n-\tldrbtmi\tr4, [pc], #-2868\t; 4d90 \n+\tldrbtmi\tr4, [pc], #-2868\t; 4d90 \n \torrscc\tr4, ip, #2063597568\t; 0x7b000000\n \tmovwcs\tr6, #4099\t; 0x1003\n \tmovwcc\tlr, #6592\t; 0x19c0\n \tstmib\tr7, {r0, r1, r8, sl, fp, ip}^\n \tldmda\tr3, {r0, ip, pc}^\n \ttstcc\tr1, r0, lsl #30\n \tandne\tlr, r0, #4390912\t; 0x430000\n \tmvnsle\tr2, r0, lsl #20\n \tvldmdbne\tr8!, {s8-s51}\n \tldrbtmi\tr4, [sl], #-2348\t; 0xfffff6d4\n \t\t\t; instruction: 0xf7ff4479\n-\t\t\t; instruction: 0x4638e9f2\n-\tb\tff242dc0 \n+\t\t\t; instruction: 0x4638e9f4\n+\tb\tff2c2dc0 \n \t\t\t; instruction: 0xf0054640\n \t\t\t; instruction: 0xe785fcf5\n-\tbl\tff9c2dcc \n-\tb\t16c2dd0 \n+\tbl\tffa42dcc \n+\tb\t1742dd0 \n \t\t\t; instruction: 0x4638683b\n \t\t\t; instruction: 0x4798685b\n-\tldcl\t7, cr15, [ip], #-1020\t; 0xfffffc04\n+\tldcl\t7, cr15, [lr], #-1020\t; 0xfffffc04\n \ttstcs\tip, r4, lsl #12\n \t\t\t; instruction: 0xf7ff4638\n-\tstmdami\tr0!, {r1, r2, r4, r6, r7, r9, fp, sp, lr, pc}\n+\tstmdami\tr0!, {r3, r4, r6, r7, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7ff4478\n-\tblmi\t7ff8a4 \n+\tblmi\t7ff8ac \n \tldrbtmi\tr4, [fp], #-1584\t; 0xfffff9d0\n \tadceq\tpc, r8, #-1073741824\t; 0xc0000000\n \t\t\t; instruction: 0xf1039206\n \tmvncc\tr0, #192, 4\n \tmovwcs\tlr, #47565\t; 0xb9cd\n \tblx\t1f40e26 \n \t\t\t; instruction: 0xf0064628\n \t\t\t; instruction: 0x4620fb79\n-\tldcl\t7, cr15, [r8], #1020\t; 0x3fc\n+\tldcl\t7, cr15, [sl], #1020\t; 0x3fc\n \t\t\t; instruction: 0xf7ff4604\n-\tstrb\tlr, [r4, lr, lsr #25]!\n+\t\t\t; instruction: 0xe7e4ecb0\n \tstrb\tr4, [r2, r4, lsl #12]!\n \tldrtmi\tr4, [r0], -r4, lsl #12\n \tblx\t1b40e46 \n \tsvclt\t0x0000e7ee\n \tmuleq\tr2, r4, r3\n \tldrdeq\tr3, [r2], -r0\n \t\t\t; instruction: 0x000002b8\n@@ -380,15 +380,15 @@\n \tstrle\tr0, [ip, #-2011]!\t; 0xfffff825\n \tldrbtmi\tr4, [fp], #-2909\t; 0xfffff4a3\n \tmovwcs\tlr, #18899\t; 0x49d3\n \tmovwcs\tlr, #2500\t; 0x9c4\n \tmovwcc\tfp, #16699\t; 0x413b\n \tsvcne\t0x0000e853\n \tstmda\tr3, {r0, r8, ip, sp}^\n-\tbcs\t9708 \n+\tbcs\t9708 \n \tblmi\t15f96ec \n \tldrbtmi\tr4, [fp], #-1584\t; 0xfffff9d0\n \teorseq\tpc, r4, #-1073741824\t; 0xc0000000\n \t\t\t; instruction: 0xf1039206\n \tcmncc\tip, #76, 4\t; 0xc0000004\n \tmovwcs\tlr, #47565\t; 0xb9cd\n \tcdp2\t0, 10, cr15, cr10, cr6, {0}\n@@ -397,18 +397,18 @@\n \tldrbtmi\tr4, [sl], #-2889\t; 0xfffff4b7\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, sp, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0x4620d153\n \tpop\t{r0, r1, r2, r3, ip, sp, pc}\n \tstrdcc\tr8, [ip], -r0\n-\tstcl\t7, cr15, [sl], #-1020\t; 0xfffffc04\n+\tstcl\t7, cr15, [ip], #-1020\t; 0xfffffc04\n \tsbcle\tr2, sp, r0, lsl #16\n \t\t\t; instruction: 0xf7ff201c\n-\tstrmi\tlr, [r7], -r6, lsl #18\n+\tstrmi\tlr, [r7], -r8, lsl #18\n \tblmi\t116af78 \n \trsbsvs\tr4, r8, fp, ror r4\n \tandeq\tpc, r8, #-1073741824\t; 0xc0000000\n \t\t\t; instruction: 0x61ba3320\n \ttstlt\tr0, fp, lsr r0\n \tldmvs\tfp, {r0, r1, fp, sp, lr}^\n \tblls\t256dd4 \n@@ -417,55 +417,55 @@\n \tblmi\tf5d46c \n \tldrbtmi\tr9, [fp], #-2568\t; 0xfffff5f8\n \t\t\t; instruction: 0xf10360ba\n \teorsvs\tr0, sl, r4, lsr r2\n \tsubeq\tpc, ip, #-1073741824\t; 0xc0000000\n \tcmnvs\tsl, ip, ror #6\n \tsvccc\t0x0018f849\n-\tstmia\tr2!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmia\tr4!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tstrmi\tr6, [r0], r7, asr #1\n \tblmi\td98c78 \n \tldrbtmi\tr4, [fp], #-1151\t; 0xfffffb81\n \tandvs\tr3, r3, r0, asr #7\n \tstmib\tr0, {r0, r8, r9, sp}^\n \tstcne\t3, cr3, [r3, #-4]\n \tandls\tlr, r4, r7, asr #19\n \tsvcne\t0x0000e853\n \tstmda\tr3, {r0, r8, ip, sp}^\n-\tbcs\t97c4 \n+\tbcs\t97c4 \n \tbmi\tbb97a8 \n \tandseq\tpc, r0, r7, lsl #2\n \tldrbtmi\tr4, [sl], #-2349\t; 0xfffff6d3\n \t\t\t; instruction: 0xf7ff4479\n-\t\t\t; instruction: 0xf107e8e6\n+\t\t\t; instruction: 0xf107e8e8\n \t\t\t; instruction: 0xf7ff000c\n-\t\t\t; instruction: 0x4640e9bc\n+\t\t\t; instruction: 0x4640e9be\n \tblx\tffa40ffa \n \t\t\t; instruction: 0xf7ffe782\n-\t\t\t; instruction: 0xf7ffeada\n-\tldmdavs\tfp!, {r1, r2, r3, r6, r8, fp, sp, lr, pc}\n+\t\t\t; instruction: 0xf7ffeadc\n+\tldmdavs\tfp!, {r4, r6, r8, fp, sp, lr, pc}\n \tldmdavs\tfp, {r3, r4, r5, r9, sl, lr}^\n \t\t\t; instruction: 0xf7ff4798\n-\t\t\t; instruction: 0x4604eb70\n+\t\t\t; instruction: 0x4604eb72\n \t\t\t; instruction: 0x4638211c\n-\tstmib\tr8, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tsl, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrbtmi\tr4, [r8], #-2080\t; 0xfffff7e0\n \t\t\t; instruction: 0xf7ff300c\n-\tblmi\t7ff688 \n+\tblmi\t7ff690 \n \tldrbtmi\tr4, [fp], #-1584\t; 0xfffff9d0\n \teorseq\tpc, r4, #-1073741824\t; 0xc0000000\n \t\t\t; instruction: 0xf1039206\n \tcmncc\tip, #76, 4\t; 0xc0000004\n \tmovwcs\tlr, #47565\t; 0xb9cd\n \tcdp2\t0, 2, cr15, cr8, cr6, {0}\n \t\t\t; instruction: 0xf0064628\n \tstrtmi\tpc, [r0], -r5, lsr #28\n-\tbl\tffac3030 \n+\tbl\tffb43030 \n \t\t\t; instruction: 0xf7ff4604\n-\tstrb\tlr, [r3, r0, lsr #23]!\n+\tstrb\tlr, [r3, r2, lsr #23]!\n \tstrb\tr4, [r1, r4, lsl #12]!\n \tldrtmi\tr4, [r0], -r4, lsl #12\n \tcdp2\t0, 1, cr15, cr8, cr6, {0}\n \tsvclt\t0x0000e7ee\n \tandeq\tr4, r2, r0, lsl #3\n \t\t\t; instruction: 0x00023dbc\n \t\t\t; instruction: 0x000002b8\n@@ -488,42 +488,42 @@\n \tcfldrdmi\tmvd4, [r3, #-488]\t; 0xfffffe18\n \tmrrcmi\t0, 8, fp, r3, cr4\n \tldmpl\tr3, {r0, r2, r3, r4, r5, r6, sl, lr}^\n \tldreq\tpc, [r8, -r5, lsl #2]!\n \t\t\t; instruction: 0x4638447c\n \tmovwls\tr6, #14363\t; 0x381b\n \tmovweq\tpc, #79\t; 0x4f\t; \n-\tbl\td430b4 \n+\tbl\tdc30b4 \n \tvmlsmi.f64\td20, d14, d13\n \t\t\t; instruction: 0xf1054638\n \tldrbtmi\tr0, [lr], #-1852\t; 0xfffff8c4\n \tandhi\tpc, r3, r4, asr r8\t; \n \t\t\t; instruction: 0x46414632\n-\tstmda\tr8!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tsl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf7ff4638\n-\tblmi\t12400a8 \n+\tblmi\t12400b0 \n \t\t\t; instruction: 0x46324638\n \tldrtmi\tr5, [r9], -r7, ror #17\n-\tldmda\tlr, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tr0!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrbeq\tr6, [ip, fp, lsr #24]\n \tblmi\t113a5b0 \n \tcfldrdvs\tmvd4, [sl], {123}\t; 0x7b\n \tstrble\tr0, [r3, #-2000]!\t; 0xfffff830\n \tstclmi\t12, cr4, [r3, #-264]\t; 0xfffffef8\n \t\t\t; instruction: 0xf104447c\n \tldrbtmi\tr0, [sp], #-1624\t; 0xfffff9a8\n \t\t\t; instruction: 0xf7ff4630\n-\tstrbmi\tlr, [r1], -lr, lsl #22\n+\t\t\t; instruction: 0x4641eb10\n \tldrtmi\tr4, [r0], -sl, lsr #12\n \tldrbeq\tpc, [ip], -r4, lsl #2\t; \n-\tstmda\tr6, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tr8, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf7ff4630\n-\t\t\t; instruction: 0x4639ebd2\n+\t\t\t; instruction: 0x4639ebd4\n \tldrtmi\tr4, [r0], -sl, lsr #12\n-\tldmda\tlr!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmda\tr0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrbeq\tr6, [r9, r3, lsr #24]\n \tblmi\tdfa614 \n \tcfldrdvs\tmvd4, [sl], {123}\t; 0x7b\n \tldrle\tr0, [sl, #-2002]\t; 0xfffff82e\n \tblmi\tad7a0c \n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\tdf1a8 \n@@ -532,45 +532,45 @@\n \tpop\t{r2, ip, sp, pc}\n \t\t\t; instruction: 0xf10581f0\n \tmovwcs\tr0, #4164\t; 0x1044\n \tstrtvs\tr9, [fp], #-1\n \tstc2\t7, cr15, [r2, #1020]\t; 0x3fc\n \tldrtmi\tr4, [r2], -ip, lsr #18\n \tldrbtmi\tr9, [r9], #-2049\t; 0xfffff7ff\n-\tldmda\tip, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmda\tlr, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf103e7bf\n \tandcs\tr0, r1, #80\t; 0x50\n \tldrbvs\tr9, [sl], #1\n \tmrc2\t7, 3, pc, cr14, cr15, {7}\n \tblmi\t697a14 \n \tstmdals\tr1, {r1, r3, r4, r5, r6, sl, lr}\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r3, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tbmi\t8b9624 \n \tldrbtmi\tr4, [sl], #-2338\t; 0xfffff6de\n \tandlt\tr4, r4, r9, ror r4\n \tldrhmi\tlr, [r0, #141]!\t; 0x8d\n-\tsvclt\t0x00fef7fe\n+\tstmdalt\tr0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tsubeq\tpc, r4, r4, lsl #2\n \tandls\tr2, r1, r1, lsl #6\n \t\t\t; instruction: 0xf7ff6423\n \tldmdbmi\tip, {r0, r3, r4, r6, r8, sl, fp, ip, sp, lr, pc}\n \tstmdals\tr1, {r1, r3, r5, r9, sl, lr}\n \t\t\t; instruction: 0xf7fe4479\n-\t\t\t; instruction: 0xe7b6eff4\n+\t\t\t; instruction: 0xe7b6eff6\n \tsubseq\tpc, r0, r3, lsl #2\n \tandls\tr2, r1, r1, lsl #4\n \t\t\t; instruction: 0xf7ff64da\n \tbmi\t5c4b20 \n \tstmdals\tr1, {r1, r2, r4, r8, fp, lr}\n \tldrbtmi\tr4, [r9], #-1146\t; 0xfffffb86\n-\tsvc\t0x00e4f7fe\n+\tsvc\t0x00e6f7fe\n \t\t\t; instruction: 0xf7ffe78c\n-\tsvclt\t0x0000e9e0\n+\tsvclt\t0x0000e9e2\n \tandeq\tr3, r2, r8, ror #30\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr4, r2, r8, lsl #7\n \tandeq\tr3, r2, r8, asr pc\n \tandeq\tr0, r0, ip, lsr #7\n \tandeq\tr4, r2, lr, ror #5\n \tstrdeq\tr0, [r0], -r4\n@@ -582,21 +582,21 @@\n \tandeq\tr5, r0, pc, lsr #20\n \tandeq\tr3, r2, r4, lsl #29\n \tandeq\tr4, r2, lr, lsl r2\n \tstrdeq\tr5, [r0], -sp\n \tldrdeq\tr5, [r0], -sp\n \tandeq\tr4, r2, r0, ror #3\n \t\t\t; instruction: 0x000059bf\n-\tldr\tr3, [pc, #20]\t; 5244 \n-\tldr\tr2, [pc, #20]\t; 5248 \n+\tldr\tr3, [pc, #20]\t; 5244 \n+\tldr\tr2, [pc, #20]\t; 5248 \n \tadd\tr3, pc, r3\n \tldr\tr2, [r3, r2]\n \tcmp\tr2, #0\n \tbxeq\tlr\n-\tb\t4870 <__gmon_start__@plt>\n+\tb\t4874 <__gmon_start__@plt>\n \tandeq\tr3, r2, r8, asr #27\n \tmuleq\tr0, r0, r3\n \tblmi\t1d726c \n \tldrbtmi\tr4, [r8], #-2567\t; 0xfffff5f9\n \tldrbtmi\tr4, [sl], #-1147\t; 0xfffffb85\n \tandle\tr4, r3, r3, lsl #5\n \tldmpl\tr3, {r0, r2, r8, r9, fp, lr}^\n@@ -622,15 +622,15 @@\n \tblmi\t2b26d4 \n \tldrbtmi\tr4, [fp], #-2570\t; 0xfffff5f6\n \tldmdavc\tfp, {r1, r3, r4, r5, r6, sl, lr}\n \tblmi\t27386c \n \tldrdlt\tr5, [r3, -r3]!\n \tldrbtmi\tr4, [fp], #-2824\t; 0xfffff4f8\n \t\t\t; instruction: 0xf7ff6818\n-\t\t\t; instruction: 0xf7ffeafe\n+\t\t\t; instruction: 0xf7ffeb00\n \tblmi\t1c51d0 \n \tldrbtmi\tr2, [fp], #-513\t; 0xfffffdff\n \tstclt\t0, cr7, [r8, #-104]\t; 0xffffff98\n \tandeq\tr4, r2, sl, lsr #2\n \tandeq\tr3, r2, r8, asr #26\n \tmuleq\tr0, r8, r3\n \tandeq\tr4, r2, sl, ror #1\n@@ -657,49 +657,49 @@\n \tbmi\t217f5c \n \tldrlt\tr4, [r0, #-1147]\t; 0xfffffb85\n \tstmdavs\tr3, {r1, r3, r4, r7, fp, ip, lr}\n \tldmvs\tfp, {r2, r4, fp, sp, lr}\n \t\t\t; instruction: 0x46014798\n \tpop\t{r5, r9, sl, lr}\n \t\t\t; instruction: 0xf7ff4010\n-\tsvclt\t0x0000b933\n+\tsvclt\t0x0000b935\n \tandeq\tr3, r2, r0, asr #25\n \tandeq\tr0, r0, r0, asr r3\n \tbmi\t217f84 \n \tldrlt\tr4, [r0, #-1147]\t; 0xfffffb85\n \tstmdavs\tr3, {r1, r3, r4, r7, fp, ip, lr}\n \tldmvs\tfp, {r2, r4, fp, sp, lr}\n \t\t\t; instruction: 0x46014798\n \tpop\t{r5, r9, sl, lr}\n \t\t\t; instruction: 0xf7ff4010\n-\tsvclt\t0x0000b91f\n+\tsvclt\t0x0000b921\n \tmuleq\tr2, r8, ip\n \tandeq\tr0, r0, r0, asr #6\n \t\t\t; instruction: 0x4605b570\n-\tstmdb\tr4!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmdb\tr6!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tstrmi\tr2, [r4], -r0, lsl #2\n \t\t\t; instruction: 0xf7ff4628\n-\t\t\t; instruction: 0x4623e95c\n+\t\t\t; instruction: 0x4623e95e\n \tldrhtmi\tlr, [r0], #-141\t; 0xffffff73\n \tsvclt\t0x00004718\n \t\t\t; instruction: 0x4605b538\n \tteqlt\tr4, r4, lsl #17\n \tstmdavs\tr4!, {r5, r9, sl, lr}\n \t\t\t; instruction: 0xf7fe210c\n-\tstccs\t15, cr14, [r0], {238}\t; 0xee\n+\tstccs\t15, cr14, [r0], {240}\t; 0xf0\n \tldmib\tr5, {r3, r4, r5, r6, r7, r8, ip, lr, pc}^\n \tmrscs\tr0, R8_usr\n \t\t\t; instruction: 0xf7fe0092\n-\tstmdavs\tr8!, {r3, r4, r6, r7, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr8!, {r1, r3, r4, r6, r7, r8, r9, sl, fp, sp, lr, pc}\n \ttsteq\tr8, #1073741825\t; 0x40000001\t; \n \tstmdavs\tr9!, {r9, sp}^\n \tstmib\tr5, {r3, r4, r7, r9, lr}^\n \tandle\tr2, r2, r2, lsl #4\n \t\t\t; instruction: 0xf7fe0089\n-\t\t\t; instruction: 0x4628efda\n+\t\t\t; instruction: 0x4628efdc\n \tsvclt\t0x0000bd38\n \tblmi\t1c97db0 \n \tldrblt\tr4, [r0, #1146]!\t; 0x47a\n \taddlt\tr4, r5, r1, ror ip\n \tldrbtmi\tr5, [ip], #-2259\t; 0xfffff72d\n \tmovwls\tr6, #14363\t; 0x381b\n \tmovweq\tpc, #79\t; 0x4f\t; \n@@ -708,127 +708,127 @@\n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\tdf478 \n \t\t\t; instruction: 0xf04f405a\n \ttstle\tip, r0, lsl #6\n \tldcllt\t0, cr11, [r0, #20]!\n \tmovwls\tsl, #11778\t; 0x2e02\n \t\t\t; instruction: 0xf7fe4630\n-\tldrtmi\tlr, [r0], -r4, lsr #29\n-\tstm\tlr, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-\tsvc\t0x002cf7fe\n+\tldrtmi\tlr, [r0], -r6, lsr #29\n+\tldm\tr0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tsvc\t0x002ef7fe\n \tstmdbmi\tr4!, {r0, r1, r5, r6, r8, r9, fp, lr}^\n \tstmiapl\tr3!, {r0, r3, r4, r5, r6, sl, lr}^\n \t\t\t; instruction: 0xf7ff6818\n-\tbmi\t18bf750 \n+\tbmi\t18bf758 \n \tldrbtmi\tr4, [sl], #-2908\t; 0xfffff4a4\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r3, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0xf7ffd034\n-\tblls\tbf6e8 \n+\tblls\tbf6f0 \n \tstrmi\tr4, [pc], -r5, lsl #12\n \t\t\t; instruction: 0x4630b113\n-\tstmda\tr6, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmda\tr8, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0x46281e7b\n \tldmle\tpc, {r0, r3, r8, r9, fp, sp}^\t; \n \t\t\t; instruction: 0xf003e8df\n \tldmdbvs\tr6!, {r0, r1, r3, r7, r8, sl, pc}^\n \tteqcc\tlr, sl, asr sp\n \t\t\t; instruction: 0xf7fe0512\n-\tblmi\t1441098 \n+\tblmi\t14410a0 \n \tstmiapl\tr2!, {r0, fp, sp, lr}^\n \tldmdavs\tr4, {r0, r1, r3, r7, fp, sp, lr}\n \t\t\t; instruction: 0x46014798\n \t\t\t; instruction: 0xf7ff4620\n-\tbfi\tlr, sl, #17, #4\n-\tmrc\t7, 7, APSR_nzcv, cr8, cr14, {7}\n+\tbfi\tlr, ip, #17, #4\n+\tmrc\t7, 7, APSR_nzcv, cr10, cr14, {7}\n \tstmdavs\tr1, {r2, r3, r6, r8, r9, fp, lr}\n \tstmvs\tfp, {r1, r5, r6, r7, fp, ip, lr}\n \t\t\t; instruction: 0x47986814\n \tstrtmi\tr4, [r0], -r1, lsl #12\n-\tstm\tip, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstm\tlr, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tandls\tlr, r1, r7, asr #15\n-\tstmdb\tr2!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tr4!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf7ff9801\n-\tldrb\tlr, [r8, r8, lsr #19]!\n+\tldrb\tlr, [r8, sl, lsr #19]!\n \tpop\t{r0, r2, ip, sp, pc}\n \t\t\t; instruction: 0xf7ff40f0\n-\tandls\tfp, r1, r7, asr r9\n-\tldmdb\tr6, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tandls\tfp, r1, r9, asr r9\n+\tldmdb\tr8, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf7ff9801\n-\t\t\t; instruction: 0xf7fee99c\n-\tblmi\tfc1040 \n+\t\t\t; instruction: 0xf7fee99e\n+\tblmi\tfc1048 \n \tstmiapl\tr2!, {r0, fp, sp, lr}^\n \tldmdavs\tr4, {r0, r1, r3, r7, fp, sp, lr}\n \t\t\t; instruction: 0x46014798\n \t\t\t; instruction: 0xf7ff4620\n-\tstr\tlr, [r8, lr, ror #16]!\n-\tmcr\t7, 6, pc, cr12, cr14, {7}\t; \n+\t\t\t; instruction: 0xe7a8e870\n+\tmcr\t7, 6, pc, cr14, cr14, {7}\t; \n \tstmdavs\tr1, {r3, r4, r5, r8, r9, fp, lr}\n \tstmvs\tfp, {r1, r5, r6, r7, fp, ip, lr}\n \t\t\t; instruction: 0x47986814\n \tstrtmi\tr4, [r0], -r1, lsl #12\n-\tstmda\tr0!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tr2!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tbfi\tlr, fp, #15, #4\n \t\t\t; instruction: 0xf7fee7d1\n-\tblmi\tc41008 \n+\tblmi\tc41010 \n \tstmiapl\tr2!, {r0, fp, sp, lr}^\n \tldmdavs\tr4, {r0, r1, r3, r7, fp, sp, lr}\n \t\t\t; instruction: 0x46014798\n \t\t\t; instruction: 0xf7ff4620\n-\t\t\t; instruction: 0xe78ce852\n-\tmrc\t7, 5, APSR_nzcv, cr0, cr14, {7}\n+\t\t\t; instruction: 0xe78ce854\n+\tmrc\t7, 5, APSR_nzcv, cr2, cr14, {7}\n \tstmdavs\tr1, {r0, r3, r5, r8, r9, fp, lr}\n \tstmvs\tfp, {r1, r5, r6, r7, fp, ip, lr}\n \t\t\t; instruction: 0x47986814\n \tstrtmi\tr4, [r0], -r1, lsl #12\n-\tstmda\tr4, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tr6, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xe7b6e77f\n \t\t\t; instruction: 0xf7fee7b5\n-\tblmi\t8c0fd0 \n+\tblmi\t8c0fd8 \n \tstmiapl\tr2!, {r0, fp, sp, lr}^\n \tldmdavs\tr4, {r0, r1, r3, r7, fp, sp, lr}\n \t\t\t; instruction: 0x46014798\n \t\t\t; instruction: 0xf7ff4620\n-\t\t\t; instruction: 0xe770e836\n-\tmrc\t7, 4, APSR_nzcv, cr4, cr14, {7}\n+\t\t\t; instruction: 0xe770e838\n+\tmrc\t7, 4, APSR_nzcv, cr6, cr14, {7}\n \tstmdavs\tr1, {r0, r2, r3, r4, r8, r9, fp, lr}\n \tstmvs\tfp, {r1, r5, r6, r7, fp, ip, lr}\n \t\t\t; instruction: 0x47986814\n \tstrtmi\tr4, [r0], -r1, lsl #12\n-\tstmda\tr8!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmda\tsl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldr\tlr, [sl, r3, ror #14]\n \t\t\t; instruction: 0xf7fee799\n-\tstmdavs\tr3, {r1, r2, r7, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3, {r3, r7, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0x479868db\n \t\t\t; instruction: 0xf7fee75b\n-\tstrmi\tlr, [r3], -r0, lsl #29\n+\tstrmi\tlr, [r3], -r2, lsl #29\n \tldmib\tr0, {sl, sp}^\n \tstmib\tr3, {r1, r8}^\n \tldmdbvs\tsl, {r1, sl, lr}\n \t\t\t; instruction: 0xf7fe611c\n-\tstrb\tlr, [lr, -r4, ror #28]\n+\tstrb\tlr, [lr, -r6, ror #28]\n \tandls\tlr, r1, r5, lsl #15\n-\tstmia\tr8!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmia\tsl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf7ff9801\n-\tsvclt\t0x0000e92e\n+\tsvclt\t0x0000e930\n \tandeq\tr3, r2, r4, lsl ip\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr3, r2, sl, lsl #24\n \tstrdeq\tr3, [r2], -r8\n \tandeq\tr0, r0, r0, asr #6\n \tandeq\tpc, r0, r8, lsr sp\t; \n \t\t\t; instruction: 0x00023bbe\n \tandeq\tr0, r0, r4, lsl r3\n \tandeq\tr0, r0, r0, lsr #5\n \t\t\t; instruction: 0x000002b0\n \tandeq\tr0, r0, r4, ror #5\n \t\t\t; instruction: 0x4604b570\n \t\t\t; instruction: 0xf7ff460d\n-\tbmi\t2bfa00 \n+\tbmi\t2bfa08 \n \t\t\t; instruction: 0xb120447a\n \tstmdavs\tr6, {r0, r3, r8, fp, lr}^\n \taddmi\tr5, lr, #5308416\t; 0x510000\n \tblmi\t239614 \n \tstrtmi\tr4, [r0], -r9, lsr #12\n \tldrhtmi\tlr, [r0], #-141\t; 0xffffff73\n \tldcvs\t8, cr5, [fp], {211}\t; 0xd3\n@@ -843,166 +843,166 @@\n \tstmdami\tr3, {r0, r1, r3, r7, ip, sp, pc}^\n \tandcs\tr4, r0, #124, 8\t; 0x7c000000\n \tldrmi\tsl, [r1], -r2, lsl #22\n \tstmdapl\tr0!, {r1, r9, ip, pc}\n \tandls\tr6, r9, r0, lsl #16\n \tandeq\tpc, r0, pc, asr #32\n \t\t\t; instruction: 0xf7fe6828\n-\tstcls\t15, cr14, [r2], {54}\t; 0x36\n+\tstcls\t15, cr14, [r2], {56}\t; 0x38\n \tstmdblt\tr4, {r1, r2, r9, sl, lr}^\n-\tstmda\tr4!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tr6!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrtmi\tr6, [r3], -sl, ror #16\n \tstrtmi\tr9, [r1], -r0\n \t\t\t; instruction: 0xf7fe4628\n-\tbmi\te00e8c \n+\tbmi\te00e94 \n \tldrtmi\tsl, [lr], r5, lsl #30\n \tstmdbeq\tr0, {r0, r1, r2, r3, r6, ip, sp, lr, pc}\n \tmovwcs\tr4, #42106\t; 0xa47a\n \tldrtmi\tr4, [ip], ip, asr #12\n \tstrls\tr4, [r3, -r8, asr #13]\n \tstmia\tlr!, {r0, r1, r2, r9, fp, lr, pc}\n \tmovwls\tr0, #16387\t; 0x4003\n \tandcs\tpc, r0, lr, lsr #17\n \tandsls\tpc, lr, sp, lsl #17\n \tstmiblt\tfp!, {r1, sp, lr, pc}\n \tldrdgt\tpc, [ip], -sp\n \tstrbtmi\tr4, [r1], -r2, lsr #12\n \t\t\t; instruction: 0xf7ff4628\n-\t\t\t; instruction: 0x4604e898\n+\t\t\t; instruction: 0x4604e89a\n \tandsle\tr1, r5, r0, ror #24\n \tblls\t11f844 \n \tstmdale\tr9!, {r2, r4, r7, r9, lr}\n \tmvnle\tr1, r9, asr ip\n \trsbvs\tr6, ip, fp, lsr #16\n \tandhi\tpc, r4, r3, lsl #16\n \tstrb\tr9, [r9, r4, lsl #22]!\n \t\t\t; instruction: 0x46211b12\n \t\t\t; instruction: 0x4628429a\n \tldrmi\tfp, [sl], -r8, lsr #30\n-\tldm\tr8!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldm\tsl!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrb\tr9, [pc, r4, lsl #22]\n \tadcsmi\tr9, r8, #196608\t; 0x30000\n \tstmdbls\tr5, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\ttstlt\tr6, r2, ror #28\n+\ttstlt\tr6, r4, ror #28\n \t\t\t; instruction: 0xf7fe4630\n-\tbmi\t640ccc \n+\tbmi\t640cd4 \n \tldrbtmi\tr4, [sl], #-2837\t; 0xfffff4eb\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r9, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tandlt\tsp, fp, sl, lsl #2\n \tmvnshi\tlr, #12386304\t; 0xbd0000\n \t\t\t; instruction: 0x46134912\n \t\t\t; instruction: 0x46224812\n \tldrbtmi\tr4, [r8], #-1145\t; 0xfffffb87\n-\tstmda\tr2, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-\tsvc\t0x004af7fe\n+\tstmda\tr4, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tsvc\t0x004cf7fe\n \tldrtmi\tr4, [r0], -r4, lsl #12\n-\tstcl\t7, cr15, [r0, #-1016]!\t; 0xfffffc08\n+\tstcl\t7, cr15, [r2, #-1016]!\t; 0xfffffc08\n \t\t\t; instruction: 0xf7ff4620\n-\tblls\tff900 \n+\tblls\tff908 \n \tadcsmi\tr4, fp, #4, 12\t; 0x400000\n \tstmdbls\tr5, {r2, ip, lr, pc}\n \ttstcc\tr1, r8, lsl r6\n-\tmrc\t7, 1, APSR_nzcv, cr6, cr14, {7}\n+\tmrc\t7, 1, APSR_nzcv, cr8, cr14, {7}\n \tmvnle\tr2, r0, lsl #28\n \tsvclt\t0x0000e7f0\n \tldrdeq\tr3, [r2], -r8\n \t\t\t; instruction: 0x000002b8\n \tandeq\tpc, r0, r8, lsr #22\n \tandeq\tr3, r2, r2, lsr #18\n \tmuleq\tr0, ip, sl\n \tandeq\tpc, r0, lr, lsr #21\n \tldreq\tr7, [fp, r3, lsl #28]\n \tldrbmi\tsp, [r0, -r0, lsl #10]!\n \t\t\t; instruction: 0xf7fe6880\n-\tsvclt\t0x0000bd73\n+\tsvclt\t0x0000bd75\n \tmvnsmi\tlr, sp, lsr #18\n \taddlt\tr4, lr, r1, asr sl\n \tldrbtmi\tr4, [sl], #-2897\t; 0xfffff4af\n \tldclmi\t14, cr10, [r1, #-36]\t; 0xffffffdc\n \tldrbtmi\tr9, [sp], #-1543\t; 0xfffff9f9\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t; instruction: 0xf04f930d\n \tstmdavs\tr3, {r8, r9}^\n \tsvccs\t0x000068df\n \t\t\t; instruction: 0x4638d077\n \tldmdaeq\tip, {r0, r2, r3, r8, ip, sp, lr, pc}\n-\tsvc\t0x00c6f7fe\n+\tsvc\t0x00c8f7fe\n \tstmdacs\tpc, {r2, r9, sl, lr}\t; \n \tldmdale\tr1, {ip, pc}^\n \tcmple\tsl, r1, lsl #16\n \t\t\t; instruction: 0xf88d783b\n \tldrtmi\tr3, [r3], -r4, lsr #32\n \tstrls\tr2, [r8], #-512\t; 0xfffffe00\n \t\t\t; instruction: 0xf06f551a\n \tbls\t2164a8 \n \tblcs\t60c218 \n \tstmdbmi\tr0, {r0, r3, r4, r6, r8, fp, ip, lr, pc}^\n \t\t\t; instruction: 0x46402219\n \t\t\t; instruction: 0xf7fe4479\n-\t\t\t; instruction: 0x4604eeb0\n+\t\t\t; instruction: 0x4604eeb2\n \tstrls\tsl, [r1, -r3, lsl #30]\n \t\t\t; instruction: 0xf8544684\n \tadcmi\tr3, r3, #8, 22\t; 0x2000\n \tmovwls\tsp, #4163\t; 0x1043\n \tmovwls\tr6, #14467\t; 0x3883\n \tldrdcc\tpc, [r4], -ip\n \tmovwcs\tr9, #770\t; 0x302\n \tandmi\tpc, r0, ip, asr #17\n \t\t\t; instruction: 0xf8cc9807\n \tadcsmi\tr3, r0, #4\n \tandcc\tpc, r8, ip, lsl #17\n \tstmdbls\tr9, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tblmi\tc40f3c \n+\tblmi\tc40f44 \n \tstmiapl\tfp!, {r0, r8, fp, ip, pc}^\n \t\t\t; instruction: 0xf7fe6818\n-\tstmdals\tr1, {r2, r5, r6, r7, r9, sl, fp, sp, lr, pc}\n+\tstmdals\tr1, {r1, r2, r5, r6, r7, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xd00342b8\n \ttstcc\tr1, r3, lsl #18\n-\tstcl\t7, cr15, [r4, #1016]\t; 0x3f8\n+\tstcl\t7, cr15, [r6, #1016]\t; 0x3f8\n \tblmi\t9980b8 \n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\t35f880 \n \t\t\t; instruction: 0xf04f405a\n \t\t\t; instruction: 0xd1240300\n \trscscc\tpc, pc, pc, asr #32\n \tpop\t{r1, r2, r3, ip, sp, pc}\n \t\t\t; instruction: 0x463381f0\n \tadcsle\tr2, r5, r0, lsl #16\n \tand\tr4, r7, r0, lsr r6\n \tstrbtmi\tr2, [r9], -r0, lsl #4\n \t\t\t; instruction: 0xf7fe4640\n-\tblls\t41790 \n+\tblls\t41798 \n \tmovwls\tr9, #36871\t; 0x9007\n \tldrtmi\tr4, [r9], -r2, lsr #12\n-\tsvc\t0x0052f7fe\n+\tsvc\t0x0054f7fe\n \tblls\t1ec850 \n \tldrtmi\tlr, [lr], r4, lsr #15\n \tstmdavs\tr1!, {r7, fp, sp, lr}^\n \tstmiavs\tr3!, {r1, r5, r7, fp, sp, lr}^\n \tandeq\tlr, pc, lr, lsr #17\n \tldmdami\tr6, {r1, r2, r4, r5, r7, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf7fe4478\n-\t\t\t; instruction: 0xf7feed46\n-\tldmdami\tr4, {r3, r4, r7, r9, sl, fp, sp, lr, pc}\n+\t\t\t; instruction: 0xf7feed48\n+\tldmdami\tr4, {r1, r3, r4, r7, r9, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fe4478\n-\tblls\t80f00 \n+\tblls\t80f08 \n \tadcsmi\tr4, fp, #4, 12\t; 0x400000\n \tstmdbls\tr3, {r2, ip, lr, pc}\n \ttstcc\tr1, r8, lsl r6\n-\tstc\t7, cr15, [r6, #1016]\t; 0x3f8\n+\tstc\t7, cr15, [r8, #1016]\t; 0x3f8\n \t\t\t; instruction: 0xf7fe4620\n-\tblls\t201788 \n+\tblls\t201790 \n \tadcsmi\tr4, r3, #4, 12\t; 0x400000\n \tstmdbls\tr9, {r3, r4, r5, r6, r7, ip, lr, pc}\n \ttstcc\tr1, r8, lsl r6\n-\tldcl\t7, cr15, [sl, #-1016]!\t; 0xfffffc08\n+\tldcl\t7, cr15, [ip, #-1016]!\t; 0xfffffc08\n \tsvclt\t0x0000e7f2\n \tmuleq\tr2, lr, r8\n \t\t\t; instruction: 0x000002b8\n \tmuleq\tr2, r6, r8\n \tandeq\tpc, r0, r4, ror sl\t; \n \tandeq\tr0, r0, r0, asr r3\n \tstrdeq\tr3, [r2], -r0\n@@ -1022,224 +1022,224 @@\n \tbmi\t26b8fc \n \tldrbtmi\tr4, [sl], #-2823\t; 0xfffff4f9\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r3, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tandlt\tsp, r5, r2, lsl #2\n \tblx\t143a82 \n-\tmcr\t7, 2, pc, cr6, cr14, {7}\t; \n+\tmcr\t7, 2, pc, cr8, cr14, {7}\t; \n \tandeq\tr3, r2, r0, lsr r7\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr3, r2, sl, lsl #14\n \t\t\t; instruction: 0x460cb530\n \tbmi\tad7dcc \n \tldrbtmi\tfp, [r9], #-137\t; 0xffffff77\n \tldrbtmi\tr4, [fp], #-2858\t; 0xfffff4d6\n \tldmdavs\tr2, {r1, r3, r7, fp, ip, lr}\n \t\t\t; instruction: 0xf04f9207\n \tstmdavs\tr2!, {r9}^\n \taddeq\tr6, r9, r1, asr sp\n \t\t\t; instruction: 0xf7fed51e\n-\tstrmi\tlr, [r5], -r4, lsr #27\n+\tstrmi\tlr, [r5], -r6, lsr #27\n \tstmdavs\tr3!, {fp, sp, lr}\n \teorvs\tr3, r3, r1, lsl #6\n \tstmdavs\tr3, {r3, r5, r8, ip, sp, pc}\n \teorvs\tr2, sl, r0, lsl #4\n \tandvs\tr3, r3, r1, lsl #22\n \tandcs\tfp, r0, fp, ror #2\n \tbmi\t79da10 \n \tldrbtmi\tr4, [sl], #-2843\t; 0xfffff4e5\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r7, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tandlt\tsp, r9, ip, lsl r1\n \t\t\t; instruction: 0xf7febd30\n-\tubfx\tlr, r2, #26, #15\n+\tubfx\tlr, r4, #26, #15\n \tstmdage\tr1, {r0, r1, r2, r4, sl, fp, lr}\n \tldmdbpl\tfp, {r0, r4, r6, r7, fp, sp, lr}\n \t\t\t; instruction: 0xf00b681c\n \tldmdbmi\tr5, {r0, r2, r4, r6, r8, r9, fp, ip, sp, lr, pc}\n \tstrtmi\tr9, [r0], -r1, lsl #20\n \t\t\t; instruction: 0xf7fe4479\n-\tstmdals\tr1, {r3, r4, r5, r6, r7, sl, fp, sp, lr, pc}\n+\tstmdals\tr1, {r1, r3, r4, r5, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #3072\t; 0xc00\n \tstmdbls\tr3, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\t\t\t; instruction: 0xf04fecf8\n+\t\t\t; instruction: 0xf04fecfa\n \t\t\t; instruction: 0xe7d830ff\n-\tldcl\t7, cr15, [r6, #1016]!\t; 0x3f8\n+\tldcl\t7, cr15, [r8, #1016]!\t; 0x3f8\n \tblge\tec1b8 \n \taddsmi\tr4, sl, #4, 12\t; 0x400000\n \tstmdbls\tr3, {r2, ip, lr, pc}\n \ttstcc\tr1, r0, lsl r6\n-\tstcl\t7, cr15, [r8], #1016\t; 0x3f8\n+\tstcl\t7, cr15, [sl], #1016\t; 0x3f8\n \t\t\t; instruction: 0xf7fe4620\n-\tsvclt\t0x0000ef20\n+\tsvclt\t0x0000ef22\n \tldrdeq\tr3, [r2], -sl\n \t\t\t; instruction: 0x000002b8\n \tldrdeq\tr3, [r2], -r6\n \tmuleq\tr2, lr, r6\n \tandeq\tr0, r0, r0, asr r3\n \t\t\t; instruction: 0x0000f8b4\n \t\t\t; instruction: 0x460cb570\n \t\t\t; instruction: 0xf7fe4615\n-\tstmdavs\tr0, {r1, r2, r3, r6, r8, sl, fp, sp, lr, pc}\n+\tstmdavs\tr0, {r4, r6, r8, sl, fp, sp, lr, pc}\n \tstrtmi\tfp, [r9], -r0, lsr #2\n \tpop\t{r0, r1, r5, r9, sl, lr}\n \t\t\t; instruction: 0x47184070\n \tsvclt\t0x0000bd70\n \t\t\t; instruction: 0xf7feb508\n-\tstmdavs\tr3, {r1, r6, r8, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3, {r2, r6, r8, sl, fp, sp, lr, pc}\n \tldmdavs\tsl, {r0, r1, r3, r5, r8, ip, sp, pc}\n \tandvs\tr2, r1, r0, lsl #2\n \tandsvs\tr3, sl, r1, lsl #20\n \tandcs\tfp, r0, sl, lsl #2\n \tldrmi\tfp, [r8], -r8, lsl #26\n-\tldcl\t7, cr15, [lr], #1016\t; 0x3f8\n+\tstc\t7, cr15, [r0, #-1016]\t; 0xfffffc08\n \tstclt\t0, cr2, [r8, #-0]\n \t\t\t; instruction: 0xf7feb510\n-\t\t\t; instruction: 0x4604ed30\n+\t\t\t; instruction: 0x4604ed32\n \ttstlt\tr8, r0, lsl #16\n \tmovwcc\tr6, #6147\t; 0x1803\n \tldclt\t0, cr6, [r0, #-12]\n-\tldc\t7, cr15, [r6, #1016]!\t; 0x3f8\n+\tldc\t7, cr15, [r8, #1016]!\t; 0x3f8\n \tstmdacs\tr0, {r5, sp, lr}\n \tldfltd\tf5, [r0, #-984]\t; 0xfffffc28\n \tbvs\tfe332e88 \n \tstfvsp\tf3, [r0], #-1008\t; 0xfffffc10\n \t\t\t; instruction: 0xf894b110\n \tldmiblt\tfp, {r3, r6, ip, sp}^\n \ttstlt\tr8, r0, ror #22\n \tbne\t2609e0 \n-\tldc\t7, cr15, [sl], {254}\t; 0xfe\n+\tldc\t7, cr15, [ip], {254}\t; 0xfe\n \ttstlt\tr8, r0, lsr #21\n \tbne\t2606ec \n-\tldc\t7, cr15, [r4], {254}\t; 0xfe\n+\tldc\t7, cr15, [r6], {254}\t; 0xfe\n \t\t\t; instruction: 0xf10468e0\n \taddsmi\tr0, r8, #20, 6\t; 0x50000000\n \tstmdbvs\tr1!, {r0, r1, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fe3101\n-\tstrtmi\tlr, [r0], -ip, lsl #25\n+\tstrtmi\tlr, [r0], -lr, lsl #25\n \tpop\t{r2, r3, r6, r8, sp}\n \t\t\t; instruction: 0xf7fe4010\n-\tldclt\t12, cr11, [r0, #-524]\t; 0xfffffdf4\n-\tstcl\t7, cr15, [lr], #-1016\t; 0xfffffc08\n+\tldclt\t12, cr11, [r0, #-532]\t; 0xfffffdec\n+\tldcl\t7, cr15, [r0], #-1016\t; 0xfffffc08\n \tstmdacs\tr0, {r5, r6, sl, fp, sp, lr}\n \tldrdcs\tsp, [ip, -lr]!\n-\tldcl\t7, cr15, [ip], #-1016\t; 0xfffffc08\n+\tldcl\t7, cr15, [lr], #-1016\t; 0xfffffc08\n \tsvclt\t0x0000e7da\n \tmvnsmi\tlr, #737280\t; 0xb4000\n \tblmi\tfd72c0 \n \tldmdavs\tsl, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvchi\t0x005bf3bf\n \tldrble\tr0, [sl, #-2002]\t; 0xfffff82e\n \tsubsle\tr2, r6, r0, lsl #28\n \tldrdhi\tpc, [ip], #143\t; 0x8f\t; \n \tbvs\tfecd6ea0 \n \ttstlt\tfp, r7, ror ip\n \t\t\t; instruction: 0x47984630\n \t\t\t; instruction: 0xf7fe6830\n-\tldmdavs\tr0!, {r1, r7, r8, r9, fp, sp, lr, pc}^\n-\tbl\t1fc3acc \n+\tldmdavs\tr0!, {r2, r7, r8, r9, fp, sp, lr, pc}^\n+\tbl\tfe043acc \n \t\t\t; instruction: 0xf7fe68b0\n-\tldmib\tr6, {r2, r3, r4, r5, r6, r8, r9, fp, sp, lr, pc}^\n+\tldmib\tr6, {r1, r2, r3, r4, r5, r6, r8, r9, fp, sp, lr, pc}^\n \tstrbmi\tr4, [ip, #-2307]\t; 0xfffff6fd\n \tldrcc\tsp, [r0], #-33\t; 0xffffffdf\n \tldceq\t8, cr15, [r0], {84}\t; 0x54\n-\tbl\t1cc3ae4 \n+\tbl\t1d43ae4 \n \tstceq\t8, cr15, [ip], {84}\t; 0x54\n-\tbl\t1bc3aec \n+\tbl\t1c43aec \n \t\t\t; instruction: 0xf10445a1\n \tmvnsle\tr0, r0, lsl r4\n \tstrmi\tlr, [r3, #-2518]\t; 0xfffff62a\n \tsmlatble\tr3, ip, r2, r4\n \tldrcc\tlr, [r0], #-15\n \tandle\tr4, ip, r5, lsr #5\n \tstmdacs\tr0, {r5, r7, fp, sp, lr}\n \tstmdavs\tr3, {r0, r3, r4, r5, r6, r7, ip, lr, pc}\n \tandvs\tr3, r3, r1, lsl #22\n \tmvnsle\tr2, r0, lsl #22\n \t\t\t; instruction: 0xf7fe3410\n-\tadcmi\tlr, r5, #32256\t; 0x7e00\n+\tadcmi\tlr, r5, #128, 24\t; 0x8000\n \tblvs\tfecfa2f0 \n \tldmvs\tr8, {r0, r1, r4, r6, r8, ip, sp, pc}^\n-\tbl\t1443b28 \n+\tbl\t14c3b28 \n \tmulcc\tr4, r8, r8\n \tblvs\tfec33fc4 \n \ttstcs\tr0, r0, lsl r1\n-\tstc\t7, cr15, [sl], #-1016\t; 0xfffffc08\n+\tstc\t7, cr15, [ip], #-1016\t; 0xfffffc08\n \tldrshlt\tr6, [r0, #-128]\t; 0xffffff80\n \tbne\t26010c \n-\tstc\t7, cr15, [r4], #-1016\t; 0xfffffc08\n+\tstc\t7, cr15, [r6], #-1016\t; 0xfffffc08\n \tldrtmi\tr2, [r0], -r8, asr #2\n-\tstc\t7, cr15, [r0], #-1016\t; 0xfffffc08\n+\tstc\t7, cr15, [r2], #-1016\t; 0xfffffc08\n \t\t\t; instruction: 0x463eb13f\n \tstrhcs\tlr, [r8, #-113]\t; 0xffffff8f\n \t\t\t; instruction: 0xf7fe4630\n-\tsvccs\t0x0000ec1a\n+\tsvccs\t0x0000ec1c\n \tpop\t{r0, r1, r2, r4, r5, r6, r7, r8, ip, lr, pc}\n \t\t\t; instruction: 0x461883f8\n-\tmrc\t7, 2, APSR_nzcv, cr8, cr14, {7}\n+\tmrc\t7, 2, APSR_nzcv, cr10, cr14, {7}\n \taddsle\tr2, pc, r0, lsl #16\n-\tstc\t7, cr15, [r0], #1016\t; 0x3f8\n+\tstc\t7, cr15, [r2], #1016\t; 0x3f8\n \tstmdami\tip, {r0, r1, r9, sl, lr}\n \tldmdbvc\tfp, {r3, r4, r5, r6, sl, lr}\n \tteqeq\tr0, #-1073741784\t; 0xc0000028\t; \n \t\t\t; instruction: 0xf383fab3\n \ttstvc\tr3, fp, asr r9\n-\tbl\tff8c3b88 \n+\tbl\tff943b88 \n \t\t\t; instruction: 0x4604e790\n \tldrbtmi\tr4, [r8], #-2054\t; 0xfffff7fa\n-\tbl\tff5c3b94 \n+\tbl\tff643b94 \n \t\t\t; instruction: 0xf7fe4620\n-\tsvclt\t0x0000ee34\n+\tsvclt\t0x0000ee36\n \tandeq\tr3, r2, ip, lsr r9\n \tandeq\tr3, r2, r8, lsr #18\n \tandeq\tr3, r2, r8, ror #16\n \tandeq\tr3, r2, lr, asr #16\n \tcfstr32mi\tmvfx11, [sp], {56}\t; 0x38\n \t\t\t; instruction: 0xf7fe447c\n-\tstmdblt\tr0, {r6, r8, sl, fp, sp, lr, pc}\n+\tstmdblt\tr0, {r1, r6, r8, sl, fp, sp, lr, pc}\n \tandscs\tfp, r4, r8, lsr sp\n-\tbl\t1fc3bc0 \n+\tbl\tfe043bc0 \n \t\t\t; instruction: 0xf7fe4605\n \tblmi\t245b64 \n \tbmi\t217474 \n \tstmiapl\tr1!, {r1, r3, r4, r5, r6, sl, lr}^\n-\tldcl\t7, cr15, [lr, #1016]!\t; 0x3f8\n+\tmcr\t7, 0, pc, cr0, cr14, {7}\t; \n \tstrtmi\tr4, [r8], -r4, lsl #12\n-\tbl\tfff43bdc \n+\tbl\tfffc3bdc \n \t\t\t; instruction: 0xf7fe4620\n-\tsvclt\t0x0000ee10\n+\tsvclt\t0x0000ee12\n \tandeq\tr3, r2, r8, asr #8\n \tandeq\tr0, r0, r4, lsr #5\n \t\t\t; instruction: 0x000049b5\n \tblmi\t12d8524 \n \tldrbtmi\tfp, [sl], #-1520\t; 0xfffffa10\n \taddlt\tr6, r7, lr, lsl #16\n \tldmpl\tr3, {r0, r3, r6, r8, r9, sl, fp, lr}^\n-\tldrbtmi\tr4, [pc], #-1540\t; 5c0c \n+\tldrbtmi\tr4, [pc], #-1540\t; 5c0c \n \tldmdavs\tfp, {r0, r2, r4, r5, r9, sl, lr}\n \t\t\t; instruction: 0xf04f9305\n \tstrls\tr0, [r3], -r0, lsl #6\n \tldmdavs\tr3!, {r1, r2, r4, r8, ip, sp, pc}\n \teorsvs\tr3, r3, r1, lsl #6\n \tstmdavs\tr3, {r3, fp, sp, lr}^\n \tsbcseq\tr6, fp, fp, asr sp\n \t\t\t; instruction: 0xf7fed50b\n-\t\t\t; instruction: 0x4605ee54\n+\t\t\t; instruction: 0x4605ee56\n \t\t\t; instruction: 0xb1269003\n \tblcc\t5fd04 \n \tblcs\t1dd08 \n \tstccs\t0, cr13, [r0, #-300]\t; 0xfffffed4\n \tbge\t79d90 \n \tstrtmi\tsl, [r8], -r2, lsl #18\n \tstmib\tsp, {r8, r9, sp}^\n \t\t\t; instruction: 0xf7fe3301\n-\tstmdacs\tr0, {r1, r2, r3, r6, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r4, r6, r9, sl, fp, sp, lr, pc}\n \tldmib\tsp, {r3, r4, r6, r8, ip, lr, pc}^\n \t\t\t; instruction: 0xf1046701\n \teorvs\tr0, r0, r8\n \tblx\tfedd6630 \n \taddsmi\tpc, pc, #1879048200\t; 0x70000008\n \tsubsne\tlr, r2, #323584\t; 0x4f000\n \tandcs\tfp, r0, #8, 30\n@@ -1257,41 +1257,41 @@\n \tsubsmi\tr9, sl, r5, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0x4620d11b\n \tldcllt\t0, cr11, [r0, #28]!\n \trscle\tr2, r8, r0, lsl #28\n \tstmdbge\tr4, {r1, r2, sp, lr, pc}\n \t\t\t; instruction: 0xf7fe4620\n-\tblls\t141314 \n+\tblls\t14131c \n \tadcvs\tr6, r3, r0, lsr #32\n \t\t\t; instruction: 0x46394632\n-\tldc\t7, cr15, [r4, #-1016]\t; 0xfffffc08\n+\tldc\t7, cr15, [r6, #-1016]\t; 0xfffffc08\n \tstmdavs\tr0!, {r2, r9, sl, fp, ip, pc}\n \t\t\t; instruction: 0x4628e7d9\n-\tbl\tfe943ccc \n+\tbl\tfe9c3ccc \n \t\t\t; instruction: 0x4630e7dd\n-\tbl\tfe843cd4 \n+\tbl\tfe8c3cd4 \n \t\t\t; instruction: 0xf7fee7af\n-\tldmdami\tr4, {r1, r2, r3, r4, r6, sl, fp, sp, lr, pc}\n+\tldmdami\tr4, {r5, r6, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fe4478\n-\tandscs\tlr, r4, r8, ror #22\n-\tb\tffac3ce8 \n+\tandscs\tlr, r4, sl, ror #22\n+\tb\tffb43ce8 \n \t\t\t; instruction: 0xf7fe4605\n \tblmi\t445a3c \n \tbmi\t41759c \n \tldmpl\tr9!, {r1, r3, r4, r5, r6, sl, lr}^\n-\tstcl\t7, cr15, [sl, #-1016]!\t; 0xfffffc08\n+\tstcl\t7, cr15, [ip, #-1016]!\t; 0xfffffc08\n \tand\tr4, r7, r4, lsl #12\n \tldrbtmi\tr4, [r8], #-2061\t; 0xfffff7f3\n \tmcr2\t7, 0, pc, cr2, cr14, {7}\t; \n \tstrtmi\tr4, [r8], -r4, lsl #12\n-\tbl\t18c3d10 \n+\tbl\t1943d10 \n \t\t\t; instruction: 0xf00aa803\n \t\t\t; instruction: 0x4620fed7\n-\tldcl\t7, cr15, [r2, #-1016]!\t; 0xfffffc08\n+\tldcl\t7, cr15, [r4, #-1016]!\t; 0xfffffc08\n \tandeq\tr3, r2, r2, lsl #8\n \t\t\t; instruction: 0x000002b8\n \tstrdeq\tr3, [r2], -r6\n \tandeq\tr3, r2, sl, ror #6\n \tandeq\tpc, r0, r0, lsl #10\n \tandeq\tr0, r0, r4, lsr #5\n \tandeq\tr4, r0, sp, lsl #17\n@@ -1302,97 +1302,97 @@\n \t\t\t; instruction: 0xf8df4ff0\n \tstc\t7, cr4, [sp, #-320]!\t; 0xfffffec0\n \tsbcslt\tr8, r1, r4, lsl #22\n \tmcr\t8, 0, r5, cr9, cr3, {6}\n \tldrbtmi\tr0, [ip], #-2576\t; 0xfffff5f0\n \tmovtls\tr6, #63515\t; 0xf81b\n \tmovweq\tpc, #79\t; 0x4f\t; \n-\tldcl\t7, cr15, [r6], #1016\t; 0x3f8\n+\tldcl\t7, cr15, [r8], #1016\t; 0x3f8\n \t\t\t; instruction: 0xf0002800\n \tblge\t3268b4 \n \tldrmi\tsl, [pc], -lr, lsl #28\n \tldrtmi\tsl, [r2], -sp, lsl #26\n \tldrmi\tr4, [r8], -r9, lsr #12\n \t\t\t; instruction: 0xf7fe9308\n-\tldmdavs\tsl!, {r2, r8, sl, fp, sp, lr, pc}\n+\tldmdavs\tsl!, {r1, r2, r8, sl, fp, sp, lr, pc}\n \tldmdbge\tr5, {r8, r9, sp}\n \t\t\t; instruction: 0xf88d9314\n \tqaddls\tr3, r4, r9\n \tteqlt\tr2, #-1073741820\t; 0xc0000004\n \ttstls\tr2, #983040\t; 0xf0000\n \t\t\t; instruction: 0x3704f8df\n \tldrbtmi\tr6, [fp], #-66\t; 0xffffffbe\n \t\t\t; instruction: 0xf00a6083\n \t\t\t; instruction: 0x4601f8b5\n \t\t\t; instruction: 0xf00aa849\n \tblge\t5048d4 \n \tbcc\t4415dc \n \tsubne\tlr, r9, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf7fe4618\n-\tstmdals\tr9, {r1, r3, r5, r7, r8, r9, fp, sp, lr, pc}^\n+\tstmdals\tr9, {r2, r3, r5, r7, r8, r9, fp, sp, lr, pc}^\n \taddsmi\tsl, r8, #76800\t; 0x12c00\n \tstmdbls\tfp, {r0, r1, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fe3101\n-\tldmdage\tr2, {r5, r6, r7, r9, fp, sp, lr, pc}\n+\tldmdage\tr2, {r1, r5, r6, r7, r9, fp, sp, lr, pc}\n \tcdp2\t0, 7, cr15, cr8, cr10, {0}\n \t\t\t; instruction: 0x16ccf8df\n \tbeq\t441644 \n \t\t\t; instruction: 0xf7fe4479\n-\tblls\t241364 \n+\tblls\t24136c \n \tbicslt\tr6, r0, r8, asr r8\n-\tb\t43dec \n+\tb\tc3dec \n \teorsvs\tsl, r8, pc, lsl #30\n \t\t\t; instruction: 0xf0002800\n \t\t\t; instruction: 0x4639831f\n \t\t\t; instruction: 0xf7ffa849\n \tldmib\tsp, {r0, r3, r4, r5, r6, r7, r9, sl, fp, ip, sp, lr, pc}^\n \tldmdage\tr3, {r0, r3, r6, r9, ip}\n-\tbl\tfe143e08 \n+\tbl\tfe1c3e08 \n \tblge\t12ebf38 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, asr #18\n-\tb\tfeec3e18 \n+\tb\tfef43e18 \n \t\t\t; instruction: 0xf00a4638\n \tstcls\t14, cr15, [r8], {83}\t; 0x53\n \t\t\t; instruction: 0x46294632\n \t\t\t; instruction: 0xf7fe4620\n-\tstmiavs\tr1!, {r1, r2, r3, r4, r5, r7, r8, fp, sp, lr, pc}\n+\tstmiavs\tr1!, {r6, r7, r8, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf0002900\n \tstflsd\tf0, [r8], {223}\t; 0xdf\n \t\t\t; instruction: 0xf7fe6860\n-\tstmiavs\tr3!, {r1, r2, r3, r6, r9, fp, sp, lr, pc}\n+\tstmiavs\tr3!, {r4, r6, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf0002b00\n \t\t\t; instruction: 0x461a81d7\n \tblcs\t200bc \n \t\t\t; instruction: 0xf8dfd1fb\n \tldmdage\tr3, {r2, r3, r4, r6, r9, sl, ip}\n \tmcr\t8, 0, r6, cr8, cr7, {6}\n \tldrbtmi\tr0, [r9], #-2576\t; 0xfffff5f0\n-\tstc\t7, cr15, [r0, #-1016]!\t; 0xfffffc08\n+\tstc\t7, cr15, [r2, #-1016]!\t; 0xfffffc08\n \t\t\t; instruction: 0xf0002f00\n \tvrhadd.s8\tq12, q10, q5\n \tvbic.i16\td18, #15\t; 0x000f\n \tvmla.i8\td16, d14, d15\n \t\t\t; instruction: 0xf2c00aff\n \tvpmin.s8\t, q12, \n \tvmov.i16\td21, #95\t; 0x005f\n \tvadd.i8\t, , \n \tvrsra.s8\t, , #3\n \tmovwls\tr1, #9143\t; 0x23b7\n \t\t\t; instruction: 0xf7fe4638\n-\tldmdbvs\tfp!, {r5, r8, r9, fp, sp, lr, pc}\n+\tldmdbvs\tfp!, {r1, r5, r8, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xad3da90b\n \tstrtmi\tr4, [r8], -r4, lsl #12\n \tandvs\tr6, fp, fp, lsl ip\n \tblx\t1441ecc \n \tmovwls\tr2, #770\t; 0x302\n \t\t\t; instruction: 0x3608f8df\n \tstrtmi\tr2, [r8], -r0, lsl #4\n \tldrbtmi\tr4, [fp], #-1553\t; 0xfffff9ef\n-\tldmib\tip, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmib\tlr, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblge\te578cc \n \t\t\t; instruction: 0x46059337\n \t\t\t; instruction: 0xf85c9306\n \tstrbmi\tr3, [r3, #-2824]!\t; 0xfffff4f8\n \tandhi\tpc, r8, #0\n \tstmvs\tr3, {r0, r1, r2, r4, r5, r8, r9, ip, pc}\n \tstmdavs\tfp!, {r0, r3, r4, r5, r8, r9, ip, pc}^\n@@ -1401,15 +1401,15 @@\n \t\t\t; instruction: 0xf06f722b\n \taddsmi\tr4, sl, #64, 6\n \tandgt\tpc, r0, r5, asr #17\n \teorhi\tpc, sl, #0\n \tstrbne\tpc, [r8, #2271]\t; 0x8df\t; \n \tldmdage\tr7!, {r0, r9, sp}\n \t\t\t; instruction: 0xf7fe4479\n-\tpkhbtmi\tlr, r4, r0, lsl #22\n+\tpkhbtmi\tlr, r4, r2, lsl #22\n \tteqls\tr1, #52224\t; 0xcc00\n \tmovwls\tr4, #17925\t; 0x4605\n \tblcc\t244078 \n \t\t\t; instruction: 0xf0004563\n \tteqls\tr1, #-1073741775\t; 0xc0000031\n \tteqls\tr3, #8585216\t; 0x830000\n \tteqls\tr2, #7012352\t; 0x6b0000\n@@ -1443,15 +1443,15 @@\n \tstrls\tsp, [r2], -ip, ror #17\n \tblge\t10ed798 \n \teorcs\tr4, sp, #24, 12\t; 0x1800000\n \tmcr\t6, 0, r4, cr8, cr1, {1}\n \tstrtmi\tr3, [r9], #-2704\t; 0xfffff570\n \tmovwls\tsl, #23365\t; 0x5b45\n \t\t\t; instruction: 0xf7fe9343\n-\t\t\t; instruction: 0xf8ddeace\n+\t\t\t; instruction: 0xf8ddead0\n \tstfcsp\tf6, [r3], #-48\t; 0xffffffd0\n \tmovweq\tlr, #27406\t; 0x6b0e\n \tldmdble\tr8, {r0, r1, r2, r8, r9, ip, pc}\n \tstrlt\tpc, [r8, #-2271]\t; 0xfffff721\n \tcdpls\t13, 0, cr3, cr2, cr2, {0}\n \tldrbtmi\tr4, [fp], #1053\t; 0x41d\n \tstcleq\t0, cr15, [r4], #-316\t; 0xfffffec4\n@@ -1471,24 +1471,24 @@\n \t\t\t; instruction: 0xf8130244\n \tldmdavc\tr3, {r2, r4, lr}^\n \tsubsvc\tr9, r3, r7, lsl #20\n \tstmdbls\tr4, {r0, r1, r8, r9, fp, ip, pc}\n \tandmi\tpc, r3, lr, lsl #16\n \t\t\t; instruction: 0x9c329b31\n \tbls\t1116a3c \n-\tstrcs\tfp, [pc, #-3848]\t; 510c \n+\tstrcs\tfp, [pc, #-3848]\t; 510c \n \tbl\t12c524 \n \tsvclt\t0x00180002\n \tadcmi\tr9, r8, #3264\t; 0xcc0\n \tvstrls.16\ts26, [r5, #-14]\t; \n \tsvclt\t0x000c42a9\n \tcfstr64ls\tmvdx2, [r5, #-60]\t; 0xffffffc4\n \tvhsub.s8\td20, d16, d24\n \tldmdage\tr1!, {r0, r5, r8, pc}\n-\tb\t1c44030 \n+\tb\t1cc4030 \n \t\t\t; instruction: 0xf10d4605\n \t\t\t; instruction: 0xf8cd0bb4\n \tstrmi\tfp, [r4], -ip, lsr #1\n \tblcc\t24419c \n \t\t\t; instruction: 0xf00042ab\n \t\t\t; instruction: 0x932b8153\n \t\t\t; instruction: 0x932d6883\n@@ -1497,15 +1497,15 @@\n \teorvc\tr6, r3, #99\t; 0x63\n \t\t\t; instruction: 0xf06f9a2c\n \tbne\tfe6d6d68 \n \tvqdmulh.s\td18, d0, d2\n \t\t\t; instruction: 0xf8df8173\n \tandcs\tr1, r3, #84, 8\t; 0x54000000\n \tldrbtmi\tsl, [r9], #-2091\t; 0xfffff7d5\n-\tb\t13c4074 \n+\tb\t1444074 \n \tblge\t9d7894 \n \tstrmi\tr9, [r4], -r5, lsr #6\n \t\t\t; instruction: 0xf8559303\n \tadcmi\tr3, fp, #8, 22\t; 0x2000\n \ttsthi\tr2, r0\t; \n \tstmvs\tr3, {r0, r2, r5, r8, r9, ip, pc}\n \tstmdavs\tr2!, {r0, r1, r2, r5, r8, r9, ip, pc}^\n@@ -1527,15 +1527,15 @@\n \tstmdble\tsl, {r0, r1, r2, r8, r9, ip, pc}\n \tstrls\tsl, [r7], -fp, asr #28\n \tsvclt\t0x000c42b1\n \tstceq\t0, cr15, [pc], {79}\t; 0x4f\n \tldrdgt\tpc, [ip, -sp]!\n \tvrshl.s8\tq10, q8, q0\n \tstmdage\tr5!, {r1, r2, r4, r5, r7, pc}\n-\tb\t4c40ec \n+\tb\t5440ec \n \tblge\t85790c \n \t\t\t; instruction: 0x461e931f\n \t\t\t; instruction: 0xf8554604\n \tadcmi\tr3, fp, #8, 22\t; 0x2000\n \trscshi\tpc, lr, r0\n \tstmvs\tr3, {r0, r1, r2, r3, r4, r8, r9, ip, pc}\n \tstmdavs\tr3!, {r0, r5, r8, r9, ip, pc}^\n@@ -1543,76 +1543,76 @@\n \trsbvs\tr6, r3, r5, lsr #32\n \tbls\t8229a8 \n \tmovtmi\tpc, #111\t; 0x6f\t; \n \t\t\t; instruction: 0xf000429a\n \tstmibmi\tr8!, {r0, r4, r8, pc}^\n \tldmdage\tpc, {r0, r9, sp}\t; \n \t\t\t; instruction: 0xf7fe4479\n-\t\t\t; instruction: 0x4684e9f4\n+\t\t\t; instruction: 0x4684e9f6\n \tldrls\tsl, [r9, #-3355]\t; 0xfffff2e5\n \t\t\t; instruction: 0xf85c4604\n \tstrbmi\tr3, [r3, #-2824]!\t; 0xfffff4f8\n \tsbchi\tpc, r1, r0\n \tstmvs\tr3, {r0, r3, r4, r8, r9, ip, pc}\n \tstmdavs\tr3!, {r0, r1, r3, r4, r8, r9, ip, pc}^\n \tbeq\t4419b0 \n \tmovwcs\tr9, #794\t; 0x31a\n \tandgt\tpc, r0, r4, asr #17\n \teorvc\tr6, r3, #99\t; 0x63\n \tandsne\tlr, r9, #3620864\t; 0x374000\n-\tldmib\tsl, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmib\tip, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tadcmi\tr9, r8, #1638400\t; 0x190000\n \tldmdbls\tfp, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tldmdals\tpc, {r1, r4, r8, fp, sp, lr, pc}\t; \n+\tldmdals\tpc, {r2, r4, r8, fp, sp, lr, pc}\t; \n \t\t\t; instruction: 0xd00342b0\n \ttstcc\tr1, r1, lsr #18\n-\tstmdb\tsl, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmdb\tip, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblls\t1ec2a8 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, asr #18\n-\tstmdb\tr2, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmdb\tr4, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblls\tec228 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r7, lsr #18\n-\tldm\tsl!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldm\tip!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrbmi\tr9, [r8, #-2091]\t; 0xfffff7d5\n \tpushls\t{r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tstmdals\tr3, {r2, r4, r5, r6, r7, fp, sp, lr, pc}^\n+\tstmdals\tr3, {r1, r2, r4, r5, r6, r7, fp, sp, lr, pc}^\n \taddsmi\tr9, r8, #5120\t; 0x1400\n \tstmdbls\tr5, {r0, r1, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fe3101\n-\tldmdals\tr1!, {r2, r3, r5, r6, r7, fp, sp, lr, pc}\n+\tldmdals\tr1!, {r1, r2, r3, r5, r6, r7, fp, sp, lr, pc}\n \taddsmi\tr9, r8, #4, 22\t; 0x1000\n \tldmdbls\tr3!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tldmdals\tr7!, {r2, r5, r6, r7, fp, sp, lr, pc}\n+\tldmdals\tr7!, {r1, r2, r5, r6, r7, fp, sp, lr, pc}\n \taddsmi\tr9, r8, #6144\t; 0x1800\n \tldmdbls\tr9!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tldmdals\tsp!, {r2, r3, r4, r6, r7, fp, sp, lr, pc}\n+\tldmdals\tsp!, {r1, r2, r3, r4, r6, r7, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #64512\t; 0xfc00\n \tldmdbls\tpc!, {r0, r4, r5, ip, lr, pc}\t; \n \t\t\t; instruction: 0xf7fe3101\n-\tldmvs\tpc!, {r2, r4, r6, r7, fp, sp, lr, pc}^\t; \n+\tldmvs\tpc!, {r1, r2, r4, r6, r7, fp, sp, lr, pc}^\t; \n \t\t\t; instruction: 0xf47f2f00\n \tand\tsl, r2, fp, asr #28\n \tvmov.32\td8[0], sl\n \tvmov\tr3, s18\n \tvmov\tr0, s16\n \t\t\t; instruction: 0xf00c1a10\n \tldmdals\tr3, {r0, r1, r3, r4, r5, r6, r7, sl, fp, ip, sp, lr, pc}\n \taddsmi\tr9, r8, #9216\t; 0x2400\n \tldmdbls\tr5, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tblls\t240514 \n+\tblls\t24051c \n \tandne\tlr, r1, #3457024\t; 0x34c000\n \t\t\t; instruction: 0xf7fe6818\n-\tbmi\tfea802a8 \n+\tbmi\tfea802b0 \n \tldrbtmi\tr4, [sl], #-2973\t; 0xfffff463\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, pc, asr #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \taddhi\tpc, sl, r0, asr #32\n \tbeq\t441aa4 \n \tldc\t0, cr11, [sp], #324\t; 0x144\n@@ -1620,22 +1620,22 @@\n \tldmvs\tpc!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}^\t; \n \t\t\t; instruction: 0xf47f2f00\n \tbfi\tsl, sp, (invalid: 28:20)\n \tstrls\tr1, [r2], -sp, asr #26\n \tandcs\tlr, r0, #157286400\t; 0x9600000\n \tldrmi\tr4, [r1], -r0, lsr #12\n \t\t\t; instruction: 0xf7fe9500\n-\tstrmi\tlr, [r1], -r6, lsl #16\n+\tstrmi\tlr, [r1], -r8, lsl #16\n \t\t\t; instruction: 0xf00ca81f\n \tblge\t885594 \n \tsmmla\tr2, lr, r6, r4\n \tcdp\t2, 1, cr2, cr8, cr0, {0}\n \t\t\t; instruction: 0x46110a90\n \t\t\t; instruction: 0xf7fd9400\n-\t\t\t; instruction: 0x4601eff8\n+\t\t\t; instruction: 0x4601effa\n \t\t\t; instruction: 0xf10da82b\n \t\t\t; instruction: 0xf00c0bb4\n \t\t\t; instruction: 0xe6e7fcb9\n \tstrls\tr1, [r2], -sp, lsl #27\n \tstclne\t6, cr14, [sp, #480]\t; 0x1e0\n \tldrbt\tr9, [r5], -r2, lsl #12\n \t\t\t; instruction: 0xe010f8dd\n@@ -1667,109 +1667,109 @@\n \tstmvs\tr0, {r2, r4, r5, r7, r9, sl, lr}\n \tstmiavs\tsl!, {r0, r3, r5, r6, fp, sp, lr}\n \tstmia\tip!, {r0, r1, r3, r5, r6, r7, fp, sp, lr}\n \tldrbt\tr0, [ip], pc\n \tstmdbmi\tpc!, {r1, r2, r3, r5, r6, r8, r9, fp, lr}^\t; \n \ttstls\tr2, r9, ror r4\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n-\tldmdb\tr0, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmdb\tr2, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tvnmls.f16\ts18, s18, s4\n \t\t\t; instruction: 0xf00a0a10\n \tldrb\tpc, [sl, -r3, lsl #29]!\t; \n \tstrt\tr2, [r9], -r1, lsl #10\n \tstrt\tr2, [r7], -r2, lsl #10\n \tstrt\tr2, [r5], -r3, lsl #10\n \tstrt\tr2, [r3], -r4, lsl #10\n \tldrbtmi\tr4, [r8], #-2149\t; 0xfffff79b\n-\tsvc\t0x00d6f7fd\n+\tsvc\t0x00d8f7fd\n \tldrbtmi\tr4, [r8], #-2148\t; 0xfffff79c\n-\tsvc\t0x00d2f7fd\n-\tstmdb\tr4!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tsvc\t0x00d4f7fd\n+\tstmdb\tr6!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldrbtmi\tr4, [r8], #-2146\t; 0xfffff79e\n-\tsvc\t0x00ccf7fd\n+\tsvc\t0x00cef7fd\n \tstmdals\tr9, {r2, r9, sl, lr}^\n \taddsmi\tr9, r8, #7168\t; 0x1c00\n \tstmdbls\tfp, {r0, r1, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fe3101\n-\tstmdals\tr5!, {r2, r4, fp, sp, lr, pc}\n+\tstmdals\tr5!, {r1, r2, r4, fp, sp, lr, pc}\n \taddsmi\tr9, r8, #3072\t; 0xc00\n \tstmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fe3101\n-\tstmdals\tfp!, {r2, r3, fp, sp, lr, pc}\n+\tstmdals\tfp!, {r1, r2, r3, fp, sp, lr, pc}\n \tandle\tr4, r3, r8, asr r5\n \ttstcc\tr1, sp, lsr #18\n-\tstmda\tr4, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmda\tr6, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblls\t16c49c \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r5, asr #18\n-\tsvc\t0x00fcf7fd\n+\tsvc\t0x00fef7fd\n \tblls\t12c464 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r3, lsr r9\n-\tsvc\t0x00f4f7fd\n+\tsvc\t0x00f6f7fd\n \tblls\t1ac48c \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r9, lsr r9\n-\tsvc\t0x00ecf7fd\n+\tsvc\t0x00eef7fd\n \tblge\tfec4b4 \n \tmulsle\tr5, r8, r2\n \ttstcc\tr1, pc, lsr r9\n-\tsvc\t0x00e4f7fd\n+\tsvc\t0x00e6f7fd\n \t\t\t; instruction: 0x4604e010\n \tblge\t12ec4f8 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, asr #18\n-\tsvc\t0x00daf7fd\n+\tsvc\t0x00dcf7fd\n \t\t\t; instruction: 0xf00a4638\n \tand\tpc, r3, r3, ror fp\t; \n \tldmdage\tr2, {r2, r9, sl, lr}\n \tblx\t1bc241a \n \tblls\t26c440 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r5, lsl r9\n-\tsvc\t0x00caf7fd\n+\tsvc\t0x00ccf7fd\n \tldmdavs\tr8, {r3, r8, r9, fp, ip, pc}\n \tandne\tlr, r1, #3457024\t; 0x34c000\n-\tsvc\t0x002cf7fd\n+\tsvc\t0x002ef7fd\n \t\t\t; instruction: 0xf7fe4620\n-\tblls\t1280c04 \n+\tblls\t1280c0c \n \tstrmi\tsl, [r4], -fp, asr #20\n \tsmlalle\tr4, r6, r3, r2\n \tldrmi\tr9, [r8], -fp, asr #18\n \t\t\t; instruction: 0xf7fd3101\n-\t\t\t; instruction: 0xe7e0efb8\n+\t\t\t; instruction: 0xe7e0efba\n \tstrb\tr4, [r7, r4, lsl #12]\n \tstr\tr4, [r6, r4, lsl #12]!\n \tldr\tr4, [ip, r4, lsl #12]\n \tldr\tr4, [r9, r4, lsl #12]!\n \tstr\tr4, [pc, r4, lsl #12]!\n \t\t\t; instruction: 0xf7fd2014\n-\tstrmi\tlr, [r5], -r2, asr #30\n+\tstrmi\tlr, [r5], -r4, asr #30\n \tblx\tfea44442 \n \tstrtmi\tr4, [r8], -r6, lsr #22\n \tldrbtmi\tr4, [sl], #-2598\t; 0xfffff5da\n \t\t\t; instruction: 0xf7fe58e1\n-\tstrmi\tlr, [r4], -r2, asr #19\n+\tstrmi\tlr, [r4], -r4, asr #19\n \tstrmi\tlr, [r4], -r2, asr #15\n \tstrmi\tlr, [r4], -r3\n \t\t\t; instruction: 0xf7fd4628\n-\t\t\t; instruction: 0x4638efbc\n+\t\t\t; instruction: 0x4638efbe\n \tblx\tc42496 \n \tstrmi\tlr, [r4], -r0, asr #15\n \t\t\t; instruction: 0x4604e7be\n \tstrmi\tlr, [r4], -sl, lsl #15\n \tadcsmi\tr9, r0, #2031616\t; 0x1f0000\n \tsvcge\t0x006ff43f\n \ttstcc\tr1, r1, lsr #18\n-\tsvc\t0x0086f7fd\n+\tsvc\t0x0088f7fd\n \tstrmi\tlr, [r4], -r9, ror #14\n \tadcmi\tr9, r8, #1638400\t; 0x190000\n \tldmdbls\tfp, {r1, r4, r5, r6, r7, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\t\t\t; instruction: 0xe7edef7e\n+\tstrb\tlr, [sp, r0, lsl #31]!\n \t\t\t; instruction: 0x000232b4\n \t\t\t; instruction: 0x000002b8\n \tmuleq\tr2, lr, r2\n \tandeq\tpc, r0, sl, lsr #10\n \tstrdeq\tpc, [r0], -r8\n \tandeq\tpc, r0, r2, lsl #9\n \tandeq\tpc, r0, r6, lsr r4\t; \n@@ -1802,22 +1802,22 @@\n \tldrbtmi\tr3, [sl], #-2084\t; 0xfffff7dc\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, sp, lsl fp\n \tmovweq\tpc, #79\t; 0x4f\t; \n \taddshi\tpc, r6, #64\t; 0x40\n \tandslt\tr4, pc, r0, lsr #12\n \tsvchi\t0x00f0e8bd\n-\tstmib\tr2, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tr4, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf8df4603\n \tmovwls\tr0, #6156\t; 0x180c\n \t\t\t; instruction: 0xf7fd4478\n-\tandls\tlr, r4, r4, lsr #31\n+\tandls\tlr, r4, r6, lsr #31\n \t\t\t; instruction: 0xf0002800\n \tsvcge\t0x00048381\n-\tldm\tr0, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldm\tr2, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tubfxcc\tpc, pc, #17, #21\n \t\t\t; instruction: 0xf10dad06\n \t\t\t; instruction: 0x4604091c\n \tldrtmi\tr9, [sl], -r8\n \tstrtmi\tr4, [r8], -r9, asr #12\n \tmovwls\tr4, #38011\t; 0x947b\n \tmovwls\tr2, #41728\t; 0xa300\n@@ -1831,15 +1831,15 @@\n \tsvceq\t0x0000f1ba\n \taddhi\tpc, r5, r0\n \ttstlt\tr1, r4, lsl #18\n \tmovwcc\tr6, #6155\t; 0x180b\n \tstrtmi\tr6, [r0], -fp\n \tstmib\tsp, {r8, r9, sp}^\n \tmovwls\tr4, #41224\t; 0xa108\n-\tldmda\tr4!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmda\tr6!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf0002800\n \t\t\t; instruction: 0xf10d8284\n \tandls\tr0, sl, r4, lsl sl\n \tmovwcs\tr4, #1616\t; 0x650\n \tmovwcc\tlr, #22989\t; 0x59cd\n \tblx\tfe0425f4 \n \t\t\t; instruction: 0xf00a4628\n@@ -1858,15 +1858,15 @@\n \tandls\tr5, r3, #11665408\t; 0xb20000\n \t\t\t; instruction: 0xd14e4293\n \ttstlt\tr1, r4, lsl #18\n \tmovwcc\tr6, #6155\t; 0x180b\n \tstrtmi\tr6, [r0], -fp\n \tstrls\tr2, [r8], #-768\t; 0xfffffd00\n \tmovwls\tr9, #41225\t; 0xa109\n-\tldmda\tlr!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmda\tr0, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf0002800\n \tandls\tr8, sl, r1, asr #5\n \t\t\t; instruction: 0xf04f4650\n \tstmib\tsp, {r8, fp}^\n \t\t\t; instruction: 0xf00a9905\n \tstrtmi\tpc, [r8], -fp, asr #20\n \tblx\t1242664 \n@@ -1876,17 +1876,17 @@\n \tmovwcc\tr9, #6659\t; 0x1a03\n \tstmdavs\tr3!, {r0, r1, r5, sp, lr}^\n \taddsmi\tr9, r3, #83886080\t; 0x5000000\n \tandsls\tpc, r8, sp, asr #17\n \tsubshi\tpc, pc, #64\t; 0x40\n \t\t\t; instruction: 0xf00a4628\n \t\t\t; instruction: 0x4620fa35\n-\tldmdb\tr2, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmdb\tr4, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tstrtmi\tr4, [r0], -r1, lsl #12\n-\tsvc\t0x00f2f7fd\n+\tsvc\t0x00f4f7fd\n \tstmdacs\tr0, {r0, r1, r9, sl, lr}\n \teorshi\tpc, sl, #0\n \tusatcs\tpc, #0, pc, asr #17\t; \n \tldrbtmi\tr4, [sl], #-1616\t; 0xfffff9b0\n \t\t\t; instruction: 0xf00a6093\n \tstrbmi\tpc, [r0], -r3, lsr #20\t; \n \tblx\t8426b4 \n@@ -1898,17 +1898,17 @@\n \t\t\t; instruction: 0xf00aa809\n \t\t\t; instruction: 0xf8dffa13\n \tldrbtmi\tr3, [fp], #-1720\t; 0xfffff948\n \tldrdhi\tpc, [r8], -r3\n \tsvceq\t0x0000f1b8\n \t\t\t; instruction: 0x81bff000\n \t\t\t; instruction: 0xf7fd20ec\n-\tpkhtbmi\tlr, r2, r2, asr #26\n+\tpkhtbmi\tlr, r2, r4, asr #26\n \tsmlattcs\tr0, ip, r2, r2\n-\tmrc\t7, 2, APSR_nzcv, cr8, cr13, {7}\n+\tmrc\t7, 2, APSR_nzcv, cr10, cr13, {7}\n \tcmnpl\tlr, #79\t; 0x4f\t; \n \tandscc\tpc, r0, sl, asr #17\n \teorcc\tpc, ip, sl, asr #17\n \tsubcc\tpc, r8, sl, asr #17\n \trsbcc\tpc, r4, sl, asr #17\n \taddcc\tpc, r0, sl, asr #17\n \taddscc\tpc, ip, sl, asr #17\n@@ -1932,62 +1932,62 @@\n \t\t\t; instruction: 0xf8ca0388\n \t\t\t; instruction: 0xf10a3070\n \t\t\t; instruction: 0xf8ca03a4\n \t\t\t; instruction: 0xf10a308c\n \t\t\t; instruction: 0xf8ca03c4\n \t\t\t; instruction: 0xf8c830ac\n \t\t\t; instruction: 0xf7fda000\n-\t\t\t; instruction: 0xf8d8ef52\n+\t\t\t; instruction: 0xf8d8ef54\n \tstrmi\tsl, [r3], r0\n-\tsvc\t0x0088f7fd\n+\tsvc\t0x008af7fd\n \tldrdcc\tpc, [r0], -r8\n \trsceq\tpc, r4, sl, asr #17\n \tldrdeq\tpc, [r4], #131\t; 0x83\t; \n \t\t\t; instruction: 0xf0002800\n \t\t\t; instruction: 0xf7fd826d\n-\tstmdacs\tr0, {r4, r5, r6, r7, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r1, r4, r5, r6, r7, r8, r9, sl, fp, sp, lr, pc}\n \trsbhi\tpc, r8, #64\t; 0x40\n \tldrdcc\tpc, [r0], -r8\n \t\t\t; instruction: 0xf8d34659\n \t\t\t; instruction: 0xf7fd00e4\n-\t\t\t; instruction: 0xf8d8ef8c\n+\t\t\t; instruction: 0xf8d8ef8e\n \t\t\t; instruction: 0xf8dd3000\n \t\t\t; instruction: 0xf8dba010\n \t\t\t; instruction: 0xf8c32008\n \t\t\t; instruction: 0xf1ba20e8\n \tandle\tr0, r4, r0, lsl #30\n \tldrdcc\tpc, [r0], -sl\n \t\t\t; instruction: 0xf8ca3301\n \t\t\t; instruction: 0xf8df3000\n \tandcs\tr3, r0, #200, 10\t; 0x32000000\n \tstmib\tsp, {r0, r4, r9, sl, lr}^\n \tldrbtmi\tr4, [fp], #-2568\t; 0xfffff5f8\n \tldmvs\tr8, {r1, r3, r9, ip, pc}\n-\tsvc\t0x002ef7fd\n+\tsvc\t0x0030f7fd\n \tandls\tr4, r6, r2, lsl #12\n \t\t\t; instruction: 0xf0002800\n \tldrbmi\tr8, [r1], -r5, lsr #5\n \t\t\t; instruction: 0xf7fd4620\n-\tstmdacs\tr0, {r1, r3, r4, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r2, r3, r4, r8, r9, sl, fp, sp, lr, pc}\n \tsubshi\tpc, r3, #64\t; 0x40\n \t\t\t; instruction: 0xf00a4628\n \tstmdage\tr9, {r0, r1, r2, r3, r4, r5, r6, r8, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf97cf00a\n \t\t\t; instruction: 0xf8d82008\n \t\t\t; instruction: 0xf7fd4000\n-\t\t\t; instruction: 0xf8dfecc2\n+\t\t\t; instruction: 0xf8dfecc4\n \tstrmi\tr2, [r3], -r8, lsl #11\n \tsubvs\tr4, r2, sl, ror r4\n \tstreq\tpc, [r0, #2271]\t; 0x8df\n \tldrdcs\tpc, [r8], r4\t; \n \tldrbtmi\tr6, [r8], #-26\t; 0xffffffe6\n \tadccc\tpc, r8, r4, asr #17\n \tldrdcc\tpc, [r0], -r8\n \t\t\t; instruction: 0xf7fd9302\n-\t\t\t; instruction: 0xf8dfee4a\n+\t\t\t; instruction: 0xf8dfee4c\n \tstrmi\tr3, [r3], ip, ror #10\n \ttstcs\tr0, r6\n \tandge\tpc, r3, r6, asr r8\t; \n \t\t\t; instruction: 0xf8da4650\n \t\t\t; instruction: 0x47983098\n \tstmdacs\tr0, {r2, r9, sl, lr}\n \tmsrhi\tSPSR_x, r0\n@@ -2008,33 +2008,33 @@\n \taddcc\tpc, r0, r4, asr #17\n \t\t\t; instruction: 0xf8c4447a\n \tldmdavs\tsl, {r2, r3, r7, sp}\n \tandsvs\tr3, sl, r1, lsl #4\n \tbicvs\tpc, r0, #1325400064\t; 0x4f000000\n \tmovweq\tpc, #17088\t; 0x42c0\t; \n \t\t\t; instruction: 0xf7fd6563\n-\tstmdacs\tr0, {r5, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r1, r5, r8, r9, sl, fp, sp, lr, pc}\n \tsubshi\tpc, r6, #192, 4\n \tstreq\tpc, [r4, #-2271]\t; 0xfffff721\n \t\t\t; instruction: 0xf7fd4478\n-\tstrmi\tlr, [r2], -r8, lsl #28\n+\tstrmi\tlr, [r2], -sl, lsl #28\n \tstmdacs\tr0, {r0, r1, r2, ip, pc}\n \tsubhi\tpc, r8, #0\n \tldrbtne\tpc, [r4], #2271\t; 0x8df\t; \n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n \t\t\t; instruction: 0xf98cf7ff\n \t\t\t; instruction: 0xf00a4648\n \t\t\t; instruction: 0x4628f915\n \t\t\t; instruction: 0xf912f00a\n \t\t\t; instruction: 0xf8df9b02\n \t\t\t; instruction: 0xf8c304e0\n \tldrbtmi\tr4, [r8], #-216\t; 0xffffff28\n \tldrdcc\tpc, [r0], -r8\n \t\t\t; instruction: 0xf7fd9302\n-\tstrmi\tlr, [r3], ip, ror #27\n+\tstrmi\tlr, [r3], lr, ror #27\n \t\t\t; instruction: 0xf8da9006\n \tswpcs\tr3, r8, [r0]\n \t\t\t; instruction: 0x47984650\n \tstmdacs\tr0, {r2, r9, sl, lr}\n \trscshi\tpc, r3, r0\n \tsvceq\t0x0000f1bb\n \tadcshi\tpc, pc, r0\n@@ -2055,34 +2055,34 @@\n \t\t\t; instruction: 0xf8df64e3\n \tldrbtmi\tr3, [fp], #-1156\t; 0xfffffb7c\n \t\t\t; instruction: 0xf8df64a3\n \tldrbtmi\tr3, [fp], #-1152\t; 0xfffffb80\n \tvst4.32\t{d22,d24,d26,d28}, [pc :128], r3\n \tvqdmlal.s\tq11, d16, d0[0]\n \tstrbvs\tr0, [r3, #-772]!\t; 0xfffffcfc\n-\tmcr\t7, 6, pc, cr0, cr13, {7}\t; \n+\tmcr\t7, 6, pc, cr2, cr13, {7}\t; \n \tvmlal.s8\tq9, d0, d0\n \t\t\t; instruction: 0xf8df81dc\n \tldrbtmi\tr0, [r8], #-1128\t; 0xfffffb98\n-\tstc\t7, cr15, [r8, #1012]!\t; 0x3f4\n+\tstc\t7, cr15, [sl, #1012]!\t; 0x3f4\n \tandls\tr4, r7, r2, lsl #12\n \t\t\t; instruction: 0xf0002800\n \t\t\t; instruction: 0xf8df81ce\n \t\t\t; instruction: 0x46201458\n \t\t\t; instruction: 0xf7ff4479\n \tstrbmi\tpc, [r8], -sp, lsr #18\t; \n \t\t\t; instruction: 0xf8b6f00a\n \t\t\t; instruction: 0xf00a4628\n \tblls\tc4c34 \n \tldrdge\tpc, [r0], -r8\n \tldrteq\tpc, [ip], #-2271\t; 0xfffff721\t; \n \tsbcsmi\tpc, ip, r3, asr #17\n \t\t\t; instruction: 0xf8da4478\n \t\t\t; instruction: 0xf7fd40dc\n-\tstrmi\tlr, [r0], ip, lsl #27\n+\tstrmi\tlr, [r0], lr, lsl #27\n \t\t\t; instruction: 0xf8d49006\n \t\t\t; instruction: 0x46203098\n \tldrmi\tr2, [r8, r0, lsl #2]\n \tstmdacs\tr0, {r2, r9, sl, lr}\n \t\t\t; instruction: 0x81a2f000\n \tsvceq\t0x0000f1b8\n \t\t\t; instruction: 0xf8d8d05c\n@@ -2103,146 +2103,146 @@\n \tblmi\tffe9ea40 \n \t\t\t; instruction: 0x61a3447b\n \t\t\t; instruction: 0x6123231c\n \tbicvs\tpc, r0, #1325400064\t; 0x4f000000\n \tmovweq\tpc, #17088\t; 0x42c0\t; \n \ttstcs\tr4, #415236096\t; 0x18c00000\n \t\t\t; instruction: 0xf7fd66a3\n-\tstmdacs\tr0, {r1, r5, r6, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r2, r5, r6, r9, sl, fp, sp, lr, pc}\n \tldmmi\tr3!, {r1, r2, r4, r5, r8, r9, fp, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fd4478\n-\tstrmi\tlr, [r2], -ip, asr #26\n+\tstrmi\tlr, [r2], -lr, asr #26\n \tstmdacs\tr0, {r0, r1, r2, ip, pc}\n \tldmibmi\tr0!, {r6, ip, lr, pc}^\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n \t\t\t; instruction: 0xf8d2f7ff\n \t\t\t; instruction: 0xf00a4648\n \t\t\t; instruction: 0x4628f85b\n \t\t\t; instruction: 0xf858f00a\n \trscmi\tpc, r0, sl, asr #17\n \tldrtmi\tr4, [r8], -sl, ror #23\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \t\t\t; instruction: 0xf00a681c\n \tstmdals\tr1, {r0, r1, r2, r3, r6, fp, ip, sp, lr, pc}\n-\tmcr\t7, 0, pc, cr10, cr13, {7}\t; \n+\tmcr\t7, 0, pc, cr12, cr13, {7}\t; \n \tandcs\tlr, r4, r1, ror r5\n-\tbl\tfe4c4a30 \n+\tbl\tfe544a30 \n \tstrmi\tr4, [r0], r4, ror #23\n \taddsvs\tr4, r8, fp, ror r4\n \tandvs\tr2, r3, r0, lsl #6\n \tstrls\tlr, [r5], #-1590\t; 0xfffff9ca\n \t\t\t; instruction: 0xf8c0e606\n \tldrbt\tfp, [r0], r4, lsr #3\n \t\t\t; instruction: 0x81a4f8c0\n \t\t\t; instruction: 0xf8c0e7a6\n \tstrb\tfp, [r4, -r4, lsr #3]\n-\tldc\t7, cr15, [ip, #1012]\t; 0x3f4\n+\tldc\t7, cr15, [lr, #1012]\t; 0x3f4\n \t\t\t; instruction: 0x4620ac11\n \t\t\t; instruction: 0xf96cf7ff\n \t\t\t; instruction: 0x46204ad9\n \tldrbtmi\tr2, [sl], #-256\t; 0xffffff00\n-\tstcl\t7, cr15, [r4], {253}\t; 0xfd\n+\tstcl\t7, cr15, [r6], {253}\t; 0xfd\n \tldmdage\tr7, {r0, r9, sl, lr}\n \t\t\t; instruction: 0xf00c9002\n \tstmdals\tr2, {r0, r1, r2, r3, r4, r5, r7, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xff68f7fd\n \tldrbtmi\tr4, [r8], #-2259\t; 0xfffff72d\n \t\t\t; instruction: 0xff42f7fd\n \tldmdals\tr7, {r2, r9, sl, lr}\n \taddsmi\tsl, r8, #25600\t; 0x6400\n \tldmdbls\tr9, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\tldmdals\tr1, {r1, r3, r4, r5, r6, sl, fp, sp, lr, pc}\n+\tldmdals\tr1, {r2, r3, r4, r5, r6, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #19456\t; 0x4c00\n \tldmdbls\tr3, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\t\t\t; instruction: 0x4628ec72\n+\t\t\t; instruction: 0x4628ec74\n \t\t\t; instruction: 0xf80af00a\n \tstmiami\tr8, {r1, r2, r5, sp, lr, pc}^\n \t\t\t; instruction: 0xf7fd4478\n \tandscs\tpc, r4, r9, lsr #30\n-\tbl\tfffc4abc \n+\tstc\t7, cr15, [r0], {253}\t; 0xfd\n \t\t\t; instruction: 0xf7fe4605\n \tblmi\tff144c64 \n \tbmi\tff118374 \n \tldmpl\tr1!, {r1, r3, r4, r5, r6, sl, lr}^\n-\tmrc\t7, 3, APSR_nzcv, cr14, cr13, {7}\n+\tmcr\t7, 4, pc, cr0, cr13, {7}\t; \n \tadds\tr4, pc, r4, lsl #12\n \tsbcs\tr4, r7, r4, lsl #12\n \tldrbtmi\tr4, [r8], #-2240\t; 0xfffff740\n \t\t\t; instruction: 0xff14f7fd\n \tldrbtmi\tr4, [r8], #-2239\t; 0xfffff741\n \t\t\t; instruction: 0xff10f7fd\n \tldrbmi\tr4, [r0], -r4, lsl #12\n \t\t\t; instruction: 0xffe8f009\n \t\t\t; instruction: 0xf0094640\n \tldrbmi\tpc, [r8], -r5, ror #31\t; \n \t\t\t; instruction: 0xffe2f009\n \t\t\t; instruction: 0xf0094638\n \tstmdals\tr1, {r0, r1, r2, r3, r4, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\n-\tldc\t7, cr15, [sl, #1012]\t; 0x3f4\n+\tldc\t7, cr15, [ip, #1012]\t; 0x3f4\n \t\t\t; instruction: 0xf7fd4620\n-\tandcs\tlr, r8, r8, ror lr\n-\tbl\tff4c4b14 \n+\tandcs\tlr, r8, sl, ror lr\n+\tbl\tff544b14 \n \tldcge\t8, cr6, [r7], {99}\t; 0x63\n \tstrtmi\tr4, [r0], -r1, lsl #13\n \t\t\t; instruction: 0xf00a68d9\n \tbmi\tfec4553c \n \ttstcs\tr0, r0, lsr #12\n \t\t\t; instruction: 0xf7fd447a\n-\tstrmi\tlr, [r1], -r4, ror #24\n+\tstrmi\tlr, [r1], -r6, ror #24\n \tandls\tsl, r2, r1, lsl r8\n \t\t\t; instruction: 0xf85ef00c\n \tstmdals\tr2, {r0, r1, r3, r5, r7, r8, fp, lr}\n \t\t\t; instruction: 0xf7fd4479\n-\tstcge\t14, cr14, [fp], {172}\t; 0xac\n+\tstcge\t14, cr14, [fp], {174}\t; 0xae\n \tstrtmi\tr4, [r0], -r1, lsl #12\n \t\t\t; instruction: 0xf854f00c\n \tstrbmi\tr4, [r8], -r1, lsr #12\n-\tldcl\t7, cr15, [ip, #-1012]\t; 0xfffffc0c\n+\tldcl\t7, cr15, [lr, #-1012]\t; 0xfffffc0c\n \tstmdals\tfp, {r0, r2, r5, r7, r8, r9, fp, lr}\n \tmovwcc\tr4, #33915\t; 0x847b\n \tandcc\tpc, r0, r9, asr #17\n \taddsmi\tsl, r8, #13312\t; 0x3400\n \tstmdbls\tsp, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\tldmdals\tr1, {r1, r2, r3, sl, fp, sp, lr, pc}\n+\tldmdals\tr1, {r4, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #19456\t; 0x4c00\n \tldmdbls\tr3, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\tldmdals\tr7, {r1, r2, sl, fp, sp, lr, pc}\n+\tldmdals\tr7, {r3, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #25600\t; 0x6400\n \tldmdbls\tr9, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\tblmi\tfe641b94 \n+\tblmi\tfe641b9c \n \tbmi\tfe6184c0 \n \tldmpl\tr1!, {r1, r3, r4, r5, r6, sl, lr}^\n-\tmrc\t7, 0, APSR_nzcv, cr8, cr13, {7}\n+\tmrc\t7, 0, APSR_nzcv, cr10, cr13, {7}\n \t\t\t; instruction: 0xf7fd2014\n-\tstrmi\tlr, [r5], -ip, lsl #23\n+\tstrmi\tlr, [r5], -lr, lsl #23\n \t\t\t; instruction: 0xfff2f7fd\n \tstrtmi\tr4, [r8], -sl, lsl #23\n \tldrbtmi\tr4, [sl], #-2706\t; 0xfffff56e\n \t\t\t; instruction: 0xf7fd58f1\n-\tstrmi\tlr, [r4], -ip, lsl #28\n+\tstrmi\tlr, [r4], -lr, lsl #28\n \t\t\t; instruction: 0xf7fd4628\n-\tldr\tlr, [r7, sl, lsl #24]\n+\tldr\tlr, [r7, ip, lsl #24]\n \tands\tr4, r7, r4, lsl #12\n \tstmdals\tfp, {r2, r9, sl, lr}\n \taddsmi\tsl, r8, #13312\t; 0x3400\n \tstmdbls\tsp, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\tldmdals\tr1, {r1, r3, r4, r6, r7, r8, r9, fp, sp, lr, pc}\n+\tldmdals\tr1, {r2, r3, r4, r6, r7, r8, r9, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #19456\t; 0x4c00\n \tldmdbls\tr3, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\tldmdals\tr7, {r1, r4, r6, r7, r8, r9, fp, sp, lr, pc}\n+\tldmdals\tr7, {r2, r4, r6, r7, r8, r9, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #25600\t; 0x6400\n \t\t\t; instruction: 0x4648d159\n-\tbl\tffbc4bf4 \n+\tbl\tffc44bf4 \n \t\t\t; instruction: 0xf0094650\n \tstrtmi\tpc, [r8], -r3, ror #30\n \t\t\t; instruction: 0xff60f009\n \t\t\t; instruction: 0x4604e776\n \t\t\t; instruction: 0xf0094628\n \t\t\t; instruction: 0xe777ff5b\n \tstrbmi\tr4, [r8], -r4, lsl #12\n@@ -2263,32 +2263,32 @@\n \tldrb\tr4, [sl, -r4, lsl #12]\n \tldrbtmi\tr4, [r8], #-2156\t; 0xfffff794\n \tmrc2\t7, 2, pc, cr10, cr13, {7}\n \tstrb\tr4, [r7, r4, lsl #12]!\n \tstmdage\tr4, {r2, r9, sl, lr}\n \t\t\t; instruction: 0xff30f009\n \tandscs\tlr, r4, pc, asr #14\n-\tbl\ta44c68 \n+\tbl\tac4c68 \n \t\t\t; instruction: 0xf7fd4680\n \tblmi\t1686ab8 \n \tbmi\t1918580 \n \tldmpl\tr1!, {r1, r3, r4, r5, r6, sl, lr}^\n-\tstc\t7, cr15, [r8, #1012]!\t; 0x3f4\n+\tstc\t7, cr15, [sl, #1012]!\t; 0x3f4\n \tand\tr4, r6, r4, lsl #12\n \tstrbmi\tr4, [r0], -r4, lsl #12\n-\tbl\tfe944c88 \n+\tbl\tfe9c4c88 \n \t\t\t; instruction: 0xf0094628\n \tstmdage\tr9, {r0, r3, r4, r8, r9, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xff16f009\n \t\t\t; instruction: 0x4604e732\n \tstrmi\tlr, [r4], -r5, lsr #15\n \tstrmi\tlr, [r4], -r7, lsr #15\n \tldmdbls\tr9, {r0, r3, r4, r7, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf7fd3101\n-\t\t\t; instruction: 0xe7a0eb70\n+\t\t\t; instruction: 0xe7a0eb72\n \tldr\tr4, [pc, -r4, lsl #12]\n \tstrbmi\tr4, [r8], -r4, lsl #12\n \t\t\t; instruction: 0xff04f009\n \t\t\t; instruction: 0x4604e6f5\n \tstrmi\tlr, [r4], -fp, ror #13\n \t\t\t; instruction: 0xf0094648\n \t\t\t; instruction: 0xe6eefefd\n@@ -2303,15 +2303,15 @@\n \t\t\t; instruction: 0xf7fd4478\n \tstrmi\tpc, [r4], -sp, lsl #28\n \t\t\t; instruction: 0xf0094648\n \tstr\tpc, [r5, r5, ror #29]\n \tldrbtmi\tr4, [r8], #-2118\t; 0xfffff7ba\n \tmcr2\t7, 0, pc, cr4, cr13, {7}\t; \n \tstrtmi\tr4, [r8], -r4, lsl #12\n-\tbl\t1944d08 \n+\tbl\t19c4d08 \n \t\t\t; instruction: 0x4604e797\n \t\t\t; instruction: 0xf0094628\n \tsbfx\tpc, r7, #29, #29\n \tldrbtmi\tr4, [r8], #-2112\t; 0xfffff7c0\n \tldc2l\t7, cr15, [r6, #1012]!\t; 0x3f4\n \tldrbtmi\tr4, [r8], #-2111\t; 0xfffff7c1\n \tldc2l\t7, cr15, [r2, #1012]!\t; 0x3f4\n@@ -2377,30 +2377,30 @@\n \tandeq\tlr, r0, ip, lsl r8\n \tstrdeq\tlr, [r0], -r6\n \tandeq\tlr, r0, sl, lsl #12\n \tandeq\tlr, r0, r6, asr #14\n \tldrbmi\tlr, [r0, sp, lsr #18]!\n \tldcmi\t6, cr4, [r7, #-80]\t; 0xffffffb0\n \tstrmi\tr4, [r6], -pc, lsl #12\n-\tldcl\t7, cr15, [sl], {253}\t; 0xfd\n+\tldcl\t7, cr15, [ip], {253}\t; 0xfd\n \tldrbtmi\tr4, [sp], #-1664\t; 0xfffff980\n \tblx\t1544e42 \n \tldrsbls\tpc, [r8], #128\t; 0x80\t; \n \tsvceq\t0x0000f1b8\n \tstccs\t15, cr11, [r0], {24}\n \tblmi\t43b274 \n \tldrtmi\tr4, [r9], -r2, lsr #12\n \tstmiapl\tfp!, {r4, r5, r9, sl, lr}^\n \t\t\t; instruction: 0x47f0e8bd\n \t\t\t; instruction: 0x47186cdb\n \tstrbmi\tr4, [r0], -r9, asr #12\n-\tb\tcc4e60 \n+\tb\td44e60 \n \trscsle\tr2, r0, r0, lsl #16\n \tstrtmi\tr4, [r0], -r9, asr #12\n-\tb\tb44e6c \n+\tb\tbc4e6c \n \tmvnle\tr2, r0, lsl #16\n \tldrdcc\tpc, [r4], -r8\n \tldrtmi\tr4, [r1], -r2, lsr #12\n \tpop\t{r6, r9, sl, lr}\n \t\t\t; instruction: 0xf8d347f0\n \tldrmi\tr3, [r8, -ip, lsl #1]\n \tandeq\tr2, r2, r2, asr #3\n@@ -2412,25 +2412,25 @@\n \tldrbtmi\tr5, [lr], #-2259\t; 0xfffff72d\n \tmovwls\tr6, #22555\t; 0x581b\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tblx\t6c4eb6 \n \tstrtmi\tr4, [r0], -r5, lsl #12\n \tldrdge\tpc, [r0], -r5\t; \n \t\t\t; instruction: 0xf7fd4651\n-\tstmibvs\tfp!, {r3, r5, r6, r7, r8, fp, sp, lr, pc}^\n+\tstmibvs\tfp!, {r1, r3, r5, r6, r7, r8, fp, sp, lr, pc}^\n \teorcc\tpc, r1, r3, asr r8\t; \n \tldmdavs\tpc, {r0, r1, r3, r7, r8, ip, sp, pc}\t; \n \t\t\t; instruction: 0xf8d74689\n \tstrbmi\tr8, [r3], -r4\n \tldrmi\tr4, [sp], -r8, lsr #13\n \tandsle\tr4, fp, ip, lsr #5\n \tteqlt\tr7, pc, lsr r8\n \t\t\t; instruction: 0x4651687d\n \t\t\t; instruction: 0xf7fd4628\n-\tstrmi\tlr, [r9, #2516]\t; 0x9d4\n+\tstrmi\tlr, [r9, #2518]\t; 0x9d6\n \tbmi\tfee3b2c4 \n \tldrbtmi\tr4, [sl], #-2997\t; 0xfffff44b\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, r5, lsl #22\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tcmphi\tlr, r0, asr #32\t; \n \t\t\t; instruction: 0x46204bb3\n@@ -2441,51 +2441,51 @@\n \tbne\tfe6d8834 \n \tmvnle\tr2, r4, lsl #22\n \tldmdavs\tfp!, {r0, r1, r2, r4, fp, sp, lr}\n \tmvnle\tr4, r3, lsr #5\n \tmovwls\tr6, #18555\t; 0x487b\n \t\t\t; instruction: 0xf00a6858\n \tsvcvs\t0x0069f919\n-\tstmib\tip!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tlr!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tstrmi\tr6, [r8], fp, lsr #30\n \teorge\tpc, r1, r3, asr r8\t; \n \tmovwls\tr0, #4235\t; 0x108b\n \tsvceq\t0x0000f1ba\n \tstrtmi\tsp, [r3], -r1, asr #32\n \tldrdls\tpc, [r0], -sl\n \t\t\t; instruction: 0xf6464654\n \tvqdmlsl.s\t, d12, d7\n \tldrmi\tr7, [sl], pc, lsl #22\n \tldrdne\tpc, [r4], -r9\n \t\t\t; instruction: 0xf7fd9804\n-\tstmdacs\tr0, {r1, r2, r4, r5, r6, r7, r9, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r3, r4, r5, r6, r7, r9, fp, sp, lr, pc}\n \tadchi\tpc, r0, r0\n \tssatmi\tr4, #3, r3, asr #12\n \tsvcvs\t0x002b461c\n \t\t\t; instruction: 0xf8da9a01\n \tldmne\tr8, {ip, pc}\n \teorcs\tpc, r8, r3, asr r8\t; \n \tldrdcc\tpc, [r0], -r9\n \t\t\t; instruction: 0xf0004592\n \tcmnlt\tfp, pc, asr #1\n \tsvcvs\t0x0069685b\n \tldmdavs\tr8, {r0, r8, ip, pc}^\n \t\t\t; instruction: 0xf8e6f00a\n \t\t\t; instruction: 0xf7fd9901\n-\tstrmi\tlr, [r8, #2426]\t; 0x97a\n+\tstrmi\tlr, [r8, #2428]\t; 0x97c\n \tsvcvs\t0x002bbf1c\n \teorge\tpc, r1, r3, asr #16\n \tldrdcc\tpc, [r0], -r9\n \tldrdeq\tpc, [r8], -r9\n \tandcc\tpc, r0, sl, asr #17\n \t\t\t; instruction: 0xf8d9b120\n \tbne\t24b000 \n-\tstmib\tr8!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tsl!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \ttstcs\tr4, r8, asr #12\n-\tstmib\tr4!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tr6!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcc\t62f7c \n \t\t\t; instruction: 0xf89767eb\n \tldreq\tr3, [fp, -r8, asr #32]\n \taddhi\tpc, r9, r0, asr #2\n \tldrsbls\tpc, [ip, #143]!\t; 0x8f\t; \n \t\t\t; instruction: 0xf8d944f9\n \tvaddl.u\t, d15, d12\n@@ -2506,113 +2506,113 @@\n \t\t\t; instruction: 0xf8d8683b\n \taddsmi\tr5, sl, #0\n \tssatmi\tfp, #9, r8, lsl #30\n \tstccs\t0, cr13, [r0, #-76]\t; 0xffffffb4\n \tstflsd\tf5, [r1], {244}\t; 0xf4\n \t\t\t; instruction: 0xb1186af8\n \tbne\t261e20 \n-\tstmib\tsl!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tip!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \ttstlt\tr8, r8, lsr sl\n \tbne\t261b2c \n-\tstmib\tr4!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tr6!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldrtmi\tr2, [r8], -ip, asr #2\n-\tstmib\tr0!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tr2!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf8dbe74d\n \t\t\t; instruction: 0xf8d84058\n \tstrtmi\tr0, [r1], -ip\n-\tldmdb\tr8, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmdb\tsl, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldrsbcc\tpc, [r4], #-139\t; 0xffffff75\t; \n \t\t\t; instruction: 0xf853468a\n \tstrmi\tr0, [r1], -r1, lsr #32\n \tstmdavs\tr9, {r0, r3, r7, r9, sl, lr}\n \tmvnsle\tr4, r1, asr #10\n \teorsle\tr4, sp, r8, asr #10\n \tcmplt\tr5, r2, lsl #6\n \tstrtmi\tr6, [r1], -r8, ror #17\n-\tstmdb\tr6, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmdb\tr8, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tsvclt\t0x001e458a\n \t\t\t; instruction: 0xf8439b02\n \t\t\t; instruction: 0xf8d89021\n \tstrbmi\tr5, [r0], -r0\n \t\t\t; instruction: 0xf8c92110\n \tstrtmi\tr5, [r8], r0\n-\tldmdb\tr8!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmdb\tsl!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrdcc\tpc, [r0], #-139\t; 0xffffff75\t; \n \t\t\t; instruction: 0xf8cb3b01\n \tldr\tr3, [lr, r0, rrx]!\n \tldrdcc\tpc, [r0], -r9\n \t\t\t; instruction: 0xf0002b00\n \tldmdavs\tfp, {r0, r1, r7, pc}^\n \tsvcvs\t0x006b685c\n \tstmdavc\tr2!, {r1, r8, r9, ip, pc}\n \tsvclt\t0x00082a2a\n \tstrtmi\tr3, [r0], -r1, lsl #8\n-\tbl\t8c50c4 \n+\tbl\t9450c4 \n \t\t\t; instruction: 0x4601465a\n \t\t\t; instruction: 0xf7fd4620\n-\tblls\tc1714 \n+\tblls\tc171c \n \t\t\t; instruction: 0xf7fd4619\n-\tstrmi\tlr, [r8, #2266]\t; 0x8da\n+\tstrmi\tlr, [r8, #2268]\t; 0x8dc\n \tstrbmi\tsp, [ip], -ip, ror #2\n \tldrdls\tpc, [r0], -r9\n \tstmdbge\tr4, {r3, r4, r5, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf00a4628\n \t\t\t; instruction: 0xe782ff99\n \tsubsle\tr2, pc, r0, lsl #26\n \tstrtmi\tr6, [r1], -r8, ror #17\n \t\t\t; instruction: 0xf7fd9302\n-\tstrmi\tlr, [sl, #2248]\t; 0x8c8\n+\tstrmi\tlr, [sl, #2250]\t; 0x8ca\n \tblls\tbb420 \n \teorls\tpc, r1, r3, asr #16\n \teorcs\tpc, sl, r3, asr r8\t; \n \taddmi\tr9, sl, #49152\t; 0xc000\n \tandeq\tpc, r0, #79\t; 0x4f\n \t\t\t; instruction: 0xf8cbbf08\n \t\t\t; instruction: 0xf843505c\n \t\t\t; instruction: 0xf8d8202a\n \tldr\tr5, [r4, r0]!\n \tldmdavs\tsl, {r0, r1, r3, r5, r7, r8, ip, sp, pc}^\n \tmovwls\tr6, #16233\t; 0x3f69\n \ttstls\tr2, r0, asr r8\n \t\t\t; instruction: 0xf816f00a\n \t\t\t; instruction: 0xf7fd9902\n-\tblls\t1013ec \n+\tblls\t1013f4 \n \t\t\t; instruction: 0xf43f4588\n \t\t\t; instruction: 0xf8d5af31\n \tstmdals\tr1, {r4, r5, r6, lr, pc}\n \teorcs\tpc, r8, ip, asr r8\t; \n \t\t\t; instruction: 0xf84c4460\n \t\t\t; instruction: 0xf1052021\n \taddmi\tr0, sl, #120, 2\n \tstrvs\tfp, [fp, r8, lsl #30]!\n \tandvs\tr2, r3, r0, lsl #6\n \tldrdcc\tpc, [r0], -r9\n \t\t\t; instruction: 0xf109e720\n \tldrbmi\tr0, [r0], -ip, lsl #20\n-\tbl\t154516c \n+\tbl\t15c516c \n \t\t\t; instruction: 0xf43f2800\n \tbmi\t672e68 \n \tcmnpl\tlr, #79\t; 0x4f\t; \n \t\t\t; instruction: 0xf1094918\n \t\t\t; instruction: 0xf8c90010\n \tldrbtmi\tr3, [sl], #-32\t; 0xffffffe0\n \tmsreq\tCPSR_f, #1073741826\t; 0x40000002\n \t\t\t; instruction: 0xf8c94479\n \tmovwcs\tr3, #4112\t; 0x1010\n \tandshi\tpc, ip, r9, asr #17\n \teorhi\tpc, r8, r9, asr #17\n \tandshi\tpc, r8, r9, asr #17\n \teorhi\tpc, r4, r9, asr #17\n \tandscc\tpc, r4, r9, asr #17\n-\tsvc\t0x00f6f7fc\n+\tsvc\t0x00f8f7fc\n \t\t\t; instruction: 0xf7fd4650\n-\tldr\tlr, [sl, -lr, asr #17]\n+\t\t\t; instruction: 0xe71ae8d0\n \tstr\tr4, [r9, sl, asr #12]!\n \tsmlsd\tr6, r4, r6, r4\n-\tstmib\tsl!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tip!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tandeq\tr2, r2, r4, ror #2\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr2, r2, r6, asr r1\n \tandeq\tr2, r2, sl, lsl #2\n \tandeq\tr0, r0, r8, ror #5\n \tandeq\tr2, r2, r4, lsl #8\n \tandeq\tr2, r2, lr, ror #7\n@@ -2621,41 +2621,41 @@\n \t\t\t; instruction: 0x4604b570\n \t\t\t; instruction: 0xf97cf7ff\n \tldrcc\tlr, [r2, #-2512]!\t; 0xfffff630\n \tadcmi\tr4, fp, #480\t; 0x1e0\n \tandsle\tr4, r9, lr, ror r4\n \tstceq\t8, cr15, [r4], {85}\t; 0x55\n \tstrtmi\tfp, [r1], -r8, lsr #2\n-\tstm\tr6, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstm\tr8, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \teorle\tr3, r4, r1\n \tandcs\tfp, r1, r0, ror sp\n-\tldmdb\tr4, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmdb\tr6, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tstceq\t8, cr15, [r4], {69}\t; 0x45\n \ttstlt\tr4, r0, lsr r1\n \tmovwcc\tr6, #6179\t; 0x1823\n \tstmiavs\tr3, {r0, r1, r5, sp, lr}^\n \tldcllt\t0, cr6, [r0, #-112]!\t; 0xffffff90\n \tldrbtmi\tr4, [r8], #-2066\t; 0xfffff7ee\n \tblx\t1c4522a \n \t\t\t; instruction: 0xf7fd2008\n-\tldmdbmi\tr0, {r1, r2, r6, fp, sp, lr, pc}\n+\tldmdbmi\tr0, {r3, r6, fp, sp, lr, pc}\n \tldrbtmi\tr4, [r9], #-1540\t; 0xfffff9fc\n-\tbl\t4c5238 \n+\tbl\t545238 \n \tstrtmi\tr4, [r0], -lr, lsl #22\n \tldrbtmi\tr4, [fp], #-2318\t; 0xfffff6f2\n \t\t\t; instruction: 0x33204a0e\n \tldrbtmi\tr6, [sl], #-35\t; 0xffffffdd\n \t\t\t; instruction: 0xf7fd5871\n-\tstmdami\tip, {r6, r7, r9, fp, sp, lr, pc}\n+\tstmdami\tip, {r1, r6, r7, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fd4478\n \t\t\t; instruction: 0x4603fb59\n \tldrmi\tr4, [ip], -r0, lsr #12\n-\tldm\tr8!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldm\tsl!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fd4620\n-\tsvclt\t0x0000eacc\n+\tsvclt\t0x0000eace\n \tandeq\tr1, r2, r4, lsl #28\n \tandeq\tlr, r0, lr, lsl #8\n \tandeq\tlr, r0, sl, ror r3\n \tandeq\tr1, r2, lr, ror r9\n \tandeq\tr0, r0, r4, lsr r3\n \tstrdeq\tr3, [r0], -r7\n \tandeq\tlr, r0, ip, lsl #8\n@@ -2664,42 +2664,42 @@\n \tblmi\tfe3334d8 \n \tsxtab16mi\tr4, r0, sl, ror #8\n \tldmpl\tr3, {r0, r1, ip, pc}^\n \tmovwls\tr6, #55323\t; 0xd81b\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0xf91ef7ff\n \tandcs\tr4, ip, r6, lsl #12\n-\tsvc\t0x0054f7fc\n+\tsvc\t0x0056f7fc\n \tmrscs\tr2, SP_irq\n \tldclvs\t0, cr6, [r5], #12\n \tldclvs\t6, cr4, [r3], #-28\t; 0xffffffe4\n \tstmib\tr0, {r1, r4, r5, r6, r7, r8, r9, fp, sp, lr}^\n \tstmdage\tfp, {r0, sl, pc}\n \t\t\t; instruction: 0xf1069100\n \t\t\t; instruction: 0xf7fd0148\n-\t\t\t; instruction: 0xf89de996\n+\t\t\t; instruction: 0xf89de998\n \tblcs\t1338c \n \tldmib\tr6, {r0, r2, r3, r4, r5, r8, ip, lr, pc}^\n \tstrbmi\tsl, [r1], -lr, lsl #16\n \t\t\t; instruction: 0xf7fc9803\n-\t\t\t; instruction: 0xf85aefd6\n+\t\t\t; instruction: 0xf85aefd8\n \tbl\t2b3374 \n \tstrmi\tr0, [r9], r1, lsl #7\n \t\t\t; instruction: 0xf1bb9303\n \t\t\t; instruction: 0xf0000f00\n \t\t\t; instruction: 0xf8db80bb\n \t\t\t; instruction: 0xf8d73000\n \tldrmi\tsl, [r9], -r4\n \tldmdavs\tsp, {r2, r8, r9, ip, pc}^\n \tandle\tr4, pc, r5, asr r5\t; \n \tstccs\t8, cr6, [r0], {12}\n \tadchi\tpc, r5, r0\n \tstrmi\tr6, [fp], r5, ror #16\n \tstrtmi\tr4, [r8], -r1, asr #12\n-\tsvc\t0x00b8f7fc\n+\tsvc\t0x00baf7fc\n \t\t\t; instruction: 0xf0404589\n \t\t\t; instruction: 0x4621809c\n \tmvnle\tr4, r5, asr r5\n \t\t\t; instruction: 0xf8cb6039\n \tldclvs\t0, cr7, [r3], #-0\n \tmovwcc\tr4, #6757\t; 0x1a65\n \tblmi\t18e050c \n@@ -2715,62 +2715,62 @@\n \tmovwcs\tr4, #1714\t; 0x6b2\n \tsvccc\t0x0050f84a\n \teorge\tpc, r0, sp, asr #17\n \t\t\t; instruction: 0xf1b8d010\n \t\t\t; instruction: 0xf0805f00\n \tb\t13e75b0 \n \tstrtmi\tr0, [r0], -r8, lsl #9\n-\tmcr\t7, 7, pc, cr14, cr12, {7}\t; \n+\tmrc\t7, 7, APSR_nzcv, cr0, cr12, {7}\n \ttstcs\tr0, r2, lsr #12\n \tcmpeq\tr0, #-2147483647\t; 0x80000001\t; \n \tmovwls\tr4, #34434\t; 0x8682\n-\tsvc\t0x00f2f7fc\n+\tsvc\t0x00f4f7fc\n \tmovwcs\tr6, #3124\t; 0xc34\n \tcfstrscs\tmvf6, [r0], {51}\t; 0x33\n \t\t\t; instruction: 0xf106d047\n \tldrtmi\tr0, [r1], r0, asr #2\n \tldrmi\tr9, [sp], -r9, lsl #14\n \t\t\t; instruction: 0x461e461f\n \ttstls\tr7, r4, lsl #6\n \tldmdavs\tr9!, {r1, r2, sp, lr, pc}\n \teorvs\tr4, r1, r6, lsl r6\n \t\t\t; instruction: 0x4627603c\n \t\t\t; instruction: 0x461cb353\n \tstrbmi\tr6, [r1], -r0, ror #16\n-\tsvc\t0x0066f7fc\n+\tsvc\t0x0068f7fc\n \tcfmsuba32ne\tmvax5, mvax4, mvfx10, mvfx11\n \tsvclt\t0x00186823\n \tldrbmi\tr2, [r9, #-513]\t; 0xfffffdff\n \tsvclt\t0x0018460d\n \tbcs\tfbdc \n \tcmnlt\tlr, r9, ror #3\n \tcmplt\tr9, r9, lsr r8\n \tstrbmi\tr6, [r1], -r8, asr #16\n \tandcc\tlr, r5, #3358720\t; 0x334000\n-\tsvc\t0x0052f7fc\n+\tsvc\t0x0054f7fc\n \tandcc\tlr, r5, #3620864\t; 0x374000\n \tsvclt\t0x00184559\n \teorvc\tpc, r1, sl, asr #16\n \teorvs\tpc, r5, sl, asr r8\t; \n \tldmdavs\tr1!, {r1, r2, r8, r9, ip, sp, pc}\n \teorvs\tr4, r1, r7, lsr #12\n \t\t\t; instruction: 0xf85a2600\n \tandvs\tr1, ip, r5, lsr #32\n \tbicsle\tr2, r4, r0, lsl #22\n \tstrbmi\tr9, [lr], -r9, lsl #30\n \tstmdavs\tr3!, {r1, r3, r6, r8, ip, sp, pc}\n \tldmdavs\tr8, {r0, r1, r3, r4, r5, r8, ip, sp, pc}^\n \t\t\t; instruction: 0xf7fc4641\n-\taddmi\tlr, sp, #56, 30\t; 0xe0\n+\taddmi\tlr, sp, #58, 30\t; 0xe8\n \t\t\t; instruction: 0xf84abf18\n \tldmib\tr6, {r0, r5, lr}^\n \tblls\t20786c \n \tmulle\tr2, r8, r2\n \t\t\t; instruction: 0xf7fc0089\n-\tstmib\tr6, {r2, r3, r5, r7, r8, r9, sl, fp, sp, lr, pc}^\n+\tstmib\tr6, {r1, r2, r3, r5, r7, r8, r9, sl, fp, sp, lr, pc}^\n \tstrb\tsl, [lr, -lr, lsl #16]\n \tldrdne\tpc, [r0], #-137\t; 0xffffff77\n \tstmdbls\tr7, {r0, r5, sp, lr}\n \tsubmi\tpc, r0, r9, asr #17\n \teorne\tpc, r5, sl, asr #16\n \tcmplt\tr1, r1, lsr #16\n \tstrls\tr9, [r4, #-2308]\t; 0xfffff6fc\n@@ -2780,161 +2780,161 @@\n \tandsvs\tr6, pc, fp, lsl r8\t; \n \tstrmi\tlr, [lr], -r3, ror #14\n \tstr\tr9, [r2, r4, lsl #10]!\n \teorsvs\tr6, fp, r3, lsr ip\n \tldmdavs\tfp!, {r0, r1, r2, r4, r5, sl, sp, lr}\n \tldmdavs\tr8, {r0, r1, r3, r5, r8, ip, sp, pc}^\n \t\t\t; instruction: 0xf7fc4641\n-\t\t\t; instruction: 0xf84aef08\n+\t\t\t; instruction: 0xf84aef0a\n \tbls\te3510 \n \tmovteq\tpc, #262\t; 0x106\t; \n \tsmmla\tr0, r3, r0, r6\n \tsvcmi\t0x0080f1b8\n \t\t\t; instruction: 0xf7fcd301\n-\t\t\t; instruction: 0xf7fcefc6\n-\t\t\t; instruction: 0xf7fdeed6\n-\t\t\t; instruction: 0xf7fce87c\n-\tldrbtvs\tlr, [r5], #3824\t; 0xef0\n-\tldmdb\tr4, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\t\t\t; instruction: 0xf7fcefc8\n+\t\t\t; instruction: 0xf7fdeed8\n+\t\t\t; instruction: 0xf7fce87e\n+\tldrbtvs\tlr, [r5], #3826\t; 0xef2\n+\tldmdb\tr6, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tand\tr4, r2, r4, lsl #12\n \t\t\t; instruction: 0xf7fd4604\n-\tldrtmi\tlr, [r8], -r0, ror #18\n+\tldrtmi\tlr, [r8], -r2, ror #18\n \t\t\t; instruction: 0xf7fc210c\n-\tstrtmi\tlr, [r0], -sl, ror #30\n-\tstmib\tr0!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstrtmi\tlr, [r0], -ip, ror #30\n+\tstmib\tr2!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tandeq\tr1, r2, r4, ror #26\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr1, r2, r0, asr #25\n \tsvcmi\t0x00f8e92d\n \tstrmi\tr4, [lr], -r4, lsl #12\n \t\t\t; instruction: 0xf806f7ff\n \tldrsbtge\tpc, [ip], -r0\t; \n \tstrtmi\tr4, [r0], -r7, lsl #12\n \t\t\t; instruction: 0xf7fc4651\n-\t\t\t; instruction: 0xf8d7eed4\n+\t\t\t; instruction: 0xf8d7eed6\n \t\t\t; instruction: 0xf8588038\n \tcmnlt\tfp, r1, lsr #32\n \tpkhbtmi\tr6, fp, sp, lsl #16\n \tldrdls\tpc, [r4], -r5\n \tstrmi\tr4, [r1, #1617]!\t; 0x651\n \tstmdavs\tsp!, {r0, r1, r3, ip, lr, pc}\n \t\t\t; instruction: 0xf8d5b135\n \tstrbmi\tr9, [r8], -r4\n-\tmcr\t7, 6, pc, cr0, cr12, {7}\t; \n+\tmcr\t7, 6, pc, cr2, cr12, {7}\t; \n \trscsle\tr4, r3, fp, lsl #11\n \tldmfd\tsp!, {sp}\n \tstmdavs\tip!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tstccs\t6, cr4, [r0], {34}\t; 0x22\n \tldmdavs\tr3, {r1, r4, r5, ip, lr, pc}^\n \tmlale\tip, r9, r5, r4\n \tsmlatble\tr4, sl, r2, r4\n \taddsmi\tlr, r4, #63438848\t; 0x3c80000\n \t\t\t; instruction: 0x4625d0f0\n \tstmiavs\tfp!, {r2, r5, fp, sp, lr}\n \tldrhle\tr4, [r8, #35]!\t; 0x23\n \tldrbmi\tr6, [r1], -r8, ror #16\n-\tmcr\t7, 5, pc, cr6, cr12, {7}\t; \n+\tmcr\t7, 5, pc, cr8, cr12, {7}\t; \n \teorcs\tpc, r1, r8, asr r8\t; \n \tldrmi\tr4, [r3], -r9, lsl #13\n \tldmdavs\tfp, {r1, r2, r3, r4, r9, sl, lr}\n \t\t\t; instruction: 0xd1fb429d\n \t\t\t; instruction: 0xd01942b2\n \tstmdavs\tr0!, {r2, r6, r8, ip, sp, pc}^\n \t\t\t; instruction: 0xf7fc4651\n-\tstrmi\tlr, [r9, #3736]\t; 0xe98\n+\tstrmi\tlr, [r9, #3738]\t; 0xe9a\n \t\t\t; instruction: 0xf848bf1c\n \tstmdavs\tip!, {r0, r5, sp, lr}\n \ttstcs\tip, r8, lsr #12\n \t\t\t; instruction: 0xf7fc6034\n-\tldclvs\t15, cr14, [fp], #-56\t; 0xffffffc8\n+\tldclvs\t15, cr14, [fp], #-64\t; 0xffffffc0\n \tblcc\t4f584 \n \tpop\t{r0, r1, r3, r4, r5, r6, sl, sp, lr}\n \tldmdavs\tr2, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tbicle\tr2, ip, r0, lsl #20\n \tldrb\tr2, [r4, r0, lsl #4]\n \tstmdavs\tr0!, {r2, r5, r7, r8, ip, sp, pc}^\n \t\t\t; instruction: 0xf7fc4651\n-\tstrmi\tlr, [r9, #3710]\t; 0xe7e\n+\tstrmi\tlr, [r9, #3712]\t; 0xe80\n \t\t\t; instruction: 0xf848d0e8\n \t\t\t; instruction: 0xf8586021\n \t\t\t; instruction: 0xf1073029\n \taddsmi\tr0, r3, #64, 4\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tldrtvs\tfp, [ip], #-3848\t; 0xfffff0f8\n \teorcc\tpc, r9, r8, asr #16\n \tldrb\tr6, [r9, ip, lsr #16]\n \t\t\t; instruction: 0xe7f24633\n \tpush\t{r0, r1, r6, r9, fp, lr}\n \t\t\t; instruction: 0x460c41f0\n \tldrbtmi\tr4, [sl], #-2882\t; 0xfffff4be\n \tstmdavs\tr5!, {r1, r6, r8, r9, sl, fp, lr}^\n \t\t\t; instruction: 0xf8dfb084\n-\tldrbtmi\tr8, [pc], #-264\t; 75d8 \n+\tldrbtmi\tr8, [pc], #-264\t; 75d8 \n \t\t\t; instruction: 0x463958d3\n \tstrtmi\tr4, [r8], -r6, lsl #12\n \tmovwls\tr6, #14363\t; 0x381b\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0xf7fc44f8\n-\tstmdacs\tr1, {r1, r5, r7, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr1, {r2, r5, r7, r8, r9, sl, fp, sp, lr, pc}\n \tandcs\tsp, r0, sp\n \tblmi\tdd9ee0 \n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\te1668 \n \t\t\t; instruction: 0xf04f405a\n \tteqle\tsp, r0, lsl #6\n \tpop\t{r2, ip, sp, pc}\n \t\t\t; instruction: 0x462881f0\n \t\t\t; instruction: 0xf7fc4639\n-\tstrmi\tlr, [r5], -r2, lsl #28\n+\tstrmi\tlr, [r5], -r4, lsl #28\n \teorsle\tr2, r5, r0, lsl #16\n \tstmib\tsp, {r0, r1, fp, sp, lr}^\n \tmovwcc\tr0, #4097\t; 0x1001\n \t\t\t; instruction: 0xf7fd6003\n-\t\t\t; instruction: 0x4601e932\n+\t\t\t; instruction: 0x4601e934\n \t\t\t; instruction: 0xf7fd4628\n-\t\t\t; instruction: 0x4607e812\n+\t\t\t; instruction: 0x4607e814\n \teorsle\tr2, pc, r0, lsl #16\n \tblcc\t616e8 \n \tbiclt\tr6, r3, fp, lsr #32\n \teorvs\tr3, fp, r1, lsl #22\n \tbmi\t9f3d94 \n \tldrbtmi\tr6, [sl], #-3195\t; 0xfffff385\n \tsmullsle\tr4, r0, r3, r2\n \t\t\t; instruction: 0xb1286870\n \t\t\t; instruction: 0xf7fc6879\n-\tstmdacs\tr0, {r1, r2, r3, r4, r5, r6, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r7, r8, r9, sl, fp, sp, lr, pc}\n \tldclvs\t0, cr13, [fp], #-804\t; 0xfffffcdc\n \t\t\t; instruction: 0x46204639\n \t\t\t; instruction: 0x46034798\n \tsbcle\tr2, r2, r0, lsl #16\n \tadcsvs\tr2, r3, r1\n \tstrtmi\tlr, [r8], -r0, asr #15\n-\tmrc\t7, 6, APSR_nzcv, cr2, cr12, {7}\n+\tmrc\t7, 6, APSR_nzcv, cr4, cr12, {7}\n \tstrb\tr6, [r1, fp, lsr #16]!\n \t\t\t; instruction: 0xf7fc4628\n-\tstrb\tlr, [r0, lr, asr #29]!\n-\tsvc\t0x008af7fc\n+\tubfx\tlr, r0, #29, #1\n+\tsvc\t0x008cf7fc\n \t\t\t; instruction: 0xf7fc2014\n-\t\t\t; instruction: 0x4604ee1c\n+\t\t\t; instruction: 0x4604ee1e\n \tblx\tfe0c5688 \n \t\t\t; instruction: 0x46204b14\n \tldrbtmi\tr4, [sl], #-2580\t; 0xfffff5ec\n \tandne\tpc, r3, r8, asr r8\t; \n-\tldm\tsl, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldm\tip, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tstmdage\tr1, {r2, r9, sl, lr}\n \tblx\t4436d0 \n \t\t\t; instruction: 0xf009a802\n \tstrtmi\tpc, [r0], -sp, lsl #20\n-\tstmia\tr8!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmia\tsl!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldrbtmi\tr4, [r8], #-2061\t; 0xfffff7f3\n \t\t\t; instruction: 0xf92af7fd\n \tstrtmi\tr4, [r0], -r3, lsl #12\n \t\t\t; instruction: 0xf7fc461c\n-\tstrtmi\tlr, [r0], -sl, lsl #29\n-\tldm\tip, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstrtmi\tlr, [r0], -ip, lsl #29\n+\tldm\tlr, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tandeq\tr1, r2, r6, lsr sl\n \t\t\t; instruction: 0x000002b8\n \tstrheq\tlr, [r0], -lr\t; \n \tandeq\tr1, r2, r8, lsl sl\n \tandeq\tr1, r2, r8, lsl #20\n \t\t\t; instruction: 0xffffe277\n \tandeq\tr0, r0, r4, lsr #5\n@@ -2953,15 +2953,15 @@\n \t\t\t; instruction: 0xf89580e9\n \t\t\t; instruction: 0x46042030\n \tumaalcc\tpc, r8, r0, r8\t; \n \tsbceq\tpc, r0, #134217731\t; 0x8000003\n \torreq\tpc, r0, #201326595\t; 0xc000003\n \t\t\t; instruction: 0xd178429a\n \tbvs\t1a2173c \n-\tstcl\t7, cr15, [lr, #1008]!\t; 0x3f0\n+\tldcl\t7, cr15, [r0, #1008]!\t; 0x3f0\n \t\t\t; instruction: 0xf8d36823\n \tstmiblt\tr3, {r4, r7, ip, sp}^\n \tldmib\tr4, {r1, r2, r3, r6, r8, ip, sp, pc}^\n \tstrbmi\tr7, [r7, #-3084]!\t; 0xfffff3f4\n \tstmiavs\tsl!, {r1, r3, r4, ip, lr, pc}\n \tmovweq\tpc, #33031\t; 0x8107\t; \n \tstrcs\tlr, [r0], -r7, asr #19\n@@ -2999,21 +2999,21 @@\n \tandeq\tpc, r8, #-2147483648\t; 0x80000000\n \t\t\t; instruction: 0xf10bd1f6\n \tstrbmi\tr0, [fp], #-776\t; 0xfffffcf8\n \tsvceq\t0x0000f1ba\n \tbl\tfeb3b800 \n \tldrbmi\tr0, [r0], -sl, lsl #2\n \t\t\t; instruction: 0xf7fc9301\n-\tblls\t82f3c \n+\tblls\t82f44 \n \tmovwls\tlr, #47556\t; 0xb9c4\n \teorshi\tpc, r4, r4, asr #17\n \t\t\t; instruction: 0xf64fe7ad\n \t\t\t; instruction: 0xf6c778f8\n \t\t\t; instruction: 0x464078ff\n-\tstc\t7, cr15, [sl], #1008\t; 0x3f0\n+\tstc\t7, cr15, [ip], #1008\t; 0x3f0\n \tldrsbtgt\tpc, [r4], -r4\t; \n \tstrmi\tr4, [r0], #1665\t; 0x681\n \tmovweq\tpc, #33024\t; 0x8100\t; \n \tldrmi\tlr, [r0, #1995]\t; 0x7cb\n \tldrmi\tfp, [r0], r8, lsr #30\n \tstmiaeq\tr8, {r0, r1, r2, r3, r6, r9, fp, sp, lr, pc}^\n \tldmdavs\tr9!, {r0, r1, r2, r3, r5, r6, r7, r8, r9, sl, sp, lr, pc}^\n@@ -3023,50 +3023,50 @@\n \tblx\tfffc385e \n \t\t\t; instruction: 0xf7fd9801\n \tcdpge\t14, 3, cr15, cr3, cr15, {7}\n \tldrtmi\tr6, [r0], -r9, ror #16\n \tblx\tffdc386e \n \t\t\t; instruction: 0x21004a9e\n \tldrbtmi\tr4, [sl], #-1584\t; 0xfffff9d0\n-\tldcl\t7, cr15, [r6, #1008]\t; 0x3f0\n+\tldcl\t7, cr15, [r8, #1008]\t; 0x3f0\n \tstmdage\tsp!, {r0, r9, sl, lr}\n \t\t\t; instruction: 0xf00b9001\n \tldmibmi\tsl, {r0, r4, r6, r7, r8, fp, ip, sp, lr, pc}\n \tldrbtmi\tr9, [r9], #-2049\t; 0xfffff7ff\n-\tldmda\tlr, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmda\tr0!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tstmdage\tr7!, {r0, r9, sl, lr}\n \t\t\t; instruction: 0xf00b9001\n \t\t\t; instruction: 0xf895f9c7\n \tstmdals\tr1, {r4, r5, ip, sp}\n \tsvceq\t0x0008f013\n \tldmibmi\tr3, {r1, r3, r4, r5, r6, r8, ip, lr, pc}\n \t\t\t; instruction: 0xf7fd4479\n-\t\t\t; instruction: 0x4601e810\n+\t\t\t; instruction: 0x4601e812\n \tandls\tsl, r1, r1, lsr #16\n \t\t\t; instruction: 0xf9b8f00b\n \tstmdals\tr1, {r0, r1, r2, r3, r7, r8, fp, lr}\n \t\t\t; instruction: 0xf7fd4479\n-\tstrmi\tlr, [r1], -r6, lsl #16\n+\tstrmi\tlr, [r1], -r8, lsl #16\n \tandls\tsl, r1, fp, lsl r8\n \t\t\t; instruction: 0xf9aef00b\n \tandne\tlr, r3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf7fc9801\n-\t\t\t; instruction: 0x4601ee36\n+\t\t\t; instruction: 0x4601ee38\n \tandls\tsl, r1, r5, lsl r8\n \t\t\t; instruction: 0xf9a4f00b\n \tstmdals\tr1, {r1, r2, r7, r8, fp, lr}\n \t\t\t; instruction: 0xf7fc4479\n-\t\t\t; instruction: 0x4601eff2\n+\t\t\t; instruction: 0x4601eff4\n \tandls\tsl, r1, pc, lsl #16\n \t\t\t; instruction: 0xf99af00b\n \tumaalcc\tpc, r8, r4, r8\t; \n \t\t\t; instruction: 0xf0139801\n \tcmple\tsl, r4, lsl #30\n \tldrbtmi\tr4, [r9], #-2431\t; 0xfffff681\n-\tsvc\t0x00e2f7fc\n+\tsvc\t0x00e4f7fc\n \tstmdage\tr9, {r0, r9, sl, lr}\n \t\t\t; instruction: 0xf00b9001\n \tstmdals\tr1, {r0, r1, r3, r7, r8, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf834f7fd\n \tldmdage\tr5, {r0, r3, r4, r5, r6, fp, sp, lr}\n \tstmdavc\tfp, {r0, ip, pc}\n \tsvclt\t0x00082b2a\n@@ -3074,103 +3074,103 @@\n \tstmdals\tr1, {r0, r3, r4, r7, r8, r9, fp, ip, sp, lr, pc}\n \tmcr2\t7, 4, pc, cr10, cr13, {7}\t; \n \tstmdavs\tr9!, {r0, r1, r4, r5, r9, sl, fp, sp, pc}^\n \t\t\t; instruction: 0xf0094630\n \tbmi\t1cc6758 \n \tldrtmi\tr2, [r0], -r0, lsl #2\n \t\t\t; instruction: 0xf7fc447a\n-\t\t\t; instruction: 0x4601ed72\n+\t\t\t; instruction: 0x4601ed74\n \tandls\tsl, r1, sp, lsr #16\n \t\t\t; instruction: 0xf96cf00b\n \tstmdals\tr1, {r0, r2, r3, r5, r6, r8, fp, lr}\n \t\t\t; instruction: 0xf7fc4479\n-\t\t\t; instruction: 0x4601efba\n+\t\t\t; instruction: 0x4601efbc\n \tandls\tsl, r1, r7, lsr #16\n \t\t\t; instruction: 0xf962f00b\n \tandsne\tlr, r5, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf7fc9801\n-\tstrmi\tlr, [r1], -sl, ror #27\n+\tstrmi\tlr, [r1], -ip, ror #27\n \tandls\tsl, r1, r1, lsr #16\n \t\t\t; instruction: 0xf958f00b\n \tstmdals\tr1, {r2, r5, r6, r8, fp, lr}\n \t\t\t; instruction: 0xf7fc4479\n-\tstrmi\tlr, [r1], -r6, lsr #31\n+\tstrmi\tlr, [r1], -r8, lsr #31\n \tandls\tsl, r1, fp, lsl r8\n \t\t\t; instruction: 0xf94ef00b\n \t\t\t; instruction: 0xf7fc9801\n \t\t\t; instruction: 0xf7fcfff7\n-\tldmdbmi\tlr, {r3, r4, r9, sl, fp, sp, lr, pc}^\n+\tldmdbmi\tlr, {r1, r3, r4, r9, sl, fp, sp, lr, pc}^\n \t\t\t; instruction: 0xe7b34479\n \tldrbtmi\tr4, [r9], #-2397\t; 0xfffff6a3\n \tldmdami\tsp, {r0, r1, r7, r8, r9, sl, sp, lr, pc}^\n \t\t\t; instruction: 0xf7fc4478\n-\tbls\t282c6c \n+\tbls\t282c74 \n \tstrmi\tsl, [r4], -fp, lsl #22\n \tmulle\tr4, sl, r2\n \tldrmi\tr9, [r0], -fp, lsl #18\n \t\t\t; instruction: 0xf7fc3101\n-\tstmdals\tpc, {r8, sl, fp, sp, lr, pc}\t; \n+\tstmdals\tpc, {r1, r8, sl, fp, sp, lr, pc}\t; \n \taddsmi\tsl, r8, #17408\t; 0x4400\n \tldmdbls\tr1, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tldmdals\tr5, {r3, r4, r5, r6, r7, sl, fp, sp, lr, pc}\n+\tldmdals\tr5, {r1, r3, r4, r5, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #23552\t; 0x5c00\n \tldmdbls\tr7, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tldmdals\tfp, {r4, r5, r6, r7, sl, fp, sp, lr, pc}\n+\tldmdals\tfp, {r1, r4, r5, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #29696\t; 0x7400\n \tldmdbls\tsp, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tstmdals\tr1!, {r3, r5, r6, r7, sl, fp, sp, lr, pc}\n+\tstmdals\tr1!, {r1, r3, r5, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #35840\t; 0x8c00\n \tstmdbls\tr3!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tstmdals\tr7!, {r5, r6, r7, sl, fp, sp, lr, pc}\n+\tstmdals\tr7!, {r1, r5, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #41984\t; 0xa400\n \tstmdbls\tr9!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tstmdals\tsp!, {r3, r4, r6, r7, sl, fp, sp, lr, pc}\n+\tstmdals\tsp!, {r1, r3, r4, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #48128\t; 0xbc00\n \tstmdbls\tpc!, {r0, r1, ip, lr, pc}\t; \n \t\t\t; instruction: 0xf7fc3101\n-\tldmdals\tr3!, {r4, r6, r7, sl, fp, sp, lr, pc}\n+\tldmdals\tr3!, {r1, r4, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #54272\t; 0xd400\n \tldmdbls\tr5!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tstmdals\tr3, {r3, r6, r7, sl, fp, sp, lr, pc}\n+\tstmdals\tr3, {r1, r3, r6, r7, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #5120\t; 0x1400\n \tstmdbls\tr5, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tstrtmi\tlr, [r0], -r0, asr #25\n-\tmrc\t7, 7, APSR_nzcv, cr6, cr12, {7}\n+\tstrtmi\tlr, [r0], -r2, asr #25\n+\tmrc\t7, 7, APSR_nzcv, cr8, cr12, {7}\n \tblge\t76e28c \n \taddsmi\tr4, sl, #4, 12\t; 0x400000\n \tldmdbls\tsp, {r2, ip, lr, pc}\n \ttstcc\tr1, r0, lsl r6\n-\tldc\t7, cr15, [r2], #1008\t; 0x3f0\n+\tldc\t7, cr15, [r4], #1008\t; 0x3f0\n \tblge\t8edab8 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r3, lsr #18\n-\tstc\t7, cr15, [sl], #1008\t; 0x3f0\n+\tstc\t7, cr15, [ip], #1008\t; 0x3f0\n \tblge\ta6dae0 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r9, lsr #18\n-\tstc\t7, cr15, [r2], #1008\t; 0x3f0\n+\tstc\t7, cr15, [r4], #1008\t; 0x3f0\n \tblge\tbedb08 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, pc, lsr #18\n-\tldc\t7, cr15, [sl], {252}\t; 0xfc\n+\tldc\t7, cr15, [ip], {252}\t; 0xfc\n \tblge\td6db30 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r5, lsr r9\n-\tldc\t7, cr15, [r2], {252}\t; 0xfc\n+\tldc\t7, cr15, [r4], {252}\t; 0xfc\n \tblge\t5edac8 \n \tsmullle\tr4, lr, r8, r2\n \ttstcc\tr1, r7, lsl r9\n-\tstc\t7, cr15, [sl], {252}\t; 0xfc\n+\tstc\t7, cr15, [ip], {252}\t; 0xfc\n \tstrmi\tlr, [r4], -r9, asr #15\n \t\t\t; instruction: 0x4604e7d4\n \t\t\t; instruction: 0x4604e7da\n \tstrmi\tlr, [r4], -r0, ror #15\n \tstrmi\tlr, [r4], -r6, ror #15\n \tstrmi\tlr, [r4], -ip, ror #15\n \t\t\t; instruction: 0x4604e77d\n@@ -3280,39 +3280,39 @@\n \t\t\t; instruction: 0xf10e4565\n \tmvnsle\tr0, r0, lsl lr\n \tandseq\tpc, r0, #-2147483646\t; 0x80000002\n \t\t\t; instruction: 0xf1b94442\n \tandle\tr0, r6, r0, lsl #30\n \tsmlatbeq\tr9, fp, fp, lr\n \tandls\tr4, r2, #72, 12\t; 0x4800000\n-\tbl\tfe7c5c48 \n+\tbl\tfe845c48 \n \tstmib\tr4, {r1, r9, fp, ip, pc}^\n \tcmnvs\tr7, r3, lsl #4\n \t\t\t; instruction: 0xf10de782\n \t\t\t; instruction: 0xf10d0217\n \tandls\tr0, r0, #1476395008\t; 0x58000000\n \tandeq\tpc, ip, r4, lsl #2\n \t\t\t; instruction: 0xf009aa06\n \tsmmulr\tr2, r3, pc\t; \n \tsvclt\t0x00284287\n \tteqeq\tpc, r7, lsl #12\n \tstmib\tsp, {r3, r4, r5, r9, sl, lr}^\n \t\t\t; instruction: 0xf7fc1302\n-\t\t\t; instruction: 0xf8d6ea6c\n+\t\t\t; instruction: 0xf8d6ea6e\n \t\t\t; instruction: 0xf8d4c008\n \tpkhbtmi\tfp, r0, r4\n \tmovwne\tlr, #10717\t; 0x29dd\n \t\t\t; instruction: 0xf1004407\n \t\t\t; instruction: 0xe7ad0210\n-\tldcl\t7, cr15, [ip], #-1008\t; 0xfffffc10\n+\tldcl\t7, cr15, [lr], #-1008\t; 0xfffffc10\n \tldrbvc\tpc, [r0, pc, asr #12]!\t; \n \tldrbvc\tpc, [pc, r7, asr #13]!\t; \n \tstmdami\tsl, {r3, r5, r6, r7, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf7fc4478\n-\tstmdami\tr9, {r5, r8, r9, fp, sp, lr, pc}\n+\tstmdami\tr9, {r1, r5, r8, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fc4478\n \tstmdami\tr8, {r0, r1, r3, r5, r9, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fc4478\n \tsvclt\t0x0000fe27\n \tandeq\tr1, r2, r8, lsl #10\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr1, r2, r6, ror r4\n@@ -3320,22 +3320,22 @@\n \t\t\t; instruction: 0x0000dab4\n \tldrdeq\tsp, [r0], -r0\n \tandeq\tsp, r0, r0, asr fp\n \t\t\t; instruction: 0x4604b510\n \tstcvs\t8, cr6, [r3]\n \tstrvs\tr3, [r3, #2817]\t; 0xb01\n \tldfltd\tf3, [r0, #-12]\n-\tldc\t7, cr15, [sl, #1008]\t; 0x3f0\n+\tldc\t7, cr15, [ip, #1008]\t; 0x3f0\n \tstmdblt\tfp, {r0, r1, r5, r6, r8, fp, ip, sp, lr}^\n \tblx\tffdc5cfa \n \t\t\t; instruction: 0xf8d02100\n \t\t\t; instruction: 0xf7fc00e4\n-\tmovwcs\tlr, #3268\t; 0xcc4\n+\tmovwcs\tlr, #3270\t; 0xcc6\n \tldflts\tf7, [r0, #-140]\t; 0xffffff74\n-\tb\t1dc5d04 \n+\tb\t1e45d04 \n \tsvclt\t0x0000e7f2\n \tsvcmi\t0x00f0e92d\n \t\t\t; instruction: 0xf8df4615\n \tvpush\t{d2-d21}\n \tadcslt\tr8, sp, r2, lsl #22\n \t\t\t; instruction: 0xf8d1447a\n \tmovwls\tsl, #20480\t; 0x5000\n@@ -3347,79 +3347,79 @@\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tblcc\t1460c8 \n \tmovwls\tr4, #38011\t; 0x947b\n \ttstls\tr4, #0, 6\n \tstmib\tsp, {r8, r9, sp}^\n \tstmdacs\tr0, {r1, r4, r8, r9, sp}\n \tldrhi\tpc, [ip, #-0]!\n-\tldc\t7, cr15, [lr, #1008]!\t; 0x3f0\n+\tstcl\t7, cr15, [r0, #1008]\t; 0x3f0\n \tandls\tsl, lr, r2, lsl fp\n \ttstcs\tr0, lr, lsl #20\n \tmcr\t6, 0, r4, cr8, cr8, {0}\n \t\t\t; instruction: 0xf0093a90\n \t\t\t; instruction: 0xf8dafdef\n \tblls\t387d8c \n \tandcc\tpc, r0, sl, asr #17\n \t\t\t; instruction: 0xf7fcb160\n-\tandls\tlr, sp, lr, lsr #27\n+\t\t\t; instruction: 0x900dedb0\n \ttstne\tr3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf0004299\n \t\t\t; instruction: 0xf841854b\n \ttstls\tr3, r4, lsl #22\n \tandeq\tpc, r4, sl, asr #17\n \t\t\t; instruction: 0x4703e9da\n \tsvclt\t0x001f42bc\n \t\t\t; instruction: 0xf10d3410\n \t\t\t; instruction: 0xf10d0864\n \t\t\t; instruction: 0xf10d09d4\n \t\t\t; instruction: 0xd1100bdc\n \t\t\t; instruction: 0xf7fce04d\n-\tmulsls\tr0, r4, sp\n+\tmulsls\tr0, r6, sp\n \ttstne\tr3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf0004299\n \t\t\t; instruction: 0xf8418419\n \ttstls\tr3, r4, lsl #22\n \tstceq\t8, cr15, [ip], {68}\t; 0x44\n \tadcsmi\tr3, r7, #16, 8\t; 0x10000000\n \t\t\t; instruction: 0xf854d03d\n \t\t\t; instruction: 0x46260c10\n \t\t\t; instruction: 0xf7fcb160\n-\tandsls\tlr, r9, r0, lsl #27\n+\tandsls\tlr, r9, r2, lsl #27\n \ttstne\tr3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf0004299\n \t\t\t; instruction: 0xf841840d\n \ttstls\tr3, r4, lsl #22\n \tldceq\t8, cr15, [r0], {68}\t; 0x44\n \tstceq\t8, cr15, [ip], {84}\t; 0x54\n \tbicsle\tr2, sl, r0, lsl #16\n \tstceq\t8, cr15, [r8], {84}\t; 0x54\n \trscle\tr2, r3, r0, lsl #16\n-\tstmib\tr4!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tr6!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf0002800\n \tandsls\tr8, r9, r3, asr #14\n \tstrbmi\tr4, [r8], -r1, asr #12\n \tblx\tfeac3e3e \n \t\t\t; instruction: 0xf7fc9835\n-\tandls\tlr, pc, r0, ror #26\n+\tandls\tlr, pc, r2, ror #26\n \ttstne\tr3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf0004299\n \t\t\t; instruction: 0xf84184b6\n \ttstls\tr3, r4, lsl #22\n \tstceq\t8, cr15, [ip], {68}\t; 0x44\n \tldrbmi\tr9, [r8, #-2101]\t; 0xfffff7cb\n \tldmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tstrbmi\tlr, [r0], -r8, lsr #21\n+\tstrbmi\tlr, [r0], -sl, lsr #21\n \t\t\t; instruction: 0xf0083410\n \tadcsmi\tpc, r7, #1008\t; 0x3f0\n \t\t\t; instruction: 0xf8dad1c1\n \t\t\t; instruction: 0xf8df4000\n \t\t\t; instruction: 0x462019fc\n \t\t\t; instruction: 0xf7fc4479\n-\tstmdacs\tr0, {r1, r3, r5, r7, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r2, r3, r5, r7, sl, fp, sp, lr, pc}\n \tmvnhi\tpc, #64\t; 0x40\n \t\t\t; instruction: 0xf89a2001\n \tstrcs\tr3, [r0], -sp, lsr #32\n \t\t\t; instruction: 0xf88d961e\n \tvqadd.u32\tq11, q0, q14\n \t\t\t; instruction: 0xf88a0300\n \tblge\t7d3f34 \n@@ -3454,15 +3454,15 @@\n \ttstls\tr8, #0, 6\n \t\t\t; instruction: 0xf810f008\n \tstrmi\tsl, [r1], -pc, lsr #24\n \t\t\t; instruction: 0xf0084620\n \t\t\t; instruction: 0xf8dffa21\n \t\t\t; instruction: 0x46201958\n \t\t\t; instruction: 0xf7fc4479\n-\tstcge\t12, cr14, [r9], #-816\t; 0xfffffcd0\n+\tstcge\t12, cr14, [r9], #-824\t; 0xfffffcc8\n \tstrtmi\tr4, [r0], -r1, lsl #12\n \tcdp2\t0, 7, cr15, cr4, cr10, {0}\n \ttstls\tsl, #4, 22\t; 0x1000\n \t\t\t; instruction: 0xf8df4638\n \tldrbtmi\tr3, [fp], #-2368\t; 0xfffff6c0\n \tmovwcs\tr9, #795\t; 0x31b\n \t\t\t; instruction: 0xf007931c\n@@ -3470,32 +3470,32 @@\n \tldrmi\tr4, [r8], -r1, lsl #12\n \t\t\t; instruction: 0xf008461f\n \tldrtmi\tpc, [sl], -r5, lsl #20\t; \n \tstmdage\tr3!, {r0, r5, r9, sl, lr}\n \tldc2l\t0, cr15, [r4], #20\n \teorne\tlr, r3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf7fca81d\n-\tstmdals\tr3!, {r1, r2, r5, r6, r7, r9, fp, sp, lr, pc}\n+\tstmdals\tr3!, {r3, r5, r6, r7, r9, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #37888\t; 0x9400\n \tstmdbls\tr5!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tldmdals\tr5!, {r2, r3, r4, r9, fp, sp, lr, pc}\n+\tldmdals\tr5!, {r1, r2, r3, r4, r9, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #56320\t; 0xdc00\n \tldmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tldmdage\tip, {r2, r4, r9, fp, sp, lr, pc}\n+\tldmdage\tip, {r1, r2, r4, r9, fp, sp, lr, pc}\n \tstc2\t0, cr15, [ip, #32]!\n \tblge\taee01c \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, lsr #18\n-\tb\t245f74 \n+\tb\t2c5f74 \n \tblge\tc6e044 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r1, lsr r9\n-\tb\t45f84 \n+\tb\tc5f84 \n \tldmdage\tr8, {r0, r1, r8, r9, fp, ip, pc}\n \t\t\t; instruction: 0xf0089304\n \tstmdavc\tip!, {r0, r1, r2, r4, r7, r8, sl, fp, ip, sp, lr, pc}^\n \tteqlt\tip, #4194304\t; 0x400000\n \torrle\tr2, r4, fp, ror ip\n \tstccs\t8, cr7, [sl], #-432\t; 0xfffffe50\n \teorshi\tpc, r0, #0\n@@ -3506,43 +3506,43 @@\n \tmovwcs\tlr, #14810\t; 0x39da\n \tbl\tfed8ea34 \n \t\t\t; instruction: 0xf0801f23\n \tteqeq\tr3, r6, lsr r2\n \tstmdbcs\tr0, {r0, r4, r6, r7, fp, ip, lr}\n \teorshi\tpc, r1, #0\n \t\t\t; instruction: 0x4620ac1d\n-\tstcl\t7, cr15, [r2], #-1008\t; 0xfffffc10\n+\tstcl\t7, cr15, [r4], #-1008\t; 0xfffffc10\n \tstmne\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tmrrc\t7, 15, pc, ip, cr12\t; \n+\tmrrc\t7, 15, pc, lr, cr12\t; \n \tstrcc\tr7, [r1, #-2156]\t; 0xfffff794\n \tbicsle\tr2, r7, r0, lsl #24\n \taddsmi\tr9, lr, #72, 22\t; 0x12000\n \tstrbhi\tpc, [r8], -r0, asr #32\t; \n \tmovwcs\tlr, #18909\t; 0x49dd\n \teorcc\tpc, r2, r3, asr r8\t; \n \tblcs\t2cc1c \n \tstrbhi\tpc, [r0], -r0, asr #32\t; \n \t\t\t; instruction: 0xf7fc981d\n-\tandls\tlr, ip, r8, ror #24\n+\tandls\tlr, ip, sl, ror #24\n \ttstne\tr3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf0004299\n \t\t\t; instruction: 0xf841840d\n \ttstls\tr3, r4, lsl #22\n \t\t\t; instruction: 0x4c04e9da\n \tandeq\tpc, r8, sl, asr #17\n \teorsle\tr4, r0, r4, lsr #11\n \tldrdvc\tpc, [ip], -sl\n \tmvnsvc\tpc, #82837504\t; 0x4f00000\n \tmvnsvc\tpc, #208666624\t; 0xc700000\n \taddsmi\tr1, sp, #234496\t; 0x39400\n \tldrhi\tpc, [sl, #-512]\t; 0xfffffe00\n \t\t\t; instruction: 0xf0002d00\n \t\t\t; instruction: 0x462882fa\n-\tstm\tr8, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstm\tsl, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldrd\tpc, [ip], -sl\n \t\t\t; instruction: 0xf8da4606\n \tbl\t1b80ac \n \tadcsmi\tr0, ip, #327680\t; 0x50000\n \tldrthi\tpc, [r8], #0\t; \n \tldmdbne\tfp!, {sl, sp}\n \tstmdbeq\tr4, {r1, r2, r8, r9, fp, sp, lr, pc}\n@@ -3551,74 +3551,74 @@\n \tmvnsle\tr0, pc\n \tstmib\tsl, {r0, r2, r4, r5, sl, lr}^\n \t\t\t; instruction: 0xf8ca6503\n \t\t\t; instruction: 0xf1be8014\n \tandle\tr0, r4, r0, lsl #30\n \tsmlatbeq\tlr, ip, fp, lr\n \t\t\t; instruction: 0xf7fc4670\n-\tblls\t124269c \n+\tblls\t12426a4 \n \teorscc\tpc, r0, sl, lsr #17\n \tldrdcc\tpc, [r0], #-138\t; 0xffffff76\n \t\t\t; instruction: 0xf8dfb303\n \tstmdbls\tr9, {r3, r6, r7, r8, r9, sl, sp}\n \tstmpl\tsl, {r3, r4, r6, fp, sp, lr}\n \t\t\t; instruction: 0xf0004290\n \t\t\t; instruction: 0xf8df82d3\n \tstcls\t7, cr2, [r9], {188}\t; 0xbc\n \taddmi\tr5, r8, #10551296\t; 0xa10000\n \tsubshi\tpc, r9, #0\n-\tldm\tlr, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmia\tr0!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrdcc\tpc, [r0], #-138\t; 0xffffff76\n \t\t\t; instruction: 0xf0402800\n \t\t\t; instruction: 0xf8df8252\n \tstmiapl\tr2!, {r2, r5, r7, r8, r9, sl, sp}\n \tmulle\tr5, r3, r2\n \tldrdne\tpc, [r0], -sl\n \tblcs\t17e6108 \n \tstrthi\tpc, [r8], #64\t; 0x40\n \t\t\t; instruction: 0xf7fc2010\n-\t\t\t; instruction: 0xf8cae83e\n+\t\t\t; instruction: 0xf8cae840\n \ttstcs\tr0, r8, lsr r0\n \tstrcs\tr6, [r3], #-1\n \taddvs\tr6, r1, r1, asr #32\n \t\t\t; instruction: 0xf8df60c1\n \t\t\t; instruction: 0xf8da277c\n \t\t\t; instruction: 0xf8da3038\n \tldrbtmi\tr0, [sl], #-0\n \tstmib\tr3, {r4, r8, ip, pc}^\n \taddsvs\tr0, ip, r0, lsl #4\n \t\t\t; instruction: 0xf8df9b0b\n \tldmdavs\tr8, {r3, r5, r6, r8, r9, sl, sp}\n \tandsvs\tr4, r9, sl, ror r4\n-\tb\t1e4610c \n+\tb\t1ec610c \n \tandsls\tr4, r0, r4, lsl #12\n \t\t\t; instruction: 0xf0002800\n \t\t\t; instruction: 0xf8df850c\n \tldrbtmi\tr1, [r9], #-1876\t; 0xfffff8ac\n-\tstmib\tsl, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tip, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf0402800\n \t\t\t; instruction: 0xf8da84f4\n \tldmib\tsp, {r2, r3, r4, r5}^\n \taddsmi\tr3, r3, #536870913\t; 0x20000001\n \ttstls\tr3, #24, 30\t; 0x60\n \tmovwls\tr2, #62208\t; 0xf300\n \t\t\t; instruction: 0xf8dfb190\n \tldrbtmi\tr1, [r9], #-1844\t; 0xfffff8cc\n-\tstmib\tlr!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmib\tr0!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldrsbtcc\tpc, [ip], -sl\t; \n \t\t\t; instruction: 0xf0002801\n \t\t\t; instruction: 0xf8df841e\n \tldrmi\tr1, [r8], -r4, lsr #14\n \t\t\t; instruction: 0xf7fc4479\n-\tstmdacs\tr1, {r2, r5, r6, r7, r8, fp, sp, lr, pc}\n+\tstmdacs\tr1, {r1, r2, r5, r6, r7, r8, fp, sp, lr, pc}\n \tldrthi\tpc, [r5], #-0\t; \n \t\t\t; instruction: 0xf8da2500\n \t\t\t; instruction: 0x462a0038\n \tmovwcs\tr4, #1569\t; 0x621\n-\tbl\t1bc6170 \n+\tbl\t1c46170 \n \tandsvs\tr9, r8, r8, lsl #22\n \t\t\t; instruction: 0xf0002800\n \tstmdage\tpc, {r0, r1, r5, r7, r8, sl, pc}\t; \n \t\t\t; instruction: 0xf0084656\n \tldmdage\tr0, {r0, r2, r3, r4, r7, sl, fp, ip, sp, lr, pc}\n \tldc2\t0, cr15, [sl], {8}\n \tmovwls\tsl, #39723\t; 0x9b2b\n@@ -3639,15 +3639,15 @@\n \tstrcs\tsp, [r1, -r7, rrx]\n \t\t\t; instruction: 0x463c463d\n \teorcs\tsl, sp, #54272\t; 0xd400\n \t\t\t; instruction: 0x46214618\n \tbcc\t443a08 \n \tmovwls\tsl, #15159\t; 0x3b37\n \t\t\t; instruction: 0xf7fc9335\n-\tblls\td8288c \n+\tblls\td82894 \n \tmovwls\tr2, #19811\t; 0x4d63\n \t\t\t; instruction: 0xf8dfd916\n \tstccc\t6, cr14, [r2], {140}\t; 0x8c\n \t\t\t; instruction: 0xf04f441c\n \tldrbtmi\tr0, [lr], #3172\t; 0xc64\n \tandvc\tpc, pc, r2, asr #4\n \tmovwcs\tpc, #23467\t; 0x5bab\t; \n@@ -3664,96 +3664,96 @@\n \tsubeq\tlr, r5, #3072\t; 0xc00\n \tandspl\tpc, r5, r3, lsl r8\t; \n \tbls\t126390 \n \tblls\t124394 \n \tbeq\t443aac \n \t\t\t; instruction: 0x1640f8df\n \tldrbtmi\tr7, [r9], #-29\t; 0xffffffe3\n-\tbl\t9c6248 \n+\tbl\ta46248 \n \tldcge\t6, cr4, [r1, #-528]!\t; 0xfffffdf0\n \tstrmi\tr9, [r4], -pc, lsr #10\n \tblcc\t2463d4 \n \t\t\t; instruction: 0xf0004563\n \t\t\t; instruction: 0x932f828d\n \tteqls\tr1, #8585216\t; 0x830000\n \tstmdage\tr9!, {r0, r1, r5, r6, fp, sp, lr}\n \tmovwcs\tr9, #816\t; 0x330\n \tandgt\tpc, r0, r4, asr #17\n \trsbvs\tr7, r3, r3, lsr #4\n \teorne\tlr, pc, #3620864\t; 0x374000\n-\tstmdb\tr8, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tsl, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tadcmi\tr9, r8, #3080192\t; 0x2f0000\n \tldmdbls\tr1!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tldmdals\tr5!, {r7, fp, sp, lr, pc}\n+\tldmdals\tr5!, {r1, r7, fp, sp, lr, pc}\n \taddsmi\tr9, r8, #3072\t; 0xc00\n \tldmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\t\t\t; instruction: 0xf8dae878\n+\t\t\t; instruction: 0xf8dae87a\n \tmrsls\tr1, (UNDEF: 3)\n \t\t\t; instruction: 0xf7fc4608\n-\t\t\t; instruction: 0x4602ea32\n+\t\t\t; instruction: 0x4602ea34\n \t\t\t; instruction: 0xf06f982a\n \tstmdbls\tr3, {r6, r8, r9, lr}\n \taddsmi\tr1, sl, #110592\t; 0x1b000\n \t\t\t; instruction: 0x83aaf200\n \tstrtmi\tsl, [r0], -r9, lsr #24\n-\tstmdb\tr6!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmdb\tr8!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0x910368b1\n \t\t\t; instruction: 0xf7fc4608\n-\tstrmi\tlr, [r2], -r0, lsr #20\n+\tstrmi\tlr, [r2], -r2, lsr #20\n \t\t\t; instruction: 0xf06f982a\n \tstmdbls\tr3, {r6, r8, r9, lr}\n \taddsmi\tr1, sl, #110592\t; 0x1b000\n \torrshi\tpc, ip, #0, 4\n \t\t\t; instruction: 0xf7fc4620\n-\tbls\tac2748 \n+\tbls\tac2750 \n \tmovtmi\tpc, #111\t; 0x6f\t; \n \t\t\t; instruction: 0xf000429a\n \t\t\t; instruction: 0xf8df8397\n \tandcs\tr1, r1, #152, 10\t; 0x26000000\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tstmdb\tr8, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmdb\tsl, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \torrlt\tr6, fp, r3, ror r8\n \tcmnlt\tfp, fp, lsl r8\n \tstrne\tpc, [r4, #2271]\t; 0x8df\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tb\tff14630c \n+\tb\tff1c630c \n \t\t\t; instruction: 0x46206871\n-\tb\tff046314 \n+\tb\tff0c6314 \n \tldrbne\tpc, [r4, #-2271]!\t; 0xfffff721\t; \n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tb\tfeec6320 \n+\tb\tfef46320 \n \tmcrcs\t12, 0, r6, cr0, cr6, {3}\n \tsvcge\t0x0049f47f\n \tldmdavs\tip, {r3, r8, r9, fp, ip, pc}\n \tldmvs\tr8, {r0, r1, r5, r7, fp, sp, lr}^\n-\tsvc\t0x0046f7fb\n+\tsvc\t0x0048f7fb\n \tblcs\t2eff0 \n \tsubhi\tpc, r1, #64\t; 0x40\n \tmlacc\tsp, sl, r8, pc\t; \n \tldrbeq\tr6, [fp], r2, lsr #17\n \t\t\t; instruction: 0xf10060d6\n \tstmdals\tr9!, {r3, r5, r9, pc}\n \taddsmi\tr9, r8, #9216\t; 0x2400\n \tstmdbls\tfp!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fc3101\n-\tldmdals\tsp, {r1, r2, r4, fp, sp, lr, pc}\n+\tldmdals\tsp, {r3, r4, fp, sp, lr, pc}\n \taddsmi\tr9, r8, #6144\t; 0x1800\n \tldmdbls\tpc, {r0, r1, ip, lr, pc}\t; \n \t\t\t; instruction: 0xf7fc3101\n-\tldmib\tsp, {r1, r2, r3, fp, sp, lr, pc}^\n+\tldmib\tsp, {r4, fp, sp, lr, pc}^\n \tadcmi\tr4, ip, #75497472\t; 0x4800000\n \t\t\t; instruction: 0xf854d006\n \t\t\t; instruction: 0xf7fb0b04\n-\tadcmi\tlr, r5, #36, 30\t; 0x90\n+\tadcmi\tlr, r5, #38, 30\t; 0x98\n \tldflsd\tf5, [r2, #-996]\t; 0xfffffc1c\n \tldmdbls\tr4, {r0, r2, r5, r8, ip, sp, pc}\n \tblne\t1259c38 \n-\tsvc\t0x00fcf7fb\n+\tsvc\t0x00fef7fb\n \tstrcs\tpc, [r0, #-2271]\t; 0xfffff721\n \tstrtcc\tpc, [r8], #2271\t; 0x8df\n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\tee2414 \n \t\t\t; instruction: 0xf04f405a\n \t\t\t; instruction: 0xf0400300\n \teorslt\tr8, sp, pc, asr r3\n@@ -3763,26 +3763,26 @@\n \tbl\tfed8ee34 \n \tandsle\tr1, r1, #35, 30\t; 0x8c\n \tldrtmi\tr0, [sl], #-311\t; 0xfffffec9\n \tcmnlt\tfp, r3, asr r8\n \tstrbne\tpc, [ip], #2271\t; 0x8df\t; \n \t\t\t; instruction: 0x4620ac1d\n \t\t\t; instruction: 0xf7fc4479\n-\t\t\t; instruction: 0xf8daea62\n+\t\t\t; instruction: 0xf8daea64\n \tstrtmi\tr3, [r0], -ip\n \tldmdavs\tr9, {r0, r1, r3, r4, r5, sl, lr}^\n-\tb\t16c63e0 \n+\tb\t17463e0 \n \tldrhtcc\tpc, [r4], -sl\t; \n \tblcs\t15bfc \n \tcfldrdge\tmvd15, [r8, #252]!\t; 0xfc\n \t\t\t; instruction: 0xf47f42b3\n \t\t\t; instruction: 0xf8dfadf5\n \tldmdage\tsp, {r2, r5, r7, sl, ip}\n \t\t\t; instruction: 0xf7fc4479\n-\tstrb\tlr, [sp, #2636]!\t; 0xa4c\n+\tstrb\tlr, [sp, #2638]!\t; 0xa4e\n \tblls\t795818 \n \tldrmi\tr9, [sl], -r3, lsl #6\n \tvmovne\tr9, r7, d13\n \taddsmi\tr9, r3, #24576\t; 0x6000\n \tandcs\tfp, pc, #12, 30\t; 0x30\n \taddsmi\tr9, r7, #126976\t; 0x1f000\n \trscshi\tpc, r6, r0, lsl #4\n@@ -3795,15 +3795,15 @@\n \tstfcsd\tf5, [r0], {97}\t; 0x61\n \tbichi\tpc, lr, r0, asr #32\n \ttstcs\tr1, r4, lsr r6\n \tandcs\tsl, r0, #54272\t; 0xd400\n \tmcr\t6, 0, r4, cr8, cr8, {0}\n \tblge\tdd6c9c \n \tteqls\tr5, #201326592\t; 0xc000000\n-\tstmda\tip!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmda\tlr!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0x2c639b35\n \tmovwls\tr9, #31286\t; 0x7a36\n \t\t\t; instruction: 0xf8dfd916\n \tbcc\tc1564 \n \t\t\t; instruction: 0xf04f441a\n \tldrbtmi\tr0, [lr], #3172\t; 0xc64\n \tstrvc\tpc, [pc, -r2, asr #4]\n@@ -3823,28 +3823,28 @@\n \tbls\t1e6604 \n \tblls\t1e4608 \n \tcdp\t2, 1, cr2, cr8, cr0, {0}\n \t\t\t; instruction: 0x46110a10\n \tmovwcs\tr7, #12316\t; 0x301c\n \tblmi\tffead0cc \n \t\t\t; instruction: 0xf7fb447b\n-\t\t\t; instruction: 0x4601eed0\n+\t\t\t; instruction: 0x4601eed2\n \tstmdage\tpc!, {r0, r2, r3, r4, sl, fp, sp, pc}\t; \n \tblx\tfe4c4506 \n \tldmib\tsp, {r5, r9, sl, lr}^\n \t\t\t; instruction: 0xf7fc122f\n-\tstmdals\tpc!, {r1, r3, r4, fp, sp, lr, pc}\t; \n+\tstmdals\tpc!, {r2, r3, r4, fp, sp, lr, pc}\t; \n \taddsmi\tsl, r8, #50176\t; 0xc400\n \tldmdbls\tr1!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdals\tr5!, {r4, r6, r8, r9, sl, fp, sp, lr, pc}\n+\tldmdals\tr5!, {r1, r4, r6, r8, r9, sl, fp, sp, lr, pc}\n \taddsmi\tr9, r8, #3072\t; 0xc00\n \tcfldrdge\tmvd15, [r0, #-252]!\t; 0xffffff04\n \ttstcc\tr1, r7, lsr r9\n-\tsvc\t0x0046f7fb\n+\tsvc\t0x0048f7fb\n \tblne\td41ab4 \n \t\t\t; instruction: 0xf2402c09\n \tsfmcs\tf0, 3, [r3], #-688\t; 0xfffffd50\n \trsbshi\tpc, sl, #64, 4\n \tsvcvc\t0x007af5b4\n \trsbshi\tpc, r8, #192\t; 0xc0\n \tmovwvc\tpc, #62018\t; 0xf242\t; \n@@ -3867,60 +3867,60 @@\n \tldrbmi\tsl, [fp, #-3957]\t; 0xfffff08b\n \tstclne\t8, cr13, [r1, #-944]\t; 0xfffffc50\n \tldmvs\tsl, {r4, r5, r6, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0x06906892\n \tstrcs\tfp, [r0], #-3908\t; 0xfffff0bc\n \tstrble\tr9, [r3, #-1049]!\t; 0xfffffbe7\n \t\t\t; instruction: 0xf7fc4620\n-\tstrmi\tlr, [r1], -r6, lsl #19\n+\tstrmi\tlr, [r1], -r8, lsl #19\n \t\t\t; instruction: 0xf7fc4620\n-\tstrmi\tlr, [r6], -r6, ror #16\n+\tstrmi\tlr, [r6], -r8, ror #16\n \t\t\t; instruction: 0xf0002800\n \tblvs\tff0a93d8 \n \tldrsbtcc\tpc, [ip], -sl\t; \n \tmlsle\tr9, sl, r2, r4\n \t\t\t; instruction: 0xf008a819\n \tldr\tpc, [sp, #2709]\t; 0xa95\n \tmlacc\tsp, sl, r8, pc\t; \n \tmovteq\tpc, #963\t; 0x3c3\t; \n \tsvclt\t0x00142e00\n \t\t\t; instruction: 0xf0032300\n-\tblcs\t91bc \n+\tblcs\t91bc \n \torrhi\tpc, ip, r0, asr #32\n \tstmdavc\tfp, {r0, r5, r6, fp, sp, lr}\n \tblge\td5326c \n \ttstcc\tr1, r8, lsl #30\n \t\t\t; instruction: 0x461c4618\n \tldc2\t0, cr15, [r2, #-32]!\t; 0xffffffe0\n \t\t\t; instruction: 0xf7fd4620\n \tldmib\tsp, {r0, r1, r5, fp, ip, sp, lr, pc}^\n \tldmdage\tsp, {r0, r2, r4, r5, r9, ip}\n-\tsvc\t0x009cf7fb\n+\tsvc\t0x009ef7fb\n \tblge\tdee6b8 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r7, lsr r9\n-\tmrc\t7, 6, APSR_nzcv, cr2, cr11, {7}\n+\tmrc\t7, 6, APSR_nzcv, cr4, cr11, {7}\n \tmovwls\tr9, #19203\t; 0x4b03\n \tldrb\tr7, [r3], #2156\t; 0x86c\n \tbeq\tfe443e5c \n \t\t\t; instruction: 0xf009aa10\n \tldmdals\tr0, {r0, r3, r5, r7, r8, fp, ip, sp, lr, pc}\n \tbllt\tff8c6604 \n \tbeq\tfe443e6c \n \t\t\t; instruction: 0xf0094642\n \tldmdals\tr9, {r0, r5, r7, r8, fp, ip, sp, lr, pc}\n \tbllt\tffbc6614 \n \tandcs\tr2, r1, #0, 6\n \tldmdage\tsp, {r0, r1, r8, fp, ip, pc}\n \tldrmi\tr9, [sl], -r0, lsl #4\n-\tstmdb\tr8!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tsl!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tusat\tr9, #31, sp, lsl #22\n \tstrtmi\tr4, [r0], -r2, lsr #19\n \t\t\t; instruction: 0xf7fc4479\n-\tblx\tfec42938 \n+\tblx\tfec42940 \n \tstmdbeq\tr0, {r7, ip, sp, lr, pc}^\n \tssatmi\tlr, #31, r5, lsl #8\n \tstr\tr4, [sl, #-1582]\t; 0xfffff9d2\n \tldrls\tr6, [r9], #-2268\t; 0xfffff724\n \taddsle\tr2, r7, r0, lsl #24\n \tmovwcc\tr6, #6179\t; 0x1823\n \tldr\tr6, [r3, r3, lsr #32]\n@@ -3946,36 +3946,36 @@\n \tldmvs\tr8, {r1, r4, r5, r7, pc}^\n \tsubvs\tpc, r4, sl, asr #17\n \ttstlt\tr0, r9, lsl r0\n \tmovwcc\tr6, #6147\t; 0x1803\n \tbls\t2e06c0 \n \tldmdavs\tr1, {r8, r9, sp}\n \t\t\t; instruction: 0xf7fb6013\n-\tstmdacs\tr0, {r1, r4, r5, r6, r7, r8, sl, fp, sp, lr, pc}\n+\tstmdacs\tr0, {r2, r4, r5, r6, r7, r8, sl, fp, sp, lr, pc}\n \ttsthi\tr1, #64\t; 0x40\t; \n \tandscc\tlr, r2, #3620864\t; 0x374000\n \tldrbmi\tr9, [r6], -r5, lsl #12\n \taddsmi\tr4, r3, #56, 12\t; 0x3800000\n \ttstls\tr3, #24, 30\t; 0x60\n \t\t\t; instruction: 0xf9faf008\n \t\t\t; instruction: 0xf88d2300\n \tstcge\t0, cr3, [r9], #-688\t; 0xfffffd50\n \t\t\t; instruction: 0xf8da932a\n \tstrtmi\tr1, [r0], -r0\n \tmovwls\tsl, #39723\t; 0x9b2b\n \t\t\t; instruction: 0xf7fc9329\n-\tldmdbmi\tr2!, {r1, r3, r4, r6, r7, fp, sp, lr, pc}^\n+\tldmdbmi\tr2!, {r2, r3, r4, r6, r7, fp, sp, lr, pc}^\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tldm\tr4, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldm\tr6, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0x46204970\n \t\t\t; instruction: 0xf7fc4479\n-\tstrb\tlr, [lr, #-2256]\t; 0xfffff730\n+\tstrb\tlr, [lr, #-2258]\t; 0xfffff72e\n \tstmdage\tr9!, {r1, r2, r3, r5, r6, r8, fp, lr}\n \t\t\t; instruction: 0xf7fc4479\n-\tblls\t182a3c \n+\tblls\t182a44 \n \t\t\t; instruction: 0xf43f2b00\n \tstrcc\tsl, [r1, -r6, asr #27]\n \tsvccs\t0x0009463d\n \t\t\t; instruction: 0x81a5f340\n \tvmax.f32\tq9, q0, \n \t\t\t; instruction: 0xf5b7814f\n \t\t\t; instruction: 0xf0c07f7a\n@@ -3993,49 +3993,49 @@\n \tblx\tfea3eba2 \n \tldrmi\tr3, [r3], -r2, lsl #2\n \tb\t13d9174 \n \t\t\t; instruction: 0x46213251\n \tstreq\tpc, [r4], #-260\t; 0xfffffefc\n \tldcge\t6, cr15, [r4, #-508]!\t; 0xfffffe04\n \tstmiale\tlr!, {r0, r1, r3, r6, r8, sl, lr}^\n-\tstr\tr1, [pc, #-3404]!\t; 7a30 \n+\tstr\tr1, [pc, #-3404]!\t; 7a30 \n \tstr\tr1, [sp, #-3468]!\t; 0xfffff274\n \tstr\tr1, [fp, #-3532]!\t; 0xfffff234\n \tstmvs\tr0, {r1, r2, r3, r5, r7, r9, sl, lr}\n \tldrdne\tpc, [r4], -ip\n \tldrdcs\tpc, [r8], -ip\n \tldrdcc\tpc, [ip], -ip\n \tandeq\tlr, pc, lr, lsr #17\n \tcfmsc32\tmvfx14, mvfx8, mvfx10\n \tbge\t3cb1e0 \n \t\t\t; instruction: 0xf8d8f009\n \t\t\t; instruction: 0xf7ff980f\n \tvstrls\td11, [r8, #-276]\t; 0xfffffeec\n \t\t\t; instruction: 0xf7fb6828\n-\teorvs\tlr, r8, sl, lsl #26\n+\teorvs\tlr, r8, ip, lsl #26\n \t\t\t; instruction: 0xf0002800\n \tstmdavs\tr3!, {r0, r3, r9, pc}\n \teorvs\tr3, r3, r1, lsl #22\n \t\t\t; instruction: 0xf47f2b00\n \tstrtmi\tsl, [r0], -sl, asr #27\n-\tmcr\t7, 1, pc, cr8, cr11, {7}\t; \n+\tmcr\t7, 1, pc, cr10, cr11, {7}\t; \n \tstmdals\tr9!, {r0, r2, r6, r7, r8, sl, sp, lr, pc}\n-\tstm\tr6, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstm\tr8, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldr\tr4, [r9, #1542]!\t; 0x606\n \tldrbtmi\tr4, [r8], #-2107\t; 0xfffff7c5\n \tblt\tff0467dc \n \tldrt\tr1, [r5], -r1, lsl #27\n \tldrt\tr1, [r3], -r1, asr #27\n \t\t\t; instruction: 0xac1d4938\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tldmda\tr8, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmda\tsl, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tbllt\tffd467f4 \n \tldmdage\tsp, {r0, r2, r4, r5, r8, fp, lr}\n \t\t\t; instruction: 0xf7fc4479\n-\t\t\t; instruction: 0xf7ffe852\n+\t\t\t; instruction: 0xf7ffe854\n \t\t\t; instruction: 0x4633bbdd\n \tmrrcvs\t6, 1, r4, fp, cr10\n \tmvnsle\tr2, r0, lsl #22\n \tldrmi\tr9, [r5], -fp, lsl #24\n \tldmib\tsp, {r0, r2, r9, ip, pc}^\n \tstmdavs\tr0!, {r1, r4, r8, sp}\n \teorvs\tr4, r3, sl, lsl #5\n@@ -4090,15 +4090,15 @@\n \tldrbtmi\tsl, [fp], #-2069\t; 0xfffff7eb\n \t\t\t; instruction: 0xf0079317\n \t\t\t; instruction: 0xac2ffb17\n \tstrtmi\tr4, [r0], -r1, lsl #12\n \tstc2\t0, cr15, [r8, #-28]!\t; 0xffffffe4\n \tldrne\tpc, [ip], #-2271\t; 0xfffff721\n \tldrbtmi\tr4, [r9], #-1568\t; 0xfffff9e0\n-\tsvc\t0x00d2f7fb\n+\tsvc\t0x00d4f7fb\n \tstrmi\tsl, [r1], -r9, lsr #24\n \t\t\t; instruction: 0xf00a4620\n \t\t\t; instruction: 0xf8daf97b\n \ttstls\tsl, #60\t; 0x3c\n \t\t\t; instruction: 0xf8df4638\n \tldrbtmi\tr3, [fp], #-1028\t; 0xfffffbfc\n \tmovwcs\tr9, #795\t; 0x31b\n@@ -4107,44 +4107,44 @@\n \tldrmi\tr4, [r8], -r1, lsl #12\n \t\t\t; instruction: 0xf007461e\n \tldrtmi\tpc, [r2], -fp, lsl #26\t; \n \tstmdage\tr3!, {r0, r5, r9, sl, lr}\n \t\t\t; instruction: 0xfffaf004\n \teorne\tlr, r3, #3620864\t; 0x374000\n \t\t\t; instruction: 0xf7fba81d\n-\tstmdals\tr3!, {r2, r3, r5, r6, r7, r8, sl, fp, sp, lr, pc}\n+\tstmdals\tr3!, {r1, r2, r3, r5, r6, r7, r8, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #37888\t; 0x9400\n \tstmdbls\tr5!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdals\tr5!, {r1, r5, r8, sl, fp, sp, lr, pc}\n+\tldmdals\tr5!, {r2, r5, r8, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #56320\t; 0xdc00\n \tldmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdage\tip, {r1, r3, r4, r8, sl, fp, sp, lr, pc}\n+\tldmdage\tip, {r2, r3, r4, r8, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf8b2f008\n \tblge\taeea10 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, lsr #18\n-\tstc\t7, cr15, [lr, #-1004]\t; 0xfffffc14\n+\tldc\t7, cr15, [r0, #-1004]\t; 0xfffffc14\n \tblge\tc6ea38 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r1, lsr r9\n-\tstc\t7, cr15, [r6, #-1004]\t; 0xfffffc14\n+\tstc\t7, cr15, [r8, #-1004]\t; 0xfffffc14\n \tldmdage\tr8, {r0, r1, r8, r9, fp, ip, pc}\n \tstrcs\tr9, [r0], -r4, lsl #6\n \t\t\t; instruction: 0xf89cf008\n \t\t\t; instruction: 0xf7ff786c\n \tvldrge\td11, [r1, #-12]\n \tblmi\tff7ed608 \n \t\t\t; instruction: 0x4628a919\n \ttstls\tfp, #2063597568\t; 0x7b000000\n \ttstls\tip, #0, 6\n \t\t\t; instruction: 0xf834f00a\n \tldcls\t6, cr4, [r1, #-160]\t; 0xffffff60\n-\tstrls\tr2, [pc, #-768]\t; 86b8 \n+\tstrls\tr2, [pc, #-768]\t; 86b8 \n \t\t\t; instruction: 0xf0089311\n \tldmdage\tip, {r0, r1, r2, r7, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf884f008\n \tbllt\tff5869c4 \n \tstr\tr2, [r7], #-1026\t; 0xfffffbfe\n \tstr\tr2, [r5], #-1028\t; 0xfffffbfc\n \tstr\tr2, [r3], #-1027\t; 0xfffffbfd\n@@ -4153,153 +4153,153 @@\n \tldcge\t0, cr3, [r5, #-240]\t; 0xffffff10\n \tldmdbge\tr9, {r1, r3, r4, r8, r9, ip, pc}\n \tstrtmi\tr4, [r8], -lr, asr #23\n \ttstls\tfp, #2063597568\t; 0x7b000000\n \ttstls\tip, #0, 6\n \t\t\t; instruction: 0xf812f00a\n \tldcls\t6, cr4, [r5, #-160]\t; 0xffffff60\n-\tstrls\tr2, [pc, #-768]\t; 86fc \n+\tstrls\tr2, [pc, #-768]\t; 86fc \n \t\t\t; instruction: 0xf0089315\n \tldmdage\tip, {r0, r2, r5, r6, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf862f008\n \tbllt\tfed06a08 \n-\tldr\tr2, [pc, #-258]\t; 890e \n+\tldr\tr2, [pc, #-258]\t; 890e \n \tldr\tr2, [sp, #-259]\t; 0xfffffefd\n \tldr\tr2, [fp, #-260]\t; 0xfffffefc\n \tldrbtmi\tr4, [r8], #-2242\t; 0xfffff73e\n-\tstcl\t7, cr15, [sl], #-1004\t; 0xfffffc14\n+\tstcl\t7, cr15, [ip], #-1004\t; 0xfffffc14\n \tldrbtmi\tr4, [r8], #-2241\t; 0xfffff73f\n-\tstcl\t7, cr15, [r6], #-1004\t; 0xfffffc14\n+\tstcl\t7, cr15, [r8], #-1004\t; 0xfffffc14\n \tldrbtmi\tr4, [r8], #-2240\t; 0xfffff740\n-\tstcl\t7, cr15, [r2], #-1004\t; 0xfffffc14\n+\tstcl\t7, cr15, [r4], #-1004\t; 0xfffffc14\n \t\t\t; instruction: 0x4618ab35\n \t\t\t; instruction: 0xf008461c\n \tbmi\tfef87630 \n \tstrtmi\tr2, [r0], -r0, lsl #2\n \t\t\t; instruction: 0xf7fb447a\n-\t\t\t; instruction: 0x4601ecde\n+\tstrmi\tlr, [r1], -r0, ror #25\n \tandls\tsl, r3, pc, lsr #16\n \t\t\t; instruction: 0xf8d8f00a\n \tstmdals\tr3, {r3, r4, r5, r7, r8, fp, lr}\n \t\t\t; instruction: 0xf7fb4479\n-\tstrmi\tlr, [r1], -r6, lsr #30\n+\tstrmi\tlr, [r1], -r8, lsr #30\n \tandls\tsl, r3, r9, lsr #16\n \t\t\t; instruction: 0xf8cef00a\n \t\t\t; instruction: 0xf7fb9803\n \ttstcs\tr1, r7, ror pc\t; \n \tstrcs\tlr, [r1], #-1264\t; 0xfffffb10\n \tbllt\tfed46a70 \n-\tldc\t7, cr15, [r2, #1004]\t; 0x3ec\n+\tldc\t7, cr15, [r4, #1004]\t; 0x3ec\n \tldrbtmi\tr4, [r8], #-2223\t; 0xfffff751\n-\tldc\t7, cr15, [sl], #-1004\t; 0xfffffc14\n+\tldc\t7, cr15, [ip], #-1004\t; 0xfffffc14\n \tldmdage\tip, {r2, r9, sl, lr}\n \t\t\t; instruction: 0xf822f008\n \t\t\t; instruction: 0xf008a80f\n \tldmdage\tr0, {r0, r1, r2, r3, r4, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf81cf008\n \tblls\t1aeb0c \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, pc, lsl r9\n-\tldcl\t7, cr15, [r8], #-1004\t; 0xfffffc14\n+\tldcl\t7, cr15, [sl], #-1004\t; 0xfffffc14\n \t\t\t; instruction: 0x5612e9dd\n \trsbsle\tr4, r5, lr, lsr #5\n \tbleq\t146c04 \n-\tbl\tfe3c6aa0 \n+\tbl\tfe446aa0 \n \tbls\t902a98 \n \tstrmi\tsl, [r4], -r5, lsr #22\n \tmulle\tr4, sl, r2\n \tldrmi\tr9, [r0], -r5, lsr #18\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdals\tr5!, {r1, r2, r5, r6, sl, fp, sp, lr, pc}\n+\tldmdals\tr5!, {r3, r5, r6, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #56320\t; 0xdc00\n \tldmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdage\tip, {r1, r2, r3, r4, r6, sl, fp, sp, lr, pc}\n+\tldmdage\tip, {r5, r6, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xfff6f007\n \tblge\taeeb88 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, lsr #18\n-\tmrrc\t7, 15, pc, r2, cr11\t; \n+\tmrrc\t7, 15, pc, r4, cr11\t; \n \tblge\tc6ebb0 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r1, lsr r9\n-\tmcrr\t7, 15, pc, sl, cr11\t; \n+\tmcrr\t7, 15, pc, ip, cr11\t; \n \t\t\t; instruction: 0xf007a818\n \tstrb\tpc, [r5, r3, ror #31]\t; \n \tblge\tdef3e0 \n \taddsmi\tr4, sl, #4, 12\t; 0x400000\n \tldmdbls\tr7!, {r6, r7, ip, lr, pc}\n \ttstcc\tr1, r0, lsl r6\n-\tldc\t7, cr15, [ip], #-1004\t; 0xfffffc14\n+\tldc\t7, cr15, [lr], #-1004\t; 0xfffffc14\n \tstmmi\tr7, {r1, r3, r4, r5, r7, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \t\t\t; instruction: 0x4604fef7\n \tblls\teec00 \n \tumlalsle\tr4, r1, r8, r2\n \ttstcc\tr1, r7, lsr r9\n-\tstc\t7, cr15, [lr], #-1004\t; 0xfffffc14\n+\tldc\t7, cr15, [r0], #-1004\t; 0xfffffc14\n \tstrmi\tlr, [r4], -ip, lsr #15\n \tstmmi\tr0, {r1, r4, r5, r7, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \tbls\t9086e4 \n \tstrmi\tsl, [r4], -r5, lsr #22\n \tmulle\tr4, sl, r2\n \tldrmi\tr9, [r0], -r5, lsr #18\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdals\tr5!, {r1, r2, r3, r4, sl, fp, sp, lr, pc}\n+\tldmdals\tr5!, {r5, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #56320\t; 0xdc00\n \tldmdbls\tr7!, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fb3101\n-\tldmdage\tip, {r1, r2, r4, sl, fp, sp, lr, pc}\n+\tldmdage\tip, {r3, r4, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xffaef007\n \tblge\taeec18 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, fp, lsr #18\n-\tstc\t7, cr15, [sl], {251}\t; 0xfb\n+\tstc\t7, cr15, [ip], {251}\t; 0xfb\n \tblge\tc6ec40 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r1, lsr r9\n-\tstc\t7, cr15, [r2], {251}\t; 0xfb\n+\tstc\t7, cr15, [r4], {251}\t; 0xfb\n \t\t\t; instruction: 0xf007a818\n \t\t\t; instruction: 0xe77dff9b\n \tldmdbls\tr4, {r1, r4, fp, ip, pc}\n \ttstlt\tr8, r9, lsl #20\n-\tbl\tffe46b90 \n+\tbl\tffec6b90 \n \t\t\t; instruction: 0xf7fb4620\n-\tblls\tc0446c \n+\tblls\tc04474 \n \t\t\t; instruction: 0x4604aa31\n \tumlalsle\tr4, r9, r3, r2\n \t\t\t; instruction: 0x46189931\n \t\t\t; instruction: 0xf7fb3101\n-\tldr\tlr, [r3, ip, ror #23]!\n-\tbl\t18c6bb0 \n-\tldcl\t7, cr15, [r8, #1004]\t; 0x3ec\n+\tldr\tlr, [r3, lr, ror #23]!\n+\tbl\t1946bb0 \n+\tldcl\t7, cr15, [sl, #1004]\t; 0x3ec\n \tblt\t1906bc8 \n \tldrbtmi\tr4, [r8], #-2141\t; 0xfffff7a3\n \tmcr2\t7, 5, pc, cr0, cr11, {7}\t; \n \tblge\tdef4ac \n \taddsmi\tr4, sl, #4, 12\t; 0x400000\n \tldmdbls\tr7!, {r2, ip, lr, pc}\n \ttstcc\tr1, r0, lsl r6\n-\tbl\tff5c6bd4 \n+\tbl\tff646bd4 \n \t\t\t; instruction: 0xf0074640\n \tldrb\tpc, [r9, -pc, ror #30]\t; \n \tstmdals\tpc!, {r2, r9, sl, lr}\t; \n \tandle\tr4, r3, r8, lsr #5\n \ttstcc\tr1, r1, lsr r9\n-\tbl\tff2c6bec \n+\tbl\tff346bec \n \tblls\teecd8 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r7, lsr r9\n-\tbl\tff0c6bfc \n+\tbl\tff146bfc \n \tblls\t26ecb8 \n \t\t\t; instruction: 0xf43f4298\n \tstmdbls\tfp!, {r0, r2, r3, r4, r5, r8, r9, sl, fp, sp, pc}\n \t\t\t; instruction: 0xf7fb3101\n-\t\t\t; instruction: 0xe737ebba\n+\t\t\t; instruction: 0xe737ebbc\n \tldrbtmi\tr4, [r8], #-2120\t; 0xfffff7b8\n \tmrc2\t7, 3, pc, cr4, cr11, {7}\n \tstr\tr4, [fp, -r4, lsl #12]!\n \tldrtmi\tr4, [r8], -r4, lsl #12\n \t\t\t; instruction: 0xff4af007\n \tstrmi\tlr, [r4], -ip, lsr #14\n \tstrmi\tlr, [r4], -r5, asr #14\n@@ -4308,38 +4308,38 @@\n \t\t\t; instruction: 0x4604e75a\n \t\t\t; instruction: 0xf007a81c\n \t\t\t; instruction: 0xe719ff3d\n \tblge\taef4fc \n \taddsmi\tr4, sl, #4, 12\t; 0x400000\n \tstmdbls\tfp!, {r2, ip, lr, pc}\n \ttstcc\tr1, r0, lsl r6\n-\tbl\tfe5c6c54 \n+\tbl\tfe646c54 \n \tblge\tc6ed28 \n \tmulle\tr3, r8, r2\n \ttstcc\tr1, r1, lsr r9\n-\tbl\tfe3c6c64 \n+\tbl\tfe446c64 \n \tblge\tdeed50 \n \t\t\t; instruction: 0xf47f4298\n \tsmlsd\tr7, r7, pc, sl\t; \n \tstrb\tr4, [pc, r4, lsl #12]!\n \tldrb\tr4, [r5, r4, lsl #12]!\n \tldrbtmi\tr4, [r8], #-2095\t; 0xfffff7d1\n \tmcr2\t7, 2, pc, cr0, cr11, {7}\t; \n \tstr\tr4, [r7, r4, lsl #12]!\n \t\t\t; instruction: 0xf7fb2014\n-\t\t\t; instruction: 0x4605eb14\n+\t\t\t; instruction: 0x4605eb16\n \t\t\t; instruction: 0xff7af7fb\n \tstrtmi\tr4, [r8], -sl, lsr #22\n \tbmi\taaf0d0 \n \tldrbtmi\tr5, [sl], #-2249\t; 0xfffff737\n-\tldc\t7, cr15, [r2, #1004]\t; 0x3ec\n+\tldc\t7, cr15, [r4, #1004]\t; 0x3ec\n \tldrbtmi\tr4, [r8], #-2088\t; 0xfffff7d8\n \tmcr2\t7, 1, pc, cr12, cr11, {7}\t; \n \tstrtmi\tr4, [r8], -r4, lsl #12\n-\tbl\tfe346cb0 \n+\tbl\tfe3c6cb0 \n \tstrmi\tlr, [r4], -lr, ror #13\n \t\t\t; instruction: 0xf007a819\n \t\t\t; instruction: 0xe6e1feff\n \tldrbtmi\tr4, [r8], #-2082\t; 0xfffff7de\n \tmrc2\t7, 0, pc, cr14, cr11, {7}\n \tldr\tr4, [r9, r4, lsl #12]\n \tldmdage\tr0, {r2, r9, sl, lr}\n@@ -4381,30 +4381,30 @@\n \tpush\t{r1, r3, r4, r5, r6, sl, lr}\n \t\t\t; instruction: 0x460647f0\n \tldmpl\tr3, {r1, r2, r7, ip, sp, pc}^\n \tmovwls\tr6, #22555\t; 0x581b\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tblx\tfed46d7a \n \tandscs\tr4, r4, r1, lsl #13\n-\tstmib\tsl!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tip!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tstrmi\tr2, [r5], -r0, lsl #6\n \tldrdge\tpc, [r0], -r9\t; \n \tstrcc\tlr, [r0], -r0, asr #19\n \tmovwcc\tlr, #10688\t; 0x29c0\n \ttstvs\tr3, r1, asr r6\n \t\t\t; instruction: 0xf7fb4630\n-\t\t\t; instruction: 0xf8d9ea78\n+\t\t\t; instruction: 0xf8d9ea7a\n \tpkhbtmi\tr3, r8, ip\n \teorcc\tpc, r1, r3, asr r8\t; \n \tldmdavs\tip, {r0, r1, r5, r6, r8, ip, sp, pc}\n \tadcsmi\tr6, lr, #6750208\t; 0x670000\n \tstmdavs\tr4!, {r0, r1, r3, r4, r5, ip, lr, pc}\n \tstmdavs\tr7!, {r2, r4, r5, r8, ip, sp, pc}^\n \t\t\t; instruction: 0x46384651\n-\tb\t19c6db4 \n+\tb\t1a46db4 \n \trscsle\tr4, r4, r8, lsl #11\n \tstrbmi\tr4, [r1], -fp, lsr #12\n \tandseq\tpc, ip, r9, lsl #2\n \t\t\t; instruction: 0xf0084632\n \tvstrge\td15, [r4, #-932]\t; 0xfffffc5c\n \tstrtmi\tr4, [r8], -r4, lsl #12\n \tmovwls\tr2, #13056\t; 0x3300\n@@ -4417,55 +4417,55 @@\n \tblmi\td6da00 \n \tsbccc\tr4, ip, #2046820352\t; 0x7a000000\n \t\t\t; instruction: 0xf7fe447b\n \tstmdals\tr4, {r0, r1, r2, r7, r8, r9, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf008b108\n \tstmdbls\tr3, {r0, r1, r2, r3, r4, r6, r7, r9, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4630\n-\tandls\tlr, r4, sl, lsr #23\n+\tandls\tlr, r4, ip, lsr #23\n \t\t\t; instruction: 0x4638b338\n \tcdp2\t0, 5, cr15, cr4, cr7, {0}\n \tldrdeq\tpc, [r8], r6\t; \n \ttsteq\tr8, r4, lsl #2\t; \n \tblx\tfe4c4e54 \n \ttstcs\tr4, r3\n \t\t\t; instruction: 0xf7fb4628\n-\tldmib\tr4, {r1, r2, r3, r5, r7, r9, fp, sp, lr, pc}^\n+\tldmib\tr4, {r4, r5, r7, r9, fp, sp, lr, pc}^\n \taddsmi\tr2, r3, #134217728\t; 0x8000000\n \tbne\tfe6fce88 \n \tsvclt\t0x00982b04\n \tldmdale\tr6!, {r4, fp, sp, lr}\n \tblmi\t79b6d8 \n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\t162ec0 \n \t\t\t; instruction: 0xf04f405a\n \tmrsle\tr0, LR_abt\n \tpop\t{r1, r2, ip, sp, pc}\n \tstrdcs\tr8, [r0], -r0\n \t\t\t; instruction: 0xf7fbe7f0\n-\tldmdami\tfp, {r3, r4, r7, r8, r9, fp, sp, lr, pc}\n+\tldmdami\tfp, {r1, r3, r4, r7, r8, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \tstrmi\tpc, [r4], -pc, asr #26\n \tstrmi\tlr, [r4], -r3\n \t\t\t; instruction: 0xf0074628\n \tldrtmi\tpc, [r8], -r5, lsr #28\t; \n \tcdp2\t0, 2, cr15, cr2, cr7, {0}\n \t\t\t; instruction: 0xf7fb4620\n-\tblls\t144188 \n+\tblls\t144190 \n \ttstlt\tr3, r4, lsl #12\n \t\t\t; instruction: 0xf0084618\n \t\t\t; instruction: 0x4638fe9b\n \tcdp2\t0, 1, cr15, cr6, cr7, {0}\n \t\t\t; instruction: 0xf7fb4620\n-\tsvcge\t0x0003ecb2\n+\tsvcge\t0x0003ecb4\n \tldrb\tr4, [r6, r4, lsl #12]!\n \tstrtmi\tr4, [r8], -r4, lsl #12\n \tmcr2\t7, 3, pc, cr4, cr11, {7}\t; \n \t\t\t; instruction: 0xf7fb4620\n-\tstmdami\tr9, {r3, r5, r7, sl, fp, sp, lr, pc}\n+\tstmdami\tr9, {r1, r3, r5, r7, sl, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \tsvclt\t0x0000fd29\n \tmuleq\tr2, r4, r2\n \t\t\t; instruction: 0x000002b8\n \tstrdeq\tr3, [r0], -r7\n \tmuleq\tr0, r0, lr\n \tldrdeq\tpc, [r1], -r0\n@@ -4513,20 +4513,20 @@\n \tblmi\t31b7b8 \n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\te2ff0 \n \t\t\t; instruction: 0xf04f405a\n \tmrsle\tr0, LR_und\n \tpop\t{r0, r2, ip, sp, pc}\n \tshsub8mi\tr8, r0, r0\n-\tb\t1046f88 \n+\tb\t10c6f88 \n \t\t\t; instruction: 0xf7fbe7ee\n-\t\t\t; instruction: 0x4604eafe\n+\tstrmi\tlr, [r4], -r0, lsl #22\n \t\t\t; instruction: 0xf007a802\n \t\t\t; instruction: 0x4620fd91\n-\tstc\t7, cr15, [ip], #-1004\t; 0xfffffc14\n+\tstc\t7, cr15, [lr], #-1004\t; 0xfffffc14\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr0, r2, r8, lsl #2\n \tandeq\tr0, r2, r0, lsl #1\n \tsvcmi\t0x00f0e92d\n \tbmi\t1e1aa08 \n \taddlt\tr4, r5, r8, ror fp\n \t\t\t; instruction: 0xf8df447a\n@@ -4561,15 +4561,15 @@\n \t\t\t; instruction: 0xf8ca3b01\n \tblcs\t15044 \n \tstmdbcs\tr0, {r0, r2, r3, r4, r5, r6, ip, lr, pc}\n \taddhi\tpc, sl, r0, asr #32\n \tblcs\t23fdc \n \taddshi\tpc, r2, r0\n \tldrtmi\tr2, [r0], -ip, lsr #4\n-\tstmib\tlr, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmib\tr0, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldmib\tr4, {r6, r9, sl, lr}^\n \tldrmi\tr3, [r8, pc, lsl #2]\n \tsvceq\t0x0001f019\n \tumaalvc\tpc, r0, r0, r8\t; \n \tteqle\tr9, r5, lsl #12\n \tandcs\tr6, r1, #2818048\t; 0x2b0000\n \tadcsvs\tr6, r5, #51\t; 0x33\n@@ -4602,56 +4602,56 @@\n \tsvchi\t0x00f0e8bd\n \tsbcle\tr2, r3, r0, lsl #30\n \ttstlt\tr8, r0, asr #24\n \tumaalcc\tpc, r8, r5, r8\t; \n \tcmple\tr4, r0, lsl #22\n \ttstlt\tr8, r8, ror #22\n \tbne\t2640a0 \n-\tstmdb\tsl, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tip, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \ttstlt\tr8, r8, lsr #21\n \tbne\t263dac \n-\tstmdb\tr4, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tr6, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t; instruction: 0xf10568e8\n \taddsmi\tr0, r8, #20, 6\t; 0x50000000\n \tstmdbvs\tr9!, {r0, r1, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fb3101\n-\tcmpcs\tip, ip, lsr r9\n+\tcmpcs\tip, lr, lsr r9\n \t\t\t; instruction: 0xf7fb4628\n-\tblmi\t903608 \n+\tblmi\t903610 \n \tldrbtmi\tr4, [r9], #-2339\t; 0xfffff6dd\n \tandcc\tpc, r3, fp, asr r8\t; \n \t\t\t; instruction: 0xf7fb6818\n-\t\t\t; instruction: 0xf04fea48\n+\t\t\t; instruction: 0xf04fea4a\n \t\t\t; instruction: 0xe7c630ff\n \t\t\t; instruction: 0x61b368eb\n \t\t\t; instruction: 0x4650e7b1\n \t\t\t; instruction: 0xf7fb9101\n-\tstmdbls\tr1, {r1, r3, r5, r6, r8, fp, sp, lr, pc}\n+\tstmdbls\tr1, {r2, r3, r5, r6, r8, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf8dae77b\n \tblcc\t55154 \n \tandcc\tpc, r0, sl, asr #17\n \t\t\t; instruction: 0x4650b913\n-\tldmdb\tlr, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tr0!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblmi\t5376bc \n \tldrbtmi\tr4, [r9], #-2325\t; 0xfffff6eb\n \tandcc\tpc, r3, fp, asr r8\t; \n \t\t\t; instruction: 0xf7fb6818\n-\t\t\t; instruction: 0xf04fea2a\n+\t\t\t; instruction: 0xf04fea2c\n \t\t\t; instruction: 0xe7a830ff\n \trsbsvs\tr2, r3, r0, lsl #6\n \t\t\t; instruction: 0xf7fbe7f1\n-\tstclvs\t8, cr14, [r8], #-984\t; 0xfffffc28\n+\tstclvs\t8, cr14, [r8], #-992\t; 0xfffffc20\n \tadcsle\tr2, r5, r0, lsl #16\n \t\t\t; instruction: 0xf7fb212c\n-\tldr\tlr, [r1, r4, lsl #18]!\n-\tb\t147180 \n+\tldr\tlr, [r1, r6, lsl #18]!\n+\tb\t1c7180 \n \tstmdage\tr2, {r2, r9, sl, lr}\n \tldc2\t0, cr15, [r8], {7}\n \t\t\t; instruction: 0xf7fb4620\n-\tsvclt\t0x0000eb34\n+\tsvclt\t0x0000eb36\n \tandeq\tr0, r2, r8, lsr r0\n \t\t\t; instruction: 0x000002b8\n \tandeq\tr0, r2, lr, lsr #32\n \tandeq\tpc, r1, r2, lsr pc\t; \n \tandeq\tr0, r0, r0, lsr r3\n \tandeq\tip, r0, r2, ror #20\n \tstrdeq\tip, [r0], -lr\n@@ -4662,31 +4662,31 @@\n \tldmpl\tr3, {r0, r2, r9, sl, lr}^\n \tmovwls\tr6, #30747\t; 0x781b\n \tmovweq\tpc, #79\t; 0x4f\t; \n \tldrbtmi\tr4, [fp], #-2931\t; 0xfffff48d\n \t\t\t; instruction: 0xf7fd9303\n \tstrmi\tpc, [r3], r3, lsl #19\n \t\t\t; instruction: 0xf7fa2014\n-\t\t\t; instruction: 0x4606efba\n+\t\t\t; instruction: 0x4606efbc\n \tldrdvc\tpc, [r0], -fp\t; \n \t\t\t; instruction: 0xf8c02300\n \tstrbmi\tr8, [r0], -r4\n \t\t\t; instruction: 0x46396033\n \tmovwcc\tlr, #10694\t; 0x29c6\n \t\t\t; instruction: 0xf7fb6133\n-\t\t\t; instruction: 0xf8dbe846\n+\t\t\t; instruction: 0xf8dbe848\n \tpkhbtmi\tr3, sl, ip\n \teorcc\tpc, r1, r3, asr r8\t; \n \tldmdavs\tip, {r0, r1, r4, r5, r6, r8, ip, sp, pc}\n \tldrdls\tpc, [r4], -r4\n \teorsle\tr4, pc, r8, asr #11\n \tteqlt\tip, r4, lsr #16\n \tldrdls\tpc, [r4], -r4\n \t\t\t; instruction: 0x46484639\n-\tldmda\tr2!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmda\tr4!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \trscsle\tr4, r3, sl, lsl #11\n \t\t\t; instruction: 0xf10b4651\n \t\t\t; instruction: 0x4633001c\n \t\t\t; instruction: 0xf0084642\n \t\t\t; instruction: 0xf10df9b5\n \t\t\t; instruction: 0x46040918\n \tmovwcs\tr4, #1608\t; 0x648\n@@ -4700,23 +4700,23 @@\n \tblmi\t14da454 \n \tstrbmi\tr3, [r9], -ip, asr #5\n \t\t\t; instruction: 0xf7fe447b\n \tstmdals\tr6, {r0, r4, r6, r8, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf008b108\n \tstmdbls\tr5, {r0, r3, r5, r7, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4640\n-\tandls\tlr, r6, r4, ror r9\n+\tandls\tlr, r6, r6, ror r9\n \tsubsle\tr2, r2, r0, lsl #16\n \t\t\t; instruction: 0xf0074630\n \t\t\t; instruction: 0xf8d8fc1d\n \t\t\t; instruction: 0xf10400a8\n \t\t\t; instruction: 0xf0090108\n \tand\tpc, r3, fp, asr r8\t; \n \t\t\t; instruction: 0x46302114\n-\tldmda\tr6!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tldmda\tr8!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tmovwcs\tlr, #10708\t; 0x29d4\n \tumullsne\tr1, r8, fp, sl\n \tstmdacs\tr1, {r0, r2, r5, r6, ip, lr, pc}\n \tcdpvc\t0, 2, cr13, cr11, cr14, {1}\n \tmovteq\tpc, #4975\t; 0x136f\t; \n \tldmib\tr4, {r0, r1, r3, r5, r9, sl, ip, sp, lr}^\n \tstrcs\tr2, [r0], #-258\t; 0xfffffefe\n@@ -4724,15 +4724,15 @@\n \tblcc\t147414 \n \tldmdbvs\tfp, {r0, r4, r7, r9, lr}\n \tmovweq\tpc, #4355\t; 0x1103\t; \n \tmvnsle\tr4, ip, lsl r4\n \ttstcs\tr4, r1, lsl #16\n \taddseq\tlr, r0, r4, lsl #22\n \t\t\t; instruction: 0xf7fb3001\n-\tadcvs\tlr, r8, r0, lsr #19\n+\tadcvs\tlr, r8, r2, lsr #19\n \tsuble\tr2, ip, r0, lsl #16\n \taddeq\tlr, r4, r0, lsl #22\n \tcdpvc\t0, 2, cr6, cr11, cr8, {7}\n \t\t\t; instruction: 0xf0434a31\n \tstrtvc\tr0, [fp], -r1, lsl #6\n \tldrbtmi\tr4, [sl], #-2858\t; 0xfffff4d6\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n@@ -4743,43 +4743,43 @@\n \tldmdbvs\tfp, {r0, r1, r4, fp, sp, lr}\n \tstmiale\tip, {r1, r8, r9, fp, sp}^\n \tandcs\tr7, r0, #688\t; 0x2b0\n \t\t\t; instruction: 0xf02360aa\n \t\t\t; instruction: 0xf043030e\n \tstrtvc\tr0, [fp], -r2, lsl #6\n \t\t\t; instruction: 0xf7fbe7e1\n-\tstmdami\tr3!, {r1, r2, r4, r5, r8, fp, sp, lr, pc}\n+\tstmdami\tr3!, {r3, r4, r5, r8, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \tstrmi\tpc, [r4], -sp, ror #21\n \tblls\t1c137c \n \ttstlt\tr3, r4, lsl #12\n \t\t\t; instruction: 0xf0084618\n \tldrtmi\tpc, [r0], -r3, asr #24\t; \n \tblx\tfefc536e \n \t\t\t; instruction: 0xf7fb4620\n-\t\t\t; instruction: 0x4604ea5a\n+\t\t\t; instruction: 0x4604ea5c\n \t\t\t; instruction: 0xf0074648\n \t\t\t; instruction: 0x4630fbb7\n \tblx\tfed45382 \n \t\t\t; instruction: 0xf7fb4620\n-\t\t\t; instruction: 0xae05ea50\n+\t\t\t; instruction: 0xae05ea52\n \tstrb\tr4, [ip, r4, lsl #12]!\n \tldrtmi\tr4, [r0], -r4, lsl #12\n \tstc2\t7, cr15, [r2], {251}\t; 0xfb\n \t\t\t; instruction: 0xf7fb4620\n-\tldmdami\tr1, {r1, r2, r6, r9, fp, sp, lr, pc}\n+\tldmdami\tr1, {r3, r6, r9, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \tandcs\tpc, r4, r7, asr #21\n-\tsvc\t0x009cf7fa\n+\tsvc\t0x009ef7fa\n \tstmdbls\tr3, {r1, r2, r3, r8, r9, fp, lr}\n \tstmiapl\tfp, {r1, r2, r3, r9, fp, lr}^\n \tandvs\tr3, r3, r8, lsl #6\n \tstmpl\tsl, {r0, r2, r3, r8, r9, fp, lr}\n \t\t\t; instruction: 0xf7fb58c9\n-\tsvclt\t0x0000ea1c\n+\tsvclt\t0x0000ea1e\n \tandeq\tpc, r1, ip, lsr lr\t; \n \t\t\t; instruction: 0x000002b8\n \tandeq\tpc, r1, r2, lsr #28\n \tandeq\tr3, r0, sp, lsl #3\n \tandeq\tip, r0, r8, lsr #20\n \tandeq\tpc, r1, r4, ror #16\n \tandeq\tpc, r1, r2, lsl #26\n@@ -4803,32 +4803,32 @@\n \tldcvs\t8, cr5, [fp], {235}\t; 0xeb\n \t\t\t; instruction: 0x46044798\n \t\t\t; instruction: 0xf0002800\n \t\t\t; instruction: 0xf8d080a1\n \t\t\t; instruction: 0xf7fd8004\n \tstrmi\tpc, [r3], r9, ror #16\n \t\t\t; instruction: 0xf7fa2014\n-\tstrmi\tlr, [r7], -r0, lsr #29\n+\tstrmi\tlr, [r7], -r2, lsr #29\n \t\t\t; instruction: 0xf8c02300\n \t\t\t; instruction: 0xf8db8004\n \tstrbmi\tsl, [r0], -r0, lsr #32\n \tstmib\tr7, {r0, r1, r3, r4, r5, sp, lr}^\n \tldrbmi\tr3, [r1], -r2, lsl #6\n \t\t\t; instruction: 0xf7fa613b\n-\t\t\t; instruction: 0xf8dbef2c\n+\t\t\t; instruction: 0xf8dbef2e\n \t\t\t; instruction: 0x460a301c\n \teorcc\tpc, r1, r3, asr r8\t; \n \tldmdavs\tlr, {r0, r1, r7, r8, ip, sp, pc}\n \tldrdls\tpc, [r4], -r6\n \tsuble\tr4, r1, r8, asr #11\n \tcmplt\tlr, r6, lsr r8\n \tldrdls\tpc, [r4], -r6\n \tandls\tr4, r3, #84934656\t; 0x5100000\n \t\t\t; instruction: 0xf7fa4648\n-\tbls\t1050c8 \n+\tbls\t1050d0 \n \trscsle\tr4, r1, sl, lsl #5\n \t\t\t; instruction: 0xf10b4611\n \t\t\t; instruction: 0x463b001c\n \t\t\t; instruction: 0xf0084642\n \t\t\t; instruction: 0xf10df899\n \t\t\t; instruction: 0x46060918\n \tmovwcs\tr4, #1608\t; 0x648\n@@ -4842,23 +4842,23 @@\n \tblmi\t179a68c \n \tstrbmi\tr3, [r9], -ip, asr #5\n \t\t\t; instruction: 0xf7fe447b\n \tstmdals\tr6, {r0, r2, r4, r5, sl, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf008b108\n \tstmdbls\tr5, {r0, r2, r3, r7, r8, r9, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4640\n-\tandls\tlr, r6, r8, asr r8\n+\tandls\tlr, r6, sl, asr r8\n \trsble\tr2, ip, r0, lsl #16\n \t\t\t; instruction: 0xf0074638\n \t\t\t; instruction: 0xf8d8fb01\n \t\t\t; instruction: 0xf10600a8\n \t\t\t; instruction: 0xf0080108\n \tand\tpc, r3, pc, lsr pc\t; \n \t\t\t; instruction: 0x46382114\n-\tsvc\t0x005af7fa\n+\tsvc\t0x005cf7fa\n \tandvc\tlr, r2, #3506176\t; 0x358000\n \taddsmi\tr7, r7, #528\t; 0x210\n \tandeq\tlr, r7, #165888\t; 0x28800\n \tandcs\tfp, r0, r8, lsl #30\n \tmovteq\tpc, #961\t; 0x3c1\t; \n \tldmdavs\tr8!, {r3, r4, r8, r9, sl, fp, ip, sp, pc}\n \tmlale\tfp, r2, r0, r1\n@@ -4873,19 +4873,19 @@\n \tblmi\t103e8f8 \n \tstmdage\tr7, {r1, fp, sp, lr}\n \tldmvs\tr1, {r0, r1, r3, r5, r6, r7, fp, ip, lr}^\n \t\t\t; instruction: 0xf007681d\n \tldmdbmi\tsp!, {r0, r1, r7, r8, sl, fp, ip, sp, lr, pc}\n \tstrtmi\tr9, [r8], -r7, lsl #20\n \t\t\t; instruction: 0xf7fa4479\n-\tstmdals\tr7, {r1, r2, r5, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdals\tr7, {r3, r5, r8, r9, sl, fp, sp, lr, pc}\n \taddsmi\tsl, r8, #9216\t; 0x2400\n \tstmdbls\tr9, {r0, r1, ip, lr, pc}\n \t\t\t; instruction: 0xf7fa3101\n-\tstmdavs\tr3!, {r1, r2, r5, r8, r9, sl, fp, sp, lr, pc}\n+\tstmdavs\tr3!, {r3, r5, r8, r9, sl, fp, sp, lr, pc}\n \teorvs\tr3, r3, r1, lsl #22\n \tstrcs\tfp, [r0], #-507\t; 0xfffffe05\n \tblmi\tb1be28 \n \tldmpl\tr3, {r1, r3, r4, r5, r6, sl, lr}^\n \tblls\t3635c8 \n \t\t\t; instruction: 0xf04f405a\n \ttstle\tr8, r0, lsl #6\n@@ -4896,42 +4896,42 @@\n \tmovwcc\tsp, #4305\t; 0x10d1\n \tsvclt\t0x0088429a\n \teoreq\tpc, r3, r7, asr r8\t; \n \tstrdle\tsp, [r5], #135\t; 0x87\t; \n \tldrb\tr2, [r4, r0]!\n \teoreq\tpc, r3, r7, asr r8\t; \n \t\t\t; instruction: 0x4620e7b8\n-\tsvc\t0x0042f7fa\n+\tsvc\t0x0044f7fa\n \t\t\t; instruction: 0xf7fbe7db\n-\tstmdami\tr3!, {fp, sp, lr, pc}\n+\tstmdami\tr3!, {r1, fp, sp, lr, pc}\n \t\t\t; instruction: 0xf7fb4478\n \t\t\t; instruction: 0x4604f9b7\n \tstrmi\tlr, [r4], -r3\n \t\t\t; instruction: 0xf0074648\n \tldrtmi\tpc, [r8], -sp, lsl #21\t; \n \tblx\tfe2c55d4 \n \t\t\t; instruction: 0xf7fb4620\n-\tblls\t1c3a58 \n+\tblls\t1c3a60 \n \ttstlt\tr3, r4, lsl #12\n \t\t\t; instruction: 0xf0084618\n \tldrtmi\tpc, [r8], -r3, lsl #22\t; \n \tblx\t1fc55ec \n \t\t\t; instruction: 0xf7fb4620\n-\tsvcge\t0x0005e91a\n+\tsvcge\t0x0005e91c\n \tldrb\tr4, [r6, r4, lsl #12]!\n \tldrtmi\tr4, [r8], -r4, lsl #12\n \tblx\tff3475d0 \n \t\t\t; instruction: 0xf7fb4620\n-\tbls\t203a2c \n+\tbls\t203a34 \n \tstrmi\tsl, [r4], -r9, lsl #22\n \tmulle\tr4, sl, r2\n \tldrmi\tr9, [r0], -r9, lsl #18\n \t\t\t; instruction: 0xf7fa3101\n-\tstrtmi\tlr, [r0], -ip, asr #29\n-\tstmdb\tr2, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstrtmi\tlr, [r0], -lr, asr #29\n+\tstmdb\tr4, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tandeq\tpc, r1, lr, lsl #24\n \t\t\t; instruction: 0x000002b8\n \tandeq\tpc, r1, r8, lsl #24\n \tandeq\tr0, r0, r8, ror #5\n \tandeq\tr2, r0, r5, asr pc\n \tstrdeq\tip, [r0], -r0\n \tandeq\tpc, r1, ip, lsr #12\n@@ -4946,30 +4946,30 @@\n \tblhi\tc4af8 \n \tldmpl\tr3, {r0, r5, r7, ip, sp, pc}^\n \tldmdavs\tfp, {r0, r1, r7, r9, sl, lr}\n \t\t\t; instruction: 0xf04f931f\n \t\t\t; instruction: 0xf7fc0300\n \tstrmi\tpc, [r1], fp, asr #30\n \t\t\t; instruction: 0xf7fa2014\n-\tmovwcs\tlr, #3458\t; 0xd82\n+\tmovwcs\tlr, #3460\t; 0xd84\n \tstmib\tr0, {r0, r2, r9, sl, lr}^\n \t\t\t; instruction: 0xf8d93600\n \tstmib\tr0, {r5, sp, pc}^\n \ttstvs\tr3, r2, lsl #6\n \t\t\t; instruction: 0x46304651\n-\tmcr\t7, 0, pc, cr14, cr10, {7}\t; \n+\tmrc\t7, 0, APSR_nzcv, cr0, cr10, {7}\n \t\t\t; instruction: 0x301cf8d9\n \t\t\t; instruction: 0xf8534688\n \tcmnlt\tr3, r1, lsr #32\n \tstmdavs\tr7!, {r2, r3, r4, fp, sp, lr}^\n \tstrhle\tr4, [r1], #-46\t; 0xffffffd2\n \tteqlt\tr4, r4, lsr #16\n \tldrbmi\tr6, [r1], -r7, ror #16\n \t\t\t; instruction: 0xf7fa4638\n-\tstrmi\tlr, [r8, #3582]\t; 0xdfe\n+\tstrmi\tlr, [r8, #3584]\t; 0xe00\n \t\t\t; instruction: 0x4641d0f4\n \tandseq\tpc, ip, r9, lsl #2\n \tldrtmi\tr4, [r2], -fp, lsr #12\n \t\t\t; instruction: 0xff80f007\n \t\t\t; instruction: 0x4604af19\n \tmovwcs\tr4, #1592\t; 0x638\n \t\t\t; instruction: 0xf0089318\n@@ -4983,25 +4983,25 @@\n \tstmibcc\tip, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldrtmi\tr3, [r9], -ip, asr #5\n \t\t\t; instruction: 0xf7fe447b\n \tldmdals\tr9, {r0, r1, r3, r4, r8, r9, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf008b108\n \tldmdbls\tr8, {r0, r1, r4, r5, r6, r9, fp, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fa4630\n-\tandsls\tlr, r9, lr, lsr pc\n+\tandsls\tlr, r9, r0, asr #30\n \t\t\t; instruction: 0xf0002800\n \tstrtmi\tr8, [r8], -r7, lsl #9\n \tstreq\tpc, [r8, #-260]\t; 0xfffffefc\n \t\t\t; instruction: 0xf9e4f007\n \tldrdeq\tpc, [r8], r6\t; \n \t\t\t; instruction: 0xf0084629\n \tand\tpc, r5, r3, lsr #28\n \ttstcs\tr4, r8, lsr #12\n \tstreq\tpc, [r8, #-260]\t; 0xfffffefc\n-\tmrc\t7, 1, APSR_nzcv, cr12, cr10, {7}\n+\tmrc\t7, 1, APSR_nzcv, cr14, cr10, {7}\n \tandvs\tlr, r2, #212, 18\t; 0x350000\n \t\t\t; instruction: 0xf89b2300\n \t\t\t; instruction: 0xf10b0018\n \taddsmi\tr0, r6, #8, 2\n \tldrlt\tlr, [r9, #-2509]\t; 0xfffff633\n \tstrcs\tfp, [r0], #-3848\t; 0xfffff0f8\n \tsubeq\tpc, r0, r0, asr #7\n@@ -5042,16 +5042,16 @@\n \tstmdbls\tr2, {r2, r3, r6, r7, r8, r9, sl, sp, lr, pc}\n \tldrls\tr2, [sp], #-1024\t; 0xfffffc00\n \t\t\t; instruction: 0xd1f84299\n \t\t\t; instruction: 0xf7fb4658\n \t\t\t; instruction: 0xf8dbffbb\n \ttstlt\tr3, r4, lsl r0\n \t\t\t; instruction: 0xf7fa4658\n-\tldrbmi\tlr, [r8], -r4, lsl #31\n-\tmrc\t7, 2, APSR_nzcv, cr2, cr10, {7}\n+\tldrbmi\tlr, [r8], -r6, lsl #31\n+\tmrc\t7, 2, APSR_nzcv, cr4, cr10, {7}\n \tstmdavs\tr3, {r3, r6, r8, ip, sp, pc}\n \tldmdavs\tsl, {r0, r1, r3, r4, r5, r8, ip, sp, pc}\n \tandvs\tr2, r1, r0, lsl #2\n \tandsvs\tr3, sl, r1, lsl #20\n \t\t\t; instruction: 0xf0002a00\n \t\t\t; instruction: 0xf89b8332\n \t\t\t; instruction: 0x06dc3018\n@@ -5078,27 +5078,27 @@\n \t\t\t; instruction: 0xf0035cd3\n \tldr\tr0, [r0, r1, lsl #6]\n \tmcr2\t7, 2, pc, cr8, cr12, {7}\t; \n \tstrtmi\tr4, [r8], -r0, lsl #13\n \tldrsbtcc\tpc, [ip], -r8\t; \n \tbcc\t445088 \n \t\t\t; instruction: 0xf7fa4619\n-\t\t\t; instruction: 0xf8d8ed14\n+\t\t\t; instruction: 0xf8d8ed16\n \t\t\t; instruction: 0xf85aa038\n \t\t\t; instruction: 0xb1ab3021\n \t\t\t; instruction: 0xf8d7681f\n \tstrbmi\tr9, [fp], -r4\n \tldrmi\tr4, [lr], -r9, lsr #13\n \t\t\t; instruction: 0x46c24655\n \tldrmi\tr4, [r1, #1672]!\t; 0x688\n \tldmdavs\tpc!, {r1, r2, r4, ip, lr, pc}\t; \n \tldmdavs\tlr!, {r0, r1, r2, r3, r4, r5, r8, ip, sp, pc}^\n \tbne\t4450f8 \n \t\t\t; instruction: 0xf7fa4630\n-\tstrmi\tlr, [r8, #3324]\t; 0xcfc\n+\tstrmi\tlr, [r8, #3326]\t; 0xcfe\n \t\t\t; instruction: 0x464dd0f3\n \tumaalcc\tpc, r8, r4, r8\t; \n \tmovteq\tpc, #963\t; 0x3c3\t; \n \tblcs\t2e4d4 \n \t\t\t; instruction: 0xf8dfd057\n \tldrbtmi\tr0, [r8], #-2044\t; 0xfffff804\n \t\t\t; instruction: 0xf82cf7fb\n@@ -5111,30 +5111,30 @@\n \taddsmi\tr8, r7, #222\t; 0xde\n \tstrb\tsp, [r3, r4, lsl #2]!\n \tsmlalle\tr4, r1, r6, r2\n \tldmdavs\tr6!, {r0, r1, r2, r4, r5, r9, sl, lr}\n \tldrmi\tr6, [fp, #2235]\t; 0x8bb\n \tldmdavs\tr8!, {r3, r4, r5, r6, r7, r8, ip, lr, pc}^\n \tbne\t445150 \n-\tldcl\t7, cr15, [r0], {250}\t; 0xfa\n+\tldcl\t7, cr15, [r2], {250}\t; 0xfa\n \t\t\t; instruction: 0xf85a460b\n \tstrmi\tr1, [sl], -r1, lsr #32\n \tldmdavs\tr2, {r0, r4, r7, r9, sl, lr}\n \tldrhle\tr4, [fp, #42]!\t; 0x2a\n \t\t\t; instruction: 0xf0004549\n \tmovwls\tr8, #12782\t; 0x31ee\n \tldmdavs\tr0!, {r1, r2, r4, r6, r8, ip, sp, pc}^\n \tbne\t445174 \n-\tldc\t7, cr15, [lr], #1000\t; 0x3e8\n+\tstcl\t7, cr15, [r0], {250}\t; 0xfa\n \taddmi\tr9, fp, #3072\t; 0xc00\n \t\t\t; instruction: 0xf84abf1c\n \tldmdavs\tlr!, {r0, r5, ip, pc}\n \ttstcs\tip, r8, lsr r6\n \tandvs\tpc, r0, r9, asr #17\n-\tldc\t7, cr15, [r2, #-1000]!\t; 0xfffffc18\n+\tldc\t7, cr15, [r4, #-1000]!\t; 0xfffffc18\n \tldrdcc\tpc, [r4], #-136\t; 0xffffff78\n \t\t\t; instruction: 0xf8c83b01\n \t\t\t; instruction: 0xf8943044\n \tldreq\tr3, [r8, r8, asr #32]\n \tmovwcs\tfp, #8028\t; 0x1f5c\n \tstrle\tr9, [ip, #-777]\t; 0xfffffcf7\n \tmulscc\tr8, fp, r8\n@@ -5177,27 +5177,27 @@\n \tldrmi\tr4, [r8, r8, lsr #12]\n \taddmi\tr4, r5, #6291456\t; 0x600000\n \teorle\tr9, r4, ip\n \tstc2\t7, cr15, [r0, #1008]\t; 0x3f0\n \tldrtmi\tr4, [r0], -r2, lsl #13\n \tldrsbtls\tpc, [ip], -sl\t; \n \t\t\t; instruction: 0xf7fa4649\n-\t\t\t; instruction: 0xf8daec4e\n+\t\t\t; instruction: 0xf8daec50\n \tmovwls\tr3, #16440\t; 0x4038\n \teorcc\tpc, r1, r3, asr r8\t; \n \tldmdavs\tpc, {r0, r1, r3, r5, r7, r8, ip, sp, pc}\t; \n \t\t\t; instruction: 0x46d3465b\n \t\t\t; instruction: 0xf8d7468a\n \tstrbmi\tr8, [r6], -r4\n \tblls\t31b478 \n \t\t\t; instruction: 0xf00042b3\n \tldmdavs\tpc!, {r0, r4, r5, r6, r7, pc}\t; \n \tldmdavs\tlr!, {r0, r1, r2, r4, r5, r8, ip, sp, pc}^\n \tldrtmi\tr4, [r0], -r9, asr #12\n-\tldc\t7, cr15, [r4], #-1000\t; 0xfffffc18\n+\tldc\t7, cr15, [r6], #-1000\t; 0xfffffc18\n \trscsle\tr4, r2, sl, lsl #11\n \tblls\t15b540 \n \t\t\t; instruction: 0xf8d3681b\n \tandls\tr2, sl, #168\t; 0xa8\n \ttstlt\tr2, r7, lsl r2\n \tmovwcc\tr6, #6163\t; 0x1813\n \tbls\t2a1a94 \n@@ -5214,15 +5214,15 @@\n \tandls\tpc, r8, fp, ror r9\t; \n \tblls\t2f8138 \n \taddsmi\tr9, r3, #4, 20\t; 0x4000\n \tbls\t2be24c \n \tblcc\t63ad0 \n \tblcs\t21ad4 \n \tldrmi\tsp, [r0], -ip, lsl #3\n-\tstcl\t7, cr15, [r6], {250}\t; 0xfa\n+\tstcl\t7, cr15, [r8], {250}\t; 0xfa\n \tldmdavs\tr2, {r3, r7, r8, r9, sl, sp, lr, pc}\n \t\t\t; instruction: 0xf47f2a00\n \tandcs\tsl, r0, #26, 30\t; 0x68\n \t\t\t; instruction: 0xf8dbe722\n \tldrb\tr1, [r1], -r8\n \tldrdcc\tlr, [fp, -r0]\n \trscle\tr4, r4, fp, lsl #5\n@@ -5234,28 +5234,28 @@\n \t\t\t; instruction: 0x4638685b\n \t\t\t; instruction: 0x46064798\n \tandls\tr4, lr, r7, lsl #5\n \t\t\t; instruction: 0xf7fcd024\n \tstrmi\tpc, [r2], sp, lsl #26\n \t\t\t; instruction: 0xf8da4630\n \t\t\t; instruction: 0x4649903c\n-\tbl\tff6c7ac8 \n+\tbl\tff747ac8 \n \tldrsbtcc\tpc, [r8], -sl\t; \n \t\t\t; instruction: 0xf853930d\n \t\t\t; instruction: 0xb1ab3021\n \t\t\t; instruction: 0x465b681f\n \tpkhtbmi\tr4, sl, r3, asr #13\n \tldrdhi\tpc, [r4], -r7\n \tldrmi\tr4, [r8], r6, asr #12\n \tadcsmi\tr9, r3, #14336\t; 0x3800\n \tmrshi\tpc, (UNDEF: 13)\t; \n \tteqlt\tr7, pc, lsr r8\n \t\t\t; instruction: 0x4649687e\n \t\t\t; instruction: 0xf7fa4630\n-\tstrmi\tlr, [sl, #3010]\t; 0xbc2\n+\tstrmi\tlr, [sl, #3012]\t; 0xbc4\n \t\t\t; instruction: 0x46c3d0f2\n \tldmdavs\tfp, {r3, r8, r9, fp, ip, pc}\n \tldrdge\tpc, [r8], r3\t; \n \trsbge\tpc, r0, sp, asr #17\n \tsvceq\t0x0000f1ba\n \t\t\t; instruction: 0xf8dad004\n \tmovwcc\tr3, #4096\t; 0x1000\n@@ -5273,15 +5273,15 @@\n \tstmdblt\tr8!, {r7, r9, sl, lr}^\n \tstrbmi\tr9, [fp, #-2829]\t; 0xfffff4f3\n \t\t\t; instruction: 0xf8dad1f6\n \tblcc\t55b6c \n \tandcc\tpc, r0, sl, asr #17\n \torrle\tr2, r0, r0, lsl #22\n \t\t\t; instruction: 0xf7fa4650\n-\t\t\t; instruction: 0xe77cec52\n+\t\t\t; instruction: 0xe77cec54\n \tldrdcc\tlr, [fp, -r0]\n \trscle\tr4, sp, fp, lsl #5\n \tldmdavs\tr0, {r3, r9, fp, ip, pc}^\n \tmovwcc\tlr, #32770\t; 0x8002\n \tsmlalle\tr4, r7, r9, r2\n \taddmi\tr6, r2, #1703936\t; 0x1a0000\n \tsvcls\t0x000ed1f9\n@@ -5289,27 +5289,27 @@\n \t\t\t; instruction: 0x46064798\n \tandls\tr4, pc, r7, lsl #5\n \t\t\t; instruction: 0xf7fcd025\n \tstrmi\tpc, [r7], -r1, lsr #25\n \t\t\t; instruction: 0x46309015\n \ttstls\tr1, #257024\t; 0x3ec00\n \t\t\t; instruction: 0xf7fa4619\n-\tblvs\tfef04974 \n+\tblvs\tfef0497c \n \ttstls\tr2, #14680064\t; 0xe00000\n \teorcs\tpc, r1, r3, asr r8\t; \n \tldmdavs\tr7, {r1, r3, r5, r7, r8, ip, sp, pc}\n \tstmib\tsp, {r0, r4, r8, r9, fp, ip, pc}^\n \tldmdavs\tsl!, {r0, r1, r4, sl, ip, lr}^\n \t\t\t; instruction: 0x4615461c\n \tadcmi\tr9, fp, #15360\t; 0x3c00\n \tmsrhi\tSPSR_xc, r0\n \tteqlt\tr7, pc, lsr r8\n \t\t\t; instruction: 0x4621687d\n \t\t\t; instruction: 0xf7fa4628\n-\taddmi\tlr, lr, #88064\t; 0x15800\n+\taddmi\tlr, lr, #88, 22\t; 0x16000\n \tldmib\tsp, {r1, r4, r5, r6, r7, ip, lr, pc}^\n \t\t\t; instruction: 0x46415413\n \tmovweq\tlr, #63965\t; 0xf9dd\n \t\t\t; instruction: 0xf7ff465a\n \t\t\t; instruction: 0xe7aff973\n \t\t\t; instruction: 0x46c346da\n \tldmdavs\tlr!, {r4, r5, r7, r9, sl, lr}\n@@ -5320,63 +5320,63 @@\n \t\t\t; instruction: 0xd1054297\n \tadcsmi\tlr, r2, #2359296\t; 0x240000\n \tsvcge\t0x0007f43f\n \tldmdavs\tr6!, {r0, r1, r2, r4, r5, r9, sl, lr}\n \tldrmi\tr6, [fp, #2235]\t; 0x8bb\n \tldmdavs\tr8!, {r0, r1, r2, r4, r5, r6, r7, r8, ip, lr, pc}^\n \t\t\t; instruction: 0xf7fa4649\n-\tblls\t1448f8 \n+\tblls\t144900 \n \t\t\t; instruction: 0xf8539108\n \tldrmi\tr2, [r3], -r1, lsr #32\n \tldmdavs\tfp, {r3, r4, r7, r9, sl, lr}\n \tldrhle\tr4, [fp, #43]!\t; 0x2b\n \t\t\t; instruction: 0xf0004542\n \tcmplt\tr6, r0, lsl #3\n \t\t\t; instruction: 0x46496870\n-\tbl\t7c7c40 \n+\tbl\t847c40 \n \taddmi\tr9, fp, #8, 22\t; 0x2000\n \tblls\t1398d8 \n \teorhi\tpc, r1, r3, asr #16\n \t\t\t; instruction: 0x4638683e\n \t\t\t; instruction: 0xf8c8210c\n \t\t\t; instruction: 0xf7fa6000\n-\t\t\t; instruction: 0xf8daeb92\n+\t\t\t; instruction: 0xf8daeb94\n \tblcc\t55d88 \n \tsubcc\tpc, r4, sl, asr #17\n \t\t\t; instruction: 0xf8dfe6d9\n \t\t\t; instruction: 0xf8df2434\n \tldrbtmi\tr3, [sl], #-1044\t; 0xfffffbec\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr9, sl, pc, lsl fp\n \tmovweq\tpc, #79\t; 0x4f\t; \n \t\t\t; instruction: 0x81b6f040\n \teorlt\tr4, r1, r0, lsr #12\n \tblhi\tc4f94 \n \tsvcmi\t0x00f0e8bd\n-\tbllt\tfee47c90 \n+\tbllt\tfeec7c90 \n \tstc2\t7, cr15, [r0], #-1008\t; 0xfffffc10\n \tldrbmi\tr4, [r8], -r7, lsl #12\n \t\t\t; instruction: 0x8090f8d7\n \t\t\t; instruction: 0xf7fa4641\n-\t\t\t; instruction: 0xf8d7eaee\n+\t\t\t; instruction: 0xf8d7eaf0\n \tstrmi\tsl, [lr], -ip, lsl #1\n \teorcc\tpc, r1, sl, asr r8\t; \n \tldmdavs\tip, {r0, r1, r5, r6, r8, ip, sp, pc}\n \tstrmi\tr6, [fp, #2149]!\t; 0x865\n \tstmdavs\tr4!, {r1, r2, r5, r6, ip, lr, pc}\n \tstmdavs\tr5!, {r2, r4, r5, r8, ip, sp, pc}^\n \tstrtmi\tr4, [r8], -r1, asr #12\n-\tb\tff747cc4 \n+\tb\tff7c7cc4 \n \trscsle\tr4, r4, lr, lsl #5\n \tldmvs\tfp, {r8, r9, sp}\n \tmcrcs\t14, 0, sp, cr0, cr15, {7}\n \tsbcshi\tpc, r9, r0\n \tbne\t445550 \n \tmovwls\tr6, #14448\t; 0x3870\n-\tb\tff3c7ce0 \n+\tb\tff447ce0 \n \taddmi\tr9, fp, #3072\t; 0xc00\n \tmrcge\t4, 0, APSR_nzcv, cr2, cr15, {1}\n \teorls\tpc, r1, sl, asr #16\n \teorcs\tpc, r3, sl, asr r8\t; \n \tcmpeq\tr0, r8, lsl #2\t; \n \tsvclt\t0x0008428a\n \tsubvs\tpc, r0, r8, asr #17\n@@ -5391,55 +5391,55 @@\n \taddsmi\tr8, r7, #1073741824\t; 0x40000000\n \tstrbt\tsp, [sp], r5, lsl #2\n \t\t\t; instruction: 0xf43f42b2\n \tldrtmi\tsl, [r7], -fp, ror #29\n \tldmvs\tfp!, {r1, r2, r4, r5, fp, sp, lr}\n \t\t\t; instruction: 0xd1f7459b\n \t\t\t; instruction: 0x46496878\n-\tb\tfe847d3c \n+\tb\tfe8c7d3c \n \ttstls\tpc, sp, lsl #22\n \teorcs\tpc, r1, r3, asr r8\t; \n \t\t\t; instruction: 0x46984613\n \tadcsmi\tr6, fp, #1769472\t; 0x1b0000\n \tstrbmi\tsp, [r2, #-507]\t; 0xfffffe05\n \tmrshi\tpc, (UNDEF: 14)\t; \n \tldmdavs\tr0!, {r1, r2, r4, r6, r8, ip, sp, pc}^\n \t\t\t; instruction: 0xf7fa4649\n-\tblls\t4047b8 \n+\tblls\t4047c0 \n \tsvclt\t0x001e428b\n \t\t\t; instruction: 0xf8439b0d\n \tldmdavs\tlr!, {r0, r5, pc}\n \ttstcs\tip, r8, lsr r6\n \tandvs\tpc, r0, r8, asr #17\n-\tbl\tc7d78 \n+\tbl\t147d78 \n \tldrdcc\tpc, [r4], #-138\t; 0xffffff76\n \t\t\t; instruction: 0xf8ca3b01\n \tldrt\tr3, [sp], r4, asr #32\n \tstmdbvs\tr2!, {r8, r9, sp}\n \tldrdls\tpc, [r8], -r4\n \tadcvs\tr4, r3, r1, asr #12\n \t\t\t; instruction: 0x61234658\n \trscvs\tr6, r3, r6, ror #17\n \t\t\t; instruction: 0xf7fa9202\n-\t\t\t; instruction: 0x460aea70\n+\t\t\t; instruction: 0x460aea72\n \teorne\tpc, r1, sl, asr r8\t; \n \tldrmi\tr4, [sp], -fp, lsl #12\n \tadcmi\tr6, r3, #1769472\t; 0x1b0000\n \tstmdavs\tr3!, {r0, r1, r3, r4, r5, r6, r7, r8, ip, lr, pc}\n \tsuble\tr4, ip, r9, lsr #5\n \tcmplt\tfp, r3, lsl #4\n \t\t\t; instruction: 0x46416858\n \t\t\t; instruction: 0xf7fa9304\n-\tbls\t104754 \n+\tbls\t10475c \n \taddmi\tr9, sl, #4, 22\t; 0x1000\n \t\t\t; instruction: 0xf84abf1c\n \tstmdavs\tr3!, {r0, r5, ip, lr}\n \tstrtmi\tr6, [r0], -fp, lsr #32\n \t\t\t; instruction: 0xf7fa2114\n-\t\t\t; instruction: 0xf8d7ead2\n+\t\t\t; instruction: 0xf8d7ead4\n \tldrmi\tr3, [r1, #152]!\t; 0x98\n \tmvnscc\tpc, #-1073741824\t; 0xc0000000\n \taddscc\tpc, r8, r7, asr #17\n \t\t\t; instruction: 0x464cbf1c\n \t\t\t; instruction: 0xf89b2500\n \tvqadd.u32\td19, d15, d8\n \t\t\t; instruction: 0xf88b1304\n@@ -5447,32 +5447,32 @@\n \tadcmi\tlr, r6, #16\n \t\t\t; instruction: 0xf854d00e\n \tstmdacs\tr0, {r2, r8, r9, fp}\n \tstmdavs\tr3, {r0, r3, r4, r5, r6, r7, ip, lr, pc}\n \tstcpl\t8, cr15, [r4], {68}\t; 0x44\n \tandvs\tr3, r3, r1, lsl #22\n \tmvnsle\tr2, r0, lsl #22\n-\tb\tffd47e1c \n+\tb\tffdc7e1c \n \tmvnsle\tr4, r6, lsr #5\n \tsvceq\t0x0000f1b9\n \tcfstrdge\tmvd15, [r2], #252\t; 0xfc\n \tstrbmi\tr9, [r8], -r2, lsl #22\n \tsmlatbeq\tr9, r3, fp, lr\n-\tb\tfe947e34 \n+\tb\tfe9c7e34 \n \t\t\t; instruction: 0x4610e4da\n-\tb\tff947e3c \n+\tb\tff9c7e3c \n \tblcs\t30a7c \n \tcfldrdge\tmvd15, [r6, #-508]!\t; 0xfffffe04\n \tldrmi\tlr, [r8], -r9, lsr #10\n-\tb\tff747e4c \n+\tb\tff7c7e4c \n \tblcs\t4318c \n \tsbchi\tpc, r6, r0\n \t\t\t; instruction: 0x46416858\n \tmovwls\tr9, #12804\t; 0x3204\n-\tb\t3c7e60 \n+\tb\t447e60 \n \tblls\tf068c \n \tadcsle\tr4, r3, sl, lsl #5\n \teorpl\tpc, r1, sl, asr #16\n \teoreq\tpc, r2, sl, asr r8\t; \n \torrseq\tpc, r4, r7, lsl #2\n \tsvclt\t0x00084288\n \taddscc\tpc, r4, r7, asr #17\n@@ -5488,31 +5488,31 @@\n \tsmlabble\tr5, pc, r2, r4\t; \n \tadcsmi\tlr, r1, #160432128\t; 0x9900000\n \tmrcge\t4, 4, APSR_nzcv, cr7, cr15, {1}\n \tldmdavs\tr6!, {r0, r1, r2, r4, r5, r9, sl, lr}\n \tldrmi\tr6, [r3, #2234]\t; 0x8ba\n \t\t\t; instruction: 0x4619d1f7\n \ttstls\tr1, #120, 16\t; 0x780000\n-\tldmib\tlr, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tr0!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \ttstls\tr3, r2, lsl fp\n \teoreq\tpc, r1, r3, asr r8\t; \n \t\t\t; instruction: 0x46019b11\n \tstmdavs\tr9, {r1, r3, r9, sl, lr}\n \tldrhle\tr4, [fp, #41]!\t; 0x29\n \tmlsle\tr7, r0, r2, r4\n \tldmdavs\tr0!, {r1, r2, r5, r6, r8, ip, sp, pc}^\n \tandsls\tr4, r1, #26214400\t; 0x1900000\n-\tstmib\tip, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmib\tlr, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tbls\t470b4c \n \tsvclt\t0x001e428b\n \t\t\t; instruction: 0xf8439b12\n \tldmdavs\tlr!, {r0, r5, sp}\n \ttstcs\tip, r8, lsr r6\n \t\t\t; instruction: 0xf7fa6016\n-\tbls\t584818 \n+\tbls\t584820 \n \tmrrcvs\t6, 4, r4, r3, cr1\n \tldrbvs\tr3, [r3], #-2817\t; 0xfffff4ff\n \tmovweq\tlr, #63965\t; 0xf9dd\n \t\t\t; instruction: 0xf7fe465a\n \t\t\t; instruction: 0xe619ffdd\n \tbcs\t23f78 \n \tmcrge\t4, 3, pc, cr14, cr15, {3}\t; \n@@ -5520,87 +5520,87 @@\n \tbcs\t23f84 \n \tmrcge\t4, 7, APSR_nzcv, cr7, cr15, {3}\n \tstr\tr2, [r0, -r0, lsl #4]\n \tstmdbcs\tr0, {r0, r3, fp, sp, lr}\n \t\t\t; instruction: 0x2100d1b3\n \tstrhlt\tlr, [lr, #124]\t; 0x7c\n \t\t\t; instruction: 0x46496870\n-\tldmib\tlr, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tr0!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \taddmi\tr9, fp, #8, 22\t; 0x2000\n \tmcrge\t4, 4, pc, cr3, cr15, {1}\t; \n \t\t\t; instruction: 0xf8429a04\n \t\t\t; instruction: 0xf8528021\n \t\t\t; instruction: 0xf10a3023\n \tstmdbls\tr8, {r6, r9}\n \tbls\t11a9c0 \n \t\t\t; instruction: 0xf8cabf08\n \tmovwcs\tr6, #64\t; 0x40\n \teorcc\tpc, r1, r2, asr #16\n \t\t\t; instruction: 0xe670683e\n \tldrb\tr4, [r0, r3, asr #12]!\n \teorsle\tr2, r7, r0, lsl #28\n \t\t\t; instruction: 0x46496870\n-\tstmib\tr0, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tstmib\tr2, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \taddmi\tr9, fp, #15360\t; 0x3c00\n \tmrcge\t4, 7, APSR_nzcv, cr4, cr15, {1}\n \t\t\t; instruction: 0xf8429a0d\n \t\t\t; instruction: 0xf8528021\n \t\t\t; instruction: 0xf10a3023\n \tstmdbls\tpc, {r6, r9}\t; \n \tbls\t35a9fc \n \t\t\t; instruction: 0xf8cabf08\n \tmovwcs\tr6, #64\t; 0x40\n \teorcc\tpc, r1, r2, asr #16\n \t\t\t; instruction: 0xe6e1683e\n \t\t\t; instruction: 0x4619b1f6\n \tandsls\tr6, r1, #112, 16\t; 0x700000\n-\tstmdb\tr4!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n+\tstmdb\tr6!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tbls\t470c1c \n \taddsle\tr4, fp, fp, lsl #5\n \t\t\t; instruction: 0xf8409812\n \t\t\t; instruction: 0xf8502021\n \tldmdbls\tr5, {r0, r1, r5, ip, sp}\n \tmrscc\tr2, (UNDEF: 64)\n \tsvclt\t0x0004428b\n \tldrvs\tr9, [lr], #-2837\t; 0xfffff4eb\n \t\t\t; instruction: 0x3112e9dd\n \teoreq\tpc, r1, r3, asr #16\n \t\t\t; instruction: 0xe789683e\n \tstrb\tr4, [r5, -r8, lsr #12]\n \tldrb\tr4, [r2, r3, asr #12]\n \t\t\t; instruction: 0xe7ec4613\n-\tb\tff2c7ff0 \n+\tb\tff347ff0 \n \tldrbtmi\tr4, [r8], #-2091\t; 0xfffff7d5\n \tstc2\t7, cr15, [r2], {250}\t; 0xfa\n \tstrmi\tr9, [r4], -r2, lsl #22\n \tsmlatbeq\tr9, r3, fp, lr\n \tsvceq\t0x0000f1b9\n \tstrbmi\tsp, [r8], -r2\n-\tldmib\tr8!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n+\tldmib\tsl!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t; instruction: 0xf7fa4620\n-\t\t\t; instruction: 0x4604ebf0\n+\t\t\t; instruction: 0x4604ebf2\n \t\t\t; instruction: 0xf0064638\n \tstrtmi\tpc, [r8], -sp, asr #26\n \tstc2l\t0, cr15, [sl, #-24]\t; 0xffffffe8\n \t\t\t; instruction: 0xf7fa4620\n-\tvldrge\td14, [r8, #-920]\t; 0xfffffc68\n+\tvldrge\td14, [r8, #-928]\t; 0xfffffc60\n \tstrtmi\tr4, [r8], -r4, lsl #12\n \tstc2l\t0, cr15, [r2, #-24]\t; 0xffffffe8\n \t\t\t; instruction: 0xf7fa4620\n-\t\t\t; instruction: 0x4604ebde\n+\tstrmi\tlr, [r4], -r0, ror #23\n \t\t\t; instruction: 0xf7fa4628\n \t\t\t; instruction: 0x4620fd93\n-\tbl\tff5c8044 \n+\tbl\tff648044 \n \tldmdage\tr8, {r2, r9, sl, lr}\n \tldc2\t0, cr15, [r4, #-24]!\t; 0xffffffe8\n \t\t\t; instruction: 0xf006a817\n \tldmdage\tr6, {r0, r4, r5, r8, sl, fp, ip, sp, lr, pc}\n \tstc2\t0, cr15, [lr, #-24]!\t; 0xffffffe8\n \t\t\t; instruction: 0xf7fa4620\n-\tstrmi\tlr, [r4], -sl, asr #23\n+\tstrmi\tlr, [r4], -ip, asr #23\n \tblls\t683fe8 \n \tblcs\t1b890 \n \t\t\t; instruction: 0x4618d0df\n \tstc2\t0, cr15, [r4, #28]!\n \t\t\t; instruction: 0x4604e7db\n \tstrmi\tlr, [r4], -sp, ror #15\n \tsvclt\t0x0000e7e8\n@@ -5710,87 +5710,87 @@\n \tbx\tlr\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n \tldr\tr0, [r0, #0]\n \tcbz\tr0, a18c \n \tldr\tr1, [r4, #16]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmovs\tr3, #0\n \tstrd\tr3, r3, [r4]\n \tstrd\tr3, r3, [r4, #8]\n \tstr\tr3, [r4, #16]\n \tpop\t{r4, pc}\n \tnop\n \tpush\t{r4, lr}\n \tmovs\tr1, #8\n \tmov\tr4, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tpush\t{r4, lr}\n \tmovs\tr1, #16\n \tmov\tr4, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tpush\t{r4, lr}\n \tmovs\tr1, #16\n \tmov\tr4, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tpush\t{r4, lr}\n \tmovs\tr1, #16\n \tmov\tr4, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tpush\t{r4, lr}\n \tmovs\tr1, #16\n \tmov\tr4, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tmovs\tr1, #16\n-\tb.w\t438c \n+\tb.w\t4390 \n \tnop\n \tldr\tr0, [r0, #12]\n \tcbz\tr0, a1fe \n \tldr\tr2, [r0, #0]\n \tldr\tr3, [pc, #20]\t; (a204 )\n \tldr\tr2, [r2, #12]\n \tadd\tr3, pc\n \tcmp\tr2, r3\n \tbne.n\ta200 \n \tmovs\tr1, #8\n-\tb.w\t438c \n+\tb.w\t4390 \n \tbx\tlr\n \tbx\tr2\n \tnop\n \t\t\t; instruction: 0xff9bffff\n \tpush\t{r4, lr}\n \tmovs\tr1, #16\n \tmov\tr4, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tmovs\tr1, #16\n-\tb.w\t438c \n+\tb.w\t4390 \n \tnop\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n \tmovs\tr0, #8\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [pc, #12]\t; (a238 )\n \tldr\tr1, [r4, #4]\n \tadd\tr3, pc\n \tadds\tr3, #8\n \tstrd\tr3, r1, [r0]\n \tpop\t{r4, pc}\n \tstmia.w\tsl!, {r0}\n@@ -5830,43 +5830,43 @@\n \tcmp\tr4, r9\n \tbeq.n\ta2aa \n \tsub.w\tr2, r9, r4\n \tmov\tr0, r3\n \tmov\tr1, r4\n \tadd\tr3, r2\n \tstr\tr3, [sp, #4]\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr3, [sp, #4]\n \tcbz\tr7, a2ba \n \tldr\tr1, [r6, #8]\n \tmov\tr0, r7\n \tstr\tr3, [sp, #4]\n \tsubs\tr1, r1, r7\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #4]\n \tstrd\tr8, r3, [r6]\n \tstr\tr5, [r6, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmovw\tr5, #65532\t; 0xfffc\n \tmovt\tr5, #32767\t; 0x7fff\n \tmov\tr0, r5\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr8, r0\n \tadd\tr5, r0\n \tadds\tr3, r0, #4\n \tb.n\ta270 \n \tcmp\tr5, r1\n \tit\tcs\n \tmovcs\tr5, r1\n \tlsls\tr5, r5, #2\n \tb.n\ta2ce \n \tldr\tr0, [pc, #8]\t; (a2f0 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tnop\n \tpush\t{r3, r4, r5, r6}\n \tmovs\tr0, r0\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tmov\tr5, r0\n \tldr.w\tfp, [r0, #8]\n \tsub\tsp, #28\n@@ -5972,23 +5972,23 @@\n \tcmp\tr4, r3\n \tit\tcs\n \tmovcs\tr4, r3\n \tadds\tr4, #31\n \tlsrs\tr4, r4, #5\n \tlsls\tr4, r4, #2\n \tmov\tr0, r4\n-\tblx\t415c \n+\tblx\t4160 \n \tldr.w\tsl, [r5]\n \tmov\tr9, r0\n \tsub.w\tr8, r7, sl\n \tcmp\tr7, sl\n \tbeq.n\ta436 \n \tmov\tr2, r8\n \tmov\tr1, sl\n-\tblx\t4460 \n+\tblx\t4464 \n \tadd.w\tr0, r9, r8\n \tmov\tip, r6\n \tcmp\tr6, #0\n \tble.n\ta528 \n \tmov\tlr, r7\n \tmovs\tr3, #0\n \tmov.w\tfp, #1\n@@ -6058,15 +6058,15 @@\n \tsubs\tr0, #1\n \tbne.n\ta4ba \n \tcmp.w\tsl, #0\n \tbeq.n\ta50a \n \tldr\tr1, [r5, #16]\n \tmov\tr0, sl\n \tsub.w\tr1, r1, sl\n-\tblx\t4390 \n+\tblx\t4394 \n \tadd\tr4, r9\n \tmovs\tr3, #0\n \tstr.w\tr9, [r5]\n \tstr\tr4, [r5, #16]\n \tstrd\tr3, fp, [r5, #4]\n \tstr.w\tr8, [r5, #12]\n \tadd\tsp, #28\n@@ -6078,40 +6078,40 @@\n \tmov\tr8, r2\n \tb.n\ta49a \n \tmovw\tr4, #65532\t; 0xfffc\n \tmovt\tr4, #4095\t; 0xfff\n \tb.n\ta41a \n \tldr\tr0, [pc, #8]\t; (a544 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tnop\n \tcbnz\tr4, a548 \n \tmovs\tr0, r0\n \tldr\tr3, [pc, #20]\t; (a560 )\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n \tadd\tr3, pc\n \tadd.w\tr3, r3, #280\t; 0x118\n \tstr\tr3, [r0, #0]\n-\tblx\t458c \n+\tblx\t4590 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tb.n\ta350 \n \tmovs\tr1, r0\n \tldr\tr3, [pc, #28]\t; (a584 )\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n \tadd\tr3, pc\n \tadd.w\tr3, r3, #280\t; 0x118\n \tstr\tr3, [r0, #0]\n-\tblx\t458c \n+\tblx\t4590 \n \tmov\tr0, r4\n \tmovs\tr1, #8\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, pc}\n \tnop\n \tb.n\ta33c \n \tmovs\tr1, r0\n \tldr\tr1, [pc, #252]\t; (a688 )\n \tldr\tr2, [pc, #256]\t; (a68c )\n@@ -6132,15 +6132,15 @@\n \tbeq.n\ta606 \n \tmov\tr5, sp\n \tmov\tr0, r5\n \tbl\t12870 \n \tadd\tr0, sp, #8\n \tadd\tr2, sp, #16\n \tadd\tr1, sp, #12\n-\tblx\t478c \n+\tblx\t4790 \n \tldr\tr0, [r4, #8]\n \tmovs\tr3, #0\n \tstr\tr3, [r4, #8]\n \tcbz\tr0, a5d2 \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n@@ -6162,15 +6162,15 @@\n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbeq.n\ta67c \n \tldr\tr0, [sp, #8]\n \tldrd\tr1, r2, [sp, #12]\n-\tblx\t4260 \n+\tblx\t4264 \n \tmov\tr0, r5\n \tbl\t1285c \n \tldr\tr0, [r4, #16]\n \tcbz\tr0, a612 \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n@@ -6184,50 +6184,50 @@\n \tldr\tr0, [r4, #8]\n \tcbz\tr0, a62a \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcbz\tr3, a64a \n \tmov\tr0, r4\n-\tblx\t458c \n+\tblx\t4590 \n \tldr\tr2, [pc, #96]\t; (a694 )\n \tldr\tr3, [pc, #88]\t; (a68c )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\ta682 \n \tmov\tr0, r4\n \tadd\tsp, #28\n \tpop\t{r4, r5, pc}\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta62a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta61e \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta612 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr0, [r4, #12]\n \tmovs\tr3, #0\n \tstr\tr3, [r4, #12]\n \tcmp\tr0, #0\n \tbne.n\ta5da \n \tb.n\ta5e4 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr0, [r4, #16]\n \tmovs\tr3, #0\n \tstr\tr3, [r4, #16]\n \tcmp\tr0, #0\n \tbne.n\ta5ec \n \tb.n\ta5f6 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta5f6 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tnop\n \torns\tr0, r0, r1\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tb.n\ta3ec \n \tmovs\tr1, r0\n \tstrd\tr0, r0, [r8, #4]\n@@ -6250,15 +6250,15 @@\n \tbeq.n\ta716 \n \tmov\tr5, sp\n \tmov\tr0, r5\n \tbl\t12870 \n \tadd\tr0, sp, #8\n \tadd\tr2, sp, #16\n \tadd\tr1, sp, #12\n-\tblx\t478c \n+\tblx\t4790 \n \tldr\tr0, [r4, #8]\n \tmovs\tr3, #0\n \tstr\tr3, [r4, #8]\n \tcbz\tr0, a6e2 \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n@@ -6280,15 +6280,15 @@\n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbeq.n\ta794 \n \tldr\tr0, [sp, #8]\n \tldrd\tr1, r2, [sp, #12]\n-\tblx\t4260 \n+\tblx\t4264 \n \tmov\tr0, r5\n \tbl\t1285c \n \tldr\tr0, [r4, #16]\n \tcbz\tr0, a722 \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n@@ -6302,53 +6302,53 @@\n \tldr\tr0, [r4, #8]\n \tcbz\tr0, a73a \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcbz\tr3, a762 \n \tmov\tr0, r4\n-\tblx\t458c \n+\tblx\t4590 \n \tmovs\tr1, #20\n \tmov\tr0, r4\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr2, [pc, #96]\t; (a7ac )\n \tldr\tr3, [pc, #88]\t; (a7a4 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\ta79a \n \tmov\tr0, r4\n \tadd\tsp, #28\n \tpop\t{r4, r5, pc}\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta73a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta72e \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta722 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr0, [r4, #12]\n \tmovs\tr3, #0\n \tstr\tr3, [r4, #12]\n \tcmp\tr0, #0\n \tbne.n\ta6ea \n \tb.n\ta6f4 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr0, [r4, #16]\n \tmovs\tr3, #0\n \tstr\tr3, [r4, #16]\n \tcmp\tr0, #0\n \tbne.n\ta6fc \n \tb.n\ta706 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\ta706 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tnop\n \tstrd\tr0, r0, [r0, #-4]!\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tb.n\ta2e4 \n \tmovs\tr1, r0\n \tldmia.w\tr0!, {r0}\n@@ -6489,59 +6489,59 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r4, #0]\n \tbeq.n\ta904 \n \tldr\tr1, [r4, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr5, [r4, #12]\n \tcmp\tr5, #0\n \tbeq.n\ta976 \n \tldr\tr0, [r5, #12]\n \tbl\t12b2c \n \tldr\tr0, [r5, #24]\n \tldr\tr6, [r5, #8]\n \tcbz\tr0, a96a \n \tbl\ta7b0 \n \tmovs\tr1, #28\n \tmov\tr0, r5\n-\tblx\t4390 \n+\tblx\t4394 \n \tcbz\tr6, a976 \n \tmov\tr5, r6\n \tb.n\ta90a \n \tldr\tr3, [pc, #408]\t; (aac4 )\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tstr\tr3, [r6, #0]\n \tadd.w\tr3, r6, #36\t; 0x24\n \tcmp\tr0, r3\n \tbeq.n\ta942 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr5, [r6, #12]\n \tcbz\tr5, a9a6 \n \tldr\tr0, [r5, #12]\n \tbl\t12b2c \n \tldr\tr0, [r5, #24]\n \tldr.w\tr8, [r5, #8]\n \tcbz\tr0, a998 \n \tbl\ta7b0 \n \tmov\tr0, r5\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp.w\tr8, #0\n \tbeq.n\ta9a6 \n \tmov\tr5, r8\n \tb.n\ta946 \n \tmovs\tr1, #28\n \tmov\tr0, r5\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp\tr6, #0\n \tbne.n\ta924 \n \tldr\tr2, [pc, #336]\t; (aac8 )\n \tldr\tr3, [pc, #296]\t; (aaa4 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n@@ -6549,23 +6549,23 @@\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\taa6e \n \tmovs\tr1, #56\t; 0x38\n \tmov\tr0, r4\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, lr}\n-\tb.w\t438c \n+\tb.w\t4390 \n \tmov\tr0, r5\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp.w\tr8, #0\n \tbne.n\ta966 \n \tmovs\tr1, #56\t; 0x38\n \tmov\tr0, r6\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\ta8a2 \n \tldr\tr6, [r0, #4]\n \tldr\tr3, [r1, #12]\n \tldr\tr2, [r1, #16]\n \tstr\tr3, [r0, #12]\n \tldr\tr3, [r1, #8]\n \tstr\tr3, [r0, #8]\n@@ -6589,63 +6589,63 @@\n \tadds\tr3, #32\n \tstr.w\tr3, [r8]\n \tadd.w\tr3, r8, #36\t; 0x24\n \tcmp\tr0, r3\n \tbeq.n\ta9fa \n \tldr.w\tr1, [r8, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr.w\tr6, [r8, #12]\n \tcbz\tr6, aa48 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tldr\tr0, [r6, #24]\n \tldr.w\tr9, [r6, #8]\n \tcbz\tr0, aa3a \n \tbl\ta7b0 \n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp.w\tr9, #0\n \tbeq.n\taa48 \n \tmov\tr6, r9\n \tb.n\taa00 \n \tmov\tr0, r4\n \tblx\tr2\n \tldr.w\tr8, [sp]\n \tcmp.w\tr8, #0\n \tbeq.w\ta87a \n \tldr.w\tr3, [r8]\n \tb.n\ta85e \n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp.w\tr9, #0\n \tbne.n\taa20 \n \tmovs\tr1, #56\t; 0x38\n \tmov\tr0, r8\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr6, [r7, #4]\n \tldr\tr3, [r5, #12]\n \tldr\tr2, [r5, #16]\n \tstr\tr3, [r7, #12]\n \tldr\tr3, [r5, #8]\n \tstr\tr3, [r7, #8]\n \tstr\tr2, [r7, #16]\n \tcmp\tr6, #0\n \tbne.w\ta88a \n \tstr\tr4, [r7, #4]\n \tb.n\ta8a6 \n \tmov\tr0, r8\n \tblx\tr3\n \tb.n\taa50 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr5, r0\n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr5, r0\n \tldr\tr3, [r4, #0]\n \tmov\tr0, r4\n \tldr\tr3, [r3, #16]\n \tblx\tr3\n \tb.n\taa74 \n \tmov\tr5, r0\n@@ -6697,15 +6697,15 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r4, #0]\n \tbeq.n\taafc \n \tldr\tr1, [r4, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr5, [r4, #12]\n \tcbz\tr5, ab3c \n \tldr.w\tr8, [pc, #136]\t; ab8c \n \tadd\tr8, pc\n \tmov\tr7, r5\n \tldr\tr0, [r5, #12]\n \tbl\t12b2c \n@@ -6720,20 +6720,20 @@\n \tcmp\tr0, #0\n \tbne.n\tab1a \n \tcmp\tr2, #1\n \tdmb\tish\n \tbeq.n\tab4a \n \tmovs\tr1, #28\n \tmov\tr0, r7\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp\tr5, #0\n \tbne.n\tab06 \n \tmov\tr0, r4\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmovs\tr0, #1\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n \tldr\tr3, [r6, #0]\n \tmov\tr0, r6\n \tldr\tr3, [r3, #8]\n \tblx\tr3\n \tadd.w\tr3, r6, #8\n@@ -6866,15 +6866,15 @@\n \tadd\tr2, sp, #8\n \tadd\tr1, sp, #4\n \tmov\tr0, sp\n \tldr\tr3, [r5, r3]\n \tldr\tr3, [r3, #0]\n \tstr\tr3, [sp, #12]\n \tmov.w\tr3, #0\n-\tblx\t478c \n+\tblx\t4790 \n \tldr\tr2, [r4, #0]\n \tldr\tr0, [pc, #236]\t; (ad88 )\n \tldrb\tr3, [r2, #24]\n \tadd\tr0, pc\n \tubfx\tr1, r3, #1, #1\n \tubfx\tr3, r3, #2, #1\n \tcbnz\tr1, acb4 \n@@ -6907,15 +6907,15 @@\n \tbic.w\tr3, r3, #1\n \tstrb\tr3, [r1, r2]\n \tldr\tr3, [r4, #12]\n \tmovs\tr2, #0\n \tstr\tr2, [r3, #0]\n \tldr\tr0, [sp, #0]\n \tldrd\tr1, r2, [sp, #4]\n-\tblx\t4260 \n+\tblx\t4264 \n \tldr\tr2, [pc, #148]\t; (ad90 )\n \tldr\tr3, [pc, #136]\t; (ad84 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #12]\n \teors\tr2, r3\n@@ -6926,15 +6926,15 @@\n \tldrb\tr3, [r2, #24]\n \tbfc\tr3, #2, #1\n \tstrb\tr3, [r2, #24]\n \tb.n\tace8 \n \tldr\tr3, [r4, #8]\n \tldr\tr0, [r5, #0]\n \tldr\tr1, [r3, #8]\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tace8 \n \tldr\tr3, [r5, #0]\n \tmov\tr0, r5\n \tldr\tr3, [r3, #8]\n \tblx\tr3\n \tldrb\tr3, [r6, #0]\n \tcbz\tr3, ad60 \n@@ -6962,15 +6962,15 @@\n \tldrex\tr3, [r2]\n \tsubs\tr1, r3, #1\n \tstrex\tr0, r1, [r2]\n \tcmp\tr0, #0\n \tbne.n\tad68 \n \tdmb\tish\n \tb.n\tad38 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tb.n\tb478 \n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tb.n\tb448 \n \tmovs\tr1, r0\n \tlsls\tr0, r7, #12\n@@ -6986,15 +6986,15 @@\n \tadd\tr2, sp, #8\n \tadd\tr1, sp, #4\n \tmov\tr0, sp\n \tldr\tr3, [r5, r3]\n \tldr\tr3, [r3, #0]\n \tstr\tr3, [sp, #12]\n \tmov.w\tr3, #0\n-\tblx\t478c \n+\tblx\t4790 \n \tldr\tr2, [r4, #0]\n \tldr\tr0, [pc, #236]\t; (aea4 )\n \tldrb\tr3, [r2, #24]\n \tadd\tr0, pc\n \tubfx\tr1, r3, #1, #1\n \tubfx\tr3, r3, #2, #1\n \tcbnz\tr1, add0 \n@@ -7027,15 +7027,15 @@\n \tbic.w\tr3, r3, #1\n \tstrb\tr3, [r1, r2]\n \tldr\tr3, [r4, #12]\n \tmovs\tr2, #0\n \tstr\tr2, [r3, #0]\n \tldr\tr0, [sp, #0]\n \tldrd\tr1, r2, [sp, #4]\n-\tblx\t4260 \n+\tblx\t4264 \n \tldr\tr2, [pc, #148]\t; (aeac )\n \tldr\tr3, [pc, #136]\t; (aea0 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #12]\n \teors\tr2, r3\n@@ -7046,15 +7046,15 @@\n \tldrb\tr3, [r2, #24]\n \tbfc\tr3, #2, #1\n \tstrb\tr3, [r2, #24]\n \tb.n\tae04 \n \tldr\tr3, [r4, #8]\n \tldr\tr0, [r5, #0]\n \tldr\tr1, [r3, #8]\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tae04 \n \tldr\tr3, [r5, #0]\n \tmov\tr0, r5\n \tldr\tr3, [r3, #8]\n \tblx\tr3\n \tldrb\tr3, [r6, #0]\n \tcbz\tr3, ae7c \n@@ -7082,15 +7082,15 @@\n \tldrex\tr3, [r2]\n \tsubs\tr1, r3, #1\n \tstrex\tr0, r1, [r2]\n \tcmp\tr0, #0\n \tbne.n\tae84 \n \tdmb\tish\n \tb.n\tae54 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tb.n\tb35c \n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tb.n\tb32c \n \tmovs\tr1, r0\n \tlsls\tr0, r7, #12\n@@ -7102,26 +7102,26 @@\n \tldr\tr4, [r1, #12]\n \tcbz\tr4, aee6 \n \tadd.w\tr8, r1, #8\n \tmov\tr5, r2\n \tmov\tr7, r8\n \tldr\tr1, [r5, #0]\n \tldr\tr0, [r4, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tldrd\tr1, r3, [r4, #8]\n \tcbz\tr0, aef2 \n \tmov\tr4, r3\n \tcmp\tr3, #0\n \tbne.n\taec2 \n \tmov\tr4, r7\n \tcmp\tr8, r4\n \tbeq.n\taee6 \n \tldr\tr1, [r4, #16]\n \tldr\tr0, [r5, #0]\n-\tblx\t4728 \n+\tblx\t472c \n \tcbz\tr0, aefc \n \tmovs\tr3, #0\n \tstrd\tr3, r3, [r6]\n \tmov\tr0, r6\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n \tmov\tr7, r4\n \tcmp\tr1, #0\n@@ -7145,15 +7145,15 @@\n \tmov\tr8, r1\n \tldr\tr4, [r1, #8]\n \tmov\tr7, r0\n \tmov\tr6, r2\n \tcbz\tr4, af48 \n \tldr\tr1, [r4, #16]\n \tldr\tr0, [r6, #0]\n-\tblx\t4728 \n+\tblx\t472c \n \tldrd\tr5, r3, [r4, #8]\n \tcbnz\tr0, af42 \n \tcbz\tr3, af7a \n \tmov\tr4, r3\n \tb.n\taf2e \n \tcbz\tr5, af4a \n \tmov\tr4, r5\n@@ -7162,19 +7162,19 @@\n \tldr.w\tr5, [r8, #12]\n \tcmp\tr4, r5\n \tit\teq\n \tmoveq\tr4, #0\n \tbeq.n\taf70 \n \tmov\tr0, r4\n \tmov\tr5, r4\n-\tblx\t455c \n+\tblx\t4560 \n \tmov\tr4, r0\n \tldr\tr0, [r4, #16]\n \tldr\tr1, [r6, #0]\n-\tblx\t4728 \n+\tblx\t472c \n \tcmp\tr0, #0\n \tite\tne\n \tmovne\tr4, #0\n \tmoveq\tr5, #0\n \tmov\tr0, r7\n \tstrd\tr4, r5, [r7]\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n@@ -7197,55 +7197,55 @@\n \tstr\tr3, [sp, #20]\n \tmov.w\tr3, #0\n \tcmp\tr4, #0\n \tbeq.w\tb0d0 \n \tmov\tr7, r9\n \tldr\tr1, [r5, #0]\n \tldr\tr0, [r4, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tldrd\tr2, r3, [r4, #8]\n \tcbz\tr0, afc2 \n \tcbz\tr3, afca \n \tmov\tr4, r3\n \tb.n\tafae \n \tcbz\tr2, afcc \n \tmov\tr7, r4\n \tmov\tr4, r2\n \tb.n\tafae \n \tmov\tr4, r7\n \tcmp\tr9, r4\n \tbeq.n\tb0d0 \n \tldr\tr1, [r4, #16]\n \tldr\tr0, [r5, #0]\n-\tblx\t4728 \n+\tblx\t472c \n \tcmp\tr0, #0\n \tbeq.n\tb04e \n \tmovs\tr0, #28\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr7, r0\n \tldr\tr0, [r5, #0]\n \tmovs\tr3, #0\n \tadd.w\tfp, r7, #16\n \tstr\tr0, [r7, #16]\n \tstrd\tr3, r3, [r7, #20]\n \tldr\tr1, [r4, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tmov\tr5, r0\n \tcmp\tr0, #0\n \tbeq.w\tb146 \n \tldr\tr3, [r6, #16]\n \tcmp\tr3, r4\n \tbeq.n\tb02c \n \tmov\tr0, r4\n-\tblx\t455c \n+\tblx\t4560 \n \tldr\tr1, [r7, #16]\n \tmov\tr3, r0\n \tldr\tr0, [r0, #16]\n \tstr\tr3, [sp, #4]\n-\tblx\t4728 \n+\tblx\t472c \n \tmov\tr5, r0\n \tcmp\tr0, #0\n \tbeq.w\tb190 \n \tldr\tr3, [sp, #4]\n \tldr\tr2, [r3, #12]\n \tcmp\tr2, #0\n \titt\teq\n@@ -7256,15 +7256,15 @@\n \tcmp\tr9, r2\n \tit\teq\n \torreq.w\tr5, r5, #1\n \tands.w\tr0, r5, #255\t; 0xff\n \tbeq.w\tb17c \n \tmov\tr3, r9\n \tmov\tr1, r4\n-\tblx\t418c \n+\tblx\t4190 \n \tldr\tr3, [r6, #24]\n \tadds\tr3, #1\n \tstr\tr3, [r6, #24]\n \tldrd\tr2, r3, [r8]\n \tcbz\tr3, b064 \n \tadds\tr1, r3, #4\n \tldrex\tr5, [r1]\n@@ -7311,25 +7311,25 @@\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\tb1a6 \n \tadd\tsp, #28\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmovs\tr0, #28\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [r6, #24]\n \tldr\tr1, [r5, #0]\n \tmov\tr4, r0\n \tmovs\tr5, #0\n \tstr\tr1, [r0, #16]\n \tstrd\tr5, r5, [r0, #20]\n \tcbz\tr3, b0fc \n \tldr\tr3, [r6, #20]\n \tldr\tr0, [r3, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tcbz\tr0, b0fc \n \tldr\tr2, [r6, #20]\n \tcbz\tr2, b12a \n \tsubs\tr5, #0\n \tit\tne\n \tmovne\tr5, #1\n \tb.n\tb030 \n@@ -7354,62 +7354,62 @@\n \tmov\tr5, r4\n \tmov\tr4, r7\n \tldr\tr0, [r4, #24]\n \tcbz\tr0, b132 \n \tbl\ta7b0 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr4, r5\n \tldrd\tr2, r3, [r8]\n \tcmp\tr3, #0\n \tbne.n\tb054 \n \tb.n\tb064 \n \tldr\tr1, [r7, #16]\n \tldr\tr0, [r4, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tcmp\tr0, #0\n \tbeq.n\tb126 \n \tldr\tr3, [r6, #20]\n \tcmp\tr3, r4\n \tbeq.w\tb02c \n \tmov\tr0, r4\n-\tblx\t43a8 \n+\tblx\t43ac \n \tmov\tr3, r0\n \tldr\tr0, [r7, #16]\n \tstr\tr3, [sp, #4]\n \tldr\tr1, [r3, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tcbz\tr0, b190 \n \tldr\tr2, [r4, #12]\n \tldr\tr3, [sp, #4]\n \tcmp\tr2, #0\n \titt\tne\n \tmovne\tr5, r0\n \tmovne\tr4, r3\n \tb.n\tb02c \n \tldr\tr1, [r2, #16]\n \tldr\tr0, [r4, #16]\n \tstr\tr2, [sp, #4]\n-\tblx\t4728 \n+\tblx\t472c \n \tldr\tr2, [sp, #4]\n \tb.n\tb040 \n \tmov\tr0, r5\n \tblx\tr1\n \tb.n\tb0ae \n \tmov\tr2, fp\n \tmov\tr1, sl\n \tadd\tr0, sp, #12\n \tmov\tr4, r7\n \tbl\taf20 \n \tldrd\tr5, r2, [sp, #12]\n \tcmp\tr2, #0\n \tbne.n\tb0f4 \n \tb.n\tb12a \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tnop\n \tb.n\tb290 \n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tsvc\t66\t; 0x42\n \tmovs\tr1, r0\n@@ -7418,15 +7418,15 @@\n \tmov\tr4, r0\n \tmovs\tr3, #0\n \tsub\tsp, #44\t; 0x2c\n \tmov\tsl, r1\n \tstr\tr3, [r4, #0]\n \tstr\tr0, [sp, #16]\n \tmovs\tr0, #56\t; 0x38\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr2, [pc, #576]\t; (b414 )\n \tadd.w\tsl, sl, #8\n \tldr.w\tr6, [sl, #8]\n \tmovs\tr3, #0\n \tadd\tr2, pc\n \tadd.w\tfp, r0, #8\n \tadds\tr2, #32\n@@ -7461,21 +7461,21 @@\n \tldr\tr4, [r6, #20]\n \tldr\tr2, [sp, #4]\n \tldr\tr3, [r4, #0]\n \tldr\tr3, [r3, #4]\n \tcmp\tr3, r2\n \tbne.w\tb33a \n \tmovs\tr0, #8\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [r4, #4]\n \tmov\tr7, r0\n \tldr\tr2, [sp, #12]\n \tstrd\tr2, r3, [r0]\n \tmovs\tr0, #16\n-\tblx\t415c \n+\tblx\t4160 \n \tmovs\tr3, #1\n \tldr\tr2, [sp, #8]\n \tstrd\tr3, r3, [r0, #4]\n \tmov\tr5, r0\n \tldr\tr3, [r6, #16]\n \tadd.w\tr9, r0, #4\n \tstr\tr2, [r0, #0]\n@@ -7483,42 +7483,42 @@\n \tstr\tr3, [sp, #28]\n \tldrex\tr3, [r9]\n \tadds\tr3, #1\n \tstrex\tr2, r3, [r9]\n \tcmp\tr2, #0\n \tbne.n\tb262 \n \tmovs\tr0, #28\n-\tblx\t415c \n+\tblx\t4160 \n \tstrd\tr7, r5, [r0, #20]\n \tmov\tr4, r0\n \tldr.w\tr7, [r8, #12]\n \tldr\tr3, [sp, #28]\n \tstr\tr3, [r0, #16]\n \tcmp\tr7, #0\n \tbeq.n\tb386 \n \tldr\tr1, [r7, #16]\n \tldr\tr0, [r4, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tldrd\tr2, r3, [r7, #8]\n \tcbnz\tr0, b29e \n \tcmp\tr3, #0\n \tbeq.n\tb312 \n \tmov\tr7, r3\n \tb.n\tb288 \n \tcbz\tr2, b2a4 \n \tmov\tr7, r2\n \tb.n\tb288 \n \tldr.w\tr3, [r8, #16]\n \tcmp\tr7, r3\n \tbeq.n\tb31e \n \tmov\tr0, r7\n-\tblx\t455c \n+\tblx\t4560 \n \tldr\tr1, [r4, #16]\n \tldr\tr0, [r0, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tcbnz\tr0, b31e \n \tldr\tr7, [r4, #24]\n \tcbz\tr7, b2dc \n \tadds\tr3, r7, #4\n \tdmb\tish\n \tldrex\tr2, [r3]\n \tsubs\tr1, r2, #1\n@@ -7526,44 +7526,44 @@\n \tcmp\tr0, #0\n \tbne.n\tb2c6 \n \tcmp\tr2, #1\n \tdmb\tish\n \tbeq.n\tb392 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tdmb\tish\n \tldrex\tr3, [r9]\n \tsubs\tr2, r3, #1\n \tstrex\tr1, r2, [r9]\n \tcmp\tr1, #0\n \tbne.n\tb2e8 \n \tcmp\tr3, #1\n \tdmb\tish\n \tbeq.n\tb342 \n \tmov\tr0, r6\n-\tblx\t45cc \n+\tblx\t45d0 \n \tmov\tr6, r0\n \tcmp\tsl, r0\n \tbne.n\tb228 \n \tldr\tr0, [sp, #16]\n \tadd\tsp, #44\t; 0x2c\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tldr\tr1, [r4, #16]\n \tldr\tr0, [r7, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tcmp\tr0, #0\n \tbeq.n\tb2bc \n \tcmp\tfp, r7\n \tbne.n\tb37c \n \tmovs\tr0, #1\n \tmov\tr3, fp\n \tmov\tr2, r7\n \tmov\tr1, r4\n-\tblx\t418c \n+\tblx\t4190 \n \tldr.w\tr3, [r8, #24]\n \tadds\tr3, #1\n \tstr.w\tr3, [r8, #24]\n \tb.n\tb2e4 \n \tmov\tr0, r4\n \tblx\tr3\n \tmov\tr7, r0\n@@ -7590,15 +7590,15 @@\n \tbne.n\tb3ca \n \tldr\tr3, [r1, #4]\n \tmov\tr0, r5\n \tblx\tr3\n \tb.n\tb2fe \n \tldr\tr1, [r7, #16]\n \tldr\tr0, [r4, #16]\n-\tblx\t4728 \n+\tblx\t472c \n \tb.n\tb324 \n \tldr.w\tr3, [r8, #16]\n \tmov\tr7, fp\n \tcmp\tfp, r3\n \tbeq.n\tb322 \n \tb.n\tb2ac \n \tldr\tr3, [r7, #0]\n@@ -7638,26 +7638,26 @@\n \tldr\tr3, [sp, #16]\n \tldr\tr0, [r3, #0]\n \tcbz\tr0, b3f0 \n \tldr\tr3, [r0, #0]\n \tldr\tr3, [r3, #16]\n \tblx\tr3\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tcbz\tr7, b404 \n \tldr\tr3, [r7, #0]\n \tmov\tr0, r7\n \tldr\tr3, [r3, #12]\n \tblx\tr3\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tmov\tr4, r0\n \tb.n\tb3e4 \n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\tb3e4 \n \tbhi.n\tb40c \n \tmovs\tr1, r0\n \tbhi.n\tb3b0 \n \tmovs\tr1, r0\n \tbhi.n\tb3a4 \n \tmovs\tr1, r0\n@@ -7684,34 +7684,34 @@\n \tldrb.w\tr3, [r8]\n \tstrd\tr7, r7, [sp, #4]\n \tcmp\tr3, #42\t; 0x2a\n \tadd\tr3, sp, #4\n \tit\teq\n \taddeq.w\tr8, r8, #1\n \tmov\tr0, r8\n-\tblx\t44a8 <__cxa_demangle@plt>\n+\tblx\t44ac <__cxa_demangle@plt>\n \tsubs.w\tsl, r0, #0\n \tit\tne\n \tmovne\tr8, sl\n \tstr\tr6, [r4, #0]\n \tmov\tr0, r8\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr5, r0\n \tcmp\tr0, #15\n \tstr\tr0, [sp, #8]\n \tbhi.n\tb4c0 \n \tcmp\tr0, #1\n \tbne.n\tb4ba \n \tldrb.w\tr3, [r8]\n \tstrb\tr3, [r4, #8]\n \tmovs\tr3, #0\n \tstr\tr5, [r4, #4]\n \tmov\tr0, sl\n \tstrb\tr3, [r6, r5]\n-\tblx\t41cc \n+\tblx\t41d0 \n \tldr\tr2, [pc, #92]\t; (b4fc )\n \tldr\tr3, [pc, #84]\t; (b4f8 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #12]\n \teors\tr2, r3\n@@ -7722,32 +7722,32 @@\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, pc}\n \tcmp\tr0, #0\n \tbeq.n\tb492 \n \tb.n\tb4d2 \n \tmov\tr2, r7\n \tmov\tr1, r9\n \tmov\tr0, r4\n-\tblx\t47e0 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n+\tblx\t47e4 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n \tldr\tr3, [sp, #8]\n \tmov\tr6, r0\n \tstr\tr0, [r4, #0]\n \tstr\tr3, [r4, #8]\n \tmov\tr2, r5\n \tmov\tr0, r6\n \tmov\tr1, r8\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr5, [sp, #8]\n \tldr\tr6, [r4, #0]\n \tb.n\tb492 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tmov\tr0, sl\n-\tblx\t41cc \n+\tblx\t41d0 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tblt.n\tb490 \n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tblt.n\tb5b4 \n \tmovs\tr1, r0\n \tpush\t{r4, r5, r6, lr}\n@@ -7755,15 +7755,15 @@\n \tldr\tr5, [pc, #104]\t; (b570 )\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #324\t; 0x144\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr\tr2, [r0, #0]\n \tadds\tr5, #32\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, b536 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (b574 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -7781,20 +7781,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tb554 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tnop\n@@ -7802,15 +7802,15 @@\n \tmovs\tr1, r0\n \tbl\tffdb1576 \n \tbpl.n\tb4a8 \n \tmovs\tr1, r0\n \tpush\t{r3, r4, r5, lr}\n \tmov\tr5, r0\n \tmovs\tr0, #28\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr4, r0\n \tldr\tr0, [r5, #4]\n \tldr\tr3, [pc, #116]\t; (b600 )\n \tadd\tr3, pc\n \tadd.w\tr2, r3, #8\n \tadds\tr3, #32\n \tstr\tr2, [r4, #24]\n@@ -7849,30 +7849,30 @@\n \tmov\tr5, r0\n \tb.n\tb5f0 \n \tmov\tr5, r0\n \tmov\tr0, r4\n \tbl\tb500 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tbvs.n\tb574 \n \tmovs\tr1, r0\n \t\t\t; instruction: 0xeb13ffff\n \tbvs.n\tb528 \n \tmovs\tr1, r0\n \tpush\t{r3, r4, r5, lr}\n \tmov\tr5, r0\n \tmovs\tr0, #28\n \tldr\tr3, [r5, #0]\n \tldr.w\tr3, [r3, #-12]\n \tadd\tr5, r3\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr4, r0\n \tldr\tr3, [pc, #116]\t; (b698 )\n \tldr\tr0, [r5, #4]\n \tadd\tr3, pc\n \tadd.w\tr2, r3, #8\n \tadds\tr3, #32\n \tstr\tr2, [r4, #24]\n@@ -7911,17 +7911,17 @@\n \tmov\tr5, r0\n \tb.n\tb688 \n \tmov\tr5, r0\n \tmov\tr0, r4\n \tbl\tb500 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tbvs.n\tb6dc \n \tmovs\tr1, r0\n \t\t\t; instruction: 0xea7bffff\n \tbpl.n\tb690 \n \tmovs\tr1, r0\n \tpush\t{r4, r5, r6, lr}\n@@ -7929,15 +7929,15 @@\n \tldr\tr5, [pc, #128]\t; (b72c )\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #324\t; 0x144\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr\tr2, [r0, #0]\n \tadds\tr5, #32\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, b6da \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (b730 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -7945,43 +7945,43 @@\n \tbne.n\tb71a \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, b6e6 \n \tmov\tr0, r4\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tldr\tr3, [pc, #76]\t; (b734 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tb700 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tnop\n \tbpl.n\tb664 \n \tmovs\tr1, r0\n \tbl\tffc0d732 \n \tbcc.n\tb70c \n@@ -7992,15 +7992,15 @@\n \tsub.w\tr7, r0, #20\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #324\t; 0x144\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr.w\tr2, [r0, #-20]\n \tadds\tr5, #32\n \tstr\tr3, [r0, #0]\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, b776 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (b7b4 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8022,20 +8022,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tb79c \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tbpl.n\tb7b8 \n \tmovs\tr1, r0\n \tbl\t3717b6 \n \tbcc.n\tb858 \n@@ -8046,15 +8046,15 @@\n \tsub.w\tr7, r0, #20\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #324\t; 0x144\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr.w\tr2, [r0, #-20]\n \tadds\tr5, #32\n \tstr\tr3, [r0, #0]\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, b7fa \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (b850 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8062,43 +8062,43 @@\n \tbne.n\tb806 \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, b816 \n \tmov\tr0, r7\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r7\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [pc, #60]\t; (b854 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tb830 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tbmi.n\tb94c \n \tmovs\tr1, r0\n \tbl\t2ed852 \n \tbcs.n\tb7cc \n@@ -8110,15 +8110,15 @@\n \tadd.w\tr2, r5, #224\t; 0xe0\n \tadd.w\tr3, r5, #324\t; 0x144\n \tstr\tr2, [r0, #24]\n \tstr\tr3, [r0, #0]\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr.w\tr3, [r0, #20]!\n \tadds\tr5, #32\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, b894 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (b8d0 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8136,20 +8136,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tb8b2 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tbcc.n\tb89c \n@@ -8164,15 +8164,15 @@\n \tadd.w\tr2, r5, #224\t; 0xe0\n \tadd.w\tr3, r5, #324\t; 0x144\n \tstr\tr2, [r0, #24]\n \tstr\tr3, [r0, #0]\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr.w\tr3, [r0, #20]!\n \tadds\tr5, #32\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, b914 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (b968 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8180,43 +8180,43 @@\n \tbne.n\tb954 \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, b920 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tldr\tr3, [pc, #72]\t; (b96c )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tb93a \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tbcc.n\tba34 \n \tmovs\tr1, r0\n \tbl\t1d396a \n \tbne.n\tb8d0 \n \tmovs\tr1, r0\n@@ -8231,15 +8231,15 @@\n \tadds\tr6, r5, r7\n \tadd.w\tr3, r4, #340\t; 0x154\n \tmov\tr0, r6\n \tadds\tr4, #32\n \tstr\tr1, [r6, #24]\n \tstr\tr2, [r5, r7]\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4580 \n+\tblx\t4584 \n \tstr\tr4, [r5, r7]\n \tldr\tr4, [r6, #4]\n \tcbz\tr4, b9b6 \n \tldr\tr2, [r4, #0]\n \tldr\tr3, [pc, #76]\t; (b9f4 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8261,20 +8261,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r4, #0]\n \tbeq.n\tb9dc \n \tldr\tr1, [r4, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r4, #12]\n \tbl\t12b2c \n \tmov\tr0, r4\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tbcs.n\tb984 \n \tmovs\tr1, r0\n \tbl\t1319f6 \n \tbne.n\tba18 \n@@ -8287,15 +8287,15 @@\n \tadd.w\tr2, r5, #224\t; 0xe0\n \tadd.w\tr3, r5, #324\t; 0x144\n \tstr\tr2, [r0, #4]\n \tstr.w\tr3, [r0, #-20]\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr\tr3, [r0, #0]\n \tadds\tr5, #32\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, ba40 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (ba7c )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8317,20 +8317,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tba66 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tbcs.n\tbaf8 \n \tmovs\tr1, r0\n \tbl\ta7a7e \n \tbeq.n\tb98c \n \tmovs\tr1, r0\n@@ -8345,15 +8345,15 @@\n \tadds\tr6, r5, r7\n \tadd.w\tr3, r4, #340\t; 0x154\n \tmov\tr0, r6\n \tadds\tr4, #32\n \tstr\tr1, [r6, #24]\n \tstr\tr2, [r5, r7]\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4580 \n+\tblx\t4584 \n \tstr\tr4, [r5, r7]\n \tldr\tr4, [r6, #4]\n \tcbz\tr4, baca \n \tldr\tr2, [r4, #0]\n \tldr\tr3, [pc, #100]\t; (bb20 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8361,43 +8361,43 @@\n \tbne.n\tbad6 \n \tldr\tr3, [r4, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #52]\t; 0x34\n \tcbz\tr3, bae6 \n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tmov\tr0, r4\n \tblx\tr2\n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [pc, #60]\t; (bb24 )\n \tadd.w\tr2, r4, #36\t; 0x24\n \tldr\tr0, [r4, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r4, #0]\n \tbeq.n\tbb00 \n \tldr\tr1, [r4, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r4, #12]\n \tbl\t12b2c \n \tmov\tr0, r4\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tbne.n\tba88 \n \tmovs\tr1, r0\n \tbl\t1db22 \n \tldmia\tr7, {r1, r3, r5, r6, r7}\n@@ -8410,15 +8410,15 @@\n \tadd.w\tr2, r5, #224\t; 0xe0\n \tadd.w\tr3, r5, #324\t; 0x144\n \tstr\tr2, [r0, #4]\n \tstr.w\tr3, [r0, #-20]\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr\tr3, [r0, #0]\n \tadds\tr5, #32\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, bb6c \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (bbc0 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8426,43 +8426,43 @@\n \tbne.n\tbb78 \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, bb88 \n \tmov\tr0, r7\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r7\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [pc, #56]\t; (bbc4 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tbba2 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tbne.n\tbbe4 \n \tmovs\tr1, r0\n \tvrsqrts.f32\t, , \n \tldmia\tr7!, {r3, r6}\n \tmovs\tr1, r0\n@@ -8481,15 +8481,15 @@\n \tadd.w\tr2, r5, #224\t; 0xe0\n \tadd.w\tr3, r5, #324\t; 0x144\n \tstr\tr2, [r4, #24]\n \tstr\tr3, [r4, #0]\n \tadd.w\tr3, r5, #340\t; 0x154\n \tstr.w\tr3, [r0, #20]!\n \tadds\tr5, #32\n-\tblx\t4580 \n+\tblx\t4584 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, bc14 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #104]\t; (bc6c )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8498,36 +8498,36 @@\n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, bc22 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n \tldmia.w\tsp!, {r4, r5, r6, lr}\n-\tb.w\t438c \n+\tb.w\t4390 \n \tpop\t{r4, r5, r6, pc}\n \tldr\tr3, [pc, #76]\t; (bc70 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tbc3c \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n \tldmia.w\tsp!, {r4, r5, r6, lr}\n-\tb.w\t438c \n+\tb.w\t4390 \n \tldmia.w\tsp!, {r4, r5, r6, lr}\n \tbx\tr2\n \tmov\tr0, r6\n \tblx\tr2\n \tb.n\tbc14 \n \tnop\n \tldc2l\t15, cr15, [pc], #1020\t; c064 \n@@ -8541,15 +8541,15 @@\n \tldr\tr5, [pc, #104]\t; (bce4 )\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #360\t; 0x168\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr\tr2, [r0, #0]\n \tadds\tr5, #32\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, bcaa \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (bce8 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8567,20 +8567,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tbcc8 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tnop\n@@ -8588,15 +8588,15 @@\n \tmovs\tr1, r0\n \tmrc\t15, 1, APSR_nzcv, cr1, cr15, {7}\n \tldmia\tr6!, {r1, r5}\n \tmovs\tr1, r0\n \tpush\t{r3, r4, r5, lr}\n \tmov\tr5, r0\n \tmovs\tr0, #28\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr4, r0\n \tldr\tr0, [r5, #4]\n \tldr\tr3, [pc, #116]\t; (bd74 )\n \tadd\tr3, pc\n \tadd.w\tr2, r3, #8\n \tadds\tr3, #32\n \tstr\tr2, [r4, #24]\n@@ -8635,30 +8635,30 @@\n \tmov\tr5, r0\n \tb.n\tbd64 \n \tmov\tr5, r0\n \tmov\tr0, r4\n \tbl\tbc74 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tldmia\tr7!, {r2, r6}\n \tmovs\tr1, r0\n \tb.n\tc4ba \n \tvcvt.u32.f32\td28, d10, #1\n \tmovs\tr1, r0\n \tpush\t{r3, r4, r5, lr}\n \tmov\tr5, r0\n \tmovs\tr0, #28\n \tldr\tr3, [r5, #0]\n \tldr.w\tr3, [r3, #-12]\n \tadd\tr5, r3\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr4, r0\n \tldr\tr3, [pc, #116]\t; (be0c )\n \tldr\tr0, [r5, #4]\n \tadd\tr3, pc\n \tadd.w\tr2, r3, #8\n \tadds\tr3, #32\n \tstr\tr2, [r4, #24]\n@@ -8697,17 +8697,17 @@\n \tmov\tr5, r0\n \tb.n\tbdfc \n \tmov\tr5, r0\n \tmov\tr0, r4\n \tbl\tbc74 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tldmia\tr6!, {r2, r3, r5, r7}\n \tmovs\tr1, r0\n \tb.n\tc422 \n \t\t\t; instruction: 0xffffce82\n \tmovs\tr1, r0\n \tpush\t{r4, r5, r6, lr}\n@@ -8715,15 +8715,15 @@\n \tldr\tr5, [pc, #128]\t; (bea0 )\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #360\t; 0x168\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr\tr2, [r0, #0]\n \tadds\tr5, #32\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, be4e \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (bea4 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8731,43 +8731,43 @@\n \tbne.n\tbe8e \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, be5a \n \tmov\tr0, r4\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tldr\tr3, [pc, #76]\t; (bea8 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tbe74 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tnop\n \tldmia\tr6!, {r1, r2, r5}\n \tmovs\tr1, r0\n \tstc\t15, cr15, [sp], {255}\t; 0xff\n \tldmia\tr4, {r1, r2, r4, r5, r6}\n@@ -8778,15 +8778,15 @@\n \tsub.w\tr7, r0, #20\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #360\t; 0x168\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr.w\tr2, [r0, #-20]\n \tadds\tr5, #32\n \tstr\tr3, [r0, #0]\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, beea \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (bf28 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8808,20 +8808,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tbf10 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tldmia\tr5!, {r1, r2, r3, r7}\n \tmovs\tr1, r0\n \t\t\t; instruction: 0xebf1ffff\n \tldmia\tr3, {r1, r3, r4, r6, r7}\n@@ -8832,15 +8832,15 @@\n \tsub.w\tr7, r0, #20\n \tadd\tr5, pc\n \tadd.w\tr2, r5, #360\t; 0x168\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr.w\tr2, [r0, #-20]\n \tadds\tr5, #32\n \tstr\tr3, [r0, #0]\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, bf6e \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (bfc4 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8848,43 +8848,43 @@\n \tbne.n\tbf7a \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, bf8a \n \tmov\tr0, r7\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r7\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [pc, #60]\t; (bfc8 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tbfa4 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tmovs\tr1, #24\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tldmia\tr5!, {r1, r3}\n \tmovs\tr1, r0\n \t\t\t; instruction: 0xeb6dffff\n \tldmia\tr3!, {r1, r2, r6}\n@@ -8896,15 +8896,15 @@\n \tadd.w\tr2, r5, #108\t; 0x6c\n \tadd.w\tr3, r5, #360\t; 0x168\n \tstr\tr2, [r0, #24]\n \tstr\tr3, [r0, #0]\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr.w\tr3, [r0, #20]!\n \tadds\tr5, #32\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, c008 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (c044 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8922,20 +8922,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tc026 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tldmia\tr4, {r1, r4, r5, r6}\n@@ -8950,15 +8950,15 @@\n \tadd.w\tr2, r5, #108\t; 0x6c\n \tadd.w\tr3, r5, #360\t; 0x168\n \tstr\tr2, [r0, #24]\n \tstr\tr3, [r0, #0]\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr.w\tr3, [r0, #20]!\n \tadds\tr5, #32\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, c088 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (c0dc )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -8966,43 +8966,43 @@\n \tbne.n\tc0c8 \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, c094 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tldr\tr3, [pc, #72]\t; (c0e0 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tc0ae \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r4\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tldmia\tr3!, {r1, r4, r5, r6, r7}\n \tmovs\tr1, r0\n \t\t\t; instruction: 0xea53ffff\n \tldmia\tr2, {r2, r3, r4, r5}\n \tmovs\tr1, r0\n@@ -9017,15 +9017,15 @@\n \tadds\tr6, r5, r7\n \tadd.w\tr3, r4, #376\t; 0x178\n \tmov\tr0, r6\n \tadds\tr4, #32\n \tstr\tr1, [r6, #24]\n \tstr\tr2, [r5, r7]\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4430 \n+\tblx\t4434 \n \tstr\tr4, [r5, r7]\n \tldr\tr4, [r6, #4]\n \tcbz\tr4, c12a \n \tldr\tr2, [r4, #0]\n \tldr\tr3, [pc, #76]\t; (c168 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -9047,20 +9047,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r4, #0]\n \tbeq.n\tc150 \n \tldr\tr1, [r4, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r4, #12]\n \tbl\t12b2c \n \tmov\tr0, r4\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tldmia\tr3!, {r2, r4, r6}\n \tmovs\tr1, r0\n \t\t\t; instruction: 0xe9b1ffff\n \tldmia\tr1, {r1, r3, r4, r7}\n@@ -9073,15 +9073,15 @@\n \tadd.w\tr2, r5, #108\t; 0x6c\n \tadd.w\tr3, r5, #360\t; 0x168\n \tstr\tr2, [r0, #4]\n \tstr.w\tr3, [r0, #-20]\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr\tr3, [r0, #0]\n \tadds\tr5, #32\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, c1b4 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #76]\t; (c1f0 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -9103,20 +9103,20 @@\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tc1da \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldmia\tr2!, {r1, r3, r6, r7}\n \tmovs\tr1, r0\n \tstmdb\tr7!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\n \tldmia\tr1!, {r4}\n \tmovs\tr1, r0\n@@ -9131,15 +9131,15 @@\n \tadds\tr6, r5, r7\n \tadd.w\tr3, r4, #376\t; 0x178\n \tmov\tr0, r6\n \tadds\tr4, #32\n \tstr\tr1, [r6, #24]\n \tstr\tr2, [r5, r7]\n \tstr.w\tr3, [r0, #20]!\n-\tblx\t4430 \n+\tblx\t4434 \n \tstr\tr4, [r5, r7]\n \tldr\tr4, [r6, #4]\n \tcbz\tr4, c23e \n \tldr\tr2, [r4, #0]\n \tldr\tr3, [pc, #100]\t; (c294 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -9147,43 +9147,43 @@\n \tbne.n\tc24a \n \tldr\tr3, [r4, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #52]\t; 0x34\n \tcbz\tr3, c25a \n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tmov\tr0, r4\n \tblx\tr2\n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [pc, #60]\t; (c298 )\n \tadd.w\tr2, r4, #36\t; 0x24\n \tldr\tr0, [r4, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r4, #0]\n \tbeq.n\tc274 \n \tldr\tr1, [r4, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r4, #12]\n \tbl\t12b2c \n \tmov\tr0, r4\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tnop\n \tldmia\tr2!, {r6}\n \tmovs\tr1, r0\n \tldmia.w\tsp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\n \tldmia\tr0!, {r1, r2, r4, r5, r6}\n@@ -9196,15 +9196,15 @@\n \tadd.w\tr2, r5, #108\t; 0x6c\n \tadd.w\tr3, r5, #360\t; 0x168\n \tstr\tr2, [r0, #4]\n \tstr.w\tr3, [r0, #-20]\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr\tr3, [r0, #0]\n \tadds\tr5, #32\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr.w\tr6, [r4, #-16]\n \tstr.w\tr5, [r4, #-20]\n \tcbz\tr6, c2e0 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #100]\t; (c334 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -9212,43 +9212,43 @@\n \tbne.n\tc2ec \n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, c2fc \n \tmov\tr0, r7\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tmov\tr0, r6\n \tblx\tr2\n \tmov\tr0, r7\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [pc, #56]\t; (c338 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tc316 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tmovs\tr1, #28\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r7\n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldmia\tr1, {r1, r2, r3, r4, r7}\n \tmovs\tr1, r0\n \tb.n\tc32e \n \tvqshl.u64\tq14, q2, #63\t; 0x3f\n \tmovs\tr1, r0\n@@ -9267,15 +9267,15 @@\n \tadd.w\tr2, r5, #108\t; 0x6c\n \tadd.w\tr3, r5, #360\t; 0x168\n \tstr\tr2, [r4, #24]\n \tstr\tr3, [r4, #0]\n \tadd.w\tr3, r5, #376\t; 0x178\n \tstr.w\tr3, [r0, #20]!\n \tadds\tr5, #32\n-\tblx\t4430 \n+\tblx\t4434 \n \tldr\tr6, [r4, #4]\n \tstr\tr5, [r4, #0]\n \tcbz\tr6, c388 \n \tldr\tr2, [r6, #0]\n \tldr\tr3, [pc, #104]\t; (c3e0 )\n \tldr\tr2, [r2, #16]\n \tadd\tr3, pc\n@@ -9284,36 +9284,36 @@\n \tldr\tr3, [r6, #52]\t; 0x34\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #52]\t; 0x34\n \tcbz\tr3, c396 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n \tldmia.w\tsp!, {r4, r5, r6, lr}\n-\tb.w\t438c \n+\tb.w\t4390 \n \tpop\t{r4, r5, r6, pc}\n \tldr\tr3, [pc, #76]\t; (c3e4 )\n \tadd.w\tr2, r6, #36\t; 0x24\n \tldr\tr0, [r6, #28]\n \tadd\tr3, pc\n \tadds\tr3, #32\n \tcmp\tr0, r2\n \tstr\tr3, [r6, #0]\n \tbeq.n\tc3b0 \n \tldr\tr1, [r6, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r6, #12]\n \tbl\t12b2c \n \tmov\tr0, r6\n \tmovs\tr1, #56\t; 0x38\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tmovs\tr1, #28\n \tldmia.w\tsp!, {r4, r5, r6, lr}\n-\tb.w\t438c \n+\tb.w\t4390 \n \tldmia.w\tsp!, {r4, r5, r6, lr}\n \tbx\tr2\n \tmov\tr0, r6\n \tblx\tr2\n \tb.n\tc388 \n \tnop\n \tldc2l\t15, cr15, [pc], #1020\t; c7d8 \n@@ -9325,15 +9325,15 @@\n \tldr\tr3, [r0, #4]\n \tpush\t{r4, r5, r6, lr}\n \tldr\tr5, [pc, #64]\t; (c430 )\n \tldr\tr4, [r3, #0]\n \tadd\tr5, pc\n \tcbz\tr4, c42c \n \tldr\tr6, [r0, #0]\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tadds\tr0, #28\n \tldr\tr1, [r6, #28]\n \tbl\t12174 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcbz\tr3, c424 \n@@ -9342,19 +9342,19 @@\n \tldr\tr3, [r4, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcbz\tr3, c41a \n \tmov\tr0, r4\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tmov\tr0, r4\n \tb.n\tc418 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tc40a \n \tmovs\tr0, #1\n \tpop\t{r4, r5, r6, pc}\n \tldmia\tr4!, {r2, r3}\n \tmovs\tr1, r0\n \tlsls\tr4, r2, #11\n \tmovs\tr0, r0\n@@ -9435,15 +9435,15 @@\n \tcmp\tr3, #0\n \tbeq.w\tc862 \n \tmov\tr0, r3\n \tldr.w\tr3, [pc, #1204]\t; c9c4 \n \tldr\tr2, [sp, #16]\n \tldr\tr1, [r7, r3]\n \tmovs\tr3, #0\n-\tblx\t45b0 <__dynamic_cast@plt>\n+\tblx\t45b4 <__dynamic_cast@plt>\n \tmov\tr8, r0\n \tcmp\tr0, #0\n \tbeq.w\tc862 \n \tcbz\tr5, c53a \n \tldrb\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbeq.w\tc7ea \n@@ -9489,15 +9489,15 @@\n \tldrb.w\tr2, [fp, #24]\n \tlsls\tr1, r2, #31\n \tbpl.n\tc54c \n \tldr.w\tr6, [sl]\n \tmovs\tr0, #16\n \tstr.w\tr3, [sl, #8]\n \tstr.w\tr6, [sl, #4]\n-\tblx\t415c \n+\tblx\t4160 \n \tldr.w\tr3, [pc, #1052]\t; c9cc \n \tmov\tr5, r0\n \tstr\tr6, [r0, #12]\n \tadd\tr3, pc\n \tadds\tr3, #100\t; 0x64\n \tstr\tr3, [r0, #0]\n \tmovs\tr3, #1\n@@ -9535,18 +9535,18 @@\n \tldrb\tr3, [r3, r2]\n \tlsls\tr2, r3, #30\n \tbmi.w\tc48e \n \tldr.w\tr6, [sl]\n \tldr\tr3, [sp, #92]\t; 0x5c\n \tstr\tr3, [sp, #32]\n \tstr\tr6, [sp, #28]\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr8, r0\n \tmovs\tr0, #12\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr3, r0\n \tstr\tr0, [sp, #24]\n \tmov\tr0, r5\n \tmov\tr5, r3\n \tldr.w\tr1, [r8, #76]\t; 0x4c\n \tstr\tr6, [r3, #4]\n \tmovs\tr6, #0\n@@ -9554,23 +9554,23 @@\n \tldr.w\tr2, [r8, #60]\t; 0x3c\n \tldr.w\tr3, [r8, #68]\t; 0x44\n \tstr\tr1, [sp, #20]\n \tmovs\tr1, #1\n \tstr\tr1, [sp, #0]\n \tadd.w\tr1, r8, #72\t; 0x48\n \tstr\tr6, [r5, #0]\n-\tblx\t45fc \n+\tblx\t4600 \n \tldrb.w\tr3, [sp, #76]\t; 0x4c\n \tcmp\tr3, #0\n \tbne.n\tc72c \n \tldrd\tr3, r9, [r8, #56]\t; 0x38\n \tstr\tr3, [sp, #20]\n \tldr\tr0, [sp, #28]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [sp, #20]\n \tmov\tr2, r1\n \tadd.w\tr1, r3, r1, lsl #2\n \tstr\tr1, [sp, #44]\t; 0x2c\n \tldr.w\tr3, [r3, r2, lsl #2]\n \tcmp\tr3, #0\n \tbeq.w\tc8fa \n@@ -9591,15 +9591,15 @@\n \tldr\tr5, [r1, #0]\n \tcmp\tr5, #0\n \tbeq.w\tc8c6 \n \tldr\tr6, [r5, #4]\n \tmov\tr7, r1\n \tmov\tr1, r8\n \tmov\tr0, r6\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr4, r1\n \tbne.w\tc8c6 \n \tldr\tr3, [sp, #20]\n \tmov\tr1, r5\n \tcmp\tr3, r6\n \tbne.n\tc6a6 \n \tldr\tr2, [sp, #24]\n@@ -9644,21 +9644,21 @@\n \tldr.w\tr9, [sp, #80]\t; 0x50\n \tcmp.w\tr9, #1\n \tbeq.w\tc948 \n \tcmp.w\tr9, #536870912\t; 0x20000000\n \tbcs.w\tc954 \n \tmov.w\tr6, r9, lsl #2\n \tmov\tr0, r6\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr2, r6\n \tmovs\tr1, #0\n \tadd.w\tr3, r8, #80\t; 0x50\n \tstr\tr0, [sp, #20]\n \tstr\tr3, [sp, #52]\t; 0x34\n-\tblx\t4374 \n+\tblx\t4378 \n \tldr.w\tr5, [r8, #64]\t; 0x40\n \tmovs\tr3, #0\n \tstr.w\tr3, [r8, #64]\t; 0x40\n \tcmp\tr5, #0\n \tbeq.w\tc8aa \n \tadd.w\tr1, r8, #64\t; 0x40\n \tstr\tr4, [sp, #56]\t; 0x38\n@@ -9677,15 +9677,15 @@\n \tstr\tr5, [r4, #0]\n \tmov\tr4, r5\n \tcmp\tr3, #0\n \tbeq.w\tc8a0 \n \tmov\tr5, r3\n \tldr\tr0, [r5, #4]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tmov\tsl, r6\n \tsubs\tr2, r4, #0\n \tldr\tr3, [r5, #0]\n \tit\tne\n \tmovne\tr2, #1\n \tcmp\tr1, sl\n \tmov\tr6, r1\n@@ -9695,15 +9695,15 @@\n \tbne.n\tc786 \n \tcbz\tr7, c7d4 \n \tldr\tr1, [r4, #0]\n \tcbz\tr1, c7d4 \n \tldr\tr0, [r1, #4]\n \tmov\tr1, r9\n \tstrd\tr3, r2, [sp, #40]\t; 0x28\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldrd\tr3, r2, [sp, #40]\t; 0x28\n \tcmp\tr1, sl\n \tit\tne\n \tstrne.w\tr4, [fp, r1, lsl #2]\n \tldr.w\tr7, [fp, r6, lsl #2]\n \tcmp\tr7, #0\n \tbeq.n\tc870 \n@@ -9778,26 +9778,26 @@\n \tstr\tr6, [sp, #36]\t; 0x24\n \tstr.w\tr5, [fp, r1, lsl #2]\n \tb.n\tc78e \n \tldr\tr3, [pc, #316]\t; (c9d0 )\n \tmov\tr2, fp\n \tldrd\tr0, r1, [sp, #28]\n \tadd\tr3, pc\n-\tbl\t8ee0 \n+\tbl\t8ee0 \n \tb.n\tc6ec \n \tldr\tr4, [sp, #56]\t; 0x38\n \tldrd\tsl, fp, [sp, #60]\t; 0x3c\n \tldr\tr7, [sp, #68]\t; 0x44\n \tcbnz\tr2, c8da \n \tldrd\tr0, r1, [r8, #56]\t; 0x38\n \tldr\tr3, [sp, #52]\t; 0x34\n \tcmp\tr0, r3\n \tbeq.n\tc8ba \n \tlsls\tr1, r1, #2\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #20]\n \tstr.w\tr9, [r8, #60]\t; 0x3c\n \tstr.w\tr3, [r8, #56]\t; 0x38\n \tb.n\tc66c \n \tldr\tr2, [sp, #24]\n \tmov\tr7, r9\n \tldr\tr3, [sp, #48]\t; 0x30\n@@ -9808,15 +9808,15 @@\n \tstr\tr2, [r3, #0]\n \tb.n\tc6d6 \n \tldr\tr3, [r5, #0]\n \tcmp\tr3, #0\n \tbeq.n\tc8aa \n \tldr\tr0, [r3, #4]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr6, r1\n \titt\tne\n \tldrne\tr3, [sp, #20]\n \tstrne.w\tr5, [r3, r1, lsl #2]\n \tb.n\tc8aa \n \tmov\tr7, r1\n \tstr\tr6, [sp, #36]\t; 0x24\n@@ -9825,15 +9825,15 @@\n \tldr.w\tr3, [r8, #64]\t; 0x40\n \tstr\tr3, [r2, #0]\n \tstr.w\tr2, [r8, #64]\t; 0x40\n \tldr\tr3, [r2, #0]\n \tcbz\tr3, c91a \n \tldr\tr0, [r3, #4]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldrd\tr3, r2, [sp, #20]\n \tstr.w\tr2, [r3, r1, lsl #2]\n \tldr\tr2, [sp, #44]\t; 0x2c\n \tadd.w\tr3, r8, #64\t; 0x40\n \tstr\tr3, [r2, #0]\n \tb.n\tc6d6 \n \tmov\tr3, r2\n@@ -9852,39 +9852,39 @@\n \tmov\tr2, r8\n \tstr.w\tr6, [r2, #80]!\n \tstr\tr2, [sp, #20]\n \tstr\tr2, [sp, #52]\t; 0x34\n \tb.n\tc75a \n \tcmp.w\tr9, #1073741824\t; 0x40000000\n \tbcc.n\tc95e \n-\tblx\t4424 \n-\tblx\t4248 \n-\tblx\t4598 <__stack_chk_fail@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4428 \n+\tblx\t424c \n+\tblx\t459c <__stack_chk_fail@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tldr\tr3, [sp, #20]\n \tstr.w\tr3, [r8, #76]\t; 0x4c\n-\tblx\t46d4 <__cxa_rethrow@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tcbz\tr6, c982 \n \tldr\tr3, [r6, #0]\n \tmov\tr0, r6\n \tldr\tr3, [r3, #4]\n \tblx\tr3\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #24]\n \tmovs\tr1, #12\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tstr\tr0, [sp, #12]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #12]\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [r3, #0]\n \tudf\t#255\t; 0xff\n \tmov\tr4, r0\n \tb.n\tc98c \n \tnop\n \tldmia\tr3, {r2, r3, r4, r5, r7}\n \tmovs\tr1, r0\n@@ -9981,15 +9981,15 @@\n \tcmp\tr3, #0\n \tbeq.w\tcdfe \n \tmov\tr0, r3\n \tldr.w\tr3, [pc, #1204]\t; cf60 \n \tldr\tr2, [sp, #16]\n \tldr\tr1, [r7, r3]\n \tmovs\tr3, #0\n-\tblx\t45b0 <__dynamic_cast@plt>\n+\tblx\t45b4 <__dynamic_cast@plt>\n \tmov\tr8, r0\n \tcmp\tr0, #0\n \tbeq.w\tcdfe \n \tcbz\tr5, cad6 \n \tldrb\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbeq.w\tcd86 \n@@ -10035,15 +10035,15 @@\n \tldrb.w\tr2, [fp, #24]\n \tlsls\tr1, r2, #31\n \tbpl.n\tcae8 \n \tldr.w\tr6, [sl]\n \tmovs\tr0, #16\n \tstr.w\tr3, [sl, #8]\n \tstr.w\tr6, [sl, #4]\n-\tblx\t415c \n+\tblx\t4160 \n \tldr.w\tr3, [pc, #1052]\t; cf68 \n \tmov\tr5, r0\n \tstr\tr6, [r0, #12]\n \tadd\tr3, pc\n \tadds\tr3, #128\t; 0x80\n \tstr\tr3, [r0, #0]\n \tmovs\tr3, #1\n@@ -10081,18 +10081,18 @@\n \tldrb\tr3, [r3, r2]\n \tlsls\tr2, r3, #30\n \tbmi.w\tca2a \n \tldr.w\tr6, [sl]\n \tldr\tr3, [sp, #92]\t; 0x5c\n \tstr\tr3, [sp, #32]\n \tstr\tr6, [sp, #28]\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr8, r0\n \tmovs\tr0, #12\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr3, r0\n \tstr\tr0, [sp, #24]\n \tmov\tr0, r5\n \tmov\tr5, r3\n \tldr.w\tr1, [r8, #76]\t; 0x4c\n \tstr\tr6, [r3, #4]\n \tmovs\tr6, #0\n@@ -10100,23 +10100,23 @@\n \tldr.w\tr2, [r8, #60]\t; 0x3c\n \tldr.w\tr3, [r8, #68]\t; 0x44\n \tstr\tr1, [sp, #20]\n \tmovs\tr1, #1\n \tstr\tr1, [sp, #0]\n \tadd.w\tr1, r8, #72\t; 0x48\n \tstr\tr6, [r5, #0]\n-\tblx\t45fc \n+\tblx\t4600 \n \tldrb.w\tr3, [sp, #76]\t; 0x4c\n \tcmp\tr3, #0\n \tbne.n\tccc8 \n \tldrd\tr3, r9, [r8, #56]\t; 0x38\n \tstr\tr3, [sp, #20]\n \tldr\tr0, [sp, #28]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [sp, #20]\n \tmov\tr2, r1\n \tadd.w\tr1, r3, r1, lsl #2\n \tstr\tr1, [sp, #44]\t; 0x2c\n \tldr.w\tr3, [r3, r2, lsl #2]\n \tcmp\tr3, #0\n \tbeq.w\tce96 \n@@ -10137,15 +10137,15 @@\n \tldr\tr5, [r1, #0]\n \tcmp\tr5, #0\n \tbeq.w\tce62 \n \tldr\tr6, [r5, #4]\n \tmov\tr7, r1\n \tmov\tr1, r8\n \tmov\tr0, r6\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr4, r1\n \tbne.w\tce62 \n \tldr\tr3, [sp, #20]\n \tmov\tr1, r5\n \tcmp\tr3, r6\n \tbne.n\tcc42 \n \tldr\tr2, [sp, #24]\n@@ -10190,21 +10190,21 @@\n \tldr.w\tr9, [sp, #80]\t; 0x50\n \tcmp.w\tr9, #1\n \tbeq.w\tcee4 \n \tcmp.w\tr9, #536870912\t; 0x20000000\n \tbcs.w\tcef0 \n \tmov.w\tr6, r9, lsl #2\n \tmov\tr0, r6\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr2, r6\n \tmovs\tr1, #0\n \tadd.w\tr3, r8, #80\t; 0x50\n \tstr\tr0, [sp, #20]\n \tstr\tr3, [sp, #52]\t; 0x34\n-\tblx\t4374 \n+\tblx\t4378 \n \tldr.w\tr5, [r8, #64]\t; 0x40\n \tmovs\tr3, #0\n \tstr.w\tr3, [r8, #64]\t; 0x40\n \tcmp\tr5, #0\n \tbeq.w\tce46 \n \tadd.w\tr1, r8, #64\t; 0x40\n \tstr\tr4, [sp, #56]\t; 0x38\n@@ -10223,15 +10223,15 @@\n \tstr\tr5, [r4, #0]\n \tmov\tr4, r5\n \tcmp\tr3, #0\n \tbeq.w\tce3c \n \tmov\tr5, r3\n \tldr\tr0, [r5, #4]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tmov\tsl, r6\n \tsubs\tr2, r4, #0\n \tldr\tr3, [r5, #0]\n \tit\tne\n \tmovne\tr2, #1\n \tcmp\tr1, sl\n \tmov\tr6, r1\n@@ -10241,15 +10241,15 @@\n \tbne.n\tcd22 \n \tcbz\tr7, cd70 \n \tldr\tr1, [r4, #0]\n \tcbz\tr1, cd70 \n \tldr\tr0, [r1, #4]\n \tmov\tr1, r9\n \tstrd\tr3, r2, [sp, #40]\t; 0x28\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldrd\tr3, r2, [sp, #40]\t; 0x28\n \tcmp\tr1, sl\n \tit\tne\n \tstrne.w\tr4, [fp, r1, lsl #2]\n \tldr.w\tr7, [fp, r6, lsl #2]\n \tcmp\tr7, #0\n \tbeq.n\tce0c \n@@ -10324,26 +10324,26 @@\n \tstr\tr6, [sp, #36]\t; 0x24\n \tstr.w\tr5, [fp, r1, lsl #2]\n \tb.n\tcd2a \n \tldr\tr3, [pc, #316]\t; (cf6c )\n \tmov\tr2, fp\n \tldrd\tr0, r1, [sp, #28]\n \tadd\tr3, pc\n-\tbl\t8ee0 \n+\tbl\t8ee0 \n \tb.n\tcc88 \n \tldr\tr4, [sp, #56]\t; 0x38\n \tldrd\tsl, fp, [sp, #60]\t; 0x3c\n \tldr\tr7, [sp, #68]\t; 0x44\n \tcbnz\tr2, ce76 \n \tldrd\tr0, r1, [r8, #56]\t; 0x38\n \tldr\tr3, [sp, #52]\t; 0x34\n \tcmp\tr0, r3\n \tbeq.n\tce56 \n \tlsls\tr1, r1, #2\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #20]\n \tstr.w\tr9, [r8, #60]\t; 0x3c\n \tstr.w\tr3, [r8, #56]\t; 0x38\n \tb.n\tcc08 \n \tldr\tr2, [sp, #24]\n \tmov\tr7, r9\n \tldr\tr3, [sp, #48]\t; 0x30\n@@ -10354,15 +10354,15 @@\n \tstr\tr2, [r3, #0]\n \tb.n\tcc72 \n \tldr\tr3, [r5, #0]\n \tcmp\tr3, #0\n \tbeq.n\tce46 \n \tldr\tr0, [r3, #4]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr6, r1\n \titt\tne\n \tldrne\tr3, [sp, #20]\n \tstrne.w\tr5, [r3, r1, lsl #2]\n \tb.n\tce46 \n \tmov\tr7, r1\n \tstr\tr6, [sp, #36]\t; 0x24\n@@ -10371,15 +10371,15 @@\n \tldr.w\tr3, [r8, #64]\t; 0x40\n \tstr\tr3, [r2, #0]\n \tstr.w\tr2, [r8, #64]\t; 0x40\n \tldr\tr3, [r2, #0]\n \tcbz\tr3, ceb6 \n \tldr\tr0, [r3, #4]\n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldrd\tr3, r2, [sp, #20]\n \tstr.w\tr2, [r3, r1, lsl #2]\n \tldr\tr2, [sp, #44]\t; 0x2c\n \tadd.w\tr3, r8, #64\t; 0x40\n \tstr\tr3, [r2, #0]\n \tb.n\tcc72 \n \tmov\tr3, r2\n@@ -10398,39 +10398,39 @@\n \tmov\tr2, r8\n \tstr.w\tr6, [r2, #80]!\n \tstr\tr2, [sp, #20]\n \tstr\tr2, [sp, #52]\t; 0x34\n \tb.n\tccf6 \n \tcmp.w\tr9, #1073741824\t; 0x40000000\n \tbcc.n\tcefa \n-\tblx\t4424 \n-\tblx\t4248 \n-\tblx\t4598 <__stack_chk_fail@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4428 \n+\tblx\t424c \n+\tblx\t459c <__stack_chk_fail@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tldr\tr3, [sp, #20]\n \tstr.w\tr3, [r8, #76]\t; 0x4c\n-\tblx\t46d4 <__cxa_rethrow@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tcbz\tr6, cf1e \n \tldr\tr3, [r6, #0]\n \tmov\tr0, r6\n \tldr\tr3, [r3, #4]\n \tblx\tr3\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #24]\n \tmovs\tr1, #12\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tstr\tr0, [sp, #12]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #12]\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [r3, #0]\n \tudf\t#255\t; 0xff\n \tmov\tr4, r0\n \tb.n\tcf28 \n \tnop\n \tstmia\tr6!, {r5}\n \tmovs\tr1, r0\n@@ -10467,18 +10467,18 @@\n \tmov\tr6, r0\n \tcbnz\tr5, cfa6 \n \tldr\tr2, [pc, #168]\t; (d040 )\n \tldr\tr0, [r4, #4]\n \tldr\tr1, [r3, r2]\n \tcmp\tr0, r1\n \tbeq.n\tcfa6 \n-\tblx\t4278 \n+\tblx\t427c \n \tcbz\tr0, cffc \n \tmov\tr0, r4\n-\tblx\t43e4 \n+\tblx\t43e8 \n \tvmov.f64\td7, #240\t; 0xbf800000 -1.0\n \tvmov.f64\td8, d0\n \tvcmp.f64\td0, d7\n \tvmrs\tAPSR_nzcv, fpscr\n \tbeq.n\tcfe6 \n \tvcvt.f32.f64\ts16, d8\n \tmovs\tr4, #1\n@@ -10492,42 +10492,42 @@\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\td020 \n \tmov\tr0, r4\n \tadd\tsp, #8\n \tvpop\t{d8}\n \tpop\t{r4, r5, r6, pc}\n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbeq.n\tcfbe \n-\tblx\t4508 \n+\tblx\t450c \n \tcbz\tr5, cffc \n \tmov\tr0, r4\n-\tblx\t4454 \n+\tblx\t4458 \n \tcbnz\tr0, d000 \n \tmovs\tr4, #0\n \tb.n\tcfc8 \n \tmov\tr0, r4\n-\tblx\t42e4 \n+\tblx\t42e8 \n \tstr\tr0, [sp, #0]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #0]\n \tmovs\tr2, #0\n \tmov\tr0, r6\n \tbl\tcf70 \n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tb.n\tcfc8 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tstmia\tr0!, {r1, r7}\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstmia\tr0!, {r1, r2, r4, r5, r6}\n \tmovs\tr1, r0\n@@ -10564,19 +10564,19 @@\n \tand.w\tr6, r2, #2\n \tcbnz\tr6, d09c \n \tldr\tr3, [pc, #484]\t; (d270 )\n \tldr\tr0, [r5, #4]\n \tldr\tr1, [r7, r3]\n \tcmp\tr0, r1\n \tbeq.n\td09c \n-\tblx\t4278 \n+\tblx\t427c \n \tcmp\tr0, #0\n \tbeq.n\td19a \n \tmov\tr0, r5\n-\tblx\t43e4 \n+\tblx\t43e8 \n \tvmov.f64\td7, #240\t; 0xbf800000 -1.0\n \tvmov.f64\td8, d0\n \tvcmp.f64\td0, d7\n \tvmrs\tAPSR_nzcv, fpscr\n \tbeq.n\td184 \n \tvcvt.f32.f64\ts16, d8\n \tldr\tr3, [r4, #4]\n@@ -10590,19 +10590,19 @@\n \tbeq.n\td164 \n \tcbnz\tr5, d0e8 \n \tldr\tr3, [pc, #408]\t; (d270 )\n \tldr.w\tr0, [r8, #4]\n \tldr\tr1, [r7, r3]\n \tcmp\tr0, r1\n \tbeq.n\td0e8 \n-\tblx\t4278 \n+\tblx\t427c \n \tcmp\tr0, #0\n \tbeq.n\td164 \n \tmov\tr0, r8\n-\tblx\t43e4 \n+\tblx\t43e8 \n \tvmov.f64\td7, #240\t; 0xbf800000 -1.0\n \tvmov.f64\td8, d0\n \tvcmp.f64\td0, d7\n \tvmrs\tAPSR_nzcv, fpscr\n \tbeq.n\td14c \n \tvcvt.f32.f64\ts16, d8\n \tvstr\ts16, [sp, #8]\n@@ -10633,21 +10633,21 @@\n \tldr\tr4, [r7, r3]\n \tldr\tr3, [r4, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcbz\tr3, d1a4 \n \tmov\tr0, r4\n \tb.n\td166 \n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbeq.n\td100 \n-\tblx\t4508 \n+\tblx\t450c \n \tcbz\tr5, d164 \n \tmov\tr0, r8\n-\tblx\t4454 \n+\tblx\t4458 \n \tcmp\tr0, #0\n \tbne.n\td1d8 \n \tmovs\tr0, #1\n \tldr\tr2, [pc, #272]\t; (d278 )\n \tldr\tr3, [pc, #256]\t; (d26c )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n@@ -10655,102 +10655,102 @@\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\td204 \n \tadd\tsp, #24\n \tvpop\t{d8}\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbeq.n\td0b4 \n-\tblx\t4508 \n+\tblx\t450c \n \tcbz\tr6, d1d0 \n \tmov\tr0, r5\n-\tblx\t4454 \n+\tblx\t4458 \n \tcbnz\tr0, d1b2 \n \tldr\tr2, [r4, #16]\n \tmov\tr6, r0\n \tldr\tr3, [r4, #4]\n \tldr\tr2, [r2, #0]\n \tb.n\td0c4 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tmov\tr0, r4\n \tb.n\td166 \n \tmov\tr6, r5\n \tb.n\td0c4 \n \tmov\tr0, r5\n-\tblx\t42e4 \n+\tblx\t42e8 \n \tstr\tr0, [sp, #0]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #0]\n \tmovs\tr2, #0\n \tadd\tr0, sp, #12\n \tbl\tcf70 \n \tmov\tr6, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tldr\tr2, [r4, #16]\n \tldr\tr3, [r4, #4]\n \tldr\tr2, [r2, #0]\n \tb.n\td0c4 \n \tmov\tr0, r8\n-\tblx\t42e4 \n+\tblx\t42e8 \n \tstr\tr0, [sp, #0]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #0]\n \tmovs\tr2, #0\n \tadd\tr0, sp, #8\n \tbl\tcf70 \n \tmov\tr5, sp\n \tmov\tr8, r0\n \tmov\tr0, r5\n \tbl\t10ac8 \n \tcmp\tr6, #0\n \tbeq.n\td164 \n \tcmp.w\tr8, #0\n \tbne.n\td10e \n \tb.n\td164 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #108]\t; (d27c )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #100]\t; (d280 )\n \tmov\tr0, r5\n \tldr\tr1, [pc, #100]\t; (d284 )\n \tldr\tr2, [pc, #104]\t; (d288 )\n \tadd\tr3, pc\n \tadds\tr3, #8\n \tstr\tr3, [r5, #0]\n \tadd\tr2, pc\n \tldr\tr1, [r7, r1]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr0, [sp, #4]\n \tcbz\tr0, d24c \n \tbl\tabfc \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\td244 \n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \titte\tge\n \tmovge\tr1, r0\n \titte\tls\t; unpredictable \n \tmovls\tr1, r0\n \tlslls\tr0, r7, #10\n \tmovhi\tr0, r0\n \tlsls\tr0, r6, #13\n@@ -10782,31 +10782,31 @@\n \tcbz\tr4, d2e2 \n \tldr\tr2, [pc, #172]\t; (d358 )\n \tmov\tr6, r0\n \tldr\tr0, [r4, #4]\n \tldr\tr1, [r3, r2]\n \tcmp\tr0, r1\n \tbeq.n\td2e2 \n-\tblx\t4278 \n+\tblx\t427c \n \tcbnz\tr0, d2e2 \n \tcbnz\tr7, d2c6 \n \tldr\tr3, [r4, #4]\n \tldr\tr3, [r3, #84]\t; 0x54\n \tlsls\tr3, r3, #7\n \tbpl.n\td2d8 \n \tmov\tr0, r4\n-\tblx\t4174 \n+\tblx\t4178 \n \tmov\tr5, r0\n \tadds\tr2, r0, #1\n \tbeq.n\td2fe \n \tmovs\tr4, #1\n \tstr\tr5, [r6, #0]\n \tb.n\td2e4 \n \tmov\tr0, r4\n-\tblx\t449c \n+\tblx\t44a0 \n \tcmp\tr0, #0\n \tbne.n\td2c6 \n \tmovs\tr4, #0\n \tldr\tr2, [pc, #116]\t; (d35c )\n \tldr\tr3, [pc, #104]\t; (d350 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n@@ -10814,42 +10814,42 @@\n \tldr\tr3, [sp, #4]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\td338 \n \tmov\tr0, r4\n \tadd\tsp, #12\n \tpop\t{r4, r5, r6, r7, pc}\n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbeq.n\td2d2 \n-\tblx\t4508 \n+\tblx\t450c \n \tcmp\tr7, #0\n \tbeq.n\td2e2 \n \tmov\tr0, r4\n-\tblx\t4454 \n+\tblx\t4458 \n \tcmp\tr0, #0\n \tbeq.n\td2e2 \n \tmov\tr0, r4\n-\tblx\t435c \n+\tblx\t4360 \n \tstr\tr0, [sp, #0]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #0]\n \tmovs\tr2, #0\n \tmov\tr0, r6\n \tbl\td28c \n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tb.n\td2e4 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tpop\t{r1, r2, r5, r6, pc}\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tpop\t{r5, r6, pc}\n \tmovs\tr1, r0\n@@ -10880,25 +10880,25 @@\n \tbeq.n\td400 \n \tldr\tr3, [pc, #312]\t; (d4c8 )\n \tmov\tr4, r0\n \tldr\tr0, [r5, #4]\n \tldr\tr1, [r6, r3]\n \tcmp\tr0, r1\n \tbeq.n\td400 \n-\tblx\t4278 \n+\tblx\t427c \n \tcmp\tr0, #0\n \tbne.n\td400 \n \tands.w\tr7, r7, #2\n \tbne.n\td3b0 \n \tldr\tr3, [r5, #4]\n \tldr\tr3, [r3, #84]\t; 0x54\n \tlsls\tr3, r3, #7\n \tbpl.n\td3f6 \n \tmov\tr0, r5\n-\tblx\t4174 \n+\tblx\t4178 \n \tmov\tr1, r0\n \tadds\tr2, r0, #1\n \tbeq.n\td424 \n \tadd\tr5, sp, #20\n \tstr\tr1, [sp, #12]\n \tldr\tr3, [r4, #0]\n \tmov\tr0, r5\n@@ -10923,15 +10923,15 @@\n \tldr\tr3, [r4, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcbz\tr3, d41a \n \tmov\tr0, r4\n \tb.n\td402 \n \tmov\tr0, r5\n-\tblx\t449c \n+\tblx\t44a0 \n \tcmp\tr0, #0\n \tbne.n\td3b0 \n \tmovs\tr0, #1\n \tldr\tr2, [pc, #204]\t; (d4d0 )\n \tldr\tr3, [pc, #188]\t; (d4c4 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n@@ -10939,77 +10939,77 @@\n \tldr\tr3, [sp, #28]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\td46a \n \tadd\tsp, #36\t; 0x24\n \tpop\t{r4, r5, r6, r7, pc}\n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tmov\tr0, r4\n \tb.n\td402 \n \tstr\tr0, [sp, #4]\n-\tblx\t4758 \n+\tblx\t475c \n \tldr\tr1, [sp, #4]\n \tcmp\tr0, #0\n \tbeq.n\td3bc \n-\tblx\t4508 \n+\tblx\t450c \n \tcmp\tr7, #0\n \tbeq.n\td400 \n \tmov\tr0, r5\n-\tblx\t4454 \n+\tblx\t4458 \n \tcmp\tr0, #0\n \tbeq.n\td400 \n \tmov\tr0, r5\n-\tblx\t435c \n+\tblx\t4360 \n \tstr\tr0, [sp, #20]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #20]\n \tmovs\tr2, #0\n \tadd\tr0, sp, #12\n \tbl\td28c \n \tadd\tr5, sp, #20\n \tmov\tr7, r0\n \tmov\tr0, r5\n \tbl\t10ac8 \n \tcmp\tr7, #0\n \tbeq.n\td400 \n \tldr\tr1, [sp, #12]\n \tb.n\td3c0 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #92]\t; (d4d4 )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #88]\t; (d4d8 )\n \tmov\tr0, r5\n \tldr\tr1, [pc, #88]\t; (d4dc )\n \tadd\tr3, pc\n \tldr\tr2, [pc, #88]\t; (d4e0 )\n \tadds\tr3, #8\n \tstr\tr3, [r5, #0]\n \tadd\tr2, pc\n \tldr\tr1, [r6, r1]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tb.n\td4ae \n \tmov\tr4, r0\n \tadd\tr0, sp, #20\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr0, [sp, #24]\n \tcbz\tr0, d4b6 \n \tbl\tabfc \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tpop\t{r1, r4, r7}\n \tmovs\tr1, r0\n \tpop\t{r1, r3, r7}\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tlsls\tr0, r6, #13\n@@ -11048,31 +11048,31 @@\n \tldr\tr3, [r3, #48]\t; 0x30\n \tcbz\tr3, d51a \n \tldr\tr3, [r3, #36]\t; 0x24\n \tcbz\tr3, d51a \n \tblx\tr3\n \tcmp\tr0, #1\n \tbls.n\td590 \n-\tblx\t4508 \n+\tblx\t450c \n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #144]\t; (d5b8 )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #140]\t; (d5bc )\n \tldr\tr2, [pc, #140]\t; (d5c0 )\n \tldr\tr1, [pc, #144]\t; (d5c4 )\n \tadd\tr3, pc\n \tadd\tr2, pc\n \tadds\tr3, #8\n \tstr\tr3, [r5, #0]\n \tmov\tr0, r5\n \tldr\tr1, [r4, r1]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tcmp\tr0, r3\n \tbeq.n\td58c \n \tldr\tr3, [pc, #100]\t; (d5b0 )\n \tldr\tr3, [r4, r3]\n \tcmp\tr0, r3\n \tbeq.n\td588 \n \tldr\tr3, [pc, #96]\t; (d5b4 )\n@@ -11083,38 +11083,38 @@\n \tldr\tr3, [r3, #48]\t; 0x30\n \tcbz\tr3, d568 \n \tldr\tr3, [r3, #36]\t; 0x24\n \tcbz\tr3, d568 \n \tblx\tr3\n \tcmp\tr0, #1\n \tbls.n\td590 \n-\tblx\t4508 \n+\tblx\t450c \n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #84]\t; (d5c8 )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #76]\t; (d5cc )\n \tldr\tr2, [pc, #80]\t; (d5d0 )\n \tldr\tr1, [pc, #64]\t; (d5c4 )\n \tadd\tr3, pc\n \tadd\tr2, pc\n \tb.n\td538 \n \tmovs\tr0, #0\n \tpop\t{r3, r4, r5, pc}\n \tmovs\tr0, #1\n \tpop\t{r3, r4, r5, pc}\n \tand.w\tr0, r0, #1\n \tpop\t{r3, r4, r5, pc}\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tb.n\td596 \n \tnop\n \tcbnz\tr0, d5f0 \n \tmovs\tr1, r0\n \tlsls\tr4, r5, #10\n \tmovs\tr0, r0\n \tlsls\tr4, r2, #13\n@@ -11149,15 +11149,15 @@\n \tmov.w\tr3, #0\n \tcmp\tr1, #0\n \tbeq.w\td82e \n \tadd\tr3, sp, #152\t; 0x98\n \tmov\tr4, r1\n \tmov\tr0, r3\n \tvmov\ts17, r3\n-\tblx\t41d8 \n+\tblx\t41dc \n \tldr\tr3, [pc, #768]\t; (d90c )\n \tmovs\tr1, #0\n \tadd.w\tsl, sp, #88\t; 0x58\n \tldr\tr2, [r5, r3]\n \tldr\tr3, [pc, #764]\t; (d910 )\n \tstrh.w\tr1, [sp, #268]\t; 0x10c\n \tstr\tr2, [sp, #44]\t; 0x2c\n@@ -11171,15 +11171,15 @@\n \tldr\tr6, [r3, #8]\n \tstr\tr2, [sp, #88]\t; 0x58\n \tldr.w\tr0, [r2, #-12]\n \tstr\tr2, [sp, #28]\n \tstr\tr6, [sp, #32]\n \tstr.w\tr6, [sl, r0]\n \tadd\tr0, sl\n-\tblx\t4674 >::init(std::basic_streambuf >*)@plt>\n+\tblx\t4678 >::init(std::basic_streambuf >*)@plt>\n \tldr\tr3, [pc, #720]\t; (d914 )\n \tadd\tr7, sp, #120\t; 0x78\n \tmov\tr0, r7\n \tmovs\tr6, #0\n \tvmov\ts16, r7\n \tadd\tr7, sp, #136\t; 0x88\n \tldr\tr2, [r5, r3]\n@@ -11196,33 +11196,33 @@\n \tstrd\tr6, r6, [sp, #96]\t; 0x60\n \tmovs\tr2, #0\n \tstr\tr3, [sp, #92]\t; 0x5c\n \tstrd\tr6, r6, [sp, #104]\t; 0x68\n \tmovs\tr3, #0\n \tstr\tr7, [sp, #40]\t; 0x28\n \tstrd\tr2, r3, [sp, #112]\t; 0x70\n-\tblx\t4900 \n+\tblx\t4904 \n \tldr\tr3, [pc, #664]\t; (d91c )\n \tvmov\tr0, s17\n \tadd\tr1, sp, #92\t; 0x5c\n \tldr\tr2, [r5, r3]\n \tstr\tr2, [sp, #48]\t; 0x30\n \tadd.w\tr3, r2, #8\n \tstrd\tr7, r6, [sp, #128]\t; 0x80\n \tstr\tr3, [sp, #92]\t; 0x5c\n \tmovs\tr3, #16\n \tstrb.w\tr6, [sp, #136]\t; 0x88\n \tstr\tr3, [sp, #124]\t; 0x7c\n-\tblx\t4674 >::init(std::basic_streambuf >*)@plt>\n+\tblx\t4678 >::init(std::basic_streambuf >*)@plt>\n \tmov\tr0, r4\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr1, r4\n \tmov\tr2, r0\n \tmov\tr0, sl\n-\tblx\t462c >& std::__ostream_insert >(std::basic_ostream >&, char const*, int)@plt>\n+\tblx\t4630 >& std::__ostream_insert >(std::basic_ostream >&, char const*, int)@plt>\n \tldr\tr3, [sp, #24]\n \tadds\tr3, #8\n \tldr\tr5, [r3, #8]\n \tstr\tr3, [sp, #16]\n \tcmp\tr5, r3\n \tittt\teq\n \taddeq\tr3, sp, #72\t; 0x48\n@@ -11240,26 +11240,26 @@\n \tbne.w\td850 \n \tldrb\tr3, [r6, #0]\n \tstrb.w\tr3, [sp, #72]\t; 0x48\n \tmov\tr3, r8\n \tstr\tr4, [sp, #68]\t; 0x44\n \tmov\tr0, r7\n \tstrb.w\tr9, [r3, r4]\n-\tblx\t41cc \n+\tblx\t41d0 \n \tldrd\tr1, r2, [sp, #64]\t; 0x40\n \tmov\tr0, sl\n-\tblx\t462c >& std::__ostream_insert >(std::basic_ostream >&, char const*, int)@plt>\n+\tblx\t4630 >& std::__ostream_insert >(std::basic_ostream >&, char const*, int)@plt>\n \tldr\tr0, [sp, #64]\t; 0x40\n \tcmp\tr0, r8\n \tbeq.n\td710 \n \tldr\tr1, [sp, #72]\t; 0x48\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r5\n-\tblx\t45cc \n+\tblx\t45d0 \n \tldr\tr3, [sp, #16]\n \tmov\tr5, r0\n \tcmp\tr3, r0\n \tbeq.n\td786 \n \tldr\tr1, [r5, #20]\n \tldr\tr2, [sp, #20]\n \tldr\tr3, [r1, #0]\n@@ -11274,37 +11274,37 @@\n \tldrb\tr3, [r6, #0]\n \tstrd\tr9, r9, [sp, #56]\t; 0x38\n \tcmp\tr3, #42\t; 0x2a\n \tadd\tr3, sp, #56\t; 0x38\n \tit\teq\n \taddeq\tr6, #1\n \tmov\tr0, r6\n-\tblx\t44a8 <__cxa_demangle@plt>\n+\tblx\t44ac <__cxa_demangle@plt>\n \tsubs\tr7, r0, #0\n \tit\tne\n \tmovne\tr6, r7\n \tstr.w\tr8, [sp, #64]\t; 0x40\n \tmov\tr0, r6\n \tstr.w\tr8, [sp, #12]\n-\tblx\t4710 \n+\tblx\t4714 \n \tldr\tr2, [sp, #8]\n \tmov\tr4, r0\n \tcmp\tr0, #15\n \tstr\tr0, [sp, #60]\t; 0x3c\n \tbls.n\td6de \n \tmov\tr1, r2\n \tmov\tr0, fp\n \tmovs\tr2, #0\n-\tblx\t47e0 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n+\tblx\t47e4 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n \tldr\tr3, [sp, #60]\t; 0x3c\n \tstr\tr0, [sp, #64]\t; 0x40\n \tstr\tr3, [sp, #72]\t; 0x48\n \tmov\tr2, r4\n \tmov\tr1, r6\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldrd\tr4, r3, [sp, #60]\t; 0x3c\n \tb.n\td6ec \n \tldr\tr4, [sp, #112]\t; 0x70\n \tmovs\tr2, #0\n \tldr\tr3, [sp, #12]\n \tstr\tr3, [sp, #64]\t; 0x40\n \tstr\tr2, [sp, #68]\t; 0x44\n@@ -11322,58 +11322,58 @@\n \torreq.w\tr5, r5, #1\n \tcmp\tr5, #0\n \tit\tne\n \tmovne\tr0, r4\n \tsubs\tr0, r0, r3\n \tstr\tr0, [sp, #0]\n \tmov\tr0, fp\n-\tblx\t426c , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>\n+\tblx\t4270 , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>\n \tldr\tr3, [sp, #24]\n \tmov\tr0, fp\n \tadd.w\tr1, r3, #28\n-\tblx\t43cc , std::allocator >::swap(std::__cxx11::basic_string, std::allocator >&)@plt>\n+\tblx\t43d0 , std::allocator >::swap(std::__cxx11::basic_string, std::allocator >&)@plt>\n \tldr\tr0, [sp, #64]\t; 0x40\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\td7da \n \tldr\tr1, [sp, #72]\t; 0x48\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr2, [sp, #52]\t; 0x34\n \tldr\tr3, [sp, #48]\t; 0x30\n \tldr\tr0, [sp, #128]\t; 0x80\n \tadds\tr3, #8\n \tstr\tr3, [sp, #92]\t; 0x5c\n \tadd.w\tr3, r2, #12\n \tstr\tr3, [sp, #88]\t; 0x58\n \tadd.w\tr3, r2, #32\n \tstr\tr3, [sp, #152]\t; 0x98\n \tldr\tr3, [sp, #40]\t; 0x28\n \tcmp\tr0, r3\n \tbeq.n\td7fe \n \tldr\tr1, [sp, #136]\t; 0x88\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #36]\t; 0x24\n \tvmov\tr0, s16\n \tadds\tr3, #8\n \tstr\tr3, [sp, #92]\t; 0x5c\n-\tblx\t46a4 \n+\tblx\t46a8 \n \tldr\tr2, [sp, #28]\n \tstr\tr2, [sp, #88]\t; 0x58\n \tvmov\tr0, s17\n \tldr\tr3, [sp, #44]\t; 0x2c\n \tldr.w\tr2, [r2, #-12]\n \tldr\tr1, [sp, #32]\n \tadds\tr3, #8\n \tadd.w\tr2, r2, #296\t; 0x128\n \tadd\tr2, sp\n \tstr.w\tr1, [r2, #-208]\n \tstr\tr3, [sp, #152]\t; 0x98\n-\tblx\t4220 \n+\tblx\t4224 \n \tldr\tr3, [sp, #24]\n \tldr\tr2, [pc, #240]\t; (d924 )\n \tldr\tr0, [r3, #28]\n \tadd\tr2, pc\n \tldr\tr3, [pc, #204]\t; (d904 )\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n@@ -11391,63 +11391,63 @@\n \tb.n\td778 \n \tmov\tr0, fp\n \tblx\tr3\n \tstr.w\tr8, [sp, #12]\n \tb.n\td6f8 \n \tadd\tr1, sp, #128\t; 0x80\n \tmov\tr0, fp\n-\tblx\t42fc , std::allocator >::_M_assign(std::__cxx11::basic_string, std::allocator > const&)@plt>\n+\tblx\t4300 , std::allocator >::_M_assign(std::__cxx11::basic_string, std::allocator > const&)@plt>\n \tb.n\td7be \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr\tr3, [sp, #64]\t; 0x40\n \tmov\tr4, r0\n \tcmp\tr3, r8\n \tbeq.n\td890 \n \tldr\tr1, [sp, #72]\t; 0x48\n \tmov\tr0, r3\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\td890 \n \tmov\tr4, r0\n \tmov\tr0, r7\n-\tblx\t41cc \n+\tblx\t41d0 \n \tmov\tr0, sl\n-\tblx\t41b4 , std::allocator >::~basic_ostringstream()@plt>\n+\tblx\t41b8 , std::allocator >::~basic_ostringstream()@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [sp, #48]\t; 0x30\n \tmov\tr4, r0\n \tldr\tr0, [sp, #128]\t; 0x80\n \tadds\tr3, #8\n \tstr\tr3, [sp, #92]\t; 0x5c\n \tldr\tr3, [sp, #40]\t; 0x28\n \tcmp\tr0, r3\n \tbeq.n\td8b4 \n \tldr\tr1, [sp, #136]\t; 0x88\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #36]\t; 0x24\n \tvmov\tr0, s16\n \tadds\tr3, #8\n \tstr\tr3, [sp, #92]\t; 0x5c\n-\tblx\t46a4 \n+\tblx\t46a8 \n \tldr\tr3, [sp, #28]\n \tstr\tr3, [sp, #88]\t; 0x58\n \tldr\tr2, [sp, #32]\n \tldr.w\tr3, [r3, #-12]\n \tadd.w\tr3, r3, #296\t; 0x128\n \tadd\tr3, sp\n \tstr.w\tr2, [r3, #-208]\n \tldr\tr3, [sp, #44]\t; 0x2c\n \tvmov\tr0, s17\n \tadds\tr3, #8\n \tstr\tr3, [sp, #152]\t; 0x98\n-\tblx\t4220 \n+\tblx\t4224 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\td890 \n \tldr\tr3, [sp, #64]\t; 0x40\n \tmov\tr4, r0\n \tldr\tr2, [sp, #12]\n \tcmp\tr3, r2\n \tbne.n\td87c \n@@ -11494,15 +11494,15 @@\n \tite\teq\n \tmoveq\tr6, #15\n \tldrne\tr6, [r2, #8]\n \tcmp\tlr, r6\n \tbls.n\td98c \n \tmov\tr2, r0\n \tmov\tr0, ip\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tmov\tr3, r0\n \tadd.w\tr1, r4, #8\n \tstr\tr1, [r4, #0]\n \tldr.w\tr2, [r3], #8\n \tcmp\tr2, r3\n \tbeq.n\td9be \n \tldr\tr1, [r0, #8]\n@@ -11516,15 +11516,15 @@\n \tmov\tr0, r4\n \tadd\tsp, #8\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r2\n \tmovs\tr2, #0\n \tmov\tr1, r2\n \tstr\tr5, [sp, #0]\n-\tblx\t426c , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>\n+\tblx\t4270 , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>\n \tmov\tr3, r0\n \tadd.w\tr5, r4, #8\n \tstr\tr5, [r4, #0]\n \tldr.w\tr2, [r3], #8\n \tcmp\tr2, r3\n \tbne.n\td974 \n \tldr.w\tip, [r0, #8]\n@@ -11557,15 +11557,15 @@\n \tstr\tr1, [sp, #28]\n \tmovs\tr1, #0\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr3, [r3, #0]\n \tstr\tr3, [sp, #412]\t; 0x19c\n \tmov.w\tr3, #0\n-\tblx\t4650 \n+\tblx\t4654 \n \tldr\tr2, [r4, #8]\n \tstr\tr2, [sp, #20]\n \tstr\tr0, [sp, #60]\t; 0x3c\n \tcmp\tr2, #0\n \tbne.w\tded8 \n \tldrb.w\tr3, [r0, #45]\t; 0x2d\n \tadd\tr1, sp, #184\t; 0xb8\n@@ -11621,53 +11621,53 @@\n \tstr\tr3, [sp, #280]\t; 0x118\n \tstr\tr3, [sp, #288]\t; 0x120\n \tvstr\td8, [sp, #272]\t; 0x110\n \tcmp\tr4, #0\n \tbeq.n\tdb66 \n \tlsls\tr4, r4, #2\n \tmov\tr0, r4\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr6, r0\n \tldrd\tr0, r7, [sp, #244]\t; 0xf4\n \tcmp\tr0, r7\n \titt\tne\n \tsubne\tr2, r6, #4\n \tmovne\tr3, r0\n \tbeq.n\tdac8 \n \tldr.w\tr1, [r3], #4\n \tstr.w\tr1, [r2, #4]!\n \tcmp\tr7, r3\n \tbne.n\tdabc \n \tcbz\tr0, dad2 \n \tldr\tr1, [sp, #252]\t; 0xfc\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #272]\t; 0x110\n \tadd\tr4, r6\n \tldr\tr2, [sp, #256]\t; 0x100\n \tldrh\tr7, [r5, #48]\t; 0x30\n \tsubs\tr3, r3, r2\n \tstr\tr4, [sp, #252]\t; 0xfc\n \tstrd\tr6, r6, [sp, #244]\t; 0xf4\n \tcmp.w\tr7, r3, lsl #3\n \tbls.n\tdb66 \n \tadds\tr7, #31\n \tlsrs\tr7, r7, #5\n \tlsls\tr7, r7, #2\n \tmov\tr0, r7\n-\tblx\t415c \n+\tblx\t4160 \n \tldrd\tr6, r4, [sp, #264]\t; 0x108\n \tmov\tr8, r0\n \tldr.w\tr9, [sp, #256]\t; 0x100\n \tsub.w\tsl, r6, r9\n \tcmp\tr9, r6\n \tbeq.n\tdb0e \n \tmov\tr2, sl\n \tmov\tr1, r9\n-\tblx\t4460 \n+\tblx\t4464 \n \tsubs\tr1, r4, #0\n \tadd\tsl, r8\n \tmov.w\tr4, #0\n \tble.n\tdb44 \n \tmov.w\tip, #1\n \tldr\tr0, [r6, #0]\n \tlsl.w\tr2, ip, r4\n@@ -11686,15 +11686,15 @@\n \tsubs\tr1, #1\n \tbne.n\tdb1c \n \tcmp.w\tr9, #0\n \tbeq.n\tdb56 \n \tldr\tr1, [sp, #272]\t; 0x110\n \tmov\tr0, r9\n \tsub.w\tr1, r1, r9\n-\tblx\t4390 \n+\tblx\t4394 \n \tadd\tr7, r8\n \tmovs\tr3, #0\n \tstrd\tsl, r4, [sp, #264]\t; 0x108\n \tstr.w\tr8, [sp, #256]\t; 0x100\n \tstr\tr7, [sp, #272]\t; 0x110\n \tstr\tr3, [sp, #260]\t; 0x104\n \tldr\tr3, [sp, #20]\n@@ -11766,21 +11766,21 @@\n \tmoveq\tr1, #0\n \tandne.w\tr1, r1, #1\n \tcmp\tr1, #0\n \tbeq.w\teed6 \n \tldr\tr0, [r2, r3]\n \tcmp\tr0, #0\n \tbeq.w\tde42 \n-\tblx\t4490 \n+\tblx\t4494 \n \tmov\tr8, r0\n \tcmp\tr0, #0\n \tbeq.w\tf364 \n \tmov\tr1, r0\n \tldr\tr0, [sp, #16]\n-\tblx\t4680 \n+\tblx\t4684 \n \tldr.w\tr3, [r8]\n \tstr\tr0, [sp, #32]\n \tsubs\tr3, #1\n \tstr.w\tr3, [r8]\n \tcmp\tr3, #0\n \tbeq.w\tdec4 \n \tldr\tr3, [sp, #32]\n@@ -11800,20 +11800,20 @@\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbeq.w\tdecc \n \tldr\tr0, [sp, #256]\t; 0x100\n \tcbz\tr0, dc72 \n \tldr\tr1, [sp, #272]\t; 0x110\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #244]\t; 0xf4\n \tcbz\tr0, dc7e \n \tldr\tr1, [sp, #252]\t; 0xfc\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #40]\t; 0x28\n \tldr\tr2, [sp, #24]\n \tsubs\tr4, r3, r2\n \tldr\tr5, [r5, #68]\t; 0x44\n \tcmp\tr5, #0\n \tbne.w\tda4c \n \tldr\tr3, [sp, #64]\t; 0x40\n@@ -11887,15 +11887,15 @@\n \tbhi.w\te08e \n \tldr\tr3, [sp, #36]\t; 0x24\n \tcmp\tr4, r3\n \tbcc.w\te100 \n \tldr.w\tr0, [r9]\n \tcmp\tr0, #0\n \tbeq.w\tdf86 \n-\tblx\t47f8 \n+\tblx\t47fc \n \tcmp\tr0, #0\n \tbeq.w\tdf86 \n \tldrb.w\tr3, [r5, #45]\t; 0x2d\n \tlsls\tr0, r3, #25\n \tbpl.w\te3fc \n \tlsls\tr3, r3, #26\n \tbmi.w\te35c \n@@ -11938,15 +11938,15 @@\n \tldr\tr3, [sp, #64]\t; 0x40\n \tmovs\tr2, #0\n \tstrd\tr2, r2, [sp, #200]\t; 0xc8\n \tstrd\tr2, r2, [sp, #208]\t; 0xd0\n \tstr\tr2, [sp, #216]\t; 0xd8\n \tcmp\tr3, #0\n \tbne.w\te040 \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldrd\tr1, r4, [r0, #204]\t; 0xcc\n \tadd\tr2, sp, #116\t; 0x74\n \tmovs\tr3, #0\n \tcmp\tr1, r4\n \tstr\tr3, [r2, #0]\n \tbeq.w\te52e \n \tstr.w\tr3, [r1], #4\n@@ -11968,21 +11968,21 @@\n \tldr\tr3, [sp, #64]\t; 0x40\n \tmov\tr4, r8\n \tcmp\tr3, #0\n \tbne.w\te202 \n \tcbz\tr0, de2a \n \tldr\tr1, [sp, #216]\t; 0xd8\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r9\n \tbl\t10ac8 \n \tmov\tr0, sl\n \tbl\t12bb4 \n \tb.n\tdc84 \n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbne.w\tf27c \n \tldr\tr1, [r6, #0]\n \tstr\tr1, [sp, #220]\t; 0xdc\n \tldr.w\tr3, [pc, #2836]\t; e95c \n \tldr.w\tr2, [fp, r3]\n \tldrb\tr3, [r7, #12]\n@@ -12029,19 +12029,19 @@\n \tb.n\tda6c \n \tsubs\tr3, r4, r1\n \tstr\tr4, [sp, #36]\t; 0x24\n \tmov\tr2, r3\n \tstr\tr3, [sp, #12]\n \tb.n\tde90 \n \tmov\tr0, r8\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tdc3e \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tdc66 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tdc56 \n \tmovs\tr3, #0\n \tstrd\tr3, r3, [sp, #184]\t; 0xb8\n \tstrd\tr3, r3, [sp, #192]\t; 0xc0\n \tmov\tr4, r0\n \tldr\tr3, [sp, #28]\n \tadd\tr1, sp, #184\t; 0xb8\n@@ -12052,20 +12052,20 @@\n \tlsls\tr0, r2, #31\n \tbpl.w\tda26 \n \tcbz\tr3, df48 \n \tldr\tr1, [r4, #60]\t; 0x3c\n \tldr\tr0, [r3, #4]\n \tcmp\tr0, r1\n \tbeq.n\tdf0a \n-\tblx\t4278 \n+\tblx\t427c \n \tcbz\tr0, df48 \n \tldr\tr1, [r4, #60]\t; 0x3c\n \tadd\tr4, sp, #80\t; 0x50\n \tmov\tr0, r1\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tldr\tr1, [sp, #52]\t; 0x34\n \tmov\tr2, r0\n \tmov\tr0, r4\n \tbl\t12644 \n \tldmia.w\tr4, {r0, r1, r2, r3}\n \tldr\tr4, [sp, #44]\t; 0x2c\n \tstmia.w\tr4, {r0, r1, r2, r3}\n@@ -12085,15 +12085,15 @@\n \tldr.w\tr3, [pc, #2580]\t; e960 \n \tmovs\tr2, #0\n \tstr\tr2, [sp, #32]\n \tldr.w\tr1, [pc, #2576]\t; e964 \n \tldr.w\tr3, [fp, r3]\n \tadd\tr1, pc\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tldr.w\tr2, [pc, #2564]\t; e968 \n \tldr.w\tr3, [pc, #2564]\t; e96c \n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #412]\t; 0x19c\n \teors\tr2, r3\n@@ -12124,15 +12124,15 @@\n \tcmp\tr6, #0\n \tbeq.w\te440 \n \tcmp\tr6, r2\n \tit\tcs\n \tmovcs\tr6, r2\n \tlsls\tr6, r6, #2\n \tmov\tr0, r6\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr1, [sp, #252]\t; 0xfc\n \tmov\tr9, r0\n \tadd\tr6, r0\n \tadds\tr3, r0, #4\n \tldr\tr2, [sp, #44]\t; 0x2c\n \tcmp\tr4, r7\n \tstr.w\tr2, [r9, r8]\n@@ -12145,15 +12145,15 @@\n \tbne.n\tdfe6 \n \tadd.w\tr8, r8, #4\n \tadd.w\tr3, r9, r8\n \tcbz\tr7, e008 \n \tsubs\tr1, r1, r7\n \tmov\tr0, r7\n \tstr\tr3, [sp, #32]\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #32]\n \tldr\tr2, [sp, #264]\t; 0x108\n \tstrd\tr9, r3, [sp, #244]\t; 0xf4\n \tldr\tr3, [sp, #272]\t; 0x110\n \tstr\tr6, [sp, #252]\t; 0xfc\n \tcmp\tr2, r3\n \tbne.w\tdbae \n@@ -12261,44 +12261,44 @@\n \tcmp\tr3, #0\n \tbeq.w\te40c \n \tldr\tr0, [r7, r6]\n \tcmp\tr0, #0\n \tbeq.w\te40c \n \tldr.w\tr3, [r9]\n \tvmov\ts18, r3\n-\tblx\t4490 \n+\tblx\t4494 \n \tstr\tr0, [sp, #68]\t; 0x44\n \tcmp\tr0, #0\n \tbeq.w\tf3aa \n \tmov\tr1, r0\n \tvmov\tr0, s18\n-\tblx\t4680 \n+\tblx\t4684 \n \tldr\tr2, [sp, #68]\t; 0x44\n \tstr\tr0, [sp, #48]\t; 0x30\n \tldr\tr3, [r2, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r2, #0]\n \tcmp\tr3, #0\n \tbeq.w\te526 \n \tldr\tr3, [sp, #48]\t; 0x30\n \tcmp\tr3, #0\n \tbeq.w\te536 \n \tstr\tr3, [sp, #200]\t; 0xc8\n \tldr\tr3, [sp, #32]\n \tldr.w\tr0, [r9]\n \tcbnz\tr3, e17c \n-\tblx\t4780 \n+\tblx\t4784 \n \tldr.w\tr3, [r9]\n \tstr.w\tr0, [r9]\n \tvmov\tr0, s19\n \tstr\tr3, [sp, #220]\t; 0xdc\n \tbl\t10ac8 \n \tldr\tr1, [r7, r6]\n \tldr.w\tr0, [r9]\n-\tblx\t4834 \n+\tblx\t4838 \n \tadds\tr0, #1\n \tbeq.w\tf2bc \n \tmovs\tr3, #1\n \tstr\tr3, [sp, #32]\n \tldrb.w\tr2, [r8, #12]\n \tldr\tr3, [sp, #200]\t; 0xc8\n \tlsls\tr6, r2, #30\n@@ -12457,36 +12457,36 @@\n \tmov\tr0, r9\n \tbl\t12234 \n \tcmp\tr5, #1\n \tbne.w\ted50 \n \tadds\tr6, #52\t; 0x34\n \tcmp\tsl, r6\n \tbeq.w\ted44 \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldrd\tr1, r3, [r0, #204]\t; 0xcc\n \tstr.w\tr7, [r8]\n \tcmp\tr1, r3\n \tbne.n\te31c \n \tadds\tr0, #200\t; 0xc8\n \tmov\tr2, r8\n \tbl\t11a14 \n \tb.n\te324 \n \tmovs\tr0, #0\n-\tblx\t42a8 \n+\tblx\t42ac \n \tstr\tr0, [sp, #200]\t; 0xc8\n \tcmp\tr0, #0\n \tbeq.w\tefd4 \n \tcmp.w\tsl, #0\n \tbeq.w\te6c6 \n \tldr\tr3, [sp, #20]\n \tcmp\tr3, r4\n \tbhi.w\ted5e \n \tmovs\tr0, #0\n \tadd\tr6, sp, #200\t; 0xc8\n-\tblx\t42a8 \n+\tblx\t42ac \n \tadd\tr4, sp, #112\t; 0x70\n \tstr\tr0, [r4, #0]\n \tcmp\tr0, #0\n \tbeq.w\tf4e4 \n \tadd\tr7, sp, #220\t; 0xdc\n \tldr\tr3, [sp, #200]\t; 0xc8\n \tstr\tr0, [sp, #200]\t; 0xc8\n@@ -12592,30 +12592,30 @@\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbeq.n\te50e \n \tldr\tr0, [r5, #16]\n \tcbz\tr0, e49c \n \tldr\tr1, [r5, #32]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r5, #4]\n \tcmp\tr0, #0\n \tbeq.n\te4fe \n \tldr\tr1, [r5, #12]\n \tadds\tr5, #52\t; 0x34\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #56]\t; 0x38\n \tcmp\tr3, r5\n \tbne.n\te474 \n \tldr\tr3, [sp, #24]\n \tcbz\tr3, e4be \n \tldr\tr0, [sp, #24]\n \tmov\tr1, r4\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #32]\n \tcmp\tr3, #1\n \tbeq.n\te514 \n \tcmp\tr3, #0\n \tbeq.w\tee36 \n \tldr\tr3, [sp, #60]\t; 0x3c\n \tldrb.w\tr3, [r3, #45]\t; 0x2d\n@@ -12639,42 +12639,42 @@\n \tblx\tr3\n \tb.n\tdf60 \n \tldr\tr3, [sp, #56]\t; 0x38\n \tadds\tr5, #52\t; 0x34\n \tcmp\tr5, r3\n \tbne.n\te474 \n \tb.n\te4b2 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\te482 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\te490 \n \tldr\tr3, [sp, #60]\t; 0x3c\n \tldrb.w\tr3, [r3, #45]\t; 0x2d\n \tlsls\tr3, r3, #28\n \tbpl.w\te6dc \n \tldr.w\tr3, [pc, #1100]\t; e970 \n \tb.n\tdf3a \n \tmov\tr0, r2\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\te154 \n \tadds\tr0, #200\t; 0xc8\n \tbl\t11a14 \n \tb.n\tddf2 \n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbne.w\teff6 \n \tstr\tr0, [sp, #200]\t; 0xc8\n \tldr.w\tr3, [r8, #8]\n \tcmp\tr3, #0\n \tbne.w\te416 \n \tldr\tr3, [sp, #36]\t; 0x24\n \tcmp\tr3, r4\n \tbhi.w\te3fc \n \tb.w\tdd40 \n-\tblx\t45a4 \n+\tblx\t45a8 \n \tstr\tr0, [sp, #200]\t; 0xc8\n \tcmp\tr0, #0\n \tbeq.w\tef56 \n \tldr.w\tr3, [r9]\n \tstr.w\tr0, [r9]\n \tadd\tr0, sp, #220\t; 0xdc\n \tstr\tr3, [sp, #220]\t; 0xdc\n@@ -12700,15 +12700,15 @@\n \tldr\tr2, [sp, #72]\t; 0x48\n \tcmp\tr3, r2\n \tit\tcs\n \tmovcs\tr3, r2\n \tmovs\tr2, #52\t; 0x34\n \tmul.w\tr4, r2, r3\n \tmov\tr0, r4\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr3, r0\n \tadd.w\tlr, r0, #52\t; 0x34\n \tadds\tr2, r0, r4\n \tstr\tr0, [sp, #12]\n \tstr\tr4, [sp, #32]\n \tstr\tr2, [sp, #40]\t; 0x28\n \tadds\tr6, r3, r7\n@@ -12792,15 +12792,15 @@\n \tadds\tr3, #104\t; 0x68\n \tldr.w\tr8, [sp, #48]\t; 0x30\n \tstr\tr3, [sp, #56]\t; 0x38\n \tldr\tr3, [sp, #24]\n \tcbz\tr3, e6ba \n \tmov\tr1, r8\n \tmov\tr0, r3\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #12]\n \tldr\tr4, [sp, #32]\n \tldr\tr0, [sp, #200]\t; 0xc8\n \tstr\tr3, [sp, #24]\n \tb.w\tde20 \n \tldr\tr2, [sp, #28]\n \tadd\tr7, sp, #220\t; 0xdc\n@@ -12818,15 +12818,15 @@\n \tmov\tr5, r3\n \tvmov\ts17, r3\n \tldr\tr1, [r4, #0]\n \tbl\t11030 \n \tldr\tr1, [pc, #644]\t; (e974 )\n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tadd\tr3, sp, #340\t; 0x154\n \tmov\tr1, r0\n \tmov\tr0, r3\n \tvmov\ts16, r3\n \tbl\t12bfc \n \tldrb.w\tr3, [r4, #45]\t; 0x2d\n \tlsls\tr7, r3, #31\n@@ -12840,50 +12840,50 @@\n \tvmov\tr1, s16\n \tmov\tr2, r8\n \tmov\tr0, r4\n \tbl\td928 \n \tldr\tr1, [pc, #588]\t; (e97c )\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tadd\tr5, sp, #292\t; 0x124\n \tmov\tr1, r0\n \tmov\tr0, r5\n \tbl\t12bfc \n \tldr\tr0, [sp, #316]\t; 0x13c\n \tadd\tr3, sp, #324\t; 0x144\n \tcmp\tr0, r3\n \tbeq.n\te750 \n \tldr\tr1, [sp, #324]\t; 0x144\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #388]\t; 0x184\n \tadd\tr3, sp, #396\t; 0x18c\n \tstr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\te762 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #340]\t; 0x154\n \tadd\tr3, sp, #348\t; 0x15c\n \tstr\tr3, [sp, #20]\n \tcmp\tr0, r3\n \tbeq.n\te774 \n \tldr\tr1, [sp, #348]\t; 0x15c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #364]\t; 0x16c\n \tadd\tr3, sp, #372\t; 0x174\n \tstr\tr3, [sp, #24]\n \tcmp\tr0, r3\n \tbeq.n\te786 \n \tldr\tr1, [sp, #372]\t; 0x174\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov.w\tsl, #1\n \tmovw\tr3, #34079\t; 0x851f\n \tmovt\tr3, #20971\t; 0x51eb\n \tmovw\tr7, #5977\t; 0x1759\n \tmovt\tr7, #53687\t; 0xd1b7\n \tstr\tr3, [sp, #36]\t; 0x24\n \tmov\tr4, sl\n@@ -12897,15 +12897,15 @@\n \tstr\tr3, [sp, #32]\n \tldr\tr3, [sp, #12]\n \tmovs\tr2, #45\t; 0x2d\n \tmov\tr1, r4\n \tmov\tr0, r8\n \tmov\tr6, sl\n \tstr\tr3, [sp, #388]\t; 0x184\n-\tblx\t4538 , std::allocator >::_M_construct(unsigned int, char)@plt>\n+\tblx\t453c , std::allocator >::_M_construct(unsigned int, char)@plt>\n \tldr.w\tlr, [sp, #388]\t; 0x184\n \tcmp.w\tsl, #99\t; 0x63\n \tble.n\te808 \n \tldr.w\tr9, [pc, #428]\t; e980 \n \tsubs\tr3, r4, #2\n \tldr\tr0, [sp, #36]\t; 0x24\n \tadd\tr3, lr\n@@ -12938,80 +12938,80 @@\n \tmovs\tr3, #4\n \tstr\tr3, [sp, #0]\n \tmovs\tr2, #0\n \tldr\tr3, [pc, #340]\t; (e988 )\n \tmov\tr1, r2\n \tmov\tr0, r8\n \tadd\tr3, pc\n-\tblx\t426c , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>\n+\tblx\t4270 , std::allocator >::_M_replace(unsigned int, unsigned int, char const*, unsigned int)@plt>\n \tmov\tr1, r0\n \tvmov\tr0, s17\n \tbl\t12bfc \n \tldr\tr1, [pc, #324]\t; (e98c )\n \tvmov\tr0, s17\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tmov\tr1, r0\n \tvmov\tr0, s16\n \tbl\t12bfc \n \tmov\tr0, r5\n \tldrd\tr1, r2, [sp, #340]\t; 0x154\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tldr\tr0, [sp, #340]\t; 0x154\n \tldr\tr3, [sp, #20]\n \tcmp\tr0, r3\n \tbeq.n\te876 \n \tldr\tr1, [sp, #348]\t; 0x15c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #364]\t; 0x16c\n \tldr\tr3, [sp, #24]\n \tcmp\tr0, r3\n \tbeq.n\te886 \n \tldr\tr1, [sp, #372]\t; 0x174\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\te896 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #60]\t; 0x3c\n \tldrb.w\tr3, [r3, #45]\t; 0x2d\n \tlsls\tr6, r3, #31\n \tbpl.n\te8cc \n \tldr\tr3, [sp, #32]\n \tmov\tr0, r8\n \tldr\tr1, [r3, #8]\n \tbl\t11030 \n \tmovs\tr2, #0\n \tmovs\tr1, #40\t; 0x28\n \tmov\tr0, r8\n-\tblx\t4520 , std::allocator >::find(char, unsigned int) const@plt>\n+\tblx\t4524 , std::allocator >::find(char, unsigned int) const@plt>\n \tldr\tr3, [sp, #392]\t; 0x188\n \tadds\tr4, r0, #7\n \tcmp\tr4, r3\n \tbcc.n\te994 \n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\te8cc \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #32]\n \tmov\tr0, r5\n \tldr\tr1, [r3, #8]\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr\tr1, [pc, #184]\t; (e990 )\n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr\tr3, [sp, #32]\n \tldr\tr3, [r3, #68]\t; 0x44\n \tstr\tr3, [sp, #32]\n \tcmp\tr3, #0\n \tbeq.w\tea30 \n \tadd.w\tsl, sl, #1\n \tmov\tr2, sl\n@@ -13080,22 +13080,22 @@\n \tldr\tr6, [r2, #32]\n \tmovs\tr0, r0\n \tldr.w\tr1, [pc, #3020]\t; f564 \n \tmovs\tr3, #2\n \tmovs\tr2, #0\n \tmov\tr0, r8\n \tadd\tr1, pc\n-\tblx\t47bc , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>\n+\tblx\t47c0 , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>\n \tldr.w\tr1, [pc, #3008]\t; f568 \n \tmov\tr6, r0\n \tmovs\tr3, #4\n \tadd\tr1, pc\n \tmov.w\tr2, #4294967295\t; 0xffffffff\n \tmov\tr0, r8\n-\tblx\t44fc , std::allocator >::rfind(char const*, unsigned int, unsigned int) const@plt>\n+\tblx\t4500 , std::allocator >::rfind(char const*, unsigned int, unsigned int) const@plt>\n \tldr\tr3, [sp, #392]\t; 0x188\n \tstr\tr0, [sp, #48]\t; 0x30\n \tcmp\tr3, r6\n \tit\thi\n \taddhi.w\tr9, r6, #2\n \tbls.w\tedfe \n \tldr\tr1, [sp, #388]\t; 0x184\n@@ -13110,54 +13110,54 @@\n \tsubs\tr3, r3, r4\n \tadd\tr1, r4\n \tcmp\tr3, r6\n \tmov\tr0, r5\n \tit\tcs\n \tmovcs\tr3, r6\n \tmov\tr2, r3\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tmovs\tr1, #40\t; 0x28\n \tmov\tr0, r5\n-\tblx\t4478 , std::allocator >::push_back(char)@plt>\n+\tblx\t447c , std::allocator >::push_back(char)@plt>\n \tldr\tr3, [sp, #48]\t; 0x30\n \tsub.w\tr2, r3, r9\n \tldrd\tr1, r3, [sp, #388]\t; 0x184\n \tcmp\tr9, r3\n \tbhi.w\tef10 \n \tsub.w\tr3, r3, r9\n \tadd\tr1, r9\n \tcmp\tr2, r3\n \tmov\tr0, r5\n \tit\tcs\n \tmovcs\tr2, r3\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.w\te8d6 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\te8d6 \n \tldr.w\tr1, [pc, #2872]\t; f56c \n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr\tr2, [sp, #28]\n \tldr\tr3, [sp, #60]\t; 0x3c\n \tmov\tr0, r2\n \tldrb.w\tr4, [r3, #45]\t; 0x2d\n \tldr\tr3, [r2, #0]\n \tand.w\tr4, r4, #1\n \tadds\tr3, #1\n \tstr\tr3, [r2, #0]\n \tadd\tr3, sp, #100\t; 0x64\n \tstr\tr3, [sp, #20]\n \tstr\tr2, [r3, #0]\n-\tblx\t4338 \n+\tblx\t433c \n \tcmp\tr0, r4\n \tbls.w\teeb0 \n \tldr.w\tr3, [pc, #2828]\t; f570 \n \tadd.w\tr9, sp, #252\t; 0xfc\n \tldr.w\tsl, [pc, #2824]\t; f574 \n \tadd\tr3, pc\n \tvmov\ts16, r3\n@@ -13167,15 +13167,15 @@\n \tvmov\ts17, r3\n \tldr\tr3, [sp, #28]\n \tmov\tr1, r4\n \tstrd\tr3, r4, [sp, #244]\t; 0xf4\n \tmov\tr0, r3\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #252]\t; 0xfc\n-\tblx\t4894 \n+\tblx\t4898 \n \tcmp\tr0, #0\n \tbeq.w\tf4b4 \n \tldr\tr3, [r0, #0]\n \tadd\tr6, sp, #200\t; 0xc8\n \tadd\tr7, sp, #220\t; 0xdc\n \tadds\tr3, #1\n \tstr\tr3, [r0, #0]\n@@ -13189,83 +13189,83 @@\n \tbl\t10ac8 \n \tldr\tr0, [sp, #252]\t; 0xfc\n \tstr\tr0, [sp, #220]\t; 0xdc\n \tcbz\tr0, eac0 \n \tldr\tr3, [r0, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r0, #0]\n-\tblx\t4150 \n+\tblx\t4154 \n \tcmp\tr0, #0\n \tbeq.w\tf430 \n \tstr\tr0, [sp, #200]\t; 0xc8\n \tmov\tr1, r6\n \tmov\tr0, r8\n-\tbl\t5bf4 \n+\tbl\t5bf4 \n \tldrd\tr1, r2, [sp, #388]\t; 0x184\n \tmov\tr0, r5\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\teaee \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r6\n \tbl\t10ac8 \n \tmov\tr0, r7\n \tbl\t10ac8 \n \tmov\tr0, r9\n \tbl\t10ac8 \n \tldr\tr0, [sp, #28]\n \tadds\tr4, #1\n-\tblx\t4338 \n+\tblx\t433c \n \tcmp\tr4, r0\n \tbcs.n\teb1a \n \tldr.w\tr1, [pc, #2668]\t; f57c \n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tb.n\tea7e \n \tmovs\tr4, #1\n \tldr\tr2, [sp, #16]\n \tcmp\tr2, #0\n \tbeq.w\tec9e \n \tldr\tr3, [r2, #0]\n \tmov\tr0, r2\n \tadds\tr3, #1\n \tstr\tr3, [r2, #0]\n \tadd\tr3, sp, #104\t; 0x68\n \tvmov\ts20, r3\n \tstr\tr2, [r3, #0]\n-\tblx\t47f8 \n+\tblx\t47fc \n \tcmp\tr0, #0\n \tbeq.w\tec96 \n \tcbz\tr4, eb4c \n \tldr.w\tr1, [pc, #2620]\t; f580 \n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr.w\tr1, [pc, #2612]\t; f584 \n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr\tr3, [sp, #16]\n \tadd.w\tr9, sp, #232\t; 0xe8\n \tadd\tr2, sp, #224\t; 0xe0\n \tstr\tr3, [sp, #220]\t; 0xdc\n \tmov\tr0, r3\n \tmov\tr1, r9\n \tadd\tr3, sp, #228\t; 0xe4\n \tmovs\tr4, #0\n \tvmov\ts17, r3\n \tvmov\ts16, r2\n \tstrd\tr4, r4, [sp, #224]\t; 0xe0\n \tstr\tr4, [sp, #232]\t; 0xe8\n-\tblx\t4320 \n+\tblx\t4324 \n \tldr\tr3, [sp, #232]\t; 0xe8\n \tcbnz\tr0, eb86 \n \tmov.w\tr3, #4294967295\t; 0xffffffff\n \tstr\tr3, [sp, #232]\t; 0xe8\n \tldr.w\tr2, [pc, #2560]\t; f588 \n \tadds\tr3, #1\n \tadd\tr2, pc\n@@ -13284,17 +13284,17 @@\n \tldr\tr3, [sp, #224]\t; 0xe0\n \tstr\tr3, [sp, #200]\t; 0xc8\n \tldr\tr3, [sp, #228]\t; 0xe4\n \tstr\tr3, [sp, #204]\t; 0xcc\n \tcbnz\tr2, ebc8 \n \tvmov\tr1, s19\n \tmov\tr0, r5\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tvmov\tr0, s18\n-\tblx\t4490 \n+\tblx\t4494 \n \tadd\tr7, sp, #112\t; 0x70\n \tstr\tr0, [r7, #0]\n \tcmp\tr0, #0\n \tbeq.w\tf500 \n \tadd\tr6, sp, #124\t; 0x7c\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tldr\tr3, [sp, #16]\n@@ -13319,104 +13319,104 @@\n \tstr\tr3, [r6, #0]\n \tmov\tr0, r6\n \tbl\t10ac8 \n \tadd\tr0, sp, #252\t; 0xfc\n \tbl\t10ac8 \n \tmov\tr1, r4\n \tmov\tr0, r8\n-\tbl\t5bf4 \n+\tbl\t5bf4 \n \tldrd\tr1, r2, [sp, #388]\t; 0x184\n \tmov\tr0, r5\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\tec38 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n \tbl\t10ac8 \n \tmov\tr0, r7\n \tbl\t10ac8 \n \tldr\tr0, [sp, #204]\t; 0xcc\n-\tblx\t4150 \n+\tblx\t4154 \n \tcmp\tr0, #0\n \tbeq.w\tf51a \n \tstr\tr0, [sp, #240]\t; 0xf0\n \tmov\tr1, sl\n \tmov\tr0, r8\n-\tbl\t5bf4 \n+\tbl\t5bf4 \n \tldrd\tr1, r2, [sp, #388]\t; 0x184\n \tmov\tr0, r5\n-\tblx\t4514 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n+\tblx\t4518 , std::allocator >::_M_append(char const*, unsigned int)@plt>\n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.n\tec74 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, sl\n \tbl\t10ac8 \n \tldr\tr0, [sp, #220]\t; 0xdc\n \tvmov\tr3, s17\n \tvmov\tr2, s16\n \tmov\tr1, r9\n-\tblx\t4320 \n+\tblx\t4324 \n \tcmp\tr0, #0\n \tbeq.n\ted16 \n \tldr\tr3, [sp, #232]\t; 0xe8\n \tmovs\tr2, #0\n \tadds\tr3, #1\n \tbne.n\tebb4 \n \tvmov\tr0, s20\n \tbl\t10ac8 \n \tldr.w\tr1, [pc, #2296]\t; f598 \n \tmovs\tr3, #5\n \tmovs\tr2, #0\n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t47bc , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>\n+\tblx\t47c0 , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>\n \tadds\tr0, #1\n \tbeq.n\tecbe \n \tldr.w\tr1, [pc, #2280]\t; f59c \n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr.w\tr3, [pc, #2272]\t; f5a0 \n \tldr\tr1, [sp, #292]\t; 0x124\n \tldr.w\tr3, [fp, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tldr\tr0, [sp, #20]\n \tbl\t10ac8 \n \tldr\tr0, [sp, #292]\t; 0x124\n \tadd\tr3, sp, #300\t; 0x12c\n \tcmp\tr0, r3\n \tbeq.w\tdf60 \n \tldr\tr1, [sp, #300]\t; 0x12c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.w\tdf60 \n-\tblx\t41f0 \n+\tblx\t41f4 \n \tadd\tr4, sp, #108\t; 0x6c\n \tstr\tr0, [r4, #0]\n \tcmp\tr0, #0\n \tbne.n\tec0a \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr8, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr.w\tr3, [pc, #2208]\t; f5a4 \n \tmov\tr0, r8\n \tldr.w\tr2, [pc, #2204]\t; f5a8 \n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov.w\tr3, #4294967295\t; 0xffffffff\n \tstr\tr3, [sp, #232]\t; 0xe8\n \tb.n\tec96 \n \tadd\tr2, sp, #264\t; 0x108\n \tmovs\tr3, #0\n \tldmia.w\tr2, {r0, r1}\n \tadd\tr2, sp, #168\t; 0xa8\n@@ -13440,15 +13440,15 @@\n \tcmp\tr3, #0\n \tbne.n\ted4a \n \tldr\tr5, [r6, #0]\n \tb.n\ted4a \n \tsub.w\tsl, r3, r4\n \tadd\tr6, sp, #200\t; 0xc8\n \tmov\tr0, sl\n-\tblx\t42a8 \n+\tblx\t42ac \n \tadd\tr6, sp, #124\t; 0x7c\n \tstr\tr0, [r6, #0]\n \tcmp\tr0, #0\n \tbeq.w\tefca \n \tadd\tr7, sp, #220\t; 0xdc\n \tldr\tr3, [sp, #200]\t; 0xc8\n \tstr\tr0, [sp, #200]\t; 0xc8\n@@ -13469,28 +13469,28 @@\n \tldr\tr0, [sp, #200]\t; 0xc8\n \tcbz\tr2, edaa \n \tldr\tr3, [r2, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r2, #0]\n \tmov\tr1, r4\n \tldr\tr6, [sp, #32]\n-\tblx\t4144 \n+\tblx\t4148 \n \tcmp\tr0, #0\n \tbeq.n\ted94 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr.w\tr3, [pc, #2016]\t; f5a4 \n \tmov\tr0, r6\n \tldr.w\tr2, [pc, #2016]\t; f5ac \n \tadd\tr6, sp, #200\t; 0xc8\n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tldr.w\tr1, [pc, #2004]\t; f5b0 \n \tadd\tr1, pc\n \tb.n\te714 \n \tldr\tr3, [sp, #40]\t; 0x28\n \tadd\tr0, sp, #200\t; 0xc8\n \tldr\tr2, [sp, #24]\n \tstr\tr5, [sp, #64]\t; 0x40\n@@ -13500,15 +13500,15 @@\n \tbl\t10ac8 \n \tmov\tr0, sl\n \tbl\t12bb4 \n \tb.w\te46a \n \tmovs\tr2, #0\n \tmovs\tr1, #41\t; 0x29\n \tmov\tr0, r8\n-\tblx\t4520 , std::allocator >::find(char, unsigned int) const@plt>\n+\tblx\t4524 , std::allocator >::find(char, unsigned int) const@plt>\n \tmov\tr6, r0\n \tmov\tr9, r0\n \tb.n\te9c8 \n \tadd\tr2, sp, #264\t; 0x108\n \tmovs\tr3, #0\n \tldmia.w\tr2, {r0, r1}\n \tadd\tr2, sp, #160\t; 0xa0\n@@ -13526,39 +13526,39 @@\n \tadd.w\tr8, sp, #388\t; 0x184\n \tmov\tr0, r8\n \tadd\tr1, pc\n \tbl\t11030 \n \tldr\tr3, [sp, #64]\t; 0x40\n \tmov\tr0, r8\n \tldr\tr1, [r3, #8]\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr.w\tr1, [pc, #1892]\t; f5b8 \n \tmovs\tr3, #5\n \tmovs\tr2, #0\n \tmov\tr0, r8\n \tadd\tr1, pc\n-\tblx\t47bc , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>\n+\tblx\t47c0 , std::allocator >::find(char const*, unsigned int, unsigned int) const@plt>\n \tadds\tr0, #1\n \tbeq.n\tee70 \n \tldr.w\tr1, [pc, #1876]\t; f5bc \n \tmov\tr0, r8\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tldr.w\tr3, [pc, #1836]\t; f5a0 \n \tldr\tr1, [sp, #388]\t; 0x184\n \tldr.w\tr3, [fp, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tldr\tr0, [sp, #388]\t; 0x184\n \tadd\tr3, sp, #396\t; 0x18c\n \tcmp\tr0, r3\n \tbeq.w\tdf60 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.w\tdf60 \n \tmovs\tr4, #3\n \tb.n\te7b6 \n \tmovs\tr4, #2\n \tb.n\te7b6 \n \tmovs\tr4, #4\n \tb.n\te7b6 \n@@ -13567,71 +13567,71 @@\n \tstr\tr3, [sp, #32]\n \tstr\tr3, [sp, #12]\n \tb.w\te5c4 \n \tmovs\tr4, #0\n \tb.n\teb1c \n \tstr.w\tlr, [sp, #56]\t; 0x38\n \tb.w\te6ae \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr.w\tr0, [pc, #1788]\t; f5c0 \n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tmovw\tr6, #65532\t; 0xfffc\n \tmovt\tr6, #32767\t; 0x7fff\n \tb.w\tdfc8 \n \tldr\tr1, [r6, #0]\n \tstr\tr1, [sp, #220]\t; 0xdc\n \tcmp\tr7, #0\n \tbne.w\tde46 \n \tb.w\tdcca \n \tmovw\tr4, #65512\t; 0xffe8\n \tmovt\tr4, #32767\t; 0x7fff\n \tb.w\te5b0 \n \tldr.w\tr0, [pc, #1744]\t; f5c4 \n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tmovs\tr4, #1\n \tb.n\te7b6 \n \tldr.w\tr1, [pc, #1736]\t; f5c8 \n \tmov\tr2, r4\n \tldr.w\tr0, [pc, #1732]\t; f5cc \n \tadd\tr1, pc\n \tadd\tr0, pc\n-\tblx\t4704 \n+\tblx\t4708 \n \tldr.w\tr1, [pc, #1724]\t; f5d0 \n \tmov\tr2, r9\n \tldr.w\tr0, [pc, #1724]\t; f5d4 \n \tadd\tr1, pc\n \tadd\tr0, pc\n-\tblx\t4704 \n+\tblx\t4708 \n \tldr\tr3, [sp, #388]\t; 0x184\n \tmov\tr4, r0\n \tldr\tr2, [sp, #12]\n \tcmp\tr3, r2\n \tbeq.n\tef40 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tmov\tr0, r3\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tef40 \n \tmov\tr4, r0\n \tldr\tr0, [sp, #20]\n \tbl\t10ac8 \n \tldr\tr0, [sp, #292]\t; 0x124\n \tadd\tr3, sp, #300\t; 0x12c\n \tcmp\tr0, r3\n \tbeq.n\tef50 \n \tldr\tr1, [sp, #300]\t; 0x12c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr.w\tr0, [pc, #1664]\t; f5d8 \n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tadd.w\tsl, sp, #240\t; 0xf0\n \tldr\tr3, [sp, #40]\t; 0x28\n \tldr\tr2, [sp, #24]\n \tmov\tr4, r0\n \tadd\tr0, sp, #200\t; 0xc8\n \tmov\tr5, r1\n \tsub.w\tr8, r3, r2\n@@ -13660,47 +13660,47 @@\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbeq.w\tf1c8 \n \tldr\tr0, [r5, #16]\n \tcbz\tr0, efba \n \tldr\tr1, [r5, #32]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r5, #4]\n \tldr\tr1, [r5, #12]\n \tsubs\tr1, r1, r0\n \tcbz\tr0, efc6 \n-\tblx\t4390 \n+\tblx\t4394 \n \tadds\tr5, #52\t; 0x34\n \tb.n\tef88 \n \tldr.w\tr0, [pc, #1552]\t; f5dc \n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tldr.w\tr0, [pc, #1544]\t; f5e0 \n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n \tmov\tr5, r1\n \tmov\tr0, r6\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tbl\t10ac8 \n \tldr\tr3, [sp, #40]\t; 0x28\n \tldr\tr2, [sp, #24]\n \tsub.w\tr8, r3, r2\n \tb.n\tef76 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr.w\tr3, [pc, #1440]\t; f5a4 \n \tmov\tr0, r6\n \tldr.w\tr2, [pc, #1496]\t; f5e4 \n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tmov\tr0, r6\n \tmov\tr5, r1\n \tadd\tr6, sp, #200\t; 0xc8\n \tbl\t10ac8 \n \tb.n\tefe2 \n \tldr\tr3, [sp, #40]\t; 0x28\n@@ -13711,186 +13711,186 @@\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tsub.w\tr8, r3, r2\n \tbl\t10ac8 \n \tb.n\tef76 \n \tmov\tr4, r0\n \tmov\tr0, r6\n \tmov\tr5, r1\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr3, [sp, #40]\t; 0x28\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tldr\tr2, [sp, #24]\n \tsub.w\tr8, r3, r2\n \tb.n\tef76 \n \tldr\tr3, [sp, #24]\n \tcbz\tr3, f060 \n \tmov\tr1, r8\n \tmov\tr0, r3\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp\tr4, #1\n \tbeq.n\tf0b6 \n \tcmp\tr4, #2\n \tbeq.n\tf0e6 \n \tmov\tr0, r6\n \tadd\tr4, sp, #108\t; 0x6c\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tmov\tr0, r4\n-\tblx\t4574 \n-\tbl\t64e8 \n+\tblx\t4578 \n+\tbl\t64e8 \n \tldr.w\tr6, [r0, #168]\t; 0xa8\n \tadd\tr5, sp, #240\t; 0xf0\n \tadd.w\tr8, sp, #220\t; 0xdc\n \tmov.w\tr9, #0\n \tcmp\tr6, #0\n \tbne.n\tf112 \n \tldr.w\tr3, [pc, #1368]\t; f5e8 \n \tldr.w\tr1, [pc, #1368]\t; f5ec \n \tadd\tr1, pc\n \tldr.w\tr3, [fp, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tldr\tr3, [r4, #0]\n \tcbz\tr3, f0aa \n \tmov\tr0, r4\n-\tblx\t446c \n+\tblx\t4470 \n \tmovs\tr3, #0\n \tstr\tr3, [sp, #32]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.w\tdf60 \n \tmov\tr0, r6\n \tmovs\tr4, #0\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tmov\tr3, r0\n \tldrd\tr0, r1, [r0, #8]\n \tldr\tr2, [r3, #16]\n \tstrd\tr4, r4, [r3, #8]\n \tstr\tr4, [r3, #16]\n-\tblx\t4260 \n+\tblx\t4264 \n \tstr\tr4, [sp, #32]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.w\tdf60 \n \tstr\tr0, [sp, #12]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #12]\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr0, r6\n-\tblx\t4284 <__cxa_begin_catch@plt>\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tstr\tr0, [sp, #12]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #12]\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [r4, #0]\n \tmov\tr5, r0\n \tcbz\tr3, f108 \n \tmov\tr0, r4\n-\tblx\t446c \n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4470 \n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [r4, #0]\n \tldr\tr7, [r6, #4]\n \tstr\tr3, [sp, #240]\t; 0xf0\n \tcmp\tr3, #0\n \tbne.n\tf1ce \n \tmov\tr0, r5\n \tblx\tr7\n \tldr\tr3, [sp, #240]\t; 0xf0\n \tcmp\tr3, #0\n \tbeq.n\tf0a0 \n \tmov\tr0, r5\n-\tblx\t446c \n+\tblx\t4470 \n \tb.n\tf0a0 \n \tmov\tr4, r0\n \tb.n\tef40 \n \tldr\tr2, [sp, #316]\t; 0x13c\n \tadd\tr3, sp, #324\t; 0x144\n \tmov\tr4, r0\n \tcmp\tr2, r3\n \tbeq.n\tf146 \n \tldr\tr1, [sp, #324]\t; 0x144\n \tmov\tr0, r2\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #388]\t; 0x184\n \tadd\tr3, sp, #396\t; 0x18c\n \tcmp\tr0, r3\n \tbeq.n\tf156 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #340]\t; 0x154\n \tadd\tr3, sp, #348\t; 0x15c\n \tcmp\tr0, r3\n \tbeq.n\tf166 \n \tldr\tr1, [sp, #348]\t; 0x15c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #364]\t; 0x16c\n \tadd\tr3, sp, #372\t; 0x174\n \tcmp\tr0, r3\n \tbeq.w\tef50 \n \tldr\tr1, [sp, #372]\t; 0x174\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tef50 \n \tmov\tr4, r0\n \tb.n\tf146 \n \tmov\tr4, r0\n \tb.n\tf156 \n \tmov\tr5, r0\n \tmov\tr0, r9\n \tstr\tr1, [sp, #20]\n \tbl\t12234 \n \tldr\tr1, [sp, #20]\n \tmov\tr0, r5\n \tcmp\tr1, #4\n \tbne.n\tf1a6 \n-\tblx\t4284 <__cxa_begin_catch@plt>\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.w\te33a \n \tb.n\tf190 \n \tmov\tr4, r0\n \tb.n\tf166 \n \tmov\tr6, r0\n \tmov\tr4, r1\n \tldr\tr3, [sp, #40]\t; 0x28\n \tldr\tr2, [sp, #24]\n \tsub.w\tr8, r3, r2\n \tb.n\tef86 \n \tmov\tr4, r0\n \tmov\tr0, r6\n \tmov\tr5, r1\n \tadd\tr6, sp, #200\t; 0xc8\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\tefe2 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tef9e \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tefae \n \tmov\tr0, r5\n-\tblx\t4168 \n+\tblx\t416c \n \tb.n\tf11c \n \tldr\tr3, [sp, #240]\t; 0xf0\n \tmov\tr7, r0\n \tcbz\tr3, f1e2 \n \tmov\tr0, r5\n-\tblx\t446c \n+\tblx\t4470 \n \tmov\tr0, r7\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tmov\tr0, r8\n-\tblx\t4574 \n+\tblx\t4578 \n \tldr\tr2, [r4, #0]\n \tldr\tr3, [sp, #220]\t; 0xdc\n \tstr\tr2, [sp, #240]\t; 0xf0\n \tstr\tr3, [r4, #0]\n \tstr.w\tr9, [sp, #220]\t; 0xdc\n \tcmp\tr2, #0\n \tbne.w\tf402 \n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr6, [r6, #0]\n \tcmp\tr6, #0\n \tbeq.w\tf08c \n \tb.n\tf112 \n \tmov\tr6, r0\n \tadd\tr0, sp, #280\t; 0x118\n \tmov\tr4, r1\n@@ -13900,15 +13900,15 @@\n \tadd\tr0, sp, #256\t; 0x100\n \tbl\ta170 \n \tldr\tr0, [sp, #244]\t; 0xf4\n \tldr\tr1, [sp, #252]\t; 0xfc\n \tsubs\tr1, r1, r0\n \tcmp\tr0, #0\n \tbeq.n\tf1aa \n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tf1aa \n \tldr\tr3, [sp, #40]\t; 0x28\n \tmov\tr4, r0\n \tldr\tr2, [sp, #24]\n \tmov\tr5, r1\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tsub.w\tr8, r3, r2\n@@ -13916,79 +13916,79 @@\n \tldr\tr3, [sp, #20]\n \tmov\tr4, r0\n \tldr\tr0, [sp, #340]\t; 0x154\n \tcmp\tr0, r3\n \tbeq.n\tf258 \n \tldr\tr1, [sp, #348]\t; 0x15c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #364]\t; 0x16c\n \tldr\tr3, [sp, #24]\n \tcmp\tr0, r3\n \tbeq.n\tf268 \n \tldr\tr1, [sp, #372]\t; 0x174\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #388]\t; 0x184\n \tldr\tr3, [sp, #12]\n \tcmp\tr0, r3\n \tbeq.w\tef40 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tef40 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr7, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #792]\t; (f5a4 )\n \tmov\tr0, r7\n \tldr\tr2, [pc, #864]\t; (f5f0 )\n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr6, r0\n \tmov\tr7, r1\n \tmov\tr0, r9\n \tbl\t10ac8 \n \tcmp\tr7, #1\n \tbne.n\tf2da \n \tmov\tr0, r6\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tvmov\tr1, s16\n \tmov\tr0, r5\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\teb00 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #728]\t; (f5a4 )\n \tmov\tr0, r6\n \tldr\tr2, [pc, #804]\t; (f5f4 )\n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tb.n\tf03c \n \tmov\tr4, r6\n \tb.n\tef3a \n \tmov\tr4, r0\n \tmov\tr6, r1\n \tmov\tr0, sl\n \tbl\t10ac8 \n \tmov\tr0, r4\n \tmov\tr1, r6\n \tcmp\tr1, #1\n \tbne.w\tf47a \n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tvmov\tr1, s21\n \tmov\tr0, r5\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\tec7a \n \tmov\tr2, r0\n \tmov\tr0, r6\n \tstr\tr1, [sp, #36]\t; 0x24\n \tstr\tr2, [sp, #24]\n \tbl\t10ac8 \n \tldr\tr2, [sp, #24]\n@@ -14017,218 +14017,218 @@\n \tldr\tr1, [sp, #12]\n \tcmp\tr0, r1\n \tbeq.n\tf360 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tstr\tr3, [sp, #36]\t; 0x24\n \tadds\tr1, #1\n \tstr\tr2, [sp, #24]\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #36]\t; 0x24\n \tldr\tr2, [sp, #24]\n \tmov\tr1, r3\n \tb.n\tf308 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr7, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #560]\t; (f5a4 )\n \tmov\tr0, r7\n \tldr\tr2, [pc, #640]\t; (f5f8 )\n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tldr\tr3, [sp, #40]\t; 0x28\n \tmov\tr4, r0\n \tldr\tr2, [sp, #24]\n \tmov\tr5, r1\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tsub.w\tr8, r3, r2\n \tb.n\tef7c \n \tmov\tr4, r0\n \tmov\tr0, r7\n \tmov\tr5, r1\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr3, [sp, #40]\t; 0x28\n \tadd.w\tsl, sp, #240\t; 0xf0\n \tldr\tr2, [sp, #24]\n \tsub.w\tr8, r3, r2\n \tb.n\tef7c \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #492]\t; (f5a4 )\n \tmov\tr0, r6\n \tldr\tr2, [pc, #576]\t; (f5fc )\n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tmov\tr5, r1\n \tmov\tr0, r6\n \tbl\ta170 \n \tb.n\tef76 \n \tb.n\tf03c \n \tmov\tr4, r0\n \tmov\tr6, r1\n \tadd\tr0, sp, #220\t; 0xdc\n \tbl\t12234 \n \tmov\tr0, r4\n \tmov\tr1, r6\n \tcmp\tr1, #4\n \tbne.n\tf418 \n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tldr\tr3, [sp, #40]\t; 0x28\n \tldr\tr2, [sp, #24]\n \tadd\tr6, sp, #200\t; 0xc8\n \tsub.w\tr8, r3, r2\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.w\tde0c \n \tadd.w\tsl, sp, #240\t; 0xf0\n \tb.n\tf3e2 \n \tmov\tr0, r5\n-\tblx\t446c \n+\tblx\t4470 \n \tldr\tr3, [sp, #220]\t; 0xdc\n \tcmp\tr3, #0\n \tbeq.w\tf200 \n \tmov\tr0, r8\n-\tblx\t446c \n+\tblx\t4470 \n \tb.n\tf200 \n \tldr\tr3, [sp, #40]\t; 0x28\n \tmov\tr4, r0\n \tldr\tr2, [sp, #24]\n \tmov\tr5, r1\n \tadd\tr6, sp, #200\t; 0xc8\n \tsub.w\tr8, r3, r2\n \tb.n\tf3ca \n \tmov\tr5, r0\n \tb.n\tf45a \n \tmov\tr5, r0\n \tb.n\tf454 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #356]\t; (f5a4 )\n \tvmov\tr2, s17\n \tmov\tr0, r6\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr5, r0\n \tmov\tr0, r8\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r4\n \tbl\t10ac8 \n \tmov\tr0, r6\n \tbl\t10ac8 \n \tadd\tr0, sp, #252\t; 0xfc\n \tbl\t10ac8 \n \tb.n\tf332 \n \tstr\tr0, [sp, #36]\t; 0x24\n \tmov\tr0, r6\n \tstr\tr1, [sp, #24]\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr3, [sp, #36]\t; 0x24\n \tldr\tr1, [sp, #24]\n \tmov\tr6, r3\n \tb.n\tf318 \n \tmov\tr4, r0\n \tb.n\tf33a \n \tldr\tr3, [sp, #12]\n \tmov\tr4, r0\n \tldr\tr0, [sp, #388]\t; 0x184\n \tmov\tr6, r1\n \tcmp\tr0, r3\n \tbeq.w\tf2e2 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tf2e2 \n \tldr\tr2, [sp, #388]\t; 0x184\n \tadd\tr3, sp, #396\t; 0x18c\n \tmov\tr4, r0\n \tcmp\tr2, r3\n \tbeq.w\tef50 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tmov\tr0, r2\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\tef50 \n \tb.n\tf2ec \n \tmov\tr6, r0\n \tb.n\tf318 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #224]\t; (f5a4 )\n \tmov\tr0, r6\n \tmov\tr2, sl\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tb.n\tf268 \n \tstr\tr0, [sp, #24]\n \tmov\tr0, r6\n \tmov\tr7, r1\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr3, [sp, #24]\n \tmov\tr6, r3\n \tb.n\tf29c \n \tb.n\tf392 \n \tldr\tr0, [pc, #280]\t; (f600 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr6, r0\n \tmov\tr0, r4\n \tmov\tr5, r1\n \tmov\tr4, r6\n \tbl\t10ac8 \n \tadd\tr6, sp, #200\t; 0xc8\n \tb.n\tefe2 \n \tmov\tr5, r0\n \tb.n\tf460 \n \tldr\tr0, [pc, #256]\t; (f604 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\tf33a \n \tmov\tr4, r0\n \tmov\tr0, r7\n \tbl\t10ac8 \n \tb.n\tf33a \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #124]\t; (f5a4 )\n \tmov\tr0, r4\n \tldr\tr2, [pc, #220]\t; (f608 )\n \tadd\tr2, pc\n \tldr.w\tr1, [fp, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\tef3a \n \tmov\tr6, r0\n \tmov\tr7, r1\n \tmov\tr0, r4\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r6\n \tmov\tr1, r7\n \tb.n\tf2ec \n \tldr\tr3, [sp, #12]\n \tmov\tr5, r0\n \tldr\tr0, [sp, #388]\t; 0x184\n \tcmp\tr0, r3\n \tbeq.n\tf560 \n \tldr\tr1, [sp, #396]\t; 0x18c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r5\n \tb.n\tf32a \n \tstrb\tr2, [r7, #24]\n \tmovs\tr0, r0\n \tstrb\tr0, [r6, #24]\n \tmovs\tr0, r0\n \tstrb\tr6, [r5, #22]\n@@ -14326,15 +14326,15 @@\n \tldr\tr7, [r1, #4]\n \tcmp\tr3, r7\n \tit\teq\n \tmoveq\tr2, #0\n \tbeq.w\tf8bc \n \tmov\tr1, r3\n \tmov\tr0, r7\n-\tblx\t4278 \n+\tblx\t427c \n \tcmp\tr0, #0\n \tbne.n\tf71c \n \tldr\tr3, [r5, #0]\n \tcmp\tr6, #0\n \tbeq.n\tf6cc \n \tldrd\tr2, fp, [r3, #32]\n \tcmp\tfp, r2\n@@ -14381,15 +14381,15 @@\n \tb.n\tf6fa \n \tldr\tr3, [r5, #0]\n \tldrb.w\tr2, [r3, #72]\t; 0x48\n \tlsls\tr2, r2, #28\n \tbmi.w\tf804 \n \tmov\tr1, r4\n \tmov\tr0, r5\n-\tbl\t75bc \n+\tbl\t75bc \n \tcmp\tr0, #0\n \tbne.n\tf6c6 \n \tldr\tr3, [pc, #804]\t; (fa08 )\n \tldr.w\tr3, [r8, r3]\n \tcmp\tr3, r4\n \tite\tne\n \tmovne\tr7, #0\n@@ -14406,29 +14406,29 @@\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.w\tf998 \n \tmov\tr0, r7\n \tadd\tsp, #44\t; 0x2c\n \tvpop\t{d8}\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr9, r0\n \tmovs\tr0, #20\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tsl, r0\n \tldr.w\tfp, [r9, #32]\n \tmovs\tr3, #0\n \tstr\tr7, [r0, #4]\n \tmov\tr0, r7\n \tstr.w\tr3, [sl]\n \tmov\tr1, fp\n \tstrd\tr3, r3, [sl, #8]\n \tstr.w\tr3, [sl, #16]\n \tstr.w\tr9, [sp, #8]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr.w\tr3, [r9, #28]\n \tmov\tr2, r1\n \tldr.w\tr3, [r3, r1, lsl #2]\n \tcbz\tr3, f798 \n \tldr.w\tr9, [r3]\n \tvmov\ts16, r4\n \tstr\tr5, [sp, #12]\n@@ -14444,15 +14444,15 @@\n \tcmp\tr4, r5\n \tbeq.n\tf870 \n \tldr\tr7, [r7, #0]\n \tcbz\tr7, f78a \n \tldr\tr5, [r7, #4]\n \tmov\tr1, r6\n \tmov\tr0, r5\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr9, r1\n \tbeq.n\tf774 \n \tmov\tr7, r4\n \tldr\tr5, [sp, #12]\n \tvmov\tr4, s16\n \tmov\tr6, r8\n \tmov\tr2, r9\n@@ -14479,38 +14479,38 @@\n \tstr\tr2, [r3, #24]\n \tmovs\tr3, #1\n \tldr\tr2, [pc, #584]\t; (fa14 )\n \tstr\tr3, [sp, #0]\n \tldr\tr3, [pc, #584]\t; (fa18 )\n \tadd\tr2, pc\n \tadd\tr3, pc\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #20]\n \tcbz\tr0, f7e0 \n \tbl\t11bcc \n \tldr\tr1, [sp, #16]\n \tmov\tr0, r7\n-\tblx\t4568 \n+\tblx\t456c \n \tstr\tr0, [sp, #20]\n \tcmp\tr0, #0\n \tbeq.w\tf9da \n \tmov\tr0, fp\n \tbl\t10ac8 \n \tldr.w\tr0, [r7, #168]\t; 0xa8\n \tadd.w\tr1, r9, #8\n \tbl\t12350 \n \tb.n\tf884 \n \tldr.w\tr9, [r3, #4]\n \tstr.w\tr9, [sp, #20]\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr7, r0\n \tldr.w\tr0, [r9, #4]\n \tbl\t11164 \n \tldr\tr1, [r7, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tadd\tr2, sp, #20\n \tmov\tr0, r7\n \tbl\t118d8 \n \tcmp\tr0, #0\n \tbeq.w\tf6d6 \n \tldr\tr3, [r0, #0]\n \tcmp\tr3, #0\n@@ -14532,24 +14532,24 @@\n \tmov\tr1, r4\n \tmov\tr0, r5\n \tadd\tsp, #44\t; 0x2c\n \tvpop\t{d8}\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tb.n\tf60c \n \tmov\tr0, r9\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tf69e \n \tmov\tr0, sl\n \tmovs\tr1, #20\n \tmov\tr6, r8\n \tldr\tr5, [sp, #12]\n \tvmov\tr4, s16\n \tmov\tr9, r7\n \tmov\tr8, fp\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [r5, #0]\n \tldrd\tr1, sl, [r9, #8]\n \tldrb.w\tr2, [r3, #72]\t; 0x48\n \tsub.w\tr0, sl, r1\n \tand.w\tr2, r2, #1\n \tcmp\tr0, #4\n \tbeq.n\tf954 \n@@ -14586,17 +14586,17 @@\n \tldr\tr3, [sp, #36]\t; 0x24\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\tf998 \n \tadd\tsp, #44\t; 0x2c\n \tvpop\t{d8}\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n-\tb.w\t75bc \n+\tb.w\t75bc \n \tldr\tr0, [sp, #20]\n-\tbl\t71e8 \n+\tbl\t71e8 \n \tadd\tr0, sp, #20\n \tbl\t10ac8 \n \tb.n\tf6fa \n \tmov\tr6, r9\n \tldrd\tr2, r9, [r3, #44]\t; 0x2c\n \tcmp\tr2, r9\n \tbeq.w\tf65a \n@@ -14638,68 +14638,68 @@\n \tmovs\tr2, #0\n \tmov\tr1, r4\n \tb.n\tf8bc \n \tstr\tr0, [r5, #8]\n \tb.n\tf6fa \n \tldr\tr3, [r5, #0]\n \tb.n\tf948 \n-\tblx\t415c \n+\tblx\t4160 \n \tstr\tr0, [r4, #0]\n \tb.n\tf8ca \n \tmov\tr7, r1\n \tmov\tr9, r6\n \tb.n\tf982 \n \tldr\tr3, [r5, #0]\n \tcmp\tsl, r7\n \tbeq.n\tf900 \n \tldr.w\tr6, [r7], #4\n \tldr\tr1, [r3, #0]\n \tldr\tr0, [r6, #0]\n-\tblx\t4278 \n+\tblx\t427c \n \tcmp\tr0, #0\n \tbeq.n\tf97c \n \tmov\tr9, r6\n \tmov\tr2, r9\n \tb.n\tf8ba \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tadd.w\tfp, sp, #16\n \tmov\tr4, r0\n \tmov\tr0, fp\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tmov\tr0, sl\n-\tbl\t4b78 \n+\tbl\t4b78 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [sp, #20]\n \tmov\tr4, r0\n \tcmp\tr3, #0\n \tbeq.n\tf9a2 \n \tmov\tr0, r3\n \tbl\t11bcc \n \tb.n\tf9a2 \n \tmov\tr4, r0\n \tadd\tr0, sp, #20\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr0, [pc, #72]\t; (fa24 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n \tb.n\tf9ee \n \tmov\tr4, r0\n \tmov\tr0, sl\n \tbl\t10ac8 \n \tmov\tr0, fp\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tldr\tr1, [sp, #920]\t; 0x398\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldr\tr1, [sp, #864]\t; 0x360\n \tmovs\tr1, r0\n@@ -14755,19 +14755,19 @@\n \tand.w\tr7, r7, #2\n \tcbnz\tr7, fa90 \n \tldr\tr3, [pc, #236]\t; (fb6c )\n \tldr\tr0, [r6, #4]\n \tldr\tr1, [r5, r3]\n \tcmp\tr0, r1\n \tbeq.n\tfa90 \n-\tblx\t4278 \n+\tblx\t427c \n \tcmp\tr0, #0\n \tbeq.n\tfb10 \n \tmov\tr0, r6\n-\tblx\t43e4 \n+\tblx\t43e8 \n \tvmov.f64\td7, #240\t; 0xbf800000 -1.0\n \tvmov.f64\td8, d0\n \tvcmp.f64\td0, d7\n \tvmrs\tAPSR_nzcv, fpscr\n \tbeq.n\tfafa \n \tvcvt.f32.f64\ts0, d8\n \tvstr\ts0, [sp, #12]\n@@ -14798,50 +14798,50 @@\n \tldr\tr3, [sp, #28]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\tfb4a \n \tadd\tsp, #32\n \tvpop\t{d8}\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbeq.n\tfaa8 \n-\tblx\t4508 \n+\tblx\t450c \n \tcbz\tr7, fb10 \n \tmov\tr0, r6\n-\tblx\t4454 \n+\tblx\t4458 \n \tcbnz\tr0, fb1c \n \tmovs\tr0, #1\n \tb.n\tfadc \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tfada \n \tmov\tr0, r6\n-\tblx\t42e4 \n+\tblx\t42e8 \n \tstr\tr0, [sp, #8]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #8]\n \tmovs\tr2, #0\n \tadd\tr0, sp, #12\n \tbl\tcf70 \n \tmov\tr6, r0\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tand.w\tr0, r8, r6\n \tuxtb\tr0, r0\n \tcmp\tr0, #0\n \tbeq.n\tfb10 \n \tvldr\ts0, [sp, #12]\n \tb.n\tfab6 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tstr\tr5, [sp, #800]\t; 0x320\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstr\tr5, [sp, #744]\t; 0x2e8\n \tmovs\tr1, r0\n \tlsls\tr4, r0, #13\n@@ -14904,17 +14904,17 @@\n \tmov.w\tr3, #0\n \tbne.n\tfbfc \n \tadd\tsp, #28\n \tpop\t{r4, r5, pc}\n \tmovs\tr0, #1\n \tb.n\tfbd8 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tfbd6 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tstr\tr4, [sp, #512]\t; 0x200\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstr\tr4, [sp, #464]\t; 0x1d0\n \tmovs\tr1, r0\n \tlsls\tr0, r4, #13\n@@ -14953,15 +14953,15 @@\n \tldrd\tr4, r3, [r2, #28]\n \tasrs\tr2, r3, #1\n \tlsls\tr3, r3, #31\n \tadd.w\tr0, r1, r2\n \tbmi.n\tfc86 \n \tblx\tr4\n \tvcvt.f64.f32\td0, s0\n-\tblx\t43c0 \n+\tblx\t43c4 \n \tldr\tr2, [pc, #52]\t; (fca4 )\n \tldr\tr3, [pc, #36]\t; (fc98 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n@@ -14970,15 +14970,15 @@\n \tadd\tsp, #24\n \tpop\t{r4, pc}\n \tldr\tr3, [r1, r2]\n \tldr\tr4, [r3, r4]\n \tb.n\tfc64 \n \tmovs\tr0, #1\n \tb.n\tfc6e \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tstr\tr3, [sp, #880]\t; 0x370\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstr\tr3, [sp, #856]\t; 0x358\n \tmovs\tr1, r0\n \tlsls\tr4, r0, #13\n@@ -15019,24 +15019,24 @@\n \tbeq.n\tfd56 \n \tldr\tr3, [pc, #244]\t; (fdec )\n \tmov\tr7, r0\n \tldr\tr0, [r6, #4]\n \tldr\tr1, [r5, r3]\n \tcmp\tr0, r1\n \tbeq.n\tfd56 \n-\tblx\t4278 \n+\tblx\t427c \n \tcbnz\tr0, fd56 \n \tands.w\tr8, r8, #2\n \tbne.n\tfd14 \n \tldr\tr3, [r6, #4]\n \tldr\tr3, [r3, #84]\t; 0x54\n \tlsls\tr2, r3, #7\n \tbpl.n\tfd4c \n \tmov\tr0, r6\n-\tblx\t4174 \n+\tblx\t4178 \n \tmov\tr1, r0\n \tadds\tr0, r1, #1\n \tbeq.n\tfd7c \n \tstr\tr1, [sp, #12]\n \tcbz\tr7, fd56 \n \tldr\tr2, [r4, #0]\n \tldr\tr4, [sp, #24]\n@@ -15053,15 +15053,15 @@\n \tldr\tr3, [r4, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcbz\tr3, fd72 \n \tmov\tr0, r4\n \tb.n\tfd58 \n \tmov\tr0, r6\n-\tblx\t449c \n+\tblx\t44a0 \n \tcmp\tr0, #0\n \tbne.n\tfd14 \n \tmovs\tr0, #1\n \tldr\tr2, [pc, #152]\t; (fdf4 )\n \tldr\tr3, [pc, #140]\t; (fde8 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n@@ -15069,52 +15069,52 @@\n \tldr\tr3, [sp, #28]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\tfdc8 \n \tadd\tsp, #32\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tmov\tr0, r4\n \tb.n\tfd58 \n \tstr\tr1, [sp, #4]\n-\tblx\t4758 \n+\tblx\t475c \n \tldr\tr1, [sp, #4]\n \tcmp\tr0, #0\n \tbeq.n\tfd20 \n-\tblx\t4508 \n+\tblx\t450c \n \tcmp.w\tr8, #0\n \tbeq.n\tfd56 \n \tmov\tr0, r6\n-\tblx\t4454 \n+\tblx\t4458 \n \tcmp\tr0, #0\n \tbeq.n\tfd56 \n \tmov\tr0, r6\n-\tblx\t435c \n+\tblx\t4360 \n \tstr\tr0, [sp, #8]\n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr1, [sp, #8]\n \tmovs\tr2, #0\n \tadd\tr0, sp, #12\n \tbl\td28c \n \tmov\tr6, r0\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tand.w\tr3, r7, r6\n \tuxtb\tr3, r3\n \tcmp\tr3, #0\n \tbeq.n\tfd56 \n \tldr\tr1, [sp, #12]\n \tb.n\tfd24 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tstr\tr3, [sp, #288]\t; 0x120\n \tmovs\tr1, r0\n \tstr\tr3, [sp, #272]\t; 0x110\n \tmovs\tr1, r0\n \tlsls\tr0, r4, #13\n \tmovs\tr0, r0\n@@ -15155,15 +15155,15 @@\n \tldr\tr1, [sp, #16]\n \tldrd\tr4, r3, [r2, #28]\n \tasrs\tr2, r3, #1\n \tlsls\tr3, r3, #31\n \tadd.w\tr0, r1, r2\n \tbmi.n\tfe62 \n \tblx\tr4\n-\tblx\t4180 \n+\tblx\t4184 \n \tldr\tr2, [pc, #52]\t; (fe80 )\n \tldr\tr3, [pc, #36]\t; (fe74 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n@@ -15172,15 +15172,15 @@\n \tadd\tsp, #24\n \tpop\t{r4, pc}\n \tldr\tr3, [r1, r2]\n \tldr\tr4, [r3, r4]\n \tb.n\tfe44 \n \tmovs\tr0, #1\n \tb.n\tfe4a \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tstr\tr1, [sp, #1008]\t; 0x3f0\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstr\tr1, [sp, #984]\t; 0x3d8\n \tmovs\tr1, r0\n \tlsls\tr0, r4, #13\n@@ -15217,15 +15217,15 @@\n \tldrd\tr4, r3, [r2, #28]\n \tasrs\tr2, r3, #1\n \tlsls\tr3, r3, #31\n \tadd.w\tr0, r1, r2\n \tbmi.n\tfef2 \n \tblx\tr4\n \tvcvt.f64.f32\td0, s0\n-\tblx\t43c0 \n+\tblx\t43c4 \n \tldr\tr2, [pc, #52]\t; (ff10 )\n \tldr\tr3, [pc, #36]\t; (ff04 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #20]\n \teors\tr2, r3\n@@ -15234,15 +15234,15 @@\n \tadd\tsp, #24\n \tpop\t{r4, pc}\n \tldr\tr3, [r1, r2]\n \tldr\tr4, [r3, r4]\n \tb.n\tfed0 \n \tmovs\tr0, #1\n \tb.n\tfeda \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tstr\tr1, [sp, #448]\t; 0x1c0\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstr\tr1, [sp, #424]\t; 0x1a8\n \tmovs\tr1, r0\n \tlsls\tr0, r4, #13\n@@ -15254,44 +15254,44 @@\n \tldr\tr3, [r0, #12]\n \tldr\tr5, [pc, #88]\t; (ff74 )\n \tadd\tr5, pc\n \tcbz\tr3, ff26 \n \tadd.w\tr0, r4, #12\n \tpop\t{r3, r4, r5, pc}\n \tldrd\tr0, r1, [r0, #4]\n-\tblx\t4214 \n+\tblx\t4218 \n \tcbz\tr0, ff4a \n \tldr\tr3, [r4, #12]\n \tstr\tr0, [r4, #12]\n \tcmp\tr3, #0\n \tbeq.n\tff20 \n \tldr\tr2, [r3, #0]\n \tsubs\tr2, #1\n \tstr\tr2, [r3, #0]\n \tcmp\tr2, #0\n \tbne.n\tff20 \n \tmov\tr0, r3\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tff20 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #32]\t; (ff78 )\n \tmov\tr0, r4\n \tldr\tr2, [pc, #32]\t; (ff7c )\n \tadd\tr2, pc\n \tldr\tr1, [r5, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr3, r0\n \tmov\tr0, r4\n \tmov\tr4, r3\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tstr\tr0, [sp, #896]\t; 0x380\n \tmovs\tr1, r0\n \tlsls\tr4, r4, #10\n \tmovs\tr0, r0\n \tadd\tr6, pc, #164\t; (adr r6, 10024 )\n \tvtbl.8\td30, {d15-d16}, d29\n \tmvns\tr0, r6\n@@ -15338,15 +15338,15 @@\n \tldr\tr0, [r6, #0]\n \tmov\tr1, r4\n \tldr\tr2, [r5, #0]\n \tmovs\tr3, #0\n \tstr\tr4, [sp, #36]\t; 0x24\n \tstr\tr0, [sp, #32]\n \tstr\tr3, [sp, #40]\t; 0x28\n-\tblx\t42b4 \n+\tblx\t42b8 \n \tcmp\tr0, #0\n \tbne.w\t10226 \n \tcbz\tr4, 1000e \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n@@ -15354,15 +15354,15 @@\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n \tbeq.w\t1015a \n \tldr\tr1, [pc, #760]\t; (10308 )\n \tmov\tr0, r7\n \tadd\tr1, pc\n-\tblx\t47b0 \n+\tblx\t47b4 \n \tcbz\tr0, 1004a \n \tldr\tr2, [pc, #752]\t; (1030c )\n \tldr\tr3, [pc, #732]\t; (102fc )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #68]\t; 0x44\n@@ -15374,15 +15374,15 @@\n \tcmp\tr0, #0\n \tbeq.n\tffde \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbne.n\tffde \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tffde \n \tldr\tr3, [r6, #0]\n \tstr\tr3, [sp, #16]\n \tldr\tr3, [pc, #704]\t; (10310 )\n \tstr\tr0, [sp, #24]\n \tadd\tr0, sp, #12\n \tadd\tr3, pc\n@@ -15408,37 +15408,37 @@\n \tstr\tr4, [sp, #44]\t; 0x2c\n \tstr\tr5, [sp, #48]\t; 0x30\n \tstrb.w\tr2, [sp, #60]\t; 0x3c\n \tldmia.w\tr3, {r0, r1}\n \tstmia.w\tr4, {r0, r1}\n \tmov\tr1, r5\n \tmov\tr0, r4\n-\tblx\t4408 \n+\tblx\t440c \n \tmov\tr5, r0\n \tcmp\tr0, #0\n \tbeq.w\t102b0 \n \tldr\tr0, [sp, #44]\t; 0x2c\n \tcmp\tr0, r4\n \tbeq.n\t100b0 \n \tldr\tr1, [sp, #52]\t; 0x34\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmovs\tr0, #1\n \tstr\tr5, [sp, #44]\t; 0x2c\n-\tblx\t42a8 \n+\tblx\t42ac \n \tmov\tr4, r0\n \tstr\tr0, [sp, #8]\n \tcmp\tr0, #0\n \tbeq.w\t102a8 \n \tstr\tr5, [r0, #12]\n \tmov\tr0, r9\n \tbl\tff14 \n \tldr\tr0, [r0, #0]\n \tmov\tr1, r4\n-\tblx\t439c \n+\tblx\t43a0 \n \tmov\tr5, r0\n \tcmp\tr0, #0\n \tbeq.w\t10284 \n \tldr\tr3, [r4, #0]\n \tstr\tr0, [sp, #4]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n@@ -15481,178 +15481,178 @@\n \tadd\tr1, pc\n \tldr.w\tr4, [r8, r3]\n \tstr\tr4, [sp, #28]\n \tmov\tr2, r4\n \tldr\tr3, [r4, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4638 \n+\tblx\t463c \n \tcmp\tr0, #0\n \tbne.n\t101e2 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n \tbne.w\t1001a \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1001a \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1000e \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n \tbne.w\t1000e \n \tb.n\t1015a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\tffd8 \n \tcmp\tr0, #0\n \tbeq.w\t1001a \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbne.w\t1001a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1001a \n \tadd\tr4, sp, #4\n \tadd\tr0, sp, #8\n \tmov\tr1, r4\n \tbl\t12a8c \n \tldrb.w\tr4, [sp, #8]\n \tb.n\t100fa \n \tldr\tr3, [pc, #380]\t; (10324 )\n \tstr\tr0, [sp, #40]\t; 0x28\n \tadd\tr3, pc\n \tstrd\tr0, r3, [sp, #32]\n \tb.n\t10078 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t10116 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t10108 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t10078 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t100e6 \n-\tblx\t4598 <__stack_chk_fail@plt>\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t459c <__stack_chk_fail@plt>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t10128 \n \tmov\tr4, r0\n \tmov\tr0, r9\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #312]\t; (10328 )\n \tmov\tr0, r5\n \tldr\tr2, [pc, #312]\t; (1032c )\n \tadd\tr2, pc\n \tldr.w\tr1, [r8, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tadd\tr0, sp, #24\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr5, r0\n \tldr\tr0, [sp, #44]\t; 0x2c\n \tcmp\tr0, r4\n \tbeq.n\t1021c \n \tldr\tr1, [sp, #52]\t; 0x34\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr4, r5\n \tadd\tr0, sp, #40\t; 0x28\n \tbl\t10ac8 \n \tb.n\t10200 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #244]\t; (10328 )\n \tmov\tr0, r5\n \tldr\tr2, [pc, #248]\t; (10330 )\n \tadd\tr2, pc\n \tldr.w\tr1, [r8, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\t101d6 \n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tadd\tr0, sp, #36\t; 0x24\n \tbl\t10ac8 \n \tadd\tr0, sp, #12\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\t10254 \n \tmov\tr4, r0\n \tadd\tr0, sp, #40\t; 0x28\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr3, r0\n \tmov\tr0, r4\n \tmov\tr4, r3\n \tbl\t10ac8 \n \tb.n\t1021e \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #148]\t; (10328 )\n \tmov\tr0, r5\n \tldr\tr2, [pc, #156]\t; (10334 )\n \tadd\tr2, pc\n \tldr.w\tr1, [r8, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tb.n\t102d4 \n \tmov\tr4, r0\n \tb.n\t102e4 \n \tldr\tr0, [pc, #140]\t; (10338 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr6, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #104]\t; (10328 )\n \tmov\tr0, r6\n \tldr\tr2, [pc, #120]\t; (1033c )\n \tadd\tr2, pc\n \tldr.w\tr1, [r8, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tb.n\t1021e \n \tmov\tr4, r0\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tadd\tr0, sp, #44\t; 0x2c\n \tbl\t10ac8 \n \tb.n\t1021e \n \tmov\tr5, r0\n \tmov\tr0, r6\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\t1020e \n \tnop\n \tstr\tr0, [sp, #448]\t; 0x1c0\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstr\tr0, [sp, #392]\t; 0x188\n@@ -15706,23 +15706,23 @@\n \tmov\tr4, r0\n \tldr\tr3, [r3, #84]\t; 0x54\n \tlsls\tr1, r3, #3\n \tbpl.n\t10428 \n \tldr\tr1, [pc, #476]\t; (10554 )\n \tmov\tr0, r6\n \tadd\tr1, pc\n-\tblx\t474c \n+\tblx\t4750 \n \tmov\tr6, r0\n \tstr\tr0, [sp, #0]\n \tcmp\tr0, #0\n \tbeq.w\t104d8 \n-\tblx\t4668 \n+\tblx\t466c \n \tmov\tr7, r0\n \tmov\tr0, r6\n-\tblx\t44e4 \n+\tblx\t44e8 \n \tadds\tr2, r7, r0\n \tmov\tr1, r7\n \tadd\tr0, sp, #28\n \tadd\tr7, sp, #36\t; 0x24\n \tstr\tr7, [sp, #28]\n \tbl\t110cc \n \tldrd\tr3, r2, [sp, #28]\n@@ -15745,15 +15745,15 @@\n \tstr\tr3, [sp, #32]\n \tstrb\tr3, [r0, #0]\n \tldr\tr0, [sp, #28]\n \tcmp\tr0, r7\n \tbeq.n\t103de \n \tldr\tr1, [sp, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [r6, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbeq.n\t104b6 \n \tldr\tr3, [sp, #4]\n \tadd.w\tr6, r4, #8\n@@ -15783,40 +15783,40 @@\n \tbne.n\t10518 \n \tmov\tr0, r4\n \tadd\tsp, #56\t; 0x38\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n \tlsls\tr3, r3, #4\n \tbmi.n\t1045a \n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #296]\t; (1055c )\n \tmov\tr6, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr2, [pc, #288]\t; (10560 )\n \tmov\tr0, r6\n \tldr\tr3, [pc, #288]\t; (10564 )\n \tadd\tr3, pc\n \tadds\tr3, #8\n \tstr\tr3, [r6, #0]\n \tldr\tr1, [r7, r2]\n \tldr\tr2, [pc, #284]\t; (10568 )\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tstr\tr7, [sp, #28]\n \tadd\tr7, sp, #36\t; 0x24\n \tmov\tr0, r7\n \tb.n\t103ca \n \tmov\tr0, r6\n-\tblx\t4668 \n+\tblx\t466c \n \tmov\tr8, r0\n \tcmp\tr0, #0\n \tbeq.n\t1042c \n \tmov\tr0, r6\n-\tblx\t44e4 \n+\tblx\t44e8 \n \tadd.w\tr2, r8, r0\n \tmov\tr1, r8\n \tadd\tr0, sp, #28\n \tadd\tr7, sp, #36\t; 0x24\n \tstr\tr7, [sp, #28]\n \tbl\t110cc \n \tldr\tr3, [sp, #28]\n@@ -15840,38 +15840,38 @@\n \tstr\tr3, [sp, #32]\n \tstrb\tr3, [r0, #0]\n \tldr\tr0, [sp, #28]\n \tcmp\tr0, r7\n \tbeq.n\t103e8 \n \tldr\tr1, [sp, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\t103e8 \n \tmov\tr0, r6\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t103e8 \n \tcbz\tr2, 104ce \n \tcmp\tr2, #1\n \tbeq.n\t104f8 \n \tmov\tr1, r7\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tmovs\tr3, #0\n \tstr\tr2, [sp, #8]\n \tstrb\tr3, [r0, r2]\n \tldr\tr0, [sp, #28]\n \tb.n\t103ca \n-\tblx\t4508 \n+\tblx\t450c \n \tb.n\t1042c \n \tcbz\tr2, 104ee \n \tcmp\tr2, #1\n \tbeq.n\t1050c \n \tmov\tr1, r7\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tmovs\tr3, #0\n \tstr\tr2, [sp, #8]\n \tstrb\tr3, [r0, r2]\n \tldr\tr0, [sp, #28]\n \tb.n\t104a0 \n@@ -15885,29 +15885,29 @@\n \tmov\tr0, r7\n \tb.n\t104a0 \n \tldrb.w\tr3, [sp, #36]\t; 0x24\n \tstrb\tr3, [r0, #0]\n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tb.n\t104ee \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tldr\tr0, [sp, #4]\n \tcmp\tr0, r5\n \tbeq.n\t10532 \n \tldr\tr1, [sp, #12]\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tmov\tr0, r6\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\t10524 \n \tmov\tr4, r0\n \tb.n\t10524 \n \tnop\n \tldrh\tr4, [r5, #36]\t; 0x24\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n@@ -15961,20 +15961,20 @@\n \tldr\tr3, [r5, #4]\n \tldr\tr3, [r3, #84]\t; 0x54\n \tlsls\tr1, r3, #3\n \tbmi.n\t1062e \n \tlsls\tr3, r3, #4\n \tbpl.w\t106d6 \n \tmov\tr0, r5\n-\tblx\t4668 \n+\tblx\t466c \n \tmov\tr8, r0\n \tcmp\tr0, #0\n \tbeq.n\t106d6 \n \tmov\tr0, r5\n-\tblx\t44e4 \n+\tblx\t44e8 \n \tadd.w\tr2, r8, r0\n \tmov\tr1, r8\n \tadd\tr0, sp, #28\n \tadd\tr5, sp, #36\t; 0x24\n \tstr\tr5, [sp, #28]\n \tbl\t110cc \n \tldr\tr3, [sp, #28]\n@@ -15998,28 +15998,28 @@\n \tstr\tr3, [sp, #32]\n \tstrb\tr3, [r0, #0]\n \tldr\tr0, [sp, #28]\n \tcmp\tr0, r5\n \tbeq.n\t10698 \n \tldr\tr1, [sp, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\t10698 \n \tldr\tr1, [pc, #332]\t; (1077c )\n \tmov\tr0, r5\n \tadd\tr1, pc\n-\tblx\t474c \n+\tblx\t4750 \n \tmov\tr5, r0\n \tstr\tr0, [sp, #0]\n \tcmp\tr0, #0\n \tbeq.n\t106cc \n-\tblx\t4668 \n+\tblx\t466c \n \tmov\tr6, r0\n \tmov\tr0, r5\n-\tblx\t44e4 \n+\tblx\t44e8 \n \tadds\tr2, r6, r0\n \tmov\tr1, r6\n \tadd\tr0, sp, #28\n \tadd\tr5, sp, #36\t; 0x24\n \tstr\tr5, [sp, #28]\n \tbl\t110cc \n \tldr\tr3, [sp, #28]\n@@ -16043,72 +16043,72 @@\n \tstr\tr3, [sp, #32]\n \tstrb\tr3, [r0, #0]\n \tldr\tr0, [sp, #28]\n \tcmp\tr0, r5\n \tbeq.n\t10692 \n \tldr\tr1, [sp, #36]\t; 0x24\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, sp\n \tbl\t10ac8 \n \tmov\tr0, r4\n \tadd\tr1, sp, #4\n \tbl\t12bfc \n \tldr\tr0, [sp, #4]\n \tcmp\tr0, r7\n \tbeq.w\t10594 \n \tldr\tr1, [sp, #12]\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\t10594 \n \tcbz\tr2, 106c2 \n \tcmp\tr2, #1\n \tbeq.n\t10704 \n \tmov\tr1, r5\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tmovs\tr3, #0\n \tstr\tr2, [sp, #8]\n \tstrb\tr3, [r0, r2]\n \tldr\tr0, [sp, #28]\n \tb.n\t1067e \n-\tblx\t4508 \n+\tblx\t450c \n \tmov\tr0, sp\n \tbl\t10ac8 \n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #160]\t; (10780 )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #156]\t; (10784 )\n \tmov\tr0, r5\n \tldr\tr2, [pc, #156]\t; (10788 )\n \tadd\tr3, pc\n \tadds\tr3, #8\n \tstr\tr3, [r5, #0]\n \tldr\tr1, [r6, r2]\n \tldr\tr2, [pc, #148]\t; (1078c )\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tstr\tr5, [sp, #28]\n \tadd\tr5, sp, #36\t; 0x24\n \tmov\tr0, r5\n \tb.n\t1067e \n \tldrb.w\tr3, [sp, #36]\t; 0x24\n \tstrb\tr3, [r0, #0]\n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tb.n\t106c2 \n \tcbz\tr2, 10720 \n \tcmp\tr2, #1\n \tbeq.n\t10732 \n \tmov\tr1, r5\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tmovs\tr3, #0\n \tstr\tr2, [sp, #8]\n \tstrb\tr3, [r0, r2]\n \tldr\tr0, [sp, #28]\n \tb.n\t10618 \n@@ -16117,31 +16117,31 @@\n \tmov\tr0, r5\n \tb.n\t10618 \n \tldrb.w\tr3, [sp, #36]\t; 0x24\n \tstrb\tr3, [r0, #0]\n \tldr\tr2, [sp, #32]\n \tldr\tr0, [sp, #4]\n \tb.n\t10720 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tmov\tr0, sp\n \tbl\t10ac8 \n \tldr\tr0, [sp, #4]\n \tcmp\tr0, r7\n \tbeq.n\t10758 \n \tldr\tr1, [sp, #12]\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\t1074a \n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\t1074a \n \tldrh\tr4, [r1, #20]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldrh\tr4, [r7, #18]\n \tmovs\tr1, r0\n@@ -16170,36 +16170,36 @@\n \tldr\tr3, [r1, #0]\n \tldr\tr5, [r3, #4]\n \tldrb\tr3, [r5, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr5, #1\n \tmov\tr0, r5\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r5\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tldr\tr1, [r4, #4]\n \tstr\tr0, [sp, #8]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r4, #0]\n \tmov\tr8, r1\n \tlsls\tr7, r1, #2\n \tldr.w\tsl, [r3, r1, lsl #2]\n \tcmp.w\tsl, #0\n \tbeq.n\t10858 \n \tldr.w\tr5, [sl]\n \tmovw\tfp, #26887\t; 0x6907\n \tmovt\tfp, #50959\t; 0xc70f\n \tmov\tr9, r4\n \tldr\tr1, [r5, #4]\n \tldr\tr0, [r6, #0]\n-\tblx\t4550 \n+\tblx\t4554 \n \tcbz\tr0, 10822 \n \tldr.w\tr0, [sl]\n \tmov\tr4, r9\n \tcbz\tr0, 10858 \n \tadds\tr0, #8\n \tldr\tr2, [pc, #504]\t; (10a00 )\n \tldr\tr3, [pc, #496]\t; (109fc )\n@@ -16218,43 +16218,43 @@\n \tldr.w\tsl, [r9, #4]\n \tldr\tr4, [r3, #4]\n \tldrb\tr3, [r4, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr4, #1\n \tmov\tr0, r4\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, fp\n \tmov\tr1, r0\n \tmov\tr0, r4\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr8, r1\n \tbne.n\t10856 \n \tmov\tsl, r5\n \tldr\tr5, [r5, #0]\n \tb.n\t107f2 \n \tmov\tr4, r9\n \tmovs\tr0, #12\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [r6, #0]\n \tmov\tr5, r0\n \tstr\tr3, [r0, #4]\n \tldr.w\tr8, [r4, #20]\n \tmovs\tr3, #1\n \tstr\tr3, [sp, #0]\n \tmovs\tr6, #0\n \tadd.w\tr1, r4, #16\n \tadd\tr0, sp, #28\n \tldr\tr3, [r4, #12]\n \tldr\tr2, [r4, #4]\n \tstr\tr6, [r5, #0]\n \tstr\tr6, [r5, #8]\n-\tblx\t45fc \n+\tblx\t4600 \n \tldrb.w\tr3, [sp, #28]\n \tcbnz\tr3, 108ac \n \tldr.w\tr9, [r4]\n \tadd.w\tr1, r9, r7\n \tldr.w\tr2, [r9, r7]\n \tcmp\tr2, #0\n \tbeq.n\t10978 \n@@ -16275,21 +16275,21 @@\n \tstreq.w\tr2, [r9, #24]!\n \tstreq.w\tr9, [sp, #16]\n \tbeq.n\t108e4 \n \tcmp.w\tsl, #536870912\t; 0x20000000\n \tbcs.n\t109c2 \n \tmov.w\tr6, sl, lsl #2\n \tmov\tr0, r6\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr2, r6\n \tmovs\tr1, #0\n \tadd.w\tr3, r4, #24\n \tmov\tr9, r0\n \tstr\tr3, [sp, #16]\n-\tblx\t4374 \n+\tblx\t4378 \n \tldr.w\tr8, [r4, #8]\n \tmovs\tr2, #0\n \tstr\tr2, [r4, #8]\n \tcmp.w\tr8, #0\n \tbeq.n\t1094a \n \tadd.w\tr3, r4, #8\n \tstr\tr3, [sp, #12]\n@@ -16305,21 +16305,21 @@\n \tldr\tr2, [r7, #4]\n \tldr\tr6, [r2, #4]\n \tldrb\tr2, [r6, #0]\n \tcmp\tr2, #42\t; 0x2a\n \tit\teq\n \taddeq\tr6, #1\n \tmov\tr0, r6\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, fp\n \tmov\tr1, r0\n \tmov\tr0, r6\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr.w\tr2, [r9, r1, lsl #2]\n \tcmp\tr2, #0\n \tbeq.n\t109a2 \n \tldr\tr2, [r2, #0]\n \tstr\tr2, [r7, #0]\n \tldr.w\tr2, [r9, r1, lsl #2]\n \tstr\tr7, [r2, #0]\n@@ -16328,20 +16328,20 @@\n \tldr\tr5, [sp, #20]\n \tmov\tr4, r8\n \tldrd\tr0, r1, [r4]\n \tldr\tr3, [sp, #16]\n \tcmp\tr3, r0\n \tbeq.n\t1095a \n \tlsls\tr1, r1, #2\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #8]\n \tmov\tr1, sl\n \tstr.w\tsl, [r4, #4]\n \tstr.w\tr9, [r4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tlsls\tr7, r1, #2\n \tadd.w\tr1, r9, r7\n \tldr.w\tr2, [r9, r7]\n \tcmp\tr2, #0\n \tbne.n\t10896 \n \tldr\tr2, [r4, #8]\n \tstr\tr2, [r5, #0]\n@@ -16349,15 +16349,15 @@\n \tcbz\tr2, 1099a \n \tldr\tr2, [r2, #4]\n \tldr\tr1, [r4, #4]\n \tstr\tr1, [sp, #8]\n \tldr\tr0, [r2, #4]\n \tbl\t11164 \n \tldr\tr1, [sp, #8]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tstr.w\tr5, [r9, r1, lsl #2]\n \tldr\tr1, [r4, #0]\n \tadd\tr1, r7\n \tadd.w\tr3, r4, #8\n \tstr\tr3, [r1, #0]\n \tb.n\t108a0 \n \tldr.w\tr2, [r8, #8]\n@@ -16370,28 +16370,28 @@\n \tstr.w\tr7, [r9, r5, lsl #2]\n \tmov\tr5, r1\n \tb.n\t10942 \n \tmov\tr5, r1\n \tb.n\t10942 \n \tcmp.w\tsl, #1073741824\t; 0x40000000\n \tbcc.n\t109cc \n-\tblx\t4424 \n-\tblx\t4248 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t4428 \n+\tblx\t424c \n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tmov\tr0, r5\n \tmovs\tr1, #12\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tstr.w\tr8, [r4, #20]\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\t109d6 \n \tldrh\tr0, [r5, #2]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstrh\tr2, [r6, #62]\t; 0x3e\n \tmovs\tr1, r0\n@@ -16431,58 +16431,58 @@\n \tstr\tr4, [r5, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr2, sl\n \tmov\tr1, r7\n \tmov\tr0, fp\n \tstr\tr3, [sp, #4]\n-\tblx\t4460 \n+\tblx\t4464 \n \tldr\tr3, [sp, #4]\n \tcmp\tr3, #0\n \tbgt.n\t10a8e \n \tldr\tr1, [r5, #8]\n \tmov\tr0, r7\n \tsubs\tr1, r1, r7\n-\tblx\t4390 \n+\tblx\t4394 \n \tstrd\tfp, r8, [r5]\n \tstr\tr4, [r5, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr2, r3\n \tmov\tr1, r6\n \tmov\tr0, r9\n-\tblx\t46ec \n+\tblx\t46f0 \n \tcmp\tr7, #0\n \tbeq.n\t10a5a \n \tb.n\t10a78 \n \tmovw\tr4, #65532\t; 0xfffc\n \tmovt\tr4, #32767\t; 0x7fff\n \tmov\tr0, r4\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tfp, r0\n \tadd\tr4, r0\n \tb.n\t10a38 \n \tcmp\tr4, r1\n \tit\tcs\n \tmovcs\tr4, r1\n \tlsls\tr4, r4, #2\n \tb.n\t10aa6 \n \tldr\tr0, [pc, #4]\t; (10ac4 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tldr\tr4, [pc, #648]\t; (10d50 )\n \tmovs\tr0, r0\n \tldr\tr0, [r0, #0]\n \tcbz\tr0, 10ad4 \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcbz\tr3, 10ad6 \n \tbx\tlr\n-\tb.w\t4414 <_Py_Dealloc@plt>\n+\tb.w\t4418 <_Py_Dealloc@plt>\n \tnop\n \tldr.w\tr2, [pc, #1260]\t; 10fcc \n \tldr.w\tr3, [pc, #1260]\t; 10fd0 \n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tadd\tr2, pc\n \tmov\tfp, r0\n \tsub\tsp, #124\t; 0x7c\n@@ -16507,15 +16507,15 @@\n \tcmp\tr3, r2\n \tbeq.w\t10e6a \n \tstr\tr3, [sp, #44]\t; 0x2c\n \tldr\tr3, [sp, #44]\t; 0x2c\n \tldr.w\tr4, [r3], #4\n \tstr\tr3, [sp, #44]\t; 0x2c\n \tmov\tr0, r4\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10b42 \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr8, [r4, #168]\t; 0xa8\n \tstr.w\tr8, [sp, #84]\t; 0x54\n \tcmp.w\tr8, #0\n@@ -16535,15 +16535,15 @@\n \tcmp\tr3, r2\n \tbeq.w\t10e52 \n \tstr\tr3, [sp, #48]\t; 0x30\n \tldr\tr3, [sp, #48]\t; 0x30\n \tldr.w\tr4, [r3], #4\n \tstr\tr3, [sp, #48]\t; 0x30\n \tmov\tr0, r4\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10b9a \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tsl, [r4, #168]\t; 0xa8\n \tstr.w\tsl, [sp, #88]\t; 0x58\n \tcmp.w\tsl, #0\n@@ -16563,15 +16563,15 @@\n \tcmp\tr3, r2\n \tbeq.w\t10e3a \n \tstr\tr3, [sp, #52]\t; 0x34\n \tldr\tr3, [sp, #52]\t; 0x34\n \tldr.w\tr4, [r3], #4\n \tstr\tr3, [sp, #52]\t; 0x34\n \tmov\tr0, r4\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10bf2 \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr2, [r4, #168]\t; 0xa8\n \tstr\tr2, [sp, #20]\n \tstr\tr2, [sp, #92]\t; 0x5c\n@@ -16593,15 +16593,15 @@\n \tcmp\tr3, r2\n \tbeq.w\t10e24 \n \tstr\tr3, [sp, #56]\t; 0x38\n \tldr\tr3, [sp, #56]\t; 0x38\n \tldr.w\tr4, [r3], #4\n \tstr\tr3, [sp, #56]\t; 0x38\n \tmov\tr0, r4\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10c3e \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr2, [r4, #168]\t; 0xa8\n \tstr\tr2, [sp, #24]\n \tstr\tr2, [sp, #96]\t; 0x60\n@@ -16623,15 +16623,15 @@\n \tcmp\tr3, r2\n \tbeq.w\t10e0e \n \tstr\tr3, [sp, #4]\n \tldr\tr3, [sp, #4]\n \tldr.w\tr4, [r3], #4\n \tstr\tr3, [sp, #4]\n \tmov\tr0, r4\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10c8a \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr4, [r4, #168]\t; 0xa8\n \tstr\tr4, [sp, #100]\t; 0x64\n \tcbz\tr4, 10c98 \n@@ -16650,15 +16650,15 @@\n \tcmp\tr3, r2\n \tbeq.w\t10dfa \n \tstr\tr3, [sp, #0]\n \tldr\tr3, [sp, #0]\n \tldr.w\tr5, [r3], #4\n \tstr\tr3, [sp, #0]\n \tmov\tr0, r5\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10cd2 \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr6, [r5, #168]\t; 0xa8\n \tstr\tr6, [sp, #104]\t; 0x68\n \tcbz\tr6, 10ce0 \n@@ -16677,15 +16677,15 @@\n \tcmp\tr3, r2\n \tbeq.n\t10de6 \n \tstr\tr3, [sp, #12]\n \tldr\tr3, [sp, #12]\n \tldr.w\tr5, [r3], #4\n \tstr\tr3, [sp, #12]\n \tmov\tr0, r5\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10d18 \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr9, [r5, #168]\t; 0xa8\n \tstr.w\tr9, [sp, #108]\t; 0x6c\n \tcmp.w\tr9, #0\n@@ -16702,15 +16702,15 @@\n \tldrmi.w\tr7, [r9, #12]\n \tadd.w\tr3, r7, r3, lsl #2\n \tstr\tr3, [sp, #28]\n \tcmp\tr7, r3\n \tbeq.n\t10dd0 \n \tldr.w\tr5, [r7], #4\n \tmov\tr0, r5\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10d68 \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr5, [r5, #168]\t; 0xa8\n \tstr\tr5, [sp, #112]\t; 0x70\n \tcbz\tr5, 10d76 \n@@ -16729,15 +16729,15 @@\n \tcmp\tr3, r2\n \tbeq.n\t10dc0 \n \tstr\tr3, [sp, #40]\t; 0x28\n \tldr\tr3, [sp, #40]\t; 0x28\n \tldr.w\tr0, [r3], #4\n \tstr\tr0, [sp, #76]\t; 0x4c\n \tstr\tr3, [sp, #40]\t; 0x28\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 10dae \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr\tr3, [sp, #76]\t; 0x4c\n \tldr.w\tr0, [r3, #168]\t; 0xa8\n \tbl\t10adc \n@@ -16829,95 +16829,95 @@\n \tldr\tr3, [sp, #116]\t; 0x74\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\t10f68 \n \tadd\tsp, #124\t; 0x7c\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr0, r5\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #28]\n \tcmp\tr3, r7\n \tbne.w\t10d50 \n \tldr.w\tr3, [r9]\n \tsubs\tr3, #1\n \tstr.w\tr3, [r9]\n \tcmp\tr3, #0\n \tbne.n\t10dde \n \tmov\tr0, r9\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldrd\tr2, r3, [sp, #12]\n \tcmp\tr3, r2\n \tbne.w\t10cfc \n \tldr\tr3, [r6, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbne.n\t10df0 \n \tmov\tr0, r6\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #8]\n \tldr\tr2, [sp, #0]\n \tcmp\tr3, r2\n \tbne.w\t10cb6 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n \tbne.n\t10e04 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #32]\n \tldr\tr2, [sp, #4]\n \tcmp\tr3, r2\n \tbne.w\t10c6e \n \tb.n\t10e0e \n \tmov\tr0, r2\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #72]\t; 0x48\n \tldr\tr2, [sp, #56]\t; 0x38\n \tcmp\tr3, r2\n \tbne.w\t10c22 \n \tb.n\t10e24 \n \tmov\tr0, r2\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #68]\t; 0x44\n \tldr\tr2, [sp, #52]\t; 0x34\n \tcmp\tr3, r2\n \tbne.w\t10bd6 \n \tldr.w\tr3, [sl]\n \tsubs\tr3, #1\n \tstr.w\tr3, [sl]\n \tcmp\tr3, #0\n \tbne.n\t10e48 \n \tmov\tr0, sl\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #64]\t; 0x40\n \tldr\tr2, [sp, #48]\t; 0x30\n \tcmp\tr3, r2\n \tbne.w\t10b7e \n \tldr.w\tr3, [r8]\n \tsubs\tr3, #1\n \tstr.w\tr3, [r8]\n \tcmp\tr3, #0\n \tbne.n\t10e60 \n \tmov\tr0, r8\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [sp, #60]\t; 0x3c\n \tldr\tr2, [sp, #44]\t; 0x2c\n \tcmp\tr3, r2\n \tbne.w\t10b26 \n \tldr.w\tr3, [fp]\n \tsubs\tr3, #1\n \tstr.w\tr3, [fp]\n \tcmp\tr3, #0\n \tbne.n\t10e78 \n \tmov\tr0, fp\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t10e78 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmov\tr4, r0\n \tb.n\t10fa2 \n \tmov\tr4, r0\n \tadd\tr0, sp, #112\t; 0x70\n \tbl\t10ac8 \n \tadd\tr0, sp, #108\t; 0x6c\n \tbl\t10ac8 \n@@ -16932,15 +16932,15 @@\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tadd\tr0, sp, #84\t; 0x54\n \tbl\t10ac8 \n \tadd\tr0, sp, #80\t; 0x50\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\t10f7e \n \tmov\tr4, r0\n \tb.n\t10f84 \n \tmov\tr4, r0\n \tb.n\t10f8a \n \tmov\tr4, r0\n@@ -16963,32 +16963,32 @@\n \tmovs\tr5, #0\n \tmov\tr0, r5\n \tstrd\tr5, r5, [r4]\n \tstrd\tr5, r5, [r4, #8]\n \tstrd\tr5, r5, [r4, #16]\n \tstrd\tr5, r5, [r4, #24]\n \tstr\tr5, [r4, #32]\n-\tblx\t443c \n+\tblx\t4440 \n \tstr\tr0, [r4, #36]\t; 0x24\n \tcbz\tr0, 11010 \n \tldrb.w\tr3, [r4, #48]\t; 0x30\n \tstrd\tr5, r5, [r4, #40]\t; 0x28\n \tbic.w\tr3, r3, #63\t; 0x3f\n \torr.w\tr3, r3, #8\n \tstrb.w\tr3, [r4, #48]\t; 0x30\n \tpop\t{r3, r4, r5, pc}\n \tldr\tr0, [pc, #24]\t; (1102c )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr3, r0\n \tadd.w\tr0, r4, #36\t; 0x24\n \tmov\tr4, r3\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tldrsb\tr6, [r7, r4]\n \tmovs\tr0, r0\n \tldr\tr2, [pc, #136]\t; (110bc )\n \tldr\tr3, [pc, #140]\t; (110c0 )\n \tadd\tr2, pc\n \tpush\t{r4, r5, r6, r7, lr}\n@@ -17000,15 +17000,15 @@\n \tmov.w\tr3, #0\n \tstr\tr7, [r0, #0]\n \tcmp\tr1, #0\n \tbeq.n\t110b2 \n \tmov\tr5, r0\n \tmov\tr0, r1\n \tmov\tr6, r1\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr4, r0\n \tcmp\tr0, #15\n \tstr\tr0, [sp, #0]\n \tbhi.n\t1108c \n \tcmp\tr0, #1\n \tbne.n\t11086 \n \tldrb\tr3, [r6, #0]\n@@ -17029,30 +17029,30 @@\n \tpop\t{r4, r5, r6, r7, pc}\n \tcmp\tr0, #0\n \tbeq.n\t11068 \n \tb.n\t1109e \n \tmovs\tr2, #0\n \tmov\tr1, sp\n \tmov\tr0, r5\n-\tblx\t47e0 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n+\tblx\t47e4 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n \tldr\tr3, [sp, #0]\n \tmov\tr7, r0\n \tstr\tr3, [r5, #8]\n \tstr\tr0, [r5, #0]\n \tmov\tr2, r4\n \tmov\tr0, r7\n \tmov\tr1, r6\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr4, [sp, #0]\n \tldr\tr7, [r5, #0]\n \tb.n\t11068 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr\tr0, [pc, #20]\t; (110c8 )\n \tadd\tr0, pc\n-\tblx\t43b4 \n+\tblx\t43b8 \n \tnop\n \tldrb\tr0, [r1, #31]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldrb\tr4, [r1, #30]\n \tmovs\tr1, r0\n@@ -17102,28 +17102,28 @@\n \tadd\tsp, #8\n \tpop\t{r4, r5, r6, pc}\n \tcmp\tr4, #0\n \tbeq.n\t11108 \n \tb.n\t1113a \n \tmov\tr2, r3\n \tmov\tr1, sp\n-\tblx\t47e0 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n+\tblx\t47e4 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n \tldr\tr3, [sp, #0]\n \tstr\tr3, [r5, #8]\n \tstr\tr0, [r5, #0]\n \tmov\tr2, r4\n \tmov\tr1, r6\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr4, [sp, #0]\n \tldr\tr0, [r5, #0]\n \tb.n\t11108 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr\tr0, [pc, #16]\t; (11160 )\n \tadd\tr0, pc\n-\tblx\t43b4 \n+\tblx\t43b8 \n \tldrb\tr0, [r4, #28]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldrb\tr4, [r5, #27]\n \tmovs\tr1, r0\n \tlsls\tr2, r2\n@@ -17131,20 +17131,20 @@\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n \tldrb\tr3, [r0, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr4, #1\n \tmov\tr0, r4\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r4\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tpop\t{r4, pc}\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tsub\tsp, #28\n \tadd\tr4, sp, #24\n \tstmdb\tr4, {r1, r2}\n \tldrb.w\tr2, [sp, #64]\t; 0x40\n \tldr\tr4, [sp, #20]\n@@ -17224,15 +17224,15 @@\n \tbne.w\t11496 \n \tldr\tr3, [sp, #4]\n \tcmp\tr3, #0\n \tbeq.w\t114ba \n \tsub.w\tr2, r8, r6\n \tmov\tr0, r6\n \tmov.w\tr1, #4294967295\t; 0xffffffff\n-\tblx\t4374 \n+\tblx\t4378 \n \tcmp\tr7, #0\n \tbeq.w\t114ae \n \trsb\tr3, r7, #32\n \tmov.w\tr2, #4294967295\t; 0xffffffff\n \tldr\tr0, [r5, #8]\n \tlsrs\tr2, r3\n \tldr.w\tr3, [r8]\n@@ -17276,23 +17276,23 @@\n \tit\tcs\n \tmovcs\tr3, r1\n \tadds\tr3, #31\n \tlsrs\tr3, r3, #5\n \tlsls\tr3, r3, #2\n \tstr\tr3, [sp, #8]\n \tmov\tr0, r3\n-\tblx\t415c \n+\tblx\t4160 \n \tldr.w\tr8, [r5]\n \tstr\tr0, [sp, #12]\n \tsub.w\tr7, r6, r8\n \tcmp\tr8, r6\n \tbeq.n\t11330 \n \tmov\tr2, r7\n \tmov\tr1, r8\n-\tblx\t4460 \n+\tblx\t4464 \n \tldr\tr3, [sp, #12]\n \tcmp\tr4, #0\n \tadd.w\tr0, r3, r7\n \tmov\tr7, r4\n \tble.w\t11582 \n \tmov\tlr, r6\n \tmovs\tr3, #0\n@@ -17344,15 +17344,15 @@\n \tcmp\tr3, #0\n \tbeq.w\t11578 \n \torr.w\tr3, ip, r1\n \tstr\tr3, [r0, #0]\n \tmov\tr0, r2\n \tsubs\tr2, r7, r0\n \tmov.w\tr1, #4294967295\t; 0xffffffff\n-\tblx\t4374 \n+\tblx\t4378 \n \tcmp.w\tsl, #0\n \tbne.w\t11564 \n \tldr.w\tr8, [r5]\n \tldr\tr3, [r5, #8]\n \tldr\tr0, [r5, #12]\n \tsubs\tr3, r3, r6\n \tsubs\tr0, r0, r4\n@@ -17382,15 +17382,15 @@\n \tsubs\tr0, #1\n \tbne.n\t113f8 \n \tcmp.w\tr8, #0\n \tbeq.n\t11442 \n \tldr\tr1, [r5, #16]\n \tmov\tr0, r8\n \tsub.w\tr1, r1, r8\n-\tblx\t4390 \n+\tblx\t4394 \n \tldrd\tr2, r3, [sp, #8]\n \tstr\tr3, [r5, #0]\n \tstr.w\tr9, [r5, #12]\n \tadd\tr2, r3\n \tmovs\tr3, #0\n \tstr\tr2, [r5, #16]\n \tstrd\tr3, r7, [r5, #4]\n@@ -17427,15 +17427,15 @@\n \tb.n\t112a8 \n \tbic.w\tr1, r1, r3\n \tstr\tr1, [r6, #0]\n \tmov\tr6, r2\n \tsub.w\tr2, r8, r6\n \tmov\tr0, r6\n \tmovs\tr1, #0\n-\tblx\t4374 \n+\tblx\t4378 \n \tcmp\tr7, #0\n \tbeq.n\t114ae \n \trsb\tr3, r7, #32\n \tmov.w\tr2, #4294967295\t; 0xffffffff\n \tldr\tr0, [r5, #8]\n \tlsrs\tr2, r3\n \tldr.w\tr3, [r8]\n@@ -17456,15 +17456,15 @@\n \tstr.w\tr2, [r8]\n \tb.n\t112a8 \n \tldr\tr3, [sp, #4]\n \tcmp\tr3, #0\n \tbne.w\t113ce \n \tsubs\tr2, r7, r0\n \tmovs\tr1, #0\n-\tblx\t4374 \n+\tblx\t4378 \n \tcmp.w\tsl, #0\n \tbeq.w\t113e0 \n \trsb\tsl, sl, #32\n \tmov.w\tr2, #4294967295\t; 0xffffffff\n \tldr\tr3, [r7, #0]\n \tlsr.w\tr2, r2, sl\n \tbic.w\tr3, r3, r2\n@@ -17500,15 +17500,15 @@\n \tmovs\tr3, #0\n \tb.n\t11372 \n \tbic.w\tr3, r3, r2\n \tstr\tr3, [r7, #0]\n \tb.n\t113e4 \n \tldr\tr0, [pc, #20]\t; (115a4 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tmovw\tr3, #65532\t; 0xfffc\n \tmovt\tr3, #4095\t; 0xfff\n \tmov\tr0, r3\n \tstr\tr3, [sp, #8]\n \tb.n\t11316 \n \tstr\tr0, [r4, r7]\n \tmovs\tr0, r0\n@@ -17528,15 +17528,15 @@\n \tldr\tr3, [r3, #0]\n \tstr\tr3, [sp, #28]\n \tmov.w\tr3, #0\n \tldr\tr3, [r0, #12]\n \tstr\tr1, [sp, #0]\n \tadd.w\tr1, r0, #16\n \tadd\tr0, sp, #20\n-\tblx\t45fc \n+\tblx\t4600 \n \tldrb.w\tr3, [sp, #20]\n \tcbnz\tr3, 1161e \n \tldr.w\tfp, [r4]\n \tldr.w\tr2, [fp, r5, lsl #2]\n \tadd.w\tr7, fp, r5, lsl #2\n \tcmp\tr2, #0\n \tbeq.n\t116b6 \n@@ -17567,66 +17567,66 @@\n \tstreq.w\tr2, [fp, #24]!\n \tstreq.w\tfp, [sp, #12]\n \tbeq.n\t11650 \n \tcmp.w\tr7, #536870912\t; 0x20000000\n \tbcs.n\t116fc \n \tlsls\tr5, r7, #2\n \tmov\tr0, r5\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr2, r5\n \tmovs\tr1, #0\n \tadd.w\tr3, r4, #24\n \tmov\tfp, r0\n \tstr\tr3, [sp, #12]\n-\tblx\t4374 \n+\tblx\t4378 \n \tldr.w\tsl, [r4, #8]\n \tmovs\tr1, #0\n \tstr\tr1, [r4, #8]\n \tcmp.w\tsl, #0\n \tbeq.n\t1168a \n \tmov\tr9, r1\n \tadd.w\tr3, r4, #8\n \tstr\tr3, [sp, #8]\n \tmov\tr5, sl\n \tmov\tr1, r7\n \tldr.w\tsl, [sl]\n \tldr\tr0, [r5, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr.w\tr0, [fp, r1, lsl #2]\n \tcbz\tr0, 116d4 \n \tldr\tr0, [r0, #0]\n \tstr\tr0, [r5, #0]\n \tldr.w\tr1, [fp, r1, lsl #2]\n \tstr\tr5, [r1, #0]\n \tcmp.w\tsl, #0\n \tbne.n\t11666 \n \tldrd\tr0, r1, [r4]\n \tldr\tr3, [sp, #12]\n \tcmp\tr3, r0\n \tbeq.n\t1169a \n \tlsls\tr1, r1, #2\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr1, r7\n \tstr\tr7, [r4, #4]\n \tmov\tr0, r8\n \tstr.w\tfp, [r4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tmov\tr5, r1\n \tadd.w\tr7, fp, r5, lsl #2\n \tldr.w\tr2, [fp, r5, lsl #2]\n \tcmp\tr2, #0\n \tbne.n\t115f2 \n \tldr\tr2, [r4, #8]\n \tstr\tr2, [r6, #0]\n \tstr\tr6, [r4, #8]\n \tldr\tr2, [r6, #0]\n \tcbz\tr2, 116cc \n \tldr\tr0, [r2, #4]\n \tldr\tr1, [r4, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tstr.w\tr6, [fp, r1, lsl #2]\n \tadd.w\tr3, r4, #8\n \tstr\tr3, [r7, #0]\n \tb.n\t115fc \n \tldr\tr0, [r4, #8]\n \tldr\tr3, [sp, #8]\n \tstr\tr0, [r5, #0]\n@@ -17641,24 +17641,24 @@\n \tb.n\t1168a \n \tmov\tr9, r1\n \tcmp.w\tsl, #0\n \tbne.n\t11666 \n \tb.n\t1168a \n \tcmp.w\tr7, #1073741824\t; 0x40000000\n \tbcc.n\t11706 \n-\tblx\t4424 \n-\tblx\t4248 \n-\tblx\t4598 <__stack_chk_fail@plt>\n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4428 \n+\tblx\t424c \n+\tblx\t459c <__stack_chk_fail@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tstr.w\tr9, [r4, #20]\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tstr\tr0, [sp, #8]\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr0, [sp, #8]\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tldrb\tr0, [r1, #9]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldrb\tr6, [r6, #7]\n \tmovs\tr1, r0\n@@ -17673,72 +17673,72 @@\n \tldr\tr3, [r4, #0]\n \tldr\tr5, [r3, #4]\n \tldrb\tr3, [r5, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr5, #1\n \tmov\tr0, r5\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr1, r0\n \tmov\tr0, r5\n \tldr\tr5, [pc, #352]\t; (118c4 )\n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tadd\tr5, pc\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tldr\tr1, [r5, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r5, #0]\n \tmov\tr6, r1\n \tldr.w\tr7, [r3, r1, lsl #2]\n \tcmp\tr7, #0\n \tbeq.n\t11822 \n \tldr\tr5, [r7, #0]\n \tmovw\tr8, #26887\t; 0x6907\n \tmovt\tr8, #50959\t; 0xc70f\n \tldr.w\tr9, [pc, #312]\t; 118c8 \n \tldr\tr0, [r4, #0]\n \tldr\tr1, [r5, #4]\n \tadd\tr9, pc\n-\tblx\t4550 \n+\tblx\t4554 \n \tcbnz\tr0, 117dc \n \tldr\tr3, [r5, #0]\n \tcmp\tr3, #0\n \tbeq.n\t11822 \n \tldr\tr3, [r3, #4]\n \tldr.w\tsl, [r9, #4]\n \tldr\tr7, [r3, #4]\n \tldrb\tr3, [r7, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr7, #1\n \tmov\tr0, r7\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, r8\n \tmov\tr1, r0\n \tmov\tr0, r7\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr6, r1\n \tbne.n\t11822 \n \tmov\tr7, r5\n \tldr\tr5, [r5, #0]\n \tldr\tr0, [r4, #0]\n \tldr\tr1, [r5, #4]\n-\tblx\t4550 \n+\tblx\t4554 \n \tcmp\tr0, #0\n \tbeq.n\t1179c \n \tldr\tr3, [r7, #0]\n \tcbz\tr3, 11822 \n \tldr\tr0, [r3, #8]\n \tcbz\tr0, 11822 \n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, pc}\n \tmov\tr0, r6\n-\tblx\t481c <__cxa_guard_acquire@plt>\n+\tblx\t4820 <__cxa_guard_acquire@plt>\n \tcmp\tr0, #0\n \tbeq.n\t1174a \n \tldr\tr0, [pc, #216]\t; (118cc )\n \tldr\tr2, [pc, #216]\t; (118d0 )\n \tadd\tr0, pc\n \tldr\tr1, [pc, #216]\t; (118d4 )\n \tadd.w\tr3, r0, #24\n@@ -17748,45 +17748,45 @@\n \tstr\tr5, [r0, #24]\n \tstr\tr3, [r0, #0]\n \tmovs\tr3, #1\n \tstr\tr5, [r0, #20]\n \tstrd\tr3, r5, [r0, #4]\n \tmov.w\tr3, #1065353216\t; 0x3f800000\n \tstr\tr3, [r0, #16]\n-\tblx\t419c <__aeabi_atexit@plt+0x4>\n+\tblx\t41a0 <__aeabi_atexit@plt+0x4>\n \tmov\tr0, r6\n-\tblx\t4350 <__cxa_guard_release@plt>\n+\tblx\t4354 <__cxa_guard_release@plt>\n \tb.n\t1174a \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldr\tr3, [r4, #0]\n \tmov\tr6, r0\n \tldr\tr5, [r3, #4]\n \tldrb\tr3, [r5, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tbeq.n\t118b8 \n \tmov\tr0, r5\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r5\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tldr\tr1, [r6, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r6, #0]\n \tmov\tr7, r1\n \tldr.w\tr8, [r3, r1, lsl #2]\n \tcmp.w\tr8, #0\n \tbeq.n\t118bc \n \tldr.w\tr5, [r8]\n \tmovw\tr9, #26887\t; 0x6907\n \tmovt\tr9, #50959\t; 0xc70f\n \tldr\tr1, [r5, #4]\n \tldr\tr0, [r4, #0]\n-\tblx\t4550 \n+\tblx\t4554 \n \tcbz\tr0, 1187e \n \tldr.w\tr3, [r8]\n \tcbz\tr3, 118bc \n \tldr\tr0, [r3, #8]\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, pc}\n \tldr\tr3, [r5, #0]\n \tcbz\tr3, 118bc \n@@ -17794,21 +17794,21 @@\n \tldr.w\tsl, [r6, #4]\n \tldr.w\tr8, [r3, #4]\n \tldrb.w\tr3, [r8]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq.w\tr8, r8, #1\n \tmov\tr0, r8\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, r9\n \tmov\tr1, r0\n \tmov\tr0, r8\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr7, r1\n \tbne.n\t118bc \n \tmov\tr8, r5\n \tldr\tr5, [r5, #0]\n \tb.n\t11868 \n \tadds\tr5, #1\n \tb.n\t11832 \n@@ -17833,40 +17833,40 @@\n \tmov\tr8, r2\n \tmov\tr6, r0\n \tmov\tr7, r1\n \tmovw\tr9, #26887\t; 0x6907\n \tmovt\tr9, #50959\t; 0xc70f\n \tldr\tr1, [r4, #4]\n \tldr.w\tr0, [r8]\n-\tblx\t4550 \n+\tblx\t4554 \n \tcbnz\tr0, 11940 \n \tldr\tr3, [r4, #0]\n \tcbz\tr3, 11946 \n \tldr\tr3, [r3, #4]\n \tldr.w\tsl, [r6, #4]\n \tldr\tr5, [r3, #4]\n \tldrb\tr3, [r5, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr5, #1\n \tmov\tr0, r5\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, r9\n \tmov\tr1, r0\n \tmov\tr0, r5\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr7, r1\n \tbne.n\t11946 \n \tmov\tr5, r4\n \tldr\tr4, [r4, #0]\n \tldr.w\tr0, [r8]\n \tldr\tr1, [r4, #4]\n-\tblx\t4550 \n+\tblx\t4554 \n \tcmp\tr0, #0\n \tbeq.n\t11900 \n \tmov\tr0, r5\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, pc}\n \tmovs\tr5, #0\n \tmov\tr0, r5\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, pc}\n@@ -17907,48 +17907,48 @@\n \tstr\tr4, [r5, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr2, sl\n \tmov\tr1, r7\n \tmov\tr0, fp\n \tstr\tr3, [sp, #4]\n-\tblx\t4460 \n+\tblx\t4464 \n \tldr\tr3, [sp, #4]\n \tcmp\tr3, #0\n \tbgt.n\t119da \n \tldr\tr1, [r5, #8]\n \tmov\tr0, r7\n \tsubs\tr1, r1, r7\n-\tblx\t4390 \n+\tblx\t4394 \n \tstrd\tfp, r8, [r5]\n \tstr\tr4, [r5, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr2, r3\n \tmov\tr1, r6\n \tmov\tr0, r9\n-\tblx\t46ec \n+\tblx\t46f0 \n \tcmp\tr7, #0\n \tbeq.n\t119a6 \n \tb.n\t119c4 \n \tmovw\tr4, #65532\t; 0xfffc\n \tmovt\tr4, #32767\t; 0x7fff\n \tmov\tr0, r4\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tfp, r0\n \tadd\tr4, r0\n \tb.n\t11984 \n \tcmp\tr4, r1\n \tit\tcs\n \tmovcs\tr4, r1\n \tlsls\tr4, r4, #2\n \tb.n\t119f2 \n \tldr\tr0, [pc, #4]\t; (11a10 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tsubs\tr5, #86\t; 0x56\n \tmovs\tr0, r0\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tmov\tr6, r1\n \tmvn.w\tr1, #3758096384\t; 0xe0000000\n \tldrd\tr7, r8, [r0]\n \tsub\tsp, #12\n@@ -17983,48 +17983,48 @@\n \tstr\tr4, [r5, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr2, sl\n \tmov\tr1, r7\n \tmov\tr0, fp\n \tstr\tr3, [sp, #4]\n-\tblx\t4460 \n+\tblx\t4464 \n \tldr\tr3, [sp, #4]\n \tcmp\tr3, #0\n \tbgt.n\t11a9e \n \tldr\tr1, [r5, #8]\n \tmov\tr0, r7\n \tsubs\tr1, r1, r7\n-\tblx\t4390 \n+\tblx\t4394 \n \tstrd\tfp, r8, [r5]\n \tstr\tr4, [r5, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr2, r3\n \tmov\tr1, r6\n \tmov\tr0, r9\n-\tblx\t46ec \n+\tblx\t46f0 \n \tcmp\tr7, #0\n \tbeq.n\t11a6a \n \tb.n\t11a88 \n \tmovw\tr4, #65532\t; 0xfffc\n \tmovt\tr4, #32767\t; 0x7fff\n \tmov\tr0, r4\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tfp, r0\n \tadd\tr4, r0\n \tb.n\t11a48 \n \tcmp\tr4, r1\n \tit\tcs\n \tmovcs\tr4, r1\n \tlsls\tr4, r4, #2\n \tb.n\t11ab6 \n \tldr\tr0, [pc, #4]\t; (11ad4 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tsubs\tr4, #146\t; 0x92\n \tmovs\tr0, r0\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tmov\tr6, r0\n \tldrd\tr8, r9, [r0]\n \tmvn.w\tr0, #4160749568\t; 0xf8000000\n \tsub\tsp, #12\n@@ -18075,43 +18075,43 @@\n \tadd\tfp, r7\n \tcmp\tr4, r9\n \tbeq.n\t11b74 \n \tsub.w\tr2, r9, r4\n \tmov\tr0, fp\n \tmov\tr1, r4\n \tadd\tfp, r2\n-\tblx\t46ec \n+\tblx\t46f0 \n \tcmp.w\tr8, #0\n \tbeq.n\t11b86 \n \tldr\tr1, [r6, #8]\n \tmov\tr0, r8\n \tsub.w\tr1, r1, r8\n-\tblx\t4390 \n+\tblx\t4394 \n \tstrd\tr7, fp, [r6]\n \tstr\tr5, [r6, #8]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmovw\tr5, #65520\t; 0xfff0\n \tmovt\tr5, #32767\t; 0x7fff\n \tmov\tr0, r5\n \tstrd\tr2, r3, [sp]\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr7, r0\n \tldrd\tr2, r3, [sp]\n \tadd\tr5, r0\n \tadd.w\tfp, r0, #16\n \tb.n\t11b0e \n \tcmp\tr5, r0\n \tit\tcs\n \tmovcs\tr5, r0\n \tlsls\tr5, r5, #4\n \tb.n\t11b9a \n \tldr\tr0, [pc, #8]\t; (11bc8 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tsubs\tr4, #98\t; 0x62\n \tmovs\tr0, r0\n \tsubs\tr3, #162\t; 0xa2\n \tmovs\tr0, r0\n \tldr\tr3, [pc, #204]\t; (11c9c )\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, lr}\n \tmov\tr5, r0\n@@ -18141,82 +18141,82 @@\n \tbeq.n\t11bfc \n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbne.n\t11bfc \n \tadds\tr4, #16\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tcmp\tr8, r4\n \tbne.n\t11c02 \n \tldr\tr3, [r5, #56]\t; 0x38\n \tcbz\tr3, 11c34 \n \tldr\tr0, [r3, #12]\n-\tblx\t41cc \n+\tblx\t41d0 \n \tldrb\tr3, [r7, #0]\n \tcbnz\tr3, 11c34 \n \tldr\tr0, [r5, #56]\t; 0x38\n \tcbz\tr0, 11c34 \n \tmovs\tr1, #16\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r5, #12]\n \tcbz\tr0, 11c4e \n \tldr\tr1, [r5, #20]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmovs\tr1, #72\t; 0x48\n \tmov\tr0, r5\n-\tblx\t4390 \n+\tblx\t4394 \n \tcbz\tr6, 11c5a \n \tmov\tr5, r6\n \tb.n\t11be8 \n \tmovs\tr1, #72\t; 0x48\n \tmov\tr0, r5\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp\tr6, #0\n \tbne.n\t11c4a \n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n \tmov\tr0, r3\n-\tblx\t481c <__cxa_guard_acquire@plt>\n+\tblx\t4820 <__cxa_guard_acquire@plt>\n \tcmp\tr0, #0\n \tbeq.n\t11be0 \n-\tblx\t44b4 \n+\tblx\t44b8 \n \tmov\tr2, r0\n \tldr\tr3, [pc, #52]\t; (11ca4 )\n \tldr\tr0, [pc, #52]\t; (11ca8 )\n \tadd\tr3, pc\n \tldrb\tr2, [r2, #4]\n \tadd\tr0, pc\n \tsub.w\tr2, r2, #48\t; 0x30\n \tclz\tr2, r2\n \tlsrs\tr2, r2, #5\n \tstrb\tr2, [r3, #0]\n-\tblx\t4350 <__cxa_guard_release@plt>\n+\tblx\t4354 <__cxa_guard_release@plt>\n \tb.n\t11be0 \n \tmov\tr4, r0\n \tldr\tr0, [pc, #28]\t; (11cac )\n \tadd\tr0, pc\n-\tblx\t4344 <__cxa_guard_abort@plt>\n+\tblx\t4348 <__cxa_guard_abort@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tldrb\tr4, [r1, #0]\n \tmovs\tr1, r0\n \tstrb\tr6, [r7, #31]\n \tmovs\tr1, r0\n \tstrb\tr2, [r6, #29]\n \tmovs\tr1, r0\n \tstrb\tr2, [r5, #29]\n \tmovs\tr1, r0\n \tstrb\tr2, [r2, #29]\n \tmovs\tr1, r0\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n \tmovs\tr0, #72\t; 0x48\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr3, r0\n \tstr\tr0, [r4, #0]\n \tmovs\tr2, #0\n \tmov\tr0, r4\n \tldrb.w\tr1, [r3, #46]\t; 0x2e\n \tstrh\tr2, [r3, #44]\t; 0x2c\n \tstrd\tr2, r2, [r3]\n@@ -18252,15 +18252,15 @@\n \tldr\tr6, [r3, r2]\n \tldr\tr3, [sp, #112]\t; 0x70\n \tstr\tr3, [sp, #16]\n \tldr\tr3, [r6, #0]\n \tstr\tr6, [sp, #56]\t; 0x38\n \tadds\tr3, #1\n \tstr\tr3, [r6, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr5, r0\n \tcmp\tr0, #0\n \tbeq.w\t11f00 \n \tstr\tr0, [sp, #52]\t; 0x34\n \tadd.w\tfp, sp, #60\t; 0x3c\n \tmovs\tr3, #0\n \tmov\tr0, fp\n@@ -18311,15 +18311,15 @@\n \tstr\tr3, [r4, #4]\n \tmovs\tr3, #2\n \tstr\tr3, [sp, #0]\n \tldr\tr3, [pc, #580]\t; (12010 )\n \tadd\tr2, pc\n \tmov\tr0, r9\n \tadd\tr3, pc\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #60]\t; 0x3c\n \tcbz\tr0, 11dde \n \tbl\t11bcc \n \tldr\tr3, [r5, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r5, #0]\n \tcmp\tr3, #0\n@@ -18358,25 +18358,25 @@\n \tldrb\tr3, [r3, #0]\n \tcmp\tr3, #0\n \tbeq.w\t11fe8 \n \tldrh\tr3, [r4, #50]\t; 0x32\n \tadds\tr3, #1\n \tstrh\tr3, [r4, #50]\t; 0x32\n \tb.n\t11db8 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t11e08 \n \tmov\tr0, r5\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr\tr3, [r6, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbne.n\t11df2 \n \tmov\tr0, r6\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t11df2 \n \tldr\tr3, [r4, #12]\n \tmvn.w\tr1, #4160749568\t; 0xf8000000\n \tstr\tr3, [sp, #28]\n \tsub.w\tr3, r9, r3\n \tstr\tr3, [sp, #32]\n \tasrs\tr3, r3, #4\n@@ -18424,22 +18424,22 @@\n \tadds\tr3, #16\n \tadd.w\tip, r3, r2\n \tldr\tr2, [sp, #28]\n \tcbz\tr2, 11ef4 \n \tsub.w\tr1, r9, r2\n \tmov\tr0, r2\n \tstr.w\tip, [sp, #20]\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr.w\tip, [sp, #20]\n \tldr\tr3, [sp, #24]\n \tstrd\tr3, ip, [r4, #12]\n \tldr\tr3, [sp, #36]\t; 0x24\n \tstr\tr3, [r4, #20]\n \tb.n\t11db0 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r6, #0]\n \tmov\tr5, r6\n \tstr\tr6, [sp, #52]\t; 0x34\n \tadds\tr3, #1\n \tstr\tr3, [r6, #0]\n \tb.n\t11d3a \n \tmovs\tr3, #0\n@@ -18473,59 +18473,59 @@\n \tcmp\tr3, r1\n \tit\tcs\n \tmovcs\tr3, r1\n \tlsls\tr3, r3, #4\n \tstr\tr3, [sp, #36]\t; 0x24\n \tmov\tr0, r3\n \tadd.w\tr9, sp, #48\t; 0x30\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [sp, #36]\t; 0x24\n \tadd.w\tip, r0, #16\n \tldr.w\tr9, [r4, #20]\n \tadd\tr3, r0\n \tstr\tr0, [sp, #24]\n \tstr\tr3, [sp, #36]\t; 0x24\n \tb.n\t11e90 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmovw\tr3, #65520\t; 0xfff0\n \tmovt\tr3, #32767\t; 0x7fff\n \tmov\tr0, r3\n \tstr\tr3, [sp, #36]\t; 0x24\n \tb.n\t11f72 \n \tldr\tr0, [pc, #124]\t; (1201c )\n \tadd.w\tr9, sp, #48\t; 0x30\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tadd.w\tr9, sp, #48\t; 0x30\n \tmov\tr4, r0\n \tb.n\t11fda \n \tmov\tr4, r0\n \tmov\tr0, r9\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tadd\tr0, sp, #56\t; 0x38\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [sp, #60]\t; 0x3c\n \tmov\tr4, r0\n \tcbz\tr3, 11fda \n \tmov\tr0, r3\n \tbl\t11bcc \n \tmov\tr0, r9\n \tbl\t10ac8 \n \tadd\tr0, sp, #52\t; 0x34\n \tbl\t10ac8 \n \tb.n\t11fc2 \n \tldr\tr0, [pc, #52]\t; (12020 )\n \tadd.w\tr9, sp, #48\t; 0x30\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tstrb\tr4, [r7, #11]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tstrb\tr4, [r6, #11]\n \tmovs\tr1, r0\n \tlsls\tr4, r2, #11\n@@ -18551,34 +18551,34 @@\n \tmov\tr8, r1\n \tldr\tr5, [r3, #4]\n \tldrb\tr3, [r5, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr5, #1\n \tmov\tr0, r5\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r5\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tldr\tr1, [r4, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r4, #0]\n \tmov\tr5, r1\n \tmov.w\tsl, r1, lsl #2\n \tldr.w\tr6, [r3, r1, lsl #2]\n \tcmp\tr6, #0\n \tbeq.n\t120dc \n \tldr\tr7, [r6, #0]\n \tmovw\tr9, #26887\t; 0x6907\n \tmovt\tr9, #50959\t; 0xc70f\n \tldr\tr1, [r7, #4]\n \tldr.w\tr0, [r8]\n-\tblx\t4550 \n+\tblx\t4554 \n \tcbz\tr0, 120e0 \n \tldr\tr3, [r4, #0]\n \tldr.w\tr8, [r6]\n \tadd.w\tr2, r3, sl\n \tldr.w\tr3, [r3, r5, lsl #2]\n \tldr.w\tr7, [r8]\n \tcmp\tr6, r3\n@@ -18588,31 +18588,31 @@\n \tldr.w\tr9, [r4, #4]\n \tldr\tr7, [r3, #4]\n \tldrb\tr3, [r7, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr7, #1\n \tmov\tr0, r7\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r7\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr5, r1\n \titt\tne\n \tldrne\tr3, [r4, #0]\n \tstrne.w\tr6, [r3, r1, lsl #2]\n \tldr.w\tr7, [r8]\n \tmovs\tr1, #12\n \tmov\tr0, r8\n \tstr\tr7, [r6, #0]\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [r4, #12]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #12]\n \tldmia.w\tsp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tldr\tr3, [r7, #0]\n \tcmp\tr3, #0\n \tbeq.n\t120dc \n@@ -18620,43 +18620,43 @@\n \tldr.w\tfp, [r4, #4]\n \tldr\tr6, [r3, #4]\n \tldrb\tr3, [r6, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr6, #1\n \tmov\tr0, r6\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, r9\n \tmov\tr1, r0\n \tmov\tr0, r6\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, fp\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr5, r1\n \tbne.n\t120dc \n \tmov\tr6, r7\n \tldr\tr7, [r7, #0]\n \tb.n\t1206e \n \tcbz\tr7, 1215c \n \tldr\tr3, [r7, #4]\n \tldr.w\tfp, [r4, #4]\n \tldr.w\tr9, [r3, #4]\n \tldrb.w\tr3, [r9]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq.w\tr9, r9, #1\n \tmov\tr0, r9\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r9\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, fp\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr5, r1\n \tbeq.n\t120c8 \n \tldr\tr0, [r4, #0]\n \tadd.w\tr2, r0, sl\n \tldr.w\tr3, [r0, r5, lsl #2]\n \tstr.w\tr3, [r0, r1, lsl #2]\n \tadd.w\tr1, r4, #8\n@@ -18671,15 +18671,15 @@\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n \tmov\tr7, r0\n \tmov\tr6, r1\n \tsub\tsp, #12\n \tmov\tr0, r1\n \tldr.w\tfp, [r7, #4]\n \tmov\tr1, fp\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r7, #0]\n \tstr\tr3, [sp, #4]\n \tldr.w\tsl, [r3, r1, lsl #2]\n \tcmp.w\tsl, #0\n \tbeq.n\t121bc \n \tldr.w\tr4, [sl]\n \tmov\tr8, r1\n@@ -18690,49 +18690,49 @@\n \tbeq.n\t121c2 \n \tldr\tr3, [r4, #0]\n \tmov\tr9, r4\n \tmov\tr4, r3\n \tcbz\tr3, 121bc \n \tldr\tr5, [r3, #4]\n \tmov\tr0, r5\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr8, r1\n \tbeq.n\t121a2 \n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tldr\tr5, [r4, #0]\n \tcmp\tsl, r9\n \tbeq.n\t12202 \n \tcbz\tr5, 121de \n \tldr\tr0, [r5, #4]\n \tmov\tr1, fp\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr8, r1\n \tittt\tne\n \tldrne\tr3, [sp, #4]\n \tstrne.w\tr9, [r3, r1, lsl #2]\n \tldrne\tr5, [r4, #0]\n \tldr\tr0, [r4, #8]\n \tstr.w\tr5, [r9]\n \tcbz\tr0, 121ee \n \tldr\tr1, [r4, #16]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tmovs\tr1, #20\n \tmov\tr0, r4\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [r7, #12]\n \tsubs\tr3, #1\n \tstr\tr3, [r7, #12]\n \tadd\tsp, #12\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tcbz\tr5, 12230 \n \tldr\tr0, [r5, #4]\n \tmov\tr1, fp\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr8, r1\n \tbeq.n\t121de \n \tldr\tr3, [sp, #4]\n \tstr.w\tr9, [r3, r1, lsl #2]\n \tldr.w\tr3, [r3, r8, lsl #2]\n \tadd.w\tr2, r7, #8\n \tcmp\tr3, r2\n@@ -18742,15 +18742,15 @@\n \tmovs\tr3, #0\n \tstr.w\tr3, [r2, r8, lsl #2]\n \tldr\tr5, [r4, #0]\n \tb.n\t121de \n \tmov\tr3, r9\n \tb.n\t1221a \n \tstmdb\tsp!, {r3, r4, r5, r6, r7, r8, r9, lr}\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldrd\tr5, r3, [r0, #200]\t; 0xc8\n \tcmp\tr5, r3\n \tbeq.n\t122e4 \n \tmov\tr4, r0\n \tldr.w\tr0, [r3, #-4]!\n \tstr.w\tr3, [r4, #204]\t; 0xcc\n \tcbz\tr0, 12258 \n@@ -18765,57 +18765,57 @@\n \tldr.w\tr7, [r4, #204]\t; 0xcc\n \tcmp\tr7, r5\n \tbeq.n\t12282 \n \tsub.w\tr9, r7, r5\n \tasrs\tr0, r0, #2\n \tmov.w\tr8, r9, asr #2\n \tmov\tr1, r8\n-\tblx\t46bc <__aeabi_uidiv@plt>\n+\tblx\t46c0 <__aeabi_uidiv@plt>\n \tcmp\tr6, r7\n \tit\tne\n \tcmpne\tr0, #2\n \tbhi.n\t12290 \n \tldmia.w\tsp!, {r3, r4, r5, r6, r7, r8, r9, pc}\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr.w\tr5, [r4, #200]\t; 0xc8\n \tb.n\t12258 \n \tmovw\tr3, #65532\t; 0xfffc\n \tmovt\tr3, #32767\t; 0x7fff\n \tcmp\tr9, r3\n \tbhi.n\t122dc \n \tcmp.w\tr8, #0\n \tbeq.n\t122d8 \n \tmov\tr0, r9\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr3, r0\n \tmov\tr1, r5\n \tmov\tr0, r3\n \tmov\tr2, r9\n \tadd.w\tr5, r3, r9\n-\tblx\t46ec \n+\tblx\t46f0 \n \tmov\tr3, r0\n \tldr.w\tr0, [r4, #200]\t; 0xc8\n \tldr.w\tr1, [r4, #208]\t; 0xd0\n \tstrd\tr3, r5, [r4, #200]\t; 0xc8\n \tstr.w\tr5, [r4, #208]\t; 0xd0\n \tcmp\tr0, #0\n \tbeq.n\t12282 \n \tldmia.w\tsp!, {r3, r4, r5, r6, r7, r8, r9, lr}\n \tsubs\tr1, r1, r0\n-\tb.w\t438c \n+\tb.w\t4390 \n \tmov\tr3, r8\n \tb.n\t122aa \n \tldr\tr0, [pc, #24]\t; (122f8 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tldr\tr0, [pc, #20]\t; (122fc )\n \tadd\tr0, pc\n-\tbl\t4910 \n-\tblx\t4284 <__cxa_begin_catch@plt>\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tbl\t4910 \n+\tblx\t4288 <__cxa_begin_catch@plt>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\t12282 \n \tnop\n \tadds\tr6, #22\n \tmovs\tr0, r0\n \tadd\tsl, r5\n \tmovs\tr0, r0\n \tldr\tr2, [pc, #64]\t; (12344 )\n@@ -18842,15 +18842,15 @@\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #4]\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\t12340 \n \tadd\tsp, #12\n \tpop\t{r4, r5, pc}\n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr\tr6, [r6, #76]\t; 0x4c\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldr\tr4, [r2, #76]\t; 0x4c\n \tmovs\tr1, r0\n \tstmdb\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}\n@@ -18905,15 +18905,15 @@\n \tcmp\tr5, r4\n \tbne.n\t123b2 \n \tldr\tr3, [r6, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbeq.w\t125e8 \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldrd\tr3, r4, [sp, #32]\n \tstr\tr3, [sp, #4]\n \tstr\tr0, [sp, #12]\n \tsubs\tr3, r4, r3\n \tstr\tr3, [sp, #8]\n \tmovs.w\tfp, r3, asr #2\n \tbeq.n\t1246a \n@@ -18929,15 +18929,15 @@\n \tldr\tr3, [r3, #84]\t; 0x54\n \tcmp\tr3, #0\n \tbge.n\t12498 \n \tldr\tr6, [sp, #12]\n \tmov\tr0, r5\n \tldr.w\tsl, [r6, #32]\n \tmov\tr1, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tmov\tr3, r1\n \tldr\tr1, [r6, #28]\n \tldr.w\tr1, [r1, r3, lsl #2]\n \tcbz\tr1, 12454 \n \tldr\tr6, [r1, #0]\n \tstr.w\tfp, [sp, #16]\n \tmov\tfp, sl\n@@ -18948,15 +18948,15 @@\n \tcmp\tsl, r5\n \tbeq.n\t1249c \n \tldr\tr6, [r6, #0]\n \tcbz\tr6, 1244e \n \tldr\tr5, [r6, #4]\n \tmov\tr1, fp\n \tmov\tr0, r5\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr8, r1\n \tbeq.n\t12438 \n \tldr.w\tfp, [sp, #16]\n \tmov\tr5, sl\n \tldr.w\tr5, [r5, #168]\t; 0xa8\n \tadds\tr6, r7, #1\n \tcmp\tr5, #0\n@@ -18967,15 +18967,15 @@\n \tcmp\tfp, r7\n \tbhi.n\t12400 \n \tldr\tr3, [sp, #4]\n \tcbz\tr3, 12478 \n \tldr\tr1, [sp, #40]\t; 0x28\n \tmov\tr0, r3\n \tsubs\tr1, r1, r3\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr2, [pc, #448]\t; (1263c )\n \tldr\tr3, [pc, #444]\t; (12638 )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n \tldr\tr3, [sp, #44]\t; 0x2c\n \teors\tr2, r3\n@@ -19030,15 +19030,15 @@\n \tcmp\tr3, #0\n \tbeq.n\t125dc \n \tcmp\tr3, r1\n \tit\tcs\n \tmovcs\tr3, r1\n \tmov.w\tsl, r3, lsl #2\n \tmov\tr0, sl\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr3, r0\n \tadd.w\tr2, r0, sl\n \tstr\tr2, [sp, #4]\n \tadd.w\tsl, fp, #4\n \tcmp.w\tfp, #0\n \tadd\tsl, r3\n \tstr.w\tr4, [r3, fp]\n@@ -19102,50 +19102,50 @@\n \tstr\tr3, [sp, #4]\n \tsubs\tr3, r4, r3\n \tstr\tr3, [sp, #8]\n \tb.n\t12460 \n \tmov\tr1, r6\n \tmov\tr0, r3\n \tmov\tr2, fp\n-\tblx\t4460 \n+\tblx\t4464 \n \tldr.w\tr1, [r9, #8]\n \tmov\tr3, r0\n \tsubs\tr1, r1, r6\n \tmov\tr0, r6\n \tstr\tr3, [sp, #8]\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr3, [sp, #8]\n \tb.n\t12534 \n \tstr\tr3, [sp, #4]\n \tb.n\t12520 \n \tmov\tr0, r5\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t125b0 \n \tmov\tr0, r6\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t123d8 \n \tldr.w\tr1, [r9, #8]\n \tsubs\tr1, r1, r6\n \tb.n\t125d0 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr.w\tsl, [sp, #20]\n \tb.n\t12512 \n \tldr\tr0, [pc, #60]\t; (12640 )\n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tmov\tr4, r0\n \tadd\tr0, sp, #24\n \tbl\t10ac8 \n \tldr\tr0, [sp, #32]\n \tldr\tr1, [sp, #40]\t; 0x28\n \tsubs\tr1, r1, r0\n \tcbz\tr0, 1261e \n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tadd\tr0, sp, #24\n \tbl\t10ac8 \n \tb.n\t12612 \n \tmov\tr4, r0\n \tb.n\t12612 \n \tnop\n@@ -19171,44 +19171,44 @@\n \tmov.w\tr3, #0\n \tcmp\tr4, #0\n \tbeq.n\t12734 \n \tldr.w\tr8, [r1, #4]\n \tldr\tr3, [r4, #0]\n \tcmp\tr8, r3\n \tbeq.n\t12734 \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr7, r0\n \tstr\tr0, [sp, #12]\n \tmovs\tr0, #20\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr9, r0\n \tldr.w\tfp, [r7, #32]\n \tmovs\tr3, #0\n \tstr.w\tr8, [r0, #4]\n \tmov\tr0, r8\n \tstr.w\tr3, [r9]\n \tmov\tr1, fp\n \tstrd\tr3, r3, [r9, #8]\n \tstr.w\tr3, [r9, #16]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tmov\tr3, r1\n \tldr\tr1, [r7, #28]\n \tldr.w\tr1, [r1, r3, lsl #2]\n \tcbz\tr1, 126c8 \n \tldr\tr7, [r1, #0]\n \tldr.w\tsl, [r7, #4]\n \tcmp\tr8, sl\n \tbeq.n\t12764 \n \tldr\tr7, [r7, #0]\n \tcbz\tr7, 126c8 \n \tldr.w\tsl, [r7, #4]\n \tmov\tr1, fp\n \tstr\tr3, [sp, #8]\n \tmov\tr0, sl\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [sp, #8]\n \tcmp\tr3, r1\n \tbeq.n\t126ac \n \tldr\tr0, [sp, #12]\n \tmov\tr1, r3\n \tmov\tr2, r8\n \tmov\tr3, r9\n@@ -19230,21 +19230,21 @@\n \tstr\tr2, [r3, #24]\n \tmovs\tr3, #1\n \tldr\tr2, [pc, #328]\t; (12848 )\n \tstr\tr3, [sp, #0]\n \tldr\tr3, [pc, #328]\t; (1284c )\n \tadd\tr2, pc\n \tadd\tr3, pc\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #24]\n \tcbz\tr0, 12712 \n \tbl\t11bcc \n \tldr\tr1, [sp, #20]\n \tmov\tr0, r8\n-\tblx\t4568 \n+\tblx\t456c \n \tstr\tr0, [sp, #24]\n \tcmp\tr0, #0\n \tbeq.n\t127e4 \n \tmov\tr0, r9\n \tbl\t10ac8 \n \tldr.w\tr0, [r8, #168]\t; 0xa8\n \tadd.w\tr1, r7, #8\n@@ -19269,15 +19269,15 @@\n \tmov.w\tr3, #0\n \tbne.n\t127e0 \n \tmov\tr0, r6\n \tadd\tsp, #36\t; 0x24\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}\n \tmov\tr0, r9\n \tmovs\tr1, #20\n-\tblx\t4390 \n+\tblx\t4394 \n \tldrd\tr1, r0, [r7, #8]\n \tldrb\tr3, [r5, #24]\n \tcmp\tr1, r0\n \tsub.w\tr0, r0, r1\n \tit\teq\n \tmoveq\tr2, #0\n \tubfx\tr3, r3, #1, #1\n@@ -19318,47 +19318,47 @@\n \tbeq.n\t12832 \n \tmovs\tr2, #0\n \tcmp\tr4, r2\n \tbne.n\t127be \n \tb.n\t127aa \n \tldr\tr2, [r1, #0]\n \tb.n\t127ba \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tldr\tr0, [pc, #108]\t; (12854 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n \tb.n\t127f8 \n \tmov\tr4, r0\n \tmov\tr0, sl\n \tbl\t10ac8 \n \tmov\tr0, r9\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr3, [sp, #24]\n \tmov\tr4, r0\n \tcbz\tr3, 12810 \n \tmov\tr0, r3\n \tbl\t11bcc \n \tmov\tr0, r9\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tadd.w\tr9, sp, #20\n \tmov\tr4, r0\n \tb.n\t12810 \n \tmov\tr4, r0\n \tmov\tr0, r9\n-\tbl\t4b78 \n+\tbl\t4b78 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr0, [pc, #36]\t; (12858 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tnop\n \tldr\tr4, [r5, #24]\n \tmovs\tr1, r0\n \tlsls\tr0, r7, #10\n \tmovs\tr0, r0\n \tldr\tr4, [sp, #972]\t; 0x3cc\n \tvqshlu.s32\t, q3, #31\n@@ -19369,62 +19369,62 @@\n \tmovs\tr1, r0\n \tadds\tr3, #6\n \tmovs\tr0, r0\n \tsubs\tr7, #128\t; 0x80\n \tmovs\tr0, r0\n \tpush\t{r4, lr}\n \tmov\tr4, r0\n-\tbl\t7ce0 \n+\tbl\t7ce0 \n \tldrb\tr3, [r4, #4]\n \tcbnz\tr3, 1286a \n \tpop\t{r4, pc}\n-\tblx\t46c8 \n+\tblx\t46cc \n \tpop\t{r4, pc}\n \tpush\t{r4, r5, r6, lr}\n \tmov\tr4, r0\n \tmovs\tr2, #0\n \tmovw\tr3, #257\t; 0x101\n \tstr\tr2, [r0, #0]\n \tstrh\tr3, [r0, #4]\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr5, r0\n \tldr.w\tr0, [r0, #228]\t; 0xe4\n-\tblx\t44d8 \n+\tblx\t44dc \n \tstr\tr0, [r4, #0]\n \tcbz\tr0, 128b8 \n-\tblx\t47c8 <_PyThreadState_UncheckedGet@plt>\n+\tblx\t47cc <_PyThreadState_UncheckedGet@plt>\n \tldr\tr3, [r4, #0]\n \tsubs\tr0, r3, r0\n \tit\tne\n \tmovne\tr0, #1\n \tstrb\tr0, [r4, #4]\n \tcbnz\tr0, 128a8 \n \tldr\tr2, [r3, #88]\t; 0x58\n \tadds\tr2, #1\n \tstr\tr2, [r3, #88]\t; 0x58\n \tpop\t{r4, r5, r6, pc}\n \tmov\tr0, r3\n-\tblx\t41e4 \n+\tblx\t41e8 \n \tldr\tr3, [r4, #0]\n \tldr\tr2, [r3, #88]\t; 0x58\n \tadds\tr2, #1\n \tstr\tr2, [r3, #88]\t; 0x58\n \tpop\t{r4, r5, r6, pc}\n-\tblx\t4208 \n+\tblx\t420c \n \tmov\tr6, r0\n \tstr\tr0, [r4, #0]\n \tcmp\tr0, #0\n \tbne.n\t12890 \n \tldr.w\tr0, [r5, #232]\t; 0xe8\n-\tblx\t47a4 \n+\tblx\t47a8 \n \tmov\tr1, r0\n \tldr.w\tr0, [r5, #228]\t; 0xe4\n \tstr\tr1, [r4, #0]\n \tstr\tr6, [r1, #88]\t; 0x58\n-\tblx\t468c \n+\tblx\t4690 \n \tldrb\tr0, [r4, #4]\n \tldr\tr3, [r4, #0]\n \tb.n\t1289e \n \tstmdb\tsp!, {r4, r5, r6, r7, r8, lr}\n \tldr\tr5, [r2, #0]\n \tldr\tr2, [pc, #256]\t; (129e8 )\n \tsub\tsp, #16\n@@ -19440,25 +19440,25 @@\n \tldr\tr3, [r5, #0]\n \tmov\tr6, r0\n \tmovs\tr0, #1\n \tmov\tr7, r1\n \tadds\tr3, #1\n \tstr\tr3, [r5, #0]\n \tstr\tr5, [sp, #8]\n-\tblx\t42a8 \n+\tblx\t42ac \n \tmov\tr4, r0\n \tstr\tr0, [sp, #4]\n \tcmp\tr0, #0\n \tbeq.n\t129a4 \n \tmov\tr0, r7\n \tstr\tr5, [r4, #12]\n \tbl\tff14 \n \tldr\tr0, [r0, #0]\n \tmov\tr1, r4\n-\tblx\t439c \n+\tblx\t43a0 \n \tcbz\tr0, 12988 \n \tldr\tr3, [r4, #0]\n \tstr\tr0, [r6, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcbz\tr3, 12952 \n \tldr\tr2, [pc, #188]\t; (129f4 )\n@@ -19470,65 +19470,65 @@\n \teors\tr2, r3\n \tmov.w\tr3, #0\n \tbne.n\t1295a \n \tmov\tr0, r6\n \tadd\tsp, #16\n \tldmia.w\tsp!, {r4, r5, r6, r7, r8, pc}\n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t12936 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmovs\tr0, #8\n \tstr\tr5, [sp, #8]\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #144]\t; (129f8 )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #136]\t; (129fc )\n \tmov\tr0, r5\n \tldr\tr1, [pc, #136]\t; (12a00 )\n \tadd\tr3, pc\n \tldr\tr2, [pc, #136]\t; (12a04 )\n \tadds\tr3, #8\n \tstr\tr3, [r5, #0]\n \tadd\tr2, pc\n \tldr.w\tr1, [r8, r1]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #112]\t; (12a08 )\n \tmov\tr0, r5\n \tldr\tr2, [pc, #112]\t; (12a0c )\n \tadd\tr2, pc\n \tldr.w\tr1, [r8, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tldr\tr0, [pc, #104]\t; (12a10 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n \tb.n\t129d0 \n \tmov\tr4, r0\n \tb.n\t129bc \n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tadd\tr0, sp, #8\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tadd\tr0, sp, #4\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tadd\tr0, sp, #4\n \tbl\t10ac8 \n \tb.n\t129bc \n \tnop\n \tstr\tr0, [r2, #112]\t; 0x70\n \tmovs\tr1, r0\n@@ -19562,44 +19562,44 @@\n \tcbz\tr3, 12a2e \n \tldr\tr2, [r3, #0]\n \tadds\tr2, #1\n \tstr\tr2, [r3, #0]\n \tmov\tr0, r5\n \tpop\t{r4, r5, r6, pc}\n \tldrd\tr0, r1, [r1, #4]\n-\tblx\t4214 \n+\tblx\t4218 \n \tcbz\tr0, 12a56 \n \tldr\tr3, [r4, #12]\n \tstr\tr0, [r4, #12]\n \tcmp\tr3, #0\n \tbeq.n\t12a22 \n \tldr\tr2, [r3, #0]\n \tsubs\tr2, #1\n \tstr\tr2, [r3, #0]\n \tcmp\tr2, #0\n \tbne.n\t12a22 \n \tmov\tr0, r3\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t12a22 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #32]\t; (12a84 )\n \tmov\tr0, r4\n \tldr\tr2, [pc, #32]\t; (12a88 )\n \tadd\tr2, pc\n \tldr\tr1, [r6, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr3, r0\n \tmov\tr0, r4\n \tmov\tr4, r3\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tstr\tr6, [r3, #92]\t; 0x5c\n \tmovs\tr1, r0\n \tlsls\tr4, r4, #10\n \tmovs\tr0, r0\n \tldrb\tr5, [r3, #12]\n \tvsli.32\td27, d24, #31\n \tmov\tr5, r0\n@@ -19625,42 +19625,42 @@\n \tldr\tr2, [r2, #36]\t; 0x24\n \tcbz\tr2, 12ac6 \n \tblx\tr2\n \tcmp\tr0, #1\n \tit\tls\n \tandls.w\tr0, r0, #1\n \tbls.n\t12af2 \n-\tblx\t4508 \n+\tblx\t450c \n \tmovs\tr0, #8\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tldr\tr1, [pc, #72]\t; (12b1c )\n \tmov\tr5, r0\n \tadd\tr1, pc\n-\tblx\t4864 \n+\tblx\t4868 \n \tldr\tr3, [pc, #68]\t; (12b20 )\n \tmov\tr0, r5\n \tldr\tr1, [pc, #68]\t; (12b24 )\n \tadd\tr3, pc\n \tldr\tr2, [pc, #68]\t; (12b28 )\n \tadds\tr3, #8\n \tstr\tr3, [r5, #0]\n \tadd\tr2, pc\n \tldr\tr1, [r4, r1]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmovs\tr0, #0\n \tstrb\tr0, [r5, #0]\n \tpop\t{r3, r4, r5, pc}\n \tmovs\tr0, #1\n \tstrb\tr0, [r5, #0]\n \tpop\t{r3, r4, r5, pc}\n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tnop\n \tstr\tr0, [r5, #84]\t; 0x54\n \tmovs\tr1, r0\n \tlsls\tr4, r5, #10\n \tmovs\tr0, r0\n \tlsls\tr4, r2, #13\n \tmovs\tr0, r0\n@@ -19693,15 +19693,15 @@\n \tcmp\tr0, #0\n \tbne.n\t12b4c \n \tcmp\tr2, #1\n \tdmb\tish\n \tbeq.n\t12b70 \n \tmovs\tr1, #28\n \tmov\tr0, r6\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp\tr4, #0\n \tbne.n\t12b38 \n \tpop\t{r3, r4, r5, r6, r7, pc}\n \tldr\tr3, [r5, #0]\n \tmov\tr0, r5\n \tldr\tr3, [r3, #8]\n \tblx\tr3\n@@ -19743,24 +19743,24 @@\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcbz\tr3, 12bec \n \tldr\tr0, [r4, #16]\n \tcbz\tr0, 12bdc \n \tldr\tr1, [r4, #32]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [r4, #4]\n \tcbz\tr0, 12bf8 \n \tldr\tr1, [r4, #12]\n \tldmia.w\tsp!, {r4, lr}\n \tsubs\tr1, r1, r0\n-\tb.w\t438c \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tb.w\t4390 \n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t12bd0 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t12bc4 \n \tpop\t{r4, pc}\n \tnop\n \tmov\tr3, r1\n \tpush\t{r4, r5, lr}\n \tadd.w\tr4, r0, #8\n \tstr\tr4, [r0, #0]\n@@ -19800,44 +19800,44 @@\n \tldr\tr3, [r3, #0]\n \tstr\tr3, [sp, #212]\t; 0xd4\n \tmov.w\tr3, #0\n \tcbz\tr0, 12c7c \n \tldr.w\tr4, [pc, #3024]\t; 1383c \n \tadd\tr4, pc\n \tmov\tr1, r4\n-\tblx\t452c \n+\tblx\t4530 \n \tcmp\tr0, #1\n \tbeq.w\t1332a \n \tadd\tr3, sp, #76\t; 0x4c\n \tvmov\ts16, r3\n \tldrb.w\tr3, [r5, #48]\t; 0x30\n \tldr\tr4, [r5, #8]\n \tstr\tr4, [sp, #76]\t; 0x4c\n \tlsls\tr1, r3, #27\n \tbmi.w\t1309c \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr3, r0\n \tldr\tr0, [r4, #4]\n \tmov\tr4, r3\n \tbl\t11164 \n \tldr\tr1, [r4, #4]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tvmov\tr2, s16\n \tmov\tr0, r4\n \tbl\t118d8 \n \tcmp\tr0, #0\n \tbeq.w\t13260 \n \tldr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbeq.w\t13260 \n \tldr\tr3, [r3, #8]\n \tldr\tr0, [r5, #4]\n \tcmp\tr3, #0\n \tbne.w\t13954 \n-\tblx\t4490 \n+\tblx\t4494 \n \tmov\tr6, r0\n \tmov\tsl, r0\n \tstrd\tr0, r0, [sp, #40]\t; 0x28\n \tcbz\tr0, 12cda \n \tldr\tr3, [r0, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r0, #0]\n@@ -19846,45 +19846,45 @@\n \tbeq.w\t13230 \n \tldr.w\tr2, [pc, #2908]\t; 13840 \n \tldr\tr1, [sp, #16]\n \tldr\tr0, [r3, #4]\n \tldr\tr1, [r1, r2]\n \tcmp\tr0, r1\n \tbeq.w\t1321e \n-\tblx\t4278 \n+\tblx\t427c \n \tldr\tr3, [r5, #0]\n \tcmp\tr0, #0\n \tbeq.w\t13660 \n \tmovs\tr2, #0\n \tstr\tr2, [sp, #48]\t; 0x30\n \tcbz\tr3, 12d2a \n \tldr.w\tr1, [pc, #2876]\t; 13844 \n \tmov\tr0, r3\n \tadd\tr1, pc\n-\tblx\t452c \n+\tblx\t4530 \n \tldr\tr3, [r5, #0]\n \tcmp\tr0, #1\n \tbeq.w\t13570 \n \tldr.w\tr1, [pc, #2860]\t; 13848 \n \tmov\tr0, r3\n \tadd\tr1, pc\n-\tblx\t452c \n+\tblx\t4530 \n \tcmp\tr0, #1\n \tbeq.w\t1379c \n \tadd\tr3, sp, #188\t; 0xbc\n \tldr\tr1, [r5, #4]\n \tmov\tr0, r3\n \tvmov\ts17, r3\n \tbl\t11030 \n \tmov.w\tr9, #0\n \tmov\tr4, r9\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tmov\tr7, r0\n \tmovs\tr0, #28\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr8, r0\n \tmovs\tr3, #0\n \tvmov\tr1, s17\n \tstr.w\tr3, [r0], #4\n \tbl\t12bfc \n \tldr.w\tr3, [r7, #212]\t; 0xd4\n \tldr\tr0, [sp, #188]\t; 0xbc\n@@ -19894,59 +19894,59 @@\n \tadd\tr3, sp, #196\t; 0xc4\n \tcmp\tr0, r3\n \tstr.w\tr8, [r7, #212]\t; 0xd4\n \tstr\tr3, [sp, #20]\n \tbeq.n\t12d7e \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tcbz\tr4, 12da8 \n \tldr\tr0, [sp, #164]\t; 0xa4\n \tadd\tr3, sp, #172\t; 0xac\n \tcmp\tr0, r3\n \tbeq.n\t12d90 \n \tldr\tr1, [sp, #172]\t; 0xac\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #140]\t; 0x8c\n \tadd\tr3, sp, #148\t; 0x94\n \tcmp\tr0, r3\n \tbeq.n\t12da0 \n \tldr\tr1, [sp, #148]\t; 0x94\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tldr.w\tfp, [r5, #40]\t; 0x28\n \tcmp.w\tfp, #0\n \tbeq.n\t12dca \n \tmov\tr0, fp\n-\tblx\t4710 \n+\tblx\t4714 \n \tadds\tr4, r0, #1\n \tmov\tr0, r4\n-\tblx\t484c \n+\tblx\t4850 \n \tldr\tr1, [r5, #40]\t; 0x28\n \tmov\tr2, r4\n \tmov\tfp, r0\n-\tblx\t46ec \n-\tbl\t64e8 \n+\tblx\t46f0 \n+\tbl\t64e8 \n \tldr\tr7, [r5, #36]\t; 0x24\n \tmov\tr4, r0\n \tcmp\tr7, #0\n \tbeq.w\t130fe \n \tldr\tr3, [r7, #4]\n \tldr\tr3, [r3, #84]\t; 0x54\n \tlsls\tr3, r3, #5\n \tbpl.w\t130fe \n \tldr\tr3, [r7, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r7, #0]\n \tstr\tr7, [sp, #52]\t; 0x34\n \tmov\tr0, r7\n-\tblx\t4338 \n+\tblx\t433c \n \tcmp\tr0, #0\n \tbne.w\t132d4 \n \tldr\tr0, [r5, #44]\t; 0x2c\n \tldr.w\tr8, [r4, #224]\t; 0xe0\n \tcmp\tr0, #0\n \tbeq.w\t13312 \n \tldr.w\tr3, [r0, #152]\t; 0x98\n@@ -19970,15 +19970,15 @@\n \tstr.w\tsl, [r4, #428]\t; 0x1ac\n \tadds\tr3, #1\n \tstr.w\tfp, [r4, #88]\t; 0x58\n \tstr.w\tr3, [r8]\n \tmovs\tr3, #28\n \tstr.w\tr8, [r4, #128]\t; 0x80\n \tstr\tr3, [r4, #16]\n-\tblx\t4338 \n+\tblx\t433c \n \tcbz\tr0, 12e58 \n \tmovs\tr3, #0\n \tstr\tr3, [sp, #52]\t; 0x34\n \tstr.w\tr7, [r4, #168]\t; 0xa8\n \tldrb.w\tr2, [r5, #48]\t; 0x30\n \tadd.w\tr0, r4, #216\t; 0xd8\n \tldr\tr1, [r4, #84]\t; 0x54\n@@ -20026,49 +20026,49 @@\n \tstr.w\tr3, [r4, #412]\t; 0x19c\n \tldr.w\tr3, [pc, #2440]\t; 13860 \n \tadd\tr3, pc\n \tstr.w\tr3, [r4, #416]\t; 0x1a0\n \tadd.w\tr3, r4, #412\t; 0x19c\n \tstr\tr3, [r4, #80]\t; 0x50\n \tmov\tr0, r4\n-\tblx\t46b0 \n+\tblx\t46b4 \n \tcmp\tr0, #0\n \tblt.w\t1390a \n \tldr\tr0, [r5, #0]\n \tcmp\tr0, #0\n \tbeq.w\t13216 \n \tldr\tr1, [r5, #4]\n \tmov\tr2, r4\n-\tblx\t4638 \n+\tblx\t463c \n \tcmp\tr0, #0\n \tbne.w\t13c24 \n \tcmp.w\tr9, #0\n \tbeq.n\t12f22 \n \tldr.w\tr1, [pc, #2388]\t; 13864 \n \tmov\tr2, r9\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tblx\t4638 \n+\tblx\t463c \n \tcmp\tr0, #0\n \tbne.w\t13c40 \n \tadd.w\tfp, sp, #52\t; 0x34\n \tmov\tr0, fp\n \tbl\t10ac8 \n \tadd\tr0, sp, #48\t; 0x30\n \tbl\t10ac8 \n \tadd\tr0, sp, #44\t; 0x2c\n \tbl\t10ac8 \n \tldr\tr3, [sp, #12]\n \tmovs\tr0, #76\t; 0x4c\n \tstr\tr4, [r3, #0]\n-\tblx\t415c \n+\tblx\t4160 \n \tmovs\tr2, #76\t; 0x4c\n \tmovs\tr1, #0\n \tmov\tr6, r0\n-\tblx\t4374 \n+\tblx\t4378 \n \tldr\tr3, [r5, #20]\n \tldrb.w\tr2, [r5, #48]\t; 0x30\n \tsubs\tr3, #1\n \tstr\tr4, [r6, #0]\n \tlsrs\tr3, r3, #2\n \tadds\tr3, #1\n \tstr\tr3, [r6, #16]\n@@ -20086,33 +20086,33 @@\n \tstr\tr3, [r6, #8]\n \tldr\tr3, [r5, #24]\n \tstr\tr3, [r6, #20]\n \tldr\tr3, [r5, #28]\n \tstr\tr3, [r6, #24]\n \tldr\tr3, [r5, #32]\n \tstr\tr3, [r6, #28]\n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldr\tr3, [r5, #8]\n \tstr\tr3, [sp, #52]\t; 0x34\n \tstr\tr0, [sp, #8]\n \tldr\tr7, [r3, #4]\n \tldrb\tr3, [r7, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tbeq.w\t13318 \n \tmov\tr0, r7\n-\tblx\t4710 \n+\tblx\t4714 \n \tmovw\tr2, #26887\t; 0x6907\n \tmovt\tr2, #50959\t; 0xc70f\n \tmov\tr1, r0\n \tmov\tr0, r7\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tldr\tr4, [sp, #8]\n \tstr\tr0, [sp, #28]\n \tldr\tr1, [r4, #116]\t; 0x74\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r4, #112]\t; 0x70\n \tldr.w\tr9, [r3, r1, lsl #2]\n \tlsls\tr3, r1, #2\n \tstr\tr3, [sp, #20]\n \tcmp.w\tr9, #0\n \tbeq.w\t13268 \n \tmovw\tsl, #26887\t; 0x6907\n@@ -20121,15 +20121,15 @@\n \tldr.w\tr7, [r9]\n \tmov\tr8, r4\n \tmov\tsl, r1\n \tmov\tr4, r9\n \tmov\tr9, r3\n \tldr\tr1, [r7, #4]\n \tldr\tr0, [sp, #52]\t; 0x34\n-\tblx\t4550 \n+\tblx\t4554 \n \tcmp\tr0, #0\n \tbeq.n\t130c0 \n \tldr\tr3, [r4, #0]\n \tstr.w\tr8, [sp, #8]\n \tcmp\tr3, #0\n \tbeq.w\t13268 \n \tadds\tr3, #8\n@@ -20150,15 +20150,15 @@\n \tstr\tr6, [r0, #0]\n \tldr\tr3, [sp, #12]\n \tldr\tr4, [sp, #8]\n \tldr.w\tsl, [r3]\n \tldr.w\tfp, [r4, #32]\n \tmov\tr0, sl\n \tmov\tr1, fp\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr3, [r4, #28]\n \tmov\tr9, r1\n \tmov\tr2, r4\n \tldr.w\tr3, [r3, r1, lsl #2]\n \tcbz\tr3, 13072 \n \tldr\tr7, [r3, #0]\n \tldr.w\tr8, [r7, #4]\n@@ -20167,21 +20167,21 @@\n \tcmp\tsl, r4\n \tbeq.n\t1312e \n \tldr\tr7, [r7, #0]\n \tcbz\tr7, 1306e \n \tldr\tr4, [r7, #4]\n \tmov\tr1, fp\n \tmov\tr0, r4\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tr9, r1\n \tbeq.n\t13058 \n \tstr.w\tr8, [sp, #8]\n \tmovs\tr0, #20\n \tmovs\tr4, #0\n-\tblx\t415c \n+\tblx\t4160 \n \tmov\tr7, r0\n \tldr\tr0, [sp, #8]\n \tmov\tr1, r9\n \tmov\tr2, sl\n \tmov\tr3, r7\n \tadds\tr0, #28\n \tstr.w\tsl, [r7, #4]\n@@ -20211,65 +20211,65 @@\n \tldr.w\tr3, [r8, #116]\t; 0x74\n \tstr\tr3, [sp, #8]\n \tldrb\tr2, [r4, #0]\n \tcmp\tr2, #42\t; 0x2a\n \tit\teq\n \taddeq\tr4, #1\n \tmov\tr0, r4\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, r9\n \tmov\tr1, r0\n \tmov\tr0, r4\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tldr\tr3, [sp, #8]\n \tmov\tr1, r3\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tcmp\tsl, r1\n \tbne.w\t13264 \n \tmov\tr4, r7\n \tldr\tr7, [r7, #0]\n \tb.n\t12fe6 \n \tmov\tr0, r7\n-\tblx\t4810 \n+\tblx\t4814 \n \tmov\tr7, r0\n \tstr\tr0, [sp, #52]\t; 0x34\n \tcmp\tr0, #0\n \tbne.w\t12dea \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr.w\tr3, [pc, #1884]\t; 13878 \n \tmov\tr0, r4\n \tldr\tr1, [sp, #16]\n \tldr.w\tr2, [pc, #1880]\t; 1387c \n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tadds\tr7, #8\n \tldr\tr0, [r7, #0]\n \tldr\tr3, [r7, #8]\n \tstr\tr6, [sp, #188]\t; 0xbc\n \tsubs\tr3, r3, r0\n \tcmp\tr3, #3\n \tbhi.n\t13234 \n \tmovs\tr0, #4\n-\tblx\t415c \n+\tblx\t4160 \n \tstr\tr6, [r0, #0]\n \tmov\tr4, r0\n \tldr\tr0, [r7, #0]\n \tcbz\tr0, 13152 \n \tldr\tr1, [r7, #8]\n \tsubs\tr1, r1, r0\n-\tblx\t4390 \n+\tblx\t4394 \n \tstr\tr4, [r7, #0]\n \tadds\tr4, #4\n \tstrd\tr4, r4, [r7, #4]\n \tldr\tr0, [r5, #36]\t; 0x24\n-\tblx\t432c \n+\tblx\t4330 \n \tcmp\tr0, #1\n \tbhi.n\t13170 \n \tldrb.w\tr1, [r5, #48]\t; 0x30\n \tands.w\tr4, r1, #1\n \tbeq.w\t136aa \n \tldr\tr3, [r6, #0]\n \tldr.w\tr8, [r3, #168]\t; 0xa8\n@@ -20287,15 +20287,15 @@\n \taddpl.w\tr4, r8, #12\n \tldrmi.w\tr4, [r8, #12]\n \tadd.w\tr9, r4, r3, lsl #2\n \tcmp\tr4, r9\n \tbeq.n\t131cc \n \tldr.w\tr7, [r4], #4\n \tmov\tr0, r7\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tcbz\tr0, 131c0 \n \tldrb.w\tr3, [r0, #72]\t; 0x48\n \tbfc\tr3, #0, #1\n \tstrb.w\tr3, [r0, #72]\t; 0x48\n \tldr.w\tr0, [r7, #168]\t; 0xa8\n \tbl\t10adc \n \tcmp\tr9, r4\n@@ -20346,24 +20346,24 @@\n \tcmp\tr4, r1\n \tit\teq\n \tmoveq.w\tr8, #4\n \tbne.w\t13788 \n \tmov\tr0, r3\n \tmov\tr1, r4\n \tmov\tr2, r8\n-\tblx\t46ec \n+\tblx\t46f0 \n \tmov\tr3, r0\n \tadd\tr3, r8\n \tstr\tr3, [r7, #4]\n \tb.n\t1315a \n \tldr\tr0, [r5, #4]\n \tb.n\t12cc6 \n \tstr.w\tr8, [sp, #8]\n \tmovs\tr0, #20\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr7, [sp, #8]\n \tmov\tr4, r0\n \tldr\tr1, [sp, #52]\t; 0x34\n \tstr\tr0, [sp, #24]\n \tldr\tr3, [r7, #124]\t; 0x7c\n \tldr\tr2, [r7, #116]\t; 0x74\n \tldr.w\tr9, [r7, #132]\t; 0x84\n@@ -20372,15 +20372,15 @@\n \tvmov\tr0, s16\n \tstr\tr1, [sp, #0]\n \tadd.w\tr1, r7, #128\t; 0x80\n \tmovs\tr7, #0\n \tstr\tr7, [r4, #0]\n \tstrd\tr7, r7, [r4, #8]\n \tstr\tr7, [r4, #16]\n-\tblx\t45fc \n+\tblx\t4600 \n \tldrb.w\tr3, [sp, #76]\t; 0x4c\n \tcmp\tr3, #0\n \tbne.w\t1344e \n \tldr\tr3, [sp, #8]\n \tldr.w\tr8, [r3, #112]\t; 0x70\n \tldr\tr1, [sp, #20]\n \tadd.w\tr2, r8, r1\n@@ -20399,15 +20399,15 @@\n \tadds\tr2, #1\n \tstr\tr2, [r1, #124]\t; 0x7c\n \tb.n\t13000 \n \tmovs\tr1, #0\n \tmov\tr0, r7\n \tstr\tr7, [sp, #80]\t; 0x50\n \tstrd\tr1, r1, [sp, #84]\t; 0x54\n-\tblx\t4894 \n+\tblx\t4898 \n \tmov\tr8, r0\n \tcmp\tr0, #0\n \tbeq.w\t13bfe \n \tldr\tr3, [r0, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r0, #0]\n \tstr\tr0, [sp, #88]\t; 0x58\n@@ -20453,15 +20453,15 @@\n \tldr\tr7, [r5, #4]\n \tcmp\tr7, #0\n \tbeq.w\t137f6 \n \tmov\tr0, r7\n \tadd\tr3, sp, #196\t; 0xc4\n \tstr\tr3, [sp, #20]\n \tstr\tr3, [sp, #188]\t; 0xbc\n-\tblx\t4710 \n+\tblx\t4714 \n \tadd\tr3, sp, #188\t; 0xbc\n \tmov\tr4, r0\n \tcmp\tr0, #15\n \tstr\tr0, [sp, #56]\t; 0x38\n \tvmov\ts17, r3\n \tbhi.w\t1380e \n \tcmp\tr0, #1\n@@ -20469,28 +20469,28 @@\n \tldrb\tr3, [r7, #0]\n \tstrb.w\tr3, [sp, #196]\t; 0xc4\n \tldr\tr3, [sp, #20]\n \tstr\tr4, [sp, #192]\t; 0xc0\n \tmovs\tr2, #0\n \tstrb\tr2, [r3, r4]\n \tldrd\tr0, r1, [sp, #188]\t; 0xbc\n-\tblx\t4408 \n+\tblx\t440c \n \tmov\tr7, r0\n \tcmp\tr0, #0\n \tbeq.w\t1398a \n \tldr\tr0, [sp, #188]\t; 0xbc\n \tldr\tr3, [sp, #20]\n \tcmp\tr0, r3\n \tbeq.n\t133b0 \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmovs\tr0, #1\n \tstr\tr7, [sp, #188]\t; 0xbc\n-\tblx\t42a8 \n+\tblx\t42ac \n \tmov\tr4, r0\n \tstr\tr0, [sp, #56]\t; 0x38\n \tcmp\tr0, #0\n \tbeq.w\t13b96 \n \tmovs\tr3, #0\n \tvmov\tr0, s17\n \tstr\tr3, [sp, #188]\t; 0xbc\n@@ -20498,15 +20498,15 @@\n \tbl\t10ac8 \n \tadd\tr3, sp, #76\t; 0x4c\n \tmov\tr0, r3\n \tvmov\ts16, r3\n \tbl\tff14 \n \tldr\tr0, [r0, #0]\n \tmov\tr1, r4\n-\tblx\t439c \n+\tblx\t43a0 \n \tcmp\tr0, #0\n \tbeq.w\t13b66 \n \tstr\tr0, [sp, #52]\t; 0x34\n \tadd.w\tfp, sp, #52\t; 0x34\n \tmov\tr0, r6\n \tbl\t10ac8 \n \tmov\tr0, fp\n@@ -20524,41 +20524,41 @@\n \tldr\tr1, [r5, #4]\n \tstr\tr0, [sp, #8]\n \tbl\t11030 \n \tldr.w\tr2, [pc, #1124]\t; 13888 \n \tmovs\tr1, #0\n \tldr\tr0, [sp, #8]\n \tadd\tr2, pc\n-\tblx\t43fc , std::allocator >::insert(unsigned int, char const*)@plt>\n+\tblx\t4400 , std::allocator >::insert(unsigned int, char const*)@plt>\n \tmov\tr1, r0\n \tadd\tr0, sp, #164\t; 0xa4\n \tbl\t12bfc \n \tldr.w\tr1, [pc, #1108]\t; 1388c \n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tmov\tr1, r0\n \tvmov\tr0, s17\n \tbl\t12bfc \n-\tbl\t4954 \n+\tbl\t4954 \n \tldr\tr3, [sp, #80]\t; 0x50\n \tvmov\ts18, r3\n \tcmp\tr3, #1\n \tbeq.w\t13820 \n \tcmp.w\tr3, #536870912\t; 0x20000000\n \tbcs.w\t138d0 \n \tlsls\tr7, r3, #2\n \tmov\tr0, r7\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [sp, #8]\n \tmov\tr2, r7\n \tmovs\tr1, #0\n \tmov\tr8, r0\n \tadds\tr3, #136\t; 0x88\n \tstr\tr3, [sp, #20]\n-\tblx\t4374 \n+\tblx\t4378 \n \tldr\tr2, [sp, #8]\n \tmovs\tr3, #0\n \tldr.w\tsl, [r2, #120]\t; 0x78\n \tstr\tr3, [r2, #120]\t; 0x78\n \tcmp.w\tsl, #0\n \tbeq.n\t134f6 \n \tmov\tr0, r2\n@@ -20580,21 +20580,21 @@\n \tldr\tr3, [r4, #4]\n \tldr\tr7, [r3, #4]\n \tldrb\tr3, [r7, #0]\n \tcmp\tr3, #42\t; 0x2a\n \tit\teq\n \taddeq\tr7, #1\n \tmov\tr0, r7\n-\tblx\t4710 \n+\tblx\t4714 \n \tmov\tr2, sl\n \tmov\tr1, r0\n \tmov\tr0, r7\n-\tblx\t43f0 \n+\tblx\t43f4 \n \tmov\tr1, r9\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr.w\tr3, [fp, r1, lsl #2]\n \tcbz\tr3, 13522 \n \tldr\tr3, [r3, #0]\n \tstr\tr3, [r4, #0]\n \tldr.w\tr3, [fp, r1, lsl #2]\n \tstr\tr4, [r3, #0]\n \tcmp\tr5, #0\n@@ -20606,21 +20606,21 @@\n \tldr\tr6, [sp, #32]\n \tldr\tr3, [sp, #8]\n \tldrd\tr0, r1, [r3, #112]\t; 0x70\n \tldr\tr3, [sp, #20]\n \tcmp\tr3, r0\n \tbeq.n\t13508 \n \tlsls\tr1, r1, #2\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr2, [sp, #8]\n \tvmov\tr1, s18\n \tldr\tr0, [sp, #28]\n \tstr.w\tr8, [r2, #112]\t; 0x70\n \tvstr\ts18, [r2, #116]\t; 0x74\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tlsls\tr3, r1, #2\n \tstr\tr3, [sp, #20]\n \tb.n\t132aa \n \tldr\tr3, [r6, #120]\t; 0x78\n \tstr\tr3, [r4, #0]\n \tldr\tr3, [sp, #8]\n \tstr\tr4, [r6, #120]\t; 0x78\n@@ -20635,23 +20635,23 @@\n \tmovs\tr2, #0\n \tldr\tr3, [pc, #844]\t; (13890 )\n \tmov\tr0, r6\n \tldr\tr4, [r1, #0]\n \tadd\tr3, pc\n \tmov\tr1, r2\n \tstr\tr3, [r6, #68]\t; 0x44\n-\tblx\t4608 \n+\tblx\t460c \n \tmov\tr2, r0\n \tstr\tr0, [sp, #76]\t; 0x4c\n \tcmp\tr0, #0\n \tbeq.w\t13a3e \n \tldr\tr1, [pc, #820]\t; (13894 )\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tbl\t5bb0 \n+\tbl\t5bb0 \n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tb.n\t131f2 \n \tstr\tr3, [sp, #80]\t; 0x50\n \tvmov\tr0, s16\n \tldr\tr3, [pc, #800]\t; (13898 )\n \tadd\tr3, pc\n@@ -20686,45 +20686,45 @@\n \tadd\tr4, sp, #140\t; 0x8c\n \tvmov\tr1, s16\n \tmov\tr0, r4\n \tbl\t1056c \n \tldr\tr1, [pc, #712]\t; (1389c )\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tmov\tr1, r0\n \tadd\tr0, sp, #164\t; 0xa4\n \tbl\t12bfc \n \tldr\tr1, [r5, #4]\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tadd\tr3, sp, #188\t; 0xbc\n \tmov\tr1, r0\n \tmov\tr0, r3\n \tvmov\ts17, r3\n \tmovs\tr4, #1\n \tbl\t12bfc \n \tb.w\t12d3e \n \tmov\tr0, r9\n-\tblx\t41f0 \n+\tblx\t41f4 \n \tstr\tr0, [sp, #76]\t; 0x4c\n \tcmp\tr0, #0\n \tbne.n\t135c4 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #608]\t; (13878 )\n \tmov\tr0, r4\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #644]\t; (138a0 )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr0, r6\n-\tblx\t481c <__cxa_guard_acquire@plt>\n+\tblx\t4820 <__cxa_guard_acquire@plt>\n \tcmp\tr0, #0\n \tbeq.w\t130b0 \n \tldr\tr0, [pc, #624]\t; (138a4 )\n \tmov.w\tr3, #1065353216\t; 0x3f800000\n \tldr\tr2, [pc, #624]\t; (138a8 )\n \tadd\tr0, pc\n \tldr\tr1, [pc, #624]\t; (138ac )\n@@ -20735,22 +20735,22 @@\n \tstr\tr4, [r0, #8]\n \tstr\tr4, [r0, #20]\n \tstr\tr3, [r0, #16]\n \tadd.w\tr3, r0, #24\n \tstr\tr3, [r0, #0]\n \tmovs\tr3, #1\n \tstr\tr3, [r0, #4]\n-\tblx\t419c <__aeabi_atexit@plt+0x4>\n+\tblx\t41a0 <__aeabi_atexit@plt+0x4>\n \tmov\tr0, r6\n-\tblx\t4350 <__cxa_guard_release@plt>\n+\tblx\t4354 <__cxa_guard_release@plt>\n \tb.n\t130b0 \n \tldr\tr1, [pc, #588]\t; (138b0 )\n \tmov\tr0, r3\n \tadd\tr1, pc\n-\tblx\t452c \n+\tblx\t4530 \n \tldr\tr3, [r5, #0]\n \tcmp\tr0, #1\n \tbne.w\t12cfe \n \tstr\tr3, [sp, #80]\t; 0x50\n \tvmov\tr0, s16\n \tldr\tr3, [pc, #568]\t; (138b4 )\n \tadd\tr3, pc\n@@ -20758,62 +20758,62 @@\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #88]\t; 0x58\n \tbl\tff14 \n \tldr\tr1, [r0, #0]\n \tmov\tr2, r6\n \tldr\tr0, [pc, #556]\t; (138b8 )\n \tadd\tr0, pc\n-\tblx\t4308 \n+\tblx\t430c \n \tstr\tr0, [sp, #44]\t; 0x2c\n \tmov\tsl, r0\n \tadd\tr0, sp, #60\t; 0x3c\n \tstr\tr6, [sp, #60]\t; 0x3c\n \tbl\t10ac8 \n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tldr\tr3, [r5, #0]\n \tb.w\t12cfe \n \tldr\tr0, [r5, #36]\t; 0x24\n-\tblx\t432c \n+\tblx\t4330 \n \tcmp\tr0, #1\n \tbne.w\t131e8 \n \tldr\tr0, [r5, #36]\t; 0x24\n \tmov\tr1, r4\n \tstrd\tr4, r4, [sp, #84]\t; 0x54\n \tstr\tr0, [sp, #80]\t; 0x50\n-\tblx\t44f0 \n+\tblx\t44f4 \n \tmov\tr4, r0\n \tcmp\tr0, #0\n \tbeq.w\t13bbc \n \tldr\tr3, [r0, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r0, #0]\n \tstr\tr0, [sp, #88]\t; 0x58\n \tadd\tr0, sp, #56\t; 0x38\n \tmovs\tr3, #0\n \tstrd\tr3, r3, [sp, #56]\t; 0x38\n \tbl\t10ac8 \n \tadd\tr0, sp, #60\t; 0x3c\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tbl\t8d64 \n+\tbl\t8d64 \n \tmov\tr4, r0\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tldrb.w\tr2, [r6, #72]\t; 0x48\n \tldrb.w\tr3, [r4, #72]\t; 0x48\n \tubfx\tr3, r3, #1, #1\n \tbfi\tr2, r3, #1, #1\n \tstrb.w\tr2, [r6, #72]\t; 0x48\n \tb.n\t131e8 \n \tmov\tr0, r8\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t131dc \n \tmov\tr0, r7\n-\tblx\t481c <__cxa_guard_acquire@plt>\n+\tblx\t4820 <__cxa_guard_acquire@plt>\n \tcmp\tr0, #0\n \tbeq.w\t13020 \n \tldr\tr0, [pc, #412]\t; (138bc )\n \tmov.w\tr3, #1065353216\t; 0x3f800000\n \tldr\tr2, [pc, #408]\t; (138c0 )\n \tadd\tr0, pc\n \tldr\tr1, [pc, #408]\t; (138c4 )\n@@ -20824,41 +20824,41 @@\n \tstr.w\tr8, [r0, #8]\n \tstr.w\tr8, [r0, #20]\n \tstr\tr3, [r0, #16]\n \tadd.w\tr3, r0, #24\n \tstr\tr3, [r0, #0]\n \tmovs\tr3, #1\n \tstr\tr3, [r0, #4]\n-\tblx\t419c <__aeabi_atexit@plt+0x4>\n+\tblx\t41a0 <__aeabi_atexit@plt+0x4>\n \tmov\tr0, r7\n-\tblx\t4350 <__cxa_guard_release@plt>\n+\tblx\t4354 <__cxa_guard_release@plt>\n \tb.n\t13020 \n \tldr\tr7, [sp, #8]\n \tldr\tr4, [sp, #24]\n \tldr\tr3, [r7, #120]\t; 0x78\n \tstr\tr3, [r4, #0]\n \tstr\tr4, [r7, #120]\t; 0x78\n \tldr\tr3, [r4, #0]\n \tcbz\tr3, 13780 \n \tldr\tr3, [r3, #4]\n \tldr\tr1, [r7, #116]\t; 0x74\n \tstr\tr1, [sp, #28]\n \tldr\tr0, [r3, #4]\n \tbl\t11164 \n \tldr\tr1, [sp, #28]\n-\tblx\t4290 <__aeabi_uidivmod@plt>\n+\tblx\t4294 <__aeabi_uidivmod@plt>\n \tldr\tr2, [r7, #112]\t; 0x70\n \tldr\tr3, [sp, #20]\n \tstr.w\tr4, [r8, r1, lsl #2]\n \tadd\tr2, r3\n \tldr\tr3, [sp, #8]\n \tadds\tr3, #120\t; 0x78\n \tstr\tr3, [r2, #0]\n \tb.n\t132c6 \n-\tblx\t46ec \n+\tblx\t46f0 \n \tadd\tr1, sp, #192\t; 0xc0\n \tldr\tr3, [r7, #4]\n \tsub.w\tr8, r1, r4\n \tcmp\tr4, r1\n \tbeq.w\t1325a \n \tb.n\t1324e \n \tldr\tr3, [r5, #0]\n@@ -20885,15 +20885,15 @@\n \tb.n\t134e6 \n \tldr\tr3, [sp, #20]\n \tcmp\tr0, #0\n \tbeq.w\t1338a \n \tldr\tr0, [sp, #20]\n \tmov\tr2, r4\n \tmov\tr1, r7\n-\tblx\t46ec \n+\tblx\t46f0 \n \tldr\tr4, [sp, #56]\t; 0x38\n \tldr\tr3, [sp, #188]\t; 0xbc\n \tb.n\t1338a \n \tadd\tr0, sp, #72\t; 0x48\n \tbl\t10ac8 \n \tb.w\t12c82 \n \tldr\tr3, [pc, #212]\t; (138cc )\n@@ -20906,15 +20906,15 @@\n \tbeq.n\t138da \n \tadd\tr3, sp, #188\t; 0xbc\n \tvmov\ts17, r3\n \tb.n\t133b0 \n \tmov\tr2, r8\n \tmov\tr1, r6\n \tmov\tr0, r3\n-\tblx\t47e0 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n+\tblx\t47e4 , std::allocator >::_M_create(unsigned int&, unsigned int)@plt>\n \tldr\tr3, [sp, #56]\t; 0x38\n \tstr\tr0, [sp, #188]\t; 0xbc\n \tstr\tr3, [sp, #196]\t; 0xc4\n \tb.n\t137de \n \tldr.w\tr8, [sp, #8]\n \tstr.w\tr7, [r8, #136]!\n \tstr.w\tr8, [sp, #20]\n@@ -20988,424 +20988,424 @@\n \tadds\tr5, r6, #1\n \tvtbl.8\td17, {d15-d18}, d18\n \tmovs\tr0, r0\n \tlsls\tr4, r2, #11\n \tmovs\tr0, r0\n \tcmp.w\tr3, #1073741824\t; 0x40000000\n \tbcc.n\t138e2 \n-\tblx\t4424 \n+\tblx\t4428 \n \tmov\tr0, r7\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t13806 \n-\tblx\t4248 \n+\tblx\t424c \n \tadd\tr6, sp, #164\t; 0xa4\n \tldr\tr1, [r5, #4]\n \tmov\tr0, r6\n \tbl\t11030 \n \tldr.w\tr1, [pc, #1032]\t; 13cfc \n \tmov\tr0, r6\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tmov\tr1, r0\n \tvmov\tr0, s17\n \tbl\t12bfc \n-\tbl\t4954 \n+\tbl\t4954 \n \tadd\tr4, sp, #116\t; 0x74\n \tldr\tr1, [r5, #4]\n \tmov\tr0, r4\n \tbl\t11030 \n \tldr\tr1, [pc, #1000]\t; (13d00 )\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tadd\tr4, sp, #140\t; 0x8c\n \tmov\tr1, r0\n \tadd\tr5, sp, #92\t; 0x5c\n \tmov\tr0, r4\n \tbl\t12bfc \n \tmov\tr0, r5\n-\tbl\t5d40 \n+\tbl\t5d40 \n \tadd\tr6, sp, #164\t; 0xa4\n \tmov\tr2, r5\n \tmov\tr1, r4\n \tmov\tr0, r6\n \tbl\td928 \n \tldr\tr1, [pc, #964]\t; (13d04 )\n \tmov\tr0, r6\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tmov\tr1, r0\n \tvmov\tr0, s17\n \tbl\t12bfc \n-\tbl\t4954 \n+\tbl\t4954 \n \tmov\tr1, r0\n \tadd\tr0, sp, #140\t; 0x8c\n \tstr\tr0, [sp, #8]\n \tbl\t11030 \n \tldr\tr2, [pc, #936]\t; (13d08 )\n \tmovs\tr1, #0\n \tldr\tr0, [sp, #8]\n \tadd\tr2, pc\n-\tblx\t43fc , std::allocator >::insert(unsigned int, char const*)@plt>\n+\tblx\t4400 , std::allocator >::insert(unsigned int, char const*)@plt>\n \tmov\tr1, r0\n \tadd\tr0, sp, #164\t; 0xa4\n \tbl\t12bfc \n \tldr\tr1, [pc, #920]\t; (13d0c )\n \tadd\tr1, pc\n-\tblx\t48a0 , std::allocator >::append(char const*)@plt>\n+\tblx\t48a4 , std::allocator >::append(char const*)@plt>\n \tmov\tr1, r0\n \tadd\tr0, sp, #188\t; 0xbc\n \tbl\t12bfc \n-\tbl\t4954 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tbl\t4954 \n+\tblx\t459c <__stack_chk_fail@plt>\n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #888]\t; (13d10 )\n \tmov\tr0, r5\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #884]\t; (13d14 )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tb.n\t139b2 \n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tldr\tr0, [sp, #188]\t; 0xbc\n \tldr\tr3, [sp, #20]\n \tcmp\tr0, r3\n \tbne.n\t13a12 \n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tadd\tr0, sp, #72\t; 0x48\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr5, r0\n \tadd\tr0, sp, #48\t; 0x30\n \tbl\t10ac8 \n \tadd\tr0, sp, #44\t; 0x2c\n \tbl\t10ac8 \n \tadd\tr0, sp, #40\t; 0x28\n \tbl\t10ac8 \n \tmov\tr0, r5\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr5, r0\n \tldr\tr0, [sp, #164]\t; 0xa4\n \tadd\tr3, sp, #172\t; 0xac\n \tcmp\tr0, r3\n \tbeq.n\t139f8 \n \tldr\tr1, [sp, #172]\t; 0xac\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #140]\t; 0x8c\n \tadd\tr3, sp, #148\t; 0x94\n \tcmp\tr0, r3\n \tbeq.n\t13a08 \n \tldr\tr1, [sp, #148]\t; 0x94\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tb.n\t139ce \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\t139ba \n \tmov\tr5, r0\n \tb.n\t139f8 \n \tmov\tr5, r0\n \tb.n\t13a08 \n \tmov\tr5, r0\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tb.n\t139ce \n \tmov\tr4, r0\n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr0, [pc, #728]\t; (13d18 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n \tmov\tr0, r7\n-\tbl\t4b78 \n+\tbl\t4b78 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tmov\tr0, fp\n \tbl\t10ac8 \n \tb.n\t139ba \n \tmov\tr5, r0\n \tb.n\t13a7a \n \tmov\tr5, r0\n \tmov\tr0, r4\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tb.n\t139ce \n \tldr\tr3, [sp, #188]\t; 0xbc\n \tmov\tr5, r0\n \tldr\tr2, [sp, #20]\n \tcmp\tr3, r2\n \tbeq.n\t13a98 \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tmov\tr0, r3\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #164]\t; 0xa4\n \tadd\tr3, sp, #172\t; 0xac\n \tcmp\tr0, r3\n \tbeq.n\t13aa8 \n \tldr\tr1, [sp, #172]\t; 0xac\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tadd\tr0, sp, #52\t; 0x34\n \tbl\t10ac8 \n \tb.n\t139ce \n \tmov\tr5, r0\n \tb.n\t13a98 \n \tmov\tr5, r0\n \tb.n\t139d4 \n \tmov\tr5, r0\n \tb.n\t13ac4 \n \tmov\tr5, r0\n \tmov\tr0, r4\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tadd\tr0, sp, #52\t; 0x34\n \tbl\t10ac8 \n \tb.n\t139ce \n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tldr\tr3, [sp, #8]\n \tstr.w\tr9, [r3, #132]\t; 0x84\n-\tblx\t46d4 <__cxa_rethrow@plt>\n+\tblx\t46d8 <__cxa_rethrow@plt>\n \tmov\tr5, r0\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tb.n\t139d4 \n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr3, [sp, #24]\n \tldr\tr0, [r3, #8]\n \tldr\tr1, [r3, #16]\n \tsubs\tr1, r1, r0\n \tcbz\tr0, 13af8 \n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #24]\n \tmovs\tr1, #20\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tldr\tr2, [sp, #188]\t; 0xbc\n \tadd\tr3, sp, #196\t; 0xc4\n \tmov\tr4, r0\n \tcmp\tr2, r3\n \tbeq.n\t13b1a \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tmov\tr0, r2\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #164]\t; 0xa4\n \tadd\tr3, sp, #172\t; 0xac\n \tcmp\tr0, r3\n \tbeq.n\t13b2a \n \tldr\tr1, [sp, #172]\t; 0xac\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #140]\t; 0x8c\n \tadd\tr3, sp, #148\t; 0x94\n \tcmp\tr0, r3\n \tbeq.n\t13b3a \n \tldr\tr1, [sp, #148]\t; 0x94\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\t139ba \n \tmov\tr5, r0\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tb.n\t139ce \n \tmov\tr4, r0\n \tb.n\t139c0 \n \tmov\tr4, r0\n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\t13aea \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #412]\t; (13d10 )\n \tmov\tr0, r5\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #416]\t; (13d1c )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tb.n\t13b8e \n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r6\n \tbl\t10ac8 \n \tb.n\t139ba \n \tldr\tr0, [pc, #392]\t; (13d20 )\n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr4, r0\n \tb.n\t13baa \n \tmov\tr4, r0\n \tmov\tr0, r6\n \tbl\t10ac8 \n \tvmov\tr0, s17\n \tbl\t10ac8 \n \tb.n\t139ba \n \tmov\tr4, r0\n \tb.n\t13b1a \n \tmov\tr4, r0\n \tb.n\t13b2a \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr5, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #324]\t; (13d10 )\n \tmov\tr0, r5\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #340]\t; (13d24 )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr4, r0\n \tb.n\t13be4 \n \tmov\tr4, r0\n \tmov\tr0, r5\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tb.n\t13b3a \n \tmov\tr5, r0\n \tb.n\t139ce \n \tmov\tr5, r0\n \tb.n\t13aa8 \n \tmov\tr5, r0\n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n \tb.n\t13aa8 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #260]\t; (13d10 )\n \tmov\tr0, r4\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #276]\t; (13d28 )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr5, r0\n \tmov\tr0, r4\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\t13bf6 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #220]\t; (13d10 )\n \tmov\tr0, r4\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #244]\t; (13d2c )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #192]\t; (13d10 )\n \tmov\tr0, r4\n \tldr\tr1, [sp, #16]\n \tldr\tr2, [pc, #220]\t; (13d30 )\n \tldr\tr1, [r1, r3]\n \tadd\tr2, pc\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr5, r0\n \tmov\tr0, r4\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tb.n\t13aa8 \n \tb.n\t13c5c \n \tmov\tr5, r0\n \tb.n\t139ce \n \tldr\tr3, [sp, #188]\t; 0xbc\n \tadd\tr2, sp, #196\t; 0xc4\n \tmov\tr5, r0\n \tcmp\tr3, r2\n \tbeq.n\t13c80 \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tmov\tr0, r3\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tcmp\tr4, #0\n \tbne.w\t139e8 \n \tb.n\t139ce \n \tmov\tr5, r0\n \tldr\tr0, [sp, #164]\t; 0xa4\n \tadd\tr3, sp, #172\t; 0xac\n \tcmp\tr0, r3\n \tbeq.n\t13c9a \n \tldr\tr1, [sp, #172]\t; 0xac\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #92]\t; 0x5c\n \tadd\tr3, sp, #100\t; 0x64\n \tcmp\tr0, r3\n \tbeq.n\t13caa \n \tldr\tr1, [sp, #100]\t; 0x64\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #140]\t; 0x8c\n \tadd\tr3, sp, #148\t; 0x94\n \tcmp\tr0, r3\n \tbeq.n\t13cba \n \tldr\tr1, [sp, #148]\t; 0x94\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr\tr0, [sp, #116]\t; 0x74\n \tadd\tr3, sp, #124\t; 0x7c\n \tcmp\tr0, r3\n \tbeq.w\t13aa8 \n \tldr\tr1, [sp, #124]\t; 0x7c\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\t13aa8 \n \tmov\tr5, r0\n \tb.n\t13c9a \n \tldr\tr3, [sp, #188]\t; 0xbc\n \tmov\tr5, r0\n \tldr\tr2, [sp, #20]\n \tcmp\tr3, r2\n \tbeq.n\t13c8a \n \tldr\tr1, [sp, #196]\t; 0xc4\n \tmov\tr0, r3\n \tadds\tr1, #1\n-\tblx\t4390 \n+\tblx\t4394 \n \tb.n\t13c8a \n \tb.n\t13b06 \n \tmov\tr4, r0\n \tb.n\t13b1a \n \tmov\tr4, r0\n \tb.n\t13b2a \n \tmov\tr5, r0\n@@ -21447,27 +21447,27 @@\n \tvpush\t{d8}\n \tsub\tsp, #156\t; 0x9c\n \tldr\tr3, [r2, r3]\n \tadd\tr5, pc\n \tldr\tr3, [r3, #0]\n \tstr\tr3, [sp, #148]\t; 0x94\n \tmov.w\tr3, #0\n-\tblx\t44b4 \n+\tblx\t44b8 \n \tldrb\tr3, [r0, #0]\n \tcmp\tr3, #51\t; 0x33\n \tbeq.n\t13db4 \n \tldr\tr4, [pc, #68]\t; (13da4 )\n \tmov\tr3, r0\n \tldr\tr2, [pc, #68]\t; (13da8 )\n \tldr\tr1, [pc, #72]\t; (13dac )\n \tadd\tr2, pc\n \tldr\tr0, [r5, r4]\n \tadd\tr1, pc\n \tldr\tr0, [r0, #0]\n-\tblx\t4380 \n+\tblx\t4384 \n \tmovs\tr3, #0\n \tstr\tr3, [sp, #12]\n \tldr\tr2, [pc, #56]\t; (13db0 )\n \tldr\tr3, [pc, #36]\t; (13d9c )\n \tadd\tr2, pc\n \tldr\tr3, [r2, r3]\n \tldr\tr2, [r3, #0]\n@@ -21500,15 +21500,15 @@\n \tldrb\tr4, [r0, #2]\n \tsubs\tr4, #57\t; 0x39\n \tbne.n\t13d5c \n \tldrb\tr3, [r0, #3]\n \tsubs\tr3, #48\t; 0x30\n \tcmp\tr3, #9\n \tbls.n\t13d5c \n-\tbl\t64e8 \n+\tbl\t64e8 \n \tldr.w\tr0, [pc, #1152]\t; 14250 \n \tldr.w\tr3, [pc, #1152]\t; 14254 \n \tmovs\tr2, #1\n \tadd\tr0, pc\n \tmovw\tr1, #1013\t; 0x3f5\n \tadd\tr3, pc\n \tstrd\tr2, r4, [r0]\n@@ -21518,32 +21518,32 @@\n \tstr\tr2, [r0, #28]\n \tmovs\tr2, #0\n \tstrd\tr2, r3, [r0, #32]\n \tstrd\tr2, r3, [r0, #40]\t; 0x28\n \tstrd\tr4, r4, [r0, #8]\n \tstr\tr4, [r0, #24]\n \tstr\tr4, [r0, #48]\t; 0x30\n-\tblx\t4734 \n+\tblx\t4738 \n \tstr\tr0, [sp, #12]\n \tcmp\tr0, #0\n \tbeq.w\t14952 \n \tmov\tr2, r0\n \tldr\tr3, [r0, #0]\n \tldr.w\tr0, [pc, #1092]\t; 14258 \n \tadds\tr3, #1\n \tstr\tr2, [sp, #40]\t; 0x28\n \tadd\tr0, pc\n \tstr\tr3, [r2, #0]\n-\tblx\t4448 \n+\tblx\t444c \n \tmov\tr6, r0\n \tcmp\tr0, #0\n \tbeq.w\t14ae8 \n \tldr.w\tr1, [pc, #1072]\t; 1425c \n \tadd\tr1, pc\n-\tblx\t4214 \n+\tblx\t4218 \n \tldr\tr3, [r6, #0]\n \tmov\tr4, r0\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #0]\n \tcmp\tr3, #0\n \tbeq.w\t148b2 \n \tcmp\tr4, #0\n@@ -21551,15 +21551,15 @@\n \tldr.w\tr3, [pc, #1048]\t; 14260 \n \tldr\tr2, [r4, #4]\n \tldr\tr3, [r5, r3]\n \tcmp\tr2, r3\n \tbne.w\t14b46 \n \tmovs\tr1, #0\n \tmov\tr0, r4\n-\tblx\t4650 \n+\tblx\t4654 \n \tldr.w\tr3, [pc, #1028]\t; 14264 \n \tadd\tr3, pc\n \tstr\tr0, [r3, #52]\t; 0x34\n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n@@ -21586,15 +21586,15 @@\n \tblx\tr3\n \tcmp\tr0, #0\n \tbeq.w\t14bb6 \n \tcmp\tr0, #1\n \tbne.w\t14ba2 \n \tldr\tr0, [pc, #956]\t; (14270 )\n \tadd\tr0, pc\n-\tblx\t4448 \n+\tblx\t444c \n \tcmp\tr0, #0\n \tbeq.w\t14e6e \n \tldr\tr2, [r0, #0]\n \tsubs\tr2, #1\n \tstr\tr2, [r0, #0]\n \tcmp\tr2, #0\n \tbeq.w\t148d6 \n@@ -21628,33 +21628,33 @@\n \tadd\tr2, sp, #44\t; 0x2c\n \tstr\tr2, [sp, #16]\n \tldr\tr2, [pc, #884]\t; (14288 )\n \tldr\tr3, [r5, r3]\n \tadd\tr2, pc\n \tstr\tr3, [sp, #28]\n \tmov\tr1, r3\n-\tbl\t76f0 \n+\tbl\t76f0 \n \tldr\tr3, [pc, #872]\t; (1428c )\n \tmov\tr0, r7\n \tldr\tr2, [pc, #872]\t; (14290 )\n \tadd\tr2, pc\n \tldr\tr1, [r5, r3]\n \tadd\tr3, sp, #44\t; 0x2c\n \tstr\tr1, [sp, #32]\n \tstr\tr3, [sp, #16]\n-\tbl\t76f0 \n+\tbl\t76f0 \n \tldr\tr3, [pc, #860]\t; (14294 )\n \tmov\tr0, r7\n \tldr\tr2, [pc, #860]\t; (14298 )\n \tadd\tr2, pc\n \tldr\tr1, [r5, r3]\n \tadd\tr3, sp, #44\t; 0x2c\n \tstr\tr1, [sp, #36]\t; 0x24\n \tstr\tr3, [sp, #16]\n-\tbl\t76f0 \n+\tbl\t76f0 \n \tadd\tr3, sp, #44\t; 0x2c\n \tstr\tr3, [sp, #16]\n \tmov\tr0, r3\n \tldr\tr3, [pc, #844]\t; (1429c )\n \tmov\tr1, r7\n \tadd\tr3, pc\n \tstr\tr3, [sp, #136]\t; 0x88\n@@ -21670,47 +21670,47 @@\n \tvldr\td0, [pc, #728]\t; 14248 \n \tbic.w\tr3, r3, #3\n \torr.w\tr3, r3, #2\n \tstrb.w\tr3, [sp, #100]\t; 0x64\n \tldr\tr3, [pc, #800]\t; (142a0 )\n \tadd\tr3, pc\n \tstr\tr3, [sp, #96]\t; 0x60\n-\tblx\t43c0 \n+\tblx\t43c4 \n \tmovs\tr3, #0\n \tstr\tr0, [sp, #104]\t; 0x68\n \tstr\tr3, [sp, #108]\t; 0x6c\n-\tblx\t4758 \n+\tblx\t475c \n \tcbz\tr0, 13f98 \n-\tblx\t4508 \n+\tblx\t450c \n \tldrb.w\tr3, [sp, #84]\t; 0x54\n \tvldr\td0, [pc, #680]\t; 14248 \n \tbic.w\tr3, r3, #3\n \torr.w\tr3, r3, #2\n \tstrb.w\tr3, [sp, #84]\t; 0x54\n \tldr\tr3, [pc, #756]\t; (142a4 )\n \tadd\tr3, pc\n \tstr\tr3, [sp, #80]\t; 0x50\n-\tblx\t43c0 \n+\tblx\t43c4 \n \tmovs\tr3, #0\n \tstr\tr0, [sp, #88]\t; 0x58\n \tstr\tr3, [sp, #92]\t; 0x5c\n-\tblx\t4758 \n+\tblx\t475c \n \tcbz\tr0, 13fc6 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [pc, #736]\t; (142a8 )\n \tldr.w\tsl, [sp, #44]\t; 0x2c\n \tldr\tr1, [pc, #732]\t; (142ac )\n \tmov\tr0, sl\n \tldr\tr4, [r5, r3]\n \tadd\tr1, pc\n \tstr\tr4, [sp, #60]\t; 0x3c\n \tldr\tr3, [r4, #0]\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr9, r0\n \tcmp\tr0, #0\n \tbeq.w\t1498c \n \tstr\tr0, [sp, #64]\t; 0x40\n \tadd.w\tr8, sp, #72\t; 0x48\n \tmovs\tr3, #0\n \tmov\tr0, r8\n@@ -21732,33 +21732,33 @@\n \tadd\tr3, pc\n \tstr\tr3, [r6, #24]\n \tldr\tr3, [pc, #660]\t; (142b8 )\n \tadd\tr3, pc\n \tstr\tr3, [r6, #0]\n \tadd\tr3, sp, #56\t; 0x38\n \tvmov\ts17, r3\n-\tbl\t7af0 \n+\tbl\t7af0 \n \tadd.w\tfp, sp, #80\t; 0x50\n \tmov\tr1, r6\n \tmov\tr0, fp\n-\tbl\t7af0 \n+\tbl\t7af0 \n \tldr\tr3, [pc, #636]\t; (142bc )\n \tmov\tr1, r8\n \tldr\tr2, [pc, #636]\t; (142c0 )\n \tadd\tr3, pc\n \tstr\tr3, [r6, #4]\n \tadd\tr3, sp, #56\t; 0x38\n \tadd\tr2, pc\n \tmov\tr0, r3\n \tmovs\tr3, #3\n \tstr\tr3, [sp, #0]\n \tadds\tr2, #24\n \tldr\tr3, [pc, #620]\t; (142c4 )\n \tadd\tr3, pc\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #72]\t; 0x48\n \tcbz\tr0, 14064 \n \tbl\t11bcc \n \tldr.w\tr3, [r9]\n \tsubs\tr3, #1\n \tstr.w\tr3, [r9]\n \tcmp\tr3, #0\n@@ -21800,15 +21800,15 @@\n \tldr\tr1, [pc, #520]\t; (142d8 )\n \tldr\tr3, [r4, #0]\n \tmov\tr0, r9\n \tadd\tr1, pc\n \tstr\tr4, [sp, #56]\t; 0x38\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr6, r0\n \tcmp\tr0, #0\n \tbeq.w\t1497a \n \tstr\tr0, [sp, #60]\t; 0x3c\n \tadd\tr3, sp, #64\t; 0x40\n \tvmov\ts16, r3\n \tmov\tr2, r3\n@@ -21843,15 +21843,15 @@\n \tadds\tr3, #8\n \tmovs\tr0, #0\n \tstr\tr0, [r1, #32]\n \tmovs\tr1, #1\n \tmov\tr0, r9\n \tstr\tr1, [sp, #0]\n \tvmov\tr1, s16\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #64]\t; 0x40\n \tcbz\tr0, 14152 \n \tbl\t11bcc \n \tldr\tr3, [r6, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r6, #0]\n \tcmp\tr3, #0\n@@ -21894,15 +21894,15 @@\n \tstr\tr0, [sp, #24]\n \tadd\tr1, pc\n \tmov\tr0, r2\n \tadds\tr3, #1\n \tstr\tr2, [sp, #20]\n \tstr\tr3, [r4, #0]\n \tstr\tr4, [sp, #52]\t; 0x34\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tsl, r0\n \tcmp\tr0, #0\n \tbeq.w\t14a56 \n \tstr\tr0, [sp, #56]\t; 0x38\n \tadd\tr6, sp, #60\t; 0x3c\n \tmovs\tr3, #0\n \tmov\tr0, r6\n@@ -21937,15 +21937,15 @@\n \tmovs\tr0, #0\n \tadds\tr2, #56\t; 0x38\n \tstr\tr0, [r1, #32]\n \tmovs\tr1, #1\n \tldr\tr0, [sp, #20]\n \tstr\tr1, [sp, #0]\n \tmov\tr1, r6\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #60]\t; 0x3c\n \tcbz\tr0, 14234 \n \tbl\t11bcc \n \tldr.w\tr3, [sl]\n \tsubs\tr3, #1\n \tstr.w\tr3, [sl]\n \tcmp\tr3, #0\n@@ -22107,25 +22107,25 @@\n \tldr.w\tr3, [pc, #3072]\t; 14fb0 \n \tadd\tr3, pc\n \tstr\tr3, [sp, #128]\t; 0x80\n \tmovs\tr3, #8\n \tstrd\tr3, r3, [sp, #112]\t; 0x70\n \tmov.w\tr3, #400\t; 0x190\n \tstr\tr3, [sp, #108]\t; 0x6c\n-\tbl\t76f0 \n+\tbl\t76f0 \n \tldr.w\tr2, [pc, #3052]\t; 14fb4 \n \tmov\tr0, r7\n \tldr\tr1, [sp, #32]\n \tadd\tr2, pc\n-\tbl\t76f0 \n+\tbl\t76f0 \n \tldr.w\tr2, [pc, #3044]\t; 14fb8 \n \tmov\tr0, r7\n \tldr\tr1, [sp, #36]\t; 0x24\n \tadd\tr2, pc\n-\tbl\t76f0 \n+\tbl\t76f0 \n \tldr.w\tr3, [pc, #3032]\t; 14fbc \n \tmov\tr1, r7\n \tmov\tr0, r9\n \tadd\tr3, pc\n \tstr\tr3, [sp, #136]\t; 0x88\n \tbl\t12c3c \n \tadd\tr0, sp, #132\t; 0x84\n@@ -22134,30 +22134,30 @@\n \tmovs\tr0, #0\n \tbic.w\tr3, r3, #3\n \torr.w\tr3, r3, #2\n \tstrb.w\tr3, [sp, #100]\t; 0x64\n \tldr.w\tr3, [pc, #2996]\t; 14fc0 \n \tadd\tr3, pc\n \tstr\tr3, [sp, #96]\t; 0x60\n-\tblx\t4180 \n+\tblx\t4184 \n \tmovs\tr3, #0\n \tstr\tr0, [sp, #104]\t; 0x68\n \tstr\tr3, [sp, #108]\t; 0x6c\n-\tblx\t4758 \n+\tblx\t475c \n \tcbz\tr0, 14424 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr.w\tr1, [pc, #2972]\t; 14fc4 \n \tldr\tr3, [r4, #0]\n \tldr\tr0, [sp, #52]\t; 0x34\n \tadd\tr1, pc\n \tadds\tr3, #1\n \tstr\tr4, [sp, #64]\t; 0x40\n \tstr\tr0, [sp, #24]\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tsl, r0\n \tcmp\tr0, #0\n \tbeq.w\t14a68 \n \tstr\tr0, [sp, #72]\t; 0x48\n \tmov\tr0, fp\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #60]\t; 0x3c\n@@ -22177,29 +22177,29 @@\n \tstrb.w\tr3, [r7, #45]\t; 0x2d\n \tldr.w\tr3, [pc, #2900]\t; 14fcc \n \tadd\tr3, pc\n \tstr\tr3, [r7, #24]\n \tldr.w\tr3, [pc, #2896]\t; 14fd0 \n \tadd\tr3, pc\n \tstr\tr3, [r7, #0]\n-\tbl\t7af0 \n+\tbl\t7af0 \n \tldr.w\tr3, [pc, #2888]\t; 14fd4 \n \tmov\tr0, r6\n \tldr.w\tr2, [pc, #2888]\t; 14fd8 \n \tldr.w\tr1, [pc, #2888]\t; 14fdc \n \tadd\tr3, pc\n \tadd\tr2, pc\n \tadds\tr3, #8\n \tadd\tr1, pc\n \tadds\tr2, #72\t; 0x48\n \tstr\tr1, [r7, #4]\n \tmovs\tr1, #2\n \tstr\tr1, [sp, #0]\n \tmov\tr1, fp\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #80]\t; 0x50\n \tcbz\tr0, 144b4 \n \tbl\t11bcc \n \tmov\tr0, r8\n \tbl\t10ac8 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n@@ -22217,15 +22217,15 @@\n \tldr\tr3, [r4, #0]\n \tldr\tr0, [sp, #52]\t; 0x34\n \tadd\tr1, pc\n \tadds\tr3, #1\n \tstr\tr4, [sp, #60]\t; 0x3c\n \tstr\tr0, [sp, #24]\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tsl, r0\n \tcmp\tr0, #0\n \tbeq.w\t14a78 \n \tstr\tr0, [sp, #64]\t; 0x40\n \tmov\tr0, r8\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #56]\t; 0x38\n@@ -22283,15 +22283,15 @@\n \taddne\tr3, #1\n \tstrhne\tr3, [r7, #50]\t; 0x32\n \tldr.w\tr3, [pc, #2656]\t; 15000 \n \tstr\tr1, [sp, #0]\n \tmov\tr1, r8\n \tadd\tr3, pc\n \tadds\tr3, #16\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #72]\t; 0x48\n \tcbz\tr0, 145b6 \n \tbl\t11bcc \n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n@@ -22309,15 +22309,15 @@\n \tldr.w\tr1, [pc, #2592]\t; 15008 \n \tldr\tr3, [r4, #0]\n \tmov\tr0, sl\n \tadd\tr1, pc\n \tstr\tr4, [sp, #64]\t; 0x40\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr7, r0\n \tcmp\tr0, #0\n \tbeq.w\t14a88 \n \tstr\tr0, [sp, #72]\t; 0x48\n \tmov\tr0, fp\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #60]\t; 0x3c\n@@ -22348,15 +22348,15 @@\n \tstr\tr0, [r1, #4]\n \tmovs\tr0, #0\n \tstr\tr0, [r1, #32]\n \tmovs\tr1, #1\n \tmov\tr0, r6\n \tstr\tr1, [sp, #0]\n \tmov\tr1, fp\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #80]\t; 0x50\n \tcbz\tr0, 1466a \n \tbl\t11bcc \n \tmov\tr0, r8\n \tbl\t10ac8 \n \tvmov\tr0, s16\n \tbl\t10ac8 \n@@ -22371,15 +22371,15 @@\n \tldr.w\tr1, [pc, #2452]\t; 15028 \n \tldr\tr3, [r4, #0]\n \tmov\tr0, sl\n \tadd\tr1, pc\n \tstr\tr4, [sp, #64]\t; 0x40\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr7, r0\n \tcmp\tr0, #0\n \tbeq.w\t14a98 \n \tstr\tr0, [sp, #72]\t; 0x48\n \tmov\tr0, fp\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #60]\t; 0x3c\n@@ -22410,15 +22410,15 @@\n \tstr\tr0, [r1, #4]\n \tmovs\tr0, #0\n \tstr\tr0, [r1, #32]\n \tmovs\tr1, #1\n \tmov\tr0, r6\n \tstr\tr1, [sp, #0]\n \tmov\tr1, fp\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #80]\t; 0x50\n \tcbz\tr0, 14714 \n \tbl\t11bcc \n \tmov\tr0, r8\n \tbl\t10ac8 \n \tvmov\tr0, s16\n \tbl\t10ac8 \n@@ -22433,15 +22433,15 @@\n \tldr.w\tr1, [pc, #2316]\t; 15048 \n \tldr\tr3, [r4, #0]\n \tmov\tr0, sl\n \tadd\tr1, pc\n \tstr\tr4, [sp, #64]\t; 0x40\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr7, r0\n \tcmp\tr0, #0\n \tbeq.w\t14aa8 \n \tstr\tr0, [sp, #72]\t; 0x48\n \tmov\tr0, fp\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #60]\t; 0x3c\n@@ -22472,15 +22472,15 @@\n \tstr\tr0, [r1, #4]\n \tmovs\tr0, #0\n \tstr\tr0, [r1, #32]\n \tmovs\tr1, #1\n \tmov\tr0, r6\n \tstr\tr1, [sp, #0]\n \tmov\tr1, fp\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #80]\t; 0x50\n \tcbz\tr0, 147be \n \tbl\t11bcc \n \tmov\tr0, r8\n \tbl\t10ac8 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n@@ -22498,15 +22498,15 @@\n \tldr.w\tr1, [pc, #2172]\t; 15068 \n \tldr\tr3, [r4, #0]\n \tmov\tr0, sl\n \tadd\tr1, pc\n \tstr\tr4, [sp, #64]\t; 0x40\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n-\tblx\t4214 \n+\tblx\t4218 \n \tmov\tr7, r0\n \tcmp\tr0, #0\n \tbeq.w\t14ab8 \n \tstr\tr0, [sp, #72]\t; 0x48\n \tmov\tr0, fp\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #60]\t; 0x3c\n@@ -22537,15 +22537,15 @@\n \tadd\tr7, pc\n \tstr\tr7, [r0, #4]\n \tmovs\tr7, #0\n \tstr\tr7, [r0, #32]\n \tmovs\tr0, #1\n \tstr\tr0, [sp, #0]\n \tmov\tr0, r6\n-\tbl\t7d14 \n+\tbl\t7d14 \n \tldr\tr0, [sp, #80]\t; 0x50\n \tcbz\tr0, 1486c \n \tbl\t11bcc \n \tmov\tr0, r8\n \tbl\t10ac8 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n@@ -22565,90 +22565,90 @@\n \tbl\t10ac8 \n \tldr\tr0, [sp, #12]\n \tldr\tr3, [r0, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r0, #0]\n \tcmp\tr3, #0\n \tbne.w\t13d74 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t13d74 \n \tmov\tr0, r6\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t13e40 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tldr.w\tr3, [pc, #1988]\t; 15088 \n \tadd\tr3, pc\n \tldr\tr0, [r3, #52]\t; 0x34\n \tb.w\t13e70 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t13f6a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t13eca \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1416a \n \tmov\tr0, r6\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1415e \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t1409e \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t14080 \n \tmov\tr0, r9\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.w\t14074 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t144c6 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1436a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1435a \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1434a \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1432c \n \tmov\tr0, sl\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t14320 \n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t14186 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t145ca \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t147d0 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t1487c \n-\tblx\t4758 \n+\tblx\t475c \n \tcmp\tr0, #0\n \tbeq.w\t14c0e \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr4, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr.w\tr3, [pc, #1824]\t; 1508c \n \tmov\tr0, r4\n \tldr.w\tr2, [pc, #1824]\t; 15090 \n \tadd\tr2, pc\n \tldr\tr1, [r5, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n-\tblx\t4508 \n+\tblx\t47d8 <__cxa_throw@plt>\n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tr6, r4\n \tstr\tr4, [sp, #60]\t; 0x3c\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.w\t140ea \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tr9, r4\n \tstr\tr4, [sp, #64]\t; 0x40\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.w\t13fea \n \tmov\tr2, r3\n@@ -22670,15 +22670,15 @@\n \tbeq.w\t14b02 \n \tcmp\tr3, r1\n \tit\tcs\n \tmovcs\tr3, r1\n \tlsls\tr3, r3, #4\n \tstr\tr3, [sp, #24]\n \tmov\tr0, r3\n-\tblx\t415c \n+\tblx\t4160 \n \tldr\tr3, [sp, #24]\n \tadd.w\tip, r0, #16\n \tstr\tr0, [sp, #20]\n \tadd\tr3, r0\n \tstr\tr3, [sp, #32]\n \tldr\tr3, [r7, #20]\n \tstr\tr3, [sp, #24]\n@@ -22711,64 +22711,64 @@\n \tadd.w\tip, r3, r2\n \tldr\tr2, [sp, #16]\n \tcbz\tr2, 14a4a \n \tldr\tr3, [sp, #24]\n \tmov\tr0, r2\n \tstr.w\tip, [sp, #16]\n \tsubs\tr1, r3, r2\n-\tblx\t4390 \n+\tblx\t4394 \n \tldr.w\tip, [sp, #16]\n \tldr\tr3, [sp, #20]\n \tstrd\tr3, ip, [r7, #12]\n \tldr\tr3, [sp, #32]\n \tstr\tr3, [r7, #20]\n \tb.n\t14574 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tsl, r4\n \tstr\tr4, [sp, #56]\t; 0x38\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.w\t141d2 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tsl, r4\n \tstr\tr4, [sp, #72]\t; 0x48\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.n\t14444 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tsl, r4\n \tstr\tr4, [sp, #64]\t; 0x40\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.n\t144fa \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tr7, r4\n \tstr\tr4, [sp, #72]\t; 0x48\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.n\t14604 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tr7, r4\n \tstr\tr4, [sp, #72]\t; 0x48\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.n\t146ae \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tr7, r4\n \tstr\tr4, [sp, #72]\t; 0x48\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.n\t14758 \n-\tblx\t4508 \n+\tblx\t450c \n \tldr\tr3, [r4, #0]\n \tmov\tr7, r4\n \tstr\tr4, [sp, #72]\t; 0x48\n \tadds\tr3, #1\n \tstr\tr3, [r4, #0]\n \tb.n\t14806 \n \tldr.w\tr2, [pc, #1484]\t; 15098 \n@@ -22778,22 +22778,22 @@\n \tblx\tr1\n \tldr.w\tr1, [pc, #1476]\t; 1509c \n \tmov\tr3, r0\n \tmovs\tr2, #9\n \tmovt\tr2, #256\t; 0x100\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tblx\t4380 \n-\tblx\t487c \n+\tblx\t4384 \n+\tblx\t4880 \n \tldr.w\tr3, [pc, #1456]\t; 150a0 \n \tldr.w\tr1, [pc, #1456]\t; 150a4 \n \tadd\tr1, pc\n \tldr\tr3, [r5, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tb.w\t13eb0 \n \tmov.w\tip, #16\n \tmov\tr0, r3\n \tstr\tr3, [sp, #32]\n \tstr\tr3, [sp, #20]\n \tb.n\t149e8 \n \tmovs\tr2, #1\n@@ -22814,22 +22814,22 @@\n \tstr.w\tsl, [r7, #16]\n \tb.n\t14546 \n \tldr.w\tr3, [pc, #1360]\t; 15098 \n \tldr.w\tr1, [pc, #1376]\t; 150ac \n \tadd\tr1, pc\n \tldr\tr3, [r5, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tldr\tr3, [r4, #0]\n \tsubs\tr3, #1\n \tstr\tr3, [r4, #0]\n \tcmp\tr3, #0\n \tbne.n\t14ae8 \n \tmov\tr0, r4\n-\tblx\t4418 <_Py_Dealloc@plt+0x4>\n+\tblx\t441c <_Py_Dealloc@plt+0x4>\n \tb.n\t14ae8 \n \tldr\tr3, [sp, #16]\n \tmov\tr2, fp\n \tstr\tr3, [sp, #0]\n \tadd.w\tr0, r7, #12\n \tldr\tr3, [sp, #20]\n \tbl\t11ad8 \n@@ -22842,56 +22842,56 @@\n \tldr\tr4, [r3, #0]\n \tblx\tr1\n \tldr.w\tr1, [pc, #1308]\t; 150b0 \n \tmov\tr3, r0\n \tmovs\tr2, #13\n \tmov\tr0, r4\n \tadd\tr1, pc\n-\tblx\t4380 \n+\tblx\t4384 \n \tb.n\t14ae8 \n \tldr.w\tr3, [pc, #1268]\t; 15098 \n \tldr.w\tr1, [pc, #1292]\t; 150b4 \n \tadd\tr1, pc\n \tldr\tr3, [r5, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t4380 \n+\tblx\t4384 \n \tb.n\t14ae8 \n \tldr.w\tr3, [pc, #1248]\t; 15098 \n \tldr.w\tr1, [pc, #1276]\t; 150b8 \n \tadd\tr1, pc\n \tldr\tr3, [r5, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t4380 \n+\tblx\t4384 \n \tb.n\t14ae8 \n \tldr.w\tr3, [pc, #1264]\t; 150bc \n \tldr.w\tr1, [pc, #1264]\t; 150c0 \n \tadd\tr1, pc\n \tldr\tr3, [r5, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tb.n\t14ae8 \n \tldr.w\tr3, [pc, #1208]\t; 15098 \n \tldr.w\tr1, [pc, #1248]\t; 150c4 \n \tadd\tr1, pc\n \tldr\tr3, [r5, r3]\n \tldr\tr0, [r3, #0]\n-\tblx\t45c0 \n+\tblx\t45c4 \n \tb.n\t14ae8 \n-\tblx\t4598 <__stack_chk_fail@plt>\n+\tblx\t459c <__stack_chk_fail@plt>\n \tmovw\tr3, #65520\t; 0xfff0\n \tmovt\tr3, #32767\t; 0x7fff\n \tmov\tr0, r3\n \tstr\tr3, [sp, #24]\n \tb.n\t149d4 \n \tldr.w\tr0, [pc, #1216]\t; 150c8 \n \tadd\tr0, pc\n-\tblx\t42f0 \n+\tblx\t42f4 \n \tldr.w\tr0, [pc, #1212]\t; 150cc \n \tadd\tr0, pc\n-\tbl\t4910 \n+\tbl\t4910 \n \tmov\tr6, r0\n \tadd\tr0, sp, #132\t; 0x84\n \tmov\tr4, r1\n \tbl\t10ac8 \n \tldr\tr0, [sp, #16]\n \tbl\t10ac8 \n \tmov\tr0, r6\n@@ -22905,55 +22905,55 @@\n \tmov\tr6, r0\n \tmov\tr4, r1\n \tldr\tr0, [sp, #16]\n \tbl\t10ac8 \n \tmov\tr0, r6\n \tmov\tr1, r4\n \tb.n\t14c2c \n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tldr.w\tr3, [pc, #1104]\t; 150a0 \n \tldr\tr1, [r0, #0]\n \tldr\tr2, [r5, r3]\n \tldr\tr3, [r1, #8]\n \tldr\tr4, [r2, #0]\n \tblx\tr3\n \tmov\tr1, r0\n \tmov\tr0, r4\n-\tblx\t45c0 \n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t45c4 \n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tldr\tr3, [sp, #40]\t; 0x28\n \tstr\tr3, [sp, #12]\n \tcmp\tr3, #0\n \tbeq.w\t13d74 \n \tmov\tr0, r3\n \tmovs\tr3, #0\n \tstr\tr3, [sp, #12]\n \tb.n\t1489e \n-\tblx\t4284 <__cxa_begin_catch@plt>\n+\tblx\t4288 <__cxa_begin_catch@plt>\n \tldr.w\tr3, [pc, #1056]\t; 150a0 \n \tldr\tr1, [r0, #0]\n \tldr\tr2, [r5, r3]\n \tldr\tr3, [r1, #8]\n \tldr\tr4, [r2, #0]\n \tblx\tr3\n \tmov\tr1, r0\n \tmov\tr0, r4\n-\tblx\t45c0 \n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t45c4 \n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\t14c66 \n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tadd\tr0, sp, #40\t; 0x28\n \tbl\t10ac8 \n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tb.n\t14c9e \n \tmov\tr4, r0\n-\tblx\t4774 <__cxa_end_catch@plt+0x4>\n+\tblx\t4778 <__cxa_end_catch@plt+0x4>\n \tb.n\t14c9e \n \tmov\tr6, r0\n \tvmov\tr0, s17\n \tmov\tr4, r1\n \tbl\t10ac8 \n \tadd\tr0, sp, #88\t; 0x58\n \tbl\t10ac8 \n@@ -23067,17 +23067,17 @@\n \tbl\t10ac8 \n \tvmov\tr0, s16\n \tbl\t10ac8 \n \tb.n\t14ce8 \n \tmov\tr3, r0\n \tmov\tr0, r4\n \tmov\tr4, r3\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r4\n-\tblx\t4804 <_Unwind_Resume@plt>\n+\tblx\t4808 <_Unwind_Resume@plt>\n \tmov\tr4, r0\n \tldr\tr0, [sp, #80]\t; 0x50\n \tmov\tr7, r1\n \tcmp\tr0, #0\n \tbeq.n\t14dcc \n \tbl\t11bcc \n \tb.n\t14dcc \n@@ -23120,32 +23120,32 @@\n \tmov\tr7, r1\n \tbl\t10ac8 \n \tb.n\t14ce8 \n \tmov\tr6, r0\n \tmov\tr4, r1\n \tb.n\t14cc2 \n \tmovs\tr0, #20\n-\tblx\t42c0 <__cxa_allocate_exception@plt>\n+\tblx\t42c4 <__cxa_allocate_exception@plt>\n \tmov\tr7, r0\n-\tbl\t4b94 \n+\tbl\t4b94 \n \tldr\tr3, [pc, #528]\t; (1508c )\n \tmov\tr0, r7\n \tldr\tr2, [pc, #592]\t; (150d0 )\n \tadd\tr2, pc\n \tldr\tr1, [r5, r3]\n-\tblx\t47d4 <__cxa_throw@plt>\n+\tblx\t47d8 <__cxa_throw@plt>\n \tmov\tr6, r0\n \tmov\tr4, r1\n \tvmov\tr0, s17\n \tbl\t10ac8 \n \tb.n\t14cc2 \n \tmov\tr6, r0\n \tmov\tr4, r1\n \tmov\tr0, r7\n-\tblx\t43d8 <__cxa_free_exception@plt>\n+\tblx\t43dc <__cxa_free_exception@plt>\n \tmov\tr0, r6\n \tmov\tr1, r4\n \tb.n\t14c2c \n \tb.n\t14c2c \n \tmov\tr6, r0\n \tmov\tr4, r1\n \tadd.w\tr9, sp, #52\t; 0x34\n"}, {"source1": "readelf --wide --decompress --hex-dump=.ARM.extab {}", "source2": "readelf --wide --decompress --hex-dump=.ARM.extab {}", "unified_diff": "@@ -1,44 +1,44 @@\n \n Hex dump of section '.ARM.extab':\n- 0x00016d88 10dafe7f b0ab0400 ff909c01 01544004 .............T@.\n+ 0x00016d88 14dafe7f b0ab0400 ff909c01 01544004 .............T@.\n 0x00016d98 6e175204 de0100a6 0104c601 00c00104 n.R.............\n 0x00016da8 d20100ce 01100000 e6010400 00fe0104 ................\n 0x00016db8 9e020098 0204a002 00b60204 d60200d0 ................\n 0x00016dc8 0204d802 00ee0204 8e030088 03049003 ................\n 0x00016dd8 009a0302 b80300b2 0304ba03 00c20304 ................\n 0x00016de8 00000b00 0a7d097d 087d077d 067d057d .....}.}.}.}.}.}\n 0x00016df8 047d037d 027d017d 007d0000 00000000 .}.}.}.}.}......\n 0x00016e08 84250100 e0240100 4c250100 60250100 .%...$..L%..`%..\n 0x00016e18 50250100 60250100 b0240100 18250100 P%..`%...$...%..\n- 0x00016e28 30250100 78240100 fcd3fe7f b0ad0a00 0%..x$..........\n+ 0x00016e28 30250100 78240100 00d4fe7f b0ad0a00 0%..x$..........\n 0x00016e38 ffff0114 22040000 3a04ec01 00a00148 ....\"...:......H\n- 0x00016e48 fa0100f6 01040000 dcd3fe7f b0ac0d00 ................\n+ 0x00016e48 fa0100f6 01040000 e0d3fe7f b0ac0d00 ................\n 0x00016e58 ffff011b 5e04b602 00a20104 9e0200e2 ....^...........\n 0x00016e68 01040000 8e0204b6 02009a02 1c000000 ................\n- 0x00016e78 b4d3fe7f b0a90800 ffff010e 224c0000 ............\"L..\n+ 0x00016e78 b8d3fe7f b0a90800 ffff010e 224c0000 ............\"L..\n 0x00016e88 76049401 00aa0104 00000000 08b10181 v...............\n- 0x00016e98 b0b00084 00000000 f8d8fe7f b0b0a800 ................\n- 0x00016ea8 ffff0100 80d3fe7f ad08b100 ffff010f ................\n+ 0x00016e98 b0b00084 00000000 fcd8fe7f b0b0a800 ................\n+ 0x00016ea8 ffff0100 84d3fe7f ad08b100 ffff010f ................\n 0x00016eb8 265c0000 d40104f2 0100fe01 04000000 &\\..............\n- 0x00016ec8 64d3fe7f a908b100 ffff010c 06040000 d...............\n- 0x00016ed8 16042800 24120000 b8d8fe7f b0ab0600 ..(.$...........\n+ 0x00016ec8 68d3fe7f a908b100 ffff010c 06040000 h...............\n+ 0x00016ed8 16042800 24120000 bcd8fe7f b0ab0600 ..(.$...........\n 0x00016ee8 ffff011d 3290018c 0200ee01 048c0200 ....2...........\n 0x00016ef8 fa010498 02008802 108c0200 a8020400 ................\n- 0x00016f08 00000000 8cd8fe7f c93f1001 b0b0af81 .........?......\n+ 0x00016f08 00000000 90d8fe7f c93f1001 b0b0af81 .........?......\n 0x00016f18 ffff0190 01281e00 00660ca4 0d007e04 .....(...f....~.\n 0x00016f28 ce0d00a2 010eaa0e 00be0104 920e00c8 ................\n 0x00016f38 01048a0d 00ea0176 aa0e00f0 0204e40d .......v........\n 0x00016f48 00b20304 f00d00da 0404f40d 00f00504 ................\n 0x00016f58 ae0e00b4 0604e80d 00ea0604 ec0d00ac ................\n 0x00016f68 0704980c 00ea0704 b20e009c 0804c60e ................\n 0x00016f78 009e0a04 980c00ba 0a04ae0e 00dc0b0e ................\n 0x00016f88 0000800c 04f00d00 880c04b2 0e00940c ................\n 0x00016f98 04e80d00 ca0d0400 00800e04 9a0e008e ................\n- 0x00016fa8 0e04960e 00000000 e8d7fe7f b0af1e00 ................\n+ 0x00016fa8 0e04960e 00000000 ecd7fe7f b0af1e00 ................\n 0x00016fb8 ffff019c 02500400 005e04e8 0e006c04 .....P...^....l.\n 0x00016fc8 bc0e008c 0104f40e 00920104 c00e00c4 ................\n 0x00016fd8 0104d80e 00b00204 cc0f00f8 020c880c ................\n 0x00016fe8 00ce03c0 01bc0e00 c005049c 0f00d205 ................\n 0x00016ff8 04f40b00 ee0528bc 0e00aa06 70f00b00 ......(.....p...\n 0x00017008 ac0704ac 0e00ce07 04bc0e00 de077aa2 ..............z.\n 0x00017018 0e00ea08 04f40f00 8e0904bc 0e009e09 ................\n@@ -49,31 +49,31 @@\n 0x00017068 840c0488 0c00aa0c 040000be 0c04ba0f ................\n 0x00017078 00ca0c04 b60f00de 0c04be0f 00f00c04 ................\n 0x00017088 e40d00b8 0d04e00d 00c40d04 d60d00d2 ................\n 0x00017098 0d04cc0f 00d40e04 bc0e00f0 0e04f80e ................\n 0x000170a8 008a0f04 a00f0098 0f04f40b 00f00f04 ................\n 0x000170b8 e80f0082 10048e10 008a1004 a20e009c ................\n 0x000170c8 1004aa10 00b81004 c41000c0 1004f00b ................\n- 0x000170d8 00000000 bcd6fe7f b0af0600 ffff0104 ................\n- 0x000170e8 1c640000 40d1fe7f b0b0aa00 ffff010c .d..@...........\n- 0x000170f8 04440000 54047600 6a1c0000 94d6fe7f .D..T.v.j.......\n+ 0x000170d8 00000000 c0d6fe7f b0af0600 ffff0104 ................\n+ 0x000170e8 1c640000 44d1fe7f b0b0aa00 ffff010c .d..D...........\n+ 0x000170f8 04440000 54047600 6a1c0000 98d6fe7f .D..T.v.j.......\n 0x00017108 b0af0e00 ff902501 1b1c0c00 004204a0 ......%......B..\n 0x00017118 0400f001 a2029604 019c0404 a40400b4 ................\n- 0x00017128 04040000 01000000 00000000 64d6fe7f ............d...\n+ 0x00017128 04040000 01000000 00000000 68d6fe7f ............h...\n 0x00017138 b0ac0300 ffff0129 2a2c0000 660ce401 .......)*,..f...\n 0x00017148 00a40102 0000d001 04800200 e0010400 ................\n 0x00017158 00f40104 0000fc01 04e40100 8c020400 ................\n- 0x00017168 00000000 c0d0fe7f b0af3a00 ffff016a ..........:....j\n+ 0x00017168 00000000 c4d0fe7f b0af3a00 ffff016a ..........:....j\n 0x00017178 20a40200 00c6020e ae0700dc 0204aa07 ...............\n 0x00017188 00f00204 a607008e 0304be07 00a20304 ................\n 0x00017198 ba0700b6 0304b607 00ca0304 b20700e8 ................\n 0x000171a8 0304a207 00f80304 8e05008a 04040000 ................\n 0x000171b8 90040e9e 0700a604 049a0700 ba040496 ................\n 0x000171c8 0700ce04 04920700 e204048e 0700f204 ................\n- 0x000171d8 04a80600 8a059e01 00000000 b4d5fe7f ................\n+ 0x000171d8 04a80600 8a059e01 00000000 b8d5fe7f ................\n 0x000171e8 80c93c01 b0b0b0af ff90dc02 01d0025a ..<............Z\n 0x000171f8 9a01a21c 00800204 fc1e00be 0304d61f ................\n 0x00017208 00dc030e ee1f00f2 0304ea1f 00920410 ................\n 0x00017218 e61f00a8 0404e21f 00b20404 ae1c00c4 ................\n 0x00017228 0510d61f 00b40604 a81d01a4 072ad61f .............*..\n 0x00017238 00800818 c41f00b8 0830941e 00d60904 .........0......\n 0x00017248 c01f00bc 0a04f21f 00ec0a04 d81d00b0 ................\n@@ -88,109 +88,109 @@\n 0x000172d8 04e81a00 d81904b2 1e00841a 14c01f00 ................\n 0x000172e8 9e1a04d6 1f00aa1a 04f01e00 be1a04ec ................\n 0x000172f8 1e00ce1a 04bc1e00 e41a04a8 1d018a1c ................\n 0x00017308 24c41f00 8e1d0400 00b81d04 c01f0090 $...............\n 0x00017318 1e04d61f 00f81e04 d61f0088 1f04a41f ................\n 0x00017328 00981f04 a21c00a0 1f04ae1f 00bc1f04 ................\n 0x00017338 941e00d2 1f04981e 00de1f04 d61f0001 ................\n- 0x00017348 00000000 00000000 48d4fe7f b0ae0500 ........H.......\n+ 0x00017348 00000000 00000000 4cd4fe7f b0ae0500 ........L.......\n 0x00017358 ffff012f 180c0000 6e04c402 007c04be .../....n....|..\n 0x00017368 02009e01 04a60200 ae01048e 0200c401 ................\n 0x00017378 0400008a 02049202 00a20204 0000ba02 ................\n- 0x00017388 20000000 0cd4fe7f b0af0400 ffff010a ...............\n- 0x00017398 4a42be01 00c80104 00000000 f4d3fe7f JB..............\n+ 0x00017388 20000000 10d4fe7f b0af0400 ffff010a ...............\n+ 0x00017398 4a42be01 00c80104 00000000 f8d3fe7f JB..............\n 0x000173a8 b0af0400 ffff0115 6004d803 00a601d4 ........`.......\n 0x000173b8 010000b2 03040000 e2030400 00000000 ................\n- 0x000173c8 d0d3fe7f b0af0800 ffff0130 220c0000 ...........0\"...\n+ 0x000173c8 d4d3fe7f b0af0800 ffff0130 220c0000 ...........0\"...\n 0x000173d8 7e04b003 008e0104 aa0300b2 0104fe02 ~...............\n 0x000173e8 00c20104 fa0200da 014c0000 f6020496 .........L......\n- 0x000173f8 03009203 040000a6 033c0000 94d3fe7f .........<......\n+ 0x000173f8 03009203 040000a6 033c0000 98d3fe7f .........<......\n 0x00017408 b0af0e00 ffff013c 201a0000 8e0104f4 .......< .......\n 0x00017418 03009e01 04ee0300 c20104d6 0300d201 ................\n 0x00017428 04be0300 ea015c00 00ce0204 820400ac ......\\.........\n 0x00017438 03040000 ba0304c2 0300d203 040000ea ................\n- 0x00017448 03320000 4cd3fe7f 80c92001 b0b0b0af .2..L..... .....\n+ 0x00017448 03320000 50d3fe7f 80c92001 b0b0b0af .2..P..... .....\n 0x00017458 ffff016f 220c0000 78049e14 00860104 ...o\"...x.......\n 0x00017468 8e1400ae 0104ca14 00be0104 c61400da ................\n 0x00017478 01b20300 00ec0650 da1400be 0804de14 .......P........\n 0x00017488 0094090e de1400a8 0a04ac14 00ec0a62 ...............b\n 0x00017498 ac1400f4 0c080000 801004e0 1300b010 ................\n 0x000174a8 040000f6 1104ac14 00dc1304 fa1300f6 ................\n 0x000174b8 13040000 8a140400 009a1412 0000c214 ................\n- 0x000174c8 04000000 60cdfe7f b0a90200 ffff0108 ....`...........\n- 0x000174d8 16042800 24140000 4ccdfe7f b0a90200 ..(.$...L.......\n- 0x000174e8 ffff0108 16042800 24140000 a4d2fe7f ......(.$.......\n- 0x000174f8 b0a90600 ffff0100 98d2fe7f b0a90600 ................\n- 0x00017508 ffff0100 8cd2fe7f b0ad0200 ffff011c ................\n+ 0x000174c8 04000000 64cdfe7f b0a90200 ffff0108 ....d...........\n+ 0x000174d8 16042800 24140000 50cdfe7f b0a90200 ..(.$...P.......\n+ 0x000174e8 ffff0108 16042800 24140000 a8d2fe7f ......(.$.......\n+ 0x000174f8 b0a90600 ffff0100 9cd2fe7f b0a90600 ................\n+ 0x00017508 ffff0100 90d2fe7f b0ad0200 ffff011c ................\n 0x00017518 2a02da04 00b00302 ee0400bc 0302e204 *...............\n- 0x00017528 008e0402 f60400de 04040000 64d2fe7f ............d...\n- 0x00017538 b0b0ac00 ffff0100 58d2fe7f a908b100 ........X.......\n- 0x00017548 ffff0100 4cd2fe7f b0aa0300 ffff0104 ....L...........\n- 0x00017558 1c040000 3cd2fe7f b0aa0300 ffff0104 ....<...........\n- 0x00017568 1c040000 2cd2fe7f b0af0600 ffff0109 ....,...........\n- 0x00017578 5e040000 d2020400 00000000 14d2fe7f ^...............\n+ 0x00017528 008e0402 f60400de 04040000 68d2fe7f ............h...\n+ 0x00017538 b0b0ac00 ffff0100 5cd2fe7f a908b100 ........\\.......\n+ 0x00017548 ffff0100 50d2fe7f b0aa0300 ffff0104 ....P...........\n+ 0x00017558 1c040000 40d2fe7f b0aa0300 ffff0104 ....@...........\n+ 0x00017568 1c040000 30d2fe7f b0af0600 ffff0109 ....0...........\n+ 0x00017578 5e040000 d2020400 00000000 18d2fe7f ^...............\n 0x00017588 b0af0a00 ff902d01 22126ecc 04008c01 ......-.\".n.....\n 0x00017598 04ba0401 b601049a 04008003 02cc0400 ................\n 0x000175a8 b6040400 00c80404 d0040001 00000000 ................\n- 0x000175b8 00000000 dcd1fe7f b0ae0300 ffff010b ................\n- 0x000175c8 9a0104ba 0100c401 04000000 c4d1fe7f ................\n- 0x000175d8 b0b0aa00 ffff0100 4cccfe7f a908b100 ........L.......\n+ 0x000175b8 00000000 e0d1fe7f b0ae0300 ffff010b ................\n+ 0x000175c8 9a0104ba 0100c401 04000000 c8d1fe7f ................\n+ 0x000175d8 b0b0aa00 ffff0100 50ccfe7f a908b100 ........P.......\n 0x000175e8 ffff0110 06040000 56046c00 64026800 ........V.l.d.h.\n- 0x000175f8 7e040000 30ccfe7f a908b100 ffff0111 ~...0...........\n+ 0x000175f8 7e040000 34ccfe7f a908b100 ffff0111 ~...4...........\n 0x00017608 0e040000 5e047400 6c027000 86010400 ....^.t.l.p.....\n- 0x00017618 00000000 7cd1fe7f b0b0aa00 ffff0100 ....|...........\n- 0x00017628 70d1fe7f ab08b100 ffff0100 64d1fe7f p...........d...\n- 0x00017638 ab08b100 ffff0100 58d1fe7f b0b0aa00 ........X.......\n- 0x00017648 ffff0100 4cd1fe7f b0b0aa00 ffff0100 ....L...........\n- 0x00017658 40d1fe7f ab08b100 ffff0100 34d1fe7f @...........4...\n- 0x00017668 ab08b100 ffff0100 28d1fe7f ab08b100 ........(.......\n- 0x00017678 ffff0100 1cd1fe7f ab08b100 ffff0100 ................\n- 0x00017688 10d1fe7f b0b0aa00 ffff0100 04d1fe7f ................\n- 0x00017698 b0b0aa00 ffff0100 8ccbfe7f a908b100 ................\n+ 0x00017618 00000000 80d1fe7f b0b0aa00 ffff0100 ................\n+ 0x00017628 74d1fe7f ab08b100 ffff0100 68d1fe7f t...........h...\n+ 0x00017638 ab08b100 ffff0100 5cd1fe7f b0b0aa00 ........\\.......\n+ 0x00017648 ffff0100 50d1fe7f b0b0aa00 ffff0100 ....P...........\n+ 0x00017658 44d1fe7f ab08b100 ffff0100 38d1fe7f D...........8...\n+ 0x00017668 ab08b100 ffff0100 2cd1fe7f ab08b100 ........,.......\n+ 0x00017678 ffff0100 20d1fe7f ab08b100 ffff0100 .... ...........\n+ 0x00017688 14d1fe7f b0b0aa00 ffff0100 08d1fe7f ................\n+ 0x00017698 b0b0aa00 ffff0100 90cbfe7f a908b100 ................\n 0x000176a8 ffff0110 06040000 56046c00 64026800 ........V.l.d.h.\n- 0x000176b8 7e040000 70cbfe7f a908b100 ffff0111 ~...p...........\n+ 0x000176b8 7e040000 74cbfe7f a908b100 ffff0111 ~...t...........\n 0x000176c8 0e040000 5e047400 6c027000 86010400 ....^.t.l.p.....\n- 0x000176d8 00000000 bcd0fe7f b0b0aa00 ffff0100 ................\n- 0x000176e8 b0d0fe7f ab08b100 ffff0100 a4d0fe7f ................\n- 0x000176f8 ab08b100 ffff0100 98d0fe7f b0b0aa00 ................\n- 0x00017708 ffff0100 8cd0fe7f b0b0aa00 ffff0100 ................\n- 0x00017718 80d0fe7f ab08b100 ffff0100 74d0fe7f ............t...\n- 0x00017728 ab08b100 ffff0100 68d0fe7f ab08b100 ........h.......\n- 0x00017738 ffff0100 5cd0fe7f ab08b100 ffff0100 ....\\...........\n- 0x00017748 50d0fe7f b0b0aa00 ffff0100 44d0fe7f P...........D...\n+ 0x000176d8 00000000 c0d0fe7f b0b0aa00 ffff0100 ................\n+ 0x000176e8 b4d0fe7f ab08b100 ffff0100 a8d0fe7f ................\n+ 0x000176f8 ab08b100 ffff0100 9cd0fe7f b0b0aa00 ................\n+ 0x00017708 ffff0100 90d0fe7f b0b0aa00 ffff0100 ................\n+ 0x00017718 84d0fe7f ab08b100 ffff0100 78d0fe7f ............x...\n+ 0x00017728 ab08b100 ffff0100 6cd0fe7f ab08b100 ........l.......\n+ 0x00017738 ffff0100 60d0fe7f ab08b100 ffff0100 ....`...........\n+ 0x00017748 54d0fe7f b0b0aa00 ffff0100 48d0fe7f T...........H...\n 0x00017758 b0b0aa00 ffff0108 0e040000 3e040000 ............>...\n- 0x00017768 30d0fe7f b0af1a00 ff904501 3c300e00 0.........E.<0..\n+ 0x00017768 34d0fe7f b0af1a00 ff904501 3c300e00 4.........E.<0..\n 0x00017778 00f00204 bc0a01ee 030c0000 a20404f2 ................\n 0x00017788 0a008e06 04ae0a01 e2080400 00a20a08 ................\n 0x00017798 ae0a01b8 0a04ce0a 00ca0a04 e20a00de ................\n 0x000177a8 0a040000 ea0a0400 00010000 00000000 ................\n- 0x000177b8 e0cffe7f b0af1a00 ff904501 3c300e00 ..........E.<0..\n+ 0x000177b8 e4cffe7f b0af1a00 ff904501 3c300e00 ..........E.<0..\n 0x000177c8 00f00204 bc0a01ee 030c0000 a20404f2 ................\n 0x000177d8 0a008e06 04ae0a01 e2080400 00a20a08 ................\n 0x000177e8 ae0a01b8 0a04ce0a 00ca0a04 e20a00de ................\n 0x000177f8 0a040000 ea0a0400 00010000 00000000 ................\n- 0x00017808 90cffe7f 80c90101 b0b0b0aa ffff010f ................\n+ 0x00017808 94cffe7f 80c90101 b0b0b0aa ffff010f ................\n 0x00017818 30660000 98010eb4 0100be01 04000000 0f..............\n- 0x00017828 70cffe7f 80c90501 b0b0b0ac ffff013c p..............<\n+ 0x00017828 74cffe7f 80c90501 b0b0b0ac ffff013c t..............<\n 0x00017838 4c8c0100 00ea0102 8a040084 024c0000 L............L..\n 0x00017848 ec020400 00f2020e e6030092 03040000 ................\n 0x00017858 98030e8e 0400cc03 04f40300 e203048a ................\n- 0x00017868 0400f003 1a000098 04040000 24cffe7f ............$...\n+ 0x00017868 0400f003 1a000098 04040000 28cffe7f ............(...\n 0x00017878 b0ab0200 ffff010f 2a680000 94010eb0 ........*h......\n- 0x00017888 0100ba01 04000000 08cffe7f b0ab0800 ................\n+ 0x00017888 0100ba01 04000000 0ccffe7f b0ab0800 ................\n 0x00017898 ffff012a 3a300000 7c02b402 00980104 ...*:0..|.......\n 0x000178a8 0000c601 220000ea 010eb802 009a0204 ....\"...........\n 0x000178b8 c60200b0 0204b402 00c2021a 00000000 ................\n- 0x000178c8 64c9fe7f a908b100 ffff0118 300a0000 d...........0...\n+ 0x000178c8 68c9fe7f a908b100 ffff0118 300a0000 h...........0...\n 0x000178d8 4604b201 005c2c00 00940104 c00100bc F....\\,.........\n- 0x000178e8 01040000 accefe7f c93f0a01 b0b0af80 .........?......\n+ 0x000178e8 01040000 b0cefe7f c93f0a01 b0b0af80 .........?......\n 0x000178f8 ffff0134 6a04a606 00cc0104 c80500dc ...4j...........\n 0x00017908 01049606 00aa0204 a005009a 0304b405 ................\n 0x00017918 00e60304 9a06008a 05029606 00960504 ................\n- 0x00017928 9a0600c4 05520000 68cefe7f c93f2801 .....R..h....?(.\n+ 0x00017928 9a0600c4 05520000 6ccefe7f c93f2801 .....R..l....?(.\n 0x00017938 b0b0af82 ff90f804 01d50428 040000d4 ...........(....\n 0x00017948 014cba30 07b603a2 01ac3307 f60604e0 .L.0......3.....\n 0x00017958 30078208 04a83409 a6080280 3409e408 0.....4.....4...\n 0x00017968 9201ac33 07ae0a5e 0000f60b 64ac3307 ...3...^....d.3.\n 0x00017978 880d04f2 3307da0e 3ce03007 ae0f04e0 ....3...<.0.....\n 0x00017988 3007d612 02ae2f09 ee1218cc 2f098a13 0...../...../...\n 0x00017998 04e03007 aa13048a 2c07da14 36e03007 ..0.....,...6.0.\n@@ -223,95 +223,95 @@\n 0x00017b48 35009833 04be3307 a83304ac 3307de33 5..3..3..3..3..3\n 0x00017b58 04fe3307 ee3304e0 3007a034 04f23307 ..3..3..0..4..3.\n 0x00017b68 e4340494 350df434 04dc350d e83504fe .4..5..4..5..5..\n 0x00017b78 350df635 04c4310d 94360498 3607b036 5..5..1..6..6..6\n 0x00017b88 04bc3600 ce3604ea 360dde36 04da350d ..6..6..6..6..5.\n 0x00017b98 0300027d 017d007d 047d0000 017d0000 ...}.}.}.}...}..\n 0x00017ba8 c4170100 00000000 68170100 f0160100 ........h.......\n- 0x00017bb8 e0cbfe7f 80c90a01 b0b0b0af ffff0150 ...............P\n+ 0x00017bb8 e4cbfe7f 80c90a01 b0b0b0af ffff0150 ...............P\n 0x00017bc8 44220000 7004c007 00b40168 00009603 D\"..p......h....\n 0x00017bd8 04a20700 a6030490 0700c803 04b00700 ................\n 0x00017be8 d80304d6 0700f203 6a0000b2 05340000 ........j....4..\n 0x00017bf8 e80504c0 07009806 6a00009e 07120000 ........j.......\n 0x00017c08 ca070400 00d20704 da0700ea 07040000 ................\n- 0x00017c18 80cbfe7f 80c90701 b0b0b0ac ffff0115 ................\n+ 0x00017c18 84cbfe7f 80c90701 b0b0b0ac ffff0115 ................\n 0x00017c28 2cba0100 00f60104 0000fc01 0ea60200 ,...............\n- 0x00017c38 b0020400 00000000 58cbfe7f b0a90600 ........X.......\n- 0x00017c48 ffff0104 22300000 48cbfe7f b0ac0700 ....\"0..H.......\n+ 0x00017c38 b0020400 00000000 5ccbfe7f b0a90600 ........\\.......\n+ 0x00017c48 ffff0104 22300000 4ccbfe7f b0ac0700 ....\"0..L.......\n 0x00017c58 ffff0115 28820100 00d60124 0000fc01 ....(......$....\n- 0x00017c68 0ea40200 ae020400 00000000 24cbfe7f ............$...\n+ 0x00017c68 0ea40200 ae020400 00000000 28cbfe7f ............(...\n 0x00017c78 a908b100 ffff010c 16040000 3e045000 ............>.P.\n- 0x00017c88 4c140000 0ccbfe7f b0ad1200 ffff017e L..............~\n+ 0x00017c88 4c140000 10cbfe7f b0ad1200 ffff017e L..............~\n 0x00017c98 3604ea05 006c04e6 0500d801 04fe0400 6....l..........\n 0x00017ca8 9602048c 0500b402 04a40600 c6020ca0 ................\n 0x00017cb8 0600f202 04f80500 be0304d4 04009a04 ................\n 0x00017cc8 04f80500 de040400 00ea0404 c20500fa ................\n 0x00017cd8 0404d404 00880504 0000ae05 04cc0500 ................\n 0x00017ce8 be0504e6 0500e205 040000f4 05040000 ................\n 0x00017cf8 8c0604cc 06009c06 04a00600 ac0604dc ................\n 0x00017d08 0600b806 04ec0600 c806048c 05000000 ................\n- 0x00017d18 80cafe7f b0ac0d00 ffff0121 3c048204 ...........!<...\n+ 0x00017d18 84cafe7f b0ac0d00 ffff0121 3c048204 ...........!<...\n 0x00017d28 004a1adc 0300f801 04f80300 8e022e82 .J..............\n 0x00017d38 04009803 04dc0300 f4030400 00000000 ................\n- 0x00017d48 50cafe7f b0ac0d00 ffff0126 24040000 P..........&$...\n+ 0x00017d48 54cafe7f b0ac0d00 ffff0126 24040000 T..........&$...\n 0x00017d58 626af203 00d4011a d60300e0 0204d603 bj..............\n 0x00017d68 00f60204 f603008c 0304f203 00ee0304 ................\n- 0x00017d78 00000000 1ccafe7f b0af0a00 ff902d01 ..............-.\n+ 0x00017d78 00000000 20cafe7f b0af0a00 ff902d01 .... .........-.\n 0x00017d88 22ca0104 0000ec01 04c40400 c00204d4 \"...............\n 0x00017d98 0401b804 08d40401 d0040400 00dc0404 ................\n- 0x00017da8 e0040001 00000000 00000000 78c4fe7f ............x...\n+ 0x00017da8 e0040001 00000000 00000000 7cc4fe7f ............|...\n 0x00017db8 a908b100 ffff010c 4a040000 52025600 ........J...R.V.\n- 0x00017dc8 62040000 60c4fe7f a908b100 ffff010c b...`...........\n- 0x00017dd8 52040000 5a025e00 6a040000 48c4fe7f R...Z.^.j...H...\n+ 0x00017dc8 62040000 64c4fe7f a908b100 ffff010c b...d...........\n+ 0x00017dd8 52040000 5a025e00 6a040000 4cc4fe7f R...Z.^.j...L...\n 0x00017de8 a908b100 ffff010c 4a040000 52025600 ........J...R.V.\n- 0x00017df8 62040000 30c4fe7f a908b100 ffff010c b...0...........\n- 0x00017e08 52040000 5a025e00 6a040000 84c9fe7f R...Z.^.j.......\n+ 0x00017df8 62040000 34c4fe7f a908b100 ffff010c b...4...........\n+ 0x00017e08 52040000 5a025e00 6a040000 88c9fe7f R...Z.^.j.......\n 0x00017e18 b0ad0e00 ff902d01 225604c4 0300dc01 ......-.\"V......\n 0x00017e28 04c00300 fa010280 0300a202 04f00201 ................\n 0x00017e38 fc0204b8 0300b403 04000001 00000000 ................\n- 0x00017e48 00000000 4cc9fe7f b0ad0e00 ff902d01 ....L.........-.\n+ 0x00017e48 00000000 50c9fe7f b0ad0e00 ff902d01 ....P.........-.\n 0x00017e58 225604cc 0300de01 04c80300 fc010286 \"V..............\n 0x00017e68 0300a402 04f60201 820304c0 0300bc03 ................\n- 0x00017e78 04000001 00000000 00000000 14c9fe7f ................\n+ 0x00017e78 04000001 00000000 00000000 18c9fe7f ................\n 0x00017e88 b0af1e00 ffff013a 54049009 00ac0104 .......:T.......\n 0x00017e98 ea090084 0204e209 00d00204 de09009c ................\n 0x00017ea8 0304da09 00e40304 d60900aa 0404d209 ................\n 0x00017eb8 00fa0404 e60900c0 051c9409 00ce0904 ................\n- 0x00017ec8 00000000 ccc8fe7f a908b100 ffff010c ................\n- 0x00017ed8 1a040000 3c044000 4e040000 b4c8fe7f ....<.@.N.......\n- 0x00017ee8 b0b0a800 ffff0100 a8c8fe7f b0af0800 ................\n+ 0x00017ec8 00000000 d0c8fe7f a908b100 ffff010c ................\n+ 0x00017ed8 1a040000 3c044000 4e040000 b8c8fe7f ....<.@.N.......\n+ 0x00017ee8 b0b0a800 ffff0100 acc8fe7f b0af0800 ................\n 0x00017ef8 ff902101 16300400 009401ce 01e60201 ..!..0..........\n 0x00017f08 ee0204f2 0200fa02 04000001 00000000 ................\n- 0x00017f18 00000000 7cc8fe7f b0b0ae00 ffff0105 ....|...........\n- 0x00017f28 ee010400 00000000 68c8fe7f b0b0ae00 ........h.......\n- 0x00017f38 ffff0100 f0c2fe7f b0b0ac00 ffff010f ................\n+ 0x00017f18 00000000 80c8fe7f b0b0ae00 ffff0105 ................\n+ 0x00017f28 ee010400 00000000 6cc8fe7f b0b0ae00 ........l.......\n+ 0x00017f38 ffff0100 f4c2fe7f b0b0ac00 ffff010f ................\n 0x00017f48 24280000 9c0104be 0100ca01 04000000 $(..............\n- 0x00017f58 40c8fe7f b0af1200 ffff0132 3804cc05 @..........28...\n+ 0x00017f58 44c8fe7f b0af1200 ffff0132 3804cc05 D..........28...\n 0x00017f68 005004b6 0500de01 04da0500 840204be .P..............\n 0x00017f78 05008c04 04cc0500 e8044eda 0500c805 ..........N.....\n 0x00017f88 040000d6 05040000 fc0504da 05000000 ................\n- 0x00017f98 00c8fe7f af08b100 ffff0100 f4c7fe7f ................\n+ 0x00017f98 04c8fe7f af08b100 ffff0100 f8c7fe7f ................\n 0x00017fa8 ad08b100 ff900d01 057040b8 01010100 .........p@.....\n- 0x00017fb8 00000000 dcc7fe7f 80c90c01 b0b0b0af ................\n+ 0x00017fb8 00000000 e0c7fe7f 80c90c01 b0b0b0af ................\n 0x00017fc8 ffff011d 7404d405 008801c0 02de0500 ....t...........\n 0x00017fd8 d00404ba 0500b605 04de0500 d0050400 ................\n- 0x00017fe8 00000000 acc7fe7f b0af0800 ffff0131 ...............1\n+ 0x00017fe8 00000000 b0c7fe7f b0af0800 ffff0131 ...............1\n 0x00017ff8 2a0e0000 8e0104e0 03009e01 04d80300 *...............\n 0x00018008 c20104c0 0300d201 04a80300 ea010400 ................\n 0x00018018 00a40304 ac0300bc 03040000 d4032200 ..............\".\n- 0x00018028 00000000 6cc7fe7f b0b0a800 ffff0100 ....l...........\n- 0x00018038 60c7fe7f b0ac0300 ffff0132 2e04d001 `..........2....\n+ 0x00018028 00000000 70c7fe7f b0b0a800 ffff0100 ....p...........\n+ 0x00018038 64c7fe7f b0ac0300 ffff0132 2e04d001 d..........2....\n 0x00018048 003e0ccc 01008c01 04d40100 a40104d0 .>..............\n 0x00018058 0100b001 04e80100 c00104cc 0100c801 ................\n 0x00018068 04fc0100 e4010400 00f80104 00000000 ................\n- 0x00018078 20c7fe7f b0b0aa00 ffff010c 22040000 ...........\"...\n- 0x00018088 4a045c00 58140000 9cc1fe7f a908b100 J.\\.X...........\n+ 0x00018078 24c7fe7f b0b0aa00 ffff010c 22040000 $...........\"...\n+ 0x00018088 4a045c00 58140000 a0c1fe7f a908b100 J.\\.X...........\n 0x00018098 ffff010c 2e100000 4a047000 601e0000 ........J.p.`...\n- 0x000180a8 f0c6fe7f ab08b100 ffff0100 e4c6fe7f ................\n- 0x000180b8 b0b0a800 ffff0100 d8c6fe7f 81c93601 ..............6.\n+ 0x000180a8 f4c6fe7f ab08b100 ffff0100 e8c6fe7f ................\n+ 0x000180b8 b0b0a800 ffff0100 dcc6fe7f 81c93601 ..............6.\n 0x000180c8 b0b0b0af ff90e003 01d60336 580000b6 ...........6X...\n 0x000180d8 0104f81c 00d00118 b01f00f8 0104ac20 ............... \n 0x000180e8 0082020c b0200080 0312b01f 00b003b0 ..... ..........\n 0x000180f8 02b41f00 82065000 00ec0752 0000d608 ......P....R....\n 0x00018108 048a1c00 c40904b0 1f00da09 04801d00 ................\n 0x00018118 ee0904fc 1c00820a 220000f2 0a1a961e ........\".......\n 0x00018128 00ec0b46 0000da0c 04a61e00 a20d04b8 ...F............\n@@ -334,15 +334,15 @@\n 0x00018238 8c1b0400 00a61b04 0000fe1b 04000086 ................\n 0x00018248 1c04981c 00941c04 0000a41c 0400009a ................\n 0x00018258 1d04a81d 00c61d3e 0000a21e 040000b2 .......>........\n 0x00018268 1e04ca1e 00c21e04 c61e00de 1e04e61e ................\n 0x00018278 00881f04 a01f0098 1f049c1f 00ca1f04 ................\n 0x00018288 de1f00da 1f04b81f 00f01f04 a0200080 ............. ..\n 0x00018298 2004b41f 008c2004 aa20009c 2004b41f ..... .. .. ...\n- 0x000182a8 00010000 00000000 e8c4fe7f 80c92601 ..............&.\n+ 0x000182a8 00010000 00000000 ecc4fe7f 80c92601 ..............&.\n 0x000182b8 b0b0b0af ff90d803 01c4031e b2010000 ................\n 0x000182c8 e8019c01 f222059e 03049e22 05e8033e .....\".....\"...>\n 0x000182d8 e41d05d0 0404841e 05da040a b62305fe .............#..\n 0x000182e8 0404c223 0588050a a42005a8 0504b020 ...#..... ..... \n 0x000182f8 05c00504 842205fa 052e9a23 05d60604 .....\".....#....\n 0x00018308 821f0590 0704b422 05a80704 d42205c4 .......\".....\"..\n 0x00018318 0704f422 05920804 8a2305be 0804d424 ...\".....#.....$\n@@ -365,11 +365,11 @@\n 0x00018428 05d41a04 e02405e4 1a048a24 05f41a04 .....$.....$....\n 0x00018438 d61f0584 1b04c823 059e1b96 01f22205 .......#......\".\n 0x00018448 c21c04e6 2105da1c 62f22205 d61d04e6 ....!...b.\".....\n 0x00018458 2105e01d 040000aa 1e04fa1e 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