{"diffoscope-json-version": 1, "source1": "/srv/reproducible-results/rbuild-debian/r-b-build.GJFIi3te/b1/ssocr_2.23.0-1_armhf.changes", "source2": "/srv/reproducible-results/rbuild-debian/r-b-build.GJFIi3te/b2/ssocr_2.23.0-1_armhf.changes", "unified_diff": null, "details": [{"source1": "Files", "source2": "Files", "unified_diff": "@@ -1,3 +1,3 @@\n \n- 675bbe4de47bb560871a49c11225a848 19208 debug optional ssocr-dbgsym_2.23.0-1_armhf.deb\n- 1fd5230b2a290387f2cbf3ecb1f4f10f 30204 graphics optional ssocr_2.23.0-1_armhf.deb\n+ f32820b808026781bfa4d40ad48da69c 19232 debug optional ssocr-dbgsym_2.23.0-1_armhf.deb\n+ 9993ebdd0178afa51f3ecaf7737e7321 30196 graphics optional ssocr_2.23.0-1_armhf.deb\n"}, {"source1": "ssocr_2.23.0-1_armhf.deb", "source2": "ssocr_2.23.0-1_armhf.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2023-05-07 14:34:53.000000 debian-binary\n -rw-r--r-- 0 0 0 816 2023-05-07 14:34:53.000000 control.tar.xz\n--rw-r--r-- 0 0 0 29196 2023-05-07 14:34:53.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 29188 2023-05-07 14:34:53.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -7,8 +7,8 @@\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/share/doc/ssocr/\n -rw-r--r-- 0 root (0) root (0) 2086 2023-05-01 17:36:47.000000 ./usr/share/doc/ssocr/README\n -rw-r--r-- 0 root (0) root (0) 446 2023-05-01 17:36:47.000000 ./usr/share/doc/ssocr/THANKS\n -rw-r--r-- 0 root (0) root (0) 635 2023-05-07 14:34:53.000000 ./usr/share/doc/ssocr/changelog.Debian.gz\n -rw-r--r-- 0 root (0) root (0) 1821 2023-05-07 14:34:53.000000 ./usr/share/doc/ssocr/copyright\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/share/man/\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/share/man/man1/\n--rw-r--r-- 0 root (0) root (0) 4760 2023-05-07 14:34:53.000000 ./usr/share/man/man1/ssocr.1.gz\n+-rw-r--r-- 0 root (0) root (0) 4759 2023-05-07 14:34:53.000000 ./usr/share/man/man1/ssocr.1.gz\n"}, {"source1": "./usr/bin/ssocr", "source2": "./usr/bin/ssocr", "comments": ["File has been modified after NT_GNU_BUILD_ID has been applied."], "unified_diff": null, "details": [{"source1": "readelf --wide --notes {}", "source2": "readelf --wide --notes {}", "unified_diff": "@@ -1,8 +1,8 @@\n \n Displaying notes found in: .note.gnu.build-id\n Owner Data size \tDescription\n- GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 6a2f89091918874128ee676bd3e60e5a658a1b54\n+ GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 60d78d618873facbc0ee2a3c1fc1786b0baea2ba\n \n Displaying notes found in: .note.ABI-tag\n Owner Data size \tDescription\n GNU 0x00000010\tNT_GNU_ABI_TAG (ABI version tag)\t OS: Linux, ABI: 3.2.0\n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {}", "unified_diff": "@@ -71,153 +71,153 @@\n \tandeq\tr0, r0, r4, lsl r1\n \tstrdeq\tr0, [r1], -r2\n \tstrdeq\tr0, [r1], -sl\n frame_dummy():\n \tsvclt\t0x0000e7c4\n \tandeq\tr0, r0, r0\n tmp_imgfile():\n-/build/1st/ssocr-2.23.0/ssocr.c:54\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:54\n \tumulllt\tfp, sp, r0, r5\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [ip], #-3176\t@ 0xfffff398\n \tldrbtmi\tr4, [sl], #-2664\t@ 0xfffff598\n \tldmpl\tr3, {r3, r5, r6, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, #1769472\t@ 0x1b0000\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:60\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:60\n \tcmnvs\tfp, r0, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:61\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:61\n \t\t\t@ instruction: 0x61bb2311\n-/build/1st/ssocr-2.23.0/ssocr.c:65\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:65\n \tldrbtmi\tr4, [fp], #-2916\t@ 0xfffff49c\n \t\t\t@ instruction: 0xf7ff4618\n \tteqvs\tr8, r6, lsr lr\n-/build/1st/ssocr-2.23.0/ssocr.c:66\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:66\n \tblcs\t1b764 <__bss_end__@@Base+0x94bc>\n \tldmdbvs\tr8!, {r0, r3, r4, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:66 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:66 (discriminator 1)\n \tmrc\t7, 4, APSR_nzcv, cr4, cr15, {7}\n \tldmibvs\tsl!, {r0, r9, sl, lr}\n \tmvnsvc\tpc, #82837504\t@ 0x4f00000\n \tmvnsvc\tpc, #217055232\t@ 0xcf00000\n \taddsmi\tr1, r9, #634880\t@ 0x9b000\n \tblmi\t16f5ec8 <__bss_end__@@Base+0x16e3c20>\n-/build/1st/ssocr-2.23.0/ssocr.c:67\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:67\n \tteqvs\tfp, fp, ror r4\n-/build/1st/ssocr-2.23.0/ssocr.c:68\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:68\n \tstmiapl\tr3!, {r1, r3, r4, r6, r8, r9, fp, lr}^\n \tbmi\t169b30c <__bss_end__@@Base+0x1689064>\n \tldmdbmi\tsl, {r1, r3, r4, r5, r6, sl, lr}^\n \t\t\t@ instruction: 0x46184479\n \tmcr\t7, 6, pc, cr6, cr15, {7}\t@ \n \tldmdbvs\tfp!, {r0, r2, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:70\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:70\n \ttstle\tr2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:71\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:71\n \tldrbtmi\tr4, [fp], #-2902\t@ 0xfffff4aa\n \tldmdavs\tfp!, {r0, r1, r3, r4, r5, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:73\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:73\n \torreq\tpc, r0, #3\n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:74\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:74\n \tstmiapl\tr3!, {r0, r1, r2, r3, r6, r8, r9, fp, lr}^\n \tldmdbvs\tsl!, {r0, r1, r3, r4, fp, sp, lr}\n \tldrbtmi\tr4, [r9], #-2385\t@ 0xfffff6af\n \t\t\t@ instruction: 0xf7ff4618\n \tldmdbvs\tr8!, {r1, r4, r5, r7, r9, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:76\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:76\n \tmcr\t7, 3, pc, cr6, cr15, {7}\t@ \n \tldmibvs\tsl!, {r3, r4, r5, r6, r7, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:77\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:77\n \tldrmi\tr6, [r3], #-2491\t@ 0xfffff645\n \teorsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/ssocr.c:78\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:78\n \tbvs\te096f0 <__bss_end__@@Base+0xdf7448>\n \tmcr\t7, 0, pc, cr14, cr15, {7}\t@ \n \trsbsvs\tr4, fp, #3145728\t@ 0x300000\n-/build/1st/ssocr-2.23.0/ssocr.c:79\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:79\n \tblcs\t1bce4 <__bss_end__@@Base+0x9a3c>\n \tblmi\t11f5718 <__bss_end__@@Base+0x11e3470>\n-/build/1st/ssocr-2.23.0/ssocr.c:80\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:80\n \t\t\t@ instruction: 0x4618447b\n \tmrc\t7, 0, APSR_nzcv, cr12, cr15, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:81\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:81\n \t\t\t@ instruction: 0xf7ff2063\n \tldmibvs\tsl!, {r2, r8, r9, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:83\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:83\n \tbvs\t1e1b7f4 <__bss_end__@@Base+0x1e0954c>\n \tmrc\t7, 2, APSR_nzcv, cr6, cr15, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:84\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:84\n \tldmibvs\tfp!, {r1, r3, r4, r5, r6, r9, fp, sp, lr}^\n \tldmibvs\tsl!, {r0, r1, r4, sl, lr}\n \tldrbtmi\tr4, [r9], #-2367\t@ 0xfffff6c1\n \t\t\t@ instruction: 0xf7ff4618\n \tldmdavs\tfp!, {r1, r2, r3, r6, r9, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:85\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:85\n \torreq\tpc, r0, #3\n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:86\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:86\n \tstmiapl\tr3!, {r2, r4, r5, r8, r9, fp, lr}^\n \tbvs\t1e9b3a4 <__bss_end__@@Base+0x1e890fc>\n \tldrbtmi\tr4, [r9], #-2361\t@ 0xfffff6c7\n \t\t\t@ instruction: 0xf7ff4618\n \teorscs\tlr, pc, ip, ror lr\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:89\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:89\n \tmrc\t7, 0, APSR_nzcv, cr14, cr15, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:90\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:90\n \t\t\t@ instruction: 0xf7ff6a78\n \tadcsvs\tlr, r8, #352\t@ 0x160\n-/build/1st/ssocr-2.23.0/ssocr.c:91\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:91\n \tblcs\t1be40 <__bss_end__@@Base+0x9b98>\n \tblmi\tcf7ba0 <__bss_end__@@Base+0xce58f8>\n-/build/1st/ssocr-2.23.0/ssocr.c:92\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:92\n \t\t\t@ instruction: 0x4618447b\n \tstcl\t7, cr15, [lr, #1020]!\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:93\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:93\n \t\t\t@ instruction: 0xf7ff2063\n \t\t\t@ instruction: 0xf107eed6\n-/build/1st/ssocr-2.23.0/ssocr.c:98\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:98\n \tandcs\tr0, r1, #1006632960\t@ 0x3c000000\n \tbvs\tfee12bd4 <__bss_end__@@Base+0xfee0092c>\n \tldcl\t7, cr15, [r6, #1020]!\t@ 0x3fc\n \tldmdbvs\tfp!, {r3, r4, r5, r6, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:99\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:99\n \tvstrle\td2, [ip, #-0]\n-/build/1st/ssocr-2.23.0/ssocr.c:97\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:97\n \tstmiapl\tr3!, {r1, r3, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf107681b\n \tandcs\tr0, r1, #15\n \t\t\t@ instruction: 0xf7ff2101\n \t\t\t@ instruction: 0x4603ee9e\n \tmvnle\tr2, r0, lsl #22\n \tsvclt\t0x0000e000\n-/build/1st/ssocr-2.23.0/ssocr.c:101\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:101\n \t\t\t@ instruction: 0xf7ff6ab8\n \tblmi\t8bcc78 <__bss_end__@@Base+0x8aa9d0>\n-/build/1st/ssocr-2.23.0/ssocr.c:102\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:102\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf7ff4618\n \t\t\t@ instruction: 0x4603ee96\n \ttstle\tr2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:102 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:102 (discriminator 1)\n \tblcs\t1b9a0 <__bss_end__@@Base+0x96f8>\n \tblmi\t7783e0 <__bss_end__@@Base+0x766138>\n-/build/1st/ssocr-2.23.0/ssocr.c:103\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:103\n \t\t\t@ instruction: 0x4618447b\n \tldc\t7, cr15, [lr, #1020]!\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:104\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:104\n \t\t\t@ instruction: 0xf7ff6a78\n \tstrdcs\tlr, [r3], #-216\t@ 0xffffff28\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:105\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:105\n \tmcr\t7, 5, pc, cr2, cr15, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:108\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:108\n \tldmdbmi\tr8, {r0, r1, r3, r4, r5, r6, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:54\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:54\n \tbmi\t2525b8 <__bss_end__@@Base+0x240310>\n-/build/1st/ssocr-2.23.0/ssocr.c:109\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:109\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-170\t@ 0xffffff56\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7ffd001\n \tldrmi\tlr, [r8], -r2, asr #28\n \t\t\t@ instruction: 0x46bd3734\n \tsvclt\t0x0000bd90\n@@ -235,15 +235,15 @@\n \tandeq\tfp, r0, r6, ror #16\n \tandeq\tfp, r0, lr, asr r8\n \tandeq\tfp, r0, r4, ror #16\n \tandeq\tr0, r0, r4, lsl #2\n \tandeq\tfp, r0, ip, lsr #16\n \tandeq\tr0, r1, r0, lsl fp\n scanline():\n-/build/1st/ssocr-2.23.0/ssocr.c:116\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:116\n \tumullslt\tfp, fp, r0, r5\t@ \n \tcmnvs\tr8, #0, 30\n \trscsvs\tr6, sl, #-469762048\t@ 0xe4000000\n \tsfm\tf6, 4, [r7, #748]\t@ 0x2ec\n \tsvcvs\t0x00bb0b02\n \tsvcvs\t0x00fb627b\n \t\t\t@ instruction: 0xf107623b\n@@ -253,227 +253,227 @@\n \t\t\t@ instruction: 0x3090f8d7\n \t\t\t@ instruction: 0xf8d7607b\n \tmlasvs\tfp, r4, r0, r3\n \tldrbtmi\tr4, [sl], #-2615\t@ 0xfffff5c9\n \tldmpl\tr3, {r0, r1, r2, r4, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x667b681b\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:118\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:118\n \tmvnsvs\tr6, #1028096\t@ 0xfb000\n \tldrtvs\tr6, [fp], #-2747\t@ 0xfffff545\n-/build/1st/ssocr-2.23.0/ssocr.c:119\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:119\n \tldrbtvs\tr2, [fp], #-768\t@ 0xfffffd00\n-/build/1st/ssocr-2.23.0/ssocr.c:120\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:120\n \tblcs\t1bd74 <__bss_end__@@Base+0x9acc>\n \tbvs\tffef5890 <__bss_end__@@Base+0xffee35e8>\n-/build/1st/ssocr-2.23.0/ssocr.c:120 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:120 (discriminator 1)\n \tbvs\tfeef9490 <__bss_end__@@Base+0xfeee71e8>\n-/build/1st/ssocr-2.23.0/ssocr.c:120 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:120 (discriminator 4)\n \tcfldrsvs\tmvf6, [sl], #748\t@ 0x2ec\n-/build/1st/ssocr-2.23.0/ssocr.c:121 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:121 (discriminator 4)\n \tldrmi\tr6, [r3], #-2683\t@ 0xfffff585\n \tcfldrsvs\tmvf6, [fp], #1004\t@ 0x3ec\n-/build/1st/ssocr-2.23.0/ssocr.c:122 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:122 (discriminator 4)\n \tldrht\tr6, [sp], -fp\n-/build/1st/ssocr-2.23.0/ssocr.c:123\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:123\n \tblcs\t1bd90 <__bss_end__@@Base+0x9ae8>\n \tblvs\tfeef58b0 <__bss_end__@@Base+0xfeee3608>\n-/build/1st/ssocr-2.23.0/ssocr.c:123 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:123 (discriminator 1)\n \tstrd\tr6, [r1], -fp\n-/build/1st/ssocr-2.23.0/ssocr.c:124\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:124\n \tldrtvs\tr6, [fp], #-3003\t@ 0xfffff445\n-/build/1st/ssocr-2.23.0/ssocr.c:125\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:125\n \tcmpeq\tr4, #-1073741823\t@ 0xc0000001\t@ \n \tldcvs\t6, cr4, [r9], #-104\t@ 0xffffff98\n \t\t\t@ instruction: 0xf7ff6bf8\n \t\t\t@ instruction: 0xf107ee00\n-/build/1st/ssocr-2.23.0/ssocr.c:126\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:126\n \tldmdavs\tr9!, {r2, r4, r6, r8, r9}^\n \t\t\t@ instruction: 0xf0094618\n \tldrvs\tpc, [r8, #-2313]!\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/ssocr.c:127\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:127\n \tbleq\tbcb2c <__bss_end__@@Base+0xaa884>\n \t\t\t@ instruction: 0xf0076d38\n \tstrmi\tpc, [r3], -pc, lsr #22\n \tandsle\tr2, ip, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:128\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:128\n \t\t\t@ instruction: 0xf003683b\n \tblcs\t2104 \n \tblvs\tef5538 <__bss_end__@@Base+0xee3290>\n-/build/1st/ssocr-2.23.0/ssocr.c:129\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:129\n \t\t\t@ instruction: 0x4618681b\n \tldcl\t7, cr15, [sl, #1020]\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:130\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:130\n \tldmdbvs\tr9!, {r3, r4, r5, r8, fp, sp, lr}^\n \tldmibvs\tfp!, {r1, r3, r4, r5, r7, r8, fp, sp, lr}^\n \tmrc\t7, 0, APSR_nzcv, cr0, cr15, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:131\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:131\n \tlfmvs\tf2, 4, [r9], #-0\n \t\t\t@ instruction: 0xf7ff6bf8\n \tblvs\t1efca20 <__bss_end__@@Base+0x1eea778>\n-/build/1st/ssocr-2.23.0/ssocr.c:132\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:132\n \t\t\t@ instruction: 0x4618681b\n \tstcl\t7, cr15, [sl, #1020]\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:134\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:134\n \tmovwcc\tr6, #7291\t@ 0x1c7b\n \tblvs\tfeeda704 <__bss_end__@@Base+0xfeec845c>\n-/build/1st/ssocr-2.23.0/ssocr.c:122 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:122 (discriminator 2)\n \t\t\t@ instruction: 0x63bb3301\n-/build/1st/ssocr-2.23.0/ssocr.c:122 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:122 (discriminator 1)\n \tvldmiavs\tfp!, {d22-}\n \tlfmle\tf4, 4, [sp, #616]!\t@ 0x268\n-/build/1st/ssocr-2.23.0/ssocr.c:137\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:137\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r6, sl, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:116\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:116\n \tbmi\t212710 <__bss_end__@@Base+0x200468>\n-/build/1st/ssocr-2.23.0/ssocr.c:138\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:138\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror lr\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7ffd001\n \t\t\t@ instruction: 0x4618ed96\n \tldrtmi\tr3, [sp], ip, ror #14\n \tsvclt\t0x0000bd90\n \tandeq\tr0, r1, r6, ror sl\n \tandeq\tr0, r0, r0, lsl #2\n \t\t\t@ instruction: 0x000109b8\n print_spaces():\n-/build/1st/ssocr-2.23.0/ssocr.c:142\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:142\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\t4d9644 <__bss_end__@@Base+0x4c739c>\n \tblmi\t4d274c <__bss_end__@@Base+0x4c04a4>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tmovwcs\tr0, #768\t@ 0x300\n-/build/1st/ssocr-2.23.0/ssocr.c:144\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:144\n \tstrh\tr6, [r6], -fp\n-/build/1st/ssocr-2.23.0/ssocr.c:145 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:145 (discriminator 3)\n \teorcs\tr6, r0, r9, ror r8\n \tstc\t7, cr15, [r2, #1020]\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:144 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:144 (discriminator 3)\n \tmovwcc\tr6, #6331\t@ 0x18bb\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:144 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:144 (discriminator 1)\n \taddsmi\tr6, sl, #3866624\t@ 0x3b0000\n \tsvclt\t0x0000dbf4\n-/build/1st/ssocr-2.23.0/ssocr.c:142\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:142\n \tldrbtmi\tr4, [sl], #-2569\t@ 0xfffff5f7\n-/build/1st/ssocr-2.23.0/ssocr.c:147\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:147\n \tldmpl\tr3, {r0, r1, r2, r8, r9, fp, lr}^\n \tldmvs\tfp!, {r1, r3, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f405a\n \tandle\tr0, r1, r0, lsl #6\n \tstcl\t7, cr15, [r2, #-1020]!\t@ 0xfffffc04\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n \tandeq\tr0, r1, r0, lsl #19\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr0, r1, r2, asr r9\n parse_width_height():\n-/build/1st/ssocr-2.23.0/ssocr.c:151\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:151\n \tumulllt\tfp, r9, r0, r5\n \trsbsvs\tsl, r8, r0, lsl #30\n \tmcrrmi\t0, 3, r6, r9, cr9\n \tbmi\t12527b8 <__bss_end__@@Base+0x1240510>\n \tblmi\t12527b4 <__bss_end__@@Base+0x124050c>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f61fb\n \tldmdavs\tfp!, {r8, r9}^\n-/build/1st/ssocr-2.23.0/ssocr.c:156\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:156\n \tandle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:156 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:156 (discriminator 1)\n \tblcs\t1b6cc <__bss_end__@@Base+0x9424>\n \tblmi\t1135a0c <__bss_end__@@Base+0x1123764>\n-/build/1st/ssocr-2.23.0/ssocr.c:157\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:157\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, ip, lsr r2\n \tldrbtmi\tr4, [r8], #-2114\t@ 0xfffff7be\n \tldc\t7, cr15, [r0, #-1020]\t@ 0xfffffc04\n-/build/1st/ssocr-2.23.0/ssocr.c:159\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:159\n \trsb\tr2, r7, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:161\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:161\n \t\t\t@ instruction: 0xf7ff6878\n \tldrsbtvs\tlr, [r8], r6\n-/build/1st/ssocr-2.23.0/ssocr.c:162\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:162\n \tblcs\t1b8f0 <__bss_end__@@Base+0x9648>\n \tblmi\tef5a30 <__bss_end__@@Base+0xee3788>\n-/build/1st/ssocr-2.23.0/ssocr.c:163\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:163\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, ip, lsr r2\n \tldrbtmi\tr4, [r8], #-2106\t@ 0xfffff7c6\n \tldcl\t7, cr15, [lr], #1020\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:165\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:165\n \tsubs\tr2, r5, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:167\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:167\n \trscsvs\tr6, fp, fp, ror r8\n-/build/1st/ssocr-2.23.0/ssocr.c:168\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:168\n \tldmdavs\tr8!, {r3, r4, r5, r6, r8, sp}^\n \tstcl\t7, cr15, [r0], #-1020\t@ 0xfffffc04\n \tldmdbvs\tfp!, {r3, r4, r5, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:169\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:169\n \ttstle\tsl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:170\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:170\n \tstmiapl\tr3!, {r4, r5, r8, r9, fp, lr}^\n \teorscs\tr6, r0, #1769472\t@ 0x1b0000\n \tldmdami\tr1!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7ff4478\n \tmovwcs\tlr, #7402\t@ 0x1cea\n-/build/1st/ssocr-2.23.0/ssocr.c:171\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:171\n \tldmvs\tsl!, {r6, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:173\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:173\n \taddsmi\tr6, sl, #966656\t@ 0xec000\n \tblmi\ta75a78 <__bss_end__@@Base+0xa637d0>\n-/build/1st/ssocr-2.23.0/ssocr.c:174\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:174\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r9, lsr r2\n \tldrbtmi\tr4, [r8], #-2090\t@ 0xfffff7d6\n \tldcl\t7, cr15, [sl], {255}\t@ 0xff\n-/build/1st/ssocr-2.23.0/ssocr.c:175\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:175\n \teors\tr2, r1, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:177\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:177\n \tmovwcc\tr6, #6459\t@ 0x193b\n \tldmdbvs\tfp!, {r0, r1, r3, r4, r5, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:178\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:178\n \tblcs\t1f6dc <__bss_end__@@Base+0xd434>\n \tblmi\t835a9c <__bss_end__@@Base+0x8237f4>\n-/build/1st/ssocr-2.23.0/ssocr.c:179\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:179\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, sl, lsr r2\n \tldrbtmi\tr4, [r8], #-2082\t@ 0xfffff7de\n \tstcl\t7, cr15, [r8], {255}\t@ 0xff\n-/build/1st/ssocr-2.23.0/ssocr.c:180\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:180\n \tands\tr2, pc, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:182\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:182\n \t\t\t@ instruction: 0xf7ff68f8\n \tldrhvs\tlr, [r8, #-194]!\t@ 0xffffff3e\n-/build/1st/ssocr-2.23.0/ssocr.c:183\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:183\n \t\t\t@ instruction: 0xf7ff6938\n \t\t\t@ instruction: 0x61b8ecae\n-/build/1st/ssocr-2.23.0/ssocr.c:184\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:184\n \tblcs\t1bc88 <__bss_end__@@Base+0x99e0>\n \tldmibvs\tfp!, {r1, r8, sl, fp, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:184 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:184 (discriminator 1)\n \t\t\t@ instruction: 0xdc0a2b00\n-/build/1st/ssocr-2.23.0/ssocr.c:185\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:185\n \tstmiapl\tr3!, {r0, r1, r4, r8, r9, fp, lr}^\n \tldmibvs\tfp!, {r3, r4, fp, sp, lr}\n \tldmdbmi\tr7, {r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7ff4479\n \tmovwcs\tlr, #7362\t@ 0x1cc2\n-/build/1st/ssocr-2.23.0/ssocr.c:188\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:188\n \tldmdavs\tfp!, {r1, r2, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:190\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:190\n \tandsvs\tr6, sl, sl, ror r9\n-/build/1st/ssocr-2.23.0/ssocr.c:191\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:191\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, fp, sp, lr}\n \tmovwcs\tr6, #90\t@ 0x5a\n-/build/1st/ssocr-2.23.0/ssocr.c:151\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:151\n \tldrbtmi\tr4, [r9], #-2321\t@ 0xfffff6ef\n-/build/1st/ssocr-2.23.0/ssocr.c:193\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:193\n \tstmpl\tsl, {r3, r9, fp, lr}\n \tldmibvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tstcl\t7, cr15, [r4], {255}\t@ 0xff\n \t\t\t@ instruction: 0x37244618\n \tldclt\t6, cr4, [r0, #756]\t@ 0x2f4\n@@ -485,103 +485,103 @@\n \tandeq\tfp, r0, r6, asr #12\n \tandeq\tfp, r0, ip, asr r6\n \tandeq\tfp, r0, r2, ror r6\n \tandeq\tfp, r0, sl, lsl #13\n \tmuleq\tr0, r4, r6\n \tandeq\tr0, r1, r6, lsl r8\n parse_interval():\n-/build/1st/ssocr-2.23.0/ssocr.c:198\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:198\n \tumulllt\tfp, r7, r0, r5\n \trsbsvs\tsl, r8, r0, lsl #30\n \tmcrrmi\t0, 3, r6, r2, cr9\n \tbmi\t1092914 <__bss_end__@@Base+0x108066c>\n \tblmi\t1092910 <__bss_end__@@Base+0x1080668>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f617b\n \tldmdavs\tfp!, {r8, r9}^\n-/build/1st/ssocr-2.23.0/ssocr.c:202\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:202\n \ttstle\tsl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:203\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:203\n \tstmiapl\tr3!, {r1, r2, r3, r4, r5, r8, r9, fp, lr}^\n \teorscs\tr6, r0, #1769472\t@ 0x1b0000\n \tldmdami\tsp!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7ff4478\n \tmovwcs\tlr, #7270\t@ 0x1c66\n-/build/1st/ssocr-2.23.0/ssocr.c:204\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:204\n \tldmdavs\tr8!, {r0, r1, r3, r4, r6, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:206\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:206\n \tmcrr\t7, 15, pc, lr, cr15\t@ \n \tldmvs\tfp!, {r3, r4, r5, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:207\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:207\n \tsvccc\t0x00fff1b3\n \tldmdavs\tfp!, {r3, r8, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:208\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:208\n \tldrhvs\tr6, [sl], #-138\t@ 0xffffff76\n \tldmdavs\tsl, {r0, r1, r3, r4, r5, fp, sp, lr}^\n \tandsvs\tr6, sl, fp, lsr r8\n-/build/1st/ssocr-2.23.0/ssocr.c:209\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:209\n \tsub\tr2, sl, r0, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:211\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:211\n \tblcs\t1ba60 <__bss_end__@@Base+0x97b8>\n \tblmi\tbf87a0 <__bss_end__@@Base+0xbe64f8>\n-/build/1st/ssocr-2.23.0/ssocr.c:212\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:212\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r9, lsr r2\n \tldrbtmi\tr4, [r8], #-2094\t@ 0xfffff7d2\n \tmcrr\t7, 15, pc, r6, cr15\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:213\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:213\n \teors\tr2, ip, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:215\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:215\n \tldmdavs\tr8!, {r0, r2, r3, r5, r8, sp}^\n \tbl\tfeabf790 <__bss_end__@@Base+0xfeaad4e8>\n \tldmvs\tfp!, {r3, r4, r5, r6, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:216\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:216\n \ttstle\tr8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:217\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:217\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, fp, sp, lr}\n \tldmdavs\tfp!, {r1, r3, r4, r6, sp, lr}\n \tldmdavs\tfp!, {r1, r3, r4, r6, fp, sp, lr}\n \tmovwcs\tr6, #26\n-/build/1st/ssocr-2.23.0/ssocr.c:218\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:218\n \tldmvs\tsl!, {r0, r1, r3, r5, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:220\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:220\n \taddsmi\tr6, sl, #8060928\t@ 0x7b0000\n \tblmi\t7f5be0 <__bss_end__@@Base+0x7e3938>\n-/build/1st/ssocr-2.23.0/ssocr.c:221\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:221\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r5, lsr r2\n \tldrbtmi\tr4, [r8], #-2079\t@ 0xfffff7e1\n \tstc\t7, cr15, [r6], #-1020\t@ 0xfffffc04\n-/build/1st/ssocr-2.23.0/ssocr.c:222\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:222\n \tands\tr2, ip, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:224\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:224\n \tmovwcc\tr6, #6395\t@ 0x18fb\n \tldmvs\tr8!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}^\n \tstc\t7, cr15, [ip], {255}\t@ 0xff\n \tldmdbvs\tsl!, {r3, r4, r5, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:225\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:225\n \taddsmi\tr6, sl, #12255232\t@ 0xbb0000\n \tblmi\t53800c <__bss_end__@@Base+0x525d64>\n-/build/1st/ssocr-2.23.0/ssocr.c:226\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:226\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r0, lsr r2\n \tldrbtmi\tr4, [r8], #-2069\t@ 0xfffff7eb\n \tldc\t7, cr15, [r0], {255}\t@ 0xff\n-/build/1st/ssocr-2.23.0/ssocr.c:227\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:227\n \tand\tr2, r6, r1, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:229\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:229\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, fp, sp, lr}\n \tldmdavs\tfp!, {r1, r3, r4, sp, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:230\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:230\n \tsubsvs\tr6, sl, sl, lsr r9\n-/build/1st/ssocr-2.23.0/ssocr.c:231\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:231\n \tldmdbmi\tr0, {r8, r9, sp}\n-/build/1st/ssocr-2.23.0/ssocr.c:198\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:198\n \tbmi\t2529f0 <__bss_end__@@Base+0x240748>\n-/build/1st/ssocr-2.23.0/ssocr.c:232\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:232\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror r9\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7ffd001\n \tldrmi\tlr, [r8], -r6, lsr #24\n \tssatmi\tr3, #30, ip, lsl #14\n \tsvclt\t0x0000bd90\n@@ -591,203 +591,203 @@\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tfp, r0, r0, asr #12\n \tandeq\tfp, r0, r6, lsr r6\n \tandeq\tfp, r0, r2, lsr r6\n \tandeq\tfp, r0, lr, lsr r6\n \tldrdeq\tr0, [r1], -r8\n main():\n-/build/1st/ssocr-2.23.0/ssocr.c:237\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:237\n \tmvnsmi\tlr, #737280\t@ 0xb4000\n \tsvcge\t0x000ab0f1\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf5076018\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, r9, r4, asr #7\n \tusatmi\tpc, #16, pc, asr #17\t@ \n \t\t\t@ instruction: 0xf8df447c\n \tldrbtmi\tr2, [sl], #-1776\t@ 0xfffff910\n \tusatcc\tpc, #12, pc, asr #17\t@ \n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \torrscc\tpc, r4, r7, asr #17\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:238\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:238\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:239\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:239\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73baf5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:240\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:240\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:241\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:241\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bcf5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:242\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:242\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b8f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:243\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:243\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b6f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:246\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:246\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73aef5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:247\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:247\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tandsvs\tr2, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:248\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:248\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73aaf5a3\n \tandsvs\tr2, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:253\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:253\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a6f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:254\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:254\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a4f5a3\n \tandsvs\tr2, sl, r3, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:255\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:255\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a2f5a3\n \tandsvs\tr2, sl, r2, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:256\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:256\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r5, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:257\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:257\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, lr, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r2, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:258\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:258\n \tmsrvs\tCPSR_s, #-268435456\t@ 0xf0000000\n \tmovwcs\tlr, #2515\t@ 0x9d3\n \tmovtcs\tlr, #43463\t@ 0xa9c7\n-/build/1st/ssocr-2.23.0/ssocr.c:259\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:259\n \tandeq\tpc, r0, #79\t@ 0x4f\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \tmovteq\tpc, #37572\t@ 0x92c4\t@ \n \tmovtcs\tlr, #51655\t@ 0xc9c7\n-/build/1st/ssocr-2.23.0/ssocr.c:262\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:262\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, ip, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:263\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:263\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, sl, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:264\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:264\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r8, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:265\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:265\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:266\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:266\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:267\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:267\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r2, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:270\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:270\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, ip, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r2, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:271\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:271\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, sl, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r2, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:274\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:274\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r8, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r6, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:277\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:277\n \tstrcc\tpc, [r4, #2271]!\t@ 0x8df\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r4, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:278\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:278\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r2, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:279\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:279\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:280\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:280\n \tbicvc\tpc, r2, #29360128\t@ 0x1c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \taddsvs\tr6, sl, sl, asr r0\n \tmovwcs\tr6, #4314\t@ 0x10da\n-/build/1st/ssocr-2.23.0/ssocr.c:283\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:283\n \tmsrcc\tSPSR_s, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:284\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:284\n \t\t\t@ instruction: 0xf8c72301\n \tmovwcs\tr3, #24936\t@ 0x6168\n-/build/1st/ssocr-2.23.0/ssocr.c:285\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:285\n \tcmncc\tr0, r7, asr #17\t@ \n \tldrsbcc\tpc, [r0, #-135]!\t@ 0xffffff79\t@ \n \tmsrcc\tSPSR_fs, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:288\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:288\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcs\t5ba94 <__bss_end__@@Base+0x497ec>\n \t\t\t@ instruction: 0xf8dfdc0d\n-/build/1st/ssocr-2.23.0/ssocr.c:289\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:289\n \tstmiapl\tr3!, {r6, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \tldrcc\tpc, [r8, #-2271]!\t@ 0xfffff721\n \t\t\t@ instruction: 0x4618447b\n \tldc2l\t0, cr15, [r4, #-36]\t@ 0xffffffdc\n-/build/1st/ssocr-2.23.0/ssocr.c:290\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:290\n \t\t\t@ instruction: 0xf7ff2063\n \tmovwcs\tlr, #2918\t@ 0xb66\n-/build/1st/ssocr-2.23.0/ssocr.c:295\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:295\n \tcmncc\tr4, r7, asr #17\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:332\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:332\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r4, r3, lsr #11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r2, r3, lsr #11\n \t\t\t@ instruction: 0x73baf507\n \t\t\t@ instruction: 0xf8df9300\n \tldrbtmi\tr3, [fp], #-1296\t@ 0xfffffaf0\n \tstrcs\tpc, [ip, #-2271]\t@ 0xfffff721\n \tstmdavs\tr9, {r1, r3, r4, r5, r6, sl, lr}\n \t\t\t@ instruction: 0xf7ff6800\n \t\t\t@ instruction: 0xf8c7ea7c\n \t\t\t@ instruction: 0xf8d700b4\n-/build/1st/ssocr-2.23.0/ssocr.c:335\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:335\n \t\t\t@ instruction: 0xf1b330b4\n \tstrdle\tr3, [fp, -pc]\n-/build/1st/ssocr-2.23.0/ssocr.c:611\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:611\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t2894 \n \tstrbhi\tpc, [r6], r0, asr #32\t@ \n \tldmlt\tr2, {r0, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:336\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:336\n \tldrsbtcc\tpc, [r4], r7\t@ \n \tblcs\tdd07a0 <__bss_end__@@Base+0xdbe4f8>\n \tldrthi\tpc, [sp], -r0, lsl #4\t@ \n \t\t\t@ instruction: 0xf852a202\n \tldrmi\tr3, [sl], #-35\t@ 0xffffffdd\n \tsvclt\t0x00004710\n \tandeq\tr0, r0, r3, asr ip\n@@ -842,305 +842,305 @@\n \tandeq\tr0, r0, r7, lsl r7\n \tandeq\tr0, r0, pc, ror #24\n \tandeq\tr0, r0, r5, lsr #11\n \tandeq\tr0, r0, r9, lsl #22\n \tandeq\tr0, r0, fp, asr r1\n \tandeq\tr0, r0, pc, ror #24\n \tandeq\tr0, r0, fp, lsl #2\n-/build/1st/ssocr-2.23.0/ssocr.c:338\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:338\n \tstmiapl\tr3!, {r0, r3, r4, r5, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \tldrbtmi\tr4, [fp], #-3064\t@ 0xfffff408\n \t\t\t@ instruction: 0xf0094618\n \teorcs\tpc, sl, r1, lsr #25\n-/build/1st/ssocr-2.23.0/ssocr.c:339\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:339\n \tb\tfecbfba8 <__bss_end__@@Base+0xfecad900>\n-/build/1st/ssocr-2.23.0/ssocr.c:342\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:342\n \tstmiapl\tr3!, {r0, r1, r4, r5, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4618681b\n \tldc2\t0, cr15, [r8], {9}\n-/build/1st/ssocr-2.23.0/ssocr.c:343\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:343\n \t\t\t@ instruction: 0xf7ff202a\n \t\t\t@ instruction: 0xf507eaaa\n-/build/1st/ssocr-2.23.0/ssocr.c:346\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:346\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \tandeq\tpc, r4, #66\t@ 0x42\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:347\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:347\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\tff823334 <__bss_end__@@Base+0xff81108c>\n-/build/1st/ssocr-2.23.0/ssocr.c:348\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:348\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tldrmi\tr0, [sl], -r4, lsl #6\n \tldrbtmi\tr4, [fp], #-3040\t@ 0xfffff420\n \t\t\t@ instruction: 0xf7ff4619\n \t\t\t@ instruction: 0xf000ea18\n-/build/1st/ssocr-2.23.0/ssocr.c:350\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:350\n \tblmi\tff7b1310 <__bss_end__@@Base+0xff79f068>\n-/build/1st/ssocr-2.23.0/ssocr.c:352\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:352\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\tff6e3310 <__bss_end__@@Base+0xff6d1068>\n-/build/1st/ssocr-2.23.0/ssocr.c:353\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:353\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf7ff4618\n \tvstr.16\ts28, [r7, #472]\t@ 0x1d8\n \t\t\t@ instruction: 0xf5070b4c\n-/build/1st/ssocr-2.23.0/ssocr.c:354\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:354\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r0, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:355\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:355\n \tstmiapl\tr3!, {r0, r1, r3, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf04f6818\n \t\t\t@ instruction: 0xf04f0200\n \tvsubw.s8\tq8, q2, d0\n \tstmib\tsp, {r0, r3, r6, r8, r9}^\n \tldmib\tr7, {r8, r9, sp}^\n \tstmibmi\tsp, {r2, r3, r6, r8, r9, sp}^\n \t\t\t@ instruction: 0xf7ff4479\n \tvldr.16\ts28, [r7, #476]\t@ 0x1dc\n-/build/1st/ssocr-2.23.0/ssocr.c:357\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:357\n \tvcmp.f64\td7, #0.0\n \tvsqrt.f64\td23, d0\n \tstrle\tpc, [r8], #-2576\t@ 0xfffff5f0\n-/build/1st/ssocr-2.23.0/ssocr.c:357 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:357 (discriminator 1)\n \tblvc\t133d2cc <__bss_end__@@Base+0x132b024>\n \tblvs\tfedbd2f0 <__bss_end__@@Base+0xfedab048>\n \tblvc\tff1bd748 <__bss_end__@@Base+0xff1ab4a0>\n \tblx\t43d840 <__bss_end__@@Base+0x42b598>\n \t\t\t@ instruction: 0xf04fdd1c\n-/build/1st/ssocr-2.23.0/ssocr.c:358\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:358\n \t\t\t@ instruction: 0xf04f0200\n \tvsubw.s8\tq8, q2, d0\n \tstmib\tr7, {r0, r3, r6, r8, r9}^\n \t\t\t@ instruction: 0xf507234c\n-/build/1st/ssocr-2.23.0/ssocr.c:359\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:359\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, fp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:360\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:360\n \tstmiapl\tr3!, {r1, r4, r5, r7, r8, r9, fp, lr}^\n \tblmi\tfee1bd08 <__bss_end__@@Base+0xfee09a60>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tblmi\tfee13518 <__bss_end__@@Base+0xfee01270>\n \t\t\t@ instruction: 0x4619447b\n \tstmib\tr0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:363\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:363\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t2ac8 \n \tstrbhi\tpc, [r4, #-0]!\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:364\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:364\n \tstmiapl\tr3!, {r0, r1, r2, r5, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf04f6818\n \t\t\t@ instruction: 0xf04f0200\n \tvsubw.s8\tq8, q2, d0\n \tstmib\tsp, {r0, r3, r6, r8, r9}^\n \tldmib\tr7, {r8, r9, sp}^\n \tstmibmi\tfp!, {r2, r3, r6, r8, r9, sp}\n \t\t\t@ instruction: 0xf7ff4479\n \t\t\t@ instruction: 0xf000e9a6\n-/build/1st/ssocr-2.23.0/ssocr.c:367\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:367\n \t\t\t@ instruction: 0xf507bd51\n-/build/1st/ssocr-2.23.0/ssocr.c:369\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:369\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \tandeq\tpc, r1, #66\t@ 0x42\n \t\t\t@ instruction: 0xf000601a\n \t\t\t@ instruction: 0xf507bd89\n-/build/1st/ssocr-2.23.0/ssocr.c:371\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:371\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \tandeq\tpc, r2, #66\t@ 0x42\n \t\t\t@ instruction: 0xf000601a\n \tblmi\tfe5f1318 <__bss_end__@@Base+0xfe5df070>\n-/build/1st/ssocr-2.23.0/ssocr.c:373\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:373\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\tfe523200 <__bss_end__@@Base+0xfe510f58>\n-/build/1st/ssocr-2.23.0/ssocr.c:374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:374\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tstrvc\tpc, [ip, #1442]!\t@ 0x5a2\n \t\t\t@ instruction: 0xf7ff4618\n \teorvs\tlr, r8, r4, asr r9\n-/build/1st/ssocr-2.23.0/ssocr.c:375\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:375\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tblcs\t1bdc4 <__bss_end__@@Base+0x9b1c>\n \tblmi\tfe138da0 <__bss_end__@@Base+0xfe126af8>\n-/build/1st/ssocr-2.23.0/ssocr.c:376\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:376\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmiapl\tr3!, {r0, r3, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x461a681b\n \tldrbtmi\tr4, [fp], #-2955\t@ 0xfffff475\n \t\t\t@ instruction: 0xf7ff4619\n \t\t\t@ instruction: 0xf507e964\n-/build/1st/ssocr-2.23.0/ssocr.c:377\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:377\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r1, #172, 6\t@ 0xb0000002\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:379\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:379\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\t1da31a4 <__bss_end__@@Base+0x1d90efc>\n-/build/1st/ssocr-2.23.0/ssocr.c:380\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:380\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tblmi\t1f9be0c <__bss_end__@@Base+0x1f89b64>\n \t\t\t@ instruction: 0x4619447b\n \tstmdb\tr6, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:383\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:383\n \tldcllt\t0, cr15, [r5]\n-/build/1st/ssocr-2.23.0/ssocr.c:385\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:385\n \tstmiapl\tr3!, {r0, r2, r4, r5, r6, r8, r9, fp, lr}^\n \tblcs\t1be24 <__bss_end__@@Base+0x9b7c>\n \tldrbthi\tpc, [r2], #0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:386\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:386\n \tstmiapl\tr3!, {r1, r4, r5, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \tldrmi\tr7, [r8], -sl, lsr #11\n \tldmdb\tr0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:387\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:387\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r3, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xdc2a2b00\n-/build/1st/ssocr-2.23.0/ssocr.c:388\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:388\n \tstmiapl\tr3!, {r1, r5, r6, r8, r9, fp, lr}^\n \tblmi\t1a1be48 <__bss_end__@@Base+0x1a09ba0>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tblmi\t1b13658 <__bss_end__@@Base+0x1b013b0>\n \t\t\t@ instruction: 0x4619447b\n \tstmdb\tr0!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:389\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:389\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73aaf5a3\n \tandsvs\tr2, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:390\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:390\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t2c14 \n \tstrbhi\tpc, [r4], #0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:391\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:391\n \tstmiapl\tr3!, {r2, r4, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r1, r3, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-2910\t@ 0xfffff4a2\n \t\t\t@ instruction: 0xf7ff4619\n \t\t\t@ instruction: 0xf000e904\n-/build/1st/ssocr-2.23.0/ssocr.c:400\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:400\n \t\t\t@ instruction: 0xf507bcb5\n-/build/1st/ssocr-2.23.0/ssocr.c:394\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:394\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773ac\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:395\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:395\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\t10e30e4 <__bss_end__@@Base+0x10d0e3c>\n-/build/1st/ssocr-2.23.0/ssocr.c:396\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:396\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73aaf5a3\n \tblmi\t139bed8 <__bss_end__@@Base+0x1389c30>\n \t\t\t@ instruction: 0x4619447b\n \tstmia\tr0!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:400\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:400\n \tldclt\t0, cr15, [r2], {0}\n-/build/1st/ssocr-2.23.0/ssocr.c:402\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:402\n \tstmiapl\tr3!, {r1, r6, r8, r9, fp, lr}^\n \tblcs\t1bef0 <__bss_end__@@Base+0x9c48>\n \tstrhi\tpc, [pc], #0\t@ 1e88 \n-/build/1st/ssocr-2.23.0/ssocr.c:404\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:404\n \tstmiapl\tr3!, {r0, r1, r2, r3, r4, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0x461172b2\n \t\t\t@ instruction: 0xf7ff4618\n \t\t\t@ instruction: 0xf8c7fb8f\n \t\t\t@ instruction: 0xf8d700bc\n-/build/1st/ssocr-2.23.0/ssocr.c:405\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:405\n \tblcs\te194 \n \tblmi\tc75ed4 <__bss_end__@@Base+0xc63c2c>\n-/build/1st/ssocr-2.23.0/ssocr.c:406\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:406\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmiapl\tr3!, {r1, r2, r4, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x461a681b\n \tldrbtmi\tr4, [fp], #-2877\t@ 0xfffff4c3\n \t\t\t@ instruction: 0xf7ff4619\n \t\t\t@ instruction: 0xf507e8be\n-/build/1st/ssocr-2.23.0/ssocr.c:408\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:408\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\t9a307c <__bss_end__@@Base+0x990dd4>\n-/build/1st/ssocr-2.23.0/ssocr.c:409\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:409\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r4, #-135]!\t@ 0xffffff79\n \tldrdcc\tpc, [r8, #-135]!\t@ 0xffffff79\n \tldrbtmi\tr4, [r9], #-2355\t@ 0xfffff6cd\n \tstmia\tr8!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:413\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:413\n \tmralt\tpc, sp, acc0\n-/build/1st/ssocr-2.23.0/ssocr.c:415\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:415\n \tstmiapl\tr3!, {r1, r2, r5, r8, r9, fp, lr}^\n \tblcs\t1bf60 <__bss_end__@@Base+0x9cb8>\n \tldrbhi\tpc, [sl], #-0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:416\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:416\n \tstmiapl\tr3!, {r0, r1, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \tldrmi\tr7, [r8], -r6, lsr #11\n \tldmda\tr2!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:417\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:417\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r5, r7, r8, r9, ip, sp, lr}\n \tvqdmlsl.s\tq1, d0, d0\n \tblmi\t4e303c <__bss_end__@@Base+0x4d0d94>\n-/build/1st/ssocr-2.23.0/ssocr.c:418\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:418\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmiapl\tr3!, {r3, r4, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x461a681b\n \tldrbtmi\tr4, [fp], #-2849\t@ 0xfffff4df\n \t\t\t@ instruction: 0xf7ff4619\n \t\t\t@ instruction: 0xf507e882\n-/build/1st/ssocr-2.23.0/ssocr.c:419\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:419\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #-1744830462\t@ 0x98000002\n \t\t\t@ instruction: 0xf000601a\n-/build/1st/ssocr-2.23.0/ssocr.c:422\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:422\n \tsvclt\t0x0000bc33\n \tandhi\tpc, r0, pc, lsr #7\n \tandeq\tr0, r0, r0\n \tsubsmi\tr0, r9, r0\n \tstrbtvs\tr6, [r6], -r6, ror #12\n \tsvccc\t0x00f66666\n \tandeq\tr0, r1, r4, ror r6\n@@ -1162,978 +1162,978 @@\n \tandeq\tfp, r0, r0, ror #2\n \tandeq\tfp, r0, r8, lsr #2\n \tandeq\tfp, r0, r2, lsl r1\n \tandeq\tfp, r0, r0, ror #1\n \tstrheq\tfp, [r0], -sl\n \tstrheq\tfp, [r0], -r6\n \tandeq\tfp, r0, r2, lsl #1\n-/build/1st/ssocr-2.23.0/ssocr.c:424\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:424\n \tmrrccc\t8, 13, pc, r0, cr15\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df83f6\n-/build/1st/ssocr-2.23.0/ssocr.c:426\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:426\n \tstmiapl\tr3!, {r2, r6, sl, fp, ip, sp}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0x461172b6\n \t\t\t@ instruction: 0xf7ff4618\n \t\t\t@ instruction: 0xf8c7fb9d\n \t\t\t@ instruction: 0xf8d700b8\n-/build/1st/ssocr-2.23.0/ssocr.c:427\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:427\n \tblcs\te2c4 \n \t\t\t@ instruction: 0xf8dfd015\n-/build/1st/ssocr-2.23.0/ssocr.c:428\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:428\n \tstmiapl\tr3!, {r3, r5, sl, fp, ip, sp}^\n \t\t\t@ instruction: 0xf8df6818\n \tstmiapl\tr3!, {r2, r3, r4, sl, fp, ip, sp}^\n \t\t\t@ instruction: 0x461a681b\n \tldccc\t8, cr15, [r8], {223}\t@ 0xdf\n \t\t\t@ instruction: 0x4619447b\n \tldmda\tsl, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:429\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:429\n \t\t\t@ instruction: 0xf8c72306\n \t\t\t@ instruction: 0xf8d73170\n \t\t\t@ instruction: 0xf8c73170\n \t\t\t@ instruction: 0xf507316c\n-/build/1st/ssocr-2.23.0/ssocr.c:431\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:431\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df83c6\n-/build/1st/ssocr-2.23.0/ssocr.c:432\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:432\n \tstmiapl\tr3!, {r3, r5, r6, r7, r8, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf8d7681b\n \t\t\t@ instruction: 0xf8df216c\n \tldrbtmi\tr1, [r9], #-3044\t@ 0xfffff41c\n \t\t\t@ instruction: 0xf7fe4618\n \t\t\t@ instruction: 0xf8dfeffe\n-/build/1st/ssocr-2.23.0/ssocr.c:433\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:433\n \tstmiapl\tr3!, {r4, r6, r7, r8, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf8d7681b\n \t\t\t@ instruction: 0xf8df2170\n \tldrbtmi\tr1, [r9], #-3024\t@ 0xfffff430\n \t\t\t@ instruction: 0xf7fe4618\n \t\t\t@ instruction: 0xe3aceff2\n-/build/1st/ssocr-2.23.0/ssocr.c:438\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:438\n \tblcc\tfec403d8 <__bss_end__@@Base+0xfec2e130>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df83a9\n-/build/1st/ssocr-2.23.0/ssocr.c:439\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:439\n \tstmiapl\tr3!, {r2, r5, r7, r8, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \tldrmi\tr7, [r8], -r4, lsr #11\n \tsvc\t0x00baf7fe\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:440\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:440\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r5, r7, r8, r9, ip, sp, lr}\n \tvqrdmulh.s\td2, d0, d1\n \t\t\t@ instruction: 0xf8df8395\n-/build/1st/ssocr-2.23.0/ssocr.c:441\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:441\n \tstmiapl\tr3!, {r7, r8, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf8df6818\n \tstmiapl\tr3!, {r2, r4, r5, r6, r8, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0x461a681b\n \tblcc\t1f40420 <__bss_end__@@Base+0x1f2e178>\n \t\t\t@ instruction: 0x4619447b\n \tsvc\t0x00c6f7fe\n-/build/1st/ssocr-2.23.0/ssocr.c:442\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:442\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a4f5a3\n \tandsvs\tr2, sl, r3, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:445\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:445\n \t\t\t@ instruction: 0xf8dfe37e\n-/build/1st/ssocr-2.23.0/ssocr.c:447\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:447\n \tstmiapl\tr3!, {r4, r6, r8, r9, fp, ip, sp}^\n \tblcs\t1c130 <__bss_end__@@Base+0x9e88>\n \tcmnhi\tfp, #0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:448\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:448\n \tblcc\t1040448 <__bss_end__@@Base+0x102e1a0>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tstrvc\tpc, [r2, #1442]!\t@ 0x5a2\n \t\t\t@ instruction: 0xf7fe4618\n \teorvs\tlr, r8, sl, lsl #31\n-/build/1st/ssocr-2.23.0/ssocr.c:449\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:449\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a2f5a3\n \tblcs\t1c158 <__bss_end__@@Base+0x9eb0>\n \tmsrhi\tSPSR_sxc, #0, 6\n-/build/1st/ssocr-2.23.0/ssocr.c:450\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:450\n \tblcc\t740470 <__bss_end__@@Base+0x72e1c8>\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tblcc\t440478 <__bss_end__@@Base+0x42e1d0>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2848\t@ 0xfffff4e0\n \t\t\t@ instruction: 0xf7fe4619\n \t\t\t@ instruction: 0xf507ef96\n-/build/1st/ssocr-2.23.0/ssocr.c:451\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:451\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r2, #-2013265918\t@ 0x88000002\n \tcmp\tr0, #26\n-/build/1st/ssocr-2.23.0/ssocr.c:456\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:456\n \tbcc\tffb4049c <__bss_end__@@Base+0xffb2e1f4>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df834d\n-/build/1st/ssocr-2.23.0/ssocr.c:457\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:457\n \tstmiapl\tr3!, {r5, r6, r7, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \t\t\t@ instruction: 0x4618759c\n \tsvc\t0x0088f7fe\n \teorvs\tr4, fp, r3, lsl #12\n-/build/1st/ssocr-2.23.0/ssocr.c:459\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:459\n \t\t\t@ instruction: 0xf8dfe33e\n-/build/1st/ssocr-2.23.0/ssocr.c:461\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:461\n \tstmiapl\tr3!, {r2, r6, r7, r9, fp, ip, sp}^\n \tblcs\t1c1bc <__bss_end__@@Base+0x9f14>\n \tteqhi\tfp, #0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:462\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:462\n \tbcc\tfed404d4 <__bss_end__@@Base+0xfed2e22c>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1442]\t@ 0x5a2\n \t\t\t@ instruction: 0xf7fe4618\n \t\t\t@ instruction: 0x4603ef74\n \t\t\t@ instruction: 0xe32c602b\n-/build/1st/ssocr-2.23.0/ssocr.c:466\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:466\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r6, #679477248\t@ 0x28800000\n \t\t\t@ instruction: 0xf0426812\n \tandsvs\tr0, sl, r8, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:467\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:467\n \tbcc\tfe040508 <__bss_end__@@Base+0xfe02e260>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandle\tr2, sp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:468\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:468\n \tbcc\t1d40514 <__bss_end__@@Base+0x1d2e26c>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [r8, #1442]\t@ 0x5a2\n \t\t\t@ instruction: 0xf7fe4618\n \t\t\t@ instruction: 0x4603ef54\n \tteq\tr7, #43\t@ 0x2b\n-/build/1st/ssocr-2.23.0/ssocr.c:470\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:470\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [r8, #1443]\t@ 0x5a3\n \tbcc\t1b40538 <__bss_end__@@Base+0x1b2e290>\n \t\t\t@ instruction: 0x4618447b\n \tsvc\t0x0046f7fe\n \teorvs\tr4, fp, r3, lsl #12\n-/build/1st/ssocr-2.23.0/ssocr.c:472\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:472\n \t\t\t@ instruction: 0xf507e32a\n-/build/1st/ssocr-2.23.0/ssocr.c:474\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:474\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \tandseq\tpc, r0, #66\t@ 0x42\n \ttst\tsp, #26\n-/build/1st/ssocr-2.23.0/ssocr.c:476\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:476\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r6, #679477248\t@ 0x28800000\n \t\t\t@ instruction: 0xf0426812\n \tandsvs\tr0, sl, r4, lsl #5\n \t\t\t@ instruction: 0xf8dfe310\n-/build/1st/ssocr-2.23.0/ssocr.c:478\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:478\n \tstmiapl\tr3!, {r2, r3, r9, fp, ip, sp}^\n \tblcs\t1c274 <__bss_end__@@Base+0x9fcc>\n \trschi\tpc, r2, #0\n-/build/1st/ssocr-2.23.0/ssocr.c:479\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:479\n \tldmibcc\tip!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbcs\t540594 <__bss_end__@@Base+0x52e2ec>\n \t\t\t@ instruction: 0x4611447a\n \t\t\t@ instruction: 0xf7fe4618\n \t\t\t@ instruction: 0x4603ee70\n \ttstle\tr6, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:480\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:480\n \t\t\t@ instruction: 0xf0062000\n \trscscs\tpc, pc, r3, asr #22\n-/build/1st/ssocr-2.23.0/ssocr.c:481\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:481\n \tblx\t1b3e24e <__bss_end__@@Base+0x1b2bfa6>\n-/build/1st/ssocr-2.23.0/ssocr.c:491\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:491\n \t\t\t@ instruction: 0xf8dfe2cc\n-/build/1st/ssocr-2.23.0/ssocr.c:482\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:482\n \tstmiapl\tr3!, {r2, r4, r6, r7, r8, fp, ip, sp}^\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-2544\t@ 0xfffff610\n \t\t\t@ instruction: 0x46184611\n \tmrc\t7, 2, APSR_nzcv, cr10, cr14, {7}\n \tblcs\t13a5c <__bss_end__@@Base+0x17b4>\n \trscscs\tsp, pc, r6, lsl #2\n-/build/1st/ssocr-2.23.0/ssocr.c:483\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:483\n \tblx\tbbe272 <__bss_end__@@Base+0xbabfca>\n-/build/1st/ssocr-2.23.0/ssocr.c:484\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:484\n \t\t\t@ instruction: 0xf0062000\n \tadcs\tpc, r7, #89088\t@ 0x15c00\n-/build/1st/ssocr-2.23.0/ssocr.c:486\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:486\n \tstmibcc\tip!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmibcc\tr0!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmibcs\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-2496\t@ 0xfffff640\n \tmrc\t7, 6, APSR_nzcv, cr12, cr14, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:488\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:488\n \t\t\t@ instruction: 0xf7fe2063\n \t\t\t@ instruction: 0xf8dfef46\n-/build/1st/ssocr-2.23.0/ssocr.c:493\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:493\n \tstmiapl\tr3!, {r2, r7, r8, fp, ip, sp}^\n \tblcs\t1c2fc <__bss_end__@@Base+0xa054>\n \tadchi\tpc, r1, #0\n-/build/1st/ssocr-2.23.0/ssocr.c:494\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:494\n \tldmdbcc\tr4!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldmibcs\tip, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x4611447a\n \t\t\t@ instruction: 0xf7fe4618\n \tstrmi\tlr, [r3], -ip, lsr #28\n \ttstle\tr6, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:495\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:495\n \t\t\t@ instruction: 0xf0062000\n \trscscs\tpc, pc, fp, lsr #22\n-/build/1st/ssocr-2.23.0/ssocr.c:496\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:496\n \tblx\tfff3e2d4 <__bss_end__@@Base+0xfff2c02c>\n-/build/1st/ssocr-2.23.0/ssocr.c:506\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:506\n \t\t\t@ instruction: 0xf8dfe28b\n-/build/1st/ssocr-2.23.0/ssocr.c:497\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:497\n \tstmiapl\tr3!, {r2, r3, r6, r8, fp, ip, sp}^\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-2424\t@ 0xfffff688\n \t\t\t@ instruction: 0x46184611\n \tmrc\t7, 0, APSR_nzcv, cr6, cr14, {7}\n \tblcs\t13ae4 <__bss_end__@@Base+0x183c>\n \trscscs\tsp, pc, r6, lsl #2\n-/build/1st/ssocr-2.23.0/ssocr.c:498\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:498\n \tblx\t5be2fa <__bss_end__@@Base+0x5ac052>\n-/build/1st/ssocr-2.23.0/ssocr.c:499\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:499\n \t\t\t@ instruction: 0xf0062000\n \trsbs\tpc, r6, #946176\t@ 0xe7000\n-/build/1st/ssocr-2.23.0/ssocr.c:501\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:501\n \tstmdbcc\tr4!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldmdbcc\tr8, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmdbcs\tr8, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-2376\t@ 0xfffff6b8\n \tmrc\t7, 4, APSR_nzcv, cr8, cr14, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:503\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:503\n \t\t\t@ instruction: 0xf7fe2063\n \t\t\t@ instruction: 0xf507ef02\n-/build/1st/ssocr-2.23.0/ssocr.c:508\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:508\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \teoreq\tpc, r0, #66\t@ 0x42\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:509\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:509\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df8251\n-/build/1st/ssocr-2.23.0/ssocr.c:510\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:510\n \tstmiapl\tr3!, {r2, r4, r6, r7, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \twfieq\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2296\t@ 0xfffff708\n \t\t\t@ instruction: 0xf7fe4619\n \teors\tlr, sp, #1760\t@ 0x6e0\n-/build/1st/ssocr-2.23.0/ssocr.c:514\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:514\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r6, #679477248\t@ 0x28800000\n \t\t\t@ instruction: 0xf0426812\n \tandsvs\tr0, sl, r0, asr #4\n-/build/1st/ssocr-2.23.0/ssocr.c:515\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:515\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3188 \n \teorhi\tpc, fp, #0\n-/build/1st/ssocr-2.23.0/ssocr.c:516\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:516\n \tstmcc\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tldrmi\tr0, [sl], -r0, asr #6\n \tstmiacc\tr8!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x4619447b\n \tmcr\t7, 2, pc, cr4, cr14, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:518\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:518\n \t\t\t@ instruction: 0xf8dfe217\n-/build/1st/ssocr-2.23.0/ssocr.c:520\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:520\n \tstmiapl\tr3!, {r3, r4, r6, fp, ip, sp}^\n \tblcs\t1c428 <__bss_end__@@Base+0xa180>\n \tandshi\tpc, r4, #0\n-/build/1st/ssocr-2.23.0/ssocr.c:521\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:521\n \tstmdacc\tr8, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [r4, #1442]\t@ 0x5a2\n \t\t\t@ instruction: 0xf0084618\n \tmlavs\tr8, pc, ip, pc\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:523\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:523\n \t\t\t@ instruction: 0xf507e206\n-/build/1st/ssocr-2.23.0/ssocr.c:525\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:525\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \taddvc\tpc, r0, #1107296256\t@ 0x42000000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:526\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:526\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df81f4\n-/build/1st/ssocr-2.23.0/ssocr.c:527\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:527\n \tstmiapl\tr3!, {r3, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torrvc\tpc, r0, #50331648\t@ 0x3000000\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2100\t@ 0xfffff7cc\n \t\t\t@ instruction: 0xf7fe4619\n \tmvn\tlr, r8, lsl #28\n-/build/1st/ssocr-2.23.0/ssocr.c:532\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:532\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r6, #679477248\t@ 0x28800000\n \tvst2.8\t{d22-d23}, [r2 :64], r2\n \tandsvs\tr7, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:533\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:533\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3254 \n \tbichi\tpc, lr, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:534\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:534\n \tsbfxcc\tpc, pc, #17, #21\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr7, [sl], -r0, lsl #6\n \tubfxcc\tpc, pc, #17, #5\n \t\t\t@ instruction: 0x4619447b\n \tldcl\t7, cr15, [lr, #1016]\t@ 0x3f8\n-/build/1st/ssocr-2.23.0/ssocr.c:537\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:537\n \t\t\t@ instruction: 0xf507e1ba\n-/build/1st/ssocr-2.23.0/ssocr.c:539\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:539\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077396\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r4, r7, r9, ip, sp, lr}\n \taddvs\tpc, r0, #1107296256\t@ 0x42000000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:540\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:540\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df81a8\n-/build/1st/ssocr-2.23.0/ssocr.c:541\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:541\n \tstmiapl\tr3!, {r2, r5, r6, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torrvs\tpc, r0, #50331648\t@ 0x3000000\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-1944\t@ 0xfffff868\n \t\t\t@ instruction: 0xf7fe4619\n \t\t\t@ instruction: 0xe194edb6\n-/build/1st/ssocr-2.23.0/ssocr.c:546\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:546\n \t\t\t@ instruction: 0x3738f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df8191\n-/build/1st/ssocr-2.23.0/ssocr.c:547\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:547\n \tstmiapl\tr3!, {r2, r3, r5, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \t\t\t@ instruction: 0x46187592\n \tldc2\t0, cr15, [r0], {9}\n \torr\tr6, r3, r8, lsr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:551\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:551\n \t\t\t@ instruction: 0x3710f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df8180\n-/build/1st/ssocr-2.23.0/ssocr.c:552\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:552\n \tstmiapl\tr3!, {r2, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \tldrmi\tr7, [r8], -r0, lsr #11\n \tstcl\t7, cr15, [sl, #-1016]!\t@ 0xfffffc08\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:553\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:553\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r5, r7, r8, r9, ip, sp, lr}\n \tvqrdmulh.s\td2, d0, d1\n \t\t\t@ instruction: 0xf8df816c\n-/build/1st/ssocr-2.23.0/ssocr.c:554\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:554\n \tstmiapl\tr3!, {r5, r6, r7, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8df6818\n \tstmiapl\tr3!, {r2, r4, r6, r7, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0x461a681b\n \t\t\t@ instruction: 0x371cf8df\n \t\t\t@ instruction: 0x4619447b\n \tldcl\t7, cr15, [r6, #-1016]!\t@ 0xfffffc08\n-/build/1st/ssocr-2.23.0/ssocr.c:555\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:555\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r5, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:558\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:558\n \t\t\t@ instruction: 0xf8dfe155\n-/build/1st/ssocr-2.23.0/ssocr.c:560\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:560\n \tstmiapl\tr3!, {r4, r5, r7, r9, sl, ip, sp}^\n \tblcs\t1c5d0 <__bss_end__@@Base+0xa328>\n \tcmphi\tr2, r0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:561\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:561\n \tssatcc\tpc, #1, pc, asr #17\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [lr, #1442]\t@ 0x5a2\n \t\t\t@ instruction: 0xf7fe4618\n \teorvs\tlr, r8, sl, lsr sp\n-/build/1st/ssocr-2.23.0/ssocr.c:562\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:562\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, lr, #683671552\t@ 0x28c00000\n \tblcs\t1c5f8 <__bss_end__@@Base+0xa350>\n \tteqhi\tlr, r0, lsl #6\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:563\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:563\n \t\t\t@ instruction: 0x367cf8df\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0x3670f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-1728\t@ 0xfffff940\n \t\t\t@ instruction: 0xf7fe4619\n \t\t\t@ instruction: 0xf507ed46\n-/build/1st/ssocr-2.23.0/ssocr.c:564\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:564\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r2, #2013265922\t@ 0x78000002\n \t\t\t@ instruction: 0xe127601a\n-/build/1st/ssocr-2.23.0/ssocr.c:569\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:569\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r6, #679477248\t@ 0x28800000\n \tvst2.8\t{d22-d23}, [r2 :64], r2\n \tandsvs\tr6, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:570\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:570\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t33e4 \n \ttsthi\tr5, r0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:571\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:571\n \t\t\t@ instruction: 0x3624f8df\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr6, [sl], -r0, lsl #6\n \t\t\t@ instruction: 0x3664f8df\n \t\t\t@ instruction: 0x4619447b\n \tldc\t7, cr15, [r6, #-1016]\t@ 0xfffffc08\n-/build/1st/ssocr-2.23.0/ssocr.c:573\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:573\n \t\t\t@ instruction: 0xf8dfe101\n-/build/1st/ssocr-2.23.0/ssocr.c:575\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:575\n \tstmiapl\tr3!, {r2, r3, r4, r5, r6, r7, r8, sl, ip, sp}^\n \tblcs\t1c684 <__bss_end__@@Base+0xa3dc>\n \trscshi\tpc, lr, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:576\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:576\n \tstrbcc\tpc, [ip, #2271]!\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf7fe4618\n \tstc\t12, cr14, [r7, #936]\t@ 0x3a8\n \tvldr\td0, [r7, #296]\t@ 0x128\n-/build/1st/ssocr-2.23.0/ssocr.c:577\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:577\n \tvrintx.f64\td7, d10\n \tvmov.f64\td6, #64\t@ 0x3e000000 0.125\n \tvsqrt.f64\td23, d6\n \tldrle\tpc, [sp, #-2576]\t@ 0xfffff5f0\n-/build/1st/ssocr-2.23.0/ssocr.c:578\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:578\n \tbicpl\tpc, r0, #-268435456\t@ 0xf0000000\n \tmovwcs\tlr, #2515\t@ 0x9d3\n \tmovtcs\tlr, #43463\t@ 0xa9c7\n-/build/1st/ssocr-2.23.0/ssocr.c:579\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:579\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t346c \n \t\t\t@ instruction: 0xf8dfd00e\n-/build/1st/ssocr-2.23.0/ssocr.c:580\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:580\n \tstmiapl\tr3!, {r4, r5, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8df6818\n \tstmiapl\tr3!, {r2, r5, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0x461a681b\n \tldrbcc\tpc, [r8, #2271]!\t@ 0x8df\t@ \n \t\t\t@ instruction: 0x4619447b\n \tldcl\t7, cr15, [lr], {254}\t@ 0xfe\n-/build/1st/ssocr-2.23.0/ssocr.c:583\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:583\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t348c \n \tsbchi\tpc, r4, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:584\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:584\n \tldrbcc\tpc, [ip, #-2271]!\t@ 0xfffff721\t@ \n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tmsrpl\tSPSR_f, #-268435456\t@ 0xf0000000\n \tmovwcs\tlr, #2515\t@ 0x9d3\n \tmovwcs\tlr, #2509\t@ 0x9cd\n \tmovtcs\tlr, #43479\t@ 0xa9d7\n \tstrbne\tpc, [r4, #2271]\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7fe4479\n \tadcs\tlr, r1, r4, asr #25\n-/build/1st/ssocr-2.23.0/ssocr.c:589\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:589\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r6, #679477248\t@ 0x28800000\n \tvst2.8\t{d22-d23}, [r2 :64], r2\n \tandsvs\tr5, sl, r0, lsl #5\n-/build/1st/ssocr-2.23.0/ssocr.c:590\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:590\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t34dc \n \taddshi\tpc, pc, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:591\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:591\n \tstrcc\tpc, [ip, #-2271]!\t@ 0xfffff721\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr5, [sl], -r0, lsl #7\n \tldrbcc\tpc, [r8, #-2271]!\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0x4619447b\n \tldc\t7, cr15, [sl], {254}\t@ 0xfe\n-/build/1st/ssocr-2.23.0/ssocr.c:594\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:594\n \t\t\t@ instruction: 0xf8dfe08b\n-/build/1st/ssocr-2.23.0/ssocr.c:596\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:596\n \tstmiapl\tr3!, {r3, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \tstrbcc\tpc, [r4, #-2271]!\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0x4618447b\n \tcdp2\t0, 11, cr15, cr0, cr8, {0}\n-/build/1st/ssocr-2.23.0/ssocr.c:597\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:597\n \t\t\t@ instruction: 0xf7fe2002\n \t\t\t@ instruction: 0xf8d7ecf8\n-/build/1st/ssocr-2.23.0/ssocr.c:600\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:600\n \tblcs\t7ce9f8 <__bss_end__@@Base+0x7bc750>\n \t\t\t@ instruction: 0xf8d7dd15\n-/build/1st/ssocr-2.23.0/ssocr.c:600 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:600 (discriminator 1)\n \tblcs\t1f8ea00 <__bss_end__@@Base+0x1f7c758>\n \t\t\t@ instruction: 0xf8dfdc11\n-/build/1st/ssocr-2.23.0/ssocr.c:601\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:601\n \tstmiapl\tr3!, {r2, r3, r4, r6, r7, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8d76818\n \tmovwls\tr3, #180\t@ 0xb4\n \tldrsbtcc\tpc, [r4], r7\t@ \n \tldrcs\tpc, [r4, #-2271]!\t@ 0xfffff721\n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-1332\t@ 0xfffffacc\n \tldcl\t7, cr15, [r2], #-1016\t@ 0xfffffc08\n \t\t\t@ instruction: 0xf8dfe00d\n-/build/1st/ssocr-2.23.0/ssocr.c:604\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:604\n \tstmiapl\tr3!, {r3, r4, r5, r7, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8d76818\n \t\t\t@ instruction: 0xf8df30b4\n \tldrbtmi\tr2, [sl], #-1312\t@ 0xfffffae0\n \tldrne\tpc, [ip, #-2271]\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7fe4479\n \t\t\t@ instruction: 0xf8dfec64\n-/build/1st/ssocr-2.23.0/ssocr.c:607\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:607\n \tstmiapl\tr3!, {r2, r3, r4, r7, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \tstrcc\tpc, [ip, #-2271]\t@ 0xfffff721\n \t\t\t@ instruction: 0x4618447b\n \tcdp2\t0, 7, cr15, cr10, cr8, {0}\n-/build/1st/ssocr-2.23.0/ssocr.c:608\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:608\n \t\t\t@ instruction: 0xf7fe2063\n \tsvclt\t0x0000ecc2\n-/build/1st/ssocr-2.23.0/ssocr.c:350\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:350\n \tldmdblt\tr9, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:367\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:367\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b956\n-/build/1st/ssocr-2.23.0/ssocr.c:383\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:383\n \tldmdblt\tr3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:400\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:400\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b950\n-/build/1st/ssocr-2.23.0/ssocr.c:413\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:413\n \tstmdblt\tsp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:422\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:422\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b94a\n-/build/1st/ssocr-2.23.0/ssocr.c:436\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:436\n \tstmdblt\tr7, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:445\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:445\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b944\n-/build/1st/ssocr-2.23.0/ssocr.c:454\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:454\n \tstmdblt\tr1, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:459\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:459\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b93e\n-/build/1st/ssocr-2.23.0/ssocr.c:464\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:464\n \tldmdblt\tfp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:491\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:491\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b938\n-/build/1st/ssocr-2.23.0/ssocr.c:506\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:506\n \tldmdblt\tr5!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:512\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:512\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b932\n-/build/1st/ssocr-2.23.0/ssocr.c:518\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:518\n \tstmdblt\tpc!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:523\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:523\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b92c\n-/build/1st/ssocr-2.23.0/ssocr.c:530\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:530\n \tstmdblt\tr9!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:537\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:537\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b926\n-/build/1st/ssocr-2.23.0/ssocr.c:544\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:544\n \tstmdblt\tr3!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:549\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:549\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b920\n-/build/1st/ssocr-2.23.0/ssocr.c:558\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:558\n \tldmdblt\tsp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:567\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:567\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b91a\n-/build/1st/ssocr-2.23.0/ssocr.c:573\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:573\n \tldmdblt\tr7, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:587\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:587\n \t\t\t@ instruction: 0xf7ffbf00\n \tsvclt\t0x0000b914\n-/build/1st/ssocr-2.23.0/ssocr.c:294 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:294 (discriminator 5)\n \tldmdblt\tr1, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:612\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:612\n \tstmiapl\tr3!, {r1, r3, r4, r5, r6, r7, r8, r9, fp, lr}^\n \tsubscs\tr6, r1, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1120\t@ 0xfffffba0\n \tbl\tffbc0830 <__bss_end__@@Base+0xffbae588>\n-/build/1st/ssocr-2.23.0/ssocr.c:613\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:613\n \tstmiapl\tr3!, {r0, r2, r4, r5, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \ttsteq\tr4, r3\t@ \n \tmovtcs\tlr, #51671\t@ 0xc9d7\n \tmovwcs\tlr, #2509\t@ 0x9cd\n \t\t\t@ instruction: 0xf8df460a\n \tldrbtmi\tr3, [fp], #-1084\t@ 0xfffffbc4\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tffafd814 <__bss_end__@@Base+0xffaeb56c>\n-/build/1st/ssocr-2.23.0/ssocr.c:614\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:614\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \t\t\t@ instruction: 0xf5070220\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovteq\tpc, #3\t@ \n \tldrne\tpc, [r0], #-2271\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7fe4479\n \tblmi\tff83d7e8 <__bss_end__@@Base+0xff82b540>\n-/build/1st/ssocr-2.23.0/ssocr.c:616\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:616\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tldrmi\tr0, [sl], -r1, lsl #6\n \tldrbtmi\tr4, [fp], #-3069\t@ 0xfffff403\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tff63d7c8 <__bss_end__@@Base+0xff62b520>\n-/build/1st/ssocr-2.23.0/ssocr.c:617\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:617\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tldrmi\tr0, [sl], -r2, lsl #6\n \tldrbtmi\tr4, [fp], #-3062\t@ 0xfffff40a\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tff43d7a8 <__bss_end__@@Base+0xff42b500>\n-/build/1st/ssocr-2.23.0/ssocr.c:619\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:619\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tldrmi\tr0, [sl], -r8, lsl #6\n \tldrbtmi\tr4, [fp], #-3055\t@ 0xfffff411\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tff23d788 <__bss_end__@@Base+0xff22b4e0>\n-/build/1st/ssocr-2.23.0/ssocr.c:620\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:620\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tldrmi\tr0, [sl], -r0, lsr #6\n \tldrbtmi\tr4, [fp], #-3048\t@ 0xfffff418\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tff03d768 <__bss_end__@@Base+0xff02b4c0>\n-/build/1st/ssocr-2.23.0/ssocr.c:621\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:621\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \t\t\t@ instruction: 0x461a0310\n \tldrbtmi\tr4, [fp], #-3041\t@ 0xfffff41f\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfee3d748 <__bss_end__@@Base+0xfee2b4a0>\n-/build/1st/ssocr-2.23.0/ssocr.c:622\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:622\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr7, [sl], -r0, lsl #7\n \tldrbtmi\tr4, [fp], #-3034\t@ 0xfffff426\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfec3d728 <__bss_end__@@Base+0xfec2b480>\n-/build/1st/ssocr-2.23.0/ssocr.c:624\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:624\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr7, [sl], -r0, lsl #6\n \tldrbtmi\tr4, [fp], #-3027\t@ 0xfffff42d\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfea3d708 <__bss_end__@@Base+0xfea2b460>\n-/build/1st/ssocr-2.23.0/ssocr.c:625\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:625\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr6, [sl], -r0, lsl #7\n \tldrbtmi\tr4, [fp], #-3020\t@ 0xfffff434\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfe83d6e8 <__bss_end__@@Base+0xfe82b440>\n-/build/1st/ssocr-2.23.0/ssocr.c:626\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:626\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr6, [sl], -r0, lsl #6\n \tldrbtmi\tr4, [fp], #-3013\t@ 0xfffff43b\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfe63d6c8 <__bss_end__@@Base+0xfe62b420>\n-/build/1st/ssocr-2.23.0/ssocr.c:627\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:627\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tldrmi\tr5, [sl], -r0, lsl #7\n \tldrbtmi\tr4, [fp], #-3006\t@ 0xfffff442\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfe43d6a8 <__bss_end__@@Base+0xfe42b400>\n-/build/1st/ssocr-2.23.0/ssocr.c:628\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:628\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tblmi\tfee5ca48 <__bss_end__@@Base+0xfee4a7a0>\n \t\t\t@ instruction: 0x4619447b\n \tbl\ta409e0 <__bss_end__@@Base+0xa2e738>\n-/build/1st/ssocr-2.23.0/ssocr.c:629\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:629\n \tstmiapl\tr3!, {r0, r3, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r1, r3, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-2995\t@ 0xfffff44d\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tfe0fd674 <__bss_end__@@Base+0xfe0eb3cc>\n-/build/1st/ssocr-2.23.0/ssocr.c:630\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:630\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r4, #-135]!\t@ 0xffffff79\n \tldrdcc\tpc, [r8, #-135]!\t@ 0xffffff79\n \tldrbtmi\tr4, [r9], #-2478\t@ 0xfffff652\n \tbl\t440a10 <__bss_end__@@Base+0x42e768>\n-/build/1st/ssocr-2.23.0/ssocr.c:631\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:631\n \tstmiapl\tr3!, {r0, r2, r3, r4, r5, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r1, r2, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-2985\t@ 0xfffff457\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\t1dfd644 <__bss_end__@@Base+0x1deb39c>\n-/build/1st/ssocr-2.23.0/ssocr.c:632\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:632\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [ip, #-135]!\t@ 0xffffff79\n \tldrbtmi\tr4, [r9], #-2469\t@ 0xfffff65b\n \t\t\t@ instruction: 0xf7fe4618\n \tblmi\t1cbd630 <__bss_end__@@Base+0x1cab388>\n-/build/1st/ssocr-2.23.0/ssocr.c:633\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:633\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrsbcs\tpc, [r0, #-135]!\t@ 0xffffff79\t@ \n \tldrbtmi\tr4, [r9], #-2465\t@ 0xfffff65f\n \t\t\t@ instruction: 0xf7fe4618\n \tblmi\t1b7d61c <__bss_end__@@Base+0x1b6b374>\n-/build/1st/ssocr-2.23.0/ssocr.c:634\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:634\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrbtmi\tr4, [fp], #-2974\t@ 0xfffff462\n \tblmi\tfe79cad0 <__bss_end__@@Base+0xfe78a828>\n-/build/1st/ssocr-2.23.0/ssocr.c:635\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:635\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:634\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:634\n \ttstle\tr2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:634 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:634 (discriminator 1)\n \tldrbtmi\tr4, [fp], #-2972\t@ 0xfffff464\n \tblmi\tfe73aa7c <__bss_end__@@Base+0xfe7287d4>\n-/build/1st/ssocr-2.23.0/ssocr.c:634 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:634 (discriminator 2)\n \tldmibmi\tip, {r0, r1, r3, r4, r5, r6, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:634 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:634 (discriminator 4)\n \t\t\t@ instruction: 0xf7fe4479\n \tblmi\t18fd5f4 <__bss_end__@@Base+0x18eb34c>\n-/build/1st/ssocr-2.23.0/ssocr.c:636 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:636 (discriminator 4)\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrbtmi\tr4, [fp], #-2969\t@ 0xfffff467\n \tblmi\tfe65caf8 <__bss_end__@@Base+0xfe64a850>\n-/build/1st/ssocr-2.23.0/ssocr.c:637 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:637 (discriminator 4)\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:636 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:636 (discriminator 4)\n \ttstle\tr2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:636 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:636 (discriminator 1)\n \tldrbtmi\tr4, [fp], #-2967\t@ 0xfffff469\n \tblmi\tfe5faaa4 <__bss_end__@@Base+0xfe5e87fc>\n-/build/1st/ssocr-2.23.0/ssocr.c:636 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:636 (discriminator 2)\n \tldmibmi\tr7, {r0, r1, r3, r4, r5, r6, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:636 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:636 (discriminator 4)\n \t\t\t@ instruction: 0xf7fe4479\n \tblmi\t167d5cc <__bss_end__@@Base+0x166b324>\n-/build/1st/ssocr-2.23.0/ssocr.c:638 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:638 (discriminator 4)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, sp, lsl #4\n \tldrbtmi\tr4, [r8], #-2195\t@ 0xfffff76d\n \tb\tfeb40ab4 <__bss_end__@@Base+0xfeb2e80c>\n-/build/1st/ssocr-2.23.0/ssocr.c:639 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:639 (discriminator 4)\n \tstmiapl\tr3!, {r2, r4, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681a\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0x46117394\n \t\t\t@ instruction: 0xf0086818\n \tblmi\t1401638 <__bss_end__@@Base+0x13ef390>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tb\tff440ad8 <__bss_end__@@Base+0xff42e830>\n-/build/1st/ssocr-2.23.0/ssocr.c:640 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:640 (discriminator 4)\n \tstmiapl\tr3!, {r0, r1, r3, r6, r8, r9, fp, lr}^\n \tandcs\tr6, sp, #1769472\t@ 0x1b0000\n \tstmmi\tr7, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7fe4478\n \tblmi\t11fd53c <__bss_end__@@Base+0x11eb294>\n-/build/1st/ssocr-2.23.0/ssocr.c:641 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:641 (discriminator 4)\n \tldmdavs\tsl, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r2, #683671552\t@ 0x28c00000\n \tldmdavs\tr8, {r0, r4, r9, sl, lr}\n \tstc2\t0, cr15, [r0], {8}\n \tstmiapl\tr3!, {r0, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fe200a\n \tblmi\tfbd5f0 <__bss_end__@@Base+0xfab348>\n-/build/1st/ssocr-2.23.0/ssocr.c:642 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:642 (discriminator 4)\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a4f5a3\n \tblmi\t1e5cb90 <__bss_end__@@Base+0x1e4a8e8>\n \t\t\t@ instruction: 0x4619447b\n \tb\tfe140b28 <__bss_end__@@Base+0xfe12e880>\n-/build/1st/ssocr-2.23.0/ssocr.c:643 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:643 (discriminator 4)\n \tstmiapl\tr3!, {r0, r1, r2, r4, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r1, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-2931\t@ 0xfffff48d\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\tc7d52c <__bss_end__@@Base+0xc6b284>\n-/build/1st/ssocr-2.23.0/ssocr.c:644 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:644 (discriminator 4)\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovvc\tpc, #683671552\t@ 0x28c00000\n \tblmi\t1b9cbc4 <__bss_end__@@Base+0x1b8a91c>\n \t\t\t@ instruction: 0x4619447b\n \tb\t1ac0b5c <__bss_end__@@Base+0x1aae8b4>\n-/build/1st/ssocr-2.23.0/ssocr.c:645 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:645 (discriminator 4)\n \tstmiapl\tr3!, {r1, r3, r5, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r1, r2, r3, r4, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-2920\t@ 0xfffff498\n \t\t\t@ instruction: 0xf7fe4619\n \tblmi\t93d4f8 <__bss_end__@@Base+0x92b250>\n-/build/1st/ssocr-2.23.0/ssocr.c:646 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:646 (discriminator 4)\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tmovtcs\tlr, #43479\t@ 0xa9d7\n \tldrbtmi\tr4, [r9], #-2404\t@ 0xfffff69c\n \tb\t1540b88 <__bss_end__@@Base+0x152e8e0>\n-/build/1st/ssocr-2.23.0/ssocr.c:647 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:647 (discriminator 4)\n \tstmiapl\tr3!, {r0, r1, r2, r3, r4, r8, r9, fp, lr}^\n \tblmi\t189cbf8 <__bss_end__@@Base+0x188a950>\n \tldmdavs\tsl, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tldmdbmi\tpc, {r0, r1, r3, r4, fp, sp, lr}^\t@ \n \t\t\t@ instruction: 0xf7fe4479\n \tblmi\t63d4c8 <__bss_end__@@Base+0x62b220>\n-/build/1st/ssocr-2.23.0/ssocr.c:648 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:648 (discriminator 4)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r1, asr r2\n \tldrbtmi\tr4, [r8], #-2139\t@ 0xfffff7a5\n \tb\tac0bb8 <__bss_end__@@Base+0xaae910>\n-/build/1st/ssocr-2.23.0/ssocr.c:652\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:652\n \tstmiapl\tr3!, {r0, r1, r2, r4, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r6, r7, r9, ip, sp, lr}\n \tvqsub.u8\td4, d16, d10\n \tblmi\t3a2e9c <__bss_end__@@Base+0x390bf4>\n-/build/1st/ssocr-2.23.0/ssocr.c:653\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:653\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrbtmi\tr4, [sl], #-2643\t@ 0xfffff5ad\n \tldrbtmi\tr4, [r9], #-2387\t@ 0xfffff6ad\n \t\t\t@ instruction: 0xf7fe4618\n \tblmi\t27d48c <__bss_end__@@Base+0x26b1e4>\n-/build/1st/ssocr-2.23.0/ssocr.c:654\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:654\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tblmi\t1414458 <__bss_end__@@Base+0x14021b0>\n \t\t\t@ instruction: 0x4618447b\n \tmcrr2\t0, 0, pc, r0, cr8\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:655\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:655\n \t\t\t@ instruction: 0xf7fe2063\n \tsvclt\t0x0000ea88\n \tstrbtvs\tr6, [r6], -r6, ror #12\n \tsvccc\t0x00f66666\n \tandeq\tr0, r0, r0, lsl r1\n \tandeq\tr0, r0, ip, lsl #2\n \tldrdeq\tsl, [r0], -ip\n@@ -2205,208 +2205,208 @@\n \tmuleq\tr0, lr, r9\n \tstrdeq\tr0, [r0], -r8\n \tandeq\tsl, r0, ip, lsr #19\n \tandeq\tsl, r0, lr, lsr #14\n \tandeq\tr9, r0, r6, lsl #30\n \tandeq\tsl, r0, r6, lsl #19\n \tstrdeq\tr9, [r0], -r0\n-/build/1st/ssocr-2.23.0/ssocr.c:657\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:657\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3b48 \n \t\t\t@ instruction: 0xf8dfd01a\n-/build/1st/ssocr-2.23.0/ssocr.c:658\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:658\n \tstmiapl\tr3!, {r3, r5, sl, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \torrmi\tpc, r0, #-1073741824\t@ 0xc0000000\n \taddseq\tr3, fp, r1, lsl #22\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tstccc\t8, cr15, [r0], {223}\t@ 0xdf\n \t\t\t@ instruction: 0x4619447b\n \tldmdb\tip, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:662\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:662\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf103681b\n \tblcc\t53b90 <__bss_end__@@Base+0x418e8>\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507441a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:663\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:663\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr9, {r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblcc\tff141134 <__bss_end__@@Base+0xff12ee8c>\n \t\t\t@ instruction: 0x4618447b\n \tstmib\tr2!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblcs\t145d0 <__bss_end__@@Base+0x2328>\n \t\t\t@ instruction: 0xf507d125\n-/build/1st/ssocr-2.23.0/ssocr.c:664\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:664\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:665\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:665\n \tblcc\tfe641158 <__bss_end__@@Base+0xfe62eeb0>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, sp, lsr #4\n \tbleq\tfe641164 <__bss_end__@@Base+0xfe62eebc>\n \t\t\t@ instruction: 0xf7fe4478\n \t\t\t@ instruction: 0xf507e914\n-/build/1st/ssocr-2.23.0/ssocr.c:666\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:666\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r1, #-671088638\t@ 0xd8000002\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:667\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:667\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775b8\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr8, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tblx\t6c0e08 <__bss_end__@@Base+0x6aeb60>\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:669\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:669\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, lr, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:670\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:670\n \tblcc\t13411a4 <__bss_end__@@Base+0x132eefc>\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b8f5a3\n \t\t\t@ instruction: 0xf8df681a\n \tldrbtmi\tr3, [fp], #-2892\t@ 0xfffff4b4\n \t\t\t@ instruction: 0xf7fe4619\n \t\t\t@ instruction: 0xf107e8fc\n-/build/1st/ssocr-2.23.0/ssocr.c:672\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:672\n \t\t\t@ instruction: 0xf5070220\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0x461173b8\n \t\t\t@ instruction: 0xf7fe6818\n \tstrmi\tlr, [r2], -r4, lsl #18\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:673\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:673\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \teorsle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:674\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:674\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3a90 \n \t\t\t@ instruction: 0xf8dfd00e\n-/build/1st/ssocr-2.23.0/ssocr.c:675\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:675\n \tstmiapl\tr3!, {r4, r5, r6, r7, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \tbcc\tffc41214 <__bss_end__@@Base+0xffc2ef6c>\n \t\t\t@ instruction: 0x4619447b\n \tstmia\tip, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:676\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:676\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b8f5a3\n \t\t\t@ instruction: 0xf7fe6818\n \t\t\t@ instruction: 0xf507e884\n-/build/1st/ssocr-2.23.0/ssocr.c:677\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:677\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr8, {r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \tstmda\tip, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:678\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:678\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf103681b\n \tblcc\t53ccc <__bss_end__@@Base+0x41a24>\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507441a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:680\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:680\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \ttstle\tfp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:681\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:681\n \tbcc\t1f41274 <__bss_end__@@Base+0x1f2efcc>\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b8f5a3\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-2692\t@ 0xfffff57c\n \tbne\tfe04128c <__bss_end__@@Base+0xfe02efe4>\n \t\t\t@ instruction: 0xf7fe4479\n \t\t\t@ instruction: 0xf507e892\n-/build/1st/ssocr-2.23.0/ssocr.c:682\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:682\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0074618\n \tmlscs\tr3, r3, pc, pc\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:683\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:683\n \tldm\tr2!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:687\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:687\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tldm\tr4!, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:690\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:690\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [r0, #1443]\t@ 0x5a3\n \tsvc\t0x00acf7fd\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:691\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:691\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf7fe758e\n \tmlavs\tr8, ip, r8, lr\n-/build/1st/ssocr-2.23.0/ssocr.c:692\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:692\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3d68 \n \t\t\t@ instruction: 0xf507d108\n-/build/1st/ssocr-2.23.0/ssocr.c:692 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:692 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \twfieq\n \tandsle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:693\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:693\n \tldmibcc\tr4!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, lr, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r0, #679477248\t@ 0x28800000\n \tldmdavs\tr2, {r0, r1, r3, r4, fp, sp, lr}\n \tldmibne\tr8!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf7fe4479\n \t\t\t@ instruction: 0xf507e84c\n-/build/1st/ssocr-2.23.0/ssocr.c:697\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:697\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \ttstle\tr8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:697 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:697 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3c44 \n \t\t\t@ instruction: 0xf8dfd033\n-/build/1st/ssocr-2.23.0/ssocr.c:698\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:698\n \tstmiapl\tr3!, {r2, r3, r5, r7, r8, fp, ip, sp}^\n \t\t\t@ instruction: 0xf107681d\n \t\t\t@ instruction: 0xf5070018\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf04f9301\n \tmovwls\tr3, #1023\t@ 0x3ff\n@@ -2425,697 +2425,697 @@\n \tcdp\t14, 11, cr15, cr0, cr1, {6}\n \tvstr\td7, [sp, #256]\t@ 0x100\n \tstrbmi\tr7, [r2], -r0, lsl #22\n \t\t\t@ instruction: 0xf8df464b\n \tldrbtmi\tr1, [r9], #-2420\t@ 0xfffff68c\n \t\t\t@ instruction: 0xf7fe4628\n \t\t\t@ instruction: 0xf507e806\n-/build/1st/ssocr-2.23.0/ssocr.c:704\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:704\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077194\n \t\t\t@ instruction: 0xf5070018\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf04f9302\n \tmovwls\tr3, #5119\t@ 0x13ff\n \tmvnscc\tpc, #79\t@ 0x4f\n \tmovwcs\tr9, #768\t@ 0x300\n \tstmdavs\tr9, {r9, sp}\n \tbleq\t133e6b8 <__bss_end__@@Base+0x132c410>\n \tblx\t63f07a <__bss_end__@@Base+0x62cdd2>\n \tbleq\t133e680 <__bss_end__@@Base+0x132c3d8>\n-/build/1st/ssocr-2.23.0/ssocr.c:707\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:707\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3c84 \n \taddhi\tpc, r1, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:708\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:708\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tmrcne\t8, 2, r6, cr10, cr11, {0}\n \tldmdbcc\tr4, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsfmle\tf4, 4, [pc], {154}\t@ 0x9a\n-/build/1st/ssocr-2.23.0/ssocr.c:709\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:709\n \tstmiacc\tr0!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b8f5a3\n \t\t\t@ instruction: 0xf8df681a\n \tldrbtmi\tr3, [fp], #-2300\t@ 0xfffff704\n \t\t\t@ instruction: 0xf7fd4619\n \trsb\tlr, r4, r6, asr #31\n-/build/1st/ssocr-2.23.0/ssocr.c:712\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:712\n \tstmiacc\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, ip, lsl #4\n \tstmiaeq\tr4!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf7fd4478\n \t\t\t@ instruction: 0xf507efa8\n-/build/1st/ssocr-2.23.0/ssocr.c:713\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:713\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf8df73b4\n \tstmiapl\tr2!, {r2, r3, r6, r7, fp, sp}\n \tandsvs\tr6, sl, r2, lsl r8\n \t\t\t@ instruction: 0xf8dfe03a\n-/build/1st/ssocr-2.23.0/ssocr.c:714\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:714\n \tstmiapl\tr3!, {r3, r4, r7, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2216\t@ 0xfffff758\n \t\t\t@ instruction: 0xf7fd4619\n \t\t\t@ instruction: 0xf507ef98\n-/build/1st/ssocr-2.23.0/ssocr.c:715\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:715\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, lr, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:716\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:716\n \tldmdacc\tr4, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0xf8df681a\n \tldrbtmi\tr3, [fp], #-2172\t@ 0xfffff784\n \t\t\t@ instruction: 0xf7fd4619\n \t\t\t@ instruction: 0xf507ef80\n-/build/1st/ssocr-2.23.0/ssocr.c:713 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:713 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:713 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:713 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5d1c8 <__bss_end__@@Base+0x4af20>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \taddsmi\tr6, sl, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf8dfdbb7\n-/build/1st/ssocr-2.23.0/ssocr.c:719\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:719\n \tstmiapl\tr3!, {r3, fp, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fd200a\n \t\t\t@ instruction: 0xf507ef84\n-/build/1st/ssocr-2.23.0/ssocr.c:722\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:722\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf8df1e5a\n \tstmiapl\tr3!, {r2, r4, fp, ip, sp}^\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \tldrbhi\tpc, [r1, -r1, asr #6]!\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:723\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:723\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tubfxcs\tpc, pc, #17, #29\n \tldmdavs\tr2, {r1, r5, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf507bf58\n-/build/1st/ssocr-2.23.0/ssocr.c:724\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:724\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-2024\t@ 0xfffff818\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0x4603ee98\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780bd\n-/build/1st/ssocr-2.23.0/ssocr.c:725\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:725\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tmrc\t7, 7, APSR_nzcv, cr10, cr13, {7}\n \trscseq\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:726\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:726\n \tldrsbtcc\tpc, [r4], #135\t@ 0x87\t@ \n \tvstmdble\tsl!, {d18-d17}\n-/build/1st/ssocr-2.23.0/ssocr.c:726 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:726 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrrcne\t8, 1, r6, sl, cr11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5d28c <__bss_end__@@Base+0x4afe4>\n \tble\t1713c8c <__bss_end__@@Base+0x17019e4>\n-/build/1st/ssocr-2.23.0/ssocr.c:727\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:727\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t3e44 \n \t\t\t@ instruction: 0xf8dfd035\n-/build/1st/ssocr-2.23.0/ssocr.c:728\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:728\n \tstmiapl\tr3!, {r2, r3, r4, r5, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8d7681b\n \t\t\t@ instruction: 0xf8df20f4\n \tldrbtmi\tr1, [r9], #-1904\t@ 0xfffff890\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf507eef6\n-/build/1st/ssocr-2.23.0/ssocr.c:729\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:729\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:730\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:730\n \t\t\t@ instruction: 0x3710f8df\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-1840\t@ 0xfffff8d0\n \t\t\t@ instruction: 0xf7fd4619\n \t\t\t@ instruction: 0xf8dfeed4\n-/build/1st/ssocr-2.23.0/ssocr.c:732\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:732\n \tstmiapl\tr3!, {r5, r6, r7, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fd200a\n \t\t\t@ instruction: 0xf507eef0\n-/build/1st/ssocr-2.23.0/ssocr.c:734\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:734\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:735\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:735\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandseq\tpc, r8, r7, lsl #2\n \tldrsbtcs\tpc, [r4], #135\t@ 0x87\t@ \n \tldc\t8, cr6, [r7, #100]\t@ 0x64\n \t\t\t@ instruction: 0xf0050b4c\n \tmlavs\tr8, fp, sp, pc\t@ \n \t\t\t@ instruction: 0xf507e024\n-/build/1st/ssocr-2.23.0/ssocr.c:737\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:737\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:737 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:737 (discriminator 1)\n \tpkhtbcc\tpc, r0, pc, asr #17\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r9, lsl r2\n \tssateq\tpc, #29, pc, asr #17\t@ \n \t\t\t@ instruction: 0xf7fd4478\n \t\t\t@ instruction: 0xf507ee88\n-/build/1st/ssocr-2.23.0/ssocr.c:738\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:738\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \tandcs\tr0, r1, #24\n \tldc\t8, cr6, [r7, #100]\t@ 0x64\n \t\t\t@ instruction: 0xf0050b4c\n \teorvs\tpc, r8, r5, ror sp\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:740\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:740\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tmrc\t7, 5, APSR_nzcv, cr6, cr13, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:741\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:741\n \tldc\t7, cr15, [r8, #1012]!\t@ 0x3f4\n-/build/1st/ssocr-2.23.0/ssocr.c:742\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:742\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tcdplt\t0, 7, cr15, cr8, cr1, {0}\n-/build/1st/ssocr-2.23.0/ssocr.c:743\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:743\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0x364cf8df\n \t\t\t@ instruction: 0x4618447b\n \tstcl\t7, cr15, [r2, #1012]\t@ 0x3f4\n \tblcs\t14b8c <__bss_end__@@Base+0x28e4>\n \tadcshi\tpc, sp, r0, asr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:744\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:744\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf8c7ee26\n \t\t\t@ instruction: 0xf8d700f0\n-/build/1st/ssocr-2.23.0/ssocr.c:745\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:745\n \tblcs\tf770 \n \t\t\t@ instruction: 0xf507dd6a\n-/build/1st/ssocr-2.23.0/ssocr.c:745 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:745 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5071c5a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr3, sl, #1024\t@ 0x400\n \t\t\t@ instruction: 0xf507da5c\n-/build/1st/ssocr-2.23.0/ssocr.c:746\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:746\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \teorsle\tr2, r5, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:747\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:747\n \tldrcc\tpc, [r0, #2271]\t@ 0x8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrsbtcs\tpc, [r0], #135\t@ 0x87\t@ \n \tldrbne\tpc, [r4, #2271]\t@ 0x8df\t@ \n \t\t\t@ instruction: 0x46184479\n \tmcr\t7, 1, pc, cr0, cr13, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:748\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:748\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4208 \n \t\t\t@ instruction: 0xf8dfd018\n-/build/1st/ssocr-2.23.0/ssocr.c:749\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:749\n \tstmiapl\tr3!, {r3, r5, r6, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tldrcc\tpc, [r4, #2271]\t@ 0x8df\n \t\t\t@ instruction: 0x4619447b\n \tldcl\t7, cr15, [lr, #1012]!\t@ 0x3f4\n-/build/1st/ssocr-2.23.0/ssocr.c:751\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:751\n \tldrcc\tpc, [r4, #-2271]!\t@ 0xfffff721\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tmrc\t7, 0, APSR_nzcv, cr10, cr13, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:753\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:753\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:754\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:754\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \t\t\t@ instruction: 0xf8d70018\n \tldmdavs\tr9, {r4, r5, r6, r7, sp}\n \tbleq\t133eadc <__bss_end__@@Base+0x132c834>\n \tldc2l\t0, cr15, [r6], #20\n \teor\tr6, r4, r8, lsr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:756\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:756\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t40a8 \n \t\t\t@ instruction: 0xf8dfd00a\n-/build/1st/ssocr-2.23.0/ssocr.c:756 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:756 (discriminator 1)\n \tstmiapl\tr3!, {r3, r4, r6, r7, sl, ip, sp}^\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1316\t@ 0xfffffadc\n \tldc\t7, cr15, [r2, #1012]!\t@ 0x3f4\n-/build/1st/ssocr-2.23.0/ssocr.c:757\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:757\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandseq\tpc, r8, r7, lsl #2\n \tldmdavs\tr9, {r0, r9, sp}\n \tbleq\t133eb28 <__bss_end__@@Base+0x132c880>\n \tldc2l\t0, cr15, [r0], {5}\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:759\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:759\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fdede2\n-/build/1st/ssocr-2.23.0/ssocr.c:760\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:760\n \t\t\t@ instruction: 0xf507ece4\n-/build/1st/ssocr-2.23.0/ssocr.c:761\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:761\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf507bda3\n-/build/1st/ssocr-2.23.0/ssocr.c:762\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:762\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-1204\t@ 0xfffffb4c\n \t\t\t@ instruction: 0xf7fd4618\n \tstrmi\tlr, [r3], -lr, ror #25\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780b8\n-/build/1st/ssocr-2.23.0/ssocr.c:763\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:763\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tldcl\t7, cr15, [r0, #-1012]\t@ 0xfffffc0c\n \trsceq\tpc, ip, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:764\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:764\n \tldrdcc\tpc, [ip], #135\t@ 0x87\t@ \n \tvstmdble\tr7!, {d18-d17}\n-/build/1st/ssocr-2.23.0/ssocr.c:764 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:764 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrrcne\t8, 1, r6, sl, cr11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5d5e0 <__bss_end__@@Base+0x4b338>\n \tble\t1653fe0 <__bss_end__@@Base+0x1641d38>\n-/build/1st/ssocr-2.23.0/ssocr.c:765\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:765\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4198 \n \tblmi\tffeb7654 <__bss_end__@@Base+0xffea53ac>\n-/build/1st/ssocr-2.23.0/ssocr.c:766\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:766\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [ip], #135\t@ 0x87\t@ \n \tldrtne\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0x46184479\n \tstcl\t7, cr15, [ip, #-1012]\t@ 0xfffffc0c\n-/build/1st/ssocr-2.23.0/ssocr.c:767\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:767\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t43b0 \n \tblmi\tffc37610 <__bss_end__@@Base+0xffc25368>\n-/build/1st/ssocr-2.23.0/ssocr.c:768\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:768\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-1024\t@ 0xfffffc00\n \t\t\t@ instruction: 0xf7fd4619\n \tblmi\tff93ea94 <__bss_end__@@Base+0xff92c7ec>\n-/build/1st/ssocr-2.23.0/ssocr.c:770\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:770\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tstcl\t7, cr15, [r8, #-1012]\t@ 0xfffffc0c\n-/build/1st/ssocr-2.23.0/ssocr.c:772\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:772\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:773\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:773\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \t\t\t@ instruction: 0xf8d70018\n \tldmdavs\tr9, {r2, r3, r5, r6, r7, sp}\n \tbleq\t133ec80 <__bss_end__@@Base+0x132c9d8>\n \tldc2\t0, cr15, [r4], {5}\n \teor\tr6, r2, r8, lsr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:775\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:775\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t424c \n \tblmi\tff377660 <__bss_end__@@Base+0xff3653b8>\n-/build/1st/ssocr-2.23.0/ssocr.c:775 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:775 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r8, lsl r2\n \tldrbtmi\tr4, [r8], #-2276\t@ 0xfffff71c\n \tstcl\t7, cr15, [r2], #1012\t@ 0x3f4\n-/build/1st/ssocr-2.23.0/ssocr.c:776\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:776\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandseq\tpc, r8, r7, lsl #2\n \tldmdavs\tr9, {r0, r9, sp}\n \tbleq\t133ecc8 <__bss_end__@@Base+0x132ca20>\n \tldc2l\t0, cr15, [r0], #-20\t@ 0xffffffec\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:778\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:778\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fded12\n-/build/1st/ssocr-2.23.0/ssocr.c:779\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:779\n \t\t\t@ instruction: 0xf507ec14\n-/build/1st/ssocr-2.23.0/ssocr.c:780\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:780\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf507bcd3\n-/build/1st/ssocr-2.23.0/ssocr.c:781\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:781\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\tff254f20 <__bss_end__@@Base+0xff242c78>\n \t\t\t@ instruction: 0x4618447b\n \tldc\t7, cr15, [lr], {253}\t@ 0xfd\n \tblcs\t14ed4 <__bss_end__@@Base+0x2c2c>\n \tadcshi\tpc, r6, r0, asr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:782\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:782\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf8c7ec82\n \t\t\t@ instruction: 0xf8d700e8\n-/build/1st/ssocr-2.23.0/ssocr.c:783\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:783\n \tblcs\tfa98 \n \t\t\t@ instruction: 0xf507dd65\n-/build/1st/ssocr-2.23.0/ssocr.c:783 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:783 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5071c5a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr3, sl, #1024\t@ 0x400\n \t\t\t@ instruction: 0xf507da57\n-/build/1st/ssocr-2.23.0/ssocr.c:784\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:784\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \teorsle\tr2, r0, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:785\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:785\n \tstmiapl\tr3!, {r1, r4, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf8d7681b\n \tstmibmi\tip!, {r3, r5, r6, r7, sp}\n \t\t\t@ instruction: 0x46184479\n \tldcl\t7, cr15, [lr], #-1012\t@ 0xfffffc0c\n-/build/1st/ssocr-2.23.0/ssocr.c:786\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:786\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t454c \n \tblmi\tfe2777a8 <__bss_end__@@Base+0xfe265500>\n-/build/1st/ssocr-2.23.0/ssocr.c:787\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:787\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\tfe754fdc <__bss_end__@@Base+0xfe742d34>\n \t\t\t@ instruction: 0x4619447b\n \tmrrc\t7, 15, pc, lr, cr13\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:789\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:789\n \tstmiapl\tr3!, {r0, r2, r3, r4, r5, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fd200a\n \t\t\t@ instruction: 0xf507ec7c\n-/build/1st/ssocr-2.23.0/ssocr.c:791\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:791\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:792\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:792\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandseq\tpc, r8, r7, lsl #2\n \tldrdcs\tpc, [r8], #135\t@ 0x87\t@ \n \tldc\t8, cr6, [r7, #100]\t@ 0x64\n \t\t\t@ instruction: 0xf0050b4c\n \teorvs\tpc, r8, r7, lsl #23\n \t\t\t@ instruction: 0xf507e022\n-/build/1st/ssocr-2.23.0/ssocr.c:794\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:794\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:794 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:794 (discriminator 1)\n \tstmiapl\tr3!, {r1, r2, r5, r6, r8, r9, fp, lr}^\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tstmmi\tr2, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7fd4478\n \t\t\t@ instruction: 0xf507ec16\n-/build/1st/ssocr-2.23.0/ssocr.c:795\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:795\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \tandcs\tr0, r1, #24\n \tldc\t8, cr6, [r7, #100]\t@ 0x64\n \t\t\t@ instruction: 0xf0050b4c\n \teorvs\tpc, r8, r3, ror #22\n-/build/1st/ssocr-2.23.0/ssocr.c:797\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:797\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tmcrr\t7, 15, pc, r4, cr13\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:798\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:798\n \tbl\t11c1814 <__bss_end__@@Base+0x11af56c>\n-/build/1st/ssocr-2.23.0/ssocr.c:799\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:799\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tstclt\t0, cr15, [r6], {1}\n-/build/1st/ssocr-2.23.0/ssocr.c:800\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:800\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tldrbtmi\tr4, [fp], #-2918\t@ 0xfffff49a\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0x4603eb52\n \tteqle\tr8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:801\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:801\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4484 \n \tblmi\tff7898 <__bss_end__@@Base+0xfe55f0>\n-/build/1st/ssocr-2.23.0/ssocr.c:801 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:801 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, ip, lsl r2\n \tldrbtmi\tr4, [r8], #-2140\t@ 0xfffff7a4\n \tbl\tff1c187c <__bss_end__@@Base+0xff1af5d4>\n-/build/1st/ssocr-2.23.0/ssocr.c:802\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:802\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandseq\tpc, r8, #-1073741823\t@ 0xc0000001\n \tldc\t8, cr6, [r7, #100]\t@ 0x64\n \tldrmi\tr0, [r0], -ip, asr #22\n \tmrrc2\t0, 0, pc, sl, cr5\t@ \n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:803\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:803\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fdebf6\n-/build/1st/ssocr-2.23.0/ssocr.c:804\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:804\n \t\t\t@ instruction: 0xf507eaf8\n-/build/1st/ssocr-2.23.0/ssocr.c:805\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:805\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf507bbb7\n-/build/1st/ssocr-2.23.0/ssocr.c:806\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:806\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\t1055158 <__bss_end__@@Base+0x1042eb0>\n \t\t\t@ instruction: 0x4618447b\n \tbl\tc18f0 <__bss_end__@@Base+0xaf648>\n \tblcs\t1510c <__bss_end__@@Base+0x2e64>\n \t\t\t@ instruction: 0xf507d17e\n-/build/1st/ssocr-2.23.0/ssocr.c:807\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:807\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:807 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:807 (discriminator 1)\n \tstmiapl\tr3!, {r0, r1, r2, r4, r8, r9, fp, lr}^\n \tandscs\tr6, r6, #1769472\t@ 0x1b0000\n \tldmdami\tr7!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7fd4478\n \t\t\t@ instruction: 0xf507eb78\n-/build/1st/ssocr-2.23.0/ssocr.c:808\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:808\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \tldmdavs\tr9, {r3, r4, r9}\n \tbleq\t133ef9c <__bss_end__@@Base+0x132ccf4>\n \t\t\t@ instruction: 0xf0054610\n \teorvs\tpc, r8, r5, lsr lr\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:809\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:809\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tbl\tfe9c194c <__bss_end__@@Base+0xfe9af6a4>\n-/build/1st/ssocr-2.23.0/ssocr.c:810\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:810\n \tb\tfea41950 <__bss_end__@@Base+0xfea2f6a8>\n-/build/1st/ssocr-2.23.0/ssocr.c:811\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:811\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tbllt\t1a3f978 <__bss_end__@@Base+0x1a2d6d0>\n \tandeq\tr0, r0, ip, lsl #2\n@@ -3149,151 +3149,151 @@\n \tandeq\tsl, r0, ip, lsl #1\n \tmuleq\tr0, ip, pc\t@ \n \tstrdeq\tr9, [r0], -r4\n \tmuleq\tr0, lr, pc\t@ \n \tandeq\tr9, r0, r2, lsl #31\n \tandeq\tr9, r0, r0, lsr pc\n \tandeq\tr9, r0, r0, lsl pc\n-/build/1st/ssocr-2.23.0/ssocr.c:812\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:812\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tbcc\tff541d9c <__bss_end__@@Base+0xff52faf4>\n \t\t\t@ instruction: 0x4618447b\n \tb\t1b41a1c <__bss_end__@@Base+0x1b2f774>\n \tblcs\t15238 <__bss_end__@@Base+0x2f90>\n \tadcshi\tpc, r1, r0, asr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:813\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:813\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf8c7ead0\n \t\t\t@ instruction: 0xf8d700e4\n-/build/1st/ssocr-2.23.0/ssocr.c:814\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:814\n \tblcs\tfdec \n \t\t\t@ instruction: 0xf507dd64\n-/build/1st/ssocr-2.23.0/ssocr.c:814 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:814 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5071c5a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr3, sl, #1024\t@ 0x400\n \t\t\t@ instruction: 0xf507da56\n-/build/1st/ssocr-2.23.0/ssocr.c:815\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:815\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \teorsle\tr2, r5, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:816\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:816\n \tbcc\t1a41e0c <__bss_end__@@Base+0x1a2fb64>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r4], #135\t@ 0x87\t@ \n \tbne\t1841e18 <__bss_end__@@Base+0x182fb70>\n \t\t\t@ instruction: 0x46184479\n \tb\tff2c1a98 <__bss_end__@@Base+0xff2af7f0>\n-/build/1st/ssocr-2.23.0/ssocr.c:817\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:817\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t48b4 \n \t\t\t@ instruction: 0xf8dfd018\n-/build/1st/ssocr-2.23.0/ssocr.c:818\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:818\n \tstmiapl\tr3!, {r6, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tbcc\t841e5c <__bss_end__@@Base+0x82fbb4>\n \t\t\t@ instruction: 0x4619447b\n \tb\tfea41adc <__bss_end__@@Base+0xfea2f834>\n-/build/1st/ssocr-2.23.0/ssocr.c:820\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:820\n \tbcc\t341e68 <__bss_end__@@Base+0x32fbc0>\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tb\tff141aec <__bss_end__@@Base+0xff12f844>\n-/build/1st/ssocr-2.23.0/ssocr.c:822\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:822\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tldrdne\tpc, [r4], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf0064618\n \teorvs\tpc, r8, r9, ror #19\n-/build/1st/ssocr-2.23.0/ssocr.c:823\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:823\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \tands\tr6, lr, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:825\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:825\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4748 \n \t\t\t@ instruction: 0xf8dfd00a\n-/build/1st/ssocr-2.23.0/ssocr.c:826\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:826\n \tstmiapl\tr3!, {r2, r3, r4, r5, r7, r8, fp, ip, sp}^\n \tandscs\tr6, sp, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-2492\t@ 0xfffff644\n \tb\t18c1b44 <__bss_end__@@Base+0x18af89c>\n-/build/1st/ssocr-2.23.0/ssocr.c:827\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:827\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tldrmi\tr2, [r8], -r1, lsl #2\n \t\t\t@ instruction: 0xf9bef006\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:829\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:829\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fdea98\n-/build/1st/ssocr-2.23.0/ssocr.c:830\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:830\n \t\t\t@ instruction: 0xf507e99a\n-/build/1st/ssocr-2.23.0/ssocr.c:831\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:831\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf507ba59\n-/build/1st/ssocr-2.23.0/ssocr.c:832\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:832\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-2392\t@ 0xfffff6a8\n \t\t\t@ instruction: 0xf7fd4618\n \tstrmi\tlr, [r3], -r4, lsr #19\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780ae\n-/build/1st/ssocr-2.23.0/ssocr.c:833\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:833\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tsuble\tr2, r7, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:834\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:834\n \tstmdbcc\tr0!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tsp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n@@ -3301,47 +3301,47 @@\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0x4603e9fa\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2312\t@ 0xfffff6f8\n \t\t\t@ instruction: 0x46284619\n \tb\t541c04 <__bss_end__@@Base+0x52f95c>\n-/build/1st/ssocr-2.23.0/ssocr.c:835\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:835\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4a20 \n \t\t\t@ instruction: 0xf8dfd018\n-/build/1st/ssocr-2.23.0/ssocr.c:836\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:836\n \tstmiapl\tr3!, {r2, r4, r6, r7, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tstmiacc\tr4, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0x4619447b\n \tldmib\tr2!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:838\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:838\n \tstmiacc\tr0!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tb\t3c1c58 <__bss_end__@@Base+0x3af9b0>\n-/build/1st/ssocr-2.23.0/ssocr.c:840\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:840\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrrcne\t8, 1, r6, sl, cr11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5dce8 <__bss_end__@@Base+0x4ba40>\n \tble\tf946e8 <__bss_end__@@Base+0xf82440>\n-/build/1st/ssocr-2.23.0/ssocr.c:841\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:841\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n \t\t\t@ instruction: 0xf5a373cc\n@@ -3349,64 +3349,64 @@\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf8c7e99e\n \t\t\t@ instruction: 0xf50700e0\n-/build/1st/ssocr-2.23.0/ssocr.c:842\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:842\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf10775ba\n \t\t\t@ instruction: 0xf8d70318\n \tldrmi\tr1, [r8], -r0, ror #1\n \t\t\t@ instruction: 0xf97cf006\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:843\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:843\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fde9e2\n-/build/1st/ssocr-2.23.0/ssocr.c:844\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:844\n \t\t\t@ instruction: 0xf507e8e4\n-/build/1st/ssocr-2.23.0/ssocr.c:845\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:845\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf8dfb9a3\n-/build/1st/ssocr-2.23.0/ssocr.c:847\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:847\n \tstmiapl\tr3!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-2060\t@ 0xfffff7f4\n \tstmdane\tr8, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x46184479\n \tldmib\tr0, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:848\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:848\n \t\t\t@ instruction: 0xf7fd2063\n \t\t\t@ instruction: 0xf507e9fa\n-/build/1st/ssocr-2.23.0/ssocr.c:850\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:850\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-2016\t@ 0xfffff820\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0x4603e8de\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780b4\n-/build/1st/ssocr-2.23.0/ssocr.c:852\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:852\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tsuble\tr2, r7, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:853\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:853\n \t\t\t@ instruction: 0x3794f8df\n \tldmdavs\tsp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n@@ -3414,47 +3414,47 @@\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0x4603e934\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-1936\t@ 0xfffff870\n \t\t\t@ instruction: 0x46284619\n \tstmdb\tlr, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:854\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:854\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4bac \n \t\t\t@ instruction: 0xf8dfd018\n-/build/1st/ssocr-2.23.0/ssocr.c:855\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:855\n \tstmiapl\tr3!, {r3, r6, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \t\t\t@ instruction: 0x374cf8df\n \t\t\t@ instruction: 0x4619447b\n \tstmdb\tip!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:857\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:857\n \t\t\t@ instruction: 0x3714f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tstmdb\tr8, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:859\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:859\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrrcne\t8, 1, r6, sl, cr11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5de74 <__bss_end__@@Base+0x4bbcc>\n \tble\t1114874 <__bss_end__@@Base+0x11025cc>\n-/build/1st/ssocr-2.23.0/ssocr.c:860\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:860\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n \t\t\t@ instruction: 0xf5a373cc\n@@ -3462,67 +3462,67 @@\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf8c7e8d8\n \t\t\t@ instruction: 0xf50700dc\n-/build/1st/ssocr-2.23.0/ssocr.c:861\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:861\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \t\t\t@ instruction: 0xf8d70018\n \tldmdavs\tr9, {r2, r3, r4, r6, r7, sp}\n \tbleq\t133f4c0 <__bss_end__@@Base+0x132d218>\n \tcdp2\t0, 14, cr15, cr6, cr4, {0}\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:862\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:862\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fde916\n-/build/1st/ssocr-2.23.0/ssocr.c:863\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:863\n \t\t\t@ instruction: 0xf507e818\n-/build/1st/ssocr-2.23.0/ssocr.c:864\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:864\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf8dfb8d7\n-/build/1st/ssocr-2.23.0/ssocr.c:866\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:866\n \tstmiapl\tr3!, {r5, r6, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-1672\t@ 0xfffff978\n \tpkhtbne\tpc, r4, pc, asr #17\t@ \n \t\t\t@ instruction: 0x46184479\n \tstmia\tr4, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:868\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:868\n \t\t\t@ instruction: 0xf7fd2063\n \t\t\t@ instruction: 0xf507e92e\n-/build/1st/ssocr-2.23.0/ssocr.c:870\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:870\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-1628\t@ 0xfffff9a4\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0x4603e812\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780b4\n-/build/1st/ssocr-2.23.0/ssocr.c:872\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:872\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tsuble\tr2, r7, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:873\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:873\n \tldrbcc\tpc, [ip, #2271]!\t@ 0x8df\t@ \n \tldmdavs\tsp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n@@ -3530,47 +3530,47 @@\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \tstrmi\tlr, [r3], -r8, ror #16\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-1548\t@ 0xfffff9f4\n \t\t\t@ instruction: 0x46284619\n \tstm\tr2, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:874\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:874\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4d44 \n \t\t\t@ instruction: 0xf8dfd018\n-/build/1st/ssocr-2.23.0/ssocr.c:875\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:875\n \tstmiapl\tr3!, {r4, r5, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tstrbcc\tpc, [r8, #2271]\t@ 0x8df\t@ \n \t\t\t@ instruction: 0x4619447b\n \tstmda\tr0!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:877\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:877\n \tldrbcc\tpc, [ip, #-2271]!\t@ 0xfffff721\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tldmda\tip!, {r0, r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:879\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:879\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrrcne\t8, 1, r6, sl, cr11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5e00c <__bss_end__@@Base+0x4bd64>\n \tble\t1114a0c <__bss_end__@@Base+0x1102764>\n-/build/1st/ssocr-2.23.0/ssocr.c:880\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:880\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n \t\t\t@ instruction: 0xf5a373cc\n@@ -3578,109 +3578,109 @@\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf8c7e80c\n \t\t\t@ instruction: 0xf50700d8\n-/build/1st/ssocr-2.23.0/ssocr.c:881\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:881\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \t\t\t@ instruction: 0xf8d70018\n \tldmdavs\tr9, {r3, r4, r6, r7, sp}\n \tbleq\t133f658 <__bss_end__@@Base+0x132d3b0>\n \t\t\t@ instruction: 0xffe8f004\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:882\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:882\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fd4618\n \t\t\t@ instruction: 0xf7fce84a\n-/build/1st/ssocr-2.23.0/ssocr.c:883\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:883\n \t\t\t@ instruction: 0xf507ef4c\n-/build/1st/ssocr-2.23.0/ssocr.c:884\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:884\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf001601a\n \t\t\t@ instruction: 0xf8dfb80b\n-/build/1st/ssocr-2.23.0/ssocr.c:886\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:886\n \tstmiapl\tr3!, {r3, r6, r7, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-1284\t@ 0xfffffafc\n \tstrne\tpc, [r0, #-2271]\t@ 0xfffff721\n \t\t\t@ instruction: 0x46184479\n \tsvc\t0x00f8f7fc\n-/build/1st/ssocr-2.23.0/ssocr.c:888\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:888\n \t\t\t@ instruction: 0xf7fd2063\n \t\t\t@ instruction: 0xf507e862\n-/build/1st/ssocr-2.23.0/ssocr.c:890\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:890\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-1240\t@ 0xfffffb28\n \t\t\t@ instruction: 0xf7fc4618\n \tstrmi\tlr, [r3], -r6, asr #30\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780c0\n-/build/1st/ssocr-2.23.0/ssocr.c:891\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:891\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5071c9a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr3, sl, #1024\t@ 0x400\n \tadchi\tpc, r4, r0, lsl #5\n-/build/1st/ssocr-2.23.0/ssocr.c:893\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:893\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf8c7ef9a\n \t\t\t@ instruction: 0xf50700d0\n-/build/1st/ssocr-2.23.0/ssocr.c:894\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:894\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r2, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tsvc\t0x0086f7fc\n \tsbcseq\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:895\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:895\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4d08 \n \tblmi\tffff81f8 <__bss_end__@@Base+0xfffe5f50>\n-/build/1st/ssocr-2.23.0/ssocr.c:896\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:896\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrsbcc\tpc, [r4], #135\t@ 0x87\t@ \n \tldrsbcs\tpc, [r0], #135\t@ 0x87\t@ \n \tldrtne\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7fc4479\n \t\t\t@ instruction: 0xf507ef94\n-/build/1st/ssocr-2.23.0/ssocr.c:897\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:897\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \teorle\tr2, r3, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:898\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:898\n \tstmiapl\tr3!, {r2, r4, r5, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n@@ -3691,277 +3691,277 @@\n \taddseq\tr3, fp, r2, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x460a681b\n \tldrbtmi\tr4, [r9], #-2553\t@ 0xfffff607\n \tsvc\t0x0066f7fc\n-/build/1st/ssocr-2.23.0/ssocr.c:900\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:900\n \tstmiapl\tr3!, {r1, r5, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fc200a\n \t\t\t@ instruction: 0xf507ef84\n-/build/1st/ssocr-2.23.0/ssocr.c:902\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:902\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r2, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:903\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:903\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, r3, lsr #11\n \tandseq\tpc, r8, r7, lsl #2\n \tldrsbcc\tpc, [r4], #135\t@ 0x87\t@ \n \tldrsbcs\tpc, [r0], #135\t@ 0x87\t@ \n \tldc\t8, cr6, [r7, #36]\t@ 0x24\n \t\t\t@ instruction: 0xf0050b4c\n \teorvs\tpc, r8, r1, ror #18\n-/build/1st/ssocr-2.23.0/ssocr.c:904\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:904\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tsvc\t0x006ef7fc\n-/build/1st/ssocr-2.23.0/ssocr.c:905\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:905\n \tmrc\t7, 3, APSR_nzcv, cr0, cr12, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:906\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:906\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tsvclt\t0x0030f000\n-/build/1st/ssocr-2.23.0/ssocr.c:908\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:908\n \tstmiapl\tr3!, {r2, r6, r7, r8, r9, fp, lr}^\n \tbmi\tff65e258 <__bss_end__@@Base+0xff64bfb0>\n \tldmibmi\tr9, {r1, r3, r4, r5, r6, sl, lr}^\n \t\t\t@ instruction: 0x46184479\n \tsvc\t0x0020f7fc\n-/build/1st/ssocr-2.23.0/ssocr.c:910\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:910\n \t\t\t@ instruction: 0xf7fc2063\n \t\t\t@ instruction: 0xf507ef8a\n-/build/1st/ssocr-2.23.0/ssocr.c:912\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:912\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\tff3d5a80 <__bss_end__@@Base+0xff3c37d8>\n \t\t\t@ instruction: 0x4618447b\n \tmcr\t7, 3, pc, cr14, cr12, {7}\t@ \n \tblcs\t15a34 <__bss_end__@@Base+0x378c>\n \t\t\t@ instruction: 0xf507d134\n-/build/1st/ssocr-2.23.0/ssocr.c:913\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:913\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:913 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:913 (discriminator 1)\n \tstmiapl\tr3!, {r1, r2, r3, r5, r7, r8, r9, fp, lr}^\n \tandscs\tr6, sl, #1769472\t@ 0x1b0000\n \tstmiami\tr5, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7fc4478\n \t\t\t@ instruction: 0xf507eee4\n-/build/1st/ssocr-2.23.0/ssocr.c:914\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:914\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf10775ba\n \ttstcs\tr3, r8, lsl r3\n \tbleq\t133f8bc <__bss_end__@@Base+0x132d614>\n \t\t\t@ instruction: 0xf0054618\n \teorvs\tpc, r8, r5, lsr #19\n-/build/1st/ssocr-2.23.0/ssocr.c:915\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:915\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tsvc\t0x0016f7fc\n-/build/1st/ssocr-2.23.0/ssocr.c:916\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:916\n \tmrc\t7, 0, APSR_nzcv, cr8, cr12, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:917\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:917\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tcdplt\t0, 13, cr15, cr8, cr0, {0}\n-/build/1st/ssocr-2.23.0/ssocr.c:918\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:918\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tldrbtmi\tr4, [fp], #-2987\t@ 0xfffff455\n \t\t\t@ instruction: 0xf7fc4618\n \tstrmi\tlr, [r3], -r4, lsr #28\n \tteqle\tr4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:919\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:919\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t4ee0 \n \tblmi\tfe2782f4 <__bss_end__@@Base+0xfe26604c>\n-/build/1st/ssocr-2.23.0/ssocr.c:919 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:919 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r8, lsl r2\n \tldrbtmi\tr4, [r8], #-2209\t@ 0xfffff75f\n \tmrc\t7, 4, APSR_nzcv, cr8, cr12, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:920\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:920\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tldfs\tf2, [r7, #20]\n \tldrmi\tr0, [r8], -ip, asr #22\n \t\t\t@ instruction: 0xf95af005\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:921\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:921\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf7fceecc\n-/build/1st/ssocr-2.23.0/ssocr.c:922\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:922\n \t\t\t@ instruction: 0xf507edce\n-/build/1st/ssocr-2.23.0/ssocr.c:923\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:923\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf000601a\n \t\t\t@ instruction: 0xf507be8d\n-/build/1st/ssocr-2.23.0/ssocr.c:924\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:924\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\tfe215bac <__bss_end__@@Base+0xfe203904>\n \t\t\t@ instruction: 0x4618447b\n \tldcl\t7, cr15, [r8, #1008]\t@ 0x3f0\n \tblcs\t15b60 <__bss_end__@@Base+0x38b8>\n \t\t\t@ instruction: 0xf507d134\n-/build/1st/ssocr-2.23.0/ssocr.c:925\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:925\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:925 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:925 (discriminator 1)\n \tstmiapl\tr3!, {r0, r1, r5, r6, r8, r9, fp, lr}^\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tldmdami\tlr!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7fc4478\n \t\t\t@ instruction: 0xf507ee4e\n-/build/1st/ssocr-2.23.0/ssocr.c:926\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:926\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf10775ba\n \ttstcs\tr6, r8, lsl r3\n \tbleq\t133f9e8 <__bss_end__@@Base+0x132d740>\n \t\t\t@ instruction: 0xf0054618\n \teorvs\tpc, r8, pc, lsl #18\n-/build/1st/ssocr-2.23.0/ssocr.c:927\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:927\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tmcr\t7, 4, pc, cr0, cr12, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:928\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:928\n \tstc\t7, cr15, [r2, #1008]\t@ 0x3f0\n-/build/1st/ssocr-2.23.0/ssocr.c:929\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:929\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tcdplt\t0, 4, cr15, cr2, cr0, {0}\n-/build/1st/ssocr-2.23.0/ssocr.c:930\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:930\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tldrbtmi\tr4, [fp], #-2916\t@ 0xfffff49c\n \t\t\t@ instruction: 0xf7fc4618\n \tstrmi\tlr, [r3], -lr, lsl #27\n \tteqle\tr4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:931\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:931\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t500c \n \tblmi\tfb8420 <__bss_end__@@Base+0xfa6178>\n-/build/1st/ssocr-2.23.0/ssocr.c:931 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:931 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r8, lsl r2\n \tldrbtmi\tr4, [r8], #-2138\t@ 0xfffff7a6\n \tmcr\t7, 0, pc, cr2, cr12, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:932\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:932\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tldfs\tf2, [r7, #28]\n \tldrmi\tr0, [r8], -ip, asr #22\n \t\t\t@ instruction: 0xf8c4f005\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:933\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:933\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf7fcee36\n-/build/1st/ssocr-2.23.0/ssocr.c:934\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:934\n \t\t\t@ instruction: 0xf507ed38\n-/build/1st/ssocr-2.23.0/ssocr.c:935\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:935\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf000601a\n \t\t\t@ instruction: 0xf507bdf7\n-/build/1st/ssocr-2.23.0/ssocr.c:936\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:936\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\t1055cd8 <__bss_end__@@Base+0x1043a30>\n \t\t\t@ instruction: 0x4618447b\n \tstcl\t7, cr15, [r2, #-1008]\t@ 0xfffffc10\n \tblcs\t15c8c <__bss_end__@@Base+0x39e4>\n \t\t\t@ instruction: 0xf507d17e\n-/build/1st/ssocr-2.23.0/ssocr.c:937\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:937\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:937 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:937 (discriminator 1)\n \tstmiapl\tr3!, {r3, r4, r8, r9, fp, lr}^\n \tandscs\tr6, r3, #1769472\t@ 0x1b0000\n \tldmdami\tr7!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7fc4478\n \t\t\t@ instruction: 0xf507edb8\n-/build/1st/ssocr-2.23.0/ssocr.c:938\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:938\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \tldmdavs\tr9, {r3, r4, r9}\n \tbleq\t133fb1c <__bss_end__@@Base+0x132d874>\n \t\t\t@ instruction: 0xf0064610\n \teorvs\tpc, r8, r9, lsr #16\n-/build/1st/ssocr-2.23.0/ssocr.c:939\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:939\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tstcl\t7, cr15, [r6, #1008]!\t@ 0x3f0\n-/build/1st/ssocr-2.23.0/ssocr.c:940\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:940\n \tstcl\t7, cr15, [r8], #1008\t@ 0x3f0\n-/build/1st/ssocr-2.23.0/ssocr.c:941\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:941\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tstclt\t0, cr15, [r8]\n \tandeq\tr9, r0, r8, lsr #28\n@@ -3995,76 +3995,76 @@\n \t\t\t@ instruction: 0x000097b2\n \tandeq\tr9, r0, r4, ror #14\n \tandeq\tr9, r0, r4, asr #14\n \tstrdeq\tr9, [r0], -r6\n \tldrdeq\tr9, [r0], -r6\n \tandeq\tr9, r0, r8, lsl #13\n \tandeq\tr9, r0, r4, ror #12\n-/build/1st/ssocr-2.23.0/ssocr.c:942\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:942\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tldrbtmi\tr4, [fp], #-3031\t@ 0xfffff429\n \t\t\t@ instruction: 0xf7fc4618\n \tstrmi\tlr, [r3], -lr, lsr #25\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf5078154\n-/build/1st/ssocr-2.23.0/ssocr.c:943\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:943\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5071c9a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr3, sl, #1024\t@ 0x400\n \tteqhi\tr8, r0, lsl #5\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:945\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:945\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \tstc\t13, cr14, [r7, #32]\n \t\t\t@ instruction: 0xf5070b4e\n-/build/1st/ssocr-2.23.0/ssocr.c:946\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:946\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r2, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tldcl\t7, cr15, [r4], #1008\t@ 0x3f0\n \tbleq\t143fc34 <__bss_end__@@Base+0x142d98c>\n-/build/1st/ssocr-2.23.0/ssocr.c:947\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:947\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t5238 \n \tblmi\tfed7872c <__bss_end__@@Base+0xfed66484>\n-/build/1st/ssocr-2.23.0/ssocr.c:948\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:948\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tcmpcs\tr0, #3522560\t@ 0x35c000\n \tmovwcs\tlr, #2509\t@ 0x9cd\n \tmovtcs\tlr, #59863\t@ 0xe9d7\n \tldrbtmi\tr4, [r9], #-2481\t@ 0xfffff64f\n \tldcl\t7, cr15, [sl], #1008\t@ 0x3f0\n-/build/1st/ssocr-2.23.0/ssocr.c:949\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:949\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t5454 \n \tblmi\tfeab86e4 <__bss_end__@@Base+0xfeaa643c>\n-/build/1st/ssocr-2.23.0/ssocr.c:950\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:950\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n@@ -4075,181 +4075,181 @@\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tldmibmi\tip, {r1, r3, r9, sl, lr}\n \t\t\t@ instruction: 0xf7fc4479\n \tblmi\tfe63f9d8 <__bss_end__@@Base+0xfe62d730>\n-/build/1st/ssocr-2.23.0/ssocr.c:952\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:952\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tstcl\t7, cr15, [sl], #1008\t@ 0x3f0\n-/build/1st/ssocr-2.23.0/ssocr.c:954\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:954\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t53bc \n \taddhi\tpc, sl, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:955\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:955\n \tandeq\tpc, r0, #79\t@ 0x4f\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \tmvnsvc\tpc, #212860928\t@ 0xcb00000\n \tcmpcs\tr4, #3260416\t@ 0x31c000\n \tandeq\tpc, r0, #79\t@ 0x4f\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \tmvnsvc\tpc, #212860928\t@ 0xcb00000\n \tcmpcs\tr6, #3260416\t@ 0x31c000\n-/build/1st/ssocr-2.23.0/ssocr.c:956\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:956\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t5300 \n \tblmi\tfe0f8724 <__bss_end__@@Base+0xfe0e647c>\n-/build/1st/ssocr-2.23.0/ssocr.c:957\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:957\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tcmpcs\tr0, #3522560\t@ 0x35c000\n \tmovwcs\tlr, #2509\t@ 0x9cd\n \tmovtcs\tlr, #59863\t@ 0xe9d7\n \tldrbtmi\tr4, [r9], #-2433\t@ 0xfffff67f\n \tldc\t7, cr15, [r6], {252}\t@ 0xfc\n-/build/1st/ssocr-2.23.0/ssocr.c:960\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:960\n \tandseq\tpc, r8, r7, lsl #2\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tmovwls\tr6, #6171\t@ 0x181b\n \tmvnscc\tpc, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf04f9300\n \tandcs\tr3, r0, #-67108861\t@ 0xfc000003\n \t\t\t@ instruction: 0xf0052100\n \tvstr\ts30, [r7, #580]\t@ 0x244\n \t\t\t@ instruction: 0xf1070b54\n-/build/1st/ssocr-2.23.0/ssocr.c:961\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:961\n \t\t\t@ instruction: 0xf5070018\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf04f9301\n \tmovwls\tr3, #1023\t@ 0x3ff\n \tmvnscc\tpc, #79\t@ 0x4f\n \tmrscs\tr2, R8_usr\n \tblx\t8c076a <__bss_end__@@Base+0x8ae4c2>\n \tbleq\t15bfd74 <__bss_end__@@Base+0x15adacc>\n-/build/1st/ssocr-2.23.0/ssocr.c:962\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:962\n \tblvc\t13bfdb8 <__bss_end__@@Base+0x13adb10>\n \tblpl\t197fddc <__bss_end__@@Base+0x196db34>\n \tblvs\t180180 <__bss_end__@@Base+0x16ded8>\n \tblpl\t15bfdc4 <__bss_end__@@Base+0x15adb1c>\n \tblvc\t153fdc8 <__bss_end__@@Base+0x152db20>\n \tblvc\t1200044 <__bss_end__@@Base+0x11edd9c>\n \tblvc\t20000c <__bss_end__@@Base+0x1edd64>\n \tblvs\t153fdd4 <__bss_end__@@Base+0x152db2c>\n \tblvc\t200054 <__bss_end__@@Base+0x1eddac>\n \tblvc\t13bfd9c <__bss_end__@@Base+0x13adaf4>\n-/build/1st/ssocr-2.23.0/ssocr.c:963\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:963\n \tblvc\t143fde0 <__bss_end__@@Base+0x142db38>\n \tblpl\t16ffe04 <__bss_end__@@Base+0x16edb5c>\n \tblvs\t1801a8 <__bss_end__@@Base+0x16df00>\n \tblpl\t15bfdec <__bss_end__@@Base+0x15adb44>\n \tblvc\t153fdf0 <__bss_end__@@Base+0x152db48>\n \tblvc\t120006c <__bss_end__@@Base+0x11eddc4>\n \tblvc\t200034 <__bss_end__@@Base+0x1edd8c>\n \tblvs\t153fdfc <__bss_end__@@Base+0x152db54>\n \tblvc\t20007c <__bss_end__@@Base+0x1eddd4>\n \tblvc\t143fdc4 <__bss_end__@@Base+0x142db1c>\n-/build/1st/ssocr-2.23.0/ssocr.c:964\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:964\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t53c8 \n \tblmi\t14787ec <__bss_end__@@Base+0x1466544>\n-/build/1st/ssocr-2.23.0/ssocr.c:965\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:965\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tcmpcs\tr0, #3522560\t@ 0x35c000\n \tmovwcs\tlr, #2509\t@ 0x9cd\n \tmovtcs\tlr, #59863\t@ 0xe9d7\n \tldrbtmi\tr4, [r9], #-2384\t@ 0xfffff6b0\n \tldc\t7, cr15, [r2], #-1008\t@ 0xfffffc10\n-/build/1st/ssocr-2.23.0/ssocr.c:968\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:968\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r2, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:969\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:969\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \tldmdavs\tr9, {r3, r4, r9}\n \tblne\t143fe60 <__bss_end__@@Base+0x142dbb8>\n \tbleq\t13bfe64 <__bss_end__@@Base+0x13adbbc>\n \t\t\t@ instruction: 0xf0044610\n \tldrdvs\tpc, [r8], -r5\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:970\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:970\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tmcrr\t7, 15, pc, r2, cr12\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:971\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:971\n \tbl\t1142814 <__bss_end__@@Base+0x113056c>\n-/build/1st/ssocr-2.23.0/ssocr.c:972\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:972\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tstclt\t0, cr15, [r4], {-0}\n-/build/1st/ssocr-2.23.0/ssocr.c:974\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:974\n \tstmiapl\tr3!, {r4, r5, r8, r9, fp, lr}^\n \tbmi\td1e8b0 <__bss_end__@@Base+0xd0c608>\n \tldmdbmi\tr4!, {r1, r3, r4, r5, r6, sl, lr}\n \t\t\t@ instruction: 0x46184479\n \tbl\tffd42840 <__bss_end__@@Base+0xffd30598>\n-/build/1st/ssocr-2.23.0/ssocr.c:976\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:976\n \t\t\t@ instruction: 0xf7fc2063\n \t\t\t@ instruction: 0xf507ec5e\n-/build/1st/ssocr-2.23.0/ssocr.c:978\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:978\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\ta960d8 <__bss_end__@@Base+0xa83e30>\n \t\t\t@ instruction: 0x4618447b\n \tbl\t10c286c <__bss_end__@@Base+0x10b05c4>\n \tblcs\t1608c <__bss_end__@@Base+0x3de4>\n \t\t\t@ instruction: 0xf507d150\n-/build/1st/ssocr-2.23.0/ssocr.c:979\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:979\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:979 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:979 (discriminator 1)\n \tstmiapl\tr3!, {r1, r3, r4, r8, r9, fp, lr}^\n \tandscs\tr6, r6, #1769472\t@ 0x1b0000\n \tstmdami\tr0!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7fc4478\n \t\t\t@ instruction: 0xf507ebb8\n-/build/1st/ssocr-2.23.0/ssocr.c:980\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:980\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50775ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf1077394\n \tldmdavs\tr9, {r3, r4, r9}\n \t\t\t@ instruction: 0xf0054610\n \tstrhtvs\tpc, [r8], -r5\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:981\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:981\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tbl\tffa428c4 <__bss_end__@@Base+0xffa3061c>\n-/build/1st/ssocr-2.23.0/ssocr.c:982\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:982\n \tb\tffac28c8 <__bss_end__@@Base+0xffab0620>\n-/build/1st/ssocr-2.23.0/ssocr.c:983\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:983\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \tsvclt\t0x0000e3aa\n \tandhi\tpc, r0, pc, lsr #7\n@@ -4261,84 +4261,84 @@\n \tandeq\tr9, r0, r8, ror #6\n \tandeq\tr9, r0, r6, asr #8\n \tandeq\tr9, r0, sl, lsr #7\n \tandeq\tr8, r0, r0, lsr #5\n \tandeq\tr9, r0, r4, asr r3\n \tandeq\tr9, r0, r0, ror #6\n \tandeq\tr9, r0, r0, asr #6\n-/build/1st/ssocr-2.23.0/ssocr.c:984\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:984\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tstclcc\t8, cr15, [r0], #-892\t@ 0xfffffc84\n \t\t\t@ instruction: 0x4618447b\n \tb\tff6c293c <__bss_end__@@Base+0xff6b0694>\n \tblcs\t1615c <__bss_end__@@Base+0x3eb4>\n \tbichi\tpc, r8, r0, asr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:985\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:985\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tldcne\t8, cr6, [sl, #-108]\t@ 0xffffff94\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5e9d8 <__bss_end__@@Base+0x4c730>\n \tvrshr.s64\td4, d10, #64\n \t\t\t@ instruction: 0xf50781a9\n-/build/1st/ssocr-2.23.0/ssocr.c:987\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:987\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tbl\tbc2984 <__bss_end__@@Base+0xbb06dc>\n \tsbceq\tpc, r0, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:988\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:988\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #10267\t@ 0x281b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf8c7eb1c\n \t\t\t@ instruction: 0xf50700c4\n-/build/1st/ssocr-2.23.0/ssocr.c:989\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:989\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r3, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tbl\t2429d0 <__bss_end__@@Base+0x230728>\n \tsbceq\tpc, r8, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:990\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:990\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #18459\t@ 0x481b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf8c7eaf6\n \t\t\t@ instruction: 0xf50700cc\n-/build/1st/ssocr-2.23.0/ssocr.c:991\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:991\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \trsbsle\tr2, r4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:992\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:992\n \tblcc\tfe242d9c <__bss_end__@@Base+0xfe230af4>\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r0], #135\t@ 0x87\n \tldrdcc\tpc, [r8], #135\t@ 0x87\n \t\t\t@ instruction: 0xf8d74413\n \t\t\t@ instruction: 0xf8d710c4\n \tstrmi\tr2, [sl], #-204\t@ 0xffffff34\n@@ -4347,30 +4347,30 @@\n \tsmlabtls\tr2, r8, r0, r1\n \tmovwls\tr9, #513\t@ 0x201\n \tldrdcc\tpc, [r4], #135\t@ 0x87\n \tldrdcs\tpc, [r0], #135\t@ 0x87\n \tblne\t1642dd0 <__bss_end__@@Base+0x1630b28>\n \t\t\t@ instruction: 0xf7fc4479\n \t\t\t@ instruction: 0xf507eaf0\n-/build/1st/ssocr-2.23.0/ssocr.c:995\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:995\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tsuble\tr2, r4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:996\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:996\n \tblcc\te42dec <__bss_end__@@Base+0xe30b44>\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tsp, {r0, r1, r4, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:997\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:997\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #10267\t@ 0x281b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tlr, {r0, r1, r4, sl, lr}\n@@ -4384,112 +4384,112 @@\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r4, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf5070092\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r2, r6, r7, r8, ip, sp, lr}\n \tldmdavs\tr2, {r1, r3, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:996\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:996\n \tmovwls\tr9, #513\t@ 0x201\n \t\t\t@ instruction: 0x462a4633\n \tbne\tff042e6c <__bss_end__@@Base+0xff030bc4>\n \t\t\t@ instruction: 0xf7fc4479\n \t\t\t@ instruction: 0xf8dfeaa2\n-/build/1st/ssocr-2.23.0/ssocr.c:999\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:999\n \tstmiapl\tr3!, {r4, r5, r7, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fc200a\n \t\t\t@ instruction: 0xf507eabe\n-/build/1st/ssocr-2.23.0/ssocr.c:1001\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1001\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r4, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1002\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1002\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tb\tfef42b1c <__bss_end__@@Base+0xfef30874>\n-/build/1st/ssocr-2.23.0/ssocr.c:1003\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1003\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \tandseq\tpc, r8, r7, lsl #2\n \tldrdcc\tpc, [ip], #135\t@ 0x87\n \t\t\t@ instruction: 0xf8d79300\n \t\t\t@ instruction: 0xf8d730c8\n \t\t\t@ instruction: 0xf8d720c4\n \t\t\t@ instruction: 0xf00510c0\n \teorvs\tpc, r8, r5, asr sp\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1004\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1004\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tb\tfe8c2b50 <__bss_end__@@Base+0xfe8b08a8>\n-/build/1st/ssocr-2.23.0/ssocr.c:1005\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1005\n \tstmib\tr4!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1006\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1006\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1007\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1007\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tb\tfe3c2b78 <__bss_end__@@Base+0xfe3b08d0>\n-/build/1st/ssocr-2.23.0/ssocr.c:1009\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1009\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [r0, #1443]\t@ 0x5a3\n \tstmib\tr6, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t@ instruction: 0xf5076028\n-/build/1st/ssocr-2.23.0/ssocr.c:1010\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1010\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf7fc758e\n \teorvs\tlr, r8, r6, ror sl\n-/build/1st/ssocr-2.23.0/ssocr.c:1011\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1011\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t59b4 \n \t\t\t@ instruction: 0xf507d108\n-/build/1st/ssocr-2.23.0/ssocr.c:1011 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1011 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandsle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1012\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1012\n \tldmibcc\tip, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, lr, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddsvc\tpc, r0, #679477248\t@ 0x28800000\n \tldmdavs\tr2, {r0, r1, r3, r4, fp, sp, lr}\n \tstmibne\tip, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf7fc4479\n \t\t\t@ instruction: 0xf507ea26\n-/build/1st/ssocr-2.23.0/ssocr.c:1016\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1016\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \ttstle\tr1, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1016 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1016 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t5890 \n \t\t\t@ instruction: 0xf507d108\n-/build/1st/ssocr-2.23.0/ssocr.c:1016 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1016 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \teorsle\tr2, r3, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1017\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1017\n \tstmibcc\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tsp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandseq\tpc, r8, r7, lsl #2\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tmovwls\tr6, #6171\t@ 0x181b\n \tmvnscc\tpc, #79\t@ 0x4f\n@@ -4508,67 +4508,67 @@\n \t\t\t@ instruction: 0xf892f005\n \tblvc\t1040738 <__bss_end__@@Base+0x102e490>\n \tblvc\t402b0 <__bss_end__@@Base+0x2e008>\n \tstrbmi\tr4, [fp], -r2, asr #12\n \tldmdbne\tr4!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x46284479\n \tldmib\tr6, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1023\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1023\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, r3, lsr #11\n \tandseq\tpc, r8, r7, lsl #2\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tmovwls\tr6, #10267\t@ 0x281b\n \tmvnscc\tpc, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf04f9301\n \tmovwls\tr3, #1023\t@ 0x3ff\n \tandcs\tr2, r0, #0, 6\n \tldc\t8, cr6, [r7, #36]\t@ 0x24\n \t\t\t@ instruction: 0xf0040b4c\n \tstc\t12, cr15, [r7, #932]\t@ 0x3a4\n \t\t\t@ instruction: 0xe1bf0b4c\n-/build/1st/ssocr-2.23.0/ssocr.c:1025\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1025\n \tstmiacc\tr0!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tstmiacs\tip!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-2284\t@ 0xfffff714\n \t\t\t@ instruction: 0xf7fc4618\n \trsbcs\tlr, r3, lr, lsr #19\n-/build/1st/ssocr-2.23.0/ssocr.c:1026\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1026\n \tb\t5c2cd4 <__bss_end__@@Base+0x5b0a2c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1028\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1028\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619681b\n \tstmiacc\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0x4618447b\n \tldm\tsl!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1651c <__bss_end__@@Base+0x4274>\n \tadchi\tpc, sp, r0, asr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:1029\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1029\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrrcne\t8, 1, r6, sl, cr11\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcc\t5ed98 <__bss_end__@@Base+0x4caf0>\n \tvrshr.s64\td4, d10, #64\n \t\t\t@ instruction: 0xf507808e\n-/build/1st/ssocr-2.23.0/ssocr.c:1030\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1030\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tsuble\tr2, r6, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1031\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1031\n \tstmdacc\tr0!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tsp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n@@ -4576,600 +4576,600 @@\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \tmrrc\t9, 4, lr, r3, cr8\n \t\t\t@ instruction: 0xf8df2b10\n \tldrbtmi\tr1, [r9], #-2132\t@ 0xfffff7ac\n \t\t\t@ instruction: 0xf7fc4628\n \t\t\t@ instruction: 0xf507e95e\n-/build/1st/ssocr-2.23.0/ssocr.c:1032\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1032\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1033\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1033\n \tldmdacc\tr4, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2068\t@ 0xfffff7ec\n \t\t\t@ instruction: 0xf7fc4619\n \t\t\t@ instruction: 0xf8dfe93c\n-/build/1st/ssocr-2.23.0/ssocr.c:1035\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1035\n \tstmiapl\tr3!, {r2, r5, r6, r7, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7fc200a\n \t\t\t@ instruction: 0xf507e958\n-/build/1st/ssocr-2.23.0/ssocr.c:1037\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1037\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4618681b\n \tldm\tsl!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tbleq\t14c0428 <__bss_end__@@Base+0x14ae180>\n-/build/1st/ssocr-2.23.0/ssocr.c:1038\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1038\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tbleq\t14c0478 <__bss_end__@@Base+0x14ae1d0>\n \t\t\t@ instruction: 0xf0054618\n \teorvs\tpc, r8, r7, asr r9\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1039\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1039\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tldmdb\tr8!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1040\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1040\n \tldmda\tsl!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1041\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1041\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, sl, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n \t\t\t@ instruction: 0xf8dfe0fa\n-/build/1st/ssocr-2.23.0/ssocr.c:1043\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1043\n \tstmiapl\tr3!, {r3, r4, r6, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8df681b\n \tldrbtmi\tr2, [sl], #-1912\t@ 0xfffff888\n \t\t\t@ instruction: 0x1774f8df\n \t\t\t@ instruction: 0x46184479\n \tstmia\tr8!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1045\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1045\n \t\t\t@ instruction: 0xf7fc2063\n \t\t\t@ instruction: 0xf507e952\n-/build/1st/ssocr-2.23.0/ssocr.c:1047\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1047\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-1868\t@ 0xfffff8b4\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0x4603e836\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780bb\n-/build/1st/ssocr-2.23.0/ssocr.c:1048\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1048\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5071c5a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr3, sl, #1024\t@ 0x400\n \taddshi\tpc, ip, r0, lsl #5\n-/build/1st/ssocr-2.23.0/ssocr.c:1049\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1049\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t5adc \n \t\t\t@ instruction: 0xf8dfd018\n-/build/1st/ssocr-2.23.0/ssocr.c:1050\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1050\n \tstmiapl\tr3!, {r3, r4, r6, r7, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tusatcc\tpc, #4, pc, asr #17\t@ \n \t\t\t@ instruction: 0x4619447b\n \tldm\tip, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1052\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1052\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmovwcc\tr6, #6171\t@ 0x181b\n \t\t\t@ instruction: 0xf507009b\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r6, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \tldrmi\tr2, [r9], -r5, lsl #4\n \tssatcc\tpc, #29, pc, asr #17\t@ \n \t\t\t@ instruction: 0x4618447b\n \tldmda\tsl!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1673c <__bss_end__@@Base+0x4494>\n \t\t\t@ instruction: 0xf507d10b\n-/build/1st/ssocr-2.23.0/ssocr.c:1053\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1053\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf10775ba\n \ttstcs\tr0, r8, lsl r3\n \t\t\t@ instruction: 0xf0054618\n \tldrdvs\tpc, [r8], -r1\t@ \n \t\t\t@ instruction: 0xf507e034\n-/build/1st/ssocr-2.23.0/ssocr.c:1054\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1054\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \taddseq\tr3, fp, r1, lsl #6\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tandcs\tr6, r4, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df4619\n \tldrbtmi\tr3, [fp], #-1656\t@ 0xfffff988\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0x4603e856\n \ttstle\tfp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1055\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1055\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tldrvc\tpc, [sl, #1443]!\t@ 0x5a3\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tldrmi\tr2, [r8], -r1, lsl #2\n \t\t\t@ instruction: 0xf9acf005\n \tand\tr6, pc, r8, lsr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:1057\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1057\n \t\t\t@ instruction: 0x3610f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0x2648f8df\n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-1608\t@ 0xfffff9b8\n \t\t\t@ instruction: 0xf7fc4618\n \trsbcs\tlr, r3, r6, asr #16\n-/build/1st/ssocr-2.23.0/ssocr.c:1059\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1059\n \tstmia\tlr!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1061\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1061\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1062\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1062\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf7fbe866\n-/build/1st/ssocr-2.23.0/ssocr.c:1063\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1063\n \t\t\t@ instruction: 0xf507ef68\n-/build/1st/ssocr-2.23.0/ssocr.c:1064\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1064\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773c0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \teor\tr6, r7, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1066\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1066\n \tldrcc\tpc, [r0, #2271]!\t@ 0x8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrbcs\tpc, [r0, #2271]!\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-1520\t@ 0xfffffa10\n \t\t\t@ instruction: 0xf7fc4618\n \trsbcs\tlr, r3, r6, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1068\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1068\n \tldmda\tlr!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1071\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1071\n \tldrcc\tpc, [r0, #2271]\t@ 0x8df\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \taddseq\tr6, fp, fp, lsl r8\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tsbcvc\tpc, r4, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x461a681b\n \tldrcc\tpc, [ip, #2271]!\t@ 0x8df\n \t\t\t@ instruction: 0x4619447b\n \tsvc\t0x00faf7fb\n-/build/1st/ssocr-2.23.0/ssocr.c:723 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:723 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:723 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:723 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5073b01\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf6fe429a\n \t\t\t@ instruction: 0xf507a89a\n-/build/1st/ssocr-2.23.0/ssocr.c:1077\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1077\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fc4618\n \t\t\t@ instruction: 0xf507e810\n-/build/1st/ssocr-2.23.0/ssocr.c:1080\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1080\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r3, r4, r7, r8, r9, ip, sp, lr}\n \tandsle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1081\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1081\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf507739c\n \t\t\t@ instruction: 0xf5a272cc\n \t\t\t@ instruction: 0xf507729a\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r2, r4, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r8, ip, pc}\n \t\t\t@ instruction: 0x46016812\n \tldreq\tpc, [r8, #-2271]!\t@ 0xfffff721\n \t\t\t@ instruction: 0xf0054478\n \t\t\t@ instruction: 0xf507fd6d\n-/build/1st/ssocr-2.23.0/ssocr.c:1085\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1085\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \ttsteq\tr0, #3\t@ \n \tandle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1085 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1085 (discriminator 1)\n \t\t\t@ instruction: 0xf7fc2003\n \t\t\t@ instruction: 0xf507e818\n-/build/1st/ssocr-2.23.0/ssocr.c:1087\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1087\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \tandsle\tr2, r1, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1089\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1089\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tandseq\tpc, r8, #-1073741823\t@ 0xc0000001\n \tldc\t8, cr6, [r7, #100]\t@ 0x64\n \tldrmi\tr0, [r0], -ip, asr #22\n \tblx\t14c111c <__bss_end__@@Base+0x14aee74>\n \t\t\t@ instruction: 0xf5074602\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0x601a73be\n-/build/1st/ssocr-2.23.0/ssocr.c:1093\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1093\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t5f28 \n \t\t\t@ instruction: 0xf8dfd015\n-/build/1st/ssocr-2.23.0/ssocr.c:1094\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1094\n \tstmiapl\tr3!, {r2, r3, r4, r5, r6, sl, ip, sp}^\n \tandscs\tr6, ip, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1224\t@ 0xfffffb38\n \tsvc\t0x006af7fb\n-/build/1st/ssocr-2.23.0/ssocr.c:1095\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1095\n \tstrbtcc\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r1, lsr #4\n \tldrteq\tpc, [r4], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7fb4478\n \t\t\t@ instruction: 0xf507ef60\n-/build/1st/ssocr-2.23.0/ssocr.c:1099\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1099\n \t\t\t@ instruction: 0xf5a373cc\n \ttstcs\tr8, r2, lsl #11\n \t\t\t@ instruction: 0xf7fb2001\n \t\t\t@ instruction: 0x4603eed4\n \t\t\t@ instruction: 0xf507602b\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r7, r8, r9, ip, sp, lr}\n \ttstle\tr8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1100\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1100\n \tstrcc\tpc, [ip], #2271\t@ 0x8df\n \t\t\t@ instruction: 0x4618447b\n \tmrc\t7, 6, APSR_nzcv, cr12, cr11, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1101\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1101\n \t\t\t@ instruction: 0xf7fb2063\n \t\t\t@ instruction: 0xf8dfefc4\n-/build/1st/ssocr-2.23.0/ssocr.c:1105\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1105\n \tldrbtmi\tr3, [fp], #-1152\t@ 0xfffffb80\n \tblcs\t1f200 <__bss_end__@@Base+0xcf58>\n \tmovwcs\tfp, #7956\t@ 0x1f14\n \tsbcslt\tr2, sl, #0, 6\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r4, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1106\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1106\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #176, 6\t@ 0xc0000002\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1107\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1107\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #180, 6\t@ 0xd0000002\n \trsb\tr6, r7, #26\n-/build/1st/ssocr-2.23.0/ssocr.c:1109\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1109\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, ip, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r2, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1110\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1110\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1111\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1111\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b2f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e066\n-/build/1st/ssocr-2.23.0/ssocr.c:1112\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1112\n \t\t\t@ instruction: 0xf50772ba\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50771b2\n \t\t\t@ instruction: 0xf5a373cc\n \tstmdavs\tr9, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb6818\n \t\t\t@ instruction: 0xf507ef5e\n-/build/1st/ssocr-2.23.0/ssocr.c:1113\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1113\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077394\n \tldmdavs\tr9, {r1, r3, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0054610\n \t\t\t@ instruction: 0xf8c7fa63\n \tldfs\tf0, [r7, #144]\t@ 0x90\n-/build/1st/ssocr-2.23.0/ssocr.c:1114\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1114\n \t\t\t@ instruction: 0xf8d70b4c\n \t\t\t@ instruction: 0xf0030124\n \tstrmi\tpc, [r3], -r7, lsl #25\n \teorle\tr2, r4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1115\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1115\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1116\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1116\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077280\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r1, r2, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \tblmi\tffb7c6e0 <__bss_end__@@Base+0xffb6a438>\n-/build/1st/ssocr-2.23.0/ssocr.c:1118\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1118\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, ip, lsl #7\n \t\t\t@ instruction: 0xf507e013\n-/build/1st/ssocr-2.23.0/ssocr.c:1120\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1120\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r3, r7, r8, r9, ip, sp, lr}\n \ttstle\tip, r2, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1121\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1121\n \tldrbtmi\tr4, [fp], #-3043\t@ 0xfffff41d\n \tblcs\t1f2f8 <__bss_end__@@Base+0xd050>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, sl, #0, 6\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, ip, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1111 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1111 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b2\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1111 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1111 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r2, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, lr, #683671552\t@ 0x28c00000\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \tblle\tfe315d34 <__bss_end__@@Base+0xfe303a8c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1125\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1125\n \tldrbtmi\tr4, [fp], #-3026\t@ 0xfffff42e\n \tblcs\t1f340 <__bss_end__@@Base+0xd098>\n \tmovwcs\tfp, #7956\t@ 0x1f14\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \tblmi\tff2e5530 <__bss_end__@@Base+0xff2d3288>\n-/build/1st/ssocr-2.23.0/ssocr.c:1126\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1126\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0x461ab2db\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, ip, #683671552\t@ 0x28c00000\n \taddsmi\tr6, r3, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507d17f\n-/build/1st/ssocr-2.23.0/ssocr.c:1128\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1128\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r0, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1129\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1129\n \tstmiapl\tr3!, {r0, r5, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tfp, {r4, r5, r7, r9, ip, sp, lr}\n \tldmibmi\tr9!, {r1, r4, fp, sp, lr}\n \t\t\t@ instruction: 0xf7fb4479\n \t\t\t@ instruction: 0xf507ee7c\n-/build/1st/ssocr-2.23.0/ssocr.c:1132\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1132\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8dbb2 <__bss_end__@@Base+0x7b90a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5074413\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1133\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1133\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8dbda <__bss_end__@@Base+0x7b932>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tandcs\tr4, r0, #318767104\t@ 0x13000000\n \t\t\t@ instruction: 0xf507605a\n-/build/1st/ssocr-2.23.0/ssocr.c:1134\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1134\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \teorle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1135\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1135\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0x4618681b\n \tmrc\t7, 3, APSR_nzcv, cr12, cr11, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1136\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1136\n \tandcs\tr2, r0, #-67108861\t@ 0xfc000003\n \trscscs\tr2, pc, r0, lsl #2\n \tmrc\t7, 5, APSR_nzcv, cr2, cr11, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1137\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1137\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, lr, #683671552\t@ 0x28c00000\n \tblcc\t5f430 <__bss_end__@@Base+0x4d188>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tbicvc\tpc, ip, r7, lsl #10\n \tadcsvc\tpc, r4, r1, lsr #11\n \tmrsls\tr2, (UNDEF: 16)\n \ttstcs\tr0, r2, lsl r8\n \t\t\t@ instruction: 0xf7fb6800\n \t\t\t@ instruction: 0xf507ee8c\n-/build/1st/ssocr-2.23.0/ssocr.c:1138\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1138\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb4618\n \tblmi\tfe340d5c <__bss_end__@@Base+0xfe32eab4>\n-/build/1st/ssocr-2.23.0/ssocr.c:1140\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1140\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x000c2b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r4, lsl #7\n \tblmi\tfe1bd8e4 <__bss_end__@@Base+0xfe1ab63c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1142\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1142\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x000c2b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0x461ab2db\n-/build/1st/ssocr-2.23.0/ssocr.c:1141\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1141\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r4, #683671552\t@ 0x28c00000\n \taddsmi\tr6, r3, #1769472\t@ 0x1b0000\n \tmsrhi\tCPSR_sc, r0, asr #32\n-/build/1st/ssocr-2.23.0/ssocr.c:1143\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1143\n \tldrbtmi\tr4, [fp], #-2942\t@ 0xfffff482\n \tblcs\t1f4a4 <__bss_end__@@Base+0xd1fc>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r3, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \t\t\t@ instruction: 0xf5078114\n-/build/1st/ssocr-2.23.0/ssocr.c:1145\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1145\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r0, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1146\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1146\n \tstmiapl\tr3!, {r4, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tfp, {r4, r5, r7, r9, ip, sp, lr}\n \tstmdbmi\tip!, {r1, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf7fb4479\n \t\t\t@ instruction: 0xf507edda\n-/build/1st/ssocr-2.23.0/ssocr.c:1148\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1148\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8dcf6 <__bss_end__@@Base+0x7ba4e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5074413\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507609a\n-/build/1st/ssocr-2.23.0/ssocr.c:1149\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1149\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8dd1e <__bss_end__@@Base+0x7ba76>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5074413\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r3, r7, r9, ip, sp, lr}\n \tsbcsvs\tr3, sl, r1, lsl #20\n-/build/1st/ssocr-2.23.0/ssocr.c:1150\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1150\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1151\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1151\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \teorle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1152\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1152\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0x4618681b\n \tstcl\t7, cr15, [sl, #1004]\t@ 0x3ec\n-/build/1st/ssocr-2.23.0/ssocr.c:1153\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1153\n \trscscs\tr2, pc, #-67108861\t@ 0xfc000003\n \tandcs\tr2, r0, r0, lsl #2\n \tmcr\t7, 0, pc, cr0, cr11, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1154\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1154\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, lr, #683671552\t@ 0x28c00000\n \tblcc\t5f594 <__bss_end__@@Base+0x4d2ec>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tbicvc\tpc, ip, r7, lsl #10\n \tadcsvc\tpc, r4, r1, lsr #11\n \tmrsls\tr2, (UNDEF: 16)\n \ttstcs\tr0, r2, lsl r8\n \t\t\t@ instruction: 0xf7fb6800\n \t\t\t@ instruction: 0xf507edda\n-/build/1st/ssocr-2.23.0/ssocr.c:1155\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1155\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb4618\n \t\t\t@ instruction: 0xf507eda8\n-/build/1st/ssocr-2.23.0/ssocr.c:1158\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1158\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrmi\tr3, [sl], -r1, lsl #6\n \tblx\tce1ca <__bss_end__@@Base+0xbbf22>\n \t\t\t@ instruction: 0xf507f202\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077582\n@@ -5177,18 +5177,18 @@\n \tldrmi\tr7, [r1], -r2, lsl #7\n \t\t\t@ instruction: 0xf7fb6818\n \tstrhtvs\tlr, [r8], -r0\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r2, #683671552\t@ 0x28c00000\n \tblcs\t1f5fc <__bss_end__@@Base+0xd354>\n \tblmi\ta39adc <__bss_end__@@Base+0xa27834>\n-/build/1st/ssocr-2.23.0/ssocr.c:1159\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1159\n \t\t\t@ instruction: 0x4618447b\n \tldcl\t7, cr15, [r0], {251}\t@ 0xfb\n-/build/1st/ssocr-2.23.0/ssocr.c:1160\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1160\n \t\t\t@ instruction: 0xf7fb2063\n \tsvclt\t0x0000edb8\n \t\t\t@ instruction: 0x000092b4\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tr9, r0, ip, lsr #3\n \tandeq\tr9, r0, r8, asr #2\n \tandeq\tr9, r0, r4, ror r0\n@@ -5220,313 +5220,313 @@\n \tandeq\tip, r0, r0, lsr pc\n \tandeq\tr8, r0, r0, asr #22\n \tandeq\tip, r0, ip, lsr #28\n \tandeq\tip, r0, r0, lsl lr\n \tandeq\tip, r0, lr, ror #27\n \tandeq\tr8, r0, r0, lsr sl\n \tandeq\tr8, r0, ip, asr #18\n-/build/1st/ssocr-2.23.0/ssocr.c:1163\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1163\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \ttstcs\tr0, r8, lsl r2\n \t\t\t@ instruction: 0xf7fb4618\n \t\t\t@ instruction: 0xf8dfec64\n-/build/1st/ssocr-2.23.0/ssocr.c:1164\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1164\n \tldrbtmi\tr3, [fp], #-3280\t@ 0xfffff330\n \tblcs\t1f6d4 <__bss_end__@@Base+0xd42c>\n \tmovwcs\tfp, #7956\t@ 0x1f14\n \tsbcslt\tr2, sl, #0, 6\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r4, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1107 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1107 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1107 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1107 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r0, #683671552\t@ 0x28c00000\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \t\t\t@ instruction: 0xf6ff429a\n \t\t\t@ instruction: 0xf8dfad8b\n-/build/1st/ssocr-2.23.0/ssocr.c:1172\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1172\n \tldrbtmi\tr3, [fp], #-3208\t@ 0xfffff378\n \tblcs\t1f720 <__bss_end__@@Base+0xd478>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xd15f4293\n-/build/1st/ssocr-2.23.0/ssocr.c:1173\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1173\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t64dc \n \t\t\t@ instruction: 0xf8dfd013\n-/build/1st/ssocr-2.23.0/ssocr.c:1174\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1174\n \tstmiapl\tr3!, {r3, r4, r6, sl, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5073b01\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tldcne\t8, cr15, [ip], #-892\t@ 0xfffffc84\n \t\t\t@ instruction: 0xf7fb4479\n \t\t\t@ instruction: 0xf507ec9a\n-/build/1st/ssocr-2.23.0/ssocr.c:1176\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1176\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8df76 <__bss_end__@@Base+0x7bcce>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5074413\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r7, r9, ip, sp, lr}\n \taddsvs\tr3, sl, r1, lsl #20\n-/build/1st/ssocr-2.23.0/ssocr.c:1177\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1177\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, lr, #679477248\t@ 0x28800000\n \tbcc\t5f7a0 <__bss_end__@@Base+0x4d4f8>\n \t\t\t@ instruction: 0xf50760da\n-/build/1st/ssocr-2.23.0/ssocr.c:1178\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1178\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1179\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1179\n \tblcc\tff343af0 <__bss_end__@@Base+0xff331848>\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r4, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1183\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1183\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a8f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandsvs\tr6, sl, r2, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1184\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1184\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t65b0 \n \t\t\t@ instruction: 0xf8dfd00e\n-/build/1st/ssocr-2.23.0/ssocr.c:1185\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1185\n \tstmiapl\tr3!, {r2, r7, r8, r9, fp, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r3, r5, r7, r8, r9, ip, sp, lr}\n \tblcc\t1f43b44 <__bss_end__@@Base+0x1f3189c>\n \t\t\t@ instruction: 0x4619447b\n \tldc\t7, cr15, [r4], #-1004\t@ 0xfffffc14\n-/build/1st/ssocr-2.23.0/ssocr.c:1190\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1190\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t65e0 \n \t\t\t@ instruction: 0xf8dfd00a\n-/build/1st/ssocr-2.23.0/ssocr.c:1191\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1191\n \tstmiapl\tr3!, {r2, r4, r6, r8, r9, fp, ip, sp}^\n \teorcs\tr6, sp, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-2904\t@ 0xfffff4a8\n \tstc\t7, cr15, [lr], {251}\t@ 0xfb\n-/build/1st/ssocr-2.23.0/ssocr.c:1193\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1193\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \tmovwcs\tlr, #843\t@ 0x34b\n-/build/1st/ssocr-2.23.0/ssocr.c:1194\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1194\n \taddscc\tpc, ip, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1195\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1195\n \tblcc\tf43b8c <__bss_end__@@Base+0xf318e4>\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r4, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1197\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1197\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b2f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e286\n-/build/1st/ssocr-2.23.0/ssocr.c:1198\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1198\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r2, #671088642\t@ 0x28000002\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1199\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1199\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #128, 6\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1201\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1201\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e0be <__bss_end__@@Base+0x7be16>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf507441a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \trsb\tr6, r8, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1202\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1202\n \tadcsvc\tpc, sl, #29360128\t@ 0x1c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x71b2f5a3\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tldmdavs\tr8, {r0, r3, fp, sp, lr}\n \tldc\t7, cr15, [r4], {251}\t@ 0xfb\n-/build/1st/ssocr-2.23.0/ssocr.c:1203\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1203\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n \tadcsvc\tpc, sl, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x46106819\n \t\t\t@ instruction: 0xff1af004\n \tsmlawteq\tr4, r7, r8, pc\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1204\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1204\n \tbleq\t1340f0c <__bss_end__@@Base+0x132ec64>\n \tldrdeq\tpc, [r4, -r7]!\n \t\t\t@ instruction: 0xf93ef003\n \tblcs\t170c8 <__bss_end__@@Base+0x4e20>\n \t\t\t@ instruction: 0xf507d025\n-/build/1st/ssocr-2.23.0/ssocr.c:1205\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1205\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077380\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1206\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1206\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r0, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a6f5a3\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \tsfmle\tf4, 4, [r3, #-616]!\t@ 0xfffffd98\n-/build/1st/ssocr-2.23.0/ssocr.c:1208\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1208\n \tbcc\t1843c6c <__bss_end__@@Base+0x18319c4>\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, sl, lsl #7\n \t\t\t@ instruction: 0xf507e014\n-/build/1st/ssocr-2.23.0/ssocr.c:1210\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1210\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r3, r7, r8, r9, ip, sp, lr}\n \ttstle\tsp, r2, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1211\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1211\n \tbcc\te43c98 <__bss_end__@@Base+0xe319f0>\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x000c2b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, sl, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1201 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1201 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1201 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1201 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e1ba <__bss_end__@@Base+0x7bf12>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r4, sl, lr}\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \taddsmi\tr6, sl, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf8dfdd80\n-/build/1st/ssocr-2.23.0/ssocr.c:1215\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1215\n \tldrbtmi\tr3, [fp], #-2528\t@ 0xfffff620\n \tblcs\t1f9ec <__bss_end__@@Base+0xd744>\n \tmovwcs\tfp, #7956\t@ 0x1f14\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \t\t\t@ instruction: 0xf8df8122\n-/build/1st/ssocr-2.23.0/ssocr.c:1216\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1216\n \tldrbtmi\tr3, [fp], #-2496\t@ 0xfffff640\n \tblcs\t1fa10 <__bss_end__@@Base+0xd768>\n \tmovwcs\tfp, #7956\t@ 0x1f14\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r3, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \t\t\t@ instruction: 0xf8d78110\n-/build/1st/ssocr-2.23.0/ssocr.c:1217\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1217\n \tblcs\t11c34 \n \taddhi\tpc, r4, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1218\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1218\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r2, #679477248\t@ 0x28800000\n \tsbcsvs\tr6, sl, r2, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1219\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1219\n \tstmdbcc\tip!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x000c2b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r4, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1220\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1220\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t663c \n \torrhi\tpc, r6, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1221\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1221\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0x4618681b\n \tbl\tec3a1c <__bss_end__@@Base+0xeb1774>\n-/build/1st/ssocr-2.23.0/ssocr.c:1222\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1222\n \tandcs\tr2, r0, #-67108861\t@ 0xfc000003\n \tstrdcs\tr2, [r0], -pc\t@ \n \tbl\t1c43a28 <__bss_end__@@Base+0x1c31780>\n-/build/1st/ssocr-2.23.0/ssocr.c:1223\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1223\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -5534,79 +5534,79 @@\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e2ca <__bss_end__@@Base+0x7c022>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tr9, {r0, r1, r4, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1224\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1224\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1223\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1223\n \t\t\t@ instruction: 0xf507689d\n-/build/1st/ssocr-2.23.0/ssocr.c:1224\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1224\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e306 <__bss_end__@@Base+0x7c05e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r4, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1223\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1223\n \tandls\tr2, r0, #0, 4\n \t\t\t@ instruction: 0xf7fb462a\n \t\t\t@ instruction: 0xf507eb1e\n-/build/1st/ssocr-2.23.0/ssocr.c:1225\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1225\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb4618\n \t\t\t@ instruction: 0xe12deaec\n-/build/1st/ssocr-2.23.0/ssocr.c:1228\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1228\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r2, #679477248\t@ 0x28800000\n \tsubsvs\tr6, sl, r2, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1229\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1229\n \t\t\t@ instruction: 0xf8c72301\n \t\t\t@ instruction: 0xf8df309c\n-/build/1st/ssocr-2.23.0/ssocr.c:1230\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1230\n \tldrbtmi\tr3, [fp], #-2148\t@ 0xfffff79c\n \tblcs\t1fb74 <__bss_end__@@Base+0xd8cc>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, sl, #0, 6\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r4, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1231\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1231\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf50780ff\n-/build/1st/ssocr-2.23.0/ssocr.c:1232\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1232\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb4618\n \tmvnscs\tlr, #180, 20\t@ 0xb4000\n-/build/1st/ssocr-2.23.0/ssocr.c:1233\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1233\n \tmvnscs\tr2, r0, lsl #4\n \t\t\t@ instruction: 0xf7fb2000\n \t\t\t@ instruction: 0xf507eaea\n-/build/1st/ssocr-2.23.0/ssocr.c:1234\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1234\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e3ba <__bss_end__@@Base+0x7c112>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tr8, {r0, r1, r4, sl, lr}\n@@ -5614,96 +5614,96 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf5076859\n-/build/1st/ssocr-2.23.0/ssocr.c:1235\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1235\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e3f6 <__bss_end__@@Base+0x7c14e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsp, {r0, r1, r4, sl, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1234\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1234\n \tandcs\tr6, r0, #5963776\t@ 0x5b0000\n \tstrtmi\tr9, [sl], -r0, lsl #4\n \tb\tfe5c3bb8 <__bss_end__@@Base+0xfe5b1910>\n-/build/1st/ssocr-2.23.0/ssocr.c:1236\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1236\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tb\t1943bc8 <__bss_end__@@Base+0x1931920>\n-/build/1st/ssocr-2.23.0/ssocr.c:1217\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1217\n \t\t\t@ instruction: 0xf8dfe0a6\n-/build/1st/ssocr-2.23.0/ssocr.c:1240\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1240\n \tldrbtmi\tr3, [fp], #-1928\t@ 0xfffff878\n \tblcs\t1fc54 <__bss_end__@@Base+0xd9ac>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n-/build/1st/ssocr-2.23.0/ssocr.c:1239\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1239\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \t\t\t@ instruction: 0xf8df8096\n-/build/1st/ssocr-2.23.0/ssocr.c:1241\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1241\n \tldrbtmi\tr3, [fp], #-1896\t@ 0xfffff898\n \tblcs\t1fc78 <__bss_end__@@Base+0xd9d0>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n-/build/1st/ssocr-2.23.0/ssocr.c:1240\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1240\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r3, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \t\t\t@ instruction: 0xf5078084\n-/build/1st/ssocr-2.23.0/ssocr.c:1244\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1244\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e496 <__bss_end__@@Base+0x7c1ee>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5074413\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r4, r5, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf8df60da\n-/build/1st/ssocr-2.23.0/ssocr.c:1245\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1245\n \tldrbtmi\tr3, [fp], #-1824\t@ 0xfffff8e0\n \tblcs\t1fcc4 <__bss_end__@@Base+0xda1c>\n \tmovwcs\tfp, #7956\t@ 0x1f14\n \tsbcslt\tr2, sl, #0, 6\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r4, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1246\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1246\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \tsubsle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1247\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1247\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0x4618681b\n \tb\t343c78 <__bss_end__@@Base+0x3319d0>\n-/build/1st/ssocr-2.23.0/ssocr.c:1248\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1248\n \tandcs\tr2, r0, #-67108861\t@ 0xfc000003\n \tstrdcs\tr2, [r0], -pc\t@ \n \tb\t10c3c84 <__bss_end__@@Base+0x10b19dc>\n-/build/1st/ssocr-2.23.0/ssocr.c:1249\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1249\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -5711,102 +5711,102 @@\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e526 <__bss_end__@@Base+0x7c27e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tr9, {r0, r1, r4, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1250\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1250\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1249\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1249\n \t\t\t@ instruction: 0xf507689d\n-/build/1st/ssocr-2.23.0/ssocr.c:1250\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1250\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e562 <__bss_end__@@Base+0x7c2ba>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r4, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1249\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1249\n \tandls\tr2, r0, #0, 4\n \t\t\t@ instruction: 0xf7fb462a\n \t\t\t@ instruction: 0xf507e9f0\n-/build/1st/ssocr-2.23.0/ssocr.c:1251\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1251\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r6, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb4618\n \t\t\t@ instruction: 0xe000e9be\n-/build/1st/ssocr-2.23.0/ssocr.c:1217\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1217\n \t\t\t@ instruction: 0xf507bf00\n-/build/1st/ssocr-2.23.0/ssocr.c:1197 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1197 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b2\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1197 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1197 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r2, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, lr, #683671552\t@ 0x28c00000\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \t\t\t@ instruction: 0xf6ff429a\n \t\t\t@ instruction: 0xf8dfad6c\n-/build/1st/ssocr-2.23.0/ssocr.c:1256\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1256\n \tldrbtmi\tr3, [fp], #-1556\t@ 0xfffff9ec\n \tblcs\t1fdd4 <__bss_end__@@Base+0xdb2c>\n \tmovwcs\tfp, #7948\t@ 0x1f0c\n \tsbcslt\tr2, fp, #0, 6\n \t\t\t@ instruction: 0xf507461a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf0404293\n \t\t\t@ instruction: 0xf5078083\n-/build/1st/ssocr-2.23.0/ssocr.c:1257\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1257\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e5f2 <__bss_end__@@Base+0x7c34a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5074413\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r3, r7, r9, ip, sp, lr}\n \tsbcsvs\tr3, sl, r1, lsl #20\n-/build/1st/ssocr-2.23.0/ssocr.c:1258\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1258\n \tstrbcc\tpc, [r8, #2271]\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tsvclt\t0x00142b00\n \tmovwcs\tr2, #769\t@ 0x301\n \t\t\t@ instruction: 0xf507b2da\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r4, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1259\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1259\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t69f8 \n \t\t\t@ instruction: 0xf507d056\n-/build/1st/ssocr-2.23.0/ssocr.c:1260\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1260\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fb4618\n \tmvnscs\tlr, #1540096\t@ 0x178000\n-/build/1st/ssocr-2.23.0/ssocr.c:1261\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1261\n \tmvnscs\tr2, r0, lsl #4\n \t\t\t@ instruction: 0xf7fb2000\n \t\t\t@ instruction: 0xf507e994\n-/build/1st/ssocr-2.23.0/ssocr.c:1262\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1262\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e666 <__bss_end__@@Base+0x7c3be>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tr8, {r0, r1, r4, sl, lr}\n@@ -5814,93 +5814,93 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf50768d9\n-/build/1st/ssocr-2.23.0/ssocr.c:1263\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1263\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e6a2 <__bss_end__@@Base+0x7c3fa>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsp, {r0, r1, r4, sl, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1262\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1262\n \tandcs\tr6, r0, #14352384\t@ 0xdb0000\n \tstrtmi\tr9, [sl], -r0, lsl #4\n \tstmdb\tr0, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1264\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1264\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tstmdb\tlr, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1193 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1193 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1193 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1193 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50772b0\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r3, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \tstcge\t6, cr15, [r7], #1020\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/ssocr.c:1268\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1268\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t6cc8 \n \t\t\t@ instruction: 0xf8dfd00e\n-/build/1st/ssocr-2.23.0/ssocr.c:1269\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1269\n \tstmiapl\tr3!, {r2, r3, r5, r6, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r3, r5, r7, r8, r9, ip, sp, lr}\n \tldrcc\tpc, [ip], #2271\t@ 0x8df\n \t\t\t@ instruction: 0x4619447b\n \tstmia\tr8!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1274\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1274\n \tldrdcc\tpc, [r4, #-135]!\t@ 0xffffff79\n \t\t\t@ instruction: 0xdc042b01\n-/build/1st/ssocr-2.23.0/ssocr.c:1274 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1274 (discriminator 1)\n \tldrdcc\tpc, [r8, #-135]!\t@ 0xffffff79\n \tvqrdmulh.s\td18, d0, d1\n \tmovwcs\tr8, #392\t@ 0x188\n-/build/1st/ssocr-2.23.0/ssocr.c:1275\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1275\n \tadccc\tpc, r0, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1277\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1277\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t6d10 \n \t\t\t@ instruction: 0xf8dfd00a\n-/build/1st/ssocr-2.23.0/ssocr.c:1278\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1278\n \tstmiapl\tr3!, {r2, r5, sl, ip, sp}^\n \teorcs\tr6, r4, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1120\t@ 0xfffffba0\n \tldmda\tr6!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1281\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1281\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e082\n-/build/1st/ssocr-2.23.0/ssocr.c:1282\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1282\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e7a6 <__bss_end__@@Base+0x7c4fe>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -5910,15 +5910,15 @@\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff49ffe0 <__bss_end__@@Base+0xff48dd38>\n \tldrdcc\tpc, [r4, #-135]!\t@ 0xffffff79\n \tblle\tf969e4 <__bss_end__@@Base+0xf8473c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1283 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1283 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -5928,95 +5928,95 @@\n \tblx\t4e40a <__bss_end__@@Base+0x3c162>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n \t\t\t@ instruction: 0xf8d71ad2\n \taddsmi\tr3, sl, #104, 2\n-/build/1st/ssocr-2.23.0/ssocr.c:1282 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1282 (discriminator 1)\n \t\t\t@ instruction: 0xf507db1b\n-/build/1st/ssocr-2.23.0/ssocr.c:1284\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1284\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, ip, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1285\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1285\n \tstmiapl\tr3!, {r3, r4, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-3047\t@ 0xfffff419\n \t\t\t@ instruction: 0xf7fb4619\n \t\t\t@ instruction: 0xf8d7e826\n-/build/1st/ssocr-2.23.0/ssocr.c:1287\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1287\n \tmovwcc\tr3, #4256\t@ 0x10a0\n \tadccc\tpc, r0, r7, asr #17\n \t\t\t@ instruction: 0xf507e015\n-/build/1st/ssocr-2.23.0/ssocr.c:1288\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1288\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, ip, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1289\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1289\n \tstmiapl\tr3!, {r1, r3, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-3034\t@ 0xfffff426\n \t\t\t@ instruction: 0xf7fb4619\n \t\t\t@ instruction: 0xf507e80a\n-/build/1st/ssocr-2.23.0/ssocr.c:1281 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1281 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1281 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1281 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a8f5a3\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \t\t\t@ instruction: 0xf6ff429a\n \t\t\t@ instruction: 0xf507af70\n-/build/1st/ssocr-2.23.0/ssocr.c:1292\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1292\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, sp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1293\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1293\n \tstmiapl\tr3!, {r0, r1, r4, r5, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r3, r5, r7, r8, r9, ip, sp, lr}\n \tldrdcs\tpc, [r0], r7\t@ \n \tldrbtmi\tr4, [r9], #-2499\t@ 0xfffff63d\n \tsvc\t0x00daf7fa\n-/build/1st/ssocr-2.23.0/ssocr.c:1297\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1297\n \tldrdcc\tpc, [r0], r7\t@ \n \t\t\t@ instruction: 0x46182118\n \tsvc\t0x003ef7fa\n \t\t\t@ instruction: 0xf8c74603\n \t\t\t@ instruction: 0xf8d730f8\n \tblcs\t1247c <__bss_end__@@Base+0x1d4>\n \tblmi\tfef3a4bc <__bss_end__@@Base+0xfef28214>\n-/build/1st/ssocr-2.23.0/ssocr.c:1298\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1298\n \t\t\t@ instruction: 0x4618447b\n \tsvc\t0x004af7fa\n-/build/1st/ssocr-2.23.0/ssocr.c:1299\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1299\n \t\t\t@ instruction: 0xf7fb2063\n \tmovwcs\tlr, #2098\t@ 0x832\n-/build/1st/ssocr-2.23.0/ssocr.c:1302\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1302\n \tadccc\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1303\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1303\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e081\n-/build/1st/ssocr-2.23.0/ssocr.c:1304\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1304\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e932 <__bss_end__@@Base+0x7c68a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -6026,15 +6026,15 @@\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4a016c <__bss_end__@@Base+0xff48dec4>\n \tldrdcc\tpc, [r4, #-135]!\t@ 0xffffff79\n \tblle\t14d6b70 <__bss_end__@@Base+0x14c48c8>\n-/build/1st/ssocr-2.23.0/ssocr.c:1305 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1305 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6044,162 +6044,162 @@\n \tblx\t4e596 <__bss_end__@@Base+0x3c2ee>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n \t\t\t@ instruction: 0xf8d71ad2\n \taddsmi\tr3, sl, #104, 2\n-/build/1st/ssocr-2.23.0/ssocr.c:1304 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1304 (discriminator 1)\n \t\t\t@ instruction: 0xf8d7db30\n-/build/1st/ssocr-2.23.0/ssocr.c:1306\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1306\n \t\t\t@ instruction: 0xf8d720a4\n \taddsmi\tr3, sl, #160\t@ 0xa0\n \tblmi\t1dfcd88 <__bss_end__@@Base+0x1deaae0>\n-/build/1st/ssocr-2.23.0/ssocr.c:1307\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1307\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r6, lsr #4\n \tldrbtmi\tr4, [r8], #-2187\t@ 0xfffff775\n \tsvc\t0x0054f7fa\n-/build/1st/ssocr-2.23.0/ssocr.c:1308\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1308\n \t\t\t@ instruction: 0xf7fa2063\n \t\t\t@ instruction: 0xf8d7efd0\n-/build/1st/ssocr-2.23.0/ssocr.c:1310\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1310\n \tandscs\tr3, r8, #164\t@ 0xa4\n \tvqrdmulh.s\td15, d3, d2\n \tldrsbtcs\tpc, [r8], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf50718d0\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8e9f2 <__bss_end__@@Base+0x7c74a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tandscs\tr4, r8, #318767104\t@ 0x13000000\n \t\t\t@ instruction: 0xf7fa4619\n \t\t\t@ instruction: 0xf8d7ef0e\n-/build/1st/ssocr-2.23.0/ssocr.c:1311\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1311\n \tmovwcc\tr3, #4260\t@ 0x10a4\n \tadccc\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1303 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1303 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1303 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1303 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50772b0\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r3, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \tsvcge\t0x0071f6ff\n-/build/1st/ssocr-2.23.0/ssocr.c:1314\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1314\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r2, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf7fa6818\n \t\t\t@ instruction: 0xf507eeb4\n-/build/1st/ssocr-2.23.0/ssocr.c:1315\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1315\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf8d77382\n \tldrshvs\tr2, [sl], -r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1316\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1316\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a8f5a3\n \tldrdcs\tpc, [r0], r7\t@ \n \t\t\t@ instruction: 0xf8d7601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1320\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1320\n \tblcs\t127c0 <__bss_end__@@Base+0x518>\n \t\t\t@ instruction: 0xf8d7db55\n-/build/1st/ssocr-2.23.0/ssocr.c:1321 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1321 (discriminator 1)\n \t\t\t@ instruction: 0xf507316c\n-/build/1st/ssocr-2.23.0/ssocr.c:1320 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1320 (discriminator 1)\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r3, r5, r7, r9, ip, sp, lr}\n \tblle\t216c8c <__bss_end__@@Base+0x2049e4>\n-/build/1st/ssocr-2.23.0/ssocr.c:1322\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1322\n \tldrsbcc\tpc, [r0, #-135]!\t@ 0xffffff79\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1321\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1321\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcvc\tpc, r8, #679477248\t@ 0x28800000\n \taddsmi\tr6, sl, #1179648\t@ 0x120000\n \tblmi\t103d744 <__bss_end__@@Base+0x102b49c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1323\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1323\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [ip, #-135]!\t@ 0xffffff79\n \tldrsbne\tpc, [r0, #-135]!\t@ 0xffffff79\t@ \n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a8f5a3\n \tmovwls\tr6, #2075\t@ 0x81b\n \tldmdbmi\tr1, {r0, r1, r3, r9, sl, lr}^\n \t\t\t@ instruction: 0xf7fa4479\n \t\t\t@ instruction: 0xf7faeef0\n-/build/1st/ssocr-2.23.0/ssocr.c:1325\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1325\n \t\t\t@ instruction: 0xf507ee3a\n-/build/1st/ssocr-2.23.0/ssocr.c:1326\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1326\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \teorle\tr2, r3, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1327\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1327\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077398\n \t\t\t@ instruction: 0xf5a272cc\n \t\t\t@ instruction: 0xf507729a\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r2, r4, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r8, ip, pc}\n \t\t\t@ instruction: 0x46016812\n \tldrbtmi\tr4, [r8], #-2111\t@ 0xfffff7c1\n \tstc2\t0, cr15, [r0], {4}\n-/build/1st/ssocr-2.23.0/ssocr.c:1328\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1328\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0x4618681b\n \tmrc\t7, 7, APSR_nzcv, cr8, cr10, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1329\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1329\n \tmcr\t7, 0, pc, cr12, cr10, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1331\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1331\n \t\t\t@ instruction: 0xf7fa2001\n \t\t\t@ instruction: 0xf507ef2a\n-/build/1st/ssocr-2.23.0/ssocr.c:1335\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1335\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r3, r5, r7, r8, r9, ip, sp, lr}\n \trscscc\tpc, ip, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1336\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1336\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t70dc \n \tblmi\t5ba304 <__bss_end__@@Base+0x5a805c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1337\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1337\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrsbtcs\tpc, [ip], #135\t@ 0x87\t@ \n \tldrbtmi\tr4, [r9], #-2349\t@ 0xfffff6d3\n \t\t\t@ instruction: 0xf7fa4618\n \t\t\t@ instruction: 0xf507eea4\n-/build/1st/ssocr-2.23.0/ssocr.c:1341\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1341\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf50780cb\n-/build/1st/ssocr-2.23.0/ssocr.c:1342\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1342\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r3, r4, r5, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf7fa4618\n \tmvnscs\tlr, #200, 28\t@ 0xc80\n-/build/1st/ssocr-2.23.0/ssocr.c:1343\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1343\n \torrcs\tr2, r0, r0, lsl #5\n \t\t\t@ instruction: 0xf7fa2080\n \t\t\t@ instruction: 0xf507eefe\n-/build/1st/ssocr-2.23.0/ssocr.c:1344\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1344\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #176, 6\t@ 0xc0000002\n \tadc\tr6, r4, sl, lsl r0\n \t\t\t@ instruction: 0x0000cbbe\n \tandeq\tip, r0, r2, ror fp\n \tandeq\tr0, r0, ip, lsl #2\n \t\t\t@ instruction: 0x000087b0\n@@ -6224,15 +6224,15 @@\n \t\t\t@ instruction: 0x00007fba\n \tandeq\tr7, r0, r2, lsl #31\n \tandeq\tr7, r0, r4, lsl #31\n \tldrdeq\tr7, [r0], -r6\n \tandeq\tr7, r0, r0, lsl lr\n \tstrdeq\tr7, [r0], -lr\n \t\t\t@ instruction: 0x00007dba\n-/build/1st/ssocr-2.23.0/ssocr.c:1345 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1345 (discriminator 3)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6240,15 +6240,15 @@\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8ec32 <__bss_end__@@Base+0x7c98a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsp, {r0, r1, r4, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1346 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1346 (discriminator 3)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6256,17 +6256,17 @@\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4e86e <__bss_end__@@Base+0x3c5c6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1345 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1345 (discriminator 3)\n \t\t\t@ instruction: 0xf5071ad6\n-/build/1st/ssocr-2.23.0/ssocr.c:1346 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1346 (discriminator 3)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8ec8e <__bss_end__@@Base+0x7c9e6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -6274,83 +6274,83 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e05c8 <__bss_end__@@Base+0xff4ce320>\n-/build/1st/ssocr-2.23.0/ssocr.c:1345 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1345 (discriminator 3)\n \t\t\t@ instruction: 0x46294632\n \tldc\t7, cr15, [r4, #1000]!\t@ 0x3e8\n-/build/1st/ssocr-2.23.0/ssocr.c:1344 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1344 (discriminator 3)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1344 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1344 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \tblle\tfe2d6ef4 <__bss_end__@@Base+0xfe2c4c4c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1348\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1348\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tbicvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0x4618681b\n \tmcr\t7, 0, pc, cr4, cr10, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1352\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1352\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \tblx\t8ed06 <__bss_end__@@Base+0x7ca5e>\n \tblcc\t6430b4 <__bss_end__@@Base+0x630e0c>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf507689a\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r7, r8, r9, ip, sp, lr}\n \tbne\tff4e0530 <__bss_end__@@Base+0xff4ce288>\n \tsmlabtcc\tr0, r7, r8, pc\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1353\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1353\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \tblx\t8ed32 <__bss_end__@@Base+0x7ca8a>\n \tblcc\t6430e0 <__bss_end__@@Base+0x630e38>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf50768da\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r7, r8, r9, ip, sp, lr}\n \tbne\tff4e065c <__bss_end__@@Base+0xff4ce3b4>\n \tsmlabtcc\tr4, r7, r8, pc\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1354\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1354\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t7304 \n \t\t\t@ instruction: 0xf8dfd017\n-/build/1st/ssocr-2.23.0/ssocr.c:1355\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1355\n \tstmiapl\tr3!, {r2, r4, r5, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8d7681b\n \t\t\t@ instruction: 0xf8df2100\n \tldrbtmi\tr1, [r9], #-1452\t@ 0xfffffa54\n \t\t\t@ instruction: 0xf7fa4618\n \t\t\t@ instruction: 0xf8dfed8e\n-/build/1st/ssocr-2.23.0/ssocr.c:1356\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1356\n \tstmiapl\tr3!, {r2, r3, r4, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0xf8d7681b\n \t\t\t@ instruction: 0xf8df2104\n \tldrbtmi\tr1, [r9], #-1432\t@ 0xfffffa68\n \t\t\t@ instruction: 0xf7fa4618\n \t\t\t@ instruction: 0xf507ed82\n-/build/1st/ssocr-2.23.0/ssocr.c:1360\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1360\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #176, 6\t@ 0xc0000002\n \tadds\tr6, lr, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1361\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1361\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6362,15 +6362,15 @@\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0xf5071ad3\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r2, r7, r9, ip, sp, lr}\n \tble\t8d6ff8 <__bss_end__@@Base+0x8c4d50>\n-/build/1st/ssocr-2.23.0/ssocr.c:1362\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1362\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6381,15 +6381,15 @@\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsl, {r0, r1, r4, sl, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r6, #683671552\t@ 0x28c00000\n \tandsvs\tr1, sl, sl, lsl #21\n-/build/1st/ssocr-2.23.0/ssocr.c:1363\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1363\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6401,15 +6401,15 @@\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n \t\t\t@ instruction: 0xf5071ad3\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r3, r7, r9, ip, sp, lr}\n \tble\t8d708c <__bss_end__@@Base+0x8c4de4>\n-/build/1st/ssocr-2.23.0/ssocr.c:1364\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1364\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6420,101 +6420,101 @@\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsl, {r0, r1, r4, sl, lr}^\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r8, #683671552\t@ 0x28c00000\n \tandsvs\tr1, sl, sl, lsl #21\n-/build/1st/ssocr-2.23.0/ssocr.c:1360 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1360 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1360 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1360 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf6ff429a\n \t\t\t@ instruction: 0xf507af57\n-/build/1st/ssocr-2.23.0/ssocr.c:1366\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1366\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1367\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1367\n \tldrcc\tpc, [r0], #-2271\t@ 0xfffff721\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r8, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r6, #679477248\t@ 0x28800000\n \tldmdavs\tr2, {r0, r1, r3, r4, fp, sp, lr}\n \tstrne\tpc, [r0], #-2271\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7fa4479\n \t\t\t@ instruction: 0xf507ecb6\n-/build/1st/ssocr-2.23.0/ssocr.c:1371\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1371\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\tffda7014 <__bss_end__@@Base+0xffd94d6c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1372\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1372\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrsbtcs\tpc, [ip], #135\t@ 0x87\t@ \n \tldrbtmi\tr4, [r9], #-2551\t@ 0xfffff609\n \t\t\t@ instruction: 0xf7fa4618\n \t\t\t@ instruction: 0xf507eca2\n-/build/1st/ssocr-2.23.0/ssocr.c:1373\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1373\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #176, 6\t@ 0xc0000002\n \teors\tr6, r0, #26\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \tstmiapl\tr3!, {r0, r2, r3, r5, r6, r7, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1377\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1377\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \tadcsvs\tr6, sl, sl, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1377\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1377\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \t\t\t@ instruction: 0xf507685b\n-/build/1st/ssocr-2.23.0/ssocr.c:1377\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1377\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tblx\t4ebba <__bss_end__@@Base+0x3c912>\n \t\t\t@ instruction: 0xf507f202\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmvs\tr1, {r1, r3, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \t\t\t@ instruction: 0xf5076079\n-/build/1st/ssocr-2.23.0/ssocr.c:1377\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1377\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tblx\te7da \n \t\t\t@ instruction: 0xf507f202\n \t\t\t@ instruction: 0xf5a070cc\n \tstmdavs\tr0, {r1, r7, ip, sp, lr}\n \tldmvs\tr0, {r1, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1378\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1378\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tldrcs\tr6, [r8, #-2066]\t@ 0xfffff7ee\n \tvqdmulh.s\td15, d2, d5\n \tstrbvc\tpc, [ip, #1287]\t@ 0x507\t@ \n \tstrvc\tpc, [r2, #1445]\t@ 0x5a5\n \tstrtmi\tr6, [sl], #-2093\t@ 0xfffff7d3\n@@ -6522,17 +6522,17 @@\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tblx\t190016 <__bss_end__@@Base+0x17dd6e>\n \t\t\t@ instruction: 0xf507f202\n \t\t\t@ instruction: 0xf5a676cc\n \tldmdavs\tr6!, {r1, r7, r9, sl, ip, sp, lr}\n \tldmdavs\tr2, {r1, r4, r5, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \t\t\t@ instruction: 0xf5071aad\n-/build/1st/ssocr-2.23.0/ssocr.c:1379\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1379\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tblx\t190036 <__bss_end__@@Base+0x17dd8e>\n \t\t\t@ instruction: 0xf507f202\n \t\t\t@ instruction: 0xf5a676cc\n \tldmdavs\tr6!, {r1, r7, r9, sl, ip, sp, lr}\n \tldmvs\tr6, {r1, r4, r5, sl, lr}\n@@ -6545,20 +6545,20 @@\n \t\t\t@ instruction: 0xf8dc7c82\n \tstrmi\tr1, [sl], #-0\n \tbne\tfeca0850 <__bss_end__@@Base+0xfec8e5a8>\n \tbcs\tfe442028 <__bss_end__@@Base+0xfe42fd80>\n \tblvc\tffa022f0 <__bss_end__@@Base+0xff9f0048>\n \tblvs\tfea41e90 <__bss_end__@@Base+0xfea2fbe8>\n \tblpl\t1c20b4 <__bss_end__@@Base+0x1afe0c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \tldrdcs\tpc, [r0, -r7]\n \tbcs\tfe44203c <__bss_end__@@Base+0xfe42fd94>\n \tblvs\tffa02304 <__bss_end__@@Base+0xff9f005c>\n \tblvc\t1c223c <__bss_end__@@Base+0x1aff94>\n-/build/1st/ssocr-2.23.0/ssocr.c:1380\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1380\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \t\t\t@ instruction: 0x26186812\n \tvqdmulh.s\td15, d2, d6\n \tstrbvc\tpc, [ip], r7, lsl #10\t@ \n \tstrvc\tpc, [r2], r6, lsr #11\n \tldrtmi\tr6, [r2], #-2102\t@ 0xfffff7ca\n@@ -6567,17 +6567,17 @@\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tldceq\t0, cr15, [r8], {79}\t@ 0x4f\n \tvqdmulh.s\td15, d2, d12\n \tcfstr64vc\tmvdx15, [ip], {7}\n \tcfstr32vc\tmvfx15, [r2], {172}\t@ 0xac\n \tldrdne\tpc, [r0], -ip\n \tldmdavs\tr2, {r1, r3, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \t\t\t@ instruction: 0xf5071ab6\n-/build/1st/ssocr-2.23.0/ssocr.c:1381\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1381\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tldceq\t0, cr15, [r8], {79}\t@ 0x4f\n \tvqdmulh.s\td15, d2, d12\n \tcfstr64vc\tmvdx15, [ip], {7}\n \tcfstr32vc\tmvfx15, [r2], {172}\t@ 0xac\n \tldrdne\tpc, [r0], -ip\n@@ -6592,15 +6592,15 @@\n \tldrdne\tpc, [r0], -ip\n \tldmdavs\tr2, {r1, r3, sl, lr}^\n \tbne\tfe2a0998 <__bss_end__@@Base+0xfe28e6f0>\n \tbcs\tfe4420d0 <__bss_end__@@Base+0xfe42fe28>\n \tblvs\tff9c239c <__bss_end__@@Base+0xff9b00f4>\n \tblpl\t1f81f3c <__bss_end__@@Base+0x1f6fc94>\n \tblmi\t18215c <__bss_end__@@Base+0x16feb4>\n-/build/1st/ssocr-2.23.0/ssocr.c:1374\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1374\n \tldrdcs\tpc, [r4, -r7]\n \tbcs\tfe4420e4 <__bss_end__@@Base+0xfe42fe3c>\n \tblpl\tff9c23b0 <__bss_end__@@Base+0xff9b0108>\n \tblvs\t1822e4 <__bss_end__@@Base+0x17003c>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tblvs\t241f14 <__bss_end__@@Base+0x22fc6c>\n@@ -6608,20 +6608,20 @@\n \tstrls\tr7, [r3, #-2820]\t@ 0xfffff4fc\n \tldmdavs\tr9!, {r1, ip, pc}^\n \tmovwls\tr9, #257\t@ 0x101\n \tldmdavs\tr2, {r0, r1, r3, r4, r5, r7, fp, sp, lr}\n \tldrbtmi\tr4, [r9], #-2422\t@ 0xfffff68a\n \t\t\t@ instruction: 0xf7fa68f8\n \tblmi\t1c01778 <__bss_end__@@Base+0x1bef4d0>\n-/build/1st/ssocr-2.23.0/ssocr.c:1383\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1383\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r6, lsl r2\n \tldrbtmi\tr4, [r8], #-2162\t@ 0xfffff78e\n \tbl\tfe0c48f8 <__bss_end__@@Base+0xfe0b2650>\n-/build/1st/ssocr-2.23.0/ssocr.c:1384\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1384\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6630,24 +6630,24 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4ed9e <__bss_end__@@Base+0x3caf6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0xd109429a\n-/build/1st/ssocr-2.23.0/ssocr.c:1385\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1385\n \tstmiapl\tr3!, {r1, r3, r4, r6, r8, r9, fp, lr}^\n \teorcs\tr6, r1, #1769472\t@ 0x1b0000\n \tldmdami\tpc, {r0, r8, sp}^\t@ \n \t\t\t@ instruction: 0xf7fa4478\n \trsbs\tlr, r3, sl, asr fp\n-/build/1st/ssocr-2.23.0/ssocr.c:1387\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1387\n \tstmiapl\tr3!, {r0, r2, r4, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681d\n-/build/1st/ssocr-2.23.0/ssocr.c:1388\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1388\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f1da <__bss_end__@@Base+0x7cf32>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -6671,18 +6671,18 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4ee36 <__bss_end__@@Base+0x3cb8e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0x46191ad3\n-/build/1st/ssocr-2.23.0/ssocr.c:1387\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1387\n \tcdp2\t0, 12, cr15, cr12, cr5, {0}\n \tldrmi\tr4, [lr], -r3, lsl #12\n-/build/1st/ssocr-2.23.0/ssocr.c:1389\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1389\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6691,29 +6691,29 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4ee7e <__bss_end__@@Base+0x3cbd6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0xf5071ad2\n-/build/1st/ssocr-2.23.0/ssocr.c:1387\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1387\n \t\t\t@ instruction: 0xf5a373cc\n \tldrmi\tr7, [r1], -r6, lsl #7\n \t\t\t@ instruction: 0xf0056818\n \tstrmi\tpc, [r3], -r3, lsr #29\n \tstmdbmi\tr6!, {r1, r4, r5, r9, sl, lr}\n \t\t\t@ instruction: 0x46284479\n \tb\tffdc4a34 <__bss_end__@@Base+0xffdb278c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1392\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1392\n \tstmiapl\tr3!, {r0, r1, r3, r4, r8, r9, fp, lr}^\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tstmdami\tr2!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7fa4478\n \t\t\t@ instruction: 0xf507eadc\n-/build/1st/ssocr-2.23.0/ssocr.c:1393\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1393\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f2ce <__bss_end__@@Base+0x7d026>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsl, {r0, r1, r4, sl, lr}^\n@@ -6722,15 +6722,15 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \taddsmi\tr6, sl, #14352384\t@ 0xdb0000\n \tblmi\t1faf30 <__bss_end__@@Base+0x1e8c88>\n-/build/1st/ssocr-2.23.0/ssocr.c:1394\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1394\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r4, lsl #4\n \tldrbtmi\tr4, [r8], #-2062\t@ 0xfffff7f2\n \tb\tfecc4a98 <__bss_end__@@Base+0xfecb27f0>\n \tsvclt\t0x0000e04e\n \tandeq\tr0, r0, r0\n \tsubsmi\tr0, r9, r0\n@@ -6741,18 +6741,18 @@\n \tandeq\tr7, r0, sl, asr sl\n \tandeq\tr7, r0, r6, ror #16\n \tmuleq\tr0, sl, r8\n \tandeq\tr7, r0, r0, ror #16\n \tmuleq\tr0, ip, r7\n \tandeq\tr7, r0, r8, lsr #15\n \tandeq\tr7, r0, r2, ror r7\n-/build/1st/ssocr-2.23.0/ssocr.c:1396\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1396\n \tbcc\t1044e68 <__bss_end__@@Base+0x1032bc0>\n \tldmdavs\tsp, {r0, r1, r5, r6, r7, fp, ip, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1397\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1397\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6761,53 +6761,53 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4ef7e <__bss_end__@@Base+0x3ccd6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n \t\t\t@ instruction: 0xf5071ad2\n-/build/1st/ssocr-2.23.0/ssocr.c:1396\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1396\n \t\t\t@ instruction: 0xf5a373cc\n \tldrmi\tr7, [r1], -r8, lsl #7\n \t\t\t@ instruction: 0xf0056818\n \tstrmi\tpc, [r3], -r3, lsr #28\n \t\t\t@ instruction: 0xf8df461a\n \tldrbtmi\tr3, [fp], #-2540\t@ 0xfffff614\n \t\t\t@ instruction: 0x46284619\n \tb\t1d44b38 <__bss_end__@@Base+0x1d32890>\n-/build/1st/ssocr-2.23.0/ssocr.c:1373 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1373 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1373 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1373 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf6ff429a\n \t\t\t@ instruction: 0xf507adc5\n-/build/1st/ssocr-2.23.0/ssocr.c:1405\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1405\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1406\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1406\n \tldmibcc\tip, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r4, lsl r2\n \tldmibeq\tr8, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0xf7fa4478\n \t\t\t@ instruction: 0xf507ea3a\n-/build/1st/ssocr-2.23.0/ssocr.c:1407\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1407\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #176, 6\t@ 0xc0000002\n \tcmn\tr3, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1409\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1409\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6819,24 +6819,24 @@\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0xf5071ad3\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r5, r7, r9, ip, sp, lr}\n \tlfmle\tf4, 4, [r7, #-616]!\t@ 0xfffffd98\n-/build/1st/ssocr-2.23.0/ssocr.c:1410\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1410\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t7a0c \n \tteqhi\tr8, r0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1411\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1411\n \tldmdbcc\tr8, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1412\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1412\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6844,22 +6844,22 @@\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4f0a6 <__bss_end__@@Base+0x3cdfe>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1411\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1411\n \t\t\t@ instruction: 0xf5071ad3\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tldmne\tr4, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf7fa4479\n \tsmlatt\tr9, r8, r9, lr\n-/build/1st/ssocr-2.23.0/ssocr.c:1418\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1418\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6898,24 +6898,24 @@\n \t\t\t@ instruction: 0x73a4f5a3\n \tmcr\t8, 0, r6, cr7, cr11, {0}\n \t\t\t@ instruction: 0xeeb83a90\n \tvcmpe.f64\td7, d23\n \tvsqrt.f64\td22, d7\n \tvpmin.u8\td31, d0, d0\n \t\t\t@ instruction: 0xf50780b0\n-/build/1st/ssocr-2.23.0/ssocr.c:1419\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1419\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df8094\n-/build/1st/ssocr-2.23.0/ssocr.c:1420\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1420\n \tstmiapl\tr3!, {r2, r4, r5, r6, r7, r8, r9, sl, ip, sp}^\n \t\t\t@ instruction: 0xf507681e\n-/build/1st/ssocr-2.23.0/ssocr.c:1421\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1421\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f5ae <__bss_end__@@Base+0x7d306>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -6923,17 +6923,17 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbl\tfe8a0ee8 <__bss_end__@@Base+0xfe88ec40>\n-/build/1st/ssocr-2.23.0/ssocr.c:1420\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1420\n \t\t\t@ instruction: 0xf5070803\n-/build/1st/ssocr-2.23.0/ssocr.c:1421\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1421\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f5ee <__bss_end__@@Base+0x7d346>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -6941,15 +6941,15 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff560e28 <__bss_end__@@Base+0xff54eb80>\n-/build/1st/ssocr-2.23.0/ssocr.c:1422\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1422\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -6973,66 +6973,66 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e0ea4 <__bss_end__@@Base+0xff4cebfc>\n-/build/1st/ssocr-2.23.0/ssocr.c:1420\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1420\n \t\t\t@ instruction: 0xf0054619\n \tstrmi\tpc, [r3], -r3, lsr #25\n \t\t\t@ instruction: 0xf5074619\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0x910172b0\n \tstrbmi\tr9, [r3], -r0, lsl #10\n \t\t\t@ instruction: 0xf8df6812\n \tldrbtmi\tr1, [r9], #-1768\t@ 0xfffff918\n \t\t\t@ instruction: 0xf7fa4630\n \t\t\t@ instruction: 0xf507e8ee\n-/build/1st/ssocr-2.23.0/ssocr.c:1424\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1424\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f6ce <__bss_end__@@Base+0x7d426>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \teorcs\tr4, r4, #318767104\t@ 0x13000000\n \tand\tr6, r0, sl, lsl r1\n-/build/1st/ssocr-2.23.0/ssocr.c:1413\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1413\n \t\t\t@ instruction: 0xf507bf00\n-/build/1st/ssocr-2.23.0/ssocr.c:1407 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1407 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1407 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1407 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \tmcrge\t6, 4, pc, cr2, cr15, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1429\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1429\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t7cbc \n \t\t\t@ instruction: 0xf8dfd00a\n-/build/1st/ssocr-2.23.0/ssocr.c:1430\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1430\n \tstmiapl\tr3!, {r2, r3, r5, r6, r9, sl, ip, sp}^\n \tandscs\tr6, fp, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1652\t@ 0xfffff98c\n \tstmia\tr0!, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1431\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1431\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e100\n-/build/1st/ssocr-2.23.0/ssocr.c:1433\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1433\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f752 <__bss_end__@@Base+0x7d4aa>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsl, {r0, r1, r4, sl, lr}\n@@ -7041,15 +7041,15 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \taddsmi\tr6, sl, #10158080\t@ 0x9b0000\n \t\t\t@ instruction: 0xf507d01f\n-/build/1st/ssocr-2.23.0/ssocr.c:1433 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1433 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f792 <__bss_end__@@Base+0x7d4ea>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsl, {r0, r1, r4, sl, lr}^\n@@ -7058,41 +7058,41 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \taddsmi\tr6, sl, #14352384\t@ 0xdb0000\n \t\t\t@ instruction: 0xf507d119\n-/build/1st/ssocr-2.23.0/ssocr.c:1434\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1434\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \t\t\t@ instruction: 0xf8df80ab\n-/build/1st/ssocr-2.23.0/ssocr.c:1435\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1435\n \tstmiapl\tr3!, {r2, r4, r5, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrcc\tpc, [r8, #2271]!\t@ 0x8df\n \t\t\t@ instruction: 0x4619447b\n \tldmda\tr2, {r1, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1436\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1436\n \t\t\t@ instruction: 0xf507e09a\n-/build/1st/ssocr-2.23.0/ssocr.c:1441\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1441\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f806 <__bss_end__@@Base+0x7d55e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf507808a\n-/build/1st/ssocr-2.23.0/ssocr.c:1442 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1442 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f82a <__bss_end__@@Base+0x7d582>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -7105,20 +7105,20 @@\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4a1164 <__bss_end__@@Base+0xff48eebc>\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r8, #683671552\t@ 0x28c00000\n \tldmdavs\tr8, {r0, r4, r9, sl, lr}\n \tblx\tfefc301e <__bss_end__@@Base+0xfefb0d76>\n \tldrmi\tr4, [sl], -r3, lsl #12\n-/build/1st/ssocr-2.23.0/ssocr.c:1441 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1441 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovvc\tpc, #683671552\t@ 0x28c00000\n \taddsmi\tr6, r3, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507da59\n-/build/1st/ssocr-2.23.0/ssocr.c:1443\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1443\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f88a <__bss_end__@@Base+0x7d5e2>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7131,74 +7131,74 @@\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4a10c4 <__bss_end__@@Base+0xff48ee1c>\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r6, #683671552\t@ 0x28c00000\n \tldmdavs\tr8, {r0, r4, r9, sl, lr}\n \tblx\tfe3c307e <__bss_end__@@Base+0xfe3b0dd6>\n \tldrmi\tr4, [sl], -r3, lsl #12\n-/build/1st/ssocr-2.23.0/ssocr.c:1442\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1442\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, lr, #683671552\t@ 0x28c00000\n \taddsmi\tr6, r3, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507da29\n-/build/1st/ssocr-2.23.0/ssocr.c:1444\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1444\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f8ea <__bss_end__@@Base+0x7d642>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \taddcs\tr4, r0, #318767104\t@ 0x13000000\n \t\t\t@ instruction: 0xf507611a\n-/build/1st/ssocr-2.23.0/ssocr.c:1445\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1445\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r0, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1446\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1446\n \tldrbtcc\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf8df681a\n \tldrbtmi\tr3, [fp], #-1160\t@ 0xfffffb78\n \t\t\t@ instruction: 0xf7f94619\n \t\t\t@ instruction: 0xe000efb8\n-/build/1st/ssocr-2.23.0/ssocr.c:1436\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1436\n \t\t\t@ instruction: 0xf507bf00\n-/build/1st/ssocr-2.23.0/ssocr.c:1431 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1431 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1431 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1431 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \tmrcge\t6, 7, APSR_nzcv, cr5, cr15, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1451\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1451\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t7f08 \n \t\t\t@ instruction: 0xf8dfd00a\n-/build/1st/ssocr-2.23.0/ssocr.c:1452\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1452\n \tstmiapl\tr3!, {r5, sl, ip, sp}^\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1076\t@ 0xfffffbcc\n \tsvc\t0x007af7f9\n-/build/1st/ssocr-2.23.0/ssocr.c:1453\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1453\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e171\n-/build/1st/ssocr-2.23.0/ssocr.c:1455\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1455\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8f99e <__bss_end__@@Base+0x7d6f6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -7210,23 +7210,23 @@\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e12d8 <__bss_end__@@Base+0xff4cf030>\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcvc\tpc, sl, #679477248\t@ 0x28800000\n \taddsmi\tr6, sl, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507dd35\n-/build/1st/ssocr-2.23.0/ssocr.c:1456\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1456\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \t\t\t@ instruction: 0xf0002b00\n \tblmi\tff9e7668 <__bss_end__@@Base+0xff9d53c0>\n-/build/1st/ssocr-2.23.0/ssocr.c:1457\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1457\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1458\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1458\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7234,33 +7234,33 @@\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4f622 <__bss_end__@@Base+0x3d37a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n-/build/1st/ssocr-2.23.0/ssocr.c:1457\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1457\n \t\t\t@ instruction: 0xf5071ad3\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tldrbtmi\tr4, [r9], #-2524\t@ 0xfffff624\n \tsvc\t0x002af7f9\n-/build/1st/ssocr-2.23.0/ssocr.c:1459\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1459\n \t\t\t@ instruction: 0xf507e109\n-/build/1st/ssocr-2.23.0/ssocr.c:1464\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1464\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8fa56 <__bss_end__@@Base+0x7d7ae>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf0402b00\n \t\t\t@ instruction: 0xf50780f9\n-/build/1st/ssocr-2.23.0/ssocr.c:1465 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1465 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8fa7a <__bss_end__@@Base+0x7d7d2>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7286,29 +7286,29 @@\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n \t\t\t@ instruction: 0x46191ad3\n \tblx\t1f432a0 <__bss_end__@@Base+0x1f30ff8>\n \tldrmi\tr4, [sl], -r3, lsl #12\n-/build/1st/ssocr-2.23.0/ssocr.c:1464 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1464 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73a2f5a3\n \taddsmi\tr6, r3, #1769472\t@ 0x1b0000\n \tadchi\tpc, lr, r0, lsl #6\n-/build/1st/ssocr-2.23.0/ssocr.c:1466\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1466\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t80b0 \n \taddshi\tpc, r2, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1467\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1467\n \tstmiapl\tr3!, {r0, r2, r3, r4, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf507681e\n-/build/1st/ssocr-2.23.0/ssocr.c:1469\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1469\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8fb2a <__bss_end__@@Base+0x7d882>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7316,17 +7316,17 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbl\tfe8a1364 <__bss_end__@@Base+0xfe88f0bc>\n-/build/1st/ssocr-2.23.0/ssocr.c:1467\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1467\n \t\t\t@ instruction: 0xf5070803\n-/build/1st/ssocr-2.23.0/ssocr.c:1469\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1469\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8fb6a <__bss_end__@@Base+0x7d8c2>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -7334,15 +7334,15 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff5614a4 <__bss_end__@@Base+0xff54f1fc>\n-/build/1st/ssocr-2.23.0/ssocr.c:1470\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1470\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7366,66 +7366,66 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e1520 <__bss_end__@@Base+0xff4cf278>\n-/build/1st/ssocr-2.23.0/ssocr.c:1467\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1467\n \t\t\t@ instruction: 0xf0054619\n \tstrmi\tpc, [r3], -r5, ror #19\n \t\t\t@ instruction: 0xf5074619\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0x910172b0\n \tstrbmi\tr9, [r3], -r0, lsl #10\n \tstmdbmi\tr1!, {r1, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0x46304479\n \tmrc\t7, 1, APSR_nzcv, cr0, cr9, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1472\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1472\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \ttstvs\tsl, r8, lsl #4\n \tsvclt\t0x0000e000\n-/build/1st/ssocr-2.23.0/ssocr.c:1453 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1453 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r0, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1453 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1453 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf6ff429a\n \t\t\t@ instruction: 0xf507ae84\n-/build/1st/ssocr-2.23.0/ssocr.c:1477\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1477\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1478\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1478\n \tstmiapl\tr3!, {r2, r3, r4, r5, r8, r9, fp, lr}^\n \teorscs\tr6, r9, #1769472\t@ 0x1b0000\n \tstmdami\tr5, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f94478\n \t\t\t@ instruction: 0xf507ede6\n-/build/1st/ssocr-2.23.0/ssocr.c:1480\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1480\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #176, 6\t@ 0xc0000002\n \t\t\t@ instruction: 0xf000601a\n \tmovwcs\tfp, #3431\t@ 0xd67\n-/build/1st/ssocr-2.23.0/ssocr.c:1481\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1481\n \ttstcc\tr4, r7, asr #17\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1483\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1483\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7437,15 +7437,15 @@\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0xf5071ad3\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r5, r7, r9, ip, sp, lr}\n \tsfmle\tf4, 4, [r5], #-616\t@ 0xfffffd98\n-/build/1st/ssocr-2.23.0/ssocr.c:1484 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1484 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7454,58 +7454,58 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4f93a <__bss_end__@@Base+0x3d692>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}^\n \t\t\t@ instruction: 0xf5071ad3\n-/build/1st/ssocr-2.23.0/ssocr.c:1483 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1483 (discriminator 1)\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r3, r5, r7, r9, ip, sp, lr}\n \tlfmle\tf4, 4, [r3, #-616]!\t@ 0xfffffd98\n-/build/1st/ssocr-2.23.0/ssocr.c:1485\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1485\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf003681b\n \tblcs\t8308 \n \tstrhi\tpc, [r2, #-0]\n-/build/1st/ssocr-2.23.0/ssocr.c:1486\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1486\n \tstmiapl\tr3!, {r0, r1, r2, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrbtmi\tr4, [fp], #-2831\t@ 0xfffff4f1\n \t\t\t@ instruction: 0xf7f94619\n \t\t\t@ instruction: 0xf000ed8a\n-/build/1st/ssocr-2.23.0/ssocr.c:1487\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1487\n \tsvclt\t0x0000bcf3\n \tandeq\tr0, r0, ip, lsl #2\n \tldrdeq\tr7, [r0], -lr\n \tandeq\tr7, r0, ip, lsl #13\n \tldrdeq\tr7, [r0], -ip\n \tandeq\tr7, r0, sl, lsl r4\n \tldrdeq\tr7, [r0], -r6\n \tandeq\tr7, r0, r4, lsr r3\n \tandeq\tr7, r0, lr, lsr #4\n \tstrdeq\tr7, [r0], -r6\n \tandeq\tr7, r0, lr, asr #2\n \tandeq\tr6, r0, ip, lsl #31\n \tandeq\tr6, r0, r0, asr pc\n \t\t\t@ instruction: 0x00006eb2\n-/build/1st/ssocr-2.23.0/ssocr.c:1490\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1490\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tblcs\t219ec <__bss_end__@@Base+0xf744>\n \tstrbhi\tpc, [r7], #64\t@ 0x40\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1491\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1491\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7516,15 +7516,15 @@\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r3, sl, lr}\n \tsvceq\t0x00da4413\n \tsubsne\tr4, fp, r3, lsl r4\n \ttstcc\tr8, r7, asr #17\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1492\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1492\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7545,15 +7545,15 @@\n \tstrmi\tr6, [r3], #-2048\t@ 0xfffff800\n \tbne\tff2e1794 <__bss_end__@@Base+0xff2cf4ec>\n \tblcs\te990 \n \t\t\t@ instruction: 0x460bbfb4\n \taddsne\tr4, fp, fp, lsl r6\n \t\t\t@ instruction: 0xf8c74413\n \t\t\t@ instruction: 0xf507311c\n-/build/1st/ssocr-2.23.0/ssocr.c:1493\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1493\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8feaa <__bss_end__@@Base+0x7dc02>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tr9, {r0, r1, r4, sl, lr}^\n@@ -7575,19 +7575,19 @@\n \t\t\t@ instruction: 0x46131ad2\n \tldrmi\tr0, [r3], #-91\t@ 0xffffffa5\n \tblcs\tea08 \n \t\t\t@ instruction: 0x4613bfb4\n \taddsne\tr4, fp, fp, lsl r6\n \t\t\t@ instruction: 0xf8c7440b\n \t\t\t@ instruction: 0xf5073120\n-/build/1st/ssocr-2.23.0/ssocr.c:1494\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1494\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #128, 6\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1495\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1495\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t8ff2a <__bss_end__@@Base+0x7dc82>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}^\n@@ -7596,24 +7596,24 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e1864 <__bss_end__@@Base+0xff4cf5bc>\n \ttstcc\tr4, r7, asr #17\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1497\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1497\n \t\t\t@ instruction: 0xf8c723ff\n \t\t\t@ instruction: 0xf8d73190\n \t\t\t@ instruction: 0xf8c73190\n \tmovwcs\tr3, #388\t@ 0x184\n-/build/1st/ssocr-2.23.0/ssocr.c:1498\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1498\n \torrcc\tpc, ip, r7, asr #17\n \tldrdcc\tpc, [ip, r7]\n \torrcc\tpc, r8, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1499\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1499\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7639,22 +7639,22 @@\n \tldmvs\tfp!, {r2, r3, r6, r8, r9, fp}^\n \t\t\t@ instruction: 0x2118f8d7\n \t\t\t@ instruction: 0x46604671\n \tmrc2\t7, 2, pc, cr2, cr9, {7}\n \t\t\t@ instruction: 0xf5074602\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r0, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1501\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1501\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r0, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \tblle\t7d821c <__bss_end__@@Base+0x7c5f74>\n-/build/1st/ssocr-2.23.0/ssocr.c:1502\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1502\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7663,38 +7663,38 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t4fc42 <__bss_end__@@Base+0x3d99a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \t\t\t@ instruction: 0xf042440b\n \ttstvs\tsl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1504\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1504\n \t\t\t@ instruction: 0xf8c723ff\n \t\t\t@ instruction: 0xf8d73190\n \t\t\t@ instruction: 0xf8c73190\n \tmovwcs\tr3, #392\t@ 0x188\n-/build/1st/ssocr-2.23.0/ssocr.c:1505\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1505\n \torrcc\tpc, ip, r7, asr #17\n \tldrdcc\tpc, [ip, r7]\n \torrcc\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1507\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1507\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf8d76859\n \tvand\td18, d5, d4\n \tvorr.i32\t, #22016\t@ 0x00005600\n \tblx\tfe0dc592 <__bss_end__@@Base+0xfe0ca2ea>\n \tldrbne\tr3, [r3, r2]\n \tbl\t4e350 <__bss_end__@@Base+0x3c0a8>\n-/build/1st/ssocr-2.23.0/ssocr.c:1506\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1506\n \t\t\t@ instruction: 0xf8d70803\n \tvand\td18, d5, d4\n \tvorr.i32\t, #22016\t@ 0x00005600\n \tblx\tfe0dc5aa <__bss_end__@@Base+0xfe0ca302>\n \tldrbne\tr3, [r3, r2, lsl #2]\n \t\t\t@ instruction: 0xf1071ace\n \t\t\t@ instruction: 0xf1070e1c\n@@ -7713,22 +7713,22 @@\n \t\t\t@ instruction: 0xf8d74643\n \t\t\t@ instruction: 0x46712118\n \t\t\t@ instruction: 0xf7f94660\n \tstrmi\tpc, [r2], -fp, asr #27\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1509\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1509\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077280\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r2, r3, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507db1f\n-/build/1st/ssocr-2.23.0/ssocr.c:1510\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1510\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90132 <__bss_end__@@Base+0x7de8a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7737,38 +7737,38 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tandeq\tpc, r8, #66\t@ 0x42\n \tmvnscs\tr6, #-2147483642\t@ 0x80000006\n-/build/1st/ssocr-2.23.0/ssocr.c:1512\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1512\n \torrscc\tpc, r0, r7, asr #17\n \t\t\t@ instruction: 0x3190f8d7\n \torrcc\tpc, ip, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1513\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1513\n \t\t\t@ instruction: 0xf8c72300\n \t\t\t@ instruction: 0xf8d73188\n \t\t\t@ instruction: 0xf8c73188\n \t\t\t@ instruction: 0xf5073184\n-/build/1st/ssocr-2.23.0/ssocr.c:1515\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1515\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t9018e <__bss_end__@@Base+0x7dee6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tr9, {r0, r1, r4, sl, lr}^\n \t\t\t@ instruction: 0x3114f8d7\n \tvqadd.s8\tq8, , q5\n \tvorr.i32\t, #22016\t@ 0x00005600\n \tblx\tfe0dc6a2 <__bss_end__@@Base+0xfe0ca3fa>\n \tldrbne\tr3, [r3, r2]\n \tbl\t4e460 <__bss_end__@@Base+0x3c1b8>\n-/build/1st/ssocr-2.23.0/ssocr.c:1514\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1514\n \t\t\t@ instruction: 0xf8d70803\n \tvand\td18, d5, d4\n \tvorr.i32\t, #22016\t@ 0x00005600\n \tblx\tfe0dc6ba <__bss_end__@@Base+0xfe0ca412>\n \tldrbne\tr3, [r3, r2, lsl #2]\n \t\t\t@ instruction: 0xf1071ace\n \t\t\t@ instruction: 0xf1070e1c\n@@ -7787,22 +7787,22 @@\n \t\t\t@ instruction: 0xf8d74643\n \t\t\t@ instruction: 0x46712118\n \t\t\t@ instruction: 0xf7f94660\n \tstrmi\tpc, [r2], -r3, asr #26\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1517\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1517\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077280\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r2, r3, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507db1f\n-/build/1st/ssocr-2.23.0/ssocr.c:1518\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1518\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90242 <__bss_end__@@Base+0x7df9a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7811,33 +7811,33 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tsubeq\tpc, r0, #66\t@ 0x42\n \tmvnscs\tr6, #-2147483642\t@ 0x80000006\n-/build/1st/ssocr-2.23.0/ssocr.c:1521\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1521\n \torrscc\tpc, r0, r7, asr #17\n \t\t\t@ instruction: 0x3190f8d7\n \torrcc\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1522\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1522\n \t\t\t@ instruction: 0xf8c72300\n \t\t\t@ instruction: 0xf8d7318c\n \t\t\t@ instruction: 0xf8c7318c\n \t\t\t@ instruction: 0xf5073188\n-/build/1st/ssocr-2.23.0/ssocr.c:1523\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1523\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t9029e <__bss_end__@@Base+0x7dff6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r4, sl, lr}\n \t\t\t@ instruction: 0xf50760fb\n-/build/1st/ssocr-2.23.0/ssocr.c:1524\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1524\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t902be <__bss_end__@@Base+0x7e016>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7845,15 +7845,15 @@\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e1af8 <__bss_end__@@Base+0xff4cf850>\n-/build/1st/ssocr-2.23.0/ssocr.c:1523\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1523\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \tadcsvs\tr1, fp, fp, asr r0\n \tldfeqd\tf7, [ip], {7}\n \tldreq\tpc, [r8], -r7, lsl #2\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tmovwls\tr6, #30747\t@ 0x781b\n@@ -7869,22 +7869,22 @@\n \t\t\t@ instruction: 0x311cf8d7\n \t\t\t@ instruction: 0x466168fa\n \t\t\t@ instruction: 0xf7f94630\n \tstrmi\tpc, [r2], -sp, lsr #25\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1526\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1526\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077280\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r2, r3, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507db1f\n-/build/1st/ssocr-2.23.0/ssocr.c:1527\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1527\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t9036e <__bss_end__@@Base+0x7e0c6>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7893,24 +7893,24 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tandeq\tpc, r2, #66\t@ 0x42\n \tmvnscs\tr6, #-2147483642\t@ 0x80000006\n-/build/1st/ssocr-2.23.0/ssocr.c:1529\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1529\n \torrscc\tpc, r0, r7, asr #17\n \t\t\t@ instruction: 0x3190f8d7\n \torrcc\tpc, r8, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1530\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1530\n \t\t\t@ instruction: 0xf8c72300\n \t\t\t@ instruction: 0xf8d7318c\n \t\t\t@ instruction: 0xf8c7318c\n \t\t\t@ instruction: 0xf5073184\n-/build/1st/ssocr-2.23.0/ssocr.c:1532\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1532\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t903ca <__bss_end__@@Base+0x7e122>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdavs\tsl, {r0, r1, r4, sl, lr}\n@@ -7920,17 +7920,17 @@\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tldrmi\tr6, [r3], #-2203\t@ 0xfffff765\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \t\t\t@ instruction: 0xf103105b\n-/build/1st/ssocr-2.23.0/ssocr.c:1531\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1531\n \t\t\t@ instruction: 0xf5070801\n-/build/1st/ssocr-2.23.0/ssocr.c:1533\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1533\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90412 <__bss_end__@@Base+0x7e16a>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -7940,15 +7940,15 @@\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \tbne\tff4e1c4c <__bss_end__@@Base+0xff4cf9a4>\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \tmrcne\t0, 2, r1, cr14, cr11, {2}\n-/build/1st/ssocr-2.23.0/ssocr.c:1531\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1531\n \tmnfeqe\tf7, f7\n \tldfeqd\tf7, [r8], {7}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tmovwls\tr6, #30747\t@ 0x781b\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r4, #683671552\t@ 0x28c00000\n@@ -7961,22 +7961,22 @@\n \t\t\t@ instruction: 0xf8d70b4c\n \t\t\t@ instruction: 0x4642311c\n \t\t\t@ instruction: 0x46604671\n \tstc2\t7, cr15, [r4], {249}\t@ 0xf9\n \t\t\t@ instruction: 0xf5074602\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r0, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1535\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1535\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r0, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \tblle\t7d86b8 <__bss_end__@@Base+0x7c6410>\n-/build/1st/ssocr-2.23.0/ssocr.c:1536\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1536\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -7985,33 +7985,33 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t500de <__bss_end__@@Base+0x3de36>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \t\t\t@ instruction: 0xf042440b\n \ttstvs\tsl, r4, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1539\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1539\n \t\t\t@ instruction: 0xf8c723ff\n \t\t\t@ instruction: 0xf8d73190\n \t\t\t@ instruction: 0xf8c73190\n \tmovwcs\tr3, #388\t@ 0x184\n-/build/1st/ssocr-2.23.0/ssocr.c:1540\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1540\n \torrcc\tpc, ip, r7, asr #17\n \tldrdcc\tpc, [ip, r7]\n \torrcc\tpc, r8, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1541\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1541\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \trscsvs\tr6, fp, fp, lsl r8\n-/build/1st/ssocr-2.23.0/ssocr.c:1542\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1542\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -8020,15 +8020,15 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t5015a <__bss_end__@@Base+0x3deb2>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \tsvceq\t0x00da1ad3\n-/build/1st/ssocr-2.23.0/ssocr.c:1541\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1541\n \tsubsne\tr4, fp, r3, lsl r4\n \t\t\t@ instruction: 0xf10760bb\n \t\t\t@ instruction: 0xf1070c1c\n \t\t\t@ instruction: 0xf5070618\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5079307\n@@ -8043,22 +8043,22 @@\n \t\t\t@ instruction: 0xf8d70b4c\n \tldmvs\tsl!, {r5, r8, ip, sp}^\n \tldrtmi\tr4, [r0], -r1, ror #12\n \tblx\t1bc5d3e <__bss_end__@@Base+0x1bb3a96>\n \t\t\t@ instruction: 0xf5074602\n \t\t\t@ instruction: 0xf5a373cc\n \tandsvs\tr7, sl, r0, lsl #7\n-/build/1st/ssocr-2.23.0/ssocr.c:1544\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1544\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r0, #683671552\t@ 0x28c00000\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73acf5a3\n \tldmdavs\tfp, {r1, r4, fp, sp, lr}\n \tblle\t7d87e4 <__bss_end__@@Base+0x7c653c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1545\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1545\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -8067,24 +8067,24 @@\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t5020a <__bss_end__@@Base+0x3df62>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \t\t\t@ instruction: 0xf042440b\n \ttstvs\tsl, r0, lsl r2\n-/build/1st/ssocr-2.23.0/ssocr.c:1547\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1547\n \t\t\t@ instruction: 0xf8c723ff\n \t\t\t@ instruction: 0xf8d73190\n \t\t\t@ instruction: 0xf8c73190\n \tmovwcs\tr3, #392\t@ 0x188\n-/build/1st/ssocr-2.23.0/ssocr.c:1548\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1548\n \torrcc\tpc, ip, r7, asr #17\n \tldrdcc\tpc, [ip, r7]\n \torrcc\tpc, r4, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1550\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1550\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -8094,17 +8094,17 @@\n \tblx\t50266 <__bss_end__@@Base+0x3dfbe>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r3, sl, lr}\n \tsvceq\t0x00da4413\n \tsubsne\tr4, fp, r3, lsl r4\n-/build/1st/ssocr-2.23.0/ssocr.c:1549\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1549\n \tstmdaeq\tr1, {r0, r1, r8, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1551\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1551\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -8114,15 +8114,15 @@\n \tblx\t502ae <__bss_end__@@Base+0x3e006>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r0, r1, r3, sl, lr}\n \tsvceq\t0x00da1ad3\n \tsubsne\tr4, fp, r3, lsl r4\n-/build/1st/ssocr-2.23.0/ssocr.c:1549\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1549\n \t\t\t@ instruction: 0xf1071e5e\n \t\t\t@ instruction: 0xf1070e1c\n \t\t\t@ instruction: 0xf5070c18\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \t\t\t@ instruction: 0xf5079307\n \t\t\t@ instruction: 0xf5a373cc\n@@ -8136,22 +8136,22 @@\n \tldrdcc\tpc, [r0, -r7]!\n \tldrbtmi\tr4, [r1], -r2, asr #12\n \t\t\t@ instruction: 0xf7f94660\n \tstrmi\tpc, [r2], -r5, asr #21\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r0, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1553\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1553\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077280\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tr2, {r2, r3, r5, r7, r8, r9, ip, sp, lr}\n \taddsmi\tr6, sl, #1769472\t@ 0x1b0000\n \t\t\t@ instruction: 0xf507db21\n-/build/1st/ssocr-2.23.0/ssocr.c:1554\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1554\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t9073e <__bss_end__@@Base+0x7e496>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tsl, {r0, r1, r4, sl, lr}\n@@ -8160,79 +8160,79 @@\n \ttstcs\tr8, fp, lsl r8\n \tvqrdmulh.s\td15, d3, d1\n \tbicvc\tpc, ip, r7, lsl #10\n \torrvc\tpc, r2, r1, lsr #11\n \tstrmi\tr6, [fp], #-2057\t@ 0xfffff7f7\n \teoreq\tpc, r0, #66\t@ 0x42\n \tand\tr6, r0, sl, lsl r1\n-/build/1st/ssocr-2.23.0/ssocr.c:1487\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1487\n \t\t\t@ instruction: 0xf507bf00\n-/build/1st/ssocr-2.23.0/ssocr.c:1480 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1480 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b0\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1480 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1480 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \tmovsvc\tpc, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \tbge\tfe405b38 <__bss_end__@@Base+0xfe3f3890>\n-/build/1st/ssocr-2.23.0/ssocr.c:1562\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1562\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tblcs\t20b4c <__bss_end__@@Base+0xe8a4>\n \torrhi\tpc, ip, r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1562 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1562 (discriminator 1)\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \tvqrdmulh.s\td18, d0, d2\n \t\t\t@ instruction: 0xf5078187\n-/build/1st/ssocr-2.23.0/ssocr.c:1564\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1564\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, sl, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1565\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1565\n \tstmdbcc\tip, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, r8, lsl r2\n \tstmdbeq\tr4, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0xf7f94478\n \t\t\t@ instruction: 0xf507e84a\n-/build/1st/ssocr-2.23.0/ssocr.c:1569\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1569\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r7, r8, r9, ip, sp, lr}\n \tldmvs\tsl, {r3, r4, r8, r9, ip, sp}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrvc\tpc, r2, #683671552\t@ 0x28c00000\n \tldmvs\tfp, {r0, r1, r3, r4, fp, sp, lr}\n \t\t\t@ instruction: 0xf8c71ad3\n \t\t\t@ instruction: 0xf8d730ac\n \t\t\t@ instruction: 0xf8c730ac\n \t\t\t@ instruction: 0xf50730a8\n-/build/1st/ssocr-2.23.0/ssocr.c:1570\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1570\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, fp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1571\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1571\n \tldmcc\tip!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r8], r7\t@ \n \tldmne\tr8!, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x46184479\n \tldmda\tr2!, {r0, r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/ssocr.c:1573\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1573\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandsvs\tr2, sl, r2, lsl #4\n \t\t\t@ instruction: 0xf507e05e\n-/build/1st/ssocr-2.23.0/ssocr.c:1574\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1574\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90852 <__bss_end__@@Base+0x7e5aa>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmvs\tsl, {r0, r1, r4, sl, lr}\n@@ -8242,120 +8242,120 @@\n \tvqrdmulh.s\td15, d3, d1\n \t\t\t@ instruction: 0xf5073b18\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r7, r8, ip, sp, lr}\n \tldmvs\tfp, {r0, r1, r3, sl, lr}\n \t\t\t@ instruction: 0xf8c71ad3\n \t\t\t@ instruction: 0xf5073110\n-/build/1st/ssocr-2.23.0/ssocr.c:1575\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1575\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandsle\tr2, r7, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1576\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1576\n \tstmdacc\tr0, {r0, r1, r2, r3, r4, r6, r7, fp, ip, sp, lr, pc}^\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tmrcne\t8, 2, r6, cr9, cr11, {0}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0x2110f8d7\n \tldmdavs\tfp, {r9, ip, pc}\n \t\t\t@ instruction: 0xf8df460a\n \tldrbtmi\tr1, [r9], #-2088\t@ 0xfffff7d8\n \tsvc\t0x00e8f7f8\n-/build/1st/ssocr-2.23.0/ssocr.c:1579\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1579\n \t\t\t@ instruction: 0x2110f8d7\n \tldrdcc\tpc, [r8], r7\t@ \n \tble\td8adc <__bss_end__@@Base+0xc6834>\n-/build/1st/ssocr-2.23.0/ssocr.c:1580\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1580\n \t\t\t@ instruction: 0x3110f8d7\n \tadccc\tpc, r8, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1582 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1582 (discriminator 2)\n \tldrdcs\tpc, [ip], r7\t@ \n \t\t\t@ instruction: 0x3110f8d7\n \t\t\t@ instruction: 0xf8c74413\n \t\t\t@ instruction: 0xf50730ac\n-/build/1st/ssocr-2.23.0/ssocr.c:1573 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1573 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1573 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1573 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \t\t\t@ instruction: 0xf8d7db97\n-/build/1st/ssocr-2.23.0/ssocr.c:1584\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1584\n \tblcc\t544a8 <__bss_end__@@Base+0x42200>\n \t\t\t@ instruction: 0xf8d74619\n \t\t\t@ instruction: 0xf00400ac\n \tstrmi\tpc, [r3], -r1, ror #22\n \tsmlabtcc\tr8, r7, r8, pc\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1585\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1585\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tblcs\t1ced8 <__bss_end__@@Base+0xac30>\n \t\t\t@ instruction: 0xf8d7d002\n-/build/1st/ssocr-2.23.0/ssocr.c:1585 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1585 (discriminator 1)\n \tand\tr3, r1, r8, lsl #2\n-/build/1st/ssocr-2.23.0/ssocr.c:1585 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1585 (discriminator 2)\n \tldrdcc\tpc, [r8], r7\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1585 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1585 (discriminator 4)\n \tadcscc\tpc, r0, r7, asr #17\n-/build/1st/ssocr-2.23.0/ssocr.c:1586 (discriminator 4)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1586 (discriminator 4)\n \tldrsbtcc\tpc, [r0], r7\t@ \n \t\t\t@ instruction: 0xdc022b00\n-/build/1st/ssocr-2.23.0/ssocr.c:1587\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1587\n \t\t\t@ instruction: 0xf8c72301\n \t\t\t@ instruction: 0xf50730b0\n-/build/1st/ssocr-2.23.0/ssocr.c:1589\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1589\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \teorle\tr2, pc, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1590\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1590\n \t\t\t@ instruction: 0x3770f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r8], r7\t@ \n \t\t\t@ instruction: 0x1774f8df\n \t\t\t@ instruction: 0x46184479\n \tsvc\t0x008cf7f8\n-/build/1st/ssocr-2.23.0/ssocr.c:1591\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1591\n \tsmmlscc\tr8, pc, r8, pc\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrdcs\tpc, [r8, -r7]\n \t\t\t@ instruction: 0x1760f8df\n \t\t\t@ instruction: 0x46184479\n \tsvc\t0x0080f7f8\n-/build/1st/ssocr-2.23.0/ssocr.c:1592\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1592\n \t\t\t@ instruction: 0x3740f8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n-/build/1st/ssocr-2.23.0/ssocr.c:1593\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1593\n \tldrsbtcs\tpc, [r0], r7\t@ \n \tbcs\tfe443964 <__bss_end__@@Base+0xfe4316bc>\n \tblvs\tffa03c2c <__bss_end__@@Base+0xff9f1984>\n \tblvc\t12c37ac <__bss_end__@@Base+0x12b1504>\n \tblvc\t2039ec <__bss_end__@@Base+0x1f1744>\n-/build/1st/ssocr-2.23.0/ssocr.c:1592\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1592\n \tblvc\tff203d4c <__bss_end__@@Base+0xff1f1aa4>\n \tbcs\tfe4439b8 <__bss_end__@@Base+0xfe431710>\n \t\t\t@ instruction: 0x1734f8df\n \t\t\t@ instruction: 0x46184479\n \tsvc\t0x0068f7f8\n-/build/1st/ssocr-2.23.0/ssocr.c:1597\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1597\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e06e\n-/build/1st/ssocr-2.23.0/ssocr.c:1598\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1598\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tandscs\tr3, r8, #67108864\t@ 0x4000000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -8375,430 +8375,430 @@\n \tvldr\td6, [r7, #924]\t@ 0x39c\n \tvnmul.f64\td7, d6, d10\n \tvdiv.f64\td6, d5, d7\n \tvmov.f64\td23, #214\t@ 0xbeb00000 -0.3437500\n \tvnmla.f64\td7, d23, d7\n \t\t\t@ instruction: 0xf8c73a90\n \t\t\t@ instruction: 0xf8d7310c\n-/build/1st/ssocr-2.23.0/ssocr.c:1599\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1599\n \tblcs\t14618 <__bss_end__@@Base+0x2370>\n \t\t\t@ instruction: 0xf507dd29\n-/build/1st/ssocr-2.23.0/ssocr.c:1600\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1600\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \torreq\tpc, r0, #3\n \tandle\tr2, pc, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1601\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1601\n \t\t\t@ instruction: 0x367cf8df\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0xf8d7681b\n \t\t\t@ instruction: 0xf8df210c\n \tldrbtmi\tr1, [r9], #-1668\t@ 0xfffff97c\n \tsvc\t0x000ef7f8\n-/build/1st/ssocr-2.23.0/ssocr.c:1604\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1604\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tldrdcs\tpc, [ip, -r7]\n \t\t\t@ instruction: 0xf507615a\n-/build/1st/ssocr-2.23.0/ssocr.c:1597 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1597 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1597 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1597 (discriminator 1)\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf5073b01\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tblle\tfe198cd0 <__bss_end__@@Base+0xfe186a28>\n-/build/1st/ssocr-2.23.0/ssocr.c:1616\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1616\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r6, #683671552\t@ 0x28c00000\n \tvst2.8\t{d6-d7}, [r3 :64], fp\n \tblcs\t25178 <__bss_end__@@Base+0x12ed0>\n \tandhi\tpc, sp, #0\n-/build/1st/ssocr-2.23.0/ssocr.c:1617\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1617\n \tldrbcc\tpc, [ip, #2271]!\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \ttstcs\tr1, sl, lsl r2\n \t\t\t@ instruction: 0x0610f8df\n \t\t\t@ instruction: 0xf7f84478\n \t\t\t@ instruction: 0xf507eec2\n-/build/1st/ssocr-2.23.0/ssocr.c:1619\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1619\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #180, 6\t@ 0xd0000002\n \tsubs\tr6, pc, sl, lsl r0\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1620\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1620\n \tldrbcc\tpc, [r8, #2271]\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmcr\t7, 7, pc, cr8, cr8, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1621\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1621\n \tstrbcc\tpc, [r8, #2271]\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmcr\t7, 7, pc, cr0, cr8, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1622\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1622\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf003691b\n \tblcs\t8ee8 \n \t\t\t@ instruction: 0xf8dfd008\n-/build/1st/ssocr-2.23.0/ssocr.c:1622 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1622 (discriminator 1)\n \tstmiapl\tr3!, {r2, r4, r7, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8205f\n \tand\tlr, r7, r6, asr #29\n-/build/1st/ssocr-2.23.0/ssocr.c:1622 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1622 (discriminator 2)\n \tstrcc\tpc, [r0, #2271]\t@ 0x8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmrc\t7, 5, APSR_nzcv, cr12, cr8, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1623 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1623 (discriminator 2)\n \tldrbcc\tpc, [r0, #-2271]!\t@ 0xfffff721\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmrc\t7, 5, APSR_nzcv, cr4, cr8, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1624 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1624 (discriminator 2)\n \tstrbcc\tpc, [r0, #-2271]!\t@ 0xfffff721\t@ \n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4613695a\n \tldrmi\tr0, [r3], #-91\t@ 0xffffffa5\n \t\t\t@ instruction: 0xf7f94619\n \t\t\t@ instruction: 0xf507f905\n-/build/1st/ssocr-2.23.0/ssocr.c:1619 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1619 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1619 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1619 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \t\t\t@ instruction: 0xf8dfdb96\n-/build/1st/ssocr-2.23.0/ssocr.c:1626\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1626\n \tstmiapl\tr3!, {r3, r8, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8200a\n \t\t\t@ instruction: 0xf507ee80\n-/build/1st/ssocr-2.23.0/ssocr.c:1628\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1628\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #180, 6\t@ 0xd0000002\n \tadc\tr6, lr, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1629\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1629\n \tstrbtcc\tpc, [r8], #2271\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmrc\t7, 3, APSR_nzcv, cr0, cr8, {7}\n-/build/1st/ssocr-2.23.0/ssocr.c:1630\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1630\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf003691b\n \tblcs\t8fcc \n \t\t\t@ instruction: 0xf8dfd008\n-/build/1st/ssocr-2.23.0/ssocr.c:1630 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1630 (discriminator 1)\n \tstmiapl\tr3!, {r2, r4, r5, r7, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8207c\n \tand\tlr, r7, r6, asr lr\n-/build/1st/ssocr-2.23.0/ssocr.c:1630 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1630 (discriminator 2)\n \tstrtcc\tpc, [r0], #2271\t@ 0x8df\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmcr\t7, 2, pc, cr12, cr8, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1631\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1631\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf003691b\n \tblcs\t902c \n \t\t\t@ instruction: 0xf8dfd008\n-/build/1st/ssocr-2.23.0/ssocr.c:1631 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1631 (discriminator 1)\n \tstmiapl\tr3!, {r2, r3, r5, r6, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8205f\n \teor\tlr, r1, r2, lsr lr\n-/build/1st/ssocr-2.23.0/ssocr.c:1632\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1632\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \tblcs\t2228ac <__bss_end__@@Base+0x210604>\n \t\t\t@ instruction: 0xf8dfd108\n-/build/1st/ssocr-2.23.0/ssocr.c:1632 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1632 (discriminator 1)\n \tstmiapl\tr3!, {r3, r4, r5, sl, ip, sp}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8205f\n \tand\tlr, r7, r8, lsl lr\n-/build/1st/ssocr-2.23.0/ssocr.c:1632 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1632 (discriminator 2)\n \tstrtcc\tpc, [r4], #-2271\t@ 0xfffff721\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tmcr\t7, 0, pc, cr14, cr8, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1633\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1633\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf003691b\n \tblcs\t9098 \n \tblmi\tfff3c4a8 <__bss_end__@@Base+0xfff2a200>\n-/build/1st/ssocr-2.23.0/ssocr.c:1633 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1633 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \trsbscs\tr4, ip, r9, lsl r6\n \tldcl\t7, cr15, [r4, #992]!\t@ 0x3e0\n \tblmi\tffe404b4 <__bss_end__@@Base+0xffe2e20c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1633 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1633 (discriminator 2)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tstcl\t7, cr15, [ip, #992]!\t@ 0x3e0\n-/build/1st/ssocr-2.23.0/ssocr.c:1634 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1634 (discriminator 2)\n \tstmiapl\tr3!, {r2, r4, r5, r6, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90d1e <__bss_end__@@Base+0x7ea76>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tsl, {r0, r1, r4, sl, lr}^\n \tsubseq\tr4, fp, r3, lsl r6\n \t\t\t@ instruction: 0x46194413\n \t\t\t@ instruction: 0xf83ef7f9\n-/build/1st/ssocr-2.23.0/ssocr.c:1628 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1628 (discriminator 2)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1628 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1628 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \t\t\t@ instruction: 0xf6ff429a\n \tblmi\tff7b4220 <__bss_end__@@Base+0xff7a1f78>\n-/build/1st/ssocr-2.23.0/ssocr.c:1636\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1636\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tandcs\tr4, sl, r9, lsl r6\n \tldc\t7, cr15, [r8, #992]!\t@ 0x3e0\n-/build/1st/ssocr-2.23.0/ssocr.c:1638\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1638\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n \tblmi\tff6007c0 <__bss_end__@@Base+0xff5ee518>\n-/build/1st/ssocr-2.23.0/ssocr.c:1639\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1639\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tstc\t7, cr15, [sl, #992]!\t@ 0x3e0\n-/build/1st/ssocr-2.23.0/ssocr.c:1640\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1640\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf003691b\n \tblcs\t9190 \n \tblmi\tff2bc570 <__bss_end__@@Base+0xff2aa2c8>\n-/build/1st/ssocr-2.23.0/ssocr.c:1640 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1640 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \trsbscs\tr4, ip, r9, lsl r6\n \tldc\t7, cr15, [r0, #992]\t@ 0x3e0\n \tblmi\tff1c057c <__bss_end__@@Base+0xff1ae2d4>\n-/build/1st/ssocr-2.23.0/ssocr.c:1640 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1640 (discriminator 2)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \teorcs\tr4, r0, r9, lsl r6\n \tstc\t7, cr15, [r8, #992]\t@ 0x3e0\n-/build/1st/ssocr-2.23.0/ssocr.c:1641\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1641\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0xf003691b\n \tblcs\t9294 \n \tblmi\tfee7c5b4 <__bss_end__@@Base+0xfee6a30c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1641 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1641 (discriminator 1)\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tsubscs\tr4, pc, r9, lsl r6\t@ \n \tstcl\t7, cr15, [lr, #-992]!\t@ 0xfffffc20\n \t\t\t@ instruction: 0xf507e01f\n-/build/1st/ssocr-2.23.0/ssocr.c:1642\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1642\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90e16 <__bss_end__@@Base+0x7eb6e>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tfp, {r0, r1, r4, sl, lr}\n \tsmlabble\tr7, r0, fp, r2\n-/build/1st/ssocr-2.23.0/ssocr.c:1642 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1642 (discriminator 1)\n \tstmiapl\tr3!, {r2, r3, r5, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8202e\n \tand\tlr, r6, r6, asr sp\n-/build/1st/ssocr-2.23.0/ssocr.c:1642 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1642 (discriminator 2)\n \tstmiapl\tr3!, {r3, r5, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f82020\n \t\t\t@ instruction: 0xf507ed4e\n-/build/1st/ssocr-2.23.0/ssocr.c:1643\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1643\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90e56 <__bss_end__@@Base+0x7ebae>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tfp, {r0, r1, r4, sl, lr}\n \twfieq\n \tandle\tr2, r7, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1643 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1643 (discriminator 1)\n \tstmiapl\tr3!, {r0, r1, r3, r4, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f8207c\n \tand\tlr, r6, r4, lsr sp\n-/build/1st/ssocr-2.23.0/ssocr.c:1643 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1643 (discriminator 2)\n \tstmiapl\tr3!, {r0, r1, r2, r4, r7, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0x4619681b\n \t\t\t@ instruction: 0xf7f82020\n \tblmi\tfe543adc <__bss_end__@@Base+0xfe531834>\n-/build/1st/ssocr-2.23.0/ssocr.c:1644 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1644 (discriminator 2)\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4613695a\n \tldrmi\tr0, [r3], #-91\t@ 0xffffffa5\n \t\t\t@ instruction: 0xf7f84619\n \t\t\t@ instruction: 0xf507ff7d\n-/build/1st/ssocr-2.23.0/ssocr.c:1638 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1638 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1638 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1638 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \tsvcge\t0x004df6ff\n-/build/1st/ssocr-2.23.0/ssocr.c:1646\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1646\n \tstmiapl\tr3!, {r0, r2, r3, r4, r5, r6, r8, r9, fp, lr}^\n \tandcs\tr6, r2, #1769472\t@ 0x1b0000\n \tstmmi\tr4, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f84478\n \t\t\t@ instruction: 0xf507ecc0\n-/build/1st/ssocr-2.23.0/ssocr.c:1650\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1650\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovwvc\tpc, #1027\t@ 0x403\t@ \n \tsuble\tr2, pc, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1651\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1651\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandsvs\tr2, sl, r0, lsl #4\n \t\t\t@ instruction: 0xf507e03e\n-/build/1st/ssocr-2.23.0/ssocr.c:1652\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1652\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tvstrle\td2, [r2, #-0]\n-/build/1st/ssocr-2.23.0/ssocr.c:1652 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1652 (discriminator 1)\n \t\t\t@ instruction: 0xf7f8203a\n \t\t\t@ instruction: 0xf507ec16\n-/build/1st/ssocr-2.23.0/ssocr.c:1653 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1653 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90f3a <__bss_end__@@Base+0x7ec92>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tfp, {r0, r1, r4, sl, lr}\n \tblmi\t1b99f50 <__bss_end__@@Base+0x1b87ca8>\n \t\t\t@ instruction: 0x4618447b\n \tldcl\t7, cr15, [r2], #-992\t@ 0xfffffc20\n-/build/1st/ssocr-2.23.0/ssocr.c:1654 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1654 (discriminator 2)\n \tstmiapl\tr3!, {r2, r3, r5, r6, r8, r9, fp, lr}^\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tblx\t90f6a <__bss_end__@@Base+0x7ecc2>\n \t\t\t@ instruction: 0xf507f303\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r1, r7, r9, ip, sp, lr}\n \tldmdbvs\tfp, {r0, r1, r4, sl, lr}^\n \t\t\t@ instruction: 0xf7f84619\n \t\t\t@ instruction: 0xf507ff1b\n-/build/1st/ssocr-2.23.0/ssocr.c:1651 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1651 (discriminator 2)\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf50773b4\n \t\t\t@ instruction: 0xf5a272cc\n \tldmdavs\tr2, {r2, r4, r5, r7, r9, ip, sp, lr}\n \tandsvs\tr3, sl, r1, lsl #4\n-/build/1st/ssocr-2.23.0/ssocr.c:1651 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1651 (discriminator 1)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \t\t\t@ instruction: 0xf8d7681a\n \taddsmi\tr3, sl, #252\t@ 0xfc\n \tldrh\tsp, [r9], #-183\t@ 0xffffff49\n-/build/1st/ssocr-2.23.0/ssocr.c:1657\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1657\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \torrsvc\tpc, r2, #683671552\t@ 0x28c00000\n \t\t\t@ instruction: 0xf0036818\n \t\t\t@ instruction: 0xf507fb59\n-/build/1st/ssocr-2.23.0/ssocr.c:1658\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1658\n \t\t\t@ instruction: 0xf5a373cc\n \tandcs\tr7, r0, #180, 6\t@ 0xd0000002\n \tsub\tr6, r2, sl, lsl r0\n-/build/1st/ssocr-2.23.0/ssocr.c:1659 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1659 (discriminator 3)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n@@ -8809,76 +8809,76 @@\n \t\t\t@ instruction: 0x4601fe79\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73aef5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcvc\tpc, lr, #679477248\t@ 0x28800000\n \tstrmi\tr6, [sl], #-2066\t@ 0xfffff7ee\n \tblmi\tfe0814 <__bss_end__@@Base+0xfce56c>\n-/build/1st/ssocr-2.23.0/ssocr.c:1660 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1660 (discriminator 3)\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tandscs\tr6, r8, #1769472\t@ 0x1b0000\n \tvqrdmulh.s\td15, d3, d2\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \taddvc\tpc, r2, #679477248\t@ 0x28800000\n \tldrmi\tr6, [r3], #-2066\t@ 0xfffff7ee\n \t\t\t@ instruction: 0x4619695b\n \tmcr2\t7, 6, pc, cr0, cr8, {7}\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1658 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1658 (discriminator 3)\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73b4f5a3\n \tsbcvc\tpc, ip, #29360128\t@ 0x1c00000\n \tadcsvc\tpc, r4, #679477248\t@ 0x28800000\n \tandcc\tr6, r1, #1179648\t@ 0x120000\n \t\t\t@ instruction: 0xf507601a\n-/build/1st/ssocr-2.23.0/ssocr.c:1658 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1658 (discriminator 1)\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tsl, {r2, r4, r5, r7, r8, r9, ip, sp, lr}\n \tldrsbtcc\tpc, [ip], #135\t@ 0x87\t@ \n \tblle\tfecd9264 <__bss_end__@@Base+0xfecc6fbc>\n-/build/1st/ssocr-2.23.0/ssocr.c:1663\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1663\n \t\t\t@ instruction: 0xf7f8200a\n \t\t\t@ instruction: 0xf7f8eb7a\n-/build/1st/ssocr-2.23.0/ssocr.c:1666\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1666\n \t\t\t@ instruction: 0xf507eb66\n-/build/1st/ssocr-2.23.0/ssocr.c:1667\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1667\n \t\t\t@ instruction: 0xf5a373cc\n \tldmdavs\tfp, {r1, r2, r4, r7, r8, r9, ip, sp, lr}\n \tmovweq\tpc, #32771\t@ 0x8003\t@ \n \teorle\tr2, r3, r0, lsl #22\n-/build/1st/ssocr-2.23.0/ssocr.c:1668\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1668\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0xf5076818\n \t\t\t@ instruction: 0xf5a373cc\n \t\t\t@ instruction: 0xf5077398\n \t\t\t@ instruction: 0xf5a272cc\n \t\t\t@ instruction: 0xf507729a\n \t\t\t@ instruction: 0xf5a171cc\n \tstmdavs\tr9, {r1, r2, r4, r7, r8, ip, sp, lr}\n \tldmdavs\tfp, {r8, ip, pc}\n \t\t\t@ instruction: 0x46016812\n \tldrbtmi\tr4, [r8], #-2073\t@ 0xfffff7e7\n \t\t\t@ instruction: 0xf9acf002\n-/build/1st/ssocr-2.23.0/ssocr.c:1669\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1669\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73bef5a3\n \t\t\t@ instruction: 0x4618681b\n \tstc\t7, cr15, [r4], #-992\t@ 0xfffffc20\n-/build/1st/ssocr-2.23.0/ssocr.c:1670\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1670\n \tbl\te46840 <__bss_end__@@Base+0xe34598>\n-/build/1st/ssocr-2.23.0/ssocr.c:1674\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1674\n \tbicvc\tpc, ip, #29360128\t@ 0x1c00000\n \t\t\t@ instruction: 0x73aef5a3\n \tblcs\t228d8 <__bss_end__@@Base+0x10630>\n \tandcs\tsp, r2, r2\n-/build/1st/ssocr-2.23.0/ssocr.c:1675\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1675\n \tmcrr\t7, 15, pc, lr, cr8\t@ \n-/build/1st/ssocr-2.23.0/ssocr.c:1677\n+/build/2/ssocr-2.23.0/2nd/ssocr.c:1677\n \t\t\t@ instruction: 0xf7f82000\n \tsvclt\t0x0000ec4c\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tr6, r0, r8, lsl #9\n \tandeq\tr6, r0, r4, asr r4\n \tandeq\tr6, r0, r6, ror #7\n \tandeq\tr6, r0, ip, asr r3\n@@ -8888,112 +8888,112 @@\n \tandeq\tr6, r0, r8, lsl #5\n \tandeq\tr5, r0, r0, lsr #29\n \tandeq\tr5, r0, r8, asr #28\n \tandeq\tr0, r0, r8, lsl #2\n \tandeq\tr5, r0, r6, asr r8\n \tandeq\tr0, r0, r0\n set_fg_color():\n-/build/1st/ssocr-2.23.0/imgproc.c:48\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:48\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2574\t@ 0xfffff5f2\n \tldrbtmi\tr4, [r9], #-2318\t@ 0xfffff6f2\n \tstmiapl\tfp, {r1, r2, r3, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:49\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:49\n \tldmpl\tr3, {r2, r3, r8, r9, fp, lr}^\n \tandsvs\tr6, sl, sl, ror r8\n-/build/1st/ssocr-2.23.0/imgproc.c:50\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:50\n \tbmi\t2f84dc <__bss_end__@@Base+0x2e6234>\n-/build/1st/ssocr-2.23.0/imgproc.c:48\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:48\n \tblmi\t219ac8 <__bss_end__@@Base+0x207820>\n-/build/1st/ssocr-2.23.0/imgproc.c:50\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:50\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f8d001\n \t\t\t@ instruction: 0x3710ebbc\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr9, r0, r2, lsr #12\n \tandeq\tr9, r0, lr, lsl r6\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr0, r0, ip, lsl r1\n \tandeq\tr9, r0, r4, lsl #12\n set_bg_color():\n-/build/1st/ssocr-2.23.0/imgproc.c:54\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:54\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2574\t@ 0xfffff5f2\n \tldrbtmi\tr4, [r9], #-2318\t@ 0xfffff6f2\n \tstmiapl\tfp, {r1, r2, r3, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:55\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:55\n \tldmpl\tr3, {r2, r3, r8, r9, fp, lr}^\n \tandsvs\tr6, sl, sl, ror r8\n-/build/1st/ssocr-2.23.0/imgproc.c:56\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:56\n \tbmi\t2f8534 <__bss_end__@@Base+0x2e628c>\n-/build/1st/ssocr-2.23.0/imgproc.c:54\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:54\n \tblmi\t219b20 <__bss_end__@@Base+0x207878>\n-/build/1st/ssocr-2.23.0/imgproc.c:56\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:56\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f8d001\n \t\t\t@ instruction: 0x3710eb90\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr9, r0, sl, asr #11\n \tandeq\tr9, r0, r6, asr #11\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr0, r0, ip, ror #1\n \tandeq\tr9, r0, ip, lsr #11\n ssocr_set_color():\n-/build/1st/ssocr-2.23.0/imgproc.c:60\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:60\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [fp], #-2851\t@ 0xfffff4dd\n \tldrbtmi\tr4, [r9], #-2339\t@ 0xfffff6dd\n \tstmpl\tsl, {r0, r1, r5, r9, fp, lr}\n \trscsvs\tr6, sl, r2, lsl r8\n \tandeq\tpc, r0, #79\t@ 0x4f\n-/build/1st/ssocr-2.23.0/imgproc.c:61\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:61\n \tbcs\t22b6c <__bss_end__@@Base+0x108c4>\n \tldmdavs\tsl!, {r0, r1, ip, lr, pc}^\n \tandle\tr2, sp, r1, lsl #20\n \tbmi\t7c09f4 <__bss_end__@@Base+0x7ae74c>\n-/build/1st/ssocr-2.23.0/imgproc.c:63\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:63\n \tldmdavs\tr0, {r1, r3, r4, r7, fp, ip, lr}\n \tldmpl\tsl, {r2, r3, r4, r9, fp, lr}\n \tbmi\t6e29e0 <__bss_end__@@Base+0x6d0738>\n \tldmdavs\tsl, {r0, r1, r3, r4, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf7f823ff\n \t\t\t@ instruction: 0xe019ebbc\n-/build/1st/ssocr-2.23.0/imgproc.c:67\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:67\n \tldmpl\tsl, {r3, r4, r9, fp, lr}\n \tbmi\t5e29f0 <__bss_end__@@Base+0x5d0748>\n \tldmdavs\tr1, {r1, r3, r4, r7, fp, ip, lr}\n \tldmpl\tfp, {r0, r2, r4, r9, fp, lr}\n \tmvnscs\tr6, #1703936\t@ 0x1a0000\n \tbl\tfebc69a0 <__bss_end__@@Base+0xfebb46f8>\n-/build/1st/ssocr-2.23.0/imgproc.c:69\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:69\n \tbmi\t5009f4 <__bss_end__@@Base+0x4ee74c>\n-/build/1st/ssocr-2.23.0/imgproc.c:71\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:71\n \tldmdavs\tr8, {r0, r1, r3, r4, r7, fp, ip, lr}\n \tbmi\t4a2bb8 <__bss_end__@@Base+0x490910>\n \tldmdbmi\tr2, {r1, r3, r4, r5, r6, sl, lr}\n \t\t\t@ instruction: 0xf7f84479\n \trsbcs\tlr, r3, r2, lsr fp\n-/build/1st/ssocr-2.23.0/imgproc.c:73\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:73\n \tbl\tfe6c69bc <__bss_end__@@Base+0xfe6b4714>\n-/build/1st/ssocr-2.23.0/imgproc.c:76\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:76\n \tbmi\t3f85e0 <__bss_end__@@Base+0x3e6338>\n-/build/1st/ssocr-2.23.0/imgproc.c:60\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:60\n \tblmi\t219bcc <__bss_end__@@Base+0x207924>\n-/build/1st/ssocr-2.23.0/imgproc.c:76\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:76\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f8d001\n \t\t\t@ instruction: 0x3710eb3a\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr9, r0, r2, ror r5\n@@ -9002,161 +9002,161 @@\n \tandeq\tr0, r0, ip, lsl r1\n \tandeq\tr0, r0, ip, ror #1\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tr5, r0, ip, lsr #26\n \tandeq\tr5, r0, r0, lsr sp\n \tandeq\tr9, r0, r0, lsl #10\n draw_pixel():\n-/build/1st/ssocr-2.23.0/imgproc.c:80\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:80\n \taddlt\tfp, r6, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tldrhtvs\tr6, [sl], #-9\n \tbmi\t520b1c <__bss_end__@@Base+0x50e874>\n \tblmi\t519c1c <__bss_end__@@Base+0x507974>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f617b\n \t\t\t@ instruction: 0xf7f80300\n-/build/1st/ssocr-2.23.0/imgproc.c:83\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:83\n \tteqvs\tr8, r6\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:84\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:84\n \t\t\t@ instruction: 0xf7f868f8\n \tldmdavs\tr8!, {r1, r2, r3, r5, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:85\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:85\n \t\t\t@ instruction: 0xff8af7ff\n-/build/1st/ssocr-2.23.0/imgproc.c:86\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:86\n \tldmdavs\tr9!, {r9, sp}^\n \t\t\t@ instruction: 0xf7f868b8\n \tldmdbvs\tr8!, {r2, r3, r4, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:87\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:87\n \tbl\t8c6a40 <__bss_end__@@Base+0x8b4798>\n-/build/1st/ssocr-2.23.0/imgproc.c:88\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:88\n \tbmi\t278664 <__bss_end__@@Base+0x2663bc>\n-/build/1st/ssocr-2.23.0/imgproc.c:80\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:80\n \tblmi\t1d9c50 <__bss_end__@@Base+0x1c79a8>\n-/build/1st/ssocr-2.23.0/imgproc.c:88\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:88\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr6, sl, fp, ror r9\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f8d001\n \t\t\t@ instruction: 0x3718eaf8\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \t\t\t@ instruction: 0x000094b0\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr9, r0, ip, ror r4\n draw_fg_pixel():\n-/build/1st/ssocr-2.23.0/imgproc.c:92\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:92\n \taddlt\tfp, r6, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tldrhtvs\tr6, [sl], #-9\n \tldrbtmi\tr4, [sl], #-2574\t@ 0xfffff5f2\n \tldmpl\tr3, {r1, r2, r3, r8, r9, fp, lr}^\n \tcmnvs\tfp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:93\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:93\n \tldmdavs\tsl!, {r8, r9, sp}^\n \tldmvs\tr8!, {r0, r3, r4, r5, r7, fp, sp, lr}^\n \t\t\t@ instruction: 0xffb6f7ff\n-/build/1st/ssocr-2.23.0/imgproc.c:94\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:94\n \tbmi\t2786b8 <__bss_end__@@Base+0x266410>\n-/build/1st/ssocr-2.23.0/imgproc.c:92\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:92\n \tblmi\t1d9ca4 <__bss_end__@@Base+0x1c79fc>\n-/build/1st/ssocr-2.23.0/imgproc.c:94\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:94\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr6, sl, fp, ror r9\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f8d001\n \tldrcc\tlr, [r8, -lr, asr #21]\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr9, r0, r6, asr #8\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr9, r0, r8, lsr #8\n draw_bg_pixel():\n-/build/1st/ssocr-2.23.0/imgproc.c:98\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:98\n \taddlt\tfp, r6, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tldrhtvs\tr6, [sl], #-9\n \tldrbtmi\tr4, [sl], #-2574\t@ 0xfffff5f2\n \tldmpl\tr3, {r1, r2, r3, r8, r9, fp, lr}^\n \tcmnvs\tfp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:99\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:99\n \tldmdavs\tsl!, {r0, r8, r9, sp}^\n \tldmvs\tr8!, {r0, r3, r4, r5, r7, fp, sp, lr}^\n \t\t\t@ instruction: 0xff8cf7ff\n-/build/1st/ssocr-2.23.0/imgproc.c:100\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:100\n \tbmi\t27870c <__bss_end__@@Base+0x266464>\n-/build/1st/ssocr-2.23.0/imgproc.c:98\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:98\n \tblmi\t1d9cf8 <__bss_end__@@Base+0x1c7a50>\n-/build/1st/ssocr-2.23.0/imgproc.c:100\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:100\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr6, sl, fp, ror r9\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f8d001\n \tldrcc\tlr, [r8, -r4, lsr #21]\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tstrdeq\tr9, [r0], -r2\n \tandeq\tr0, r0, r0, lsl #2\n \tldrdeq\tr9, [r0], -r4\n is_pixel_set():\n-/build/1st/ssocr-2.23.0/imgproc.c:104\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:104\n \taddlt\tfp, r6, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tbleq\t4415c <__bss_end__@@Base+0x31eb4>\n \tldrbtmi\tr4, [fp], #-2868\t@ 0xfffff4cc\n \tldrbtmi\tr4, [r9], #-2356\t@ 0xfffff6cc\n \tstmpl\tsl, {r2, r4, r5, r9, fp, lr}\n \tcmnvs\tsl, r2, lsl r8\n \tandeq\tpc, r0, #79\t@ 0x4f\n-/build/1st/ssocr-2.23.0/imgproc.c:105\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:105\n \tldmpl\tsl, {r1, r4, r5, r9, fp, lr}\n \tbcs\t22ba4 <__bss_end__@@Base+0x108fc>\n \tbcs\tffffcb68 <__bss_end__@@Base+0xfffea8c0>\n \teor\tsp, pc, r8, lsl r0\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:107\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:107\n \tmcr\t8, 0, r6, cr7, cr11, {7}\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td6, [r7, #924]\t@ 0x39c\n \tvldr\td5, [pc]\t@ 8b74 \n \tvdiv.f64\td4, d5, d20\n \tvldr\td7, [pc, #16]\t@ 8b8c \n \tvmul.f64\td5, d7, d20\n \tvmov.f64\td7, #69\t@ 0x3e280000 0.1640625\n \tvsqrt.f64\td22, d7\n \tstrle\tpc, [r1, #-2576]\t@ 0xfffff5f0\n-/build/1st/ssocr-2.23.0/imgproc.c:108\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:108\n \teor\tr2, r6, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:110\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:110\n \teor\tr2, r4, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:114\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:114\n \tmcr\t8, 0, r6, cr7, cr11, {7}\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td6, [r7, #924]\t@ 0x39c\n \tvldr\td5, [pc]\t@ 8ba4 \n \tvdup.32\td5, r4\n \tvldr\td7, [pc, #16]\t@ 8bbc \n \tvmov.32\td7[1], r5\n \tvmov.f64\td7, #69\t@ 0x3e280000 0.1640625\n \tvsqrt.f64\td22, d7\n \tblle\t873fc <__bss_end__@@Base+0x75154>\n-/build/1st/ssocr-2.23.0/imgproc.c:115\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:115\n \tand\tr2, lr, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:117\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:117\n \tand\tr2, ip, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:121\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:121\n \tldmpl\tfp, {r0, r1, r2, r4, r9, fp, lr}\n \tbmi\t5e2c38 <__bss_end__@@Base+0x5d0990>\n \tldmdbmi\tr7, {r1, r3, r4, r5, r6, sl, lr}\n \t\t\t@ instruction: 0x46184479\n \tb\tc46bb8 <__bss_end__@@Base+0xc34910>\n-/build/1st/ssocr-2.23.0/imgproc.c:123\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:123\n \t\t\t@ instruction: 0xf7f82063\n \tldmdbmi\tr4, {r1, r3, r4, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:104\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:104\n \tbmi\t399dc8 <__bss_end__@@Base+0x387b20>\n-/build/1st/ssocr-2.23.0/imgproc.c:126\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:126\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror r9\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f8d001\n \t\t\t@ instruction: 0x4618ea3a\n \tssatmi\tr3, #30, r8, lsl #14\n \tsvclt\t0x0000bd80\n@@ -9170,603 +9170,603 @@\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr0, r0, ip, lsl r1\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tr5, r0, ip, lsr #22\n \tandeq\tr5, r0, r0, ror #22\n \tandeq\tr9, r0, r0, lsl #6\n set_pixels_filter():\n-/build/1st/ssocr-2.23.0/imgproc.c:133\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:133\n \taddslt\tfp, r6, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc425c <__bss_end__@@Base+0xb1fb4>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tldrbtmi\tr4, [sl], #-2632\t@ 0xfffff5b8\n \tldmpl\tr3, {r3, r6, r8, r9, fp, lr}^\n \tldrbvs\tr6, [fp, #-2075]!\t@ 0xfffff7e5\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:143\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:143\n \tstmib\tsl!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldmdbvs\tfp!, {r3, r4, r5, r8, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:146\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:146\n \t\t\t@ instruction: 0x4618681b\n \tb\t846c44 <__bss_end__@@Base+0x83499c>\n-/build/1st/ssocr-2.23.0/imgproc.c:147\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:147\n \tb\t4c6c48 <__bss_end__@@Base+0x4b49a0>\n \t\t\t@ instruction: 0xf7f86378\n-/build/1st/ssocr-2.23.0/imgproc.c:148\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:148\n \t\t\t@ instruction: 0x63b8e91a\n-/build/1st/ssocr-2.23.0/imgproc.c:149\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:149\n \tb\t46c54 <__bss_end__@@Base+0x349ac>\n \tmovwcs\tr6, #1016\t@ 0x3f8\n-/build/1st/ssocr-2.23.0/imgproc.c:152\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:152\n \tldrsh\tr6, [ip], #-27\t@ 0xffffffe5\n-/build/1st/ssocr-2.23.0/imgproc.c:153\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:153\n \teorsvs\tr2, fp, #0, 6\n \tmovwcs\tlr, #82\t@ 0x52\n-/build/1st/ssocr-2.23.0/imgproc.c:154\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:154\n \tldmibvs\tfp!, {r0, r1, r3, r4, r5, r6, r7, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:155\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:155\n \trsbsvs\tr3, fp, #1024\t@ 0x400\n \tbvs\tf00d64 <__bss_end__@@Base+0xeeeabc>\n-/build/1st/ssocr-2.23.0/imgproc.c:156\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:156\n \tadcsvs\tr3, fp, #1024\t@ 0x400\n \tbvs\t1f00d3c <__bss_end__@@Base+0x1eeea94>\n-/build/1st/ssocr-2.23.0/imgproc.c:157\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:157\n \tblle\t8d389c <__bss_end__@@Base+0x8c15f4>\n-/build/1st/ssocr-2.23.0/imgproc.c:157 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:157 (discriminator 1)\n \tblvs\tfeee3688 <__bss_end__@@Base+0xfeed13e0>\n \tble\t7d970c <__bss_end__@@Base+0x7c7464>\n-/build/1st/ssocr-2.23.0/imgproc.c:157 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:157 (discriminator 2)\n \tblcs\t23794 <__bss_end__@@Base+0x114ec>\n \tbvs\tfeebf91c <__bss_end__@@Base+0xfeead674>\n-/build/1st/ssocr-2.23.0/imgproc.c:157 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:157 (discriminator 3)\n \taddsmi\tr6, sl, #125952\t@ 0x1ec00\n \t\t\t@ instruction: 0xf107da18\n-/build/1st/ssocr-2.23.0/imgproc.c:158\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:158\n \tldrmi\tr0, [sl], -r4, asr #6\n \tbvs\t1e237a0 <__bss_end__@@Base+0x1e114f8>\n \tldmib\tlr!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:159\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:159\n \tmovteq\tpc, #16647\t@ 0x4107\t@ \n \t\t\t@ instruction: 0x46186939\n \tstc2\t0, cr15, [r8, #-4]\n \tcfldrs\tmvf6, [r7, #224]\t@ 0xe0\n-/build/1st/ssocr-2.23.0/imgproc.c:160\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:160\n \t\t\t@ instruction: 0x6c380b02\n \t\t\t@ instruction: 0xff2ef7ff\n \tblcs\t1a4e8 <__bss_end__@@Base+0x8240>\n \tbvs\tffefcce8 <__bss_end__@@Base+0xffeeaa40>\n-/build/1st/ssocr-2.23.0/imgproc.c:161\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:161\n \trscsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:156 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:156 (discriminator 2)\n \tmovwcc\tr6, #6843\t@ 0x1abb\n \tbvs\tee17d8 <__bss_end__@@Base+0xecf530>\n-/build/1st/ssocr-2.23.0/imgproc.c:156 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:156 (discriminator 1)\n \tbvs\tfee958f4 <__bss_end__@@Base+0xfee8364c>\n \tlfmle\tf4, 2, [r0, #616]\t@ 0x268\n-/build/1st/ssocr-2.23.0/imgproc.c:155 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:155 (discriminator 2)\n \tmovwcc\tr6, #6779\t@ 0x1a7b\n \tldmibvs\tfp!, {r0, r1, r3, r4, r5, r6, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:155 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:155 (discriminator 1)\n \tbvs\t1e95904 <__bss_end__@@Base+0x1e8365c>\n \tsfmle\tf4, 2, [r4, #616]\t@ 0x268\n-/build/1st/ssocr-2.23.0/imgproc.c:167\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:167\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, r9, fp, sp, lr}^\n \tblle\t159774 <__bss_end__@@Base+0x1474cc>\n-/build/1st/ssocr-2.23.0/imgproc.c:168\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:168\n \tldmibvs\tr9!, {r1, r3, r4, r5, r9, fp, sp, lr}^\n \t\t\t@ instruction: 0xf7ff6bf8\n \t\t\t@ instruction: 0xe004febb\n-/build/1st/ssocr-2.23.0/imgproc.c:170\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:170\n \tldmibvs\tr9!, {r1, r3, r4, r5, r9, fp, sp, lr}^\n \t\t\t@ instruction: 0xf7ff6bf8\n \tbvs\tf088a0 <__bss_end__@@Base+0xef65f8>\n-/build/1st/ssocr-2.23.0/imgproc.c:153 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:153 (discriminator 2)\n \teorsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:153 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:153 (discriminator 1)\n \tblvs\t1ee3614 <__bss_end__@@Base+0x1ed136c>\n \tblle\tfea19798 <__bss_end__@@Base+0xfea074f0>\n-/build/1st/ssocr-2.23.0/imgproc.c:152 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:152 (discriminator 2)\n \tmovwcc\tr6, #6651\t@ 0x19fb\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:152 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:152 (discriminator 1)\n \taddsmi\tr6, sl, #191488\t@ 0x2ec00\n \tblvs\te3fbb8 <__bss_end__@@Base+0xe2d910>\n-/build/1st/ssocr-2.23.0/imgproc.c:176\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:176\n \tldmib\tr0!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:179\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:179\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r6, r7, r8, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:133\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:133\n \tbmi\t219f30 <__bss_end__@@Base+0x207c88>\n-/build/1st/ssocr-2.23.0/imgproc.c:180\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:180\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror sp\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f8d001\n \tldrmi\tlr, [r8], -r6, lsl #19\n \tssatmi\tr3, #30, r8, asr #14\n \tsvclt\t0x0000bd80\n \tmuleq\tr0, sl, r2\n \tandeq\tr0, r0, r0, lsl #2\n \tmuleq\tr0, r8, r1\n set_pixels_filter_iter():\n-/build/1st/ssocr-2.23.0/imgproc.c:184\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:184\n \taddlt\tfp, sl, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc439c <__bss_end__@@Base+0xb20f4>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tbmi\t7e0e74 <__bss_end__@@Base+0x7cebcc>\n \tblmi\t7d9f74 <__bss_end__@@Base+0x7c7ccc>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f627b\n \tldmdbvs\tfp!, {r8, r9}^\n-/build/1st/ssocr-2.23.0/imgproc.c:187\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:187\n \t\t\t@ instruction: 0x4618681b\n \tstmib\tr2, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:188\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:188\n \tstmdb\tr8!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tbvs\tee1688 <__bss_end__@@Base+0xecf3e0>\n \tmovwcs\tr6, #443\t@ 0x1bb\n-/build/1st/ssocr-2.23.0/imgproc.c:189\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:189\n \t\t\t@ instruction: 0xe01461fb\n-/build/1st/ssocr-2.23.0/imgproc.c:190 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:190 (discriminator 3)\n \ttsteq\tr8, #-1073741823\t@ 0xc0000001\t@ \n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, fp, sp, lr}\n \tbleq\tc4418 <__bss_end__@@Base+0xb2170>\n \t\t\t@ instruction: 0xf7ff4618\n \teorsvs\tpc, r8, #57, 30\t@ 0xe4\n-/build/1st/ssocr-2.23.0/imgproc.c:191 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:191 (discriminator 3)\n \t\t\t@ instruction: 0x461869bb\n \tstmdb\tip!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:192 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:192 (discriminator 3)\n \tstmda\tlr!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:193 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:193 (discriminator 3)\n \t\t\t@ instruction: 0x61bb6a3b\n-/build/1st/ssocr-2.23.0/imgproc.c:189 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:189 (discriminator 3)\n \tmovwcc\tr6, #6651\t@ 0x19fb\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:189 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:189 (discriminator 1)\n \taddsmi\tr6, sl, #3866624\t@ 0x3b0000\n \tbvs\teffd7c <__bss_end__@@Base+0xeedad4>\n-/build/1st/ssocr-2.23.0/imgproc.c:184\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:184\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:196\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:196\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tbvs\t1ea2e34 <__bss_end__@@Base+0x1e90b8c>\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tldmdb\tr6!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x37284618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr9, r0, r8, asr r1\n \tandeq\tr0, r0, r0, lsl #2\n \tstrdeq\tr9, [r0], -sl\n dilation():\n-/build/1st/ssocr-2.23.0/imgproc.c:200\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:200\n \taddlt\tfp, r8, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc4438 <__bss_end__@@Base+0xb2190>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tldrbtmi\tr4, [sl], #-2576\t@ 0xfffff5f0\n \tldmpl\tr3, {r4, r8, r9, fp, lr}^\n \tmvnsvs\tr6, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:201\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:201\n \tandcs\tr6, r1, #8060928\t@ 0x7b0000\n \tvldr.16\ts12, [r7, #114]\t@ 0x72\n \tldmdbvs\tr8!, {r1, r8, r9, fp}^\n \t\t\t@ instruction: 0xff9af7ff\n \tstmdbmi\tsl, {r0, r1, r9, sl, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:200\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:200\n \tbmi\t21a02c <__bss_end__@@Base+0x207d84>\n-/build/1st/ssocr-2.23.0/imgproc.c:202\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:202\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-154\t@ 0xffffff66\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f8d001\n \tldrmi\tlr, [r8], -r8, lsl #18\n \tldrtmi\tr3, [sp], r0, lsr #14\n \tsvclt\t0x0000bd80\n \tstrheq\tr9, [r0], -lr\n \tandeq\tr0, r0, r0, lsl #2\n \tmuleq\tr0, ip, r0\n erosion():\n-/build/1st/ssocr-2.23.0/imgproc.c:206\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:206\n \taddlt\tfp, r8, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc4498 <__bss_end__@@Base+0xb21f0>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tldrbtmi\tr4, [sl], #-2576\t@ 0xfffff5f0\n \tldmpl\tr3, {r4, r8, r9, fp, lr}^\n \tmvnsvs\tr6, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:207\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:207\n \tandcs\tr6, r9, #8060928\t@ 0x7b0000\n \tvldr.16\ts12, [r7, #114]\t@ 0x72\n \tldmdbvs\tr8!, {r1, r8, r9, fp}^\n \t\t\t@ instruction: 0xff6af7ff\n \tstmdbmi\tsl, {r0, r1, r9, sl, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:206\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:206\n \tbmi\t21a08c <__bss_end__@@Base+0x207de4>\n-/build/1st/ssocr-2.23.0/imgproc.c:208\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:208\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-154\t@ 0xffffff66\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f8d001\n \t\t\t@ instruction: 0x4618e8d8\n \tldrtmi\tr3, [sp], r0, lsr #14\n \tsvclt\t0x0000bd80\n \tandeq\tr9, r0, lr, asr r0\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr9, r0, ip, lsr r0\n closing():\n-/build/1st/ssocr-2.23.0/imgproc.c:212\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:212\n \taddlt\tfp, sl, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc44f8 <__bss_end__@@Base+0xb2250>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tldrbtmi\tr4, [sl], #-2584\t@ 0xfffff5e8\n \tldmpl\tr3, {r3, r4, r8, r9, fp, lr}^\n \trsbsvs\tr6, fp, #1769472\t@ 0x1b0000\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:215\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:215\n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, fp, sp, lr}\n \tbleq\tc4554 <__bss_end__@@Base+0xb22ac>\n \t\t\t@ instruction: 0xf7ff6978\n \tstrmi\tpc, [r3], -r9, lsl #31\n \t\t\t@ instruction: 0xf10761fb\n-/build/1st/ssocr-2.23.0/imgproc.c:217\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:217\n \tldmdavs\tsl!, {r2, r3, r4, r8, r9}^\n \tvldr.16\ts12, [r7, #114]\t@ 0x72\n \tldrmi\tr0, [r8], -r2, lsl #22\n \t\t\t@ instruction: 0xffaef7ff\n \tldmibvs\tfp!, {r3, r4, r5, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:218\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:218\n \t\t\t@ instruction: 0xf7f84618\n \t\t\t@ instruction: 0xf7f7e8c4\n-/build/1st/ssocr-2.23.0/imgproc.c:219\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:219\n \tbvs\tf04e3c <__bss_end__@@Base+0xef2b94>\n-/build/1st/ssocr-2.23.0/imgproc.c:212\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:212\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:221\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:221\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tbvs\t1ea2f74 <__bss_end__@@Base+0x1e90ccc>\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tldm\tr6, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \t\t\t@ instruction: 0x37284618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tstrdeq\tr8, [r0], -lr\n \tandeq\tr0, r0, r0, lsl #2\n \t\t\t@ instruction: 0x00008fba\n opening():\n-/build/1st/ssocr-2.23.0/imgproc.c:225\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:225\n \taddlt\tfp, sl, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc4578 <__bss_end__@@Base+0xb22d0>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tldrbtmi\tr4, [sl], #-2584\t@ 0xfffff5e8\n \tldmpl\tr3, {r3, r4, r8, r9, fp, lr}^\n \trsbsvs\tr6, fp, #1769472\t@ 0x1b0000\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:228\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:228\n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, fp, sp, lr}\n \tbleq\tc45d4 <__bss_end__@@Base+0xb232c>\n \t\t\t@ instruction: 0xf7ff6978\n \t\t\t@ instruction: 0x4603ff79\n \t\t\t@ instruction: 0xf10761fb\n-/build/1st/ssocr-2.23.0/imgproc.c:230\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:230\n \tldmdavs\tsl!, {r2, r3, r4, r8, r9}^\n \tvldr.16\ts12, [r7, #114]\t@ 0x72\n \tldrmi\tr0, [r8], -r2, lsl #22\n \t\t\t@ instruction: 0xff3ef7ff\n \tldmibvs\tfp!, {r3, r4, r5, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:231\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:231\n \t\t\t@ instruction: 0xf7f84618\n \t\t\t@ instruction: 0xf7f7e884\n-/build/1st/ssocr-2.23.0/imgproc.c:232\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:232\n \tbvs\tf04dbc <__bss_end__@@Base+0xef2b14>\n-/build/1st/ssocr-2.23.0/imgproc.c:225\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:225\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:234\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:234\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tbvs\t1ea2ff4 <__bss_end__@@Base+0x1e90d4c>\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tldmda\tr6, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0x37284618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr8, r0, lr, ror pc\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, sl, lsr pc\n keep_pixels_filter():\n-/build/1st/ssocr-2.23.0/imgproc.c:242\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:242\n \taddslt\tfp, r6, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \tbleq\tc45f8 <__bss_end__@@Base+0xb2350>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tldrbtmi\tr4, [sl], #-2651\t@ 0xfffff5a5\n \tldmpl\tr3, {r0, r1, r3, r4, r6, r8, r9, fp, lr}^\n \tldrbvs\tr6, [fp, #-2075]!\t@ 0xfffff7e5\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:252\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:252\n \tldmda\tip, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldmdbvs\tfp!, {r3, r4, r5, r8, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:255\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:255\n \t\t\t@ instruction: 0x4618681b\n \tldmda\tr2, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:256\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:256\n \tstmda\tr4, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0xf7f76378\n-/build/1st/ssocr-2.23.0/imgproc.c:257\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:257\n \t\t\t@ instruction: 0x63b8ef4c\n-/build/1st/ssocr-2.23.0/imgproc.c:258\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:258\n \tldmda\tr2!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblvs\tffe21ff4 <__bss_end__@@Base+0xffe0fd4c>\n-/build/1st/ssocr-2.23.0/imgproc.c:261\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:261\n \tstmda\tr6, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:262\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:262\n \t\t\t@ instruction: 0xf7ff2001\n \tblvs\t1f082ac <__bss_end__@@Base+0x1ef6004>\n-/build/1st/ssocr-2.23.0/imgproc.c:263\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:263\n \t\t\t@ instruction: 0x21006bba\n \t\t\t@ instruction: 0xf7f72000\n \tldmdbvs\tfp!, {r1, r4, r6, r7, r8, r9, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:264\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:264\n \t\t\t@ instruction: 0x4618681b\n \tldmda\tr8!, {r3, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:267\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:267\n \tmvnsvs\tr2, r0, lsl #6\n \tmovwcs\tlr, #114\t@ 0x72\n-/build/1st/ssocr-2.23.0/imgproc.c:268\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:268\n \trsb\tr6, r8, fp, lsr r2\n-/build/1st/ssocr-2.23.0/imgproc.c:269\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:269\n \trscsvs\tr2, fp, #0, 6\n-/build/1st/ssocr-2.23.0/imgproc.c:270\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:270\n \tmovteq\tpc, #16647\t@ 0x4107\t@ \n \tbvs\te5a8b4 <__bss_end__@@Base+0xe4860c>\n \t\t\t@ instruction: 0xf7f869f8\n \t\t\t@ instruction: 0xf107e836\n-/build/1st/ssocr-2.23.0/imgproc.c:271\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:271\n \tldmdbvs\tr9!, {r2, r6, r8, r9}\n \t\t\t@ instruction: 0xf0014618\n \tldrtvs\tpc, [r8], #-2879\t@ 0xfffff4c1\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:272\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:272\n \tbleq\tc46c0 <__bss_end__@@Base+0xb2418>\n \t\t\t@ instruction: 0xf7ff6c38\n \tstrmi\tpc, [r3], -r5, ror #26\n \teorsle\tr2, lr, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:273\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:273\n \tblcc\t63860 <__bss_end__@@Base+0x515b8>\n \teors\tr6, r5, fp, ror r2\n-/build/1st/ssocr-2.23.0/imgproc.c:274\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:274\n \tblcc\t63968 <__bss_end__@@Base+0x516c0>\n \tstrht\tr6, [r9], -fp\n-/build/1st/ssocr-2.23.0/imgproc.c:275\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:275\n \tblcs\t23a70 <__bss_end__@@Base+0x117c8>\n \tbvs\t1ebfd14 <__bss_end__@@Base+0x1eada6c>\n-/build/1st/ssocr-2.23.0/imgproc.c:275 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:275 (discriminator 1)\n \taddsmi\tr6, sl, #191488\t@ 0x2ec00\n \tbvs\tfeeff90c <__bss_end__@@Base+0xfeeed664>\n-/build/1st/ssocr-2.23.0/imgproc.c:275 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:275 (discriminator 2)\n \tblle\t713c94 <__bss_end__@@Base+0x7019ec>\n-/build/1st/ssocr-2.23.0/imgproc.c:275 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:275 (discriminator 3)\n \tblvs\t1ee3b80 <__bss_end__@@Base+0x1ed18d8>\n \tble\t619b04 <__bss_end__@@Base+0x60785c>\n-/build/1st/ssocr-2.23.0/imgproc.c:276\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:276\n \tmovteq\tpc, #16647\t@ 0x4107\t@ \n \tbvs\tfee5a90c <__bss_end__@@Base+0xfee48664>\n \t\t\t@ instruction: 0xf7f86a78\n \t\t\t@ instruction: 0xf107e80a\n-/build/1st/ssocr-2.23.0/imgproc.c:277\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:277\n \tldmdbvs\tr9!, {r2, r6, r8, r9}\n \t\t\t@ instruction: 0xf0014618\n \tldrtvs\tpc, [r8], #-2835\t@ 0xfffff4ed\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:278\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:278\n \tbleq\tc4718 <__bss_end__@@Base+0xb2470>\n \t\t\t@ instruction: 0xf7ff6c38\n \t\t\t@ instruction: 0x4603fd39\n \tandle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:279\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:279\n \tmovwcc\tr6, #6907\t@ 0x1afb\n \tbvs\tfeee1cbc <__bss_end__@@Base+0xfeecfa14>\n-/build/1st/ssocr-2.23.0/imgproc.c:274 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:274 (discriminator 2)\n \tadcsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:274 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:274 (discriminator 1)\n \tmovwcc\tr6, #6715\t@ 0x1a3b\n \taddsmi\tr6, sl, #761856\t@ 0xba000\n \tbvs\t1f00820 <__bss_end__@@Base+0x1eee578>\n-/build/1st/ssocr-2.23.0/imgproc.c:273 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:273 (discriminator 2)\n \trsbsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:273 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:273 (discriminator 1)\n \tmovwcc\tr6, #6651\t@ 0x19fb\n \taddsmi\tr6, sl, #499712\t@ 0x7a000\n \tbvs\tffec0800 <__bss_end__@@Base+0xffeae558>\n-/build/1st/ssocr-2.23.0/imgproc.c:287\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:287\n \taddsmi\tr6, sl, #8060928\t@ 0x7b0000\n \tbvs\tec050c <__bss_end__@@Base+0xeae264>\n-/build/1st/ssocr-2.23.0/imgproc.c:288\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:288\n \tblvs\tffe238e0 <__bss_end__@@Base+0xffe11638>\n \tstc2l\t7, cr15, [r6], {255}\t@ 0xff\n \tbvs\tec1114 <__bss_end__@@Base+0xeaee6c>\n-/build/1st/ssocr-2.23.0/imgproc.c:290\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:290\n \tblvs\tffe238ec <__bss_end__@@Base+0xffe11644>\n \tstc2l\t7, cr15, [sl], #1020\t@ 0x3fc\n-/build/1st/ssocr-2.23.0/imgproc.c:268 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:268 (discriminator 2)\n \tmovwcc\tr6, #6715\t@ 0x1a3b\n \tbvs\tea1a00 <__bss_end__@@Base+0xe8f758>\n-/build/1st/ssocr-2.23.0/imgproc.c:268 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:268 (discriminator 1)\n \taddsmi\tr6, sl, #125952\t@ 0x1ec00\n \tldmibvs\tfp!, {r1, r4, r7, r8, r9, fp, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:267 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:267 (discriminator 2)\n \tmvnsvs\tr3, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:267 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:267 (discriminator 1)\n \tblvs\tfeee390c <__bss_end__@@Base+0xfeed1664>\n \tblle\tfe219b90 <__bss_end__@@Base+0xfe2078e8>\n-/build/1st/ssocr-2.23.0/imgproc.c:296\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:296\n \t\t\t@ instruction: 0xf7f76b38\n \tblvs\tfff05020 <__bss_end__@@Base+0xffef2d78>\n-/build/1st/ssocr-2.23.0/imgproc.c:242\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:242\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:300\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:300\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldclvs\t8, cr6, [sl, #-68]!\t@ 0xffffffbc\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tsvc\t0x0090f7f7\n \tsmmlacc\tr8, r8, r6, r4\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tstrdeq\tr8, [r0], -lr\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, lr, lsr #27\n remove_isolated():\n-/build/1st/ssocr-2.23.0/imgproc.c:304\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:304\n \taddlt\tfp, r6, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tbleq\t44784 <__bss_end__@@Base+0x324dc>\n \tbmi\t421450 <__bss_end__@@Base+0x40f1a8>\n \tblmi\t41a358 <__bss_end__@@Base+0x4080b0>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f617b\n \tandcs\tr0, r1, #0, 6\n-/build/1st/ssocr-2.23.0/imgproc.c:305\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:305\n \tldc\t8, cr6, [r7, #740]\t@ 0x2e4\n \tldmvs\tr8!, {r8, r9, fp}^\n \t\t\t@ instruction: 0xff24f7ff\n \tstmdbmi\tsl, {r0, r1, r9, sl, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:304\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:304\n \tbmi\t21a374 <__bss_end__@@Base+0x2080cc>\n-/build/1st/ssocr-2.23.0/imgproc.c:306\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:306\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror r9\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f7d001\n \tldrmi\tlr, [r8], -r4, ror #30\n \tssatmi\tr3, #30, r8, lsl #14\n \tsvclt\t0x0000bd80\n \tandeq\tr8, r0, r4, ror sp\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, r4, asr sp\n gray_stretch():\n-/build/1st/ssocr-2.23.0/imgproc.c:312\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:312\n \t\t\t@ instruction: 0xb096b5b0\n \tcmnvs\tr8, r4, lsl #30\n \tbleq\tc47e0 <__bss_end__@@Base+0xb2538>\n \tblne\t447e4 <__bss_end__@@Base+0x3253c>\n \tblmi\tfe8216b0 <__bss_end__@@Base+0xfe80f408>\n \tstmibmi\tr0!, {r0, r1, r3, r4, r5, r6, sl, lr}\n \tbmi\tfe81a3b8 <__bss_end__@@Base+0xfe808110>\n \tldmdavs\tr2, {r1, r3, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f647a\n \tlfm\tf0, 4, [r7]\n-/build/1st/ssocr-2.23.0/imgproc.c:321\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:321\n \tvldr\td6, [r7, #8]\n \tvmov.f64\td7, #64\t@ 0x3e000000 0.125\n \tvsqrt.f64\td22, d7\n \tblle\t587a30 <__bss_end__@@Base+0x575788>\n-/build/1st/ssocr-2.23.0/imgproc.c:322\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:322\n \tldmpl\tfp, {r0, r3, r4, r7, r9, fp, lr}\n \tldmib\tr7, {r3, r4, fp, sp, lr}^\n \tstmib\tsp, {r8, r9, sp}^\n \tldmib\tr7, {r1, r8, r9, sp}^\n \tstmib\tsp, {r1, r8, r9, sp}^\n \tblmi\tfe551e08 <__bss_end__@@Base+0xfe53fb60>\n \t\t\t@ instruction: 0x461a447b\n \tldrbtmi\tr4, [fp], #-2964\t@ 0xfffff46c\n \t\t\t@ instruction: 0xf7f74619\n \trsbcs\tlr, r3, r2, lsl pc\n-/build/1st/ssocr-2.23.0/imgproc.c:324\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:324\n \tsvc\t0x007af7f7\n-/build/1st/ssocr-2.23.0/imgproc.c:328\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:328\n \tblvc\tc487c <__bss_end__@@Base+0xb25d4>\n \tblvc\tff044cf8 <__bss_end__@@Base+0xff032a50>\n \tblx\t444dec <__bss_end__@@Base+0x432b44>\n \tbmi\tfe2ff270 <__bss_end__@@Base+0xfe2ecfc8>\n-/build/1st/ssocr-2.23.0/imgproc.c:329\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:329\n \tldmdavs\tr8, {r0, r1, r3, r4, r7, fp, ip, lr}\n \tmovwcs\tlr, #10711\t@ 0x29d7\n \tmovwcs\tlr, #2509\t@ 0x9cd\n \tldrbtmi\tr4, [fp], #-2954\t@ 0xfffff476\n \tblmi\tfe29aaa8 <__bss_end__@@Base+0xfe288800>\n \t\t\t@ instruction: 0x4619447b\n \tmrc\t7, 7, APSR_nzcv, cr8, cr7, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:330\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:330\n \t\t\t@ instruction: 0xf7f72063\n \tldc\t15, cr14, [r7, #392]\t@ 0x188\n-/build/1st/ssocr-2.23.0/imgproc.c:332\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:332\n \tvldr\td7, [pc]\t@ 9254 \n \tvmov.u16\tr6, d4[3]\n \tvsqrt.f64\td23, d6\n \tblle\t507aa0 <__bss_end__@@Base+0x4f57f8>\n-/build/1st/ssocr-2.23.0/imgproc.c:333\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:333\n \tldmpl\tfp, {r0, r2, r3, r4, r5, r6, r9, fp, lr}\n \tmvnscs\tr6, #24, 16\t@ 0x180000\n \tldmib\tr7, {r1, r8, r9, ip, pc}^\n \tstmib\tsp, {r8, r9, sp}^\n \tblmi\t1f91e74 <__bss_end__@@Base+0x1f7fbcc>\n \t\t\t@ instruction: 0x461a447b\n \tldrbtmi\tr4, [fp], #-2941\t@ 0xfffff483\n \t\t\t@ instruction: 0xf7f74619\n \tldrdcs\tlr, [r3], #-236\t@ 0xffffff14\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:335\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:335\n \tsvc\t0x0044f7f7\n-/build/1st/ssocr-2.23.0/imgproc.c:339\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:339\n \tmrc\t7, 6, APSR_nzcv, cr0, cr7, {7}\n \tldmdbvs\tfp!, {r3, r4, r5, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:342\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:342\n \t\t\t@ instruction: 0x4618681b\n \tsvc\t0x0006f7f7\n-/build/1st/ssocr-2.23.0/imgproc.c:343\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:343\n \tmrc\t7, 7, APSR_nzcv, cr8, cr7, {7}\n \t\t\t@ instruction: 0xf7f76278\n-/build/1st/ssocr-2.23.0/imgproc.c:344\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:344\n \tadcsvs\tlr, r8, #0, 28\n-/build/1st/ssocr-2.23.0/imgproc.c:345\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:345\n \tmcr\t7, 7, pc, cr6, cr7, {7}\t@ \n \tmovwcs\tr6, #760\t@ 0x2f8\n-/build/1st/ssocr-2.23.0/imgproc.c:348\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:348\n \tstrht\tr6, [sp], fp\n-/build/1st/ssocr-2.23.0/imgproc.c:349\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:349\n \tmvnsvs\tr2, r0, lsl #6\n \t\t\t@ instruction: 0xf107e0a2\n-/build/1st/ssocr-2.23.0/imgproc.c:350\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:350\n \t\t\t@ instruction: 0x461a0334\n \tldmibvs\tr8!, {r0, r3, r4, r5, r6, r7, r8, fp, sp, lr}\n \tmrc\t7, 7, APSR_nzcv, cr12, cr7, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:351\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:351\n \tteqeq\tr4, #-1073741823\t@ 0xc0000001\t@ \n \t\t\t@ instruction: 0x46186939\n \tblx\t1c52d4 <__bss_end__@@Base+0x1b302c>\n \tbvs\tffe21fb4 <__bss_end__@@Base+0xffe0fd0c>\n-/build/1st/ssocr-2.23.0/imgproc.c:352\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:352\n \tmcr\t7, 7, pc, cr6, cr7, {7}\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:353\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:353\n \tvmov.16\td7[0], r6\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td7, [r7, #924]\t@ 0x39c\n \tvmov.f64\td6, #66\t@ 0x3e100000 0.1406250\n \tvsqrt.f64\td22, d7\n \tblle\t1c7b30 <__bss_end__@@Base+0x1b5888>\n-/build/1st/ssocr-2.23.0/imgproc.c:354\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:354\n \tandcs\tr6, r0, #125952\t@ 0x1ec00\n \tandcs\tr2, r0, r0, lsl #2\n \tsvc\t0x0010f7f7\n \tblvs\tf014c4 <__bss_end__@@Base+0xeef21c>\n-/build/1st/ssocr-2.23.0/imgproc.c:355\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:355\n \tbcc\tfe444b20 <__bss_end__@@Base+0xfe432878>\n \tblvc\tffa04de8 <__bss_end__@@Base+0xff9f2b40>\n \tblvs\t44968 <__bss_end__@@Base+0x326c0>\n \tblvs\tff204de0 <__bss_end__@@Base+0xff1f2b38>\n \tblx\t444ed8 <__bss_end__@@Base+0x432c30>\n \tblvs\t1eff330 <__bss_end__@@Base+0x1eed088>\n-/build/1st/ssocr-2.23.0/imgproc.c:356\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:356\n \tldrshcs\tr2, [pc, #47]\t@ 934b \n \t\t\t@ instruction: 0xf7f720ff\n \tldrsh\tlr, [lr], #-238\t@ 0xffffff12\n-/build/1st/ssocr-2.23.0/imgproc.c:358\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:358\n \tvmov.16\td7[0], r6\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td6, [r7, #924]\t@ 0x39c\n \tvadd.f64\td7, d6, d2\n \tvldr\td7, [pc, #284]\t@ 9454 \n \tvnmul.f64\td6, d7, d3\n \tvldr\td5, [r7, #24]\n@@ -9774,77 +9774,77 @@\n \tvadd.f64\td7, d6, d2\n \t\t\t@ instruction: 0xee856b47\n \tvmov.f64\td23, #214\t@ 0xbeb00000 -0.3437500\n \trscscs\tr7, pc, #203776\t@ 0x31c00\n \tmufs\tf2, f7, f0\n \t\t\t@ instruction: 0xf0010a90\n \t\t\t@ instruction: 0x4604fbf3\n-/build/1st/ssocr-2.23.0/imgproc.c:359\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:359\n \tvmov.16\td7[0], r6\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td6, [r7, #924]\t@ 0x39c\n \tvadd.f64\td7, d6, d2\n \tvldr\td7, [pc, #284]\t@ 9490 \n \tvmov.16\td7[2], r6\n \tvldr\td5, [r7, #24]\n \tvldr\td6, [r7]\n \tvadd.f64\td7, d6, d2\n \t\t\t@ instruction: 0xee856b47\n \tvmov.f64\td23, #214\t@ 0xbeb00000 -0.3437500\n-/build/1st/ssocr-2.23.0/imgproc.c:358\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:358\n \trscscs\tr7, pc, #203776\t@ 0x31c00\n \tmufs\tf2, f7, f0\n \t\t\t@ instruction: 0xf0010a90\n \t\t\t@ instruction: 0x4605fbd5\n-/build/1st/ssocr-2.23.0/imgproc.c:360\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:360\n \tvmov.16\td7[0], r6\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td6, [r7, #924]\t@ 0x39c\n \tvadd.f64\td7, d6, d2\n \tvldr\td7, [pc, #284]\t@ 94cc \n \tvmul.f64\td6, d7, d21\n \tvldr\td5, [r7, #24]\n \tvldr\td6, [r7]\n \tvadd.f64\td7, d6, d2\n \t\t\t@ instruction: 0xee856b47\n \tvmov.f64\td23, #214\t@ 0xbeb00000 -0.3437500\n-/build/1st/ssocr-2.23.0/imgproc.c:358\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:358\n \trscscs\tr7, pc, #203776\t@ 0x31c00\n \tmufs\tf2, f7, f0\n \t\t\t@ instruction: 0xf0010a90\n \t\t\t@ instruction: 0x4602fbb7\n \t\t\t@ instruction: 0x46296b7b\n \t\t\t@ instruction: 0xf7f74620\n \tandcs\tlr, r0, #2528\t@ 0x9e0\n-/build/1st/ssocr-2.23.0/imgproc.c:363 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:363 (discriminator 2)\n \tldmibvs\tr8!, {r0, r3, r4, r5, r6, r7, r8, fp, sp, lr}\n \tldcl\t7, cr15, [r2, #988]\t@ 0x3dc\n-/build/1st/ssocr-2.23.0/imgproc.c:364 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:364 (discriminator 2)\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \tldmibvs\tfp!, {r3, r4, r6, r9, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:349 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:349 (discriminator 2)\n \tmvnsvs\tr3, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:349 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:349 (discriminator 1)\n \tbvs\t1ee3be8 <__bss_end__@@Base+0x1ed1940>\n \t\t\t@ instruction: 0xf6ff429a\n \tldmibvs\tfp!, {r3, r4, r6, r8, r9, sl, fp, sp, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:348 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:348 (discriminator 2)\n \t\t\t@ instruction: 0x61bb3301\n-/build/1st/ssocr-2.23.0/imgproc.c:348 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:348 (discriminator 1)\n \tbvs\tfeee3af8 <__bss_end__@@Base+0xfeed1850>\n \t\t\t@ instruction: 0xf6ff429a\n \tbvs\te3514c <__bss_end__@@Base+0xe22ea4>\n-/build/1st/ssocr-2.23.0/imgproc.c:369\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:369\n \tmcr\t7, 2, pc, cr4, cr7, {7}\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:372\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:372\n \tldmdbmi\tr5, {r0, r1, r3, r4, r5, r6, r7, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:312\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:312\n \tbmi\t31a608 <__bss_end__@@Base+0x308360>\n-/build/1st/ssocr-2.23.0/imgproc.c:373\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:373\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror ip\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f7d001\n \t\t\t@ instruction: 0x4618ee1a\n \tldrtmi\tr3, [sp], r8, asr #14\n \tsvclt\t0x0000bdb0\n@@ -9859,52 +9859,52 @@\n \tandeq\tr5, r0, sl, ror #10\n \t\t\t@ instruction: 0x000054be\n \tandeq\tr5, r0, r8, ror #10\n \tandeq\tr5, r0, r4, lsl #9\n \tandeq\tr5, r0, sl, asr r5\n \tandeq\tr8, r0, r0, asr #21\n dynamic_threshold():\n-/build/1st/ssocr-2.23.0/imgproc.c:380\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:380\n \taddslt\tfp, r8, r0, lsl #11\n \tcmnvs\tr8, r2, lsl #30\n \tbleq\tc4aa0 <__bss_end__@@Base+0xb27f8>\n \trsbsvs\tr6, sl, r9, lsr r1\n \tbmi\t11a1578 <__bss_end__@@Base+0x118f2d0>\n \tblmi\t119a678 <__bss_end__@@Base+0x11883d0>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f657b\n \t\t\t@ instruction: 0xf7f70300\n-/build/1st/ssocr-2.23.0/imgproc.c:390\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:390\n \trsbsvs\tlr, r8, #200, 26\t@ 0x3200\n-/build/1st/ssocr-2.23.0/imgproc.c:393\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:393\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7edfe\n-/build/1st/ssocr-2.23.0/imgproc.c:394\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:394\n \tadcsvs\tlr, r8, #240, 26\t@ 0x3c00\n-/build/1st/ssocr-2.23.0/imgproc.c:395\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:395\n \tldcl\t7, cr15, [r6], #988\t@ 0x3dc\n \t\t\t@ instruction: 0xf7f762f8\n-/build/1st/ssocr-2.23.0/imgproc.c:396\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:396\n \tteqvs\tr8, #14208\t@ 0x3780\n-/build/1st/ssocr-2.23.0/imgproc.c:399\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:399\n \tmvnsvs\tr2, r0, lsl #6\n \tmovwcs\tlr, #81\t@ 0x51\n-/build/1st/ssocr-2.23.0/imgproc.c:400\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:400\n \tsub\tr6, r7, fp, lsr r2\n-/build/1st/ssocr-2.23.0/imgproc.c:401\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:401\n \tmovteq\tpc, #16647\t@ 0x4107\t@ \n \tbvs\te5ad38 <__bss_end__@@Base+0xe48a90>\n \t\t\t@ instruction: 0xf7f769f8\n \t\t\t@ instruction: 0xf107edf4\n-/build/1st/ssocr-2.23.0/imgproc.c:402\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:402\n \tldmdbvs\tr9!, {r2, r6, r8, r9}\n \t\t\t@ instruction: 0xf0014618\n \tcmnvs\tr8, #16580608\t@ 0xfd0000\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:403\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:403\n \tblvc\tc4b44 <__bss_end__@@Base+0xb289c>\n \tblpl\tb44b68 <__bss_end__@@Base+0xb328c0>\n \tblvs\t184f0c <__bss_end__@@Base+0x172c64>\n \tsvceq\t0x00da687b\n \tsubsne\tr4, fp, r3, lsl r4\n \t\t\t@ instruction: 0x461a425b\n \tldmne\tr1, {r0, r1, r3, r4, r5, r6, r7, r8, fp, sp, lr}^\n@@ -9915,234 +9915,234 @@\n \tmovwls\tr6, #6203\t@ 0x183b\n \tmovwls\tr6, #2171\t@ 0x87b\n \t\t\t@ instruction: 0x460a4613\n \t\t\t@ instruction: 0xeeb06939\n \tldmdbvs\tr8!, {r1, r2, r6, r8, r9, fp}^\n \t\t\t@ instruction: 0xf976f000\n \tbleq\t3c4b48 <__bss_end__@@Base+0x3b28a0>\n-/build/1st/ssocr-2.23.0/imgproc.c:404\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:404\n \tbleq\t3c4b8c <__bss_end__@@Base+0x3b28e4>\n \t\t\t@ instruction: 0xf7ff6b78\n \t\t\t@ instruction: 0x4603faff\n \tandle\tr2, r5, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:405\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:405\n \tldmibvs\tr9!, {r1, r3, r4, r5, r9, fp, sp, lr}^\n \t\t\t@ instruction: 0xf7ff6b38\n \tand\tpc, r4, r3, lsr #21\n-/build/1st/ssocr-2.23.0/imgproc.c:407\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:407\n \tldmibvs\tr9!, {r1, r3, r4, r5, r9, fp, sp, lr}^\n \t\t\t@ instruction: 0xf7ff6b38\n \tbvs\tf08070 <__bss_end__@@Base+0xef5dc8>\n-/build/1st/ssocr-2.23.0/imgproc.c:400 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:400 (discriminator 2)\n \teorsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:400 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:400 (discriminator 1)\n \tbvs\tfeee3e44 <__bss_end__@@Base+0xfeed1b9c>\n \tblle\tfecd9fc8 <__bss_end__@@Base+0xfecc7d20>\n-/build/1st/ssocr-2.23.0/imgproc.c:399 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:399 (discriminator 2)\n \tmovwcc\tr6, #6651\t@ 0x19fb\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:399 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:399 (discriminator 1)\n \taddsmi\tr6, sl, #1028096\t@ 0xfb000\n \tbvs\t1e40414 <__bss_end__@@Base+0x1e2e16c>\n-/build/1st/ssocr-2.23.0/imgproc.c:413\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:413\n \tldc\t7, cr15, [r8, #988]\t@ 0x3dc\n-/build/1st/ssocr-2.23.0/imgproc.c:416\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:416\n \tstmdbmi\tsp, {r0, r1, r3, r4, r5, r8, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:380\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:380\n \tbmi\t2da760 <__bss_end__@@Base+0x2c84b8>\n-/build/1st/ssocr-2.23.0/imgproc.c:417\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:417\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror sp\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f7d001\n \tldrmi\tlr, [r8], -lr, ror #26\n \tssatmi\tr3, #30, r8, asr #14\n \tsvclt\t0x0000bd80\n \tandhi\tpc, r0, pc, lsr #7\n \tandeq\tr0, r0, r0\n \tsubsmi\tr0, r9, r0\n \tandeq\tr8, r0, r4, asr sl\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, r8, ror #18\n make_mono():\n-/build/1st/ssocr-2.23.0/imgproc.c:421\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:421\n \taddslt\tfp, r0, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tbleq\t44bd8 <__bss_end__@@Base+0x32930>\n \tbmi\tc618a4 <__bss_end__@@Base+0xc4f5fc>\n \tblmi\tc5a7ac <__bss_end__@@Base+0xc48504>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f63fb\n \t\t\t@ instruction: 0xf7f70300\n-/build/1st/ssocr-2.23.0/imgproc.c:430\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:430\n \t\t\t@ instruction: 0x61b8ed2e\n-/build/1st/ssocr-2.23.0/imgproc.c:433\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:433\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r7, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7ed64\n-/build/1st/ssocr-2.23.0/imgproc.c:434\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:434\n \tmvnsvs\tlr, r6, asr sp\n-/build/1st/ssocr-2.23.0/imgproc.c:435\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:435\n \tmrrc\t7, 15, pc, ip, cr7\t@ \n \t\t\t@ instruction: 0xf7f76238\n-/build/1st/ssocr-2.23.0/imgproc.c:436\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:436\n \trsbsvs\tlr, r8, #68, 26\t@ 0x1100\n-/build/1st/ssocr-2.23.0/imgproc.c:439\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:439\n \tteqvs\tfp, r0, lsl #6\n \tmovwcs\tlr, #45\t@ 0x2d\n-/build/1st/ssocr-2.23.0/imgproc.c:440\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:440\n \teor\tr6, r3, fp, ror r1\n-/build/1st/ssocr-2.23.0/imgproc.c:441\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:441\n \tmsreq\tCPSR_fs, #-1073741823\t@ 0xc0000001\n \tldmdbvs\tr9!, {r1, r3, r4, r9, sl, lr}^\n \t\t\t@ instruction: 0xf7f76938\n \t\t\t@ instruction: 0xf107ed5a\n-/build/1st/ssocr-2.23.0/imgproc.c:442\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:442\n \tldmvs\tr9!, {r2, r3, r5, r8, r9}\n \t\t\t@ instruction: 0xf0014618\n \tadcsvs\tpc, r8, #6488064\t@ 0x630000\n-/build/1st/ssocr-2.23.0/imgproc.c:443\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:443\n \tbleq\t44c78 <__bss_end__@@Base+0x329d0>\n \t\t\t@ instruction: 0xf7ff6ab8\n \tstrmi\tpc, [r3], -r9, lsl #21\n \tandle\tr2, r5, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:444\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:444\n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7ff6a78\n \tand\tpc, r4, sp, lsr #20\n-/build/1st/ssocr-2.23.0/imgproc.c:446\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:446\n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7ff6a78\n \tldmdbvs\tfp!, {r0, r4, r6, r9, fp, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:440 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:440 (discriminator 2)\n \tcmnvs\tfp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:440 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:440 (discriminator 1)\n \tldmibvs\tfp!, {r1, r3, r4, r5, r6, r8, fp, sp, lr}^\n \tblle\tff5da0b4 <__bss_end__@@Base+0xff5c7e0c>\n-/build/1st/ssocr-2.23.0/imgproc.c:439 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:439 (discriminator 2)\n \tmovwcc\tr6, #6459\t@ 0x193b\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:439 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:439 (discriminator 1)\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tldmibvs\tr8!, {r0, r2, r3, r6, r7, r8, r9, fp, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:452\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:452\n \tstc\t7, cr15, [r2, #-988]!\t@ 0xfffffc24\n-/build/1st/ssocr-2.23.0/imgproc.c:455\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:455\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r6, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:421\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:421\n \tbmi\t21a84c <__bss_end__@@Base+0x2085a4>\n-/build/1st/ssocr-2.23.0/imgproc.c:456\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:456\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-186\t@ 0xffffff46\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f7d001\n \t\t\t@ instruction: 0x4618ecf8\n \tldrtmi\tr3, [sp], r0, asr #14\n \tsvclt\t0x0000bd80\n \tandeq\tr8, r0, r0, lsr #18\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, ip, ror r8\n adapt_threshold():\n-/build/1st/ssocr-2.23.0/imgproc.c:461\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:461\n \tumullslt\tfp, r1, r0, r5\n \trsbsvs\tsl, r8, #2, 30\n \tbleq\t1c4cb8 <__bss_end__@@Base+0x1b2a10>\n \tcmnvs\tsl, r9, lsr r2\n \tldfvss\tf6, [fp], #236\t@ 0xec\n \tldclvs\t0, cr6, [fp], #1004\t@ 0x3ec\n \tldcvs\t0, cr6, [fp, #-748]!\t@ 0xfffffd14\n \tmcrrmi\t0, 7, r6, pc, cr11\n \tbmi\t13da8a4 <__bss_end__@@Base+0x13c85fc>\n \tblmi\t13da8a0 <__bss_end__@@Base+0x13c85f8>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f637b\n \tldmib\tr7, {r8, r9}^\n-/build/1st/ssocr-2.23.0/imgproc.c:462\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:462\n \tstmib\tr7, {r1, r2, r8, r9, sp}^\n \tldmdavs\tfp!, {r1, r3, r8, r9, sp}^\n-/build/1st/ssocr-2.23.0/imgproc.c:463\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:463\n \tmovweq\tpc, #4099\t@ 0x1003\t@ \n \tcmple\tlr, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:464\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:464\n \t\t\t@ instruction: 0xf003687b\n \tblcs\ta4dc \n \tblmi\t11bd700 <__bss_end__@@Base+0x11ab458>\n-/build/1st/ssocr-2.23.0/imgproc.c:465\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:465\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tmovwcs\tlr, #43479\t@ 0xa9d7\n \tldrbtmi\tr4, [r9], #-2372\t@ 0xfffff6bc\n \tstc\t7, cr15, [r4], #988\t@ 0x3dc\n-/build/1st/ssocr-2.23.0/imgproc.c:466\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:466\n \tblvc\t1c4d50 <__bss_end__@@Base+0x1b2aa8>\n \tblpl\tf04d74 <__bss_end__@@Base+0xef2acc>\n \tblvs\t185118 <__bss_end__@@Base+0x172e70>\n \tmovwls\tr6, #6331\t@ 0x18bb\n \tmovwls\tr6, #2299\t@ 0x8fb\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r8, fp, sp, lr}^\n \t\t\t@ instruction: 0xeeb06a39\n \tbvs\t1e0c428 <__bss_end__@@Base+0x1dfa180>\n \t\t\t@ instruction: 0xf880f000\n \tbleq\t2c4d34 <__bss_end__@@Base+0x2b2a8c>\n-/build/1st/ssocr-2.23.0/imgproc.c:467\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:467\n \t\t\t@ instruction: 0xf003687b\n \tblcs\ta520 \n \tblmi\td7d744 <__bss_end__@@Base+0xd6b49c>\n-/build/1st/ssocr-2.23.0/imgproc.c:468\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:468\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tmovwcs\tlr, #43479\t@ 0xa9d7\n \tldrbtmi\tr4, [r9], #-2356\t@ 0xfffff6cc\n \tstc\t7, cr15, [r2], {247}\t@ 0xf7\n-/build/1st/ssocr-2.23.0/imgproc.c:469\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:469\n \t\t\t@ instruction: 0xf003687b\n \tblcs\ta344 \n \tldmdavs\tfp!, {r0, r3, r5, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:470\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:470\n \torreq\tpc, r0, #3\n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:471\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:471\n \tstmiapl\tr3!, {r0, r1, r3, r5, r8, r9, fp, lr}^\n \tldmib\tr7, {r3, r4, fp, sp, lr}^\n \tstmdbmi\tip!, {r1, r3, r8, r9, sp}\n \t\t\t@ instruction: 0xf7f74479\n \tldmvs\tfp!, {r4, r5, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:472\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:472\n \tldmvs\tfp!, {r0, r8, r9, ip, pc}^\n \tldmdbvs\tfp!, {r8, r9, ip, pc}\n \tbvs\te63d50 <__bss_end__@@Base+0xe51aa8>\n \tbleq\t2c4dc8 <__bss_end__@@Base+0x2b2b20>\n \t\t\t@ instruction: 0xf0006a78\n \tvstr.16\ts30, [r7, #110]\t@ 0x6e\n \tldmdavs\tfp!, {r1, r3, r8, r9, fp}^\n-/build/1st/ssocr-2.23.0/imgproc.c:473\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:473\n \torreq\tpc, r0, #3\n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:474\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:474\n \tstmiapl\tr3!, {r0, r2, r3, r4, r8, r9, fp, lr}^\n \tldmib\tr7, {r3, r4, fp, sp, lr}^\n \tldmdbmi\tpc, {r1, r3, r8, r9, sp}\t@ \n \t\t\t@ instruction: 0xf7f74479\n \tldmdavs\tfp!, {r2, r4, r6, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:477\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:477\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \ttstle\tr4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:477 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:477 (discriminator 1)\n \t\t\t@ instruction: 0xf003687b\n \tblcs\ta5a4 \n \tblmi\t53d7c8 <__bss_end__@@Base+0x52b520>\n-/build/1st/ssocr-2.23.0/imgproc.c:478\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:478\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tmovwcs\tlr, #43479\t@ 0xa9d7\n \tldrbtmi\tr4, [r9], #-2326\t@ 0xfffff6ea\n \tmcrr\t7, 15, pc, r0, cr7\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:480\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:480\n \tmovwcs\tlr, #43479\t@ 0xa9d7\n \tblcs\t6048cc <__bss_end__@@Base+0x5f2624>\n-/build/1st/ssocr-2.23.0/imgproc.c:461\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:461\n \tldrbtmi\tr4, [sl], #-2579\t@ 0xfffff5ed\n-/build/1st/ssocr-2.23.0/imgproc.c:481\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:481\n \tldmpl\tr3, {r0, r1, r3, r8, r9, fp, lr}^\n \tblvs\t1ee3834 <__bss_end__@@Base+0x1ed158c>\n \t\t\t@ instruction: 0xf04f405a\n \tandle\tr0, r1, r0, lsl #6\n \tmcrr\t7, 15, pc, r8, cr7\t@ \n \tbleq\t120529c <__bss_end__@@Base+0x11f2ff4>\n \t\t\t@ instruction: 0x46bd373c\n@@ -10156,151 +10156,151 @@\n \tandeq\tr5, r0, r6, lsl r1\n \tstrdeq\tr5, [r0], -r6\n \tldrdeq\tr5, [r0], -r8\n \tmuleq\tr0, r8, r0\n \tmuleq\tr0, lr, r0\n \tandeq\tr8, r0, lr, lsl r7\n get_threshold():\n-/build/1st/ssocr-2.23.0/imgproc.c:487\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:487\n \taddslt\tfp, r8, r0, lsl #11\n \tmvnsvs\tsl, r0, lsl #30\n \tbleq\t144e3c <__bss_end__@@Base+0x132b94>\n \tldrhtvs\tr6, [sl], #25\n \tmrcvs\t0, 5, r6, cr11, cr11, {5}\n \tmrcvs\t0, 7, r6, cr11, cr11, {3}\n \tbmi\t1a6191c <__bss_end__@@Base+0x1a4f674>\n \tblmi\t1a5aa1c <__bss_end__@@Base+0x1a48774>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f65fb\n \tcmnge\tr3, #0, 6\n-/build/1st/ssocr-2.23.0/imgproc.c:493\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:493\n \tmovwcs\tlr, #2515\t@ 0x9d3\n \tmovwcs\tlr, #59847\t@ 0xe9c7\n \tandeq\tpc, r0, #79\t@ 0x4f\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \ttstcs\tr0, #3260416\t@ 0x31c000\n-/build/1st/ssocr-2.23.0/imgproc.c:496\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:496\n \tbl\tffac7834 <__bss_end__@@Base+0xffab558c>\n \tldmibvs\tfp!, {r3, r4, r5, r7, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:499\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:499\n \t\t\t@ instruction: 0x4618681b\n \tstc\t7, cr15, [r0], #-988\t@ 0xfffffc24\n-/build/1st/ssocr-2.23.0/imgproc.c:500\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:500\n \tldc\t7, cr15, [r2], {247}\t@ 0xf7\n \t\t\t@ instruction: 0xf7f762f8\n-/build/1st/ssocr-2.23.0/imgproc.c:501\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:501\n \tteqvs\tr8, #26624\t@ 0x6800\n-/build/1st/ssocr-2.23.0/imgproc.c:504\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:504\n \t\t\t@ instruction: 0xf1b3687b\n \tstrdle\tr3, [r1, -pc]\n-/build/1st/ssocr-2.23.0/imgproc.c:504 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:504 (discriminator 1)\n \trsbsvs\tr6, fp, fp, lsr fp\n-/build/1st/ssocr-2.23.0/imgproc.c:505\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:505\n \t\t\t@ instruction: 0xf1b3683b\n \tstrdle\tr3, [r1, -pc]\n-/build/1st/ssocr-2.23.0/imgproc.c:505 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:505 (discriminator 1)\n \teorsvs\tr6, fp, fp, lsr fp\n-/build/1st/ssocr-2.23.0/imgproc.c:508\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:508\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, fp, sp, lr}^\n \tblvs\te9a8dc <__bss_end__@@Base+0xe88634>\n \tble\tda2fc <__bss_end__@@Base+0xc8054>\n-/build/1st/ssocr-2.23.0/imgproc.c:508 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:508 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r8, r9, fp, sp, lr}^\n \tldrsbtvs\tr1, [fp], #163\t@ 0xa3\n-/build/1st/ssocr-2.23.0/imgproc.c:509\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:509\n \tldmdavs\tfp!, {r1, r3, r4, r5, r7, fp, sp, lr}\n \tbvs\tffe9a8f0 <__bss_end__@@Base+0xffe88648>\n \tble\tda310 <__bss_end__@@Base+0xc8068>\n-/build/1st/ssocr-2.23.0/imgproc.c:509 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:509 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, r9, fp, sp, lr}\n \tldrsbtvs\tr1, [fp], r3\n-/build/1st/ssocr-2.23.0/imgproc.c:510\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:510\n \tblcs\t23ca0 <__bss_end__@@Base+0x119f8>\n \tmovwcs\tsp, #2561\t@ 0xa01\n-/build/1st/ssocr-2.23.0/imgproc.c:510 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:510 (discriminator 1)\n \tldmvs\tfp!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:511\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:511\n \tble\t544c0 <__bss_end__@@Base+0x42218>\n-/build/1st/ssocr-2.23.0/imgproc.c:511 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:511 (discriminator 1)\n \tadcsvs\tr2, fp, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:514\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:514\n \teorsvs\tr2, fp, #0, 6\n \tmovwcs\tlr, #72\t@ 0x48\n-/build/1st/ssocr-2.23.0/imgproc.c:515\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:515\n \teors\tr6, sl, fp, ror r2\n-/build/1st/ssocr-2.23.0/imgproc.c:516\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:516\n \tbvs\tee3cbc <__bss_end__@@Base+0xed1a14>\n \tldmvs\tsl!, {r4, r6, r7, fp, ip}\n \tldrmi\tr6, [r3], #-2683\t@ 0xfffff585\n \tsubeq\tpc, ip, #-1073741823\t@ 0xc0000001\n \t\t\t@ instruction: 0xf7f74619\n \t\t\t@ instruction: 0xf107ebec\n-/build/1st/ssocr-2.23.0/imgproc.c:517\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:517\n \tldmibvs\tr9!, {r2, r3, r6, r8, r9}\n \t\t\t@ instruction: 0xf0004618\n \tcmnvs\tr8, #3920\t@ 0xf50\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:518\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:518\n \tvmov.16\td7[1], r6\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td7, [r7, #924]\t@ 0x39c\n \tvmov.f64\td6, #78\t@ 0x3e700000 0.2343750\n \tvsqrt.f64\td22, d7\n \tvstrle\ts30, [r6, #-64]\t@ 0xffffffc0\n-/build/1st/ssocr-2.23.0/imgproc.c:518 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:518 (discriminator 1)\n \tvmov.16\td7[1], r6\n \t\t\t@ instruction: 0xeeb83a90\n \tvstr\td7, [r7, #924]\t@ 0x39c\n \tblvs\t1ee8554 <__bss_end__@@Base+0x1ed62ac>\n-/build/1st/ssocr-2.23.0/imgproc.c:519\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:519\n \tbcc\tfe44513c <__bss_end__@@Base+0xfe432e94>\n \tblvc\tffa05404 <__bss_end__@@Base+0xff9f315c>\n \tblvs\t444f84 <__bss_end__@@Base+0x432cdc>\n \tblvs\tff2053fc <__bss_end__@@Base+0xff1f3154>\n \tblx\t4454f4 <__bss_end__@@Base+0x43324c>\n \tblvs\t1efed4c <__bss_end__@@Base+0x1eecaa4>\n-/build/1st/ssocr-2.23.0/imgproc.c:519 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:519 (discriminator 1)\n \tbcc\tfe445154 <__bss_end__@@Base+0xfe432eac>\n \tblvc\tffa0541c <__bss_end__@@Base+0xff9f3174>\n \tblvc\t444f5c <__bss_end__@@Base+0x432cb4>\n-/build/1st/ssocr-2.23.0/imgproc.c:515 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:515 (discriminator 2)\n \tmovwcc\tr6, #6779\t@ 0x1a7b\n \tbvs\t1ea2334 <__bss_end__@@Base+0x1e9008c>\n-/build/1st/ssocr-2.23.0/imgproc.c:515 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:515 (discriminator 1)\n \taddsmi\tr6, sl, #3866624\t@ 0x3b0000\n \tbvs\t1ec015c <__bss_end__@@Base+0x1eadeb4>\n-/build/1st/ssocr-2.23.0/imgproc.c:515 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:515 (discriminator 3)\n \taddsmi\tr6, sl, #1028096\t@ 0xfb000\n \tbvs\tf00848 <__bss_end__@@Base+0xeee5a0>\n-/build/1st/ssocr-2.23.0/imgproc.c:514 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:514 (discriminator 2)\n \teorsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:514 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:514 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r9, fp, sp, lr}^\n \tble\tda3cc <__bss_end__@@Base+0xc8124>\n-/build/1st/ssocr-2.23.0/imgproc.c:514 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:514 (discriminator 3)\n \tblvs\tee4250 <__bss_end__@@Base+0xed1fa8>\n \tblle\tfeb9a3d4 <__bss_end__@@Base+0xfeb8812c>\n-/build/1st/ssocr-2.23.0/imgproc.c:524\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:524\n \t\t\t@ instruction: 0xf7f76ab8\n \tvldr\td14, [r7, #616]\t@ 0x268\n-/build/1st/ssocr-2.23.0/imgproc.c:526\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:526\n \tvldr\td6, [r7, #64]\t@ 0x40\n \tvadd.f64\td7, d6, d14\n \tvldr\td6, [r7, #284]\t@ 0x11c\n \tvmul.f64\td7, d6, d4\n \tvldr\td6, [r7, #28]\n \tvadd.f64\td7, d6, d14\n \tvldr\td7, [pc, #28]\t@ 99ac \n \tvmul.f64\td6, d7, d13\n \tvldr\td7, [pc, #24]\t@ 99b0 \n \tvdiv.f64\td6, d7, d13\n \tvmov.f64\td5, #6\t@ 0x40300000 2.750\n \tbmi\t3a86b8 <__bss_end__@@Base+0x396410>\n-/build/1st/ssocr-2.23.0/imgproc.c:487\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:487\n \tblmi\t31ab90 <__bss_end__@@Base+0x3088e8>\n-/build/1st/ssocr-2.23.0/imgproc.c:527\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:527\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-219\t@ 0xffffff25\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f7d001\n \t\t\t@ instruction: 0xeeb0eb58\n \tstrbcc\tr0, [r0, -r7, asr #22]!\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n@@ -10308,203 +10308,203 @@\n \tsubsmi\tr0, r9, r0\n \tandeq\tr0, r0, r0\n \trsbmi\tlr, pc, r0\n \t\t\t@ instruction: 0x000086b0\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, ip, lsr r5\n iterative_threshold():\n-/build/1st/ssocr-2.23.0/imgproc.c:532\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:532\n \tumlallt\tfp, r1, r0, r5\n \tmvnsvs\tsl, r0, lsl #30\n \tbleq\t145008 <__bss_end__@@Base+0x132d60>\n \tldrhtvs\tr6, [sl], #25\n \t\t\t@ instruction: 0xf8d760bb\n \t\t\t@ instruction: 0x607b3090\n \t\t\t@ instruction: 0x3094f8d7\n \tstcmi\t0, cr6, [fp], {59}\t@ 0x3b\n \tbmi\tfe2dabf4 <__bss_end__@@Base+0xfe2c894c>\n \tblmi\tfe2dabf0 <__bss_end__@@Base+0xfe2c8948>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f67fb\n \tldc\t3, cr0, [r7]\n-/build/1st/ssocr-2.23.0/imgproc.c:546\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:546\n \tvldr\td6, [pc, #16]\t@ 9a28 \n \t\t\t@ instruction: 0xee865b7d\n \tvstr\td7, [r7, #20]\n \t\t\t@ instruction: 0xf7f77b16\n-/build/1st/ssocr-2.23.0/imgproc.c:549\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:549\n \tmvnsvs\tlr, #4, 22\t@ 0x1000\n-/build/1st/ssocr-2.23.0/imgproc.c:552\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:552\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r7, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7eb3a\n-/build/1st/ssocr-2.23.0/imgproc.c:553\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:553\n \tldrtvs\tlr, [r8], #-2860\t@ 0xfffff4d4\n-/build/1st/ssocr-2.23.0/imgproc.c:554\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:554\n \tb\tcc7a18 <__bss_end__@@Base+0xcb5770>\n \tldmdavs\tfp!, {r3, r4, r5, r6, sl, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:557\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:557\n \tsvccc\t0x00fff1b3\n \tldfvsp\tf5, [fp], #-4\n-/build/1st/ssocr-2.23.0/imgproc.c:557 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:557 (discriminator 1)\n \tldmdavs\tfp!, {r0, r1, r3, r4, r5, r6, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:558\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:558\n \tsvccc\t0x00fff1b3\n \tldfvsp\tf5, [fp], #-4\n-/build/1st/ssocr-2.23.0/imgproc.c:558 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:558 (discriminator 1)\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:561\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:561\n \tldrmi\tr6, [r3], #-2171\t@ 0xfffff785\n \taddsmi\tr6, sl, #31232\t@ 0x7a00\n \t\t\t@ instruction: 0x6c7ada03\n-/build/1st/ssocr-2.23.0/imgproc.c:561 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:561 (discriminator 1)\n \tbne\tff4e3c54 <__bss_end__@@Base+0xff4d19ac>\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:562\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:562\n \tldrmi\tr6, [r3], #-2107\t@ 0xfffff7c5\n \taddsmi\tr6, sl, #14848\t@ 0x3a00\n \t\t\t@ instruction: 0x6c3ada03\n-/build/1st/ssocr-2.23.0/imgproc.c:562 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:562 (discriminator 1)\n \tbne\tff4e3b68 <__bss_end__@@Base+0xff4d18c0>\n \tldmvs\tfp!, {r0, r1, r3, r4, r5, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:563\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:563\n \tble\t54684 <__bss_end__@@Base+0x423dc>\n-/build/1st/ssocr-2.23.0/imgproc.c:563 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:563 (discriminator 1)\n \trscsvs\tr2, fp, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:564\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:564\n \tblcs\t23d78 <__bss_end__@@Base+0x11ad0>\n \tmovwcs\tsp, #2561\t@ 0xa01\n-/build/1st/ssocr-2.23.0/imgproc.c:564 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:564 (discriminator 1)\n \tldc\t0, cr6, [r7, #748]\t@ 0x2ec\n-/build/1st/ssocr-2.23.0/imgproc.c:568\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:568\n \tvldr\td7, [pc, #88]\t@ 9af0 \n \t\t\t@ instruction: 0xee276b5f\n \tvmov.f64\td23, #214\t@ 0xbeb00000 -0.3437500\n \tvnmla.f64\td7, d23, d7\n \tldrtvs\tr3, [fp], #2704\t@ 0xa90\n-/build/1st/ssocr-2.23.0/imgproc.c:569\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:569\n \ttstcs\tr6, #3522560\t@ 0x35c000\n \ttstcs\tr8, #3260416\t@ 0x31c000\n-/build/1st/ssocr-2.23.0/imgproc.c:570\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:570\n \tcmnvs\tfp, #0, 6\n \trscsvs\tr2, fp, #0, 6\n \t\t\t@ instruction: 0x63bb6afb\n \tteqvs\tfp, #191488\t@ 0x2ec00\n-/build/1st/ssocr-2.23.0/imgproc.c:571\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:571\n \trsbsvs\tr2, fp, #0, 6\n \tmovwcs\tlr, #49\t@ 0x31\n-/build/1st/ssocr-2.23.0/imgproc.c:572\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:572\n \tstrht\tr6, [r3], -fp\n-/build/1st/ssocr-2.23.0/imgproc.c:573\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:573\n \tmsreq\tSPSR_fs, #-1073741823\t@ 0xc0000001\n \tbvs\tfee5b33c <__bss_end__@@Base+0xfee49094>\n \t\t\t@ instruction: 0xf7f76a78\n \t\t\t@ instruction: 0xf107eaf2\n-/build/1st/ssocr-2.23.0/imgproc.c:574\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:574\n \tldmibvs\tr9!, {r2, r3, r5, r6, r8, r9}\n \t\t\t@ instruction: 0xf0004618\n \tldrbtvs\tpc, [r8], #3579\t@ 0xdfb\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:575\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:575\n \tldcvs\t12, cr6, [fp], #1000\t@ 0x3e8\n \tsfmle\tf4, 4, [r7], {154}\t@ 0x9a\n-/build/1st/ssocr-2.23.0/imgproc.c:576\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:576\n \tmovwcc\tr6, #6971\t@ 0x1b3b\n \tldclvs\t3, cr6, [fp], #236\t@ 0xec\n-/build/1st/ssocr-2.23.0/imgproc.c:577\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:577\n \tldrmi\tr6, [r3], #-3002\t@ 0xfffff446\n \t\t\t@ instruction: 0xe00663bb\n-/build/1st/ssocr-2.23.0/imgproc.c:579\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:579\n \tmovwcc\tr6, #6907\t@ 0x1afb\n \tlfmvs\tf6, 2, [fp], #1004\t@ 0x3ec\n-/build/1st/ssocr-2.23.0/imgproc.c:580\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:580\n \tldrmi\tr6, [r3], #-2938\t@ 0xfffff486\n \tbvs\tfeee28fc <__bss_end__@@Base+0xfeed0654>\n-/build/1st/ssocr-2.23.0/imgproc.c:572 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:572 (discriminator 2)\n \tadcsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:572 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:572 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r7, r9, fp, sp, lr}\n \tble\tda584 <__bss_end__@@Base+0xc82dc>\n-/build/1st/ssocr-2.23.0/imgproc.c:572 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:572 (discriminator 3)\n \t\t\t@ instruction: 0x6c3b6aba\n \tblle\tff4da58c <__bss_end__@@Base+0xff4c82e4>\n-/build/1st/ssocr-2.23.0/imgproc.c:571 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:571 (discriminator 2)\n \tmovwcc\tr6, #6779\t@ 0x1a7b\n \tbvs\t1ea2518 <__bss_end__@@Base+0x1e90270>\n-/build/1st/ssocr-2.23.0/imgproc.c:571 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:571 (discriminator 1)\n \taddsmi\tr6, sl, #8060928\t@ 0x7b0000\n \tbvs\t1ec0340 <__bss_end__@@Base+0x1eae098>\n-/build/1st/ssocr-2.23.0/imgproc.c:571 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:571 (discriminator 3)\n \taddsmi\tr6, sl, #31488\t@ 0x7b00\n \tbvs\tfff00a50 <__bss_end__@@Base+0xffeee7a8>\n-/build/1st/ssocr-2.23.0/imgproc.c:584\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:584\n \ttstle\tpc, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:585\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:585\n \tstmiapl\tr3!, {r0, r2, r3, r4, r5, r8, r9, fp, lr}^\n \tbmi\tf63bb4 <__bss_end__@@Base+0xf5190c>\n \tldmdbmi\tsp!, {r1, r3, r4, r5, r6, sl, lr}\n \t\t\t@ instruction: 0x46184479\n \tb\t1cc7b30 <__bss_end__@@Base+0x1cb5888>\n-/build/1st/ssocr-2.23.0/imgproc.c:587\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:587\n \t\t\t@ instruction: 0xf7f76bf8\n \tvldr\ts28, [r7, #664]\t@ 0x298\n-/build/1st/ssocr-2.23.0/imgproc.c:588\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:588\n \tsub\tr7, r4, r4, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:590\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:590\n \tblcs\t24850 <__bss_end__@@Base+0x125a8>\n \tblmi\td3dfa4 <__bss_end__@@Base+0xd2bcfc>\n-/build/1st/ssocr-2.23.0/imgproc.c:591\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:591\n \tldmdavs\tfp, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldrbtmi\tr4, [sl], #-2613\t@ 0xfffff5cb\n \tldrbtmi\tr4, [r9], #-2357\t@ 0xfffff6cb\n \t\t\t@ instruction: 0xf7f74618\n \tblvs\tffe444fc <__bss_end__@@Base+0xffe32254>\n-/build/1st/ssocr-2.23.0/imgproc.c:593\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:593\n \tb\tfe4c7b5c <__bss_end__@@Base+0xfe4b58b4>\n-/build/1st/ssocr-2.23.0/imgproc.c:594\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:594\n \tblvc\t1451e0 <__bss_end__@@Base+0x132f38>\n \tbvs\tffe81c4c <__bss_end__@@Base+0xffe6f9a4>\n-/build/1st/ssocr-2.23.0/imgproc.c:596\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:596\n \t\t\t@ instruction: 0xf0026b78\n \t\t\t@ instruction: 0x4603fcbf\n \tblvs\te63080 <__bss_end__@@Base+0xe50dd8>\n-/build/1st/ssocr-2.23.0/imgproc.c:597\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:597\n \t\t\t@ instruction: 0xf0026bb8\n \t\t\t@ instruction: 0x4603fcb9\n \tcfldr32vs\tmvfx6, [sl, #-492]!\t@ 0xfffffe14\n-/build/1st/ssocr-2.23.0/imgproc.c:598\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:598\n \tldrmi\tr6, [r3], #-3451\t@ 0xfffff285\n \tbcc\tfe4453c4 <__bss_end__@@Base+0xfe43311c>\n \tblvs\t1a0568c <__bss_end__@@Base+0x19f33e4>\n \tblpl\t70522c <__bss_end__@@Base+0x6f2f84>\n \tblvc\t1855cc <__bss_end__@@Base+0x173324>\n \tblvc\t5c51d4 <__bss_end__@@Base+0x5b2f2c>\n-/build/1st/ssocr-2.23.0/imgproc.c:599\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:599\n \tblvs\t5c5218 <__bss_end__@@Base+0x5b2f70>\n \tblvc\t64521c <__bss_end__@@Base+0x632f74>\n \tblvc\t120549c <__bss_end__@@Base+0x11f31f4>\n \tblvc\tff205688 <__bss_end__@@Base+0xff1f33e0>\n \tblvs\t5c5248 <__bss_end__@@Base+0x5b2fa0>\n \tblvc\tff1c56a0 <__bss_end__@@Base+0xff1b33f8>\n \tblx\t445798 <__bss_end__@@Base+0x4334f0>\n \tsvcge\t0x005df73f\n-/build/1st/ssocr-2.23.0/imgproc.c:602\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:602\n \t\t\t@ instruction: 0xf7f76bf8\n \tvldr\ts28, [r7, #400]\t@ 0x190\n-/build/1st/ssocr-2.23.0/imgproc.c:604\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:604\n \tvldr\td7, [pc, #88]\t@ 9c3c \n \tvmul.f64\td6, d7, d10\n \tbmi\t628804 <__bss_end__@@Base+0x61655c>\n-/build/1st/ssocr-2.23.0/imgproc.c:532 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:532 (discriminator 1)\n \tblmi\t45add8 <__bss_end__@@Base+0x448b30>\n-/build/1st/ssocr-2.23.0/imgproc.c:605 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:605 (discriminator 1)\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-251\t@ 0xffffff05\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f7d001\n-/build/1st/ssocr-2.23.0/imgproc.c:605\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:605\n \t\t\t@ instruction: 0xeeb0ea34\n \tstrcc\tr0, [r4, r7, asr #22]\n \tldclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr0, r0, r0\n \tsubsmi\tr0, r9, r0\n \tandeq\tr0, r0, r0\n \trsbmi\tlr, pc, r0\n@@ -10518,457 +10518,457 @@\n \tandeq\tr0, r0, ip, lsl #2\n \t\t\t@ instruction: 0x00004bb0\n \tandeq\tr4, r0, ip, lsl sp\n \tandeq\tr4, r0, sl, lsl #23\n \tandeq\tr4, r0, sl, lsr #26\n \tstrdeq\tr8, [r0], -r4\n get_minval():\n-/build/1st/ssocr-2.23.0/imgproc.c:610\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:610\n \taddslt\tfp, r2, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \trscsvs\tr6, sl, r9, lsr r1\n \tldcvs\t0, cr6, [fp, #-748]!\t@ 0xfffffd14\n \tldclvs\t0, cr6, [fp, #-492]!\t@ 0xfffffe14\n \tbmi\t1261d54 <__bss_end__@@Base+0x124faac>\n \tblmi\t125ae54 <__bss_end__@@Base+0x1248bac>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f647b\n \tmvnscs\tr0, #0, 6\n-/build/1st/ssocr-2.23.0/imgproc.c:615\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:615\n \tmovwcs\tr6, #571\t@ 0x23b\n-/build/1st/ssocr-2.23.0/imgproc.c:616\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:616\n \t\t\t@ instruction: 0xf7f7627b\n-/build/1st/ssocr-2.23.0/imgproc.c:619\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:619\n \tadcsvs\tlr, r8, #3506176\t@ 0x358000\n-/build/1st/ssocr-2.23.0/imgproc.c:622\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:622\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7ea0c\n-/build/1st/ssocr-2.23.0/imgproc.c:623\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:623\n \trscsvs\tlr, r8, #4161536\t@ 0x3f8000\n-/build/1st/ssocr-2.23.0/imgproc.c:624\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:624\n \tstmdb\tr4, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tldmvs\tfp!, {r3, r4, r5, r8, r9, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:627\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:627\n \tsvccc\t0x00fff1b3\n \tblvs\tefe0a8 <__bss_end__@@Base+0xeebe00>\n-/build/1st/ssocr-2.23.0/imgproc.c:627 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:627 (discriminator 1)\n \tldmdavs\tfp!, {r0, r1, r3, r4, r5, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:628\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:628\n \tsvccc\t0x00fff1b3\n \tblvs\tefe0b4 <__bss_end__@@Base+0xeebe0c>\n-/build/1st/ssocr-2.23.0/imgproc.c:628 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:628 (discriminator 1)\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r6, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:631\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:631\n \tldrmi\tr6, [r3], #-2235\t@ 0xfffff745\n \taddsmi\tr6, sl, #59392\t@ 0xe800\n \tblvs\tec04cc <__bss_end__@@Base+0xeae224>\n-/build/1st/ssocr-2.23.0/imgproc.c:631 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:631 (discriminator 1)\n \tbne\tff4e3fb0 <__bss_end__@@Base+0xff4d1d08>\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:632\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:632\n \tldrmi\tr6, [r3], #-2171\t@ 0xfffff785\n \taddsmi\tr6, sl, #1024000\t@ 0xfa000\n \tbvs\tffec04e0 <__bss_end__@@Base+0xffeae238>\n-/build/1st/ssocr-2.23.0/imgproc.c:632 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:632 (discriminator 1)\n \tbne\tff4e3ec4 <__bss_end__@@Base+0xff4d1c1c>\n \tldmdbvs\tfp!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:633\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:633\n \tble\t548e0 <__bss_end__@@Base+0x42638>\n-/build/1st/ssocr-2.23.0/imgproc.c:633 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:633 (discriminator 1)\n \tteqvs\tfp, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:634\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:634\n \tblcs\t240d4 <__bss_end__@@Base+0x11e2c>\n \tmovwcs\tsp, #2561\t@ 0xa01\n-/build/1st/ssocr-2.23.0/imgproc.c:634 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:634 (discriminator 1)\n \tmovwcs\tr6, #251\t@ 0xfb\n-/build/1st/ssocr-2.23.0/imgproc.c:637\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:637\n \tstrht\tr6, [sl], -fp\n-/build/1st/ssocr-2.23.0/imgproc.c:638\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:638\n \tmvnsvs\tr2, r0, lsl #6\n \t\t\t@ instruction: 0xf107e01c\n-/build/1st/ssocr-2.23.0/imgproc.c:639\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:639\n \t\t\t@ instruction: 0x461a0334\n \tldmibvs\tr8!, {r0, r3, r4, r5, r6, r7, r8, fp, sp, lr}\n \tldmib\tsl, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:640\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:640\n \tteqeq\tr4, #-1073741823\t@ 0xc0000001\t@ \n \t\t\t@ instruction: 0x46186839\n \tstc2l\t0, cr15, [r4]\n \trscscs\tr4, pc, #3145728\t@ 0x300000\n \tldrmi\tr2, [r8], -r0, lsl #2\n \t\t\t@ instruction: 0xff12f000\n \tbvs\t1ea2704 <__bss_end__@@Base+0x1e9045c>\n-/build/1st/ssocr-2.23.0/imgproc.c:641\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:641\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tbvs\t1f00530 <__bss_end__@@Base+0x1eee288>\n-/build/1st/ssocr-2.23.0/imgproc.c:641 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:641 (discriminator 1)\n \tldmibvs\tfp!, {r0, r1, r3, r4, r5, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:638 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:638 (discriminator 2)\n \tmvnsvs\tr3, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:638 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:638 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, r8, fp, sp, lr}^\n \tble\tda7a4 <__bss_end__@@Base+0xc84fc>\n-/build/1st/ssocr-2.23.0/imgproc.c:638 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:638 (discriminator 3)\n \tbvs\tffee4528 <__bss_end__@@Base+0xffed2280>\n \tblle\tff69a7ac <__bss_end__@@Base+0xff688504>\n-/build/1st/ssocr-2.23.0/imgproc.c:637 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:637 (discriminator 2)\n \tmovwcc\tr6, #6587\t@ 0x19bb\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, r7, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:637 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:637 (discriminator 1)\n \taddsmi\tr6, sl, #12255232\t@ 0xbb0000\n \tldmibvs\tsl!, {r0, r1, r9, fp, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:637 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:637 (discriminator 3)\n \taddsmi\tr6, sl, #60416\t@ 0xec00\n \tbvs\tfee40c8c <__bss_end__@@Base+0xfee2e9e4>\n-/build/1st/ssocr-2.23.0/imgproc.c:646\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:646\n \tstmib\tr2!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:648\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:648\n \t\t\t@ instruction: 0xee076a3b\n \t\t\t@ instruction: 0xeeb83a90\n \tbmi\t2a8d08 <__bss_end__@@Base+0x296a60>\n-/build/1st/ssocr-2.23.0/imgproc.c:610\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:610\n \tblmi\t21af58 <__bss_end__@@Base+0x208cb0>\n-/build/1st/ssocr-2.23.0/imgproc.c:649\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:649\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr6, sl, fp, ror ip\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f7d001\n \t\t\t@ instruction: 0xeeb0e974\n \tstrbcc\tr0, [r8, -r7, asr #22]\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr8, r0, r8, ror r2\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, r4, ror r1\n get_maxval():\n-/build/1st/ssocr-2.23.0/imgproc.c:654\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:654\n \taddslt\tfp, r2, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \trscsvs\tr6, sl, r9, lsr r1\n \tldcvs\t0, cr6, [fp, #-748]!\t@ 0xfffffd14\n \tldclvs\t0, cr6, [fp, #-492]!\t@ 0xfffffe14\n \tbmi\t1261e9c <__bss_end__@@Base+0x124fbf4>\n \tblmi\t125af9c <__bss_end__@@Base+0x1248cf4>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f647b\n \tmovwcs\tr0, #768\t@ 0x300\n-/build/1st/ssocr-2.23.0/imgproc.c:659\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:659\n \tmovwcs\tr6, #635\t@ 0x27b\n-/build/1st/ssocr-2.23.0/imgproc.c:660\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:660\n \t\t\t@ instruction: 0xf7f7623b\n-/build/1st/ssocr-2.23.0/imgproc.c:663\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:663\n \tadcsvs\tlr, r8, #819200\t@ 0xc8000\n-/build/1st/ssocr-2.23.0/imgproc.c:666\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:666\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7e968\n-/build/1st/ssocr-2.23.0/imgproc.c:667\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:667\n \trscsvs\tlr, r8, #1474560\t@ 0x168000\n-/build/1st/ssocr-2.23.0/imgproc.c:668\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:668\n \tstmda\tr0!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tldmvs\tfp!, {r3, r4, r5, r8, r9, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:671\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:671\n \tsvccc\t0x00fff1b3\n \tblvs\tefe1f0 <__bss_end__@@Base+0xeebf48>\n-/build/1st/ssocr-2.23.0/imgproc.c:671 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:671 (discriminator 1)\n \tldmdavs\tfp!, {r0, r1, r3, r4, r5, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:672\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:672\n \tsvccc\t0x00fff1b3\n \tblvs\tefe1fc <__bss_end__@@Base+0xeebf54>\n-/build/1st/ssocr-2.23.0/imgproc.c:672 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:672 (discriminator 1)\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r6, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:675\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:675\n \tldrmi\tr6, [r3], #-2235\t@ 0xfffff745\n \taddsmi\tr6, sl, #59392\t@ 0xe800\n \tblvs\tec0614 <__bss_end__@@Base+0xeae36c>\n-/build/1st/ssocr-2.23.0/imgproc.c:675 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:675 (discriminator 1)\n \tbne\tff4e40f8 <__bss_end__@@Base+0xff4d1e50>\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:676\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:676\n \tldrmi\tr6, [r3], #-2171\t@ 0xfffff785\n \taddsmi\tr6, sl, #1024000\t@ 0xfa000\n \tbvs\tffec0628 <__bss_end__@@Base+0xffeae380>\n-/build/1st/ssocr-2.23.0/imgproc.c:676 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:676 (discriminator 1)\n \tbne\tff4e400c <__bss_end__@@Base+0xff4d1d64>\n \tldmdbvs\tfp!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:677\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:677\n \tble\t54a28 <__bss_end__@@Base+0x42780>\n-/build/1st/ssocr-2.23.0/imgproc.c:677 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:677 (discriminator 1)\n \tteqvs\tfp, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:678\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:678\n \tblcs\t2421c <__bss_end__@@Base+0x11f74>\n \tmovwcs\tsp, #2561\t@ 0xa01\n-/build/1st/ssocr-2.23.0/imgproc.c:678 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:678 (discriminator 1)\n \tmovwcs\tr6, #251\t@ 0xfb\n-/build/1st/ssocr-2.23.0/imgproc.c:681\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:681\n \tstrht\tr6, [sl], -fp\n-/build/1st/ssocr-2.23.0/imgproc.c:682\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:682\n \tmvnsvs\tr2, r0, lsl #6\n \t\t\t@ instruction: 0xf107e01c\n-/build/1st/ssocr-2.23.0/imgproc.c:683\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:683\n \t\t\t@ instruction: 0x461a0334\n \tldmibvs\tr8!, {r0, r3, r4, r5, r6, r7, r8, fp, sp, lr}\n \tldmdb\tr6!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:684\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:684\n \tteqeq\tr4, #-1073741823\t@ 0xc0000001\t@ \n \t\t\t@ instruction: 0x46186839\n \tmcrr2\t0, 0, pc, r0, cr0\t@ \n \trscscs\tr4, pc, #3145728\t@ 0x300000\n \tldrmi\tr2, [r8], -r0, lsl #2\n \tcdp2\t0, 6, cr15, cr14, cr0, {0}\n \tbvs\t1ea284c <__bss_end__@@Base+0x1e905a4>\n-/build/1st/ssocr-2.23.0/imgproc.c:685\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:685\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tbvs\t1f01278 <__bss_end__@@Base+0x1eeefd0>\n-/build/1st/ssocr-2.23.0/imgproc.c:685 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:685 (discriminator 1)\n \tldmibvs\tfp!, {r0, r1, r3, r4, r5, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:682 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:682 (discriminator 2)\n \tmvnsvs\tr3, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:682 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:682 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, r8, fp, sp, lr}^\n \tble\tda8ec <__bss_end__@@Base+0xc8644>\n-/build/1st/ssocr-2.23.0/imgproc.c:682 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:682 (discriminator 3)\n \tbvs\tffee4670 <__bss_end__@@Base+0xffed23c8>\n \tblle\tff69a8f4 <__bss_end__@@Base+0xff68864c>\n-/build/1st/ssocr-2.23.0/imgproc.c:681 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:681 (discriminator 2)\n \tmovwcc\tr6, #6587\t@ 0x19bb\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, r7, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:681 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:681 (discriminator 1)\n \taddsmi\tr6, sl, #12255232\t@ 0xbb0000\n \tldmibvs\tsl!, {r0, r1, r9, fp, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:681 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:681 (discriminator 3)\n \taddsmi\tr6, sl, #60416\t@ 0xec00\n \tbvs\tfee40dd4 <__bss_end__@@Base+0xfee2eb2c>\n-/build/1st/ssocr-2.23.0/imgproc.c:690\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:690\n \tldm\tlr!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:692\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:692\n \t\t\t@ instruction: 0xee076a3b\n \t\t\t@ instruction: 0xeeb83a90\n \tbmi\t2a8e50 <__bss_end__@@Base+0x296ba8>\n-/build/1st/ssocr-2.23.0/imgproc.c:654\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:654\n \tblmi\t21b0a0 <__bss_end__@@Base+0x208df8>\n-/build/1st/ssocr-2.23.0/imgproc.c:693\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:693\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr6, sl, fp, ror ip\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f7d001\n \tmrc\t8, 5, lr, cr0, cr0, {6}\n \tstrbcc\tr0, [r8, -r7, asr #22]\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr8, r0, r0, lsr r1\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr8, r0, ip, lsr #32\n white_border():\n-/build/1st/ssocr-2.23.0/imgproc.c:698\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:698\n \taddlt\tfp, sl, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\td21fd0 <__bss_end__@@Base+0xd0fd28>\n \tblmi\td1b0d8 <__bss_end__@@Base+0xd08e30>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f627b\n \t\t\t@ instruction: 0xf7f70300\n-/build/1st/ssocr-2.23.0/imgproc.c:705\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:705\n \t\t\t@ instruction: 0x6178e898\n-/build/1st/ssocr-2.23.0/imgproc.c:708\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:708\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7e8ce\n-/build/1st/ssocr-2.23.0/imgproc.c:709\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:709\n \t\t\t@ instruction: 0x61b8e8c0\n-/build/1st/ssocr-2.23.0/imgproc.c:710\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:710\n \tsvc\t0x00c6f7f6\n \t\t\t@ instruction: 0xf7f761f8\n-/build/1st/ssocr-2.23.0/imgproc.c:711\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:711\n \teorsvs\tlr, r8, #11403264\t@ 0xae0000\n-/build/1st/ssocr-2.23.0/imgproc.c:714\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:714\n \tsvceq\t0x00da69fb\n \tsubsne\tr4, fp, r3, lsl r4\n \tldmdavs\tfp!, {r1, r3, r4, r9, sl, lr}\n \tsfmle\tf4, 4, [r4, #-588]\t@ 0xfffffdb4\n-/build/1st/ssocr-2.23.0/imgproc.c:714 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:714 (discriminator 1)\n \tsvceq\t0x00da69fb\n \tsubsne\tr4, fp, r3, lsl r4\n \tldmibvs\tfp!, {r0, r1, r3, r4, r5, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:715\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:715\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \t\t\t@ instruction: 0x461a105b\n \taddsmi\tr6, r3, #3866624\t@ 0x3b0000\n \tldmibvs\tfp!, {r2, r8, sl, fp, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:715 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:715 (discriminator 1)\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \teorsvs\tr1, fp, fp, asr r0\n-/build/1st/ssocr-2.23.0/imgproc.c:718\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:718\n \trscsvs\tr2, fp, r0, lsl #6\n \tteqvs\tfp, r0, lsl #6\n \tbvs\te41fbc <__bss_end__@@Base+0xe2fd14>\n-/build/1st/ssocr-2.23.0/imgproc.c:719 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:719 (discriminator 3)\n \tstmia\tr2!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:720 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:720 (discriminator 3)\n \t\t\t@ instruction: 0xf7fe2001\n \tldmvs\tfp!, {r0, r1, r2, r3, r4, r5, r6, r7, sl, fp, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:721 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:721 (discriminator 3)\n \tldmibvs\tsl!, {r0, r1, r3, r4, r6}^\n \tldmdbvs\tfp!, {r0, r4, r6, r7, r9, fp, ip}\n \tldmibvs\tsl!, {r0, r1, r3, r4, r6}\n \t\t\t@ instruction: 0x460a1ad3\n \tldmvs\tr8!, {r0, r3, r4, r5, r8, fp, sp, lr}^\n \tstmda\tr6!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:718 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:718 (discriminator 3)\n \tmovwcc\tr6, #6395\t@ 0x18fb\n \tldmdbvs\tfp!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n \tteqvs\tfp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:718 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:718 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, fp, sp, lr}\n \tblle\tff89a9fc <__bss_end__@@Base+0xff888754>\n-/build/1st/ssocr-2.23.0/imgproc.c:725\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:725\n \t\t\t@ instruction: 0xf7f76978\n \tbvs\tf041b4 <__bss_end__@@Base+0xef1f0c>\n-/build/1st/ssocr-2.23.0/imgproc.c:698\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:698\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:729\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:729\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tbvs\t1ea3fec <__bss_end__@@Base+0x1e91d44>\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tldmda\tsl, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0x37284618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tstrdeq\tr7, [r0], -r4\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r2, asr #30\n shear():\n-/build/1st/ssocr-2.23.0/imgproc.c:737\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:737\n \taddlt\tfp, lr, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\tf220b8 <__bss_end__@@Base+0xf0fe10>\n \tblmi\tf1b1c0 <__bss_end__@@Base+0xf08f18>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f637b\n \t\t\t@ instruction: 0xf7f70300\n-/build/1st/ssocr-2.23.0/imgproc.c:746\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:746\n \tteqvs\tr8, r4, lsr #16\n-/build/1st/ssocr-2.23.0/imgproc.c:749\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:749\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \t\t\t@ instruction: 0xf7f7e85a\n-/build/1st/ssocr-2.23.0/imgproc.c:750\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:750\n \tcmnvs\tr8, ip, asr #16\n-/build/1st/ssocr-2.23.0/imgproc.c:751\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:751\n \tsvc\t0x0052f7f6\n \t\t\t@ instruction: 0xf7f761b8\n-/build/1st/ssocr-2.23.0/imgproc.c:752\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:752\n \tmvnsvs\tlr, sl, lsr r8\n-/build/1st/ssocr-2.23.0/imgproc.c:755\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:755\n \trscsvs\tr2, fp, r1, lsl #6\n \tldmvs\tfp!, {r2, r6, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:756\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:756\n \tblx\te40fa <__bss_end__@@Base+0xd1e52>\n \tldmdbvs\tfp!, {r1, r9, ip, sp, lr, pc}^\n \tldrmi\tr3, [r9], -r1, lsl #22\n \t\t\t@ instruction: 0xf0024610\n \t\t\t@ instruction: 0x4603fbb3\n \tldmibvs\tfp!, {r0, r1, r3, r4, r5, r9, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:758\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:758\n \tadcsvs\tr3, fp, r1, lsl #22\n \tldmvs\tsl!, {r1, r2, r3, r4, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:759 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:759 (discriminator 3)\n \tbne\tff4e491c <__bss_end__@@Base+0xff4d2674>\n \teoreq\tpc, r4, #-1073741823\t@ 0xc0000001\n \t\t\t@ instruction: 0x461868f9\n \tstmda\tr0, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:760 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:760 (discriminator 3)\n \t\t\t@ instruction: 0xf7f769f8\n \tbvs\tfee4410c <__bss_end__@@Base+0xfee31e64>\n-/build/1st/ssocr-2.23.0/imgproc.c:761 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:761 (discriminator 3)\n \tblvs\tea4c2c <__bss_end__@@Base+0xe92984>\n \t\t\t@ instruction: 0xf7f76a7b\n \tandcs\tlr, r0, #104, 16\t@ 0x680000\n-/build/1st/ssocr-2.23.0/imgproc.c:763 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:763 (discriminator 3)\n \tldmvs\tr8!, {r0, r3, r4, r5, r6, r7, fp, sp, lr}\n \tsvc\t0x009cf7f6\n-/build/1st/ssocr-2.23.0/imgproc.c:764 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:764 (discriminator 3)\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f74618\n \tldmvs\tfp!, {r1, r5, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:758 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:758 (discriminator 3)\n \tadcsvs\tr3, fp, r1, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:758 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:758 (discriminator 1)\n \tbvs\tee4354 <__bss_end__@@Base+0xed20ac>\n \tble\tff71aad8 <__bss_end__@@Base+0xff708830>\n-/build/1st/ssocr-2.23.0/imgproc.c:767\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:767\n \tadcsvs\tr2, fp, r0, lsl #6\n \tldmvs\tsl!, {r0, r1, r2, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:768 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:768 (discriminator 3)\n \tldmibvs\tr8!, {r0, r3, r4, r5, r7, fp, sp, lr}^\n \tldc2\t7, cr15, [r0, #-1016]!\t@ 0xfffffc08\n-/build/1st/ssocr-2.23.0/imgproc.c:767 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:767 (discriminator 3)\n \tmovwcc\tr6, #6331\t@ 0x18bb\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:767 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:767 (discriminator 1)\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tldmvs\tfp!, {r0, r1, r4, r5, r6, r7, r8, r9, fp, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:755 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:755 (discriminator 2)\n \trscsvs\tr3, fp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:755 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:755 (discriminator 1)\n \tldmdbvs\tfp!, {r1, r3, r4, r5, r6, r7, fp, sp, lr}^\n \tblle\tfed9ab04 <__bss_end__@@Base+0xfed8885c>\n-/build/1st/ssocr-2.23.0/imgproc.c:773\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:773\n \t\t\t@ instruction: 0xf7f76938\n \tldmibvs\tfp!, {r1, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:737\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:737\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:777\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:777\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tblvs\t1ea40f4 <__bss_end__@@Base+0x1e91e4c>\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tsvc\t0x00d6f7f6\n \t\t\t@ instruction: 0x37384618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr7, r0, ip, lsl #30\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, sl, lsr lr\n rotate():\n-/build/1st/ssocr-2.23.0/imgproc.c:781\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:781\n \tcfstr32\tmvfx11, [sp, #-512]!\t@ 0xfffffe00\n \taddslt\tr8, r2, r4, lsl #22\n \trscsvs\tsl, r8, r0, lsl #30\n \tbleq\t456fc <__bss_end__@@Base+0x33454>\n \tldrbtmi\tr4, [sl], #-2686\t@ 0xfffff582\n \tldmpl\tr3, {r1, r2, r3, r4, r5, r6, r8, r9, fp, lr}^\n \tldrbtvs\tr6, [fp], #-2075\t@ 0xfffff7e5\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:790\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:790\n \tsvc\t0x009cf7f6\n \tldmvs\tfp!, {r3, r4, r5, r6, r7, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:793\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:793\n \t\t\t@ instruction: 0x4618681b\n \tsvc\t0x00d2f7f6\n-/build/1st/ssocr-2.23.0/imgproc.c:794\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:794\n \tsvc\t0x00c4f7f6\n \t\t\t@ instruction: 0xf7f66238\n-/build/1st/ssocr-2.23.0/imgproc.c:795\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:795\n \trsbsvs\tlr, r8, #204, 28\t@ 0xcc0\n-/build/1st/ssocr-2.23.0/imgproc.c:796\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:796\n \tsvc\t0x00b2f7f6\n \tlfm\tf6, 4, [r7, #736]\t@ 0x2e0\n-/build/1st/ssocr-2.23.0/imgproc.c:799\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:799\n \tvldr\td6, [pc]\t@ a118 \n \t\t\t@ instruction: 0xee865b6d\n \tvadd.f64\td7, d7, d5\n \tvldr\td7, [pc, #28]\t@ a140 \n \tvnmul.f64\td6, d7, d28\n \tvstr\td7, [r7, #24]\n \tmovwcs\tr7, #2816\t@ 0xb00\n-/build/1st/ssocr-2.23.0/imgproc.c:803\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:803\n \tadc\tr6, lr, fp, ror r1\n-/build/1st/ssocr-2.23.0/imgproc.c:804\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:804\n \t\t\t@ instruction: 0x61bb2300\n \tbvs\t1f023c8 <__bss_end__@@Base+0x1ef0120>\n-/build/1st/ssocr-2.23.0/imgproc.c:805\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:805\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \tsubsmi\tr1, fp, #91\t@ 0x5b\n \tldmdbvs\tfp!, {r1, r3, r4, r9, sl, lr}^\n \tcfmvdlr\tmvd7, r4\n \t\t\t@ instruction: 0xeeb83a90\n \tvldr\td8, [r7, #924]\t@ 0x39c\n \t\t\t@ instruction: 0xf7f60b00\n@@ -10989,15 +10989,15 @@\n \tldrmi\tr0, [r3], #-4058\t@ 0xfffff026\n \tmcr\t0, 0, r1, cr7, cr11, {2}\n \t\t\t@ instruction: 0xeeb83a90\n \tvsub.f64\td7, d22, d23\n \tvmov.f64\td23, #215\t@ 0xbeb80000 -0.3593750\n \tvnmla.f64\td7, d23, d7\n \trscsvs\tr3, fp, #144, 20\t@ 0x90000\n-/build/1st/ssocr-2.23.0/imgproc.c:806\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:806\n \tsvceq\t0x00da6a3b\n \tsubsne\tr4, fp, r3, lsl r4\n \t\t\t@ instruction: 0x461a425b\n \tldrmi\tr6, [r3], #-2491\t@ 0xfffff645\n \tbcc\tfe4459dc <__bss_end__@@Base+0xfe433734>\n \tblhi\tffa05ca4 <__bss_end__@@Base+0xff9f39fc>\n \tbleq\t45824 <__bss_end__@@Base+0x3357c>\n@@ -11019,66 +11019,66 @@\n \tsubsne\tr4, fp, r3, lsl r4\n \tbcc\tfe445a28 <__bss_end__@@Base+0xfe433780>\n \tblvc\tffa05cf0 <__bss_end__@@Base+0xff9f3a48>\n \tblvc\t205aec <__bss_end__@@Base+0x1f3844>\n \tblvc\tff205e0c <__bss_end__@@Base+0xff1f3b64>\n \tbcc\tfe445a78 <__bss_end__@@Base+0xfe4337d0>\n \tbvs\tffee2f0c <__bss_end__@@Base+0xffed0c64>\n-/build/1st/ssocr-2.23.0/imgproc.c:807\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:807\n \tblle\t6d4e24 <__bss_end__@@Base+0x6c2b7c>\n-/build/1st/ssocr-2.23.0/imgproc.c:807 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:807 (discriminator 1)\n \tbvs\t1ee4e10 <__bss_end__@@Base+0x1ed2b68>\n \tlfmle\tf4, 4, [r7], {154}\t@ 0x9a\n-/build/1st/ssocr-2.23.0/imgproc.c:807 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:807 (discriminator 2)\n \tblcs\t24f1c <__bss_end__@@Base+0x12c74>\n \tblvs\tec0e84 <__bss_end__@@Base+0xeaebdc>\n-/build/1st/ssocr-2.23.0/imgproc.c:807 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:807 (discriminator 3)\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \t\t\t@ instruction: 0xf107dc10\n-/build/1st/ssocr-2.23.0/imgproc.c:808\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:808\n \t\t\t@ instruction: 0x461a0334\n \tbvs\tffe24f28 <__bss_end__@@Base+0xffe12c80>\n \tsvc\t0x003af7f6\n-/build/1st/ssocr-2.23.0/imgproc.c:809\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:809\n \t\t\t@ instruction: 0xf7f66ab8\n \tblvs\tfee45f00 <__bss_end__@@Base+0xfee33c58>\n-/build/1st/ssocr-2.23.0/imgproc.c:810\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:810\n \t\t\t@ instruction: 0x6c3a6bf9\n \t\t\t@ instruction: 0xf7f66b7b\n \tand\tlr, r5, r2, ror #30\n-/build/1st/ssocr-2.23.0/imgproc.c:812\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:812\n \t\t\t@ instruction: 0xf7f66ab8\n \tandcs\tlr, r1, r2, lsr #30\n-/build/1st/ssocr-2.23.0/imgproc.c:813\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:813\n \tblx\t1fc8262 <__bss_end__@@Base+0x1fb5fba>\n-/build/1st/ssocr-2.23.0/imgproc.c:815 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:815 (discriminator 2)\n \tldmibvs\tr9!, {r9, sp}\n \t\t\t@ instruction: 0xf7f66978\n \tldmvs\tfp!, {r4, r7, r9, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:816 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:816 (discriminator 2)\n \t\t\t@ instruction: 0x4618681b\n \tsvc\t0x0014f7f6\n-/build/1st/ssocr-2.23.0/imgproc.c:804 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:804 (discriminator 2)\n \tmovwcc\tr6, #6587\t@ 0x19bb\n \tldmibvs\tsl!, {r0, r1, r3, r4, r5, r7, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:804 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:804 (discriminator 1)\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tsvcge\t0x0057f6ff\n-/build/1st/ssocr-2.23.0/imgproc.c:803 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:803 (discriminator 2)\n \tmovwcc\tr6, #6523\t@ 0x197b\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r6, r8, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:803 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:803 (discriminator 1)\n \taddsmi\tr6, sl, #503808\t@ 0x7b000\n \tsvcge\t0x004cf6ff\n-/build/1st/ssocr-2.23.0/imgproc.c:821\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:821\n \t\t\t@ instruction: 0xf7f669f8\n \tbvs\tfef05eac <__bss_end__@@Base+0xfeef3c04>\n-/build/1st/ssocr-2.23.0/imgproc.c:781\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:781\n \tldrbtmi\tr4, [r9], #-2319\t@ 0xfffff6f1\n-/build/1st/ssocr-2.23.0/imgproc.c:825\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:825\n \tstmpl\tsl, {r0, r2, r3, r9, fp, lr}\n \tldclvs\t8, cr6, [sl], #-68\t@ 0xffffffbc\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tmrc\t7, 6, APSR_nzcv, cr6, cr6, {7}\n \tsmlaldcc\tr4, r8, r8, r6\n \tldc\t6, cr4, [sp], #756\t@ 0x2f4\n@@ -11088,434 +11088,434 @@\n \trsbsmi\tr8, r6, r0\n \tstrbpl\tr2, [r4], #-3352\t@ 0xfffff2e8\n \tstrdmi\tr2, [r9], -fp\n \tstrdeq\tr7, [r0], -lr\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, sl, lsr ip\n mirror():\n-/build/1st/ssocr-2.23.0/imgproc.c:829\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:829\n \taddlt\tfp, lr, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\t12e23d8 <__bss_end__@@Base+0x12d0130>\n \tblmi\t12db4e0 <__bss_end__@@Base+0x12c9238>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f637b\n \t\t\t@ instruction: 0xf7f60300\n-/build/1st/ssocr-2.23.0/imgproc.c:837\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:837\n \t\t\t@ instruction: 0x6178ee94\n-/build/1st/ssocr-2.23.0/imgproc.c:840\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:840\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64618\n \t\t\t@ instruction: 0xf7f6eeca\n-/build/1st/ssocr-2.23.0/imgproc.c:841\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:841\n \t\t\t@ instruction: 0x61b8eebc\n-/build/1st/ssocr-2.23.0/imgproc.c:842\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:842\n \tstcl\t7, cr15, [r2, #984]\t@ 0x3d8\n \t\t\t@ instruction: 0xf7f661f8\n-/build/1st/ssocr-2.23.0/imgproc.c:843\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:843\n \teorsvs\tlr, r8, #2720\t@ 0xaa0\n-/build/1st/ssocr-2.23.0/imgproc.c:846\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:846\n \tblcs\t24414 <__bss_end__@@Base+0x1216c>\n \tldmibvs\tfp!, {r0, r4, r5, r8, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:847\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:847\n \trscsvs\tr3, fp, r1, lsl #22\n \tmovwcs\tlr, #41\t@ 0x29\n-/build/1st/ssocr-2.23.0/imgproc.c:848\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:848\n \tands\tr6, pc, fp, lsr r1\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:849 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:849 (discriminator 3)\n \t\t\t@ instruction: 0x1e5a69fb\n \tbne\tff4e472c <__bss_end__@@Base+0xff4d2484>\n \teoreq\tpc, r4, #-1073741823\t@ 0xc0000001\n \t\t\t@ instruction: 0x46186939\n \tmrc\t7, 5, APSR_nzcv, cr8, cr6, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:850 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:850 (discriminator 3)\n \t\t\t@ instruction: 0xf7f66a38\n \tbvs\tfee45dfc <__bss_end__@@Base+0xfee33b54>\n-/build/1st/ssocr-2.23.0/imgproc.c:851 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:851 (discriminator 3)\n \tblvs\tea4f3c <__bss_end__@@Base+0xe92c94>\n \t\t\t@ instruction: 0xf7f66a7b\n \tandcs\tlr, r0, #224, 28\t@ 0xe00\n-/build/1st/ssocr-2.23.0/imgproc.c:852 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:852 (discriminator 3)\n \tldmvs\tr8!, {r0, r3, r4, r5, r8, fp, sp, lr}^\n \tmrc\t7, 0, APSR_nzcv, cr4, cr6, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:853 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:853 (discriminator 3)\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64618\n \tldmdbvs\tfp!, {r1, r3, r4, r7, r9, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:848 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:848 (discriminator 3)\n \tteqvs\tfp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:848 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:848 (discriminator 1)\n \tldmibvs\tfp!, {r1, r3, r4, r5, r8, fp, sp, lr}\n \tblle\tff6dade8 <__bss_end__@@Base+0xff6c8b40>\n-/build/1st/ssocr-2.23.0/imgproc.c:847 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:847 (discriminator 2)\n \tblcc\t64770 <__bss_end__@@Base+0x524c8>\n \tldmvs\tfp!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:847 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:847 (discriminator 1)\n \tble\tff494f8c <__bss_end__@@Base+0xff482ce4>\n \tldmdavs\tfp!, {r0, r1, r4, r5, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:856\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:856\n \tteqle\tr0, r1, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:857\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:857\n \trscsvs\tr2, fp, r0, lsl #6\n \tldmibvs\tfp!, {r0, r3, r5, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:858\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:858\n \tteqvs\tfp, r1, lsl #22\n \tldmibvs\tfp!, {r0, r1, r2, r3, r4, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:859 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:859 (discriminator 3)\n \tldmdbvs\tfp!, {r1, r3, r4, r6, r9, sl, fp, ip}\n \t\t\t@ instruction: 0xf1071ad3\n \tldrmi\tr0, [r9], -r4, lsr #4\n \t\t\t@ instruction: 0xf7f668f8\n \tbvs\te45dc8 <__bss_end__@@Base+0xe33b20>\n-/build/1st/ssocr-2.23.0/imgproc.c:860 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:860 (discriminator 3)\n \tmrc\t7, 3, APSR_nzcv, cr4, cr6, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:861 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:861 (discriminator 3)\n \tbvs\tffe64ea0 <__bss_end__@@Base+0xffe52bf8>\n \tbvs\t1ee50ac <__bss_end__@@Base+0x1ed2e04>\n \tmcr\t7, 5, pc, cr10, cr6, {7}\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:862 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:862 (discriminator 3)\n \tldmdbvs\tr9!, {r9, sp}\n \t\t\t@ instruction: 0xf7f668f8\n \tldmdavs\tfp!, {r5, r6, r7, r8, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:863 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:863 (discriminator 3)\n \t\t\t@ instruction: 0x4618681b\n \tmcr\t7, 3, pc, cr4, cr6, {7}\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:858 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:858 (discriminator 3)\n \tblcc\t648cc <__bss_end__@@Base+0x52624>\n \tldmdbvs\tfp!, {r0, r1, r3, r4, r5, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:858 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:858 (discriminator 1)\n \tble\tff714fe8 <__bss_end__@@Base+0xff702d40>\n-/build/1st/ssocr-2.23.0/imgproc.c:857 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:857 (discriminator 2)\n \tmovwcc\tr6, #6395\t@ 0x18fb\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:857 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:857 (discriminator 1)\n \taddsmi\tr6, sl, #4112384\t@ 0x3ec000\n \tldmdbvs\tr8!, {r0, r4, r6, r7, r8, r9, fp, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:869\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:869\n \tmrc\t7, 2, APSR_nzcv, cr4, cr6, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:872\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:872\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:829\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:829\n \tbmi\t21b5e8 <__bss_end__@@Base+0x209340>\n-/build/1st/ssocr-2.23.0/imgproc.c:873\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:873\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror fp\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n \tldrmi\tlr, [r8], -sl, lsr #28\n \t\t\t@ instruction: 0x46bd3738\n \tsvclt\t0x0000bd80\n \tandeq\tr7, r0, ip, ror #23\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r0, ror #21\n grayscale():\n-/build/1st/ssocr-2.23.0/imgproc.c:877\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:877\n \taddlt\tfp, lr, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\td6251c <__bss_end__@@Base+0xd50274>\n \tblmi\td5b624 <__bss_end__@@Base+0xd4937c>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f637b\n \tmovwcs\tr0, #768\t@ 0x300\n-/build/1st/ssocr-2.23.0/imgproc.c:883\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:883\n \t\t\t@ instruction: 0xf7f6613b\n-/build/1st/ssocr-2.23.0/imgproc.c:886\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:886\n \tldrshvs\tlr, [r8, #-208]!\t@ 0xffffff30\n-/build/1st/ssocr-2.23.0/imgproc.c:889\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:889\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64618\n \t\t\t@ instruction: 0xf7f6ee26\n-/build/1st/ssocr-2.23.0/imgproc.c:890\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:890\n \t\t\t@ instruction: 0x61b8ee18\n-/build/1st/ssocr-2.23.0/imgproc.c:891\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:891\n \tldc\t7, cr15, [lr, #-984]\t@ 0xfffffc28\n \t\t\t@ instruction: 0xf7f661f8\n-/build/1st/ssocr-2.23.0/imgproc.c:892\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:892\n \teorsvs\tlr, r8, #6, 28\t@ 0x60\n-/build/1st/ssocr-2.23.0/imgproc.c:895\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:895\n \tadcsvs\tr2, fp, r0, lsl #6\n \tmovwcs\tlr, #51\t@ 0x33\n-/build/1st/ssocr-2.23.0/imgproc.c:896\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:896\n \tstrd\tr6, [r9], -fp\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:897 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:897 (discriminator 3)\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64618\n \t\t\t@ instruction: 0xf107ee12\n-/build/1st/ssocr-2.23.0/imgproc.c:898 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:898 (discriminator 3)\n \tldrmi\tr0, [sl], -r4, lsr #6\n \tldmvs\tr8!, {r0, r3, r4, r5, r6, r7, fp, sp, lr}\n \tmrc\t7, 0, APSR_nzcv, cr6, cr6, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:899 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:899 (discriminator 3)\n \t\t\t@ instruction: 0xf7f66a38\n \t\t\t@ instruction: 0xf107ee08\n-/build/1st/ssocr-2.23.0/imgproc.c:900 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:900 (discriminator 3)\n \tldmdavs\tr9!, {r2, r5, r8, r9}\n \t\t\t@ instruction: 0xf0004618\n \t\t\t@ instruction: 0x4603f91d\n \tstrdcs\tr2, [r0, -pc]\n \t\t\t@ instruction: 0xf0004618\n \tteqvs\tr8, fp, asr #22\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:901 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:901 (discriminator 3)\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r6, r9, fp, sp, lr}\n \tldmdbvs\tr8!, {r0, r3, r4, r5, r8, fp, sp, lr}\n \tmrc\t7, 1, APSR_nzcv, cr0, cr6, {7}\n-/build/1st/ssocr-2.23.0/imgproc.c:902 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:902 (discriminator 3)\n \tldmvs\tr9!, {r9, sp}^\n \t\t\t@ instruction: 0xf7f668b8\n \tldmvs\tfp!, {r1, r2, r5, r6, r8, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:896 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:896 (discriminator 3)\n \trscsvs\tr3, fp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:896 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:896 (discriminator 1)\n \tldmibvs\tfp!, {r1, r3, r4, r5, r6, r7, fp, sp, lr}\n \tblle\tff45af3c <__bss_end__@@Base+0xff448c94>\n-/build/1st/ssocr-2.23.0/imgproc.c:895 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:895 (discriminator 2)\n \tmovwcc\tr6, #6331\t@ 0x18bb\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:895 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:895 (discriminator 1)\n \taddsmi\tr6, sl, #4112384\t@ 0x3ec000\n \tldmdbvs\tr8!, {r0, r1, r2, r6, r7, r8, r9, fp, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:907\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:907\n \tldcl\t7, cr15, [lr, #984]\t@ 0x3d8\n-/build/1st/ssocr-2.23.0/imgproc.c:910\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:910\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:877\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:877\n \tbmi\t21b6d4 <__bss_end__@@Base+0x20942c>\n-/build/1st/ssocr-2.23.0/imgproc.c:911\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:911\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror fp\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n \t\t\t@ instruction: 0x4618edb4\n \t\t\t@ instruction: 0x46bd3738\n \tsvclt\t0x0000bd80\n \tandeq\tr7, r0, r8, lsr #21\n \tandeq\tr0, r0, r0, lsl #2\n \tstrdeq\tr7, [r0], -r4\n invert():\n-/build/1st/ssocr-2.23.0/imgproc.c:915\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:915\n \taddslt\tfp, r0, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tbleq\t45b40 <__bss_end__@@Base+0x33898>\n \tbmi\tc6280c <__bss_end__@@Base+0xc50564>\n \tblmi\tc5b714 <__bss_end__@@Base+0xc4946c>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f63fb\n \t\t\t@ instruction: 0xf7f60300\n-/build/1st/ssocr-2.23.0/imgproc.c:924\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:924\n \t\t\t@ instruction: 0x61b8ed7a\n-/build/1st/ssocr-2.23.0/imgproc.c:927\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:927\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r7, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64618\n \t\t\t@ instruction: 0xf7f6edb0\n-/build/1st/ssocr-2.23.0/imgproc.c:928\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:928\n \tmvnsvs\tlr, r2, lsr #27\n-/build/1st/ssocr-2.23.0/imgproc.c:929\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:929\n \tstc\t7, cr15, [r8], #984\t@ 0x3d8\n \t\t\t@ instruction: 0xf7f66238\n-/build/1st/ssocr-2.23.0/imgproc.c:930\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:930\n \trsbsvs\tlr, r8, #144, 26\t@ 0x2400\n-/build/1st/ssocr-2.23.0/imgproc.c:933\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:933\n \tteqvs\tfp, r0, lsl #6\n \tmovwcs\tlr, #45\t@ 0x2d\n-/build/1st/ssocr-2.23.0/imgproc.c:934\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:934\n \teor\tr6, r3, fp, ror r1\n-/build/1st/ssocr-2.23.0/imgproc.c:935\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:935\n \tmsreq\tCPSR_fs, #-1073741823\t@ 0xc0000001\n \tldmdbvs\tr9!, {r1, r3, r4, r9, sl, lr}^\n \t\t\t@ instruction: 0xf7f66938\n \t\t\t@ instruction: 0xf107eda6\n-/build/1st/ssocr-2.23.0/imgproc.c:936\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:936\n \tldmvs\tr9!, {r2, r3, r5, r8, r9}\n \t\t\t@ instruction: 0xf0004618\n \tadcsvs\tpc, r8, #11468800\t@ 0xaf0000\n-/build/1st/ssocr-2.23.0/imgproc.c:937\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:937\n \tbleq\t45be0 <__bss_end__@@Base+0x33938>\n \t\t\t@ instruction: 0xf7fe6ab8\n \t\t\t@ instruction: 0x4603fad5\n \tandle\tr2, r5, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:938\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:938\n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7fe6a78\n \tand\tpc, r4, r3, lsr #21\n-/build/1st/ssocr-2.23.0/imgproc.c:940\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:940\n \tldmdbvs\tr9!, {r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7fe6a78\n \tldmdbvs\tfp!, {r0, r1, r4, r5, r6, r9, fp, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:934 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:934 (discriminator 2)\n \tcmnvs\tfp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:934 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:934 (discriminator 1)\n \tldmibvs\tfp!, {r1, r3, r4, r5, r6, r8, fp, sp, lr}^\n \tblle\tff5db01c <__bss_end__@@Base+0xff5c8d74>\n-/build/1st/ssocr-2.23.0/imgproc.c:933 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:933 (discriminator 2)\n \tmovwcc\tr6, #6459\t@ 0x193b\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r8, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:933 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:933 (discriminator 1)\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tldmibvs\tr8!, {r0, r2, r3, r6, r7, r8, r9, fp, ip, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:946\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:946\n \tstcl\t7, cr15, [lr, #-984]!\t@ 0xfffffc28\n-/build/1st/ssocr-2.23.0/imgproc.c:949\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:949\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r6, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:915\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:915\n \tbmi\t21b7b4 <__bss_end__@@Base+0x20950c>\n-/build/1st/ssocr-2.23.0/imgproc.c:950\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:950\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-186\t@ 0xffffff46\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n \tldrmi\tlr, [r8], -r4, asr #26\n \tldrtmi\tr3, [sp], r0, asr #14\n \tsvclt\t0x0000bd80\n \t\t\t@ instruction: 0x000079b8\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r4, lsl r9\n crop():\n-/build/1st/ssocr-2.23.0/imgproc.c:954\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:954\n \taddlt\tfp, ip, r0, lsl #11\n \tcmnvs\tr8, r0, lsl #30\n \trscsvs\tr6, sl, r9, lsr r1\n \tblvs\tfeee28f4 <__bss_end__@@Base+0xfeed064c>\n \tbmi\tc627f8 <__bss_end__@@Base+0xc50550>\n \tblmi\tc5b7f8 <__bss_end__@@Base+0xc49550>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f62fb\n \t\t\t@ instruction: 0xf7f60300\n-/build/1st/ssocr-2.23.0/imgproc.c:960\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:960\n \tmvnsvs\tlr, r8, lsl #26\n-/build/1st/ssocr-2.23.0/imgproc.c:963\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:963\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, r8, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64618\n \t\t\t@ instruction: 0xf7f6ed3e\n-/build/1st/ssocr-2.23.0/imgproc.c:964\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:964\n \teorsvs\tlr, r8, #14848\t@ 0x3a00\n-/build/1st/ssocr-2.23.0/imgproc.c:965\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:965\n \tstc\t7, cr15, [ip, #-984]!\t@ 0xfffffc28\n \tldmdbvs\tfp!, {r3, r4, r5, r6, r9, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:968\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:968\n \tble\t5523c <__bss_end__@@Base+0x42f94>\n-/build/1st/ssocr-2.23.0/imgproc.c:968 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:968 (discriminator 1)\n \tteqvs\tfp, r0, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:969\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:969\n \tblcs\t24a30 <__bss_end__@@Base+0x12788>\n \tmovwcs\tsp, #2561\t@ 0xa01\n-/build/1st/ssocr-2.23.0/imgproc.c:969 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:969 (discriminator 1)\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:970\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:970\n \taddsmi\tr6, sl, #241664\t@ 0x3b000\n \tbvs\tf0125c <__bss_end__@@Base+0xeeefb4>\n-/build/1st/ssocr-2.23.0/imgproc.c:970 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:970 (discriminator 1)\n \tteqvs\tfp, r1, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:971\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:971\n \tbvs\t1ee4a44 <__bss_end__@@Base+0x1ed279c>\n \tblle\t9b0c8 <__bss_end__@@Base+0x88e20>\n-/build/1st/ssocr-2.23.0/imgproc.c:971 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:971 (discriminator 1)\n \tblcc\t65050 <__bss_end__@@Base+0x52da8>\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r6, r7, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:972\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:972\n \tldrmi\tr6, [r3], #-2235\t@ 0xfffff745\n \taddsmi\tr6, sl, #237568\t@ 0x3a000\n \tbvs\tec0e80 <__bss_end__@@Base+0xeaebd8>\n-/build/1st/ssocr-2.23.0/imgproc.c:972 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:972 (discriminator 1)\n \tbne\tff4e4b64 <__bss_end__@@Base+0xff4d28bc>\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:973\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:973\n \tldrmi\tr6, [r3], #-2171\t@ 0xfffff785\n \taddsmi\tr6, sl, #499712\t@ 0x7a000\n \tbvs\t1ec0e94 <__bss_end__@@Base+0x1eaebec>\n-/build/1st/ssocr-2.23.0/imgproc.c:973 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:973 (discriminator 1)\n \tbne\tff4e4b78 <__bss_end__@@Base+0xff4d28d0>\n \tldmdbvs\tfp!, {r0, r1, r3, r4, r5, r6, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:976\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:976\n \t\t\t@ instruction: 0x4618681b\n \tstc\t7, cr15, [r6, #-984]\t@ 0xfffffc28\n-/build/1st/ssocr-2.23.0/imgproc.c:977\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:977\n \tldmvs\tsl!, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \tldmdbvs\tr8!, {r0, r3, r4, r5, r6, r7, fp, sp, lr}\n \tmrrc\t7, 15, pc, r2, cr6\t@ \n \tldmibvs\tr8!, {r3, r4, r5, r7, r9, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:980\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:980\n \tldcl\t7, cr15, [ip], #984\t@ 0x3d8\n-/build/1st/ssocr-2.23.0/imgproc.c:983\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:983\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r7, r9, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:954\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:954\n \tbmi\t21b898 <__bss_end__@@Base+0x2095f0>\n-/build/1st/ssocr-2.23.0/imgproc.c:984\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:984\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-170\t@ 0xffffff56\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n \t\t\t@ instruction: 0x4618ecd2\n \t\t\t@ instruction: 0x46bd3730\n \tsvclt\t0x0000bd80\n \tldrdeq\tr7, [r0], -r4\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r0, lsr r8\n get_lum():\n-/build/1st/ssocr-2.23.0/imgproc.c:988\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:988\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\td227cc <__bss_end__@@Base+0xd10524>\n \tldmdbmi\tr4!, {r1, r3, r4, r5, r6, sl, lr}\n \tblmi\td1b8d4 <__bss_end__@@Base+0xd0962c>\n \tldmdavs\tfp, {r0, r1, r3, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tldmdavs\tfp!, {r8, r9}\n-/build/1st/ssocr-2.23.0/imgproc.c:989\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:989\n \tldmdale\tsp!, {r0, r1, r2, r8, r9, fp, sp}\n \t\t\t@ instruction: 0xf851a102\n \tldrmi\tr3, [r9], #-35\t@ 0xffffffdd\n \tsvclt\t0x00004708\n \tandeq\tr0, r0, fp, lsr #32\n \tandeq\tr0, r0, r1, lsr #32\n \tandeq\tr0, r0, r5, lsr r0\n \tandeq\tr0, r0, pc, lsr r0\n \tandeq\tr0, r0, r9, asr #32\n \tandeq\tr0, r0, r3, asr r0\n \tandeq\tr0, r0, sp, asr r0\n \tandeq\tr0, r0, r7, rrx\n-/build/1st/ssocr-2.23.0/imgproc.c:990\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:990\n \t\t\t@ instruction: 0xf0006878\n \t\t\t@ instruction: 0x4603f851\n \tldmdavs\tr8!, {r0, r1, r2, r3, r5, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:991\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:991\n \t\t\t@ instruction: 0xf8a2f000\n \teor\tr4, sl, r3, lsl #12\n-/build/1st/ssocr-2.23.0/imgproc.c:992\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:992\n \t\t\t@ instruction: 0xf0006878\n \t\t\t@ instruction: 0x4603f8f1\n \tldmdavs\tr8!, {r0, r2, r5, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:993\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:993\n \t\t\t@ instruction: 0xf91ef000\n \teor\tr4, r0, r3, lsl #12\n-/build/1st/ssocr-2.23.0/imgproc.c:994\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:994\n \t\t\t@ instruction: 0xf0006878\n \t\t\t@ instruction: 0x4603f951\n \tldmdavs\tr8!, {r0, r1, r3, r4, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:995\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:995\n \t\t\t@ instruction: 0xf984f000\n \tands\tr4, r6, r3, lsl #12\n-/build/1st/ssocr-2.23.0/imgproc.c:996\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:996\n \t\t\t@ instruction: 0xf0006878\n \tstrmi\tpc, [r3], -r3, lsr #19\n \tldmdavs\tr8!, {r0, r4, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:997\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:997\n \t\t\t@ instruction: 0xf9c2f000\n \tand\tr4, ip, r3, lsl #12\n-/build/1st/ssocr-2.23.0/imgproc.c:999\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:999\n \tldmpl\tr3, {r0, r4, r8, r9, fp, lr}^\n \tldmdavs\tfp!, {r3, r4, fp, sp, lr}\n \tldrbtmi\tr4, [sl], #-2576\t@ 0xfffff5f0\n \tldrbtmi\tr4, [r9], #-2320\t@ 0xfffff6f0\n \tmrrc\t7, 15, pc, r4, cr6\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1001\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1001\n \t\t\t@ instruction: 0xf7f62063\n \tstmdbmi\tlr, {r1, r2, r3, r4, r5, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/imgproc.c:988\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:988\n \tbmi\t25b980 <__bss_end__@@Base+0x2496d8>\n-/build/1st/ssocr-2.23.0/imgproc.c:1003\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1003\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-138\t@ 0xffffff76\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n \t\t\t@ instruction: 0x4618ec5e\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n@@ -11523,22 +11523,22 @@\n \tstrdeq\tr7, [r0], -r4\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tr3, r0, r2, ror pc\n \tandeq\tr4, r0, r6, asr #2\n \tandeq\tr7, r0, r8, asr #14\n get_lum_709():\n-/build/1st/ssocr-2.23.0/imgproc.c:1007\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1007\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2597\t@ 0xfffff5db\n \tldmpl\tr3, {r0, r2, r5, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1008\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1008\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tbcc\tfe446010 <__bss_end__@@Base+0xfe433d68>\n \tblvc\tffa062d8 <__bss_end__@@Base+0xff9f4030>\n \tblvs\t645e78 <__bss_end__@@Base+0x633bd0>\n \tblvs\t1c609c <__bss_end__@@Base+0x1b3df4>\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \tbcc\tfe446024 <__bss_end__@@Base+0xfe433d7c>\n@@ -11550,17 +11550,17 @@\n \tbcc\tfe44603c <__bss_end__@@Base+0xfe433d94>\n \tblvc\tffa06304 <__bss_end__@@Base+0xff9f405c>\n \tblpl\t485ea4 <__bss_end__@@Base+0x473bfc>\n \tblvc\t1860c8 <__bss_end__@@Base+0x173e20>\n \tblvc\t206108 <__bss_end__@@Base+0x1f3e60>\n \tblvc\tff206428 <__bss_end__@@Base+0xff1f4180>\n \tbcc\tfe446094 <__bss_end__@@Base+0xfe433dec>\n-/build/1st/ssocr-2.23.0/imgproc.c:1007\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1007\n \tldrbtmi\tr4, [r9], #-2320\t@ 0xfffff6f0\n-/build/1st/ssocr-2.23.0/imgproc.c:1009\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1009\n \tstmpl\tsl, {r1, r2, r3, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tstc\t7, cr15, [ip], {246}\t@ 0xf6\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n@@ -11571,22 +11571,22 @@\n \tsvccc\t0x00e6e48e\n \tstrmi\tsl, [sl], -ip, asr #12\n \tsvccc\t0x00b27525\n \tandeq\tr7, r0, r2, lsl #14\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r6, lsr #13\n get_lum_601():\n-/build/1st/ssocr-2.23.0/imgproc.c:1013\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1013\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2596\t@ 0xfffff5dc\n \tldmpl\tr3, {r2, r5, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1014\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1014\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tbcc\tfe4460bc <__bss_end__@@Base+0xfe433e14>\n \tblvc\tffa06384 <__bss_end__@@Base+0xff9f40dc>\n \tblvs\t605f24 <__bss_end__@@Base+0x5f3c7c>\n \tblvs\t1c6148 <__bss_end__@@Base+0x1b3ea0>\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \tbcc\tfe4460d0 <__bss_end__@@Base+0xfe433e28>\n@@ -11598,17 +11598,17 @@\n \tbcc\tfe4460e8 <__bss_end__@@Base+0xfe433e40>\n \tblvc\tffa063b0 <__bss_end__@@Base+0xff9f4108>\n \tblpl\t445f50 <__bss_end__@@Base+0x433ca8>\n \tblvc\t186174 <__bss_end__@@Base+0x173ecc>\n \tblvc\t2061b4 <__bss_end__@@Base+0x1f3f0c>\n \tblvc\tff2064d4 <__bss_end__@@Base+0xff1f422c>\n \tbcc\tfe446140 <__bss_end__@@Base+0xfe433e98>\n-/build/1st/ssocr-2.23.0/imgproc.c:1013\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1013\n \tldrbtmi\tr4, [r9], #-2319\t@ 0xfffff6f1\n-/build/1st/ssocr-2.23.0/imgproc.c:1015\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1015\n \tstmpl\tsl, {r0, r2, r3, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tbl\tfedc88d4 <__bss_end__@@Base+0xfedb662c>\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n@@ -11618,322 +11618,322 @@\n \tsvccc\t0x00e2c8b4\n \tsvcls\t0x00be76c9\n \tsvccc\t0x00bd2f1a\n \tandeq\tr7, r0, r6, asr r6\n \tandeq\tr0, r0, r0, lsl #2\n \tstrdeq\tr7, [r0], -sl\n get_lum_lin():\n-/build/1st/ssocr-2.23.0/imgproc.c:1019\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1019\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2579\t@ 0xfffff5ed\n \tldmpl\tr3, {r0, r1, r4, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1020\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1020\n \tldmdavs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n \tldmdavs\tfp!, {r1, r3, r4, sl, lr}^\n \tldrmi\tr6, [sl], #-2267\t@ 0xfffff725\n \tcmppl\tr6, #1342177284\t@ 0x50000004\t@ \n \tcmppl\tr5, #1342177292\t@ 0x5000000c\t@ \n \tsmlabbcc\tr2, r3, fp, pc\t@ \n \tbne\tff2d08ac <__bss_end__@@Base+0xff2be604>\n-/build/1st/ssocr-2.23.0/imgproc.c:1019\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1019\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:1021\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1021\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tbl\t1e48950 <__bss_end__@@Base+0x1e366a8>\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr7, r0, lr, lsr #11\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, lr, ror r5\n get_lum_min():\n-/build/1st/ssocr-2.23.0/imgproc.c:1025\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1025\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2582\t@ 0xfffff5ea\n \tldmpl\tr3, {r1, r2, r4, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1026\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1026\n \tldmdavs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1027\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1027\n \tble\t1db418 <__bss_end__@@Base+0x1c9170>\n-/build/1st/ssocr-2.23.0/imgproc.c:1027 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1027 (discriminator 1)\n \tldmvs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tsvclt\t0x00a84293\n \tand\tr4, r6, r3, lsl r6\n-/build/1st/ssocr-2.23.0/imgproc.c:1028 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1028 (discriminator 2)\n \tldmvs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1027 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1027 (discriminator 2)\n \tsvclt\t0x00a84293\n \tstmdbmi\tsl, {r0, r1, r4, r9, sl, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1025 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1025 (discriminator 5)\n \tbmi\t21bbb8 <__bss_end__@@Base+0x209910>\n-/build/1st/ssocr-2.23.0/imgproc.c:1029 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1029 (discriminator 5)\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-138\t@ 0xffffff76\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n-/build/1st/ssocr-2.23.0/imgproc.c:1029\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1029\n \tldrmi\tlr, [r8], -r2, asr #22\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n \tandeq\tr7, r0, sl, asr #10\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r0, lsl r5\n get_lum_max():\n-/build/1st/ssocr-2.23.0/imgproc.c:1033\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1033\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2582\t@ 0xfffff5ea\n \tldmpl\tr3, {r1, r2, r4, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1034\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1034\n \tldmdavs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1035\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1035\n \tsfmle\tf4, 4, [r7, #-616]\t@ 0xfffffd98\n-/build/1st/ssocr-2.23.0/imgproc.c:1035 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1035 (discriminator 1)\n \tldmvs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tsvclt\t0x00b84293\n \tand\tr4, r6, r3, lsl r6\n-/build/1st/ssocr-2.23.0/imgproc.c:1036 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1036 (discriminator 2)\n \tldmvs\tsl, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1035 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1035 (discriminator 2)\n \tsvclt\t0x00b84293\n \tstmdbmi\tsl, {r0, r1, r4, r9, sl, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1033 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1033 (discriminator 5)\n \tbmi\t21bc28 <__bss_end__@@Base+0x209980>\n-/build/1st/ssocr-2.23.0/imgproc.c:1037 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1037 (discriminator 5)\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-138\t@ 0xffffff76\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n-/build/1st/ssocr-2.23.0/imgproc.c:1037\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1037\n \tldrmi\tlr, [r8], -sl, lsl #22\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n \tldrdeq\tr7, [r0], -sl\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r0, lsr #9\n get_lum_red():\n-/build/1st/ssocr-2.23.0/imgproc.c:1041\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1041\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2572\t@ 0xfffff5f4\n \tldmpl\tr3, {r2, r3, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1042\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1042\n \tldmdavs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1041\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1041\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:1043\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1043\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tb\tff948a78 <__bss_end__@@Base+0xff9367d0>\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr7, r0, sl, ror #8\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r6, asr r4\n get_lum_green():\n-/build/1st/ssocr-2.23.0/imgproc.c:1047\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1047\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2572\t@ 0xfffff5f4\n \tldmpl\tr3, {r2, r3, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1048\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1048\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1047\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1047\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:1049\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1049\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tb\tff048ac0 <__bss_end__@@Base+0xff036818>\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr7, r0, r2, lsr #8\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, lr, lsl #8\n get_lum_blue():\n-/build/1st/ssocr-2.23.0/imgproc.c:1053\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1053\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2572\t@ 0xfffff5f4\n \tldmpl\tr3, {r2, r3, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1054\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1054\n \tldmvs\tfp, {r0, r1, r3, r4, r5, r6, fp, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1053\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1053\n \tldrbtmi\tr4, [r9], #-2313\t@ 0xfffff6f7\n-/build/1st/ssocr-2.23.0/imgproc.c:1055\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1055\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tb\tfe748b08 <__bss_end__@@Base+0xfe736860>\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tldrdeq\tr7, [r0], -sl\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r6, asr #7\n clip():\n-/build/1st/ssocr-2.23.0/imgproc.c:1059\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1059\n \taddlt\tfp, r6, r0, lsl #11\n \trscsvs\tsl, r8, r0, lsl #30\n \tldrhtvs\tr6, [sl], #-9\n \tldrbtmi\tr4, [sl], #-2577\t@ 0xfffff5ef\n \tldmpl\tr3, {r0, r4, r8, r9, fp, lr}^\n \tcmnvs\tfp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1060\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1060\n \tldmvs\tfp!, {r1, r3, r4, r5, r6, r7, fp, sp, lr}\n \tblle\t15b5d0 <__bss_end__@@Base+0x149328>\n-/build/1st/ssocr-2.23.0/imgproc.c:1060 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1060 (discriminator 1)\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, fp, sp, lr}^\n \tsvclt\t0x00a84293\n \tand\tr4, r0, r3, lsl r6\n-/build/1st/ssocr-2.23.0/imgproc.c:1060 (discriminator 2)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1060 (discriminator 2)\n \tstmdbmi\tsl, {r0, r1, r3, r4, r5, r7, fp, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1059 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1059 (discriminator 5)\n \tbmi\t21bd60 <__bss_end__@@Base+0x209ab8>\n-/build/1st/ssocr-2.23.0/imgproc.c:1061 (discriminator 5)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1061 (discriminator 5)\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tsubsmi\tr6, r1, sl, ror r9\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n-/build/1st/ssocr-2.23.0/imgproc.c:1061\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1061\n \tldrmi\tlr, [r8], -lr, ror #20\n \tssatmi\tr3, #30, r8, lsl #14\n \tsvclt\t0x0000bd80\n \tandeq\tr7, r0, lr, lsl #7\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr7, r0, r8, ror #6\n save_image():\n-/build/1st/ssocr-2.23.0/imgproc.c:1066\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1066\n \tumulllt\tfp, sp, r0, r5\n \tcmnvs\tr8, r0, lsl #30\n \trscsvs\tr6, sl, r9, lsr r1\n \tldcvs\t0, cr6, [fp], #-748\t@ 0xfffffd14\n \tmcrrmi\t0, 7, r6, sl, cr11\n \tbmi\t129bdac <__bss_end__@@Base+0x1289b04>\n \tblmi\t129bda8 <__bss_end__@@Base+0x1289b00>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f62fb\n \tmovwcs\tr0, #768\t@ 0x300\n-/build/1st/ssocr-2.23.0/imgproc.c:1069\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1069\n \tblmi\t11e33bc <__bss_end__@@Base+0x11d1114>\n-/build/1st/ssocr-2.23.0/imgproc.c:1070\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1070\n \trsbsvs\tr4, fp, #2063597568\t@ 0x7b000000\n-/build/1st/ssocr-2.23.0/imgproc.c:1072\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1072\n \tb\tac8bb0 <__bss_end__@@Base+0xab6908>\n \tldmdbvs\tr8!, {r3, r4, r5, r7, r9, sp, lr}\n-/build/1st/ssocr-2.23.0/imgproc.c:1073\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1073\n \tb\t18c8bb8 <__bss_end__@@Base+0x18b6910>\n-/build/1st/ssocr-2.23.0/imgproc.c:1076\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1076\n \tblmi\t10e4ec8 <__bss_end__@@Base+0x10d2c20>\n \t\t\t@ instruction: 0x4618447b\n \tb\tfe348bc4 <__bss_end__@@Base+0xfe33691c>\n \tblcs\t1c3fc <__bss_end__@@Base+0xa154>\n \tbvs\t1efeff8 <__bss_end__@@Base+0x1eecd50>\n-/build/1st/ssocr-2.23.0/imgproc.c:1077\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1077\n \tldmvs\tfp!, {r0, r1, r3, r4, r5, r7, sp, lr}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1079\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1079\n \tandle\tr2, r2, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1080\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1080\n \teorsvs\tr6, fp, #16449536\t@ 0xfb0000\n \t\t\t@ instruction: 0x212ee00a\n-/build/1st/ssocr-2.23.0/imgproc.c:1082\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1082\n \t\t\t@ instruction: 0xf7f668b8\n \teorsvs\tlr, r8, #148, 18\t@ 0x250000\n-/build/1st/ssocr-2.23.0/imgproc.c:1083\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1083\n \tblcs\t254fc <__bss_end__@@Base+0x13254>\n \tbvs\tefec1c <__bss_end__@@Base+0xeec974>\n-/build/1st/ssocr-2.23.0/imgproc.c:1084\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1084\n \teorsvs\tr3, fp, #67108864\t@ 0x4000000\n-/build/1st/ssocr-2.23.0/imgproc.c:1086\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1086\n \tblcs\t25508 <__bss_end__@@Base+0x13260>\n \tldmdavs\tfp!, {r0, r4, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1087\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1087\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1088\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1088\n \tstmiapl\tr3!, {r1, r4, r5, r8, r9, fp, lr}^\n \tldmdbvs\tfp!, {r3, r4, fp, sp, lr}^\n \tldmdbmi\tr1!, {r1, r3, r4, r5, r9, fp, sp, lr}\n \t\t\t@ instruction: 0xf7f64479\n \tbvs\te4543c <__bss_end__@@Base+0xe33194>\n-/build/1st/ssocr-2.23.0/imgproc.c:1089\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1089\n \tb\tc8c18 <__bss_end__@@Base+0xb6970>\n \tldmdavs\tfp!, {r1, r4, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1091\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1091\n \tmovweq\tpc, #16387\t@ 0x4003\t@ \n \tandle\tr2, r8, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1092\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1092\n \tstmiapl\tr3!, {r0, r3, r5, r8, r9, fp, lr}^\n \tldmdbvs\tsl!, {r0, r1, r3, r4, fp, sp, lr}^\n \tldrbtmi\tr4, [r9], #-2345\t@ 0xfffff6d7\n \t\t\t@ instruction: 0xf7f64618\n \tblmi\ta45418 <__bss_end__@@Base+0xa33170>\n-/build/1st/ssocr-2.23.0/imgproc.c:1093\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1093\n \t\t\t@ instruction: 0x4618447b\n \tstmib\tlr!, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1096\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1096\n \t\t\t@ instruction: 0xf003687b\n \tblcs\tb880 \n \tblmi\t83ec94 <__bss_end__@@Base+0x82c9ec>\n-/build/1st/ssocr-2.23.0/imgproc.c:1097\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1097\n \tldmdavs\tr8, {r0, r1, r5, r6, r7, fp, ip, lr}\n \tldmdbvs\tsl!, {r0, r1, r3, r4, r5, r7, fp, sp, lr}^\n \tldrbtmi\tr4, [r9], #-2337\t@ 0xfffff6df\n \tldmib\tsl, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1098\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1098\n \ttsteq\tip, #-1073741823\t@ 0xc0000001\t@ \n \tldmvs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tstmdb\tr4, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1099\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1099\n \tblcs\t25480 <__bss_end__@@Base+0x131d8>\n \tldmibvs\tfp!, {r4, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1099 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1099 (discriminator 1)\n \tandle\tr2, sp, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1100\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1100\n \tstmiapl\tr3!, {r0, r2, r4, r8, r9, fp, lr}^\n \tldmvs\tfp!, {r3, r4, fp, sp, lr}\n \tldrbtmi\tr4, [sl], #-2584\t@ 0xfffff5e8\n \tldrbtmi\tr4, [r9], #-2328\t@ 0xfffff6e8\n \tstmib\tr4, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1101\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1101\n \t\t\t@ instruction: 0x461869fb\n \t\t\t@ instruction: 0xf8caf000\n-/build/1st/ssocr-2.23.0/imgproc.c:1103\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1103\n \t\t\t@ instruction: 0xf7f66ab8\n \tsvclt\t0x0000e9f4\n-/build/1st/ssocr-2.23.0/imgproc.c:1066\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1066\n \tldrbtmi\tr4, [sl], #-2579\t@ 0xfffff5ed\n-/build/1st/ssocr-2.23.0/imgproc.c:1104\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1104\n \tldmpl\tr3, {r3, r8, r9, fp, lr}^\n \tbvs\tffee4d34 <__bss_end__@@Base+0xffed2a8c>\n \t\t\t@ instruction: 0xf04f405a\n \tandle\tr0, r1, r0, lsl #6\n \tstmib\tr8, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0x46bd3734\n \tsvclt\t0x0000bd90\n@@ -11947,96 +11947,96 @@\n \tandeq\tr3, r0, r6, ror #25\n \tstrdeq\tr3, [r0], -ip\n \tandeq\tr3, r0, r2, ror #25\n \tandeq\tr3, r0, r2, asr sl\n \tldrdeq\tr3, [r0], -r6\n \tandeq\tr7, r0, lr, lsl r2\n parse_lum():\n-/build/1st/ssocr-2.23.0/imgproc.c:1108\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1108\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2623\t@ 0xfffff5c1\n \tldmpl\tr3, {r0, r1, r2, r3, r4, r5, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1109\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1109\n \tldrbtmi\tr4, [fp], #-2877\t@ 0xfffff4c3\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tstmia\tr4!, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1c548 <__bss_end__@@Base+0xa2a0>\n \t\t\t@ instruction: 0xf000d104\n-/build/1st/ssocr-2.23.0/imgproc.c:1110\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1110\n \teorcs\tpc, sl, r7, lsr sl\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1111\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1111\n \tstmib\tr4!, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1112\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1112\n \tldrbtmi\tr4, [fp], #-2871\t@ 0xfffff4c9\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tldm\tr6, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1c564 <__bss_end__@@Base+0xa2bc>\n \tmovwcs\tsp, #257\t@ 0x101\n-/build/1st/ssocr-2.23.0/imgproc.c:1113\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1113\n \tblmi\td02e94 <__bss_end__@@Base+0xcf0bec>\n-/build/1st/ssocr-2.23.0/imgproc.c:1114\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1114\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f66878\n \tstrmi\tlr, [r3], -ip, asr #17\n \ttstle\tr1, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1115\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1115\n \tsub\tr2, r2, r1, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:1116\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1116\n \tldrbtmi\tr4, [fp], #-2862\t@ 0xfffff4d2\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tstmia\tr0, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1c590 <__bss_end__@@Base+0xa2e8>\n \tmovwcs\tsp, #8449\t@ 0x2101\n-/build/1st/ssocr-2.23.0/imgproc.c:1117\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1117\n \tblmi\tac2e68 <__bss_end__@@Base+0xab0bc0>\n-/build/1st/ssocr-2.23.0/imgproc.c:1118\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1118\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f66878\n \t\t\t@ instruction: 0x4603e8b6\n \ttstle\tr1, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1119\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1119\n \teor\tr2, ip, r3, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:1120\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1120\n \tldrbtmi\tr4, [fp], #-2853\t@ 0xfffff4db\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tstmia\tsl!, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblcs\t1c5bc <__bss_end__@@Base+0xa314>\n \tmovwcs\tsp, #16641\t@ 0x4101\n-/build/1st/ssocr-2.23.0/imgproc.c:1121\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1121\n \tblmi\t882e3c <__bss_end__@@Base+0x870b94>\n-/build/1st/ssocr-2.23.0/imgproc.c:1122\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1122\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f66878\n \tstrmi\tlr, [r3], -r0, lsr #17\n \ttstle\tr1, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1123\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1123\n \tands\tr2, r6, r5, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:1124\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1124\n \tldrbtmi\tr4, [fp], #-2844\t@ 0xfffff4e4\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tldm\tr4, {r1, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblcs\t1c5e8 <__bss_end__@@Base+0xa340>\n \tmovwcs\tsp, #24833\t@ 0x6101\n-/build/1st/ssocr-2.23.0/imgproc.c:1125\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1125\n \tblmi\t642e10 <__bss_end__@@Base+0x630b68>\n-/build/1st/ssocr-2.23.0/imgproc.c:1126\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1126\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f66878\n \tstrmi\tlr, [r3], -sl, lsl #17\n \ttstle\tr1, r0, lsl #22\n-/build/1st/ssocr-2.23.0/imgproc.c:1127\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1127\n \tand\tr2, r0, r7, lsl #6\n-/build/1st/ssocr-2.23.0/imgproc.c:1129\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1129\n \tldmdbmi\tr3, {r0, r8, r9, sp}\n-/build/1st/ssocr-2.23.0/imgproc.c:1108\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1108\n \tbmi\t21bfe4 <__bss_end__@@Base+0x209d3c>\n-/build/1st/ssocr-2.23.0/imgproc.c:1131\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1131\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-138\t@ 0xffffff76\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f6d001\n \tldrmi\tlr, [r8], -ip, lsr #18\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n@@ -12049,29 +12049,29 @@\n \tandeq\tr3, r0, r4, lsr ip\n \tandeq\tr3, r0, r6, lsr #24\n \tandeq\tr3, r0, r8, lsl ip\n \tandeq\tr3, r0, r6, lsl #24\n \tstrdeq\tr3, [r0], -r8\n \tandeq\tr7, r0, r4, ror #1\n report_imlib_error():\n-/build/1st/ssocr-2.23.0/imgproc.c:1135\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1135\n \tumulllt\tfp, r5, r0, r5\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [ip], #-3188\t@ 0xfffff38c\n \tldrbtmi\tr4, [sl], #-2676\t@ 0xfffff58c\n \tldmpl\tr3, {r2, r4, r5, r6, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1136\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1136\n \tstmiapl\tr3!, {r1, r4, r5, r6, r8, r9, fp, lr}^\n \tandscs\tr6, sl, #1769472\t@ 0x1b0000\n \tldmdami\tr1!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \tldmdavs\tfp!, {r1, r2, r3, r6, r7, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/imgproc.c:1137\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1137\n \tvqdmulh.s\td2, d0, d14\n \tandge\tr8, r2, #185\t@ 0xb9\n \teorcc\tpc, r3, r2, asr r8\t@ \n \t\t\t@ instruction: 0x4710441a\n \tandeq\tr0, r0, sp, lsr r0\n \tandeq\tr0, r0, r1, asr r0\n \tandeq\tr0, r0, r5, rrx\n@@ -12083,115 +12083,115 @@\n \tldrdeq\tr0, [r0], -sp\n \tstrdeq\tr0, [r0], -r1\n \tandeq\tr0, r0, r5, lsl #2\n \tandeq\tr0, r0, r9, lsl r1\n \tandeq\tr0, r0, sp, lsr #2\n \tandeq\tr0, r0, r1, asr #2\n \tandeq\tr0, r0, r5, asr r1\n-/build/1st/ssocr-2.23.0/imgproc.c:1139\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1139\n \tstmiapl\tr3!, {r1, r3, r4, r6, r8, r9, fp, lr}^\n \tandscs\tr6, r6, #1769472\t@ 0x1b0000\n \tldmdami\tsl, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \tumulls\tlr, r5, lr, r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1142\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1142\n \tstmiapl\tr3!, {r0, r2, r4, r6, r8, r9, fp, lr}^\n \teorcs\tr6, r5, #1769472\t@ 0x1b0000\n \tldmdami\tr6, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \tumull\tlr, fp, r4, r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1145\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1145\n \tstmiapl\tr3!, {r4, r6, r8, r9, fp, lr}^\n \teorcs\tr6, r3, #1769472\t@ 0x1b0000\n \tldmdami\tr2, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \tadd\tlr, r1, sl, lsl #17\n-/build/1st/ssocr-2.23.0/imgproc.c:1148\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1148\n \tstmiapl\tr3!, {r0, r1, r3, r6, r8, r9, fp, lr}^\n \teorcs\tr6, fp, #1769472\t@ 0x1b0000\n \tstmdami\tlr, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \trsbs\tlr, r7, r0, lsl #17\n-/build/1st/ssocr-2.23.0/imgproc.c:1151\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1151\n \tstmiapl\tr3!, {r1, r2, r6, r8, r9, fp, lr}^\n \teorcs\tr6, fp, #1769472\t@ 0x1b0000\n \tstmdami\tsl, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \trsb\tlr, sp, r6, ror r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1154\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1154\n \tstmiapl\tr3!, {r0, r6, r8, r9, fp, lr}^\n \tandscs\tr6, pc, #1769472\t@ 0x1b0000\n \tstmdami\tr6, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \trsb\tlr, r3, ip, ror #16\n-/build/1st/ssocr-2.23.0/imgproc.c:1157\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1157\n \tstmiapl\tr3!, {r2, r3, r4, r5, r8, r9, fp, lr}^\n \teorcs\tr6, sp, #1769472\t@ 0x1b0000\n \tstmdami\tr2, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f64478\n \tsubs\tlr, r9, r2, ror #16\n-/build/1st/ssocr-2.23.0/imgproc.c:1160\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1160\n \tstmiapl\tr3!, {r0, r1, r2, r4, r5, r8, r9, fp, lr}^\n \teorcs\tr6, lr, #1769472\t@ 0x1b0000\n \tldmdami\tlr!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \tsub\tlr, pc, r8, asr r8\t@ \n-/build/1st/ssocr-2.23.0/imgproc.c:1163\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1163\n \tstmiapl\tr3!, {r1, r4, r5, r8, r9, fp, lr}^\n \teorscs\tr6, r3, #1769472\t@ 0x1b0000\n \tldmdami\tsl!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \tsub\tlr, r5, lr, asr #16\n-/build/1st/ssocr-2.23.0/imgproc.c:1166\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1166\n \tstmiapl\tr3!, {r0, r2, r3, r5, r8, r9, fp, lr}^\n \teorcs\tr6, r9, #1769472\t@ 0x1b0000\n \tldmdami\tr6!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \teors\tlr, fp, r4, asr #16\n-/build/1st/ssocr-2.23.0/imgproc.c:1169\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1169\n \tstmiapl\tr3!, {r3, r5, r8, r9, fp, lr}^\n \tandscs\tr6, pc, #1769472\t@ 0x1b0000\n \tldmdami\tr2!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \teors\tlr, r1, sl, lsr r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1172\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1172\n \tstmiapl\tr3!, {r0, r1, r5, r8, r9, fp, lr}^\n \teorcs\tr6, r9, #1769472\t@ 0x1b0000\n \tstmdami\tlr!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \teor\tlr, r7, r0, lsr r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1175\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1175\n \tstmiapl\tr3!, {r1, r2, r3, r4, r8, r9, fp, lr}^\n \teorcs\tr6, ip, #1769472\t@ 0x1b0000\n \tstmdami\tsl!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \tands\tlr, sp, r6, lsr #16\n-/build/1st/ssocr-2.23.0/imgproc.c:1178\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1178\n \tstmiapl\tr3!, {r0, r3, r4, r8, r9, fp, lr}^\n \teorcs\tr6, r3, #1769472\t@ 0x1b0000\n \tstmdami\tr6!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \tands\tlr, r3, ip, lsl r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1181\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1181\n \tstmiapl\tr3!, {r2, r4, r8, r9, fp, lr}^\n \tandscs\tr6, r9, #1769472\t@ 0x1b0000\n \tstmdami\tr2!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f64478\n \tand\tlr, r9, r2, lsl r8\n-/build/1st/ssocr-2.23.0/imgproc.c:1184\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1184\n \tstmiapl\tr3!, {r0, r1, r2, r3, r8, r9, fp, lr}^\n \tldmdavs\tsl!, {r0, r1, r3, r4, fp, sp, lr}^\n \tldrbtmi\tr4, [r9], #-2334\t@ 0xfffff6e2\n \t\t\t@ instruction: 0xf7f64618\n \tsvclt\t0x0000e81a\n-/build/1st/ssocr-2.23.0/imgproc.c:1187\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1187\n \tbmi\t73ac0c <__bss_end__@@Base+0x728964>\n-/build/1st/ssocr-2.23.0/imgproc.c:1135\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1135\n \tblmi\t21c1f8 <__bss_end__@@Base+0x209f50>\n-/build/1st/ssocr-2.23.0/imgproc.c:1187\n+/build/2/ssocr-2.23.0/2nd/imgproc.c:1187\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f6d001\n \tldrcc\tlr, [r4, -r4, lsr #16]\n \tldclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr7, r0, sl, lsl #1\n@@ -12214,85 +12214,85 @@\n \tandeq\tr3, r0, r4, lsr #24\n \tandeq\tr3, r0, r0, asr #24\n \tandeq\tr3, r0, r0, asr ip\n \tandeq\tr3, r0, sl, asr ip\n \tldrdeq\tr6, [r0], -r4\n \tandeq\tr0, r0, r0\n print_lum_key():\n-/build/1st/ssocr-2.23.0/help.c:34\n+/build/2/ssocr-2.23.0/2nd/help.c:34\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\tf23174 <__bss_end__@@Base+0xf10ecc>\n \tblmi\tf1c27c <__bss_end__@@Base+0xf09fd4>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tldmdavs\tfp!, {r8, r9}^\n-/build/1st/ssocr-2.23.0/help.c:35\n+/build/2/ssocr-2.23.0/2nd/help.c:35\n \tldmdale\tr5, {r0, r1, r2, r8, r9, fp, sp}^\n \t\t\t@ instruction: 0xf852a202\n \tldrmi\tr3, [sl], #-35\t@ 0xffffffdd\n \tsvclt\t0x00004710\n \tandeq\tr0, r0, r1, lsr #32\n \tandeq\tr0, r0, r1, lsr r0\n \tandeq\tr0, r0, r1, asr #32\n \tandeq\tr0, r0, r1, asr r0\n \tandeq\tr0, r0, r1, rrx\n \tandeq\tr0, r0, r1, ror r0\n \tandeq\tr0, r0, r1, lsl #1\n \tmuleq\tr0, r1, r0\n-/build/1st/ssocr-2.23.0/help.c:36\n+/build/2/ssocr-2.23.0/2nd/help.c:36\n \tandcs\tr6, r6, #3866624\t@ 0x3b0000\n \tstmdami\tip!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tmlas\tpc, ip, pc, lr\t@ \n-/build/1st/ssocr-2.23.0/help.c:37\n+/build/2/ssocr-2.23.0/2nd/help.c:37\n \tandcs\tr6, r6, #3866624\t@ 0x3b0000\n \tstmdami\tr9!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tmlas\tr7, r4, pc, lr\t@ \n-/build/1st/ssocr-2.23.0/help.c:38\n+/build/2/ssocr-2.23.0/2nd/help.c:38\n \tandcs\tr6, r6, #3866624\t@ 0x3b0000\n \tstmdami\tr6!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \teor\tlr, pc, ip, lsl #31\n-/build/1st/ssocr-2.23.0/help.c:39\n+/build/2/ssocr-2.23.0/2nd/help.c:39\n \tandcs\tr6, r7, #3866624\t@ 0x3b0000\n \tstmdami\tr3!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \teor\tlr, r7, r4, lsl #31\n-/build/1st/ssocr-2.23.0/help.c:40\n+/build/2/ssocr-2.23.0/2nd/help.c:40\n \tandcs\tr6, r7, #3866624\t@ 0x3b0000\n \tstmdami\tr0!, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tands\tlr, pc, ip, ror pc\t@ \n-/build/1st/ssocr-2.23.0/help.c:41\n+/build/2/ssocr-2.23.0/2nd/help.c:41\n \tandcs\tr6, r3, #3866624\t@ 0x3b0000\n \tldmdami\tsp, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tands\tlr, r7, r4, ror pc\n-/build/1st/ssocr-2.23.0/help.c:42\n+/build/2/ssocr-2.23.0/2nd/help.c:42\n \tandcs\tr6, r5, #3866624\t@ 0x3b0000\n \tldmdami\tsl, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tand\tlr, pc, ip, ror #30\n-/build/1st/ssocr-2.23.0/help.c:43\n+/build/2/ssocr-2.23.0/2nd/help.c:43\n \tandcs\tr6, r4, #3866624\t@ 0x3b0000\n \tldmdami\tr7, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tand\tlr, r7, r4, ror #30\n-/build/1st/ssocr-2.23.0/help.c:44\n+/build/2/ssocr-2.23.0/2nd/help.c:44\n \tandcs\tr6, r7, #3866624\t@ 0x3b0000\n \tldmdami\tr4, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tsvclt\t0x0000ef5c\n-/build/1st/ssocr-2.23.0/help.c:46\n+/build/2/ssocr-2.23.0/2nd/help.c:46\n \tbmi\t4bad64 <__bss_end__@@Base+0x4a8abc>\n-/build/1st/ssocr-2.23.0/help.c:34\n+/build/2/ssocr-2.23.0/2nd/help.c:34\n \tblmi\t1dc350 <__bss_end__@@Base+0x1ca0a8>\n-/build/1st/ssocr-2.23.0/help.c:46\n+/build/2/ssocr-2.23.0/2nd/help.c:46\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f5d001\n \t\t\t@ instruction: 0x3710ef78\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr6, r0, r0, asr lr\n@@ -12304,52 +12304,52 @@\n \tandeq\tr3, r0, r8, lsl #23\n \tandeq\tr3, r0, r0, lsl #23\n \tandeq\tr3, r0, r4, ror fp\n \tandeq\tr3, r0, ip, ror #22\n \tandeq\tr3, r0, r4, ror #22\n \tandeq\tr6, r0, ip, ror sp\n print_lum_help():\n-/build/1st/ssocr-2.23.0/help.c:50\n+/build/2/ssocr-2.23.0/2nd/help.c:50\n \taddlt\tfp, r2, r0, lsl #11\n \tbmi\t836db8 <__bss_end__@@Base+0x824b10>\n \tblmi\t81c3a4 <__bss_end__@@Base+0x80a0fc>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f607b\n \tblmi\t78bdc8 <__bss_end__@@Base+0x779b20>\n-/build/1st/ssocr-2.23.0/help.c:51\n+/build/2/ssocr-2.23.0/2nd/help.c:51\n \t\t\t@ instruction: 0x4618447b\n \tsvc\t0x0064f7f5\n-/build/1st/ssocr-2.23.0/help.c:52\n+/build/2/ssocr-2.23.0/2nd/help.c:52\n \tldrbtmi\tr4, [fp], #-2844\t@ 0xfffff4e4\n \t\t\t@ instruction: 0xf7f54618\n \tblmi\t706f5c <__bss_end__@@Base+0x6f4cb4>\n-/build/1st/ssocr-2.23.0/help.c:53\n+/build/2/ssocr-2.23.0/2nd/help.c:53\n \t\t\t@ instruction: 0x4618447b\n \tsvc\t0x005af7f5\n-/build/1st/ssocr-2.23.0/help.c:54\n+/build/2/ssocr-2.23.0/2nd/help.c:54\n \tldrbtmi\tr4, [fp], #-2841\t@ 0xfffff4e7\n \t\t\t@ instruction: 0xf7f54618\n \tblmi\t646f48 <__bss_end__@@Base+0x634ca0>\n-/build/1st/ssocr-2.23.0/help.c:55\n+/build/2/ssocr-2.23.0/2nd/help.c:55\n \t\t\t@ instruction: 0x4618447b\n \tsvc\t0x0050f7f5\n-/build/1st/ssocr-2.23.0/help.c:56\n+/build/2/ssocr-2.23.0/2nd/help.c:56\n \tldrbtmi\tr4, [fp], #-2838\t@ 0xfffff4ea\n \t\t\t@ instruction: 0xf7f54618\n \tblmi\t586f34 <__bss_end__@@Base+0x574c8c>\n-/build/1st/ssocr-2.23.0/help.c:57\n+/build/2/ssocr-2.23.0/2nd/help.c:57\n \t\t\t@ instruction: 0x4618447b\n \tsvc\t0x0046f7f5\n-/build/1st/ssocr-2.23.0/help.c:58\n+/build/2/ssocr-2.23.0/2nd/help.c:58\n \tldrbtmi\tr4, [fp], #-2835\t@ 0xfffff4ed\n \t\t\t@ instruction: 0xf7f54618\n \tsvclt\t0x0000ef42\n-/build/1st/ssocr-2.23.0/help.c:50\n+/build/2/ssocr-2.23.0/2nd/help.c:50\n \tldrbtmi\tr4, [sl], #-2577\t@ 0xfffff5ef\n-/build/1st/ssocr-2.23.0/help.c:59\n+/build/2/ssocr-2.23.0/2nd/help.c:59\n \tldmpl\tr3, {r0, r1, r2, r8, r9, fp, lr}^\n \tldmdavs\tfp!, {r1, r3, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f405a\n \tandle\tr0, r1, r0, lsl #6\n \tsvc\t0x001cf7f5\n \tldrtmi\tr3, [sp], r8, lsl #14\n \tsvclt\t0x0000bd80\n@@ -12361,49 +12361,49 @@\n \tmuleq\tr0, sl, fp\n \tandeq\tr3, r0, r4, asr #23\n \tldrdeq\tr3, [r0], -r6\n \tandeq\tr3, r0, r4, ror #23\n \tstrdeq\tr3, [r0], -r2\n \tandeq\tr6, r0, r6, asr #25\n cs_key():\n-/build/1st/ssocr-2.23.0/help.c:63\n+/build/2/ssocr-2.23.0/2nd/help.c:63\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2589\t@ 0xfffff5e3\n \tldmpl\tr3, {r0, r2, r3, r4, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/help.c:64\n+/build/2/ssocr-2.23.0/2nd/help.c:64\n \tblcs\t12546c <__bss_end__@@Base+0x1131c4>\n \tandge\tsp, r2, #1900544\t@ 0x1d0000\n \teorcc\tpc, r3, r2, asr r8\t@ \n \t\t\t@ instruction: 0x4710441a\n \tandeq\tr0, r0, r5, lsl r0\n \tandeq\tr0, r0, fp, lsl r0\n \tandeq\tr0, r0, r1, lsr #32\n \tandeq\tr0, r0, r7, lsr #32\n \tandeq\tr0, r0, sp, lsr #32\n-/build/1st/ssocr-2.23.0/help.c:65\n+/build/2/ssocr-2.23.0/2nd/help.c:65\n \tldrbtmi\tr4, [fp], #-2834\t@ 0xfffff4ee\n \tblmi\t4c32dc <__bss_end__@@Base+0x4b1034>\n-/build/1st/ssocr-2.23.0/help.c:66\n+/build/2/ssocr-2.23.0/2nd/help.c:66\n \tand\tr4, sl, fp, ror r4\n-/build/1st/ssocr-2.23.0/help.c:67\n+/build/2/ssocr-2.23.0/2nd/help.c:67\n \tldrbtmi\tr4, [fp], #-2833\t@ 0xfffff4ef\n \tblmi\t4832d0 <__bss_end__@@Base+0x471028>\n-/build/1st/ssocr-2.23.0/help.c:68\n+/build/2/ssocr-2.23.0/2nd/help.c:68\n \tand\tr4, r4, fp, ror r4\n-/build/1st/ssocr-2.23.0/help.c:69\n+/build/2/ssocr-2.23.0/2nd/help.c:69\n \tldrbtmi\tr4, [fp], #-2832\t@ 0xfffff4f0\n \tblmi\t4432c4 <__bss_end__@@Base+0x43101c>\n-/build/1st/ssocr-2.23.0/help.c:70\n+/build/2/ssocr-2.23.0/2nd/help.c:70\n \tldmdbmi\tr0, {r0, r1, r3, r4, r5, r6, sl, lr}\n-/build/1st/ssocr-2.23.0/help.c:63\n+/build/2/ssocr-2.23.0/2nd/help.c:63\n \tbmi\t21c4ac <__bss_end__@@Base+0x20a204>\n-/build/1st/ssocr-2.23.0/help.c:72\n+/build/2/ssocr-2.23.0/2nd/help.c:72\n \tldmdavs\tr1, {r1, r3, r7, fp, ip, lr}\n \tldrshmi\tr6, [r1], #-138\t@ 0xffffff76\n \tandeq\tpc, r0, #79\t@ 0x4f\n \t\t\t@ instruction: 0xf7f5d001\n \tldrmi\tlr, [r8], -r8, asr #29\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n@@ -12413,70 +12413,70 @@\n \tandeq\tr3, r0, r8, ror fp\n \tandeq\tr3, r0, sl, ror fp\n \tandeq\tr3, r0, ip, ror fp\n \tandeq\tr3, r0, sl, ror fp\n \tstrdeq\tr3, [r0], -ip\n \tandeq\tr6, r0, ip, lsl ip\n print_cs_key():\n-/build/1st/ssocr-2.23.0/help.c:76\n+/build/2/ssocr-2.23.0/2nd/help.c:76\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\t4233f8 <__bss_end__@@Base+0x411150>\n \tblmi\t41c500 <__bss_end__@@Base+0x40a258>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tldmdavs\tr8!, {r8, r9}^\n-/build/1st/ssocr-2.23.0/help.c:77\n+/build/2/ssocr-2.23.0/2nd/help.c:77\n \t\t\t@ instruction: 0xff9ef7ff\n \tldmdavs\tr9!, {r0, r1, r9, sl, lr}\n \t\t\t@ instruction: 0xf7f54618\n \tsvclt\t0x0000ef02\n-/build/1st/ssocr-2.23.0/help.c:76\n+/build/2/ssocr-2.23.0/2nd/help.c:76\n \tldrbtmi\tr4, [sl], #-2569\t@ 0xfffff5f7\n-/build/1st/ssocr-2.23.0/help.c:78\n+/build/2/ssocr-2.23.0/2nd/help.c:78\n \tldmpl\tr3, {r0, r1, r2, r8, r9, fp, lr}^\n \tldmvs\tfp!, {r1, r3, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f405a\n \tandle\tr0, r1, r0, lsl #6\n \tmcr\t7, 4, pc, cr14, cr5, {7}\t@ \n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n \tandeq\tr6, r0, ip, asr #23\n \tandeq\tr0, r0, r0, lsl #2\n \tandeq\tr6, r0, sl, lsr #23\n print_cs_help():\n-/build/1st/ssocr-2.23.0/help.c:82\n+/build/2/ssocr-2.23.0/2nd/help.c:82\n \taddlt\tfp, r2, r0, lsl #11\n \tbmi\t636f68 <__bss_end__@@Base+0x624cc0>\n \tblmi\t61c554 <__bss_end__@@Base+0x60a2ac>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f607b\n \tblmi\t58bf78 <__bss_end__@@Base+0x579cd0>\n-/build/1st/ssocr-2.23.0/help.c:83\n+/build/2/ssocr-2.23.0/2nd/help.c:83\n \t\t\t@ instruction: 0x4618447b\n \tmcr\t7, 4, pc, cr12, cr5, {7}\t@ \n-/build/1st/ssocr-2.23.0/help.c:84\n+/build/2/ssocr-2.23.0/2nd/help.c:84\n \tldrbtmi\tr4, [fp], #-2836\t@ 0xfffff4ec\n \t\t\t@ instruction: 0xf7f54618\n \tblmi\t506dac <__bss_end__@@Base+0x4f4b04>\n-/build/1st/ssocr-2.23.0/help.c:85\n+/build/2/ssocr-2.23.0/2nd/help.c:85\n \t\t\t@ instruction: 0x4618447b\n \tmcr\t7, 4, pc, cr2, cr5, {7}\t@ \n-/build/1st/ssocr-2.23.0/help.c:86\n+/build/2/ssocr-2.23.0/2nd/help.c:86\n \tldrbtmi\tr4, [fp], #-2833\t@ 0xfffff4ef\n \t\t\t@ instruction: 0xf7f54618\n \tblmi\t446d98 <__bss_end__@@Base+0x434af0>\n-/build/1st/ssocr-2.23.0/help.c:87\n+/build/2/ssocr-2.23.0/2nd/help.c:87\n \t\t\t@ instruction: 0x4618447b\n \tmrc\t7, 3, APSR_nzcv, cr8, cr5, {7}\n-/build/1st/ssocr-2.23.0/help.c:88\n+/build/2/ssocr-2.23.0/2nd/help.c:88\n \tbmi\t3bafac <__bss_end__@@Base+0x3a8d04>\n-/build/1st/ssocr-2.23.0/help.c:82\n+/build/2/ssocr-2.23.0/2nd/help.c:82\n \tblmi\t1dc598 <__bss_end__@@Base+0x1ca2f0>\n-/build/1st/ssocr-2.23.0/help.c:88\n+/build/2/ssocr-2.23.0/2nd/help.c:88\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tsubsmi\tr6, sl, fp, ror r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f5d001\n \tsmlsdcc\tr8, r4, lr, lr\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr6, r0, r8, ror fp\n@@ -12484,45 +12484,45 @@\n \tandeq\tr3, r0, r8, asr #21\n \tandeq\tr3, r0, sl, ror #21\n \tstrdeq\tr3, [r0], -r8\n \tandeq\tr3, r0, lr, lsl fp\n \tandeq\tr3, r0, r4, asr #22\n \tandeq\tr6, r0, r4, lsr fp\n print_version():\n-/build/1st/ssocr-2.23.0/help.c:92\n+/build/2/ssocr-2.23.0/2nd/help.c:92\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2586\t@ 0xfffff5e6\n \tldmpl\tr3, {r1, r3, r4, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/help.c:93\n+/build/2/ssocr-2.23.0/2nd/help.c:93\n \tldrbtmi\tr4, [fp], #-2840\t@ 0xfffff4e8\n \tblmi\t61cc70 <__bss_end__@@Base+0x60a9c8>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56878\n \tldmdavs\tfp!, {r2, r4, r9, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/help.c:95\n+/build/2/ssocr-2.23.0/2nd/help.c:95\n \ttstcs\tr1, r7, asr #4\n \tldrbtmi\tr4, [r8], #-2068\t@ 0xfffff7ec\n \tldcl\t7, cr15, [sl, #980]!\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:97\n+/build/2/ssocr-2.23.0/2nd/help.c:97\n \teorcs\tr6, pc, #8060928\t@ 0x7b0000\n \tldmdami\tr2, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r2, r4, r5, r6, r7, r8, sl, fp, sp, lr, pc}^\n-/build/1st/ssocr-2.23.0/help.c:98\n+/build/2/ssocr-2.23.0/2nd/help.c:98\n \ttstcs\tr1, r2, ror r2\n \tldrbtmi\tr4, [r8], #-2063\t@ 0xfffff7f1\n \tstcl\t7, cr15, [ip, #980]!\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:100\n+/build/2/ssocr-2.23.0/2nd/help.c:100\n \tbmi\t3bb040 <__bss_end__@@Base+0x3a8d98>\n-/build/1st/ssocr-2.23.0/help.c:92\n+/build/2/ssocr-2.23.0/2nd/help.c:92\n \tblmi\t1dc62c <__bss_end__@@Base+0x1ca384>\n-/build/1st/ssocr-2.23.0/help.c:100\n+/build/2/ssocr-2.23.0/2nd/help.c:100\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f5d001\n \tldrcc\tlr, [r0, -sl, lsl #28]\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr6, r0, lr, ror #21\n@@ -12530,563 +12530,563 @@\n \tandeq\tr3, r0, sl, lsr #22\n \tandeq\tr3, r0, ip, lsr #22\n \tandeq\tr3, r0, r2, asr fp\n \tandeq\tr3, r0, ip, lsl #23\n \tandeq\tr3, r0, lr, lsr #23\n \tandeq\tr6, r0, r0, lsr #21\n short_usage():\n-/build/1st/ssocr-2.23.0/help.c:104\n+/build/2/ssocr-2.23.0/2nd/help.c:104\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\t4e356c <__bss_end__@@Base+0x4d12c4>\n \tblmi\t4dc674 <__bss_end__@@Base+0x4ca3cc>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tldmdavs\tsl!, {r8, r9}^\n-/build/1st/ssocr-2.23.0/help.c:105\n+/build/2/ssocr-2.23.0/2nd/help.c:105\n \tldrbtmi\tr4, [fp], #-2832\t@ 0xfffff4f0\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tstcl\t7, cr15, [sl, #980]\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:106\n+/build/2/ssocr-2.23.0/2nd/help.c:106\n \tblmi\t3a5690 <__bss_end__@@Base+0x3933e8>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tsvclt\t0x0000edc4\n-/build/1st/ssocr-2.23.0/help.c:104\n+/build/2/ssocr-2.23.0/2nd/help.c:104\n \tldrbtmi\tr4, [sl], #-2571\t@ 0xfffff5f5\n-/build/1st/ssocr-2.23.0/help.c:108\n+/build/2/ssocr-2.23.0/2nd/help.c:108\n \tldmpl\tr3, {r0, r1, r2, r8, r9, fp, lr}^\n \tldmvs\tfp!, {r1, r3, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f405a\n \tandle\tr0, r1, r0, lsl #6\n \tstcl\t7, cr15, [lr, #980]\t@ 0x3d4\n \tssatmi\tr3, #30, r0, lsl #14\n \tsvclt\t0x0000bd80\n \tandeq\tr6, r0, r8, asr sl\n \tandeq\tr0, r0, r0, lsl #2\n \t\t\t@ instruction: 0x00003bbe\n \tldrdeq\tr3, [r0], -ip\n \tandeq\tr6, r0, sl, lsr #20\n usage():\n-/build/1st/ssocr-2.23.0/help.c:112\n+/build/2/ssocr-2.23.0/2nd/help.c:112\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \t\t\t@ instruction: 0xf8df6039\n \tldrbtmi\tr2, [sl], #-1648\t@ 0xfffff990\n \t\t\t@ instruction: 0x366cf8df\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tldmdavs\tr8!, {r8, r9}\n-/build/1st/ssocr-2.23.0/help.c:113\n+/build/2/ssocr-2.23.0/2nd/help.c:113\n \t\t\t@ instruction: 0xff6ef7ff\n-/build/1st/ssocr-2.23.0/help.c:114\n+/build/2/ssocr-2.23.0/2nd/help.c:114\n \t\t\t@ instruction: 0xf8df687a\n \tldrbtmi\tr3, [fp], #-1628\t@ 0xfffff9a4\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tstc\t7, cr15, [lr, #980]\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:115\n+/build/2/ssocr-2.23.0/2nd/help.c:115\n \teorscs\tr6, r6, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1612\t@ 0xfffff9b4\n \tldcl\t7, cr15, [r4, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:116\n+/build/2/ssocr-2.23.0/2nd/help.c:116\n \teorscs\tr6, pc, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1600\t@ 0xfffff9c0\n \tstcl\t7, cr15, [ip, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:117\n+/build/2/ssocr-2.23.0/2nd/help.c:117\n \teorscs\tr6, ip, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1588\t@ 0xfffff9cc\n \tstcl\t7, cr15, [r4, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:118\n+/build/2/ssocr-2.23.0/2nd/help.c:118\n \tsubcs\tr6, pc, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1576\t@ 0xfffff9d8\n \tldcl\t7, cr15, [ip, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:119\n+/build/2/ssocr-2.23.0/2nd/help.c:119\n \teorcs\tr6, sp, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1564\t@ 0xfffff9e4\n \tldcl\t7, cr15, [r4, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:120\n+/build/2/ssocr-2.23.0/2nd/help.c:120\n \tsubcs\tr6, r2, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1552\t@ 0xfffff9f0\n \tstcl\t7, cr15, [ip, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:121\n+/build/2/ssocr-2.23.0/2nd/help.c:121\n \tsubcs\tr6, r4, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1540\t@ 0xfffff9fc\n \tstcl\t7, cr15, [r4, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:122\n+/build/2/ssocr-2.23.0/2nd/help.c:122\n \tsubscs\tr6, r1, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1528\t@ 0xfffffa08\n \tldc\t7, cr15, [ip, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:123\n+/build/2/ssocr-2.23.0/2nd/help.c:123\n \tsubcs\tr6, r8, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1516\t@ 0xfffffa14\n \tldc\t7, cr15, [r4, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:124\n+/build/2/ssocr-2.23.0/2nd/help.c:124\n \tsubscs\tr6, r0, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1504\t@ 0xfffffa20\n \tstc\t7, cr15, [ip, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:125\n+/build/2/ssocr-2.23.0/2nd/help.c:125\n \teorcs\tr6, sp, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1492\t@ 0xfffffa2c\n \tstc\t7, cr15, [r4, #-980]!\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:126\n+/build/2/ssocr-2.23.0/2nd/help.c:126\n \tsubscs\tr6, r0, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1480\t@ 0xfffffa38\n \tldc\t7, cr15, [ip, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:127\n+/build/2/ssocr-2.23.0/2nd/help.c:127\n \tsubcs\tr6, sl, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1468\t@ 0xfffffa44\n \tldc\t7, cr15, [r4, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:128\n+/build/2/ssocr-2.23.0/2nd/help.c:128\n \tsubcs\tr6, r6, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1456\t@ 0xfffffa50\n \tstc\t7, cr15, [ip, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:129\n+/build/2/ssocr-2.23.0/2nd/help.c:129\n \tsubcs\tr6, sl, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1444\t@ 0xfffffa5c\n \tstc\t7, cr15, [r4, #-980]\t@ 0xfffffc2c\n-/build/1st/ssocr-2.23.0/help.c:130\n+/build/2/ssocr-2.23.0/2nd/help.c:130\n \tsubcs\tr6, pc, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1432\t@ 0xfffffa68\n \tldcl\t7, cr15, [ip], #980\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:131\n+/build/2/ssocr-2.23.0/2nd/help.c:131\n \tsubcs\tr6, pc, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1420\t@ 0xfffffa74\n \tldcl\t7, cr15, [r4], #980\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:132\n+/build/2/ssocr-2.23.0/2nd/help.c:132\n \tsubcs\tr6, pc, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1408\t@ 0xfffffa80\n \tstcl\t7, cr15, [ip], #980\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:133\n+/build/2/ssocr-2.23.0/2nd/help.c:133\n \tsubcs\tr6, r0, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1396\t@ 0xfffffa8c\n \tstcl\t7, cr15, [r4], #980\t@ 0x3d4\n-/build/1st/ssocr-2.23.0/help.c:134\n+/build/2/ssocr-2.23.0/2nd/help.c:134\n \tsubcs\tr6, r9, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1384\t@ 0xfffffa98\n \tldcl\t7, cr15, [ip], {245}\t@ 0xf5\n-/build/1st/ssocr-2.23.0/help.c:135\n+/build/2/ssocr-2.23.0/2nd/help.c:135\n \tsubcs\tr6, r3, #3866624\t@ 0x3b0000\n \t\t\t@ instruction: 0xf8df2101\n \tldrbtmi\tr0, [r8], #-1372\t@ 0xfffffaa4\n \tldcl\t7, cr15, [r4], {245}\t@ 0xf5\n-/build/1st/ssocr-2.23.0/help.c:136\n+/build/2/ssocr-2.23.0/2nd/help.c:136\n \tldrbcc\tpc, [r4, #-2271]\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0x461a447b\n \tldrbcc\tpc, [r0, #-2271]\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tldmdavs\tfp!, {r2, r3, r4, r6, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:137\n+/build/2/ssocr-2.23.0/2nd/help.c:137\n \ttstcs\tr1, sl, lsr r2\n \tstrbeq\tpc, [r0, #-2271]\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r6, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:138\n+/build/2/ssocr-2.23.0/2nd/help.c:138\n \ttstcs\tr1, r8, asr #4\n \tldreq\tpc, [r4, #-2271]!\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r5, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:139\n+/build/2/ssocr-2.23.0/2nd/help.c:139\n \ttstcs\tr1, r8, asr #4\n \tstreq\tpc, [r8, #-2271]!\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, r5, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:140\n+/build/2/ssocr-2.23.0/2nd/help.c:140\n \ttstcs\tr1, sp, asr #4\n \tldreq\tpc, [ip, #-2271]\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r5, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:141\n+/build/2/ssocr-2.23.0/2nd/help.c:141\n \ttstcs\tr1, r5, asr #4\n \tldreq\tpc, [r0, #-2271]\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r5, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:142\n+/build/2/ssocr-2.23.0/2nd/help.c:142\n \ttstcs\tr1, sp, lsr r2\n \tstreq\tpc, [r4, #-2271]\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:143\n+/build/2/ssocr-2.23.0/2nd/help.c:143\n \ttstcs\tr1, sl, asr #4\n \tldrbteq\tpc, [r8], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:144\n+/build/2/ssocr-2.23.0/2nd/help.c:144\n \ttstcs\tr1, r3, asr #4\n \tstrbteq\tpc, [ip], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:145\n+/build/2/ssocr-2.23.0/2nd/help.c:145\n \ttstcs\tr1, fp, asr #4\n \tstrbteq\tpc, [r0], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r7, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:146\n+/build/2/ssocr-2.23.0/2nd/help.c:146\n \ttstcs\tr1, r2, asr #4\n \tldrbeq\tpc, [r4], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:147\n+/build/2/ssocr-2.23.0/2nd/help.c:147\n \ttstcs\tr1, sl, asr #4\n \tstrbeq\tpc, [r8], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, r5, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:148\n+/build/2/ssocr-2.23.0/2nd/help.c:148\n \ttstcs\tr1, r5, asr #4\n \tldrteq\tpc, [ip], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r5, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:149\n+/build/2/ssocr-2.23.0/2nd/help.c:149\n \ttstcs\tr1, r8, asr #4\n \tldrteq\tpc, [r0], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r5, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:150\n+/build/2/ssocr-2.23.0/2nd/help.c:150\n \ttstcs\tr1, r6, asr #4\n \tstrteq\tpc, [r4], #2271\t@ 0x8df\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:151\n+/build/2/ssocr-2.23.0/2nd/help.c:151\n \ttstcs\tr1, r2, asr #4\n \tldreq\tpc, [r8], #2271\t@ 0x8df\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:152\n+/build/2/ssocr-2.23.0/2nd/help.c:152\n \ttstcs\tr1, pc, lsr r2\n \tstreq\tpc, [ip], #2271\t@ 0x8df\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:153\n+/build/2/ssocr-2.23.0/2nd/help.c:153\n \ttstcs\tr1, r3, asr #4\n \tstreq\tpc, [r0], #2271\t@ 0x8df\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r6, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:154\n+/build/2/ssocr-2.23.0/2nd/help.c:154\n \tsmlabbcs\tr1, fp, r2, r2\n \tldrbteq\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r5, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:157\n+/build/2/ssocr-2.23.0/2nd/help.c:157\n \tsmlabbcs\tr1, sl, r2, r2\n \tstrbteq\tpc, [r8], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, r5, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:160\n+/build/2/ssocr-2.23.0/2nd/help.c:160\n \ttstcs\tr1, r4, lsr r2\n \tldrbeq\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r5, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:161\n+/build/2/ssocr-2.23.0/2nd/help.c:161\n \ttstcs\tr1, lr, asr #4\n \tldrbeq\tpc, [r0], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r5, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:162\n+/build/2/ssocr-2.23.0/2nd/help.c:162\n \ttstcs\tr1, r4, lsr r2\n \tstrbeq\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:163\n+/build/2/ssocr-2.23.0/2nd/help.c:163\n \ttstcs\tr1, lr, asr #4\n \tldrteq\tpc, [r8], #-2271\t@ 0xfffff721\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:164\n+/build/2/ssocr-2.23.0/2nd/help.c:164\n \ttstcs\tr1, r9, lsr r2\n \tstrteq\tpc, [ip], #-2271\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:165\n+/build/2/ssocr-2.23.0/2nd/help.c:165\n \ttstcs\tr1, r8, lsr r2\n \tstrteq\tpc, [r0], #-2271\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:166\n+/build/2/ssocr-2.23.0/2nd/help.c:166\n \ttstcs\tr1, pc, lsr r2\n \tldreq\tpc, [r4], #-2271\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r5, r6, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:167\n+/build/2/ssocr-2.23.0/2nd/help.c:167\n \ttstcs\tr1, r1, asr #4\n \tstreq\tpc, [r8], #-2271\t@ 0xfffff721\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r4, r5, r6, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:168\n+/build/2/ssocr-2.23.0/2nd/help.c:168\n \ttstcs\tr1, fp, asr #4\n \tldrbtmi\tr4, [r8], #-2303\t@ 0xfffff701\n \tbl\tffac9814 <__bss_end__@@Base+0xffab756c>\n-/build/1st/ssocr-2.23.0/help.c:169\n+/build/2/ssocr-2.23.0/2nd/help.c:169\n \tsubcs\tr6, lr, #3866624\t@ 0x3b0000\n \tldmmi\tsp!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r2, r5, r6, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:170\n+/build/2/ssocr-2.23.0/2nd/help.c:170\n \ttstcs\tr1, r0, asr r2\n \tldrbtmi\tr4, [r8], #-2298\t@ 0xfffff706\n \tbl\tff749830 <__bss_end__@@Base+0xff737588>\n-/build/1st/ssocr-2.23.0/help.c:171\n+/build/2/ssocr-2.23.0/2nd/help.c:171\n \tsubcs\tr6, r8, #3866624\t@ 0x3b0000\n \tldmmi\tr8!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r2, r4, r6, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:172\n+/build/2/ssocr-2.23.0/2nd/help.c:172\n \ttstcs\tr1, pc, asr #4\n \tldrbtmi\tr4, [r8], #-2293\t@ 0xfffff70b\n \tbl\tff3c984c <__bss_end__@@Base+0xff3b75a4>\n-/build/1st/ssocr-2.23.0/help.c:173\n+/build/2/ssocr-2.23.0/2nd/help.c:173\n \tsubcs\tr6, lr, #3866624\t@ 0x3b0000\n \tldmmi\tr3!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r3, r6, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:174\n+/build/2/ssocr-2.23.0/2nd/help.c:174\n \ttstcs\tr1, r9, lsr r2\n \tldrbtmi\tr4, [r8], #-2288\t@ 0xfffff710\n \tbl\tff049868 <__bss_end__@@Base+0xff0375c0>\n-/build/1st/ssocr-2.23.0/help.c:175\n+/build/2/ssocr-2.23.0/2nd/help.c:175\n \tsubcs\tr6, pc, #3866624\t@ 0x3b0000\n \tstmiami\tlr!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r5, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:176\n+/build/2/ssocr-2.23.0/2nd/help.c:176\n \ttstcs\tr1, r1, asr r2\n \tldrbtmi\tr4, [r8], #-2283\t@ 0xfffff715\n \tbl\tfecc9884 <__bss_end__@@Base+0xfecb75dc>\n-/build/1st/ssocr-2.23.0/help.c:177\n+/build/2/ssocr-2.23.0/2nd/help.c:177\n \tsubscs\tr6, r0, #3866624\t@ 0x3b0000\n \tstmiami\tr9!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r2, r3, r5, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:178\n+/build/2/ssocr-2.23.0/2nd/help.c:178\n \ttstcs\tr1, ip, asr #4\n \tldrbtmi\tr4, [r8], #-2278\t@ 0xfffff71a\n \tbl\tfe9498a0 <__bss_end__@@Base+0xfe9375f8>\n-/build/1st/ssocr-2.23.0/help.c:179\n+/build/2/ssocr-2.23.0/2nd/help.c:179\n \teorcs\tr6, r8, #3866624\t@ 0x3b0000\n \tstmiami\tr4!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r2, r3, r4, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:180\n+/build/2/ssocr-2.23.0/2nd/help.c:180\n \ttstcs\tr1, pc, asr #4\n \tldrbtmi\tr4, [r8], #-2273\t@ 0xfffff71f\n \tbl\tfe5c98bc <__bss_end__@@Base+0xfe5b7614>\n-/build/1st/ssocr-2.23.0/help.c:181\n+/build/2/ssocr-2.23.0/2nd/help.c:181\n \teorcs\tr6, r8, #3866624\t@ 0x3b0000\n \tldmmi\tpc, {r0, r8, sp}^\t@ \n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r4, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:182\n+/build/2/ssocr-2.23.0/2nd/help.c:182\n \ttstcs\tr1, r0, asr #4\n \tldrbtmi\tr4, [r8], #-2268\t@ 0xfffff724\n \tbl\tfe2498d8 <__bss_end__@@Base+0xfe237630>\n-/build/1st/ssocr-2.23.0/help.c:183\n+/build/2/ssocr-2.23.0/2nd/help.c:183\n \tsubcs\tr6, sl, #3866624\t@ 0x3b0000\n \tldmmi\tsl, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r7, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:184\n+/build/2/ssocr-2.23.0/2nd/help.c:184\n \ttstcs\tr1, pc, asr #4\n \tldrbtmi\tr4, [r8], #-2263\t@ 0xfffff729\n \tbl\t1ec98f4 <__bss_end__@@Base+0x1eb764c>\n-/build/1st/ssocr-2.23.0/help.c:185\n+/build/2/ssocr-2.23.0/2nd/help.c:185\n \teorscs\tr6, r7, #3866624\t@ 0x3b0000\n \tldmmi\tr5, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r2, r4, r5, r6, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:186\n+/build/2/ssocr-2.23.0/2nd/help.c:186\n \ttstcs\tr1, lr, asr #4\n \tldrbtmi\tr4, [r8], #-2258\t@ 0xfffff72e\n \tbl\t1b49910 <__bss_end__@@Base+0x1b37668>\n-/build/1st/ssocr-2.23.0/help.c:187\n+/build/2/ssocr-2.23.0/2nd/help.c:187\n \tsubcs\tr6, sl, #3866624\t@ 0x3b0000\n \tldmmi\tr0, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r2, r5, r6, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:188\n+/build/2/ssocr-2.23.0/2nd/help.c:188\n \ttstcs\tr1, r0, asr r2\n \tldrbtmi\tr4, [r8], #-2253\t@ 0xfffff733\n \tbl\t17c992c <__bss_end__@@Base+0x17b7684>\n-/build/1st/ssocr-2.23.0/help.c:189\n+/build/2/ssocr-2.23.0/2nd/help.c:189\n \tsubcs\tr6, lr, #3866624\t@ 0x3b0000\n \tstmiami\tfp, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tandcs\tlr, r1, #88, 22\t@ 0x16000\n-/build/1st/ssocr-2.23.0/help.c:190\n+/build/2/ssocr-2.23.0/2nd/help.c:190\n \tldrbtmi\tr4, [fp], #-3017\t@ 0xfffff437\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tbl\t18c9948 <__bss_end__@@Base+0x18b76a0>\n-/build/1st/ssocr-2.23.0/help.c:191\n+/build/2/ssocr-2.23.0/2nd/help.c:191\n \tblmi\tff1d417c <__bss_end__@@Base+0xff1c1ed4>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tandcs\tlr, r1, #92, 22\t@ 0x17000\n-/build/1st/ssocr-2.23.0/help.c:192\n+/build/2/ssocr-2.23.0/2nd/help.c:192\n \tldrbtmi\tr4, [fp], #-3012\t@ 0xfffff43c\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tbl\t1549964 <__bss_end__@@Base+0x15376bc>\n-/build/1st/ssocr-2.23.0/help.c:193\n+/build/2/ssocr-2.23.0/2nd/help.c:193\n \tblmi\tff094198 <__bss_end__@@Base+0xff081ef0>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tandcs\tlr, r0, #79872\t@ 0x13800\n-/build/1st/ssocr-2.23.0/help.c:194\n+/build/2/ssocr-2.23.0/2nd/help.c:194\n \tldrbtmi\tr4, [fp], #-3007\t@ 0xfffff441\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tbl\t11c9980 <__bss_end__@@Base+0x11b76d8>\n-/build/1st/ssocr-2.23.0/help.c:195\n+/build/2/ssocr-2.23.0/2nd/help.c:195\n \tblmi\tfef541c8 <__bss_end__@@Base+0xfef41f20>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tandcs\tlr, r6, #64, 22\t@ 0x10000\n-/build/1st/ssocr-2.23.0/help.c:196\n+/build/2/ssocr-2.23.0/2nd/help.c:196\n \tldrbtmi\tr4, [fp], #-3002\t@ 0xfffff446\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tbl\te4999c <__bss_end__@@Base+0xe376f4>\n-/build/1st/ssocr-2.23.0/help.c:197\n+/build/2/ssocr-2.23.0/2nd/help.c:197\n \tandeq\tpc, r0, #79\t@ 0x4f\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \tmovteq\tpc, #37572\t@ 0x92c4\t@ \n \tldrbtmi\tr4, [r9], #-2485\t@ 0xfffff64b\n \t\t\t@ instruction: 0xf7f56838\n \tblmi\tfed46698 <__bss_end__@@Base+0xfed343f0>\n-/build/1st/ssocr-2.23.0/help.c:198\n+/build/2/ssocr-2.23.0/2nd/help.c:198\n \t\t\t@ instruction: 0x461a447b\n \tldrbtmi\tr4, [fp], #-2995\t@ 0xfffff44d\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tbl\t9499c4 <__bss_end__@@Base+0x93771c>\n-/build/1st/ssocr-2.23.0/help.c:200\n+/build/2/ssocr-2.23.0/2nd/help.c:200\n \tldrbtmi\tr4, [fp], #-2993\t@ 0xfffff44f\n \tblmi\tfec5d260 <__bss_end__@@Base+0xfec4afb8>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tldmdavs\tfp!, {r2, r3, r4, r8, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:202\n+/build/2/ssocr-2.23.0/2nd/help.c:202\n \ttstcs\tr1, r5, lsr #4\n \tldrbtmi\tr4, [r8], #-2221\t@ 0xfffff753\n \tbl\tc99e4 <__bss_end__@@Base+0xb773c>\n-/build/1st/ssocr-2.23.0/help.c:203\n+/build/2/ssocr-2.23.0/2nd/help.c:203\n \tandcs\tr6, r1, r9, lsr r8\n \tblx\tdc9a16 <__bss_end__@@Base+0xdb776e>\n \tandcs\tr6, sl, r9, lsr r8\n \tbl\tc499f4 <__bss_end__@@Base+0xc3774c>\n-/build/1st/ssocr-2.23.0/help.c:204\n+/build/2/ssocr-2.23.0/2nd/help.c:204\n \tblmi\tfea14230 <__bss_end__@@Base+0xfea01f88>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tandcs\tlr, r2, #6144\t@ 0x1800\n-/build/1st/ssocr-2.23.0/help.c:205\n+/build/2/ssocr-2.23.0/2nd/help.c:205\n \tldrbtmi\tr4, [fp], #-2981\t@ 0xfffff45b\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tb\tfffc9a10 <__bss_end__@@Base+0xfffb7768>\n-/build/1st/ssocr-2.23.0/help.c:206\n+/build/2/ssocr-2.23.0/2nd/help.c:206\n \tblmi\tfe8d4254 <__bss_end__@@Base+0xfe8c1fac>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56838\n \tandcs\tlr, r2, #248, 20\t@ 0xf8000\n-/build/1st/ssocr-2.23.0/help.c:207\n+/build/2/ssocr-2.23.0/2nd/help.c:207\n \tldrbtmi\tr4, [fp], #-2976\t@ 0xfffff460\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}\n \tb\tffc49a2c <__bss_end__@@Base+0xffc37784>\n-/build/1st/ssocr-2.23.0/help.c:208\n+/build/2/ssocr-2.23.0/2nd/help.c:208\n \tldmib\tr3, {r6, r8, r9, sp, pc}^\n \tldmibmi\tsp, {r8, r9, sp}\n \tldmdavs\tr8!, {r0, r3, r4, r5, r6, sl, lr}\n \tb\tffa49a3c <__bss_end__@@Base+0xffa37794>\n-/build/1st/ssocr-2.23.0/help.c:209\n+/build/2/ssocr-2.23.0/2nd/help.c:209\n \teorcs\tr6, r5, #3866624\t@ 0x3b0000\n \tldmmi\tsl, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tr9!, {r4, r6, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:210\n+/build/2/ssocr-2.23.0/2nd/help.c:210\n \t\t\t@ instruction: 0xf7ff2000\n \tldmdavs\tr9!, {r0, r2, r6, sl, fp, ip, sp, lr, pc}\n \t\t\t@ instruction: 0xf7f5200a\n \tldmdavs\tfp!, {r1, r2, r3, r4, r5, r6, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:211\n+/build/2/ssocr-2.23.0/2nd/help.c:211\n \ttstcs\tr1, sl, asr #4\n \tldrbtmi\tr4, [r8], #-2195\t@ 0xfffff76d\n \tb\tff049a68 <__bss_end__@@Base+0xff0377c0>\n-/build/1st/ssocr-2.23.0/help.c:212\n+/build/2/ssocr-2.23.0/2nd/help.c:212\n \tsubcs\tr6, sp, #3866624\t@ 0x3b0000\n \tldmmi\tr1, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r3, r4, r5, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:213\n+/build/2/ssocr-2.23.0/2nd/help.c:213\n \ttstcs\tr1, sp, asr #4\n \tldrbtmi\tr4, [r8], #-2190\t@ 0xfffff772\n \tb\tfecc9a84 <__bss_end__@@Base+0xfecb77dc>\n-/build/1st/ssocr-2.23.0/help.c:214\n+/build/2/ssocr-2.23.0/2nd/help.c:214\n \tandscs\tr6, lr, #3866624\t@ 0x3b0000\n \tstmmi\tip, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r2, r3, r5, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:215\n+/build/2/ssocr-2.23.0/2nd/help.c:215\n \ttstcs\tr1, sp, asr #4\n \tldrbtmi\tr4, [r8], #-2185\t@ 0xfffff777\n \tb\tfe949aa0 <__bss_end__@@Base+0xfe9377f8>\n-/build/1st/ssocr-2.23.0/help.c:216\n+/build/2/ssocr-2.23.0/2nd/help.c:216\n \tsubcs\tr6, r3, #3866624\t@ 0x3b0000\n \tstmmi\tr7, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r2, r3, r4, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:217\n+/build/2/ssocr-2.23.0/2nd/help.c:217\n \ttstcs\tr1, sl, lsr r2\n \tldrbtmi\tr4, [r8], #-2180\t@ 0xfffff77c\n \tb\tfe5c9abc <__bss_end__@@Base+0xfe5b7814>\n-/build/1st/ssocr-2.23.0/help.c:218\n+/build/2/ssocr-2.23.0/2nd/help.c:218\n \tsubcs\tr6, r0, #3866624\t@ 0x3b0000\n \tstmmi\tr2, {r0, r8, sp}\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r4, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:219\n+/build/2/ssocr-2.23.0/2nd/help.c:219\n \ttstcs\tr1, pc, lsr r2\n \tldrbtmi\tr4, [r8], #-2175\t@ 0xfffff781\n \tb\tfe249ad8 <__bss_end__@@Base+0xfe237830>\n-/build/1st/ssocr-2.23.0/help.c:220\n+/build/2/ssocr-2.23.0/2nd/help.c:220\n \teorscs\tr6, ip, #3866624\t@ 0x3b0000\n \tldmdami\tsp!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r1, r7, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:221\n+/build/2/ssocr-2.23.0/2nd/help.c:221\n \ttstcs\tr1, r3, lsr r2\n \tldrbtmi\tr4, [r8], #-2170\t@ 0xfffff786\n \tb\t1ec9af4 <__bss_end__@@Base+0x1eb784c>\n-/build/1st/ssocr-2.23.0/help.c:222\n+/build/2/ssocr-2.23.0/2nd/help.c:222\n \teorcs\tr6, lr, #3866624\t@ 0x3b0000\n \tldmdami\tr8!, {r0, r8, sp}^\n \t\t\t@ instruction: 0xf7f54478\n \tldmdavs\tfp!, {r2, r4, r5, r6, r9, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/help.c:223\n+/build/2/ssocr-2.23.0/2nd/help.c:223\n \ttstcs\tr1, r9, lsl r2\n \tldrbtmi\tr4, [r8], #-2165\t@ 0xfffff78b\n \tb\t1b49b10 <__bss_end__@@Base+0x1b37868>\n-/build/1st/ssocr-2.23.0/help.c:224\n+/build/2/ssocr-2.23.0/2nd/help.c:224\n \tbmi\t1d3b740 <__bss_end__@@Base+0x1d29498>\n-/build/1st/ssocr-2.23.0/help.c:112\n+/build/2/ssocr-2.23.0/2nd/help.c:112\n \tblmi\t25cd2c <__bss_end__@@Base+0x24aa84>\n-/build/1st/ssocr-2.23.0/help.c:224\n+/build/2/ssocr-2.23.0/2nd/help.c:224\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f5d001\n \tldrcc\tlr, [r0, -sl, lsl #21]\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tstrbtvs\tr6, [r6], -r6, ror #12\n@@ -13196,75 +13196,75 @@\n \tandeq\tr4, r0, lr, ror pc\n \t\t\t@ instruction: 0x00004fb0\n \tandeq\tr4, r0, r2, ror #31\n \tandeq\tr5, r0, r8\n \tandeq\tr5, r0, sl, lsr #32\n \tandeq\tr6, r0, r0, lsr #7\n parse_charset():\n-/build/1st/ssocr-2.23.0/charset.c:32\n+/build/2/ssocr-2.23.0/2nd/charset.c:32\n \taddlt\tfp, r4, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrbtmi\tr4, [sl], #-2609\t@ 0xfffff5cf\n \tldmpl\tr3, {r0, r4, r5, r8, r9, fp, lr}^\n \trscsvs\tr6, fp, fp, lsl r8\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n-/build/1st/ssocr-2.23.0/charset.c:33\n+/build/2/ssocr-2.23.0/2nd/charset.c:33\n \tblmi\tbd4540 <__bss_end__@@Base+0xbc2298>\n \t\t\t@ instruction: 0x4619447b\n \t\t\t@ instruction: 0xf7f56878\n \t\t\t@ instruction: 0x4603e974\n \ttstle\tr4, r0, lsl #22\n-/build/1st/ssocr-2.23.0/charset.c:34\n+/build/2/ssocr-2.23.0/2nd/charset.c:34\n \tblx\t3c9d42 <__bss_end__@@Base+0x3b7a9a>\n-/build/1st/ssocr-2.23.0/charset.c:35\n+/build/2/ssocr-2.23.0/2nd/charset.c:35\n \t\t\t@ instruction: 0xf7f5202a\n \tandcs\tlr, r4, #228, 18\t@ 0x390000\n-/build/1st/ssocr-2.23.0/charset.c:36\n+/build/2/ssocr-2.23.0/2nd/charset.c:36\n \tldrbtmi\tr4, [fp], #-2856\t@ 0xfffff4d8\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tstmdb\tr4!, {r0, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1d568 <__bss_end__@@Base+0xb2c0>\n \tmovwcs\tsp, #257\t@ 0x101\n-/build/1st/ssocr-2.23.0/charset.c:37\n+/build/2/ssocr-2.23.0/2nd/charset.c:37\n \tandcs\tlr, r6, #48\t@ 0x30\n-/build/1st/ssocr-2.23.0/charset.c:38\n+/build/2/ssocr-2.23.0/2nd/charset.c:38\n \tldrbtmi\tr4, [fp], #-2851\t@ 0xfffff4dd\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tldmdb\tr8, {r0, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1d580 <__bss_end__@@Base+0xb2d8>\n \tmovwcs\tsp, #4353\t@ 0x1101\n-/build/1st/ssocr-2.23.0/charset.c:39\n+/build/2/ssocr-2.23.0/2nd/charset.c:39\n \tandcs\tlr, r7, #36\t@ 0x24\n-/build/1st/ssocr-2.23.0/charset.c:40\n+/build/2/ssocr-2.23.0/2nd/charset.c:40\n \tldrbtmi\tr4, [fp], #-2846\t@ 0xfffff4e2\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tstmdb\tip, {r0, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1d598 <__bss_end__@@Base+0xb2f0>\n \tmovwcs\tsp, #8449\t@ 0x2101\n-/build/1st/ssocr-2.23.0/charset.c:41\n+/build/2/ssocr-2.23.0/2nd/charset.c:41\n \tandcs\tlr, r3, #24\n-/build/1st/ssocr-2.23.0/charset.c:42\n+/build/2/ssocr-2.23.0/2nd/charset.c:42\n \tldrbtmi\tr4, [fp], #-2841\t@ 0xfffff4e7\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tstmdb\tr0, {r0, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \tblcs\t1d5b0 <__bss_end__@@Base+0xb308>\n \tmovwcs\tsp, #12545\t@ 0x3101\n-/build/1st/ssocr-2.23.0/charset.c:43\n+/build/2/ssocr-2.23.0/2nd/charset.c:43\n \tandcs\tlr, r8, #12\n-/build/1st/ssocr-2.23.0/charset.c:44\n+/build/2/ssocr-2.23.0/2nd/charset.c:44\n \tldrbtmi\tr4, [fp], #-2836\t@ 0xfffff4ec\n \tldmdavs\tr8!, {r0, r3, r4, r9, sl, lr}^\n \tldmdb\tr4!, {r0, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}\n \tblcs\t1d5c8 <__bss_end__@@Base+0xb320>\n \tmovwcs\tsp, #16641\t@ 0x4101\n-/build/1st/ssocr-2.23.0/charset.c:45\n+/build/2/ssocr-2.23.0/2nd/charset.c:45\n \tmovwcs\tlr, #0\n-/build/1st/ssocr-2.23.0/charset.c:32\n+/build/2/ssocr-2.23.0/2nd/charset.c:32\n \tldrbtmi\tr4, [r9], #-2319\t@ 0xfffff6f1\n-/build/1st/ssocr-2.23.0/charset.c:49\n+/build/2/ssocr-2.23.0/2nd/charset.c:49\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldmvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tstmdb\tr6, {r0, r2, r4, r5, r6, r7, r8, r9, sl, ip, sp, lr, pc}^\n \t\t\t@ instruction: 0x37104618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n@@ -13274,429 +13274,429 @@\n \tandeq\tr4, r0, r6, lsr lr\n \tandeq\tr4, r0, r6, lsr #28\n \tandeq\tr4, r0, r6, lsl lr\n \tandeq\tr4, r0, r6, lsl #28\n \tstrdeq\tr4, [r0], -r2\n \tandeq\tr6, r0, sl, lsl r1\n init_charset():\n-/build/1st/ssocr-2.23.0/charset.c:56\n+/build/2/ssocr-2.23.0/2nd/charset.c:56\n \tumulllt\tfp, r5, r0, r5\n \trsbsvs\tsl, r8, r0, lsl #30\n \tldrtcs\tpc, [r4], #2271\t@ 0x8df\t@ \n \t\t\t@ instruction: 0xf8df447a\n \tldrbtmi\tr1, [r9], #-1204\t@ 0xfffffb4c\n \tldrtcc\tpc, [r0], #2271\t@ 0x8df\t@ \n \tldmdavs\tfp, {r0, r1, r3, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f60fb\n \tmovwcs\tr0, #768\t@ 0x300\n-/build/1st/ssocr-2.23.0/charset.c:59\n+/build/2/ssocr-2.23.0/2nd/charset.c:59\n \tstrh\tr6, [r9], -fp\n-/build/1st/ssocr-2.23.0/charset.c:60 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/charset.c:60 (discriminator 3)\n \tstrtne\tpc, [r0], #2271\t@ 0x8df\n \tldmvs\tfp!, {r0, r3, r4, r5, r6, sl, lr}\n \tcmpcs\tpc, fp, lsl #8\n \tldmvs\tfp!, {r0, r3, r4, ip, sp, lr}\n-/build/1st/ssocr-2.23.0/charset.c:59 (discriminator 3)\n+/build/2/ssocr-2.23.0/2nd/charset.c:59 (discriminator 3)\n \tadcsvs\tr3, fp, r1, lsl #6\n-/build/1st/ssocr-2.23.0/charset.c:59 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/charset.c:59 (discriminator 1)\n \tblcs\tfe026134 <__bss_end__@@Base+0xfe013e8c>\n \tldmdavs\tfp!, {r1, r4, r5, r6, r7, r8, sl, fp, ip, lr, pc}^\n-/build/1st/ssocr-2.23.0/charset.c:62\n+/build/2/ssocr-2.23.0/2nd/charset.c:62\n \tvqdmulh.s\td2, d0, d4\n \ttstge\tr2, sl, lsl r2\n \teorcc\tpc, r3, r1, asr r8\t@ \n \tsmladmi\tr8, r9, r4, r4\n \tandeq\tr0, r0, r5, lsl r0\n \tandeq\tr0, r0, r5, asr r1\n \tldrdeq\tr0, [r0], -r9\n \tandeq\tr0, r0, pc, ror #4\n \tandeq\tr0, r0, pc, lsr r3\n-/build/1st/ssocr-2.23.0/charset.c:64\n+/build/2/ssocr-2.23.0/2nd/charset.c:64\n \tstrbtcc\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r0, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:65\n+/build/2/ssocr-2.23.0/2nd/charset.c:65\n \tldrbcc\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r1, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r4, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:66\n+/build/2/ssocr-2.23.0/2nd/charset.c:66\n \tldrbcc\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r2, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, sp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:67\n+/build/2/ssocr-2.23.0/2nd/charset.c:67\n \tstrbcc\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r3, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, sp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:68\n+/build/2/ssocr-2.23.0/2nd/charset.c:68\n \tstrbcc\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r4, #2063597568\t@ 0x7b000000\n \teorcs\tpc, lr, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:69\n+/build/2/ssocr-2.23.0/2nd/charset.c:69\n \tldrtcc\tpc, [ip], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r5, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:70\n+/build/2/ssocr-2.23.0/2nd/charset.c:70\n \tldrtcc\tpc, [r4], #-2271\t@ 0xfffff721\t@ \n \teorscs\tr4, r6, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:71\n+/build/2/ssocr-2.23.0/2nd/charset.c:71\n \tstrtcc\tpc, [ip], #-2271\t@ 0xfffff721\n \teorscs\tr4, r7, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r5, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:72\n+/build/2/ssocr-2.23.0/2nd/charset.c:72\n \tstrtcc\tpc, [r4], #-2271\t@ 0xfffff721\n \teorscs\tr4, r7, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:73\n+/build/2/ssocr-2.23.0/2nd/charset.c:73\n \tldrcc\tpc, [ip], #-2271\t@ 0xfffff721\n \teorscs\tr4, r8, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:74\n+/build/2/ssocr-2.23.0/2nd/charset.c:74\n \tldrcc\tpc, [r4], #-2271\t@ 0xfffff721\n \teorscs\tr4, r9, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:75\n+/build/2/ssocr-2.23.0/2nd/charset.c:75\n \tstrcc\tpc, [ip], #-2271\t@ 0xfffff721\n \teorscs\tr4, r9, #2063597568\t@ 0x7b000000\n \teorcs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:76\n+/build/2/ssocr-2.23.0/2nd/charset.c:76\n \tstrcc\tpc, [r4], #-2271\t@ 0xfffff721\n \teorcs\tr4, lr, #2063597568\t@ 0x7b000000\n \taddcs\tpc, r0, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:77\n+/build/2/ssocr-2.23.0/2nd/charset.c:77\n \tldrbtmi\tr4, [fp], #-3071\t@ 0xfffff401\n \tandsvc\tr2, sl, #-805306366\t@ 0xd0000002\n-/build/1st/ssocr-2.23.0/charset.c:78\n+/build/2/ssocr-2.23.0/2nd/charset.c:78\n \tldrbtmi\tr4, [fp], #-3070\t@ 0xfffff402\n \t\t\t@ instruction: 0xf8832261\n \tblmi\tfff5401c <__bss_end__@@Base+0xfff41d74>\n-/build/1st/ssocr-2.23.0/charset.c:79\n+/build/2/ssocr-2.23.0/2nd/charset.c:79\n \trsbcs\tr4, r2, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, sl, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:80\n+/build/2/ssocr-2.23.0/2nd/charset.c:80\n \tldrbtmi\tr4, [fp], #-3067\t@ 0xfffff405\n \t\t\t@ instruction: 0xf8832263\n \tblmi\tffe94080 <__bss_end__@@Base+0xffe81dd8>\n-/build/1st/ssocr-2.23.0/charset.c:81\n+/build/2/ssocr-2.23.0/2nd/charset.c:81\n \trsbcs\tr4, r3, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, r8, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:82\n+/build/2/ssocr-2.23.0/2nd/charset.c:82\n \tldrbtmi\tr4, [fp], #-3064\t@ 0xfffff408\n \t\t\t@ instruction: 0xf8832264\n \tblmi\tffdd4138 <__bss_end__@@Base+0xffdc1e90>\n-/build/1st/ssocr-2.23.0/charset.c:83\n+/build/2/ssocr-2.23.0/2nd/charset.c:83\n \trsbcs\tr4, r5, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:84\n+/build/2/ssocr-2.23.0/2nd/charset.c:84\n \tldrbtmi\tr4, [fp], #-3061\t@ 0xfffff40b\n \tldrbvc\tr2, [sl], r6, ror #4\n-/build/1st/ssocr-2.23.0/charset.c:85\n+/build/2/ssocr-2.23.0/2nd/charset.c:85\n \tldrbtmi\tr4, [fp], #-3060\t@ 0xfffff40c\n \t\t\t@ instruction: 0xf8832275\n \tblmi\tffcd413c <__bss_end__@@Base+0xffcc1e94>\n-/build/1st/ssocr-2.23.0/charset.c:86\n+/build/2/ssocr-2.23.0/2nd/charset.c:86\n \trsbscs\tr4, r4, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, sl, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:87\n+/build/2/ssocr-2.23.0/2nd/charset.c:87\n \tldrbtmi\tr4, [fp], #-3057\t@ 0xfffff40f\n \t\t\t@ instruction: 0xf883226c\n \tblmi\tffc140c0 <__bss_end__@@Base+0xffc01e18>\n-/build/1st/ssocr-2.23.0/charset.c:88\n+/build/2/ssocr-2.23.0/2nd/charset.c:88\n \trsbcs\tr4, r8, #2063597568\t@ 0x7b000000\n \teorscs\tpc, lr, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:89\n+/build/2/ssocr-2.23.0/2nd/charset.c:89\n \tldrbtmi\tr4, [fp], #-3054\t@ 0xfffff412\n \tldrbvc\tr2, [sl, #626]\t@ 0x272\n-/build/1st/ssocr-2.23.0/charset.c:90\n+/build/2/ssocr-2.23.0/2nd/charset.c:90\n \tldrbtmi\tr4, [fp], #-3053\t@ 0xfffff413\n \t\t\t@ instruction: 0x77da2270\n-/build/1st/ssocr-2.23.0/charset.c:91\n+/build/2/ssocr-2.23.0/2nd/charset.c:91\n \tldrbtmi\tr4, [fp], #-3052\t@ 0xfffff414\n \t\t\t@ instruction: 0xf883226e\n \tblmi\tffad4078 <__bss_end__@@Base+0xffac1dd0>\n-/build/1st/ssocr-2.23.0/charset.c:92\n+/build/2/ssocr-2.23.0/2nd/charset.c:92\n \trsbscs\tr4, r9, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, lr, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:93\n+/build/2/ssocr-2.23.0/2nd/charset.c:93\n \tldrbtmi\tr4, [fp], #-3049\t@ 0xfffff417\n \t\t\t@ instruction: 0xf883226a\n \tcmn\tfp, r4, rrx\n-/build/1st/ssocr-2.23.0/charset.c:96\n+/build/2/ssocr-2.23.0/2nd/charset.c:96\n \tldrbtmi\tr4, [fp], #-3047\t@ 0xfffff419\n \t\t\t@ instruction: 0xf8832230\n \tblmi\tff994198 <__bss_end__@@Base+0xff981ef0>\n-/build/1st/ssocr-2.23.0/charset.c:97\n+/build/2/ssocr-2.23.0/2nd/charset.c:97\n \teorscs\tr4, r1, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r4, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:98\n+/build/2/ssocr-2.23.0/2nd/charset.c:98\n \tldrbtmi\tr4, [fp], #-3044\t@ 0xfffff41c\n \t\t\t@ instruction: 0xf8832232\n \tblmi\tff8d4144 <__bss_end__@@Base+0xff8c1e9c>\n-/build/1st/ssocr-2.23.0/charset.c:99\n+/build/2/ssocr-2.23.0/2nd/charset.c:99\n \teorscs\tr4, r3, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, sp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:100\n+/build/2/ssocr-2.23.0/2nd/charset.c:100\n \tldrbtmi\tr4, [fp], #-3041\t@ 0xfffff41f\n \t\t\t@ instruction: 0xf8832234\n \tblmi\tff81409c <__bss_end__@@Base+0xff801df4>\n-/build/1st/ssocr-2.23.0/charset.c:101\n+/build/2/ssocr-2.23.0/2nd/charset.c:101\n \teorscs\tr4, r5, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:102\n+/build/2/ssocr-2.23.0/2nd/charset.c:102\n \tldrbtmi\tr4, [fp], #-3038\t@ 0xfffff422\n \t\t\t@ instruction: 0xf8832236\n \tblmi\tff7541e4 <__bss_end__@@Base+0xff741f3c>\n-/build/1st/ssocr-2.23.0/charset.c:103\n+/build/2/ssocr-2.23.0/2nd/charset.c:103\n \teorscs\tr4, r6, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, sl, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:104\n+/build/2/ssocr-2.23.0/2nd/charset.c:104\n \tldrbtmi\tr4, [fp], #-3035\t@ 0xfffff425\n \t\t\t@ instruction: 0xf8832237\n \tblmi\tff6940a0 <__bss_end__@@Base+0xff681df8>\n-/build/1st/ssocr-2.23.0/charset.c:105\n+/build/2/ssocr-2.23.0/2nd/charset.c:105\n \teorscs\tr4, r7, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:106\n+/build/2/ssocr-2.23.0/2nd/charset.c:106\n \tldrbtmi\tr4, [fp], #-3032\t@ 0xfffff428\n \t\t\t@ instruction: 0xf8832238\n \tblmi\tff5d421c <__bss_end__@@Base+0xff5c1f74>\n-/build/1st/ssocr-2.23.0/charset.c:107\n+/build/2/ssocr-2.23.0/2nd/charset.c:107\n \teorscs\tr4, r9, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:108\n+/build/2/ssocr-2.23.0/2nd/charset.c:108\n \tldrbtmi\tr4, [fp], #-3029\t@ 0xfffff42b\n \t\t\t@ instruction: 0xf8832239\n \tteq\tr9, pc, lsr #32\n-/build/1st/ssocr-2.23.0/charset.c:111\n+/build/2/ssocr-2.23.0/2nd/charset.c:111\n \tldrbtmi\tr4, [fp], #-3027\t@ 0xfffff42d\n \t\t\t@ instruction: 0xf8832230\n \tblmi\tff49421c <__bss_end__@@Base+0xff481f74>\n-/build/1st/ssocr-2.23.0/charset.c:112\n+/build/2/ssocr-2.23.0/2nd/charset.c:112\n \teorscs\tr4, r1, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r4, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:113\n+/build/2/ssocr-2.23.0/2nd/charset.c:113\n \tldrbtmi\tr4, [fp], #-3024\t@ 0xfffff430\n \t\t\t@ instruction: 0xf8832232\n \tblmi\tff3d41c8 <__bss_end__@@Base+0xff3c1f20>\n-/build/1st/ssocr-2.23.0/charset.c:114\n+/build/2/ssocr-2.23.0/2nd/charset.c:114\n \teorscs\tr4, r3, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, sp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:115\n+/build/2/ssocr-2.23.0/2nd/charset.c:115\n \tldrbtmi\tr4, [fp], #-3021\t@ 0xfffff433\n \t\t\t@ instruction: 0xf8832234\n \tblmi\tff314120 <__bss_end__@@Base+0xff301e78>\n-/build/1st/ssocr-2.23.0/charset.c:116\n+/build/2/ssocr-2.23.0/2nd/charset.c:116\n \teorscs\tr4, r5, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:117\n+/build/2/ssocr-2.23.0/2nd/charset.c:117\n \tldrbtmi\tr4, [fp], #-3018\t@ 0xfffff436\n \t\t\t@ instruction: 0xf8832236\n \tblmi\tff254268 <__bss_end__@@Base+0xff241fc0>\n-/build/1st/ssocr-2.23.0/charset.c:118\n+/build/2/ssocr-2.23.0/2nd/charset.c:118\n \teorscs\tr4, r6, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, sl, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:119\n+/build/2/ssocr-2.23.0/2nd/charset.c:119\n \tldrbtmi\tr4, [fp], #-3015\t@ 0xfffff439\n \t\t\t@ instruction: 0xf8832237\n \tblmi\tff194124 <__bss_end__@@Base+0xff181e7c>\n-/build/1st/ssocr-2.23.0/charset.c:120\n+/build/2/ssocr-2.23.0/2nd/charset.c:120\n \teorscs\tr4, r7, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:121\n+/build/2/ssocr-2.23.0/2nd/charset.c:121\n \tldrbtmi\tr4, [fp], #-3012\t@ 0xfffff43c\n \t\t\t@ instruction: 0xf8832238\n \tblmi\tff0d42a0 <__bss_end__@@Base+0xff0c1ff8>\n-/build/1st/ssocr-2.23.0/charset.c:122\n+/build/2/ssocr-2.23.0/2nd/charset.c:122\n \teorscs\tr4, r9, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:123\n+/build/2/ssocr-2.23.0/2nd/charset.c:123\n \tldrbtmi\tr4, [fp], #-3009\t@ 0xfffff43f\n \t\t\t@ instruction: 0xf8832239\n \tblmi\tff014174 <__bss_end__@@Base+0xff001ecc>\n-/build/1st/ssocr-2.23.0/charset.c:124\n+/build/2/ssocr-2.23.0/2nd/charset.c:124\n \teorcs\tr4, lr, #2063597568\t@ 0x7b000000\n \taddcs\tpc, r0, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:125\n+/build/2/ssocr-2.23.0/2nd/charset.c:125\n \tldrbtmi\tr4, [fp], #-3006\t@ 0xfffff442\n \tandsvc\tr2, sl, #-805306366\t@ 0xd0000002\n-/build/1st/ssocr-2.23.0/charset.c:126\n+/build/2/ssocr-2.23.0/2nd/charset.c:126\n \tblmi\tfef84484 <__bss_end__@@Base+0xfef721dc>\n-/build/1st/ssocr-2.23.0/charset.c:128\n+/build/2/ssocr-2.23.0/2nd/charset.c:128\n \teorscs\tr4, r0, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:129\n+/build/2/ssocr-2.23.0/2nd/charset.c:129\n \tldrbtmi\tr4, [fp], #-3003\t@ 0xfffff445\n \t\t\t@ instruction: 0xf8832231\n \tblmi\tfee94170 <__bss_end__@@Base+0xfee81ec8>\n-/build/1st/ssocr-2.23.0/charset.c:130\n+/build/2/ssocr-2.23.0/2nd/charset.c:130\n \teorscs\tr4, r2, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, sp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:131\n+/build/2/ssocr-2.23.0/2nd/charset.c:131\n \tldrbtmi\tr4, [fp], #-3000\t@ 0xfffff448\n \t\t\t@ instruction: 0xf8832233\n \tblmi\tfedd42a8 <__bss_end__@@Base+0xfedc2000>\n-/build/1st/ssocr-2.23.0/charset.c:132\n+/build/2/ssocr-2.23.0/2nd/charset.c:132\n \teorscs\tr4, r4, #2063597568\t@ 0x7b000000\n \teorcs\tpc, lr, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:133\n+/build/2/ssocr-2.23.0/2nd/charset.c:133\n \tldrbtmi\tr4, [fp], #-2997\t@ 0xfffff44b\n \t\t\t@ instruction: 0xf8832235\n \tblmi\tfed142b4 <__bss_end__@@Base+0xfed0200c>\n-/build/1st/ssocr-2.23.0/charset.c:134\n+/build/2/ssocr-2.23.0/2nd/charset.c:134\n \teorscs\tr4, r6, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:135\n+/build/2/ssocr-2.23.0/2nd/charset.c:135\n \tldrbtmi\tr4, [fp], #-2994\t@ 0xfffff44e\n \t\t\t@ instruction: 0xf8832237\n \tblmi\tfec541b0 <__bss_end__@@Base+0xfec41f08>\n-/build/1st/ssocr-2.23.0/charset.c:136\n+/build/2/ssocr-2.23.0/2nd/charset.c:136\n \teorscs\tr4, r7, #2063597568\t@ 0x7b000000\n \teorcs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:137\n+/build/2/ssocr-2.23.0/2nd/charset.c:137\n \tldrbtmi\tr4, [fp], #-2991\t@ 0xfffff451\n \t\t\t@ instruction: 0xf8832238\n \tblmi\tfeb9432c <__bss_end__@@Base+0xfeb82084>\n-/build/1st/ssocr-2.23.0/charset.c:138\n+/build/2/ssocr-2.23.0/2nd/charset.c:138\n \teorscs\tr4, r9, #2063597568\t@ 0x7b000000\n \trsbcs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:139\n+/build/2/ssocr-2.23.0/2nd/charset.c:139\n \tldrbtmi\tr4, [fp], #-2988\t@ 0xfffff454\n \t\t\t@ instruction: 0xf8832239\n \tblmi\tfead4200 <__bss_end__@@Base+0xfeac1f58>\n-/build/1st/ssocr-2.23.0/charset.c:140\n+/build/2/ssocr-2.23.0/2nd/charset.c:140\n \teorcs\tr4, lr, #2063597568\t@ 0x7b000000\n \taddcs\tpc, r0, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:141\n+/build/2/ssocr-2.23.0/2nd/charset.c:141\n \tldrbtmi\tr4, [fp], #-2985\t@ 0xfffff457\n \tandsvc\tr2, sl, #-805306366\t@ 0xd0000002\n-/build/1st/ssocr-2.23.0/charset.c:142\n+/build/2/ssocr-2.23.0/2nd/charset.c:142\n \tldrbtmi\tr4, [fp], #-2984\t@ 0xfffff458\n \t\t\t@ instruction: 0xf8832261\n \tblmi\tfe9d425c <__bss_end__@@Base+0xfe9c1fb4>\n-/build/1st/ssocr-2.23.0/charset.c:143\n+/build/2/ssocr-2.23.0/2nd/charset.c:143\n \trsbcs\tr4, r2, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, sl, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:144\n+/build/2/ssocr-2.23.0/2nd/charset.c:144\n \tldrbtmi\tr4, [fp], #-2981\t@ 0xfffff45b\n \t\t\t@ instruction: 0xf8832263\n \tblmi\tfe9142c0 <__bss_end__@@Base+0xfe902018>\n-/build/1st/ssocr-2.23.0/charset.c:145\n+/build/2/ssocr-2.23.0/2nd/charset.c:145\n \trsbcs\tr4, r3, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, r8, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:146\n+/build/2/ssocr-2.23.0/2nd/charset.c:146\n \tldrbtmi\tr4, [fp], #-2978\t@ 0xfffff45e\n \t\t\t@ instruction: 0xf8832264\n \tblmi\tfe854378 <__bss_end__@@Base+0xfe8420d0>\n-/build/1st/ssocr-2.23.0/charset.c:147\n+/build/2/ssocr-2.23.0/2nd/charset.c:147\n \trsbcs\tr4, r5, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:148\n+/build/2/ssocr-2.23.0/2nd/charset.c:148\n \tldrbtmi\tr4, [fp], #-2975\t@ 0xfffff461\n \tldrbvc\tr2, [sl], r6, ror #4\n-/build/1st/ssocr-2.23.0/charset.c:149\n+/build/2/ssocr-2.23.0/2nd/charset.c:149\n \tblmi\tfe7c43b4 <__bss_end__@@Base+0xfe7b210c>\n-/build/1st/ssocr-2.23.0/charset.c:151\n+/build/2/ssocr-2.23.0/2nd/charset.c:151\n \teorscs\tr4, r0, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:152\n+/build/2/ssocr-2.23.0/2nd/charset.c:152\n \tldrbtmi\tr4, [fp], #-2972\t@ 0xfffff464\n \t\t\t@ instruction: 0xf8832231\n \tblmi\tfe6d4240 <__bss_end__@@Base+0xfe6c1f98>\n-/build/1st/ssocr-2.23.0/charset.c:153\n+/build/2/ssocr-2.23.0/2nd/charset.c:153\n \teorscs\tr4, r2, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, sp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:154\n+/build/2/ssocr-2.23.0/2nd/charset.c:154\n \tldrbtmi\tr4, [fp], #-2969\t@ 0xfffff467\n \t\t\t@ instruction: 0xf8832233\n \tblmi\tfe614378 <__bss_end__@@Base+0xfe6020d0>\n-/build/1st/ssocr-2.23.0/charset.c:155\n+/build/2/ssocr-2.23.0/2nd/charset.c:155\n \teorscs\tr4, r4, #2063597568\t@ 0x7b000000\n \teorcs\tpc, lr, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:156\n+/build/2/ssocr-2.23.0/2nd/charset.c:156\n \tldrbtmi\tr4, [fp], #-2966\t@ 0xfffff46a\n \t\t\t@ instruction: 0xf8832235\n \tblmi\tfe554384 <__bss_end__@@Base+0xfe5420dc>\n-/build/1st/ssocr-2.23.0/charset.c:157\n+/build/2/ssocr-2.23.0/2nd/charset.c:157\n \teorscs\tr4, r6, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, fp, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:158\n+/build/2/ssocr-2.23.0/2nd/charset.c:158\n \tldrbtmi\tr4, [fp], #-2963\t@ 0xfffff46d\n \t\t\t@ instruction: 0xf8832237\n \tblmi\tfe494280 <__bss_end__@@Base+0xfe481fd8>\n-/build/1st/ssocr-2.23.0/charset.c:159\n+/build/2/ssocr-2.23.0/2nd/charset.c:159\n \teorscs\tr4, r7, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, r5, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:160\n+/build/2/ssocr-2.23.0/2nd/charset.c:160\n \tldrbtmi\tr4, [fp], #-2960\t@ 0xfffff470\n \t\t\t@ instruction: 0xf8832237\n \tblmi\tfe3d4394 <__bss_end__@@Base+0xfe3c20ec>\n-/build/1st/ssocr-2.23.0/charset.c:161\n+/build/2/ssocr-2.23.0/2nd/charset.c:161\n \teorscs\tr4, r8, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:162\n+/build/2/ssocr-2.23.0/2nd/charset.c:162\n \tldrbtmi\tr4, [fp], #-2957\t@ 0xfffff473\n \t\t\t@ instruction: 0xf8832239\n \tblmi\tfe3143d0 <__bss_end__@@Base+0xfe302128>\n-/build/1st/ssocr-2.23.0/charset.c:163\n+/build/2/ssocr-2.23.0/2nd/charset.c:163\n \teorcs\tr4, sp, #2063597568\t@ 0x7b000000\n \tblmi\tfe2e8a84 <__bss_end__@@Base+0xfe2d67dc>\n-/build/1st/ssocr-2.23.0/charset.c:164\n+/build/2/ssocr-2.23.0/2nd/charset.c:164\n \trsbcs\tr4, r1, #2063597568\t@ 0x7b000000\n \teorscs\tpc, pc, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:165\n+/build/2/ssocr-2.23.0/2nd/charset.c:165\n \tldrbtmi\tr4, [fp], #-2953\t@ 0xfffff477\n \t\t\t@ instruction: 0xf8832262\n \tblmi\tfe214418 <__bss_end__@@Base+0xfe202170>\n-/build/1st/ssocr-2.23.0/charset.c:166\n+/build/2/ssocr-2.23.0/2nd/charset.c:166\n \trsbcs\tr4, r3, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, r3, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:167\n+/build/2/ssocr-2.23.0/2nd/charset.c:167\n \tldrbtmi\tr4, [fp], #-2950\t@ 0xfffff47a\n \t\t\t@ instruction: 0xf8832264\n \tblmi\tfe154434 <__bss_end__@@Base+0xfe14218c>\n-/build/1st/ssocr-2.23.0/charset.c:168\n+/build/2/ssocr-2.23.0/2nd/charset.c:168\n \trsbscs\tr4, r6, #2063597568\t@ 0x7b000000\n \trsbscs\tpc, r6, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:169\n+/build/2/ssocr-2.23.0/2nd/charset.c:169\n \tldrbtmi\tr4, [fp], #-2947\t@ 0xfffff47d\n \t\t\t@ instruction: 0xf8832274\n \tblmi\tfe0943c0 <__bss_end__@@Base+0xfe082118>\n-/build/1st/ssocr-2.23.0/charset.c:170\n+/build/2/ssocr-2.23.0/2nd/charset.c:170\n \trsbcs\tr4, ip, #2063597568\t@ 0x7b000000\n \tsubscs\tpc, r2, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:171\n+/build/2/ssocr-2.23.0/2nd/charset.c:171\n \tldrbtmi\tr4, [fp], #-2944\t@ 0xfffff480\n \t\t\t@ instruction: 0xf8832268\n \tblmi\t1fd4364 <__bss_end__@@Base+0x1fc20bc>\n-/build/1st/ssocr-2.23.0/charset.c:172\n+/build/2/ssocr-2.23.0/2nd/charset.c:172\n \trsbscs\tr4, r2, #2063597568\t@ 0x7b000000\n \tblmi\t1fa99dc <__bss_end__@@Base+0x1f97734>\n-/build/1st/ssocr-2.23.0/charset.c:173\n+/build/2/ssocr-2.23.0/2nd/charset.c:173\n \trsbscs\tr4, r0, #2063597568\t@ 0x7b000000\n \tblmi\t1f6a1e4 <__bss_end__@@Base+0x1f57f3c>\n-/build/1st/ssocr-2.23.0/charset.c:174\n+/build/2/ssocr-2.23.0/2nd/charset.c:174\n \trsbcs\tr4, lr, #2063597568\t@ 0x7b000000\n \teorscs\tpc, r7, r3, lsl #17\n-/build/1st/ssocr-2.23.0/charset.c:175\n+/build/2/ssocr-2.23.0/2nd/charset.c:175\n \tblmi\t1f042c8 <__bss_end__@@Base+0x1ef2020>\n-/build/1st/ssocr-2.23.0/charset.c:177\n+/build/2/ssocr-2.23.0/2nd/charset.c:177\n \tldmdavs\tip, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf7fe6878\n \tstrmi\tpc, [r3], -r9, ror #31\n \tldrbtmi\tr4, [sl], #-2680\t@ 0xfffff588\n \tldrbtmi\tr4, [r9], #-2424\t@ 0xfffff688\n \t\t\t@ instruction: 0xf7f44620\n \trsbcs\tlr, r3, ip, asr #29\n-/build/1st/ssocr-2.23.0/charset.c:179\n+/build/2/ssocr-2.23.0/2nd/charset.c:179\n \tsvc\t0x0034f7f4\n-/build/1st/ssocr-2.23.0/charset.c:182\n+/build/2/ssocr-2.23.0/2nd/charset.c:182\n \tbmi\t1d7beac <__bss_end__@@Base+0x1d69c04>\n-/build/1st/ssocr-2.23.0/charset.c:56\n+/build/2/ssocr-2.23.0/2nd/charset.c:56\n \tblmi\t21d498 <__bss_end__@@Base+0x20b1f0>\n-/build/1st/ssocr-2.23.0/charset.c:182\n+/build/2/ssocr-2.23.0/2nd/charset.c:182\n \tldmdavs\tsl, {r0, r1, r4, r6, r7, fp, ip, lr}\n \tldrshmi\tr6, [sl], #-139\t@ 0xffffff75\n \tmovweq\tpc, #79\t@ 0x4f\t@ \n \t\t\t@ instruction: 0xf7f4d001\n \t\t\t@ instruction: 0x3714eed4\n \tldclt\t6, cr4, [r0, #756]\t@ 0x2f4\n \tandeq\tr6, r0, ip, asr #1\n@@ -13807,49 +13807,49 @@\n \t\t\t@ instruction: 0x00005fb0\n \tandeq\tr5, r0, r8, lsr #31\n \tandeq\tr0, r0, ip, lsl #2\n \tandeq\tr4, r0, r6, lsl r9\n \tandeq\tr4, r0, sl, lsl r9\n \tandeq\tr5, r0, r4, lsr ip\n print_digit():\n-/build/1st/ssocr-2.23.0/charset.c:186\n+/build/2/ssocr-2.23.0/2nd/charset.c:186\n \taddlt\tfp, r6, r0, lsl #11\n \trsbsvs\tsl, r8, r0, lsl #30\n \tbmi\t6e4574 <__bss_end__@@Base+0x6d22cc>\n \tblmi\t6dd67c <__bss_end__@@Base+0x6cb3d4>\n \tldmdavs\tfp, {r0, r1, r4, r6, r7, fp, ip, lr}\n \t\t\t@ instruction: 0xf04f617b\n \tmovwcs\tr0, #768\t@ 0x300\n-/build/1st/ssocr-2.23.0/charset.c:187\n+/build/2/ssocr-2.23.0/2nd/charset.c:187\n \tcmpcs\tpc, #-1073741810\t@ 0xc000000e\n-/build/1st/ssocr-2.23.0/charset.c:188\n+/build/2/ssocr-2.23.0/2nd/charset.c:188\n \tldmdavs\tfp!, {r0, r1, r3, r4, r5, r6, r7, r8, r9, ip, sp, lr}^\n-/build/1st/ssocr-2.23.0/charset.c:190\n+/build/2/ssocr-2.23.0/2nd/charset.c:190\n \t\t\t@ instruction: 0xdc052b80\n-/build/1st/ssocr-2.23.0/charset.c:191\n+/build/2/ssocr-2.23.0/2nd/charset.c:191\n \tldrbtmi\tr4, [sl], #-2581\t@ 0xfffff5eb\n \tldrmi\tr6, [r3], #-2171\t@ 0xfffff785\n \tmvnsvc\tr7, #1769472\t@ 0x1b0000\n-/build/1st/ssocr-2.23.0/charset.c:193\n+/build/2/ssocr-2.23.0/2nd/charset.c:193\n \tblcs\t17eb4a8 <__bss_end__@@Base+0x17d9200>\n \tmovwcs\tsp, #4353\t@ 0x1101\n-/build/1st/ssocr-2.23.0/charset.c:194\n+/build/2/ssocr-2.23.0/2nd/charset.c:194\n \tblvc\tffee49b0 <__bss_end__@@Base+0xffed2708>\n-/build/1st/ssocr-2.23.0/charset.c:196\n+/build/2/ssocr-2.23.0/2nd/charset.c:196\n \ttstle\tr4, lr, lsr #22\n-/build/1st/ssocr-2.23.0/charset.c:196 (discriminator 1)\n+/build/2/ssocr-2.23.0/2nd/charset.c:196 (discriminator 1)\n \tvst2.8\t{d6-d7}, [r3 :256], fp\n \tblcs\t252d0 <__bss_end__@@Base+0x13028>\n \tblvc\tfff008e0 <__bss_end__@@Base+0xffeee638>\n-/build/1st/ssocr-2.23.0/charset.c:197\n+/build/2/ssocr-2.23.0/2nd/charset.c:197\n \t\t\t@ instruction: 0xf7f44618\n \tldmdbvs\tfp!, {r1, r2, r3, r8, sl, fp, sp, lr, pc}\n-/build/1st/ssocr-2.23.0/charset.c:186\n+/build/2/ssocr-2.23.0/2nd/charset.c:186\n \tldrbtmi\tr4, [r9], #-2314\t@ 0xfffff6f6\n-/build/1st/ssocr-2.23.0/charset.c:201\n+/build/2/ssocr-2.23.0/2nd/charset.c:201\n \tstmpl\tsl, {r0, r1, r2, r9, fp, lr}\n \tldmdbvs\tsl!, {r0, r4, fp, sp, lr}^\n \t\t\t@ instruction: 0xf04f4051\n \tandle\tr0, r1, r0, lsl #4\n \tldc\t7, cr15, [sl, #976]!\t@ 0x3d0\n \t\t\t@ instruction: 0x37184618\n \tstclt\t6, cr4, [r0, #756]\t@ 0x2f4\n"}, {"source1": "readelf --wide --decompress --hex-dump=.gnu_debuglink {}", "source2": "readelf --wide --decompress --hex-dump=.gnu_debuglink {}", "comments": ["error from `readelf --wide --decompress --hex-dump=.gnu_debuglink {}`:", "readelf: Error: Unable to find program interpreter name", "readelf: Error: no .dynamic section in the dynamic segment"], "unified_diff": "@@ -1,7 +1,7 @@\n \n Hex dump of section '.gnu_debuglink':\n- 0x00000000 32663839 30393139 31383837 34313238 2f89091918874128\n- 0x00000010 65653637 36626433 65363065 35613635 ee676bd3e60e5a65\n- 0x00000020 38613162 35342e64 65627567 00000000 8a1b54.debug....\n- 0x00000030 80b0fccc ....\n+ 0x00000000 64373864 36313838 37336661 63626330 d78d618873facbc0\n+ 0x00000010 65653261 33633166 63313738 36623062 ee2a3c1fc1786b0b\n+ 0x00000020 61656132 62612e64 65627567 00000000 aea2ba.debug....\n+ 0x00000030 2588d0f8 %...\n \n"}]}, {"source1": "./usr/share/man/man1/ssocr.1.gz", "source2": "./usr/share/man/man1/ssocr.1.gz", "unified_diff": null, "details": [{"source1": "ssocr.1", "source2": "ssocr.1", "unified_diff": "@@ -1,8 +1,8 @@\n-.TH ssocr 1 \"2023-05-07\" \"2.23.0\" \"OCR for seven segment displays\"\n+.TH ssocr 1 \"2023-05-08\" \"2.23.0\" \"OCR for seven segment displays\"\n .SH NAME\n ssocr \\- optical recognition of seven segment displays\n .SH SYNOPSIS\n .B ssocr [OPTION]... [COMMAND]... IMAGE\n .SH DESCRIPTION\n .B ssocr\n reads an image file containing the picture of a seven segment display,\n"}]}]}]}]}, {"source1": "ssocr-dbgsym_2.23.0-1_armhf.deb", "source2": "ssocr-dbgsym_2.23.0-1_armhf.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2023-05-07 14:34:53.000000 debian-binary\n -rw-r--r-- 0 0 0 508 2023-05-07 14:34:53.000000 control.tar.xz\n--rw-r--r-- 0 0 0 18508 2023-05-07 14:34:53.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 18532 2023-05-07 14:34:53.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./control", "source2": "./control", "unified_diff": "@@ -5,8 +5,8 @@\n Architecture: armhf\n Maintainer: G\u00fcrkan Myczko \n Installed-Size: 36\n Depends: ssocr (= 2.23.0-1)\n Section: debug\n Priority: optional\n Description: debug symbols for ssocr\n-Build-Ids: 6a2f89091918874128ee676bd3e60e5a658a1b54\n+Build-Ids: 60d78d618873facbc0ee2a3c1fc1786b0baea2ba\n"}, {"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}, {"source1": "line order", "source2": "line order", "unified_diff": "@@ -1 +1 @@\n-usr/lib/debug/.build-id/6a/2f89091918874128ee676bd3e60e5a658a1b54.debug\n+usr/lib/debug/.build-id/60/d78d618873facbc0ee2a3c1fc1786b0baea2ba.debug\n"}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,10 +1,10 @@\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/lib/\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/lib/debug/\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/lib/debug/.build-id/\n-drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/lib/debug/.build-id/6a/\n--rw-r--r-- 0 root (0) root (0) 26172 2023-05-07 14:34:53.000000 ./usr/lib/debug/.build-id/6a/2f89091918874128ee676bd3e60e5a658a1b54.debug\n+drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/lib/debug/.build-id/60/\n+-rw-r--r-- 0 root (0) root (0) 26168 2023-05-07 14:34:53.000000 ./usr/lib/debug/.build-id/60/d78d618873facbc0ee2a3c1fc1786b0baea2ba.debug\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/share/\n drwxr-xr-x 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/share/doc/\n lrwxrwxrwx 0 root (0) root (0) 0 2023-05-07 14:34:53.000000 ./usr/share/doc/ssocr-dbgsym -> ssocr\n"}, {"source1": "./usr/lib/debug/.build-id/6a/2f89091918874128ee676bd3e60e5a658a1b54.debug", "source2": "./usr/lib/debug/.build-id/60/d78d618873facbc0ee2a3c1fc1786b0baea2ba.debug", "comments": ["File has been modified after NT_GNU_BUILD_ID has been applied.", "Files 10% similar despite different names"], "unified_diff": null, "details": [{"source1": "readelf --wide --file-header {}", "source2": "readelf --wide --file-header {}", "comments": ["error from `readelf --wide --file-header {}`:", "readelf: Error: Unable to find program interpreter name"], "unified_diff": "@@ -6,15 +6,15 @@\n OS/ABI: UNIX - System V\n ABI Version: 0\n Type: DYN (Shared object file)\n Machine: ARM\n Version: 0x1\n Entry point address: 0x1141\n Start of program headers: 52 (bytes into file)\n- Start of section headers: 24732 (bytes into file)\n+ Start of section headers: 24728 (bytes into file)\n Flags: 0x5000400, Version5 EABI, hard-float ABI\n Size of this header: 52 (bytes)\n Size of program headers: 32 (bytes)\n Number of program headers: 9\n Size of section headers: 40 (bytes)\n Number of section headers: 36\n Section header string table index: 35\n"}, {"source1": "readelf --wide --sections {}", "source2": "readelf --wide --sections {}", "comments": ["error from `readelf --wide --sections {}`:", "readelf: Error: Unable to find program interpreter name"], "unified_diff": "@@ -1,8 +1,8 @@\n-There are 36 section headers, starting at offset 0x609c:\n+There are 36 section headers, starting at offset 0x6098:\n \n Section Headers:\n [Nr] Name Type Addr Off Size ES Flg Lk Inf Al\n [ 0] NULL 00000000 000000 000000 00 0 0 0\n [ 1] .interp NOBITS 00000154 000154 000019 00 A 0 0 1\n [ 2] .note.gnu.build-id NOTE 00000170 000170 000024 00 A 0 0 4\n [ 3] .note.ABI-tag NOTE 00000194 000194 000020 00 A 0 0 4\n@@ -25,21 +25,21 @@\n [20] .dynamic NOBITS 00011dd0 000dc8 000110 08 WA 6 0 4\n [21] .got NOBITS 00011ee0 000dc8 000120 04 WA 0 0 4\n [22] .data NOBITS 00012000 000dc8 00021c 00 WA 0 0 4\n [23] .bss NOBITS 0001221c 000dc8 00008c 00 WA 0 0 4\n [24] .comment PROGBITS 00000000 0001b4 00001f 01 MS 0 0 1\n [25] .ARM.attributes ARM_ATTRIBUTES 00000000 0001d3 000033 00 0 0 1\n [26] .debug_aranges PROGBITS 00000000 000208 000051 00 C 0 0 4\n- [27] .debug_info PROGBITS 00000000 00025c 00182b 00 C 0 0 4\n- [28] .debug_abbrev PROGBITS 00000000 001a88 00023b 00 C 0 0 4\n- [29] .debug_line PROGBITS 00000000 001cc4 0014c4 00 C 0 0 4\n- [30] .debug_frame PROGBITS 00000000 003188 0002f8 00 C 0 0 4\n- [31] .debug_str PROGBITS 00000000 003480 000722 01 MSC 0 0 4\n- [32] .debug_rnglists PROGBITS 00000000 003ba2 000017 00 0 0 1\n- [33] .symtab SYMTAB 00000000 003bbc 001950 10 34 264 4\n- [34] .strtab STRTAB 00000000 00550c 000a2c 00 0 0 1\n- [35] .shstrtab STRTAB 00000000 005f38 000162 00 0 0 1\n+ [27] .debug_info PROGBITS 00000000 00025c 001825 00 C 0 0 4\n+ [28] .debug_abbrev PROGBITS 00000000 001a84 00023b 00 C 0 0 4\n+ [29] .debug_line PROGBITS 00000000 001cc0 0014c4 00 C 0 0 4\n+ [30] .debug_frame PROGBITS 00000000 003184 0002f8 00 C 0 0 4\n+ [31] .debug_str PROGBITS 00000000 00347c 000722 01 MSC 0 0 4\n+ [32] .debug_rnglists PROGBITS 00000000 003b9e 000017 00 0 0 1\n+ [33] .symtab SYMTAB 00000000 003bb8 001950 10 34 264 4\n+ [34] .strtab STRTAB 00000000 005508 000a2c 00 0 0 1\n+ [35] .shstrtab STRTAB 00000000 005f34 000162 00 0 0 1\n Key to Flags:\n W (write), A (alloc), X (execute), M (merge), S (strings), I (info),\n L (link order), O (extra OS processing required), G (group), T (TLS),\n C (compressed), x (unknown), o (OS specific), E (exclude),\n D (mbind), y (purecode), p (processor specific)\n"}, {"source1": "readelf --wide --notes {}", "source2": "readelf --wide --notes {}", "comments": ["error from `readelf --wide --notes {}`:", "readelf: Error: Unable to find program interpreter name"], "unified_diff": "@@ -1,8 +1,8 @@\n \n Displaying notes found in: .note.gnu.build-id\n Owner Data size \tDescription\n- GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 6a2f89091918874128ee676bd3e60e5a658a1b54\n+ GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 60d78d618873facbc0ee2a3c1fc1786b0baea2ba\n \n Displaying notes found in: .note.ABI-tag\n Owner Data size \tDescription\n GNU 0x00000010\tNT_GNU_ABI_TAG (ABI version tag)\t OS: Linux, ABI: 3.2.0\n"}, {"source1": "readelf --wide --debug-dump=info {}", "source2": "readelf --wide --debug-dump=info {}", "comments": ["error from `readelf --wide --debug-dump=info {}`:", "readelf: Error: Unable to find program interpreter name"], "unified_diff": "@@ -4,314 +4,314 @@\n Length: 0x21d (32-bit)\n Version: 5\n Unit Type: DW_UT_partial (3)\n Abbrev Offset: 0\n Pointer Size: 4\n <0>: Abbrev Number: 66 (DW_TAG_partial_unit)\n DW_AT_stmt_list : (sec_offset) 0\n- <11> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <11> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <1><15>: Abbrev Number: 55 (DW_TAG_base_type)\n <16> DW_AT_byte_size : (data1) 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<6e> DW_AT_name : (strp) (offset: 0x8c6): __off64_t\n+ <6e> DW_AT_name : (strp) (offset: 0x8c8): __off64_t\n <72> DW_AT_decl_file : (data1) 2\n <73> DW_AT_decl_line : (data1) 153\n <74> DW_AT_decl_column : (data1) 27\n <75> DW_AT_type : (ref_udata) <0x46>, __int64_t, long long int\n <1><76>: Abbrev Number: 75 (DW_TAG_pointer_type)\n <77> DW_AT_byte_size : (data1) 4\n <1><78>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <79> DW_AT_byte_size : (implicit_const) 4\n <79> DW_AT_type : (ref_udata) <0x7a>, char\n <1><7a>: Abbrev Number: 55 (DW_TAG_base_type)\n <7b> DW_AT_byte_size : (data1) 1\n <7c> DW_AT_encoding : (data1) 8\t(unsigned char)\n- <7d> DW_AT_name : (strp) (offset: 0x2d3): char\n+ <7d> DW_AT_name : (strp) (offset: 0x2bb): char\n <1><81>: Abbrev Number: 35 (DW_TAG_const_type)\n <82> DW_AT_type : (ref_udata) <0x7a>, char\n <1><83>: Abbrev Number: 39 (DW_TAG_typedef)\n <84> DW_AT_name : (strp) (offset: 0x40): size_t\n <88> DW_AT_decl_file : (data1) 4\n <89> DW_AT_decl_line : (data1) 214\n <8a> DW_AT_decl_column : (data1) 23\n <8b> DW_AT_type : (ref_udata) <0x23>, unsigned int\n <1><8c>: Abbrev Number: 26 (DW_TAG_structure_type)\n- <8d> DW_AT_name : (strp) (offset: 0x273): _IO_FILE\n+ <8d> DW_AT_name : (strp) (offset: 0x25b): _IO_FILE\n <91> DW_AT_byte_size : (data1) 152\n <92> DW_AT_decl_file : (data1) 6\n <93> DW_AT_decl_line : (data1) 49\n <94> DW_AT_decl_column : (implicit_const) 8\n <94> DW_AT_sibling : (ref_udata) <0x1c2>\n <2><96>: Abbrev Number: 42 (DW_TAG_member)\n- <97> DW_AT_name : (strp) (offset: 0x674): _flags\n+ <97> DW_AT_name : (strp) (offset: 0x676): _flags\n <9b> DW_AT_decl_file : (data1) 6\n <9c> DW_AT_decl_line : (data1) 51\n <9d> DW_AT_decl_column : (data1) 7\n <9e> DW_AT_type : (ref_udata) <0x3f>, int\n <9f> DW_AT_data_member_location: (data1) 0\n <2>: Abbrev Number: 42 (DW_TAG_member)\n- DW_AT_name : (strp) (offset: 0x398): _IO_read_ptr\n+ DW_AT_name : (strp) (offset: 0x39a): _IO_read_ptr\n DW_AT_decl_file : (data1) 6\n DW_AT_decl_line : (data1) 54\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_udata) <0x78>\n DW_AT_data_member_location: (data1) 4\n <2>: Abbrev Number: 42 (DW_TAG_member)\n- DW_AT_name : (strp) (offset: 0xa40): _IO_read_end\n+ DW_AT_name : (strp) (offset: 0xa42): _IO_read_end\n DW_AT_decl_file : (data1) 6\n DW_AT_decl_line : (data1) 55\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_udata) <0x78>\n DW_AT_data_member_location: (data1) 8\n <2>: Abbrev Number: 42 (DW_TAG_member)\n- DW_AT_name : (strp) (offset: 0x4d9): _IO_read_base\n+ DW_AT_name : (strp) (offset: 0x4db): _IO_read_base\n DW_AT_decl_file : (data1) 6\n DW_AT_decl_line : (data1) 56\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_udata) <0x78>\n DW_AT_data_member_location: (data1) 12\n <2>: Abbrev Number: 42 (DW_TAG_member)\n- DW_AT_name : (strp) (offset: 0xa7): _IO_write_base\n+ DW_AT_name : (strp) (offset: 0x8f): _IO_write_base\n DW_AT_decl_file : (data1) 6\n DW_AT_decl_line : (data1) 57\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_udata) <0x78>\n DW_AT_data_member_location: (data1) 16\n <2>: Abbrev Number: 42 (DW_TAG_member)\n- DW_AT_name : (strp) (offset: 0xb4d): _IO_write_ptr\n+ DW_AT_name : (strp) (offset: 0xb4f): _IO_write_ptr\n DW_AT_decl_file : (data1) 6\n DW_AT_decl_line : (data1) 58\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_udata) <0x78>\n DW_AT_data_member_location: (data1) 20\n <2>: Abbrev Number: 42 (DW_TAG_member)\n- DW_AT_name : (strp) (offset: 0x5ea): _IO_write_end\n+ DW_AT_name : (strp) (offset: 0x5ec): _IO_write_end\n DW_AT_decl_file : (data1) 6\n DW_AT_decl_line : (data1) 59\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_udata) <0x78>\n DW_AT_data_member_location: (data1) 24\n <2>: Abbrev Number: 42 (DW_TAG_member)\n-
DW_AT_name : (strp) (offset: 0x610): _IO_buf_base\n+
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_IO_backup_base\n DW_AT_decl_file : (data1) 6\n <100> DW_AT_decl_line : (data1) 65\n <101> DW_AT_decl_column : (data1) 9\n <102> DW_AT_type : (ref_udata) <0x78>\n <103> DW_AT_data_member_location: (data1) 40\n <2><104>: Abbrev Number: 42 (DW_TAG_member)\n <105> DW_AT_name : (strp) (offset: 0x53): _IO_save_end\n <109> DW_AT_decl_file : (data1) 6\n <10a> DW_AT_decl_line : (data1) 66\n <10b> DW_AT_decl_column : (data1) 9\n <10c> DW_AT_type : (ref_udata) <0x78>\n <10d> DW_AT_data_member_location: (data1) 44\n <2><10e>: Abbrev Number: 42 (DW_TAG_member)\n- <10f> DW_AT_name : (strp) (offset: 0x3f0): _markers\n+ <10f> DW_AT_name : (strp) (offset: 0x3f2): _markers\n <113> DW_AT_decl_file : (data1) 6\n <114> DW_AT_decl_line : (data1) 68\n <115> DW_AT_decl_column : (data1) 22\n <116> DW_AT_type : (ref_udata) <0x1d9>\n <118> DW_AT_data_member_location: (data1) 48\n <2><119>: Abbrev Number: 42 (DW_TAG_member)\n- <11a> DW_AT_name : (strp) (offset: 0x13c): _chain\n+ <11a> DW_AT_name : (strp) (offset: 0x124): _chain\n <11e> DW_AT_decl_file : (data1) 6\n <11f> DW_AT_decl_line : (data1) 70\n <120> DW_AT_decl_column : (data1) 20\n <121> DW_AT_type : (ref_udata) <0x1dc>\n <123> DW_AT_data_member_location: (data1) 52\n <2><124>: Abbrev Number: 42 (DW_TAG_member)\n- <125> DW_AT_name : (strp) (offset: 0xac1): _fileno\n+ <125> DW_AT_name : (strp) (offset: 0xac3): _fileno\n <129> DW_AT_decl_file : (data1) 6\n <12a> DW_AT_decl_line : (data1) 72\n <12b> DW_AT_decl_column : (data1) 7\n <12c> DW_AT_type : (ref_udata) <0x3f>, int\n <12d> DW_AT_data_member_location: (data1) 56\n <2><12e>: Abbrev Number: 42 (DW_TAG_member)\n- <12f> DW_AT_name : (strp) (offset: 0x4d1): _flags2\n+ <12f> DW_AT_name : (strp) (offset: 0x4d3): _flags2\n <133> DW_AT_decl_file : (data1) 6\n <134> DW_AT_decl_line : (data1) 73\n <135> DW_AT_decl_column : (data1) 7\n <136> DW_AT_type : (ref_udata) <0x3f>, int\n <137> DW_AT_data_member_location: (data1) 60\n <2><138>: Abbrev Number: 42 (DW_TAG_member)\n- <139> DW_AT_name : (strp) (offset: 0x589): _old_offset\n+ <139> DW_AT_name : (strp) (offset: 0x58b): _old_offset\n <13d> DW_AT_decl_file : (data1) 6\n <13e> DW_AT_decl_line : (data1) 74\n <13f> DW_AT_decl_column : (data1) 11\n <140> DW_AT_type : (ref_udata) <0x5d>, __off_t, long int\n <141> DW_AT_data_member_location: (data1) 64\n <2><142>: Abbrev Number: 42 (DW_TAG_member)\n- <143> DW_AT_name : (strp) (offset: 0x14b): _cur_column\n+ <143> DW_AT_name : (strp) (offset: 0x133): _cur_column\n <147> DW_AT_decl_file : (data1) 6\n <148> DW_AT_decl_line : (data1) 77\n <149> DW_AT_decl_column : (data1) 18\n <14a> DW_AT_type : (ref_udata) <0x1c>, short unsigned int\n <14b> DW_AT_data_member_location: (data1) 68\n <2><14c>: Abbrev Number: 42 (DW_TAG_member)\n- <14d> DW_AT_name : (strp) (offset: 0x973): _vtable_offset\n+ <14d> DW_AT_name : (strp) (offset: 0x975): _vtable_offset\n <151> DW_AT_decl_file : (data1) 6\n <152> DW_AT_decl_line : (data1) 78\n <153> DW_AT_decl_column : (data1) 15\n <154> DW_AT_type : (ref_udata) <0x31>, signed char\n <155> DW_AT_data_member_location: (data1) 70\n <2><156>: Abbrev Number: 42 (DW_TAG_member)\n- <157> DW_AT_name : (strp) (offset: 0x8a0): _shortbuf\n+ <157> DW_AT_name : (strp) (offset: 0x8a2): _shortbuf\n <15b> DW_AT_decl_file : (data1) 6\n <15c> DW_AT_decl_line : (data1) 79\n <15d> DW_AT_decl_column : (data1) 8\n <15e> DW_AT_type : (ref_udata) <0x1df>, char\n <160> DW_AT_data_member_location: (data1) 71\n <2><161>: Abbrev Number: 42 (DW_TAG_member)\n- <162> DW_AT_name : (strp) (offset: 0xbc): _lock\n+ <162> DW_AT_name : (strp) (offset: 0xa4): _lock\n <166> DW_AT_decl_file : (data1) 6\n <167> DW_AT_decl_line : (data1) 81\n <168> DW_AT_decl_column : (data1) 15\n <169> DW_AT_type : (ref_udata) <0x1e7>\n <16b> DW_AT_data_member_location: (data1) 72\n <2><16c>: Abbrev Number: 42 (DW_TAG_member)\n- <16d> DW_AT_name : (strp) (offset: 0x58d): _offset\n+ <16d> DW_AT_name : (strp) (offset: 0x58f): _offset\n <171> DW_AT_decl_file : (data1) 6\n <172> DW_AT_decl_line : (data1) 89\n <173> DW_AT_decl_column : (data1) 13\n <174> DW_AT_type : (ref_udata) <0x6d>, __off64_t, __int64_t, long long int\n <175> DW_AT_data_member_location: (data1) 80\n <2><176>: Abbrev Number: 42 (DW_TAG_member)\n <177> DW_AT_name : (strp) (offset: 0x4a): _codecvt\n <17b> DW_AT_decl_file : (data1) 6\n <17c> DW_AT_decl_line : (data1) 91\n <17d> DW_AT_decl_column : (data1) 23\n <17e> DW_AT_type : (ref_udata) <0x1ef>\n <180> DW_AT_data_member_location: (data1) 88\n <2><181>: Abbrev Number: 42 (DW_TAG_member)\n- <182> DW_AT_name : (strp) (offset: 0x28c): _wide_data\n+ <182> DW_AT_name : (strp) (offset: 0x274): _wide_data\n <186> DW_AT_decl_file : (data1) 6\n <187> DW_AT_decl_line : (data1) 92\n <188> DW_AT_decl_column : (data1) 25\n <189> DW_AT_type : (ref_udata) <0x1f7>\n <18b> DW_AT_data_member_location: (data1) 92\n <2><18c>: Abbrev Number: 42 (DW_TAG_member)\n- <18d> DW_AT_name : (strp) (offset: 0x2d8): _freeres_list\n+ <18d> DW_AT_name : (strp) (offset: 0x2c0): _freeres_list\n <191> DW_AT_decl_file : (data1) 6\n <192> DW_AT_decl_line : (data1) 93\n <193> DW_AT_decl_column : (data1) 20\n <194> DW_AT_type : (ref_udata) <0x1dc>\n <196> DW_AT_data_member_location: (data1) 96\n <2><197>: Abbrev Number: 42 (DW_TAG_member)\n- <198> DW_AT_name : (strp) (offset: 0x7fa): _freeres_buf\n+ <198> DW_AT_name : (strp) (offset: 0x7fc): _freeres_buf\n <19c> DW_AT_decl_file : (data1) 6\n <19d> DW_AT_decl_line : (data1) 94\n <19e> DW_AT_decl_column : (data1) 9\n <19f> DW_AT_type : (ref_udata) <0x76>\n <1a0> DW_AT_data_member_location: (data1) 100\n <2><1a1>: Abbrev Number: 42 (DW_TAG_member)\n- <1a2> DW_AT_name : (strp) (offset: 0x638): __pad5\n+ <1a2> DW_AT_name : (strp) (offset: 0x63a): __pad5\n <1a6> DW_AT_decl_file : (data1) 6\n <1a7> DW_AT_decl_line : (data1) 95\n <1a8> DW_AT_decl_column : (data1) 10\n <1a9> DW_AT_type : (ref_udata) <0x83>, size_t, unsigned int\n <1ab> DW_AT_data_member_location: (data1) 104\n <2><1ac>: Abbrev Number: 42 (DW_TAG_member)\n- <1ad> DW_AT_name : (strp) (offset: 0x67b): _mode\n+ <1ad> DW_AT_name : (strp) (offset: 0x67d): _mode\n <1b1> DW_AT_decl_file : (data1) 6\n <1b2> DW_AT_decl_line : (data1) 96\n <1b3> DW_AT_decl_column : (data1) 7\n <1b4> DW_AT_type : (ref_udata) <0x3f>, int\n <1b5> DW_AT_data_member_location: (data1) 108\n <2><1b6>: Abbrev Number: 42 (DW_TAG_member)\n- <1b7> DW_AT_name : (strp) (offset: 0x51b): _unused2\n+ <1b7> DW_AT_name : (strp) (offset: 0x51d): _unused2\n <1bb> DW_AT_decl_file : (data1) 6\n <1bc> DW_AT_decl_line : (data1) 98\n <1bd> DW_AT_decl_column : (data1) 8\n <1be> DW_AT_type : (ref_udata) <0x1fa>, char\n <1c0> DW_AT_data_member_location: (data1) 112\n <2><1c1>: Abbrev Number: 0\n <1><1c2>: Abbrev Number: 39 (DW_TAG_typedef)\n- <1c3> DW_AT_name : (strp) (offset: 0x277): FILE\n+ <1c3> DW_AT_name : (strp) (offset: 0x25f): FILE\n <1c7> DW_AT_decl_file : (data1) 7\n <1c8> DW_AT_decl_line : (data1) 7\n <1c9> DW_AT_decl_column : (data1) 25\n <1ca> DW_AT_type : (ref_udata) <0x8c>, _IO_FILE\n <1><1cc>: Abbrev Number: 74 (DW_TAG_typedef)\n- <1cd> DW_AT_name : (strp) (offset: 0x36a): _IO_lock_t\n+ <1cd> DW_AT_name : (strp) (offset: 0x36c): _IO_lock_t\n <1d1> DW_AT_decl_file : (data1) 6\n <1d2> DW_AT_decl_line : (data1) 43\n <1d3> DW_AT_decl_column : (data1) 14\n <1><1d4>: Abbrev Number: 76 (DW_TAG_structure_type)\n- <1d5> DW_AT_name : (strp) (offset: 0x1f1): _IO_marker\n+ <1d5> DW_AT_name : (strp) (offset: 0x1d9): _IO_marker\n <1d9> DW_AT_declaration : (flag_present) 1\n <1><1d9>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <1da> DW_AT_byte_size : (implicit_const) 4\n <1da> DW_AT_type : (ref_udata) <0x1d4>, _IO_marker\n <1><1dc>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <1dd> DW_AT_byte_size : (implicit_const) 4\n <1dd> DW_AT_type : (ref_udata) <0x8c>, _IO_FILE\n@@ -328,15 +328,15 @@\n <1><1ea>: Abbrev Number: 76 (DW_TAG_structure_type)\n <1eb> DW_AT_name : (strp) (offset: 0x47): _IO_codecvt\n <1ef> DW_AT_declaration : (flag_present) 1\n <1><1ef>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <1f0> DW_AT_byte_size : (implicit_const) 4\n <1f0> DW_AT_type : (ref_udata) <0x1ea>, _IO_codecvt\n <1><1f2>: Abbrev Number: 76 (DW_TAG_structure_type)\n- <1f3> DW_AT_name : (strp) (offset: 0x289): _IO_wide_data\n+ <1f3> DW_AT_name : (strp) (offset: 0x271): _IO_wide_data\n <1f7> DW_AT_declaration : (flag_present) 1\n <1><1f7>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <1f8> DW_AT_byte_size : (implicit_const) 4\n <1f8> DW_AT_type : (ref_udata) <0x1f2>, _IO_wide_data\n <1><1fa>: Abbrev Number: 20 (DW_TAG_array_type)\n <1fb> DW_AT_type : (ref_udata) <0x7a>, char\n <1fc> DW_AT_sibling : (ref_udata) <0x202>\n@@ -352,15 +352,15 @@\n <1><208>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <209> DW_AT_byte_size : (implicit_const) 4\n <209> DW_AT_type : (ref_udata) <0x81>, char\n <1><20b>: Abbrev Number: 73 (DW_TAG_restrict_type)\n <20c> DW_AT_type : (ref_udata) <0x208>\n <1><20e>: Abbrev Number: 78 (DW_TAG_subprogram)\n <20f> DW_AT_external : (flag_present) 1\n- <20f> DW_AT_name : (strp) (offset: 0x925): fprintf\n+ <20f> DW_AT_name : (strp) (offset: 0x927): fprintf\n <213> DW_AT_decl_file : (data1) 8\n <214> DW_AT_decl_line : (data2) 350\n <216> DW_AT_decl_column : (data1) 12\n <217> DW_AT_prototyped : (flag_present) 1\n <217> DW_AT_type : (ref_udata) <0x3f>, int\n <218> DW_AT_declaration : (flag_present) 1\n <2><218>: Abbrev Number: 13 (DW_TAG_formal_parameter)\n@@ -374,78 +374,78 @@\n Length: 0x5c (32-bit)\n Version: 5\n Unit Type: DW_UT_partial (3)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><22d>: Abbrev Number: 66 (DW_TAG_partial_unit)\n <22e> DW_AT_stmt_list : (sec_offset) 0\n- <232> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <232> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <1><236>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <237> DW_AT_import : (ref_addr) <0xc>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><23b>: Abbrev Number: 61 (DW_TAG_enumeration_type)\n- <23c> DW_AT_name : (strp) (offset: 0xa0a): luminance_e\n+ <23c> DW_AT_name : (strp) (offset: 0xa0c): luminance_e\n <240> DW_AT_encoding : (implicit_const) 7\t(unsigned)\n <240> DW_AT_byte_size : (implicit_const) 4\n <240> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <244> DW_AT_decl_file : (implicit_const) 11\n <244> DW_AT_decl_line : (data1) 176\n <245> DW_AT_decl_column : (implicit_const) 14\n <245> DW_AT_sibling : (ref_udata) <0x277>\n <2><246>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <247> DW_AT_name : (strp) (offset: 0x241): REC601\n+ <247> DW_AT_name : (strp) (offset: 0x229): REC601\n <24b> DW_AT_const_value : (data1) 0\n <2><24c>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <24d> DW_AT_name : (strp) (offset: 0x4a8): REC709\n+ <24d> DW_AT_name : (strp) (offset: 0x4aa): REC709\n <251> DW_AT_const_value : (data1) 1\n <2><252>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <253> DW_AT_name : (strp) (offset: 0x47c): LINEAR\n+ <253> DW_AT_name : (strp) (offset: 0x47e): LINEAR\n <257> DW_AT_const_value : (data1) 2\n <2><258>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <259> DW_AT_name : (strp) (offset: 0x87b): MINIMUM\n+ <259> DW_AT_name : (strp) (offset: 0x87d): MINIMUM\n <25d> DW_AT_const_value : (data1) 3\n <2><25e>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <25f> DW_AT_name : (strp) (offset: 0x375): MAXIMUM\n+ <25f> DW_AT_name : (strp) (offset: 0x377): MAXIMUM\n <263> DW_AT_const_value : (data1) 4\n <2><264>: Abbrev Number: 58 (DW_TAG_enumerator)\n <265> DW_AT_name : (string) RED\n <269> DW_AT_const_value : (data1) 5\n <2><26a>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <26b> DW_AT_name : (strp) (offset: 0x235): GREEN\n+ <26b> DW_AT_name : (strp) (offset: 0x21d): GREEN\n <26f> DW_AT_const_value : (data1) 6\n <2><270>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <271> DW_AT_name : (strp) (offset: 0x600): BLUE\n+ <271> DW_AT_name : (strp) (offset: 0x602): BLUE\n <275> DW_AT_const_value : (data1) 7\n <2><276>: Abbrev Number: 0\n <1><277>: Abbrev Number: 39 (DW_TAG_typedef)\n- <278> DW_AT_name : (strp) (offset: 0xa20): luminance_t\n+ <278> DW_AT_name : (strp) (offset: 0xa22): luminance_t\n <27c> DW_AT_decl_file : (data1) 11\n <27d> DW_AT_decl_line : (data1) 185\n <27e> DW_AT_decl_column : (data1) 3\n <27f> DW_AT_type : (ref_udata) <0x23b>, luminance_e\n <1><280>: Abbrev Number: 0\n Compilation Unit @ offset 0x281:\n Length: 0x2d (32-bit)\n Version: 5\n Unit Type: DW_UT_partial (3)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><28d>: Abbrev Number: 66 (DW_TAG_partial_unit)\n <28e> DW_AT_stmt_list : (sec_offset) 0\n- <292> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <292> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <1><296>: Abbrev Number: 38 (DW_TAG_variable)\n- <297> DW_AT_name : (strp) (offset: 0x937): stderr\n+ <297> DW_AT_name : (strp) (offset: 0x939): stderr\n <29b> DW_AT_decl_file : (data1) 8\n <29c> DW_AT_decl_line : (data1) 145\n <29d> DW_AT_decl_column : (data1) 14\n <29e> DW_AT_type : (ref_addr) <0x202>\n <2a2> DW_AT_external : (flag_present) 1\n <2a2> DW_AT_declaration : (flag_present) 1\n <1><2a2>: Abbrev Number: 83 (DW_TAG_subprogram)\n <2a3> DW_AT_external : (flag_present) 1\n- <2a3> DW_AT_name : (strp) (offset: 0xba7): exit\n+ <2a3> DW_AT_name : (strp) (offset: 0xba9): exit\n <2a7> DW_AT_decl_file : (data1) 15\n <2a8> DW_AT_decl_line : (data2) 637\n <2aa> DW_AT_decl_column : (data1) 13\n <2ab> DW_AT_prototyped : (flag_present) 1\n <2ab> DW_AT_noreturn : (flag_present) 1\n <2ab> DW_AT_declaration : (flag_present) 1\n <2><2ab>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n@@ -456,72 +456,72 @@\n Length: 0x1fe (32-bit)\n Version: 5\n Unit Type: DW_UT_partial (3)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><2be>: Abbrev Number: 66 (DW_TAG_partial_unit)\n <2bf> DW_AT_stmt_list : (sec_offset) 0\n- <2c3> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <2c3> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <1><2c7>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2c8> DW_AT_import : (ref_addr) <0x22d>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2cc>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2cd> DW_AT_import : (ref_addr) <0x28d>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2d1>: Abbrev Number: 55 (DW_TAG_base_type)\n <2d2> DW_AT_byte_size : (data1) 8\n <2d3> DW_AT_encoding : (data1) 4\t(float)\n- <2d4> DW_AT_name : (strp) (offset: 0x6f4): long double\n+ <2d4> DW_AT_name : (strp) (offset: 0x6f6): long double\n <1><2d8>: Abbrev Number: 32 (DW_TAG_typedef)\n- <2d9> DW_AT_name : (strp) (offset: 0x700): Imlib_Image\n+ <2d9> DW_AT_name : (strp) (offset: 0x702): Imlib_Image\n <2dd> DW_AT_decl_file : (data1) 5\n <2de> DW_AT_decl_line : (data1) 50\n <2df> DW_AT_decl_column : (data1) 21\n <2e0> DW_AT_type : (ref_addr) <0x76>\n <1><2e4>: Abbrev Number: 32 (DW_TAG_typedef)\n- <2e5> DW_AT_name : (strp) (offset: 0x3a5): Imlib_Updates\n+ <2e5> DW_AT_name : (strp) (offset: 0x3a7): Imlib_Updates\n <2e9> DW_AT_decl_file : (data1) 5\n <2ea> DW_AT_decl_line : (data1) 52\n <2eb> DW_AT_decl_column : (data1) 21\n <2ec> DW_AT_type : (ref_addr) <0x76>\n <1><2f0>: Abbrev Number: 28 (DW_TAG_structure_type)\n <2f1> DW_AT_byte_size : (data1) 16\n <2f2> DW_AT_decl_file : (data1) 5\n <2f3> DW_AT_decl_line : (data1) 84\n <2f4> DW_AT_decl_column : (implicit_const) 9\n <2f4> DW_AT_sibling : (ref_udata) <0x32a>\n <2><2f5>: Abbrev Number: 3 (DW_TAG_member)\n- <2f6> DW_AT_name : (strp) (offset: 0x17d): alpha\n+ <2f6> DW_AT_name : (strp) (offset: 0x165): alpha\n <2fa> DW_AT_decl_file : (data1) 5\n <2fb> DW_AT_decl_line : (data1) 85\n <2fc> DW_AT_decl_column : (data1) 24\n <2fd> DW_AT_type : (ref_addr) <0x3f>, int\n <301> DW_AT_data_member_location: (data1) 0\n <2><302>: Abbrev Number: 14 (DW_TAG_member)\n <303> DW_AT_name : (string) red\n <307> DW_AT_decl_file : (data1) 5\n <308> DW_AT_decl_line : (data1) 85\n <309> DW_AT_decl_column : (data1) 31\n <30a> DW_AT_type : (ref_addr) <0x3f>, int\n <30e> DW_AT_data_member_location: (data1) 4\n <2><30f>: Abbrev Number: 3 (DW_TAG_member)\n- <310> DW_AT_name : (strp) (offset: 0xead): green\n+ <310> DW_AT_name : (strp) (offset: 0xeaf): green\n <314> DW_AT_decl_file : (data1) 5\n <315> DW_AT_decl_line : (data1) 85\n <316> DW_AT_decl_column : (data1) 36\n <317> DW_AT_type : (ref_addr) <0x3f>, int\n <31b> DW_AT_data_member_location: (data1) 8\n <2><31c>: Abbrev Number: 3 (DW_TAG_member)\n- <31d> DW_AT_name : (strp) (offset: 0xecb): blue\n+ <31d> DW_AT_name : (strp) (offset: 0xecd): blue\n <321> DW_AT_decl_file : (data1) 5\n <322> DW_AT_decl_line : (data1) 85\n <323> DW_AT_decl_column : (data1) 43\n <324> DW_AT_type : (ref_addr) <0x3f>, int\n <328> DW_AT_data_member_location: (data1) 12\n <2><329>: Abbrev Number: 0\n <1><32a>: Abbrev Number: 39 (DW_TAG_typedef)\n- <32b> DW_AT_name : (strp) (offset: 0xcf): Imlib_Color\n+ <32b> DW_AT_name : (strp) (offset: 0xb7): Imlib_Color\n <32f> DW_AT_decl_file : (data1) 5\n <330> DW_AT_decl_line : (data1) 86\n <331> DW_AT_decl_column : (data1) 3\n <332> DW_AT_type : (ref_udata) <0x2f0>\n <1><333>: Abbrev Number: 63 (DW_TAG_enumeration_type)\n <334> DW_AT_encoding : (data1) 7\t(unsigned)\n <335> DW_AT_byte_size : (data1) 4\n@@ -530,93 +530,93 @@\n <33b> DW_AT_decl_line : (data2) 2912\n <33d> DW_AT_decl_column : (data1) 14\n <33e> DW_AT_sibling : (ref_udata) <0x3a7>\n <2><340>: Abbrev Number: 64 (DW_TAG_enumerator)\n <341> DW_AT_name : (strp) (offset: 0x27): IMLIB_LOAD_ERROR_NONE\n <345> DW_AT_const_value : (data1) 0\n <2><346>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <347> DW_AT_name : (strp) (offset: 0x84a): IMLIB_LOAD_ERROR_FILE_DOES_NOT_EXIST\n+ <347> DW_AT_name : (strp) (offset: 0x84c): IMLIB_LOAD_ERROR_FILE_DOES_NOT_EXIST\n <34b> DW_AT_const_value : (data1) 1\n <2><34c>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <34d> DW_AT_name : (strp) (offset: 0x7ac): IMLIB_LOAD_ERROR_FILE_IS_DIRECTORY\n+ <34d> DW_AT_name : (strp) (offset: 0x7ae): IMLIB_LOAD_ERROR_FILE_IS_DIRECTORY\n <351> DW_AT_const_value : (data1) 2\n <2><352>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <353> DW_AT_name : (strp) (offset: 0x29f): IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_READ\n+ <353> DW_AT_name : (strp) (offset: 0x287): IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_READ\n <357> DW_AT_const_value : (data1) 3\n <2><358>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <359> DW_AT_name : (strp) (offset: 0x248): IMLIB_LOAD_ERROR_NO_LOADER_FOR_FILE_FORMAT\n+ <359> DW_AT_name : (strp) (offset: 0x230): IMLIB_LOAD_ERROR_NO_LOADER_FOR_FILE_FORMAT\n <35d> DW_AT_const_value : (data1) 4\n <2><35e>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <35f> DW_AT_name : (strp) (offset: 0x954): IMLIB_LOAD_ERROR_PATH_TOO_LONG\n+ <35f> DW_AT_name : (strp) (offset: 0x956): IMLIB_LOAD_ERROR_PATH_TOO_LONG\n <363> DW_AT_const_value : (data1) 5\n <2><364>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <365> DW_AT_name : (strp) (offset: 0xb6b): IMLIB_LOAD_ERROR_PATH_COMPONENT_NON_EXISTANT\n+ <365> DW_AT_name : (strp) (offset: 0xb6d): IMLIB_LOAD_ERROR_PATH_COMPONENT_NON_EXISTANT\n <369> DW_AT_const_value : (data1) 6\n <2><36a>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <36b> DW_AT_name : (strp) (offset: 0x54f): IMLIB_LOAD_ERROR_PATH_COMPONENT_NOT_DIRECTORY\n+ <36b> DW_AT_name : (strp) (offset: 0x551): IMLIB_LOAD_ERROR_PATH_COMPONENT_NOT_DIRECTORY\n <36f> DW_AT_const_value : (data1) 7\n <2><370>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <371> DW_AT_name : (strp) (offset: 0xb0a): IMLIB_LOAD_ERROR_PATH_POINTS_OUTSIDE_ADDRESS_SPACE\n+ <371> DW_AT_name : (strp) (offset: 0xb0c): IMLIB_LOAD_ERROR_PATH_POINTS_OUTSIDE_ADDRESS_SPACE\n <375> DW_AT_const_value : (data1) 8\n <2><376>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <377> DW_AT_name : (strp) (offset: 0x821): IMLIB_LOAD_ERROR_TOO_MANY_SYMBOLIC_LINKS\n+ <377> DW_AT_name : (strp) (offset: 0x823): IMLIB_LOAD_ERROR_TOO_MANY_SYMBOLIC_LINKS\n <37b> DW_AT_const_value : (data1) 9\n <2><37c>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <37d> DW_AT_name : (strp) (offset: 0x4fc): IMLIB_LOAD_ERROR_OUT_OF_MEMORY\n+ <37d> DW_AT_name : (strp) (offset: 0x4fe): IMLIB_LOAD_ERROR_OUT_OF_MEMORY\n <381> DW_AT_const_value : (data1) 10\n <2><382>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <383> DW_AT_name : (strp) (offset: 0x98e): IMLIB_LOAD_ERROR_OUT_OF_FILE_DESCRIPTORS\n+ <383> DW_AT_name : (strp) (offset: 0x990): IMLIB_LOAD_ERROR_OUT_OF_FILE_DESCRIPTORS\n <387> DW_AT_const_value : (data1) 11\n <2><388>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <389> DW_AT_name : (strp) (offset: 0x595): IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_WRITE\n+ <389> DW_AT_name : (strp) (offset: 0x597): IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_WRITE\n <38d> DW_AT_const_value : (data1) 12\n <2><38e>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <38f> DW_AT_name : (strp) (offset: 0xdb): IMLIB_LOAD_ERROR_OUT_OF_DISK_SPACE\n+ <38f> DW_AT_name : (strp) (offset: 0xc3): IMLIB_LOAD_ERROR_OUT_OF_DISK_SPACE\n <393> DW_AT_const_value : (data1) 13\n <2><394>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <395> DW_AT_name : (strp) (offset: 0x75a): IMLIB_LOAD_ERROR_UNKNOWN\n+ <395> DW_AT_name : (strp) (offset: 0x75c): IMLIB_LOAD_ERROR_UNKNOWN\n <399> DW_AT_const_value : (data1) 14\n <2><39a>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <39b> DW_AT_name : (strp) (offset: 0x732): IMLIB_LOAD_ERROR_IMAGE_READ\n+ <39b> DW_AT_name : (strp) (offset: 0x734): IMLIB_LOAD_ERROR_IMAGE_READ\n <39f> DW_AT_const_value : (data1) 15\n <2><3a0>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <3a1> DW_AT_name : (strp) (offset: 0x426): IMLIB_LOAD_ERROR_IMAGE_FRAME\n+ <3a1> DW_AT_name : (strp) (offset: 0x428): IMLIB_LOAD_ERROR_IMAGE_FRAME\n <3a5> DW_AT_const_value : (data1) 16\n <2><3a6>: Abbrev Number: 0\n <1><3a7>: Abbrev Number: 67 (DW_TAG_typedef)\n- <3a8> DW_AT_name : (strp) (offset: 0x16c): Imlib_Load_Error\n+ <3a8> DW_AT_name : (strp) (offset: 0x154): Imlib_Load_Error\n <3ac> DW_AT_decl_file : (data1) 5\n <3ad> DW_AT_decl_line : (data2) 2930\n <3af> DW_AT_decl_column : (data1) 3\n <3b0> DW_AT_type : (ref_udata) <0x333>, unsigned int\n <1><3b2>: Abbrev Number: 61 (DW_TAG_enumeration_type)\n- <3b3> DW_AT_name : (strp) (offset: 0x9b7): direction_e\n+ <3b3> DW_AT_name : (strp) (offset: 0x9b9): direction_e\n <3b7> DW_AT_encoding : (implicit_const) 7\t(unsigned)\n <3b7> DW_AT_byte_size : (implicit_const) 4\n <3b7> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <3bb> DW_AT_decl_file : (implicit_const) 11\n <3bb> DW_AT_decl_line : (data1) 188\n <3bc> DW_AT_decl_column : (implicit_const) 14\n <3bc> DW_AT_sibling : (ref_udata) <0x3cb>\n <2><3be>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <3bf> DW_AT_name : (strp) (offset: 0x63f): HORIZONTAL\n+ <3bf> DW_AT_name : (strp) (offset: 0x641): HORIZONTAL\n <3c3> DW_AT_const_value : (data1) 0\n <2><3c4>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <3c5> DW_AT_name : (strp) (offset: 0x8e4): VERTICAL\n+ <3c5> DW_AT_name : (strp) (offset: 0x8e6): VERTICAL\n <3c9> DW_AT_const_value : (data1) 1\n <2><3ca>: Abbrev Number: 0\n <1><3cb>: Abbrev Number: 39 (DW_TAG_typedef)\n- <3cc> DW_AT_name : (strp) (offset: 0x9e3): direction_t\n+ <3cc> DW_AT_name : (strp) (offset: 0x9e5): direction_t\n <3d0> DW_AT_decl_file : (data1) 11\n <3d1> DW_AT_decl_line : (data1) 191\n <3d2> DW_AT_decl_column : (data1) 3\n <3d3> DW_AT_type : (ref_udata) <0x3b2>, direction_e\n <1><3d5>: Abbrev Number: 4 (DW_TAG_subprogram)\n <3d6> DW_AT_external : (flag_present) 1\n- <3d6> DW_AT_name : (strp) (offset: 0x1d6): imlib_image_draw_rectangle\n+ <3d6> DW_AT_name : (strp) (offset: 0x1be): imlib_image_draw_rectangle\n <3da> DW_AT_decl_file : (data1) 5\n <3db> DW_AT_decl_line : (data2) 2274\n <3dd> DW_AT_decl_column : (data1) 21\n <3de> DW_AT_prototyped : (flag_present) 1\n <3de> DW_AT_declaration : (flag_present) 1\n <3de> DW_AT_sibling : (ref_udata) <0x3f5>\n <2><3e0>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n@@ -630,77 +630,77 @@\n <2><3f4>: Abbrev Number: 0\n <1><3f5>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <3f6> DW_AT_byte_size : (implicit_const) 4\n <3f6> DW_AT_type : (ref_udata) <0x2d8>, Imlib_Image\n <1><3f7>: Abbrev Number: 55 (DW_TAG_base_type)\n <3f8> DW_AT_byte_size : (data1) 8\n <3f9> DW_AT_encoding : (data1) 4\t(float)\n- <3fa> DW_AT_name : (strp) (offset: 0x6f9): double\n+ <3fa> DW_AT_name : (strp) (offset: 0x6fb): double\n <1><3fe>: Abbrev Number: 16 (DW_TAG_subprogram)\n <3ff> DW_AT_external : (flag_present) 1\n- <3ff> DW_AT_name : (strp) (offset: 0x663): imlib_free_image\n+ <3ff> DW_AT_name : (strp) (offset: 0x665): imlib_free_image\n <403> DW_AT_decl_file : (implicit_const) 5\n <403> DW_AT_decl_line : (data2) 851\n <405> DW_AT_decl_column : (implicit_const) 21\n <405> DW_AT_prototyped : (flag_present) 1\n <405> DW_AT_declaration : (flag_present) 1\n <1><405>: Abbrev Number: 65 (DW_TAG_subprogram)\n <406> DW_AT_external : (flag_present) 1\n- <406> DW_AT_name : (strp) (offset: 0x699): imlib_image_get_height\n+ <406> DW_AT_name : (strp) (offset: 0x69b): imlib_image_get_height\n <40a> DW_AT_decl_file : (implicit_const) 5\n <40a> DW_AT_decl_line : (data2) 870\n <40c> DW_AT_decl_column : (implicit_const) 21\n <40c> DW_AT_prototyped : (flag_present) 1\n <40c> DW_AT_type : (ref_addr) <0x3f>, int\n <410> DW_AT_declaration : (flag_present) 1\n <1><410>: Abbrev Number: 65 (DW_TAG_subprogram)\n <411> DW_AT_external : (flag_present) 1\n- <411> DW_AT_name : (strp) (offset: 0xac9): imlib_image_get_width\n+ <411> DW_AT_name : (strp) (offset: 0xacb): imlib_image_get_width\n <415> DW_AT_decl_file : (implicit_const) 5\n <415> DW_AT_decl_line : (data2) 865\n <417> DW_AT_decl_column : (implicit_const) 21\n <417> DW_AT_prototyped : (flag_present) 1\n <417> DW_AT_type : (ref_addr) <0x3f>, int\n <41b> DW_AT_declaration : (flag_present) 1\n <1><41b>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <41c> DW_AT_byte_size : (implicit_const) 4\n <41c> DW_AT_type : (ref_udata) <0x3a7>, Imlib_Load_Error, unsigned int\n <1><41e>: Abbrev Number: 2 (DW_TAG_subprogram)\n <41f> DW_AT_external : (flag_present) 1\n- <41f> DW_AT_name : (strp) (offset: 0x3cf): strcmp\n+ <41f> DW_AT_name : (strp) (offset: 0x3d1): strcmp\n <423> DW_AT_decl_file : (data1) 14\n <424> DW_AT_decl_line : (data1) 156\n <425> DW_AT_decl_column : (data1) 12\n <426> DW_AT_prototyped : (flag_present) 1\n <426> DW_AT_type : (ref_addr) <0x3f>, int\n <42a> DW_AT_declaration : (flag_present) 1\n <42a> DW_AT_sibling : (ref_udata) <0x437>\n <2><42c>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <42d> DW_AT_type : (ref_addr) <0x208>\n <2><431>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <432> DW_AT_type : (ref_addr) <0x208>\n <2><436>: Abbrev Number: 0\n <1><437>: Abbrev Number: 2 (DW_TAG_subprogram)\n <438> DW_AT_external : (flag_present) 1\n- <438> DW_AT_name : (strp) (offset: 0x157): strcasecmp\n+ <438> DW_AT_name : (strp) (offset: 0x13f): strcasecmp\n <43c> DW_AT_decl_file : (data1) 17\n <43d> DW_AT_decl_line : (data1) 116\n <43e> DW_AT_decl_column : (data1) 12\n <43f> DW_AT_prototyped : (flag_present) 1\n <43f> DW_AT_type : (ref_addr) <0x3f>, int\n <443> DW_AT_declaration : (flag_present) 1\n <443> DW_AT_sibling : (ref_udata) <0x450>\n <2><445>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <446> DW_AT_type : (ref_addr) <0x208>\n <2><44a>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <44b> DW_AT_type : (ref_addr) <0x208>\n <2><44f>: Abbrev Number: 0\n <1><450>: Abbrev Number: 6 (DW_TAG_subprogram)\n <451> DW_AT_external : (flag_present) 1\n- <451> DW_AT_name : (strp) (offset: 0x311): imlib_image_draw_pixel\n+ <451> DW_AT_name : (strp) (offset: 0x2f9): imlib_image_draw_pixel\n <455> DW_AT_decl_file : (data1) 5\n <456> DW_AT_decl_line : (data2) 2240\n <458> DW_AT_decl_column : (data1) 21\n <459> DW_AT_prototyped : (flag_present) 1\n <459> DW_AT_type : (ref_udata) <0x2e4>, Imlib_Updates\n <45a> DW_AT_declaration : (flag_present) 1\n <45a> DW_AT_sibling : (ref_udata) <0x46c>\n@@ -709,15 +709,15 @@\n <2><461>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <462> DW_AT_type : (ref_addr) <0x3f>, int\n <2><466>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <467> DW_AT_type : (ref_addr) <0x7a>, char\n <2><46b>: Abbrev Number: 0\n <1><46c>: Abbrev Number: 4 (DW_TAG_subprogram)\n <46d> DW_AT_external : (flag_present) 1\n- <46d> DW_AT_name : (strp) (offset: 0x19e): imlib_context_set_color\n+ <46d> DW_AT_name : (strp) (offset: 0x186): imlib_context_set_color\n <471> DW_AT_decl_file : (data1) 5\n <472> DW_AT_decl_line : (data2) 454\n <474> DW_AT_decl_column : (data1) 21\n <475> DW_AT_prototyped : (flag_present) 1\n <475> DW_AT_declaration : (flag_present) 1\n <475> DW_AT_sibling : (ref_udata) <0x48c>\n <2><477>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n@@ -727,30 +727,30 @@\n <2><481>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <482> DW_AT_type : (ref_addr) <0x3f>, int\n <2><486>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <487> DW_AT_type : (ref_addr) <0x3f>, int\n <2><48b>: Abbrev Number: 0\n <1><48c>: Abbrev Number: 4 (DW_TAG_subprogram)\n <48d> DW_AT_external : (flag_present) 1\n- <48d> DW_AT_name : (strp) (offset: 0x7e2): imlib_context_set_image\n+ <48d> DW_AT_name : (strp) (offset: 0x7e4): imlib_context_set_image\n <491> DW_AT_decl_file : (data1) 5\n <492> DW_AT_decl_line : (data2) 629\n <494> DW_AT_decl_column : (data1) 21\n <495> DW_AT_prototyped : (flag_present) 1\n <495> DW_AT_declaration : (flag_present) 1\n <495> DW_AT_sibling : (ref_udata) <0x49a>\n <2><497>: Abbrev Number: 13 (DW_TAG_formal_parameter)\n <498> DW_AT_type : (ref_udata) <0x2d8>, Imlib_Image\n <2><499>: Abbrev Number: 0\n <1><49a>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <49b> DW_AT_byte_size : (implicit_const) 4\n <49b> DW_AT_type : (ref_udata) <0x32a>, Imlib_Color\n <1><49c>: Abbrev Number: 62 (DW_TAG_subprogram)\n <49d> DW_AT_external : (flag_present) 1\n- <49d> DW_AT_name : (strp) (offset: 0x681): imlib_image_query_pixel\n+ <49d> DW_AT_name : (strp) (offset: 0x683): imlib_image_query_pixel\n <4a1> DW_AT_decl_file : (data1) 5\n <4a2> DW_AT_decl_line : (data2) 1020\n <4a4> DW_AT_decl_column : (data1) 21\n <4a5> DW_AT_prototyped : (flag_present) 1\n <4a5> DW_AT_declaration : (flag_present) 1\n <2><4a5>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <4a6> DW_AT_type : (ref_addr) <0x3f>, int\n@@ -764,72 +764,72 @@\n Length: 0x45 (32-bit)\n Version: 5\n Unit Type: DW_UT_partial (3)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><4c0>: Abbrev Number: 66 (DW_TAG_partial_unit)\n <4c1> DW_AT_stmt_list : (sec_offset) 0\n- <4c5> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <4c5> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <1><4c9>: Abbrev Number: 61 (DW_TAG_enumeration_type)\n- <4ca> DW_AT_name : (strp) (offset: 0xc0b): charset_e\n+ <4ca> DW_AT_name : (strp) (offset: 0xc0d): charset_e\n <4ce> DW_AT_encoding : (implicit_const) 7\t(unsigned)\n <4ce> DW_AT_byte_size : (implicit_const) 4\n <4ce> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <4d2> DW_AT_decl_file : (implicit_const) 11\n <4d2> DW_AT_decl_line : (data1) 194\n <4d3> DW_AT_decl_column : (implicit_const) 14\n <4d3> DW_AT_sibling : (ref_udata) <0x4f3>\n <2><4d4>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <4d5> DW_AT_name : (strp) (offset: 0x297): CS_FULL\n+ <4d5> DW_AT_name : (strp) (offset: 0x27f): CS_FULL\n <4d9> DW_AT_const_value : (data1) 0\n <2><4da>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <4db> DW_AT_name : (strp) (offset: 0xb3d): CS_DIGITS\n+ <4db> DW_AT_name : (strp) (offset: 0xb3f): CS_DIGITS\n <4df> DW_AT_const_value : (data1) 1\n <2><4e0>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <4e1> DW_AT_name : (strp) (offset: 0x8bb): CS_DECIMAL\n+ <4e1> DW_AT_name : (strp) (offset: 0x8bd): CS_DECIMAL\n <4e5> DW_AT_const_value : (data1) 2\n <2><4e6>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <4e7> DW_AT_name : (strp) (offset: 0xab2): CS_HEXADECIMAL\n+ <4e7> DW_AT_name : (strp) (offset: 0xab4): CS_HEXADECIMAL\n <4eb> DW_AT_const_value : (data1) 3\n <2><4ec>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <4ed> DW_AT_name : (strp) (offset: 0xbac): CS_TT_ROBOT\n+ <4ed> DW_AT_name : (strp) (offset: 0xbae): CS_TT_ROBOT\n <4f1> DW_AT_const_value : (data1) 4\n <2><4f2>: Abbrev Number: 0\n <1><4f3>: Abbrev Number: 39 (DW_TAG_typedef)\n- <4f4> DW_AT_name : (strp) (offset: 0xc2c): charset_t\n+ <4f4> DW_AT_name : (strp) (offset: 0xc2e): charset_t\n <4f8> DW_AT_decl_file : (data1) 11\n <4f9> DW_AT_decl_line : (data1) 200\n <4fa> DW_AT_decl_column : (data1) 3\n <4fb> DW_AT_type : (ref_udata) <0x4c9>, charset_e\n <1><4fc>: Abbrev Number: 0\n Compilation Unit @ offset 0x4fd:\n Length: 0x42 (32-bit)\n Version: 5\n Unit Type: DW_UT_partial (3)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><509>: Abbrev Number: 66 (DW_TAG_partial_unit)\n <50a> DW_AT_stmt_list : (sec_offset) 0\n- <50e> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <50e> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <1><512>: Abbrev Number: 25 (DW_TAG_subprogram)\n <513> DW_AT_external : (flag_present) 1\n- <513> DW_AT_name : (strp) (offset: 0x9ef): putchar\n+ <513> DW_AT_name : (strp) (offset: 0x9f1): putchar\n <517> DW_AT_decl_file : (data1) 8\n <518> DW_AT_decl_line : (data2) 556\n <51a> DW_AT_decl_column : (data1) 12\n <51b> DW_AT_prototyped : (flag_present) 1\n <51b> DW_AT_type : (ref_addr) <0x3f>, int\n <51f> DW_AT_declaration : (flag_present) 1\n <51f> DW_AT_sibling : (ref_udata) <0x526>\n <2><520>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <521> DW_AT_type : (ref_addr) <0x3f>, int\n <2><525>: Abbrev Number: 0\n <1><526>: Abbrev Number: 82 (DW_TAG_subprogram)\n <527> DW_AT_external : (flag_present) 1\n- <527> DW_AT_name : (strp) (offset: 0xadf): strncasecmp\n+ <527> DW_AT_name : (strp) (offset: 0xae1): strncasecmp\n <52b> DW_AT_decl_file : (data1) 17\n <52c> DW_AT_decl_line : (data1) 120\n <52d> DW_AT_decl_column : (data1) 12\n <52e> DW_AT_prototyped : (flag_present) 1\n <52e> DW_AT_type : (ref_addr) <0x3f>, int\n <532> DW_AT_declaration : (flag_present) 1\n <2><532>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n@@ -843,29 +843,29 @@\n Compilation Unit @ offset 0x543:\n Length: 0x1074 (32-bit)\n Version: 5\n Unit Type: DW_UT_compile (1)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><54f>: Abbrev Number: 23 (DW_TAG_compile_unit)\n- <550> DW_AT_producer : (strp) (offset: 0xa4d): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n+ <550> DW_AT_producer : (strp) (offset: 0xa4f): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n <554> DW_AT_language : (data1) 29\t(C11)\n- <555> DW_AT_name : (strp) (offset: 0x624): ssocr.c\n- <559> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <555> DW_AT_name : (strp) (offset: 0x626): ssocr.c\n+ <559> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <55d> DW_AT_low_pc : (addr) 0x1240\n <561> DW_AT_high_pc : (udata) 30316\n <564> DW_AT_stmt_list : (sec_offset) 0\n <1><568>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <569> DW_AT_import : (ref_addr) <0x2be>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><56d>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <56e> DW_AT_import : (ref_addr) <0x4c0>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><572>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <573> DW_AT_import : (ref_addr) <0x509>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><577>: Abbrev Number: 32 (DW_TAG_typedef)\n- <578> DW_AT_name : (strp) (offset: 0x37d): __mode_t\n+ <578> DW_AT_name : (strp) (offset: 0x37f): __mode_t\n <57c> DW_AT_decl_file : (data1) 2\n <57d> DW_AT_decl_line : (data1) 150\n <57e> DW_AT_decl_column : (data1) 26\n <57f> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <1><583>: Abbrev Number: 44 (DW_TAG_restrict_type)\n <584> DW_AT_type : (ref_addr) <0x76>\n <1><588>: Abbrev Number: 32 (DW_TAG_typedef)\n@@ -882,72 +882,72 @@\n <59f> DW_AT_decl_line : (data1) 108\n <5a0> DW_AT_decl_column : (data1) 19\n <5a1> DW_AT_type : (ref_udata) <0x588>, __ssize_t, int\n <1><5a2>: Abbrev Number: 22 (DW_TAG_pointer_type)\n <5a3> DW_AT_byte_size : (implicit_const) 4\n <5a3> DW_AT_type : (ref_addr) <0x78>\n <1><5a7>: Abbrev Number: 38 (DW_TAG_variable)\n- <5a8> DW_AT_name : (strp) (offset: 0x3d6): stdin\n+ <5a8> DW_AT_name : (strp) (offset: 0x3d8): stdin\n <5ac> DW_AT_decl_file : (data1) 8\n <5ad> DW_AT_decl_line : (data1) 143\n <5ae> DW_AT_decl_column : (data1) 14\n <5af> DW_AT_type : (ref_addr) <0x202>\n <5b3> DW_AT_external : (flag_present) 1\n <5b3> DW_AT_declaration : (flag_present) 1\n <1><5b3>: Abbrev Number: 38 (DW_TAG_variable)\n- <5b4> DW_AT_name : (strp) (offset: 0xb03): stdout\n+ <5b4> DW_AT_name : (strp) (offset: 0xb05): stdout\n <5b8> DW_AT_decl_file : (data1) 8\n <5b9> DW_AT_decl_line : (data1) 144\n <5ba> DW_AT_decl_column : (data1) 14\n <5bb> DW_AT_type : (ref_addr) <0x202>\n <5bf> DW_AT_external : (flag_present) 1\n <5bf> DW_AT_declaration : (flag_present) 1\n <1><5bf>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <5c0> DW_AT_byte_size : (implicit_const) 4\n <5c0> DW_AT_type : (ref_udata) <0x5c1>\n <1><5c1>: Abbrev Number: 10 (DW_TAG_const_type)\n <1><5c2>: Abbrev Number: 38 (DW_TAG_variable)\n- <5c3> DW_AT_name : (strp) (offset: 0x4ee): optarg\n+ <5c3> DW_AT_name : (strp) (offset: 0x4f0): optarg\n <5c7> DW_AT_decl_file : (data1) 9\n <5c8> DW_AT_decl_line : (data1) 36\n <5c9> DW_AT_decl_column : (data1) 14\n <5ca> DW_AT_type : (ref_addr) <0x78>\n <5ce> DW_AT_external : (flag_present) 1\n <5ce> DW_AT_declaration : (flag_present) 1\n <1><5ce>: Abbrev Number: 38 (DW_TAG_variable)\n- <5cf> DW_AT_name : (strp) (offset: 0x490): optind\n+ <5cf> DW_AT_name : (strp) (offset: 0x492): optind\n <5d3> DW_AT_decl_file : (data1) 9\n <5d4> DW_AT_decl_line : (data1) 50\n <5d5> DW_AT_decl_column : (data1) 12\n <5d6> DW_AT_type : (ref_addr) <0x3f>, int\n <5da> DW_AT_external : (flag_present) 1\n <5da> DW_AT_declaration : (flag_present) 1\n <1><5da>: Abbrev Number: 26 (DW_TAG_structure_type)\n- <5db> DW_AT_name : (strp) (offset: 0x4f5): option\n+ <5db> DW_AT_name : (strp) (offset: 0x4f7): option\n <5df> DW_AT_byte_size : (data1) 16\n <5e0> DW_AT_decl_file : (data1) 10\n <5e1> DW_AT_decl_line : (data1) 50\n <5e2> DW_AT_decl_column : (implicit_const) 8\n <5e2> DW_AT_sibling : (ref_udata) <0x617>\n <2><5e4>: Abbrev Number: 3 (DW_TAG_member)\n- <5e5> DW_AT_name : (strp) (offset: 0xdce): name\n+ <5e5> DW_AT_name : (strp) (offset: 0xdc6): name\n <5e9> DW_AT_decl_file : (data1) 10\n <5ea> DW_AT_decl_line : (data1) 52\n <5eb> DW_AT_decl_column : (data1) 15\n <5ec> DW_AT_type : (ref_addr) <0x208>\n <5f0> DW_AT_data_member_location: (data1) 0\n <2><5f1>: Abbrev Number: 3 (DW_TAG_member)\n- <5f2> DW_AT_name : (strp) (offset: 0x1ce): has_arg\n+ <5f2> DW_AT_name : (strp) (offset: 0x1b6): has_arg\n <5f6> DW_AT_decl_file : (data1) 10\n <5f7> DW_AT_decl_line : (data1) 55\n <5f8> DW_AT_decl_column : (data1) 7\n <5f9> DW_AT_type : (ref_addr) <0x3f>, int\n <5fd> DW_AT_data_member_location: (data1) 4\n <2><5fe>: Abbrev Number: 42 (DW_TAG_member)\n- <5ff> DW_AT_name : (strp) (offset: 0x64a): flag\n+ <5ff> DW_AT_name : (strp) (offset: 0x64c): flag\n <603> DW_AT_decl_file : (data1) 10\n <604> DW_AT_decl_line : (data1) 56\n <605> DW_AT_decl_column : (data1) 8\n <606> DW_AT_type : (ref_udata) <0x61a>\n <608> DW_AT_data_member_location: (data1) 8\n <2><609>: Abbrev Number: 14 (DW_TAG_member)\n <60a> DW_AT_name : (string) val\n@@ -993,30 +993,30 @@\n <64a> DW_AT_name : (string) y2\n <64d> DW_AT_decl_file : (data1) 12\n <64e> DW_AT_decl_line : (data1) 23\n <64f> DW_AT_decl_column : (data1) 16\n <650> DW_AT_type : (ref_addr) <0x3f>, int\n <654> DW_AT_data_member_location: (data1) 12\n <2><655>: Abbrev Number: 3 (DW_TAG_member)\n- <656> DW_AT_name : (strp) (offset: 0x345): digit\n+ <656> DW_AT_name : (strp) (offset: 0x32d): digit\n <65a> DW_AT_decl_file : (data1) 12\n <65b> DW_AT_decl_line : (data1) 23\n <65c> DW_AT_decl_column : (data1) 19\n <65d> DW_AT_type : (ref_addr) <0x3f>, int\n <661> DW_AT_data_member_location: (data1) 16\n <2><662>: Abbrev Number: 3 (DW_TAG_member)\n- <663> DW_AT_name : (strp) (offset: 0x899): spaces\n+ <663> DW_AT_name : (strp) (offset: 0x89b): spaces\n <667> DW_AT_decl_file : (data1) 12\n <668> DW_AT_decl_line : (data1) 23\n <669> DW_AT_decl_column : (data1) 25\n <66a> DW_AT_type : (ref_addr) <0x3f>, int\n <66e> DW_AT_data_member_location: (data1) 20\n <2><66f>: Abbrev Number: 0\n <1><670>: Abbrev Number: 39 (DW_TAG_typedef)\n- <671> DW_AT_name : (strp) (offset: 0xbce): digit_struct\n+ <671> DW_AT_name : (strp) (offset: 0xbd0): digit_struct\n <675> DW_AT_decl_file : (data1) 12\n <676> DW_AT_decl_line : (data1) 24\n <677> DW_AT_decl_column : (data1) 3\n <678> DW_AT_type : (ref_udata) <0x61f>\n <1><67a>: Abbrev Number: 28 (DW_TAG_structure_type)\n <67b> DW_AT_byte_size : (data1) 16\n <67c> DW_AT_decl_file : (data1) 12\n@@ -1049,15 +1049,15 @@\n <6a4> DW_AT_decl_file : (data1) 12\n <6a5> DW_AT_decl_line : (data1) 27\n <6a6> DW_AT_decl_column : (data1) 16\n <6a7> DW_AT_type : (ref_addr) <0x3f>, int\n <6ab> DW_AT_data_member_location: (data1) 12\n <2><6ac>: Abbrev Number: 0\n <1><6ad>: Abbrev Number: 39 (DW_TAG_typedef)\n- <6ae> DW_AT_name : (strp) (offset: 0x532): color_struct\n+ <6ae> DW_AT_name : (strp) (offset: 0x534): color_struct\n <6b2> DW_AT_decl_file : (data1) 12\n <6b3> DW_AT_decl_line : (data1) 28\n <6b4> DW_AT_decl_column : (data1) 3\n <6b5> DW_AT_type : (ref_udata) <0x67a>\n <1><6b7>: Abbrev Number: 28 (DW_TAG_structure_type)\n <6b8> DW_AT_byte_size : (data1) 8\n <6b9> DW_AT_decl_file : (data1) 12\n@@ -1076,15 +1076,15 @@\n <6cb> DW_AT_decl_file : (data1) 12\n <6cc> DW_AT_decl_line : (data1) 31\n <6cd> DW_AT_decl_column : (data1) 10\n <6ce> DW_AT_type : (ref_addr) <0x3f>, int\n <6d2> DW_AT_data_member_location: (data1) 4\n <2><6d3>: Abbrev Number: 0\n <1><6d4>: Abbrev Number: 39 (DW_TAG_typedef)\n- <6d5> DW_AT_name : (strp) (offset: 0x80f): dimensions_struct\n+ <6d5> DW_AT_name : (strp) (offset: 0x811): dimensions_struct\n <6d9> DW_AT_decl_file : (data1) 12\n <6da> DW_AT_decl_line : (data1) 32\n <6db> DW_AT_decl_column : (data1) 3\n <6dc> DW_AT_type : (ref_udata) <0x6b7>\n <1><6de>: Abbrev Number: 28 (DW_TAG_structure_type)\n <6df> DW_AT_byte_size : (data1) 8\n <6e0> DW_AT_decl_file : (data1) 12\n@@ -1103,87 +1103,87 @@\n <6f6> DW_AT_decl_file : (data1) 12\n <6f7> DW_AT_decl_line : (data1) 35\n <6f8> DW_AT_decl_column : (data1) 12\n <6f9> DW_AT_type : (ref_addr) <0x3f>, int\n <6fd> DW_AT_data_member_location: (data1) 4\n <2><6fe>: Abbrev Number: 0\n <1><6ff>: Abbrev Number: 39 (DW_TAG_typedef)\n- <700> DW_AT_name : (strp) (offset: 0xc36): interval_struct\n+ <700> DW_AT_name : (strp) (offset: 0xc38): interval_struct\n <704> DW_AT_decl_file : (data1) 12\n <705> DW_AT_decl_line : (data1) 36\n <706> DW_AT_decl_column : (data1) 3\n <707> DW_AT_type : (ref_udata) <0x6de>\n <1><709>: Abbrev Number: 29 (DW_TAG_variable)\n- <70a> DW_AT_name : (strp) (offset: 0x793): ssocr_foreground\n+ <70a> DW_AT_name : (strp) (offset: 0x795): ssocr_foreground\n <70e> DW_AT_decl_file : (implicit_const) 1\n <70e> DW_AT_decl_line : (data1) 47\n <70f> DW_AT_decl_column : (implicit_const) 5\n <70f> DW_AT_type : (ref_addr) <0x3f>, int\n <713> DW_AT_external : (flag_present) 1\n <713> DW_AT_location : (exprloc) 5 byte block: 3 20 22 1 0 \t(DW_OP_addr: 12220)\n <1><719>: Abbrev Number: 29 (DW_TAG_variable)\n- <71a> DW_AT_name : (strp) (offset: 0x8aa): ssocr_background\n+ <71a> DW_AT_name : (strp) (offset: 0x8ac): ssocr_background\n <71e> DW_AT_decl_file : (implicit_const) 1\n <71e> DW_AT_decl_line : (data1) 48\n <71f> DW_AT_decl_column : (implicit_const) 5\n <71f> DW_AT_type : (ref_addr) <0x3f>, int\n <723> DW_AT_external : (flag_present) 1\n <723> DW_AT_location : (exprloc) 5 byte block: 3 8 20 1 0 \t(DW_OP_addr: 12008)\n <1><729>: Abbrev Number: 2 (DW_TAG_subprogram)\n <72a> DW_AT_external : (flag_present) 1\n- <72a> DW_AT_name : (strp) (offset: 0x712): print_digit\n+ <72a> DW_AT_name : (strp) (offset: 0x714): print_digit\n <72e> DW_AT_decl_file : (data1) 13\n <72f> DW_AT_decl_line : (data1) 31\n <730> DW_AT_decl_column : (data1) 5\n <731> DW_AT_prototyped : (flag_present) 1\n <731> DW_AT_type : (ref_addr) <0x3f>, int\n <735> DW_AT_declaration : (flag_present) 1\n <735> DW_AT_sibling : (ref_udata) <0x742>\n <2><737>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <738> DW_AT_type : (ref_addr) <0x3f>, int\n <2><73c>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <73d> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2><741>: Abbrev Number: 0\n <1><742>: Abbrev Number: 7 (DW_TAG_subprogram)\n <743> DW_AT_external : (flag_present) 1\n- <743> DW_AT_name : (strp) (offset: 0x483): init_charset\n+ <743> DW_AT_name : (strp) (offset: 0x485): init_charset\n <747> DW_AT_decl_file : (data1) 13\n <748> DW_AT_decl_line : (data1) 28\n <749> DW_AT_decl_column : (implicit_const) 6\n <749> DW_AT_prototyped : (flag_present) 1\n <749> DW_AT_declaration : (flag_present) 1\n <749> DW_AT_sibling : (ref_udata) <0x751>\n <2><74b>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <74c> DW_AT_type : (ref_addr) <0x4f3>, charset_t, charset_e\n <2><750>: Abbrev Number: 0\n <1><751>: Abbrev Number: 25 (DW_TAG_subprogram)\n <752> DW_AT_external : (flag_present) 1\n- <752> DW_AT_name : (strp) (offset: 0x926): printf\n+ <752> DW_AT_name : (strp) (offset: 0x928): printf\n <756> DW_AT_decl_file : (data1) 8\n <757> DW_AT_decl_line : (data2) 356\n <759> DW_AT_decl_column : (data1) 12\n <75a> DW_AT_prototyped : (flag_present) 1\n <75a> DW_AT_type : (ref_addr) <0x3f>, int\n <75e> DW_AT_declaration : (flag_present) 1\n <75e> DW_AT_sibling : (ref_udata) <0x767>\n <2><760>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <761> DW_AT_type : (ref_addr) <0x208>\n <2><765>: Abbrev Number: 21 (DW_TAG_unspecified_parameters)\n <2><766>: Abbrev Number: 0\n <1><767>: Abbrev Number: 16 (DW_TAG_subprogram)\n <768> DW_AT_external : (flag_present) 1\n- <768> DW_AT_name : (strp) (offset: 0x1fc): imlib_free_image_and_decache\n+ <768> DW_AT_name : (strp) (offset: 0x1e4): imlib_free_image_and_decache\n <76c> DW_AT_decl_file : (implicit_const) 5\n <76c> DW_AT_decl_line : (data2) 856\n <76e> DW_AT_decl_column : (implicit_const) 21\n <76e> DW_AT_prototyped : (flag_present) 1\n <76e> DW_AT_declaration : (flag_present) 1\n <1><76e>: Abbrev Number: 2 (DW_TAG_subprogram)\n <76f> DW_AT_external : (flag_present) 1\n- <76f> DW_AT_name : (strp) (offset: 0x86f): memset\n+ <76f> DW_AT_name : (strp) (offset: 0x871): memset\n <773> DW_AT_decl_file : (data1) 14\n <774> DW_AT_decl_line : (data1) 61\n <775> DW_AT_decl_column : (data1) 14\n <776> DW_AT_prototyped : (flag_present) 1\n <776> DW_AT_type : (ref_addr) <0x76>\n <77a> DW_AT_declaration : (flag_present) 1\n <77a> DW_AT_sibling : (ref_udata) <0x78c>\n@@ -1192,30 +1192,30 @@\n <2><781>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <782> DW_AT_type : (ref_addr) <0x3f>, int\n <2><786>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <787> DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <2><78b>: Abbrev Number: 0\n <1><78c>: Abbrev Number: 25 (DW_TAG_subprogram)\n <78d> DW_AT_external : (flag_present) 1\n- <78d> DW_AT_name : (strp) (offset: 0x2ee): realloc\n+ <78d> DW_AT_name : (strp) (offset: 0x2d6): realloc\n <791> DW_AT_decl_file : (data1) 15\n <792> DW_AT_decl_line : (data2) 564\n <794> DW_AT_decl_column : (data1) 14\n <795> DW_AT_prototyped : (flag_present) 1\n <795> DW_AT_type : (ref_addr) <0x76>\n <799> DW_AT_declaration : (flag_present) 1\n <799> DW_AT_sibling : (ref_udata) <0x7a6>\n <2><79b>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <79c> DW_AT_type : (ref_addr) <0x76>\n <2><7a0>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <7a1> DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <2><7a5>: Abbrev Number: 0\n <1><7a6>: Abbrev Number: 25 (DW_TAG_subprogram)\n <7a7> DW_AT_external : (flag_present) 1\n- <7a7> DW_AT_name : (strp) (offset: 0xbeb): imlib_image_draw_line\n+ <7a7> DW_AT_name : (strp) (offset: 0xbed): imlib_image_draw_line\n <7ab> DW_AT_decl_file : (data1) 5\n <7ac> DW_AT_decl_line : (data2) 2258\n <7ae> DW_AT_decl_column : (data1) 21\n <7af> DW_AT_prototyped : (flag_present) 1\n <7af> DW_AT_type : (ref_addr) <0x2e4>, Imlib_Updates\n <7b3> DW_AT_declaration : (flag_present) 1\n <7b3> DW_AT_sibling : (ref_udata) <0x7cf>\n@@ -1228,15 +1228,15 @@\n <2><7c4>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <7c5> DW_AT_type : (ref_addr) <0x3f>, int\n <2><7c9>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <7ca> DW_AT_type : (ref_addr) <0x7a>, char\n <2><7ce>: Abbrev Number: 0\n <1><7cf>: Abbrev Number: 7 (DW_TAG_subprogram)\n <7d0> DW_AT_external : (flag_present) 1\n- <7d0> DW_AT_name : (strp) (offset: 0x3c4): save_image\n+ <7d0> DW_AT_name : (strp) (offset: 0x3c6): save_image\n <7d4> DW_AT_decl_file : (data1) 16\n <7d5> DW_AT_decl_line : (data1) 180\n <7d6> DW_AT_decl_column : (implicit_const) 6\n <7d6> DW_AT_prototyped : (flag_present) 1\n <7d6> DW_AT_declaration : (flag_present) 1\n <7d6> DW_AT_sibling : (ref_udata) <0x7f2>\n <2><7d8>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n@@ -1248,45 +1248,45 @@\n <2><7e7>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <7e8> DW_AT_type : (ref_addr) <0x208>\n <2><7ec>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <7ed> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2><7f1>: Abbrev Number: 0\n <1><7f2>: Abbrev Number: 2 (DW_TAG_subprogram)\n <7f3> DW_AT_external : (flag_present) 1\n- <7f3> DW_AT_name : (strp) (offset: 0x8d0): mirror\n+ <7f3> DW_AT_name : (strp) (offset: 0x8d2): mirror\n <7f7> DW_AT_decl_file : (data1) 16\n <7f8> DW_AT_decl_line : (data1) 120\n <7f9> DW_AT_decl_column : (data1) 13\n <7fa> DW_AT_prototyped : (flag_present) 1\n <7fa> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <7fe> DW_AT_declaration : (flag_present) 1\n <7fe> DW_AT_sibling : (ref_udata) <0x80b>\n <2><800>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <801> DW_AT_type : (ref_addr) <0x3f5>\n <2><805>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <806> DW_AT_type : (ref_addr) <0x3cb>, direction_t, direction_e\n <2><80a>: Abbrev Number: 0\n <1><80b>: Abbrev Number: 2 (DW_TAG_subprogram)\n <80c> DW_AT_external : (flag_present) 1\n- <80c> DW_AT_name : (strp) (offset: 0x3b3): rotate\n+ <80c> DW_AT_name : (strp) (offset: 0x3b5): rotate\n <810> DW_AT_decl_file : (data1) 16\n <811> DW_AT_decl_line : (data1) 117\n <812> DW_AT_decl_column : (data1) 13\n <813> DW_AT_prototyped : (flag_present) 1\n <813> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <817> DW_AT_declaration : (flag_present) 1\n <817> DW_AT_sibling : (ref_udata) <0x824>\n <2><819>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <81a> DW_AT_type : (ref_addr) <0x3f5>\n <2><81e>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <81f> DW_AT_type : (ref_addr) <0x3f7>, double\n <2><823>: Abbrev Number: 0\n <1><824>: Abbrev Number: 2 (DW_TAG_subprogram)\n <825> DW_AT_external : (flag_present) 1\n- <825> DW_AT_name : (strp) (offset: 0x876): crop\n+ <825> DW_AT_name : (strp) (offset: 0x878): crop\n <829> DW_AT_decl_file : (data1) 16\n <82a> DW_AT_decl_line : (data1) 126\n <82b> DW_AT_decl_column : (data1) 13\n <82c> DW_AT_prototyped : (flag_present) 1\n <82c> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <830> DW_AT_declaration : (flag_present) 1\n <830> DW_AT_sibling : (ref_udata) <0x84c>\n@@ -1299,30 +1299,30 @@\n <2><841>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <842> DW_AT_type : (ref_addr) <0x3f>, int\n <2><846>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <847> DW_AT_type : (ref_addr) <0x3f>, int\n <2><84b>: Abbrev Number: 0\n <1><84c>: Abbrev Number: 2 (DW_TAG_subprogram)\n <84d> DW_AT_external : (flag_present) 1\n- <84d> DW_AT_name : (strp) (offset: 0x114): grayscale\n+ <84d> DW_AT_name : (strp) (offset: 0xfc): grayscale\n <851> DW_AT_decl_file : (data1) 16\n <852> DW_AT_decl_line : (data1) 123\n <853> DW_AT_decl_column : (data1) 13\n <854> DW_AT_prototyped : (flag_present) 1\n <854> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <858> DW_AT_declaration : (flag_present) 1\n <858> DW_AT_sibling : (ref_udata) <0x865>\n <2><85a>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <85b> DW_AT_type : (ref_addr) <0x3f5>\n <2><85f>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <860> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><864>: Abbrev Number: 0\n <1><865>: Abbrev Number: 2 (DW_TAG_subprogram)\n <866> DW_AT_external : (flag_present) 1\n- <866> DW_AT_name : (strp) (offset: 0x462): gray_stretch\n+ <866> DW_AT_name : (strp) (offset: 0x464): gray_stretch\n <86a> DW_AT_decl_file : (data1) 16\n <86b> DW_AT_decl_line : (data1) 84\n <86c> DW_AT_decl_column : (data1) 13\n <86d> DW_AT_prototyped : (flag_present) 1\n <86d> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <871> DW_AT_declaration : (flag_present) 1\n <871> DW_AT_sibling : (ref_udata) <0x888>\n@@ -1333,15 +1333,15 @@\n <2><87d>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <87e> DW_AT_type : (ref_addr) <0x3f7>, double\n <2><882>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <883> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><887>: Abbrev Number: 0\n <1><888>: Abbrev Number: 2 (DW_TAG_subprogram)\n <889> DW_AT_external : (flag_present) 1\n- <889> DW_AT_name : (strp) (offset: 0x7db): invert\n+ <889> DW_AT_name : (strp) (offset: 0x7dd): invert\n <88d> DW_AT_decl_file : (data1) 16\n <88e> DW_AT_decl_line : (data1) 107\n <88f> DW_AT_decl_column : (data1) 13\n <890> DW_AT_prototyped : (flag_present) 1\n <890> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <894> DW_AT_declaration : (flag_present) 1\n <894> DW_AT_sibling : (ref_udata) <0x8a6>\n@@ -1350,15 +1350,15 @@\n <2><89b>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <89c> DW_AT_type : (ref_addr) <0x3f7>, double\n <2><8a0>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <8a1> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><8a5>: Abbrev Number: 0\n <1><8a6>: Abbrev Number: 2 (DW_TAG_subprogram)\n <8a7> DW_AT_external : (flag_present) 1\n- <8a7> DW_AT_name : (strp) (offset: 0x386): dynamic_threshold\n+ <8a7> DW_AT_name : (strp) (offset: 0x388): dynamic_threshold\n <8ab> DW_AT_decl_file : (data1) 16\n <8ac> DW_AT_decl_line : (data1) 88\n <8ad> DW_AT_decl_column : (data1) 13\n <8ae> DW_AT_prototyped : (flag_present) 1\n <8ae> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <8b2> DW_AT_declaration : (flag_present) 1\n <8b2> DW_AT_sibling : (ref_udata) <0x8ce>\n@@ -1390,15 +1390,15 @@\n <2><8e6>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <8e7> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><8eb>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <8ec> DW_AT_type : (ref_addr) <0x3f>, int\n <2><8f0>: Abbrev Number: 0\n <1><8f1>: Abbrev Number: 2 (DW_TAG_subprogram)\n <8f2> DW_AT_external : (flag_present) 1\n- <8f2> DW_AT_name : (strp) (offset: 0x11e): set_pixels_filter\n+ <8f2> DW_AT_name : (strp) (offset: 0x106): set_pixels_filter\n <8f6> DW_AT_decl_file : (data1) 16\n <8f7> DW_AT_decl_line : (data1) 51\n <8f8> DW_AT_decl_column : (data1) 13\n <8f9> DW_AT_prototyped : (flag_present) 1\n <8f9> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <8fd> DW_AT_declaration : (flag_present) 1\n <8fd> DW_AT_sibling : (ref_udata) <0x914>\n@@ -1409,45 +1409,45 @@\n <2><909>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <90a> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><90e>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <90f> DW_AT_type : (ref_addr) <0x3f>, int\n <2><913>: Abbrev Number: 0\n <1><914>: Abbrev Number: 2 (DW_TAG_subprogram)\n <915> DW_AT_external : (flag_present) 1\n- <915> DW_AT_name : (strp) (offset: 0x5c6): shear\n+ <915> DW_AT_name : (strp) (offset: 0x5c8): shear\n <919> DW_AT_decl_file : (data1) 16\n <91a> DW_AT_decl_line : (data1) 114\n <91b> DW_AT_decl_column : (data1) 13\n <91c> DW_AT_prototyped : (flag_present) 1\n <91c> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <920> DW_AT_declaration : (flag_present) 1\n <920> DW_AT_sibling : (ref_udata) <0x92d>\n <2><922>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <923> DW_AT_type : (ref_addr) <0x3f5>\n <2><927>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <928> DW_AT_type : (ref_addr) <0x3f>, int\n <2><92c>: Abbrev Number: 0\n <1><92d>: Abbrev Number: 2 (DW_TAG_subprogram)\n <92e> DW_AT_external : (flag_present) 1\n- <92e> DW_AT_name : (strp) (offset: 0x419): white_border\n+ <92e> DW_AT_name : (strp) (offset: 0x41b): white_border\n <932> DW_AT_decl_file : (data1) 16\n <933> DW_AT_decl_line : (data1) 104\n <934> DW_AT_decl_column : (data1) 13\n <935> DW_AT_prototyped : (flag_present) 1\n <935> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <939> DW_AT_declaration : (flag_present) 1\n <939> DW_AT_sibling : (ref_udata) <0x946>\n <2><93b>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <93c> DW_AT_type : (ref_addr) <0x3f5>\n <2><940>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <941> DW_AT_type : (ref_addr) <0x3f>, int\n <2><945>: Abbrev Number: 0\n <1><946>: Abbrev Number: 2 (DW_TAG_subprogram)\n <947> DW_AT_external : (flag_present) 1\n- <947> DW_AT_name : (strp) (offset: 0x307): make_mono\n+ <947> DW_AT_name : (strp) (offset: 0x2ef): make_mono\n <94b> DW_AT_decl_file : (data1) 16\n <94c> DW_AT_decl_line : (data1) 92\n <94d> DW_AT_decl_column : (data1) 13\n <94e> DW_AT_prototyped : (flag_present) 1\n <94e> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <952> DW_AT_declaration : (flag_present) 1\n <952> DW_AT_sibling : (ref_udata) <0x964>\n@@ -1456,15 +1456,15 @@\n <2><959>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <95a> DW_AT_type : (ref_addr) <0x3f7>, double\n <2><95e>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <95f> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><963>: Abbrev Number: 0\n <1><964>: Abbrev Number: 2 (DW_TAG_subprogram)\n <965> DW_AT_external : (flag_present) 1\n- <965> DW_AT_name : (strp) (offset: 0x915): remove_isolated\n+ <965> DW_AT_name : (strp) (offset: 0x917): remove_isolated\n <969> DW_AT_decl_file : (data1) 16\n <96a> DW_AT_decl_line : (data1) 79\n <96b> DW_AT_decl_column : (data1) 13\n <96c> DW_AT_prototyped : (flag_present) 1\n <96c> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <970> DW_AT_declaration : (flag_present) 1\n <970> DW_AT_sibling : (ref_udata) <0x982>\n@@ -1473,15 +1473,15 @@\n <2><977>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <978> DW_AT_type : (ref_addr) <0x3f7>, double\n <2><97c>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <97d> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><981>: Abbrev Number: 0\n <1><982>: Abbrev Number: 2 (DW_TAG_subprogram)\n <983> DW_AT_external : (flag_present) 1\n- <983> DW_AT_name : (strp) (offset: 0x9db): closing\n+ <983> DW_AT_name : (strp) (offset: 0x9dd): closing\n <987> DW_AT_decl_file : (data1) 16\n <988> DW_AT_decl_line : (data1) 67\n <989> DW_AT_decl_column : (data1) 13\n <98a> DW_AT_prototyped : (flag_present) 1\n <98a> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <98e> DW_AT_declaration : (flag_present) 1\n <98e> DW_AT_sibling : (ref_udata) <0x9a5>\n@@ -1492,15 +1492,15 @@\n <2><99a>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <99b> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><99f>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <9a0> DW_AT_type : (ref_addr) <0x3f>, int\n <2><9a4>: Abbrev Number: 0\n <1><9a5>: Abbrev Number: 2 (DW_TAG_subprogram)\n <9a6> DW_AT_external : (flag_present) 1\n- <9a6> DW_AT_name : (strp) (offset: 0x65b): opening\n+ <9a6> DW_AT_name : (strp) (offset: 0x65d): opening\n <9aa> DW_AT_decl_file : (data1) 16\n <9ab> DW_AT_decl_line : (data1) 71\n <9ac> DW_AT_decl_column : (data1) 13\n <9ad> DW_AT_prototyped : (flag_present) 1\n <9ad> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <9b1> DW_AT_declaration : (flag_present) 1\n <9b1> DW_AT_sibling : (ref_udata) <0x9c8>\n@@ -1511,15 +1511,15 @@\n <2><9bd>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <9be> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><9c2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <9c3> DW_AT_type : (ref_addr) <0x3f>, int\n <2><9c7>: Abbrev Number: 0\n <1><9c8>: Abbrev Number: 2 (DW_TAG_subprogram)\n <9c9> DW_AT_external : (flag_present) 1\n- <9c9> DW_AT_name : (strp) (offset: 0x3e8): erosion\n+ <9c9> DW_AT_name : (strp) (offset: 0x3ea): erosion\n <9cd> DW_AT_decl_file : (data1) 16\n <9ce> DW_AT_decl_line : (data1) 63\n <9cf> DW_AT_decl_column : (data1) 13\n <9d0> DW_AT_prototyped : (flag_present) 1\n <9d0> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <9d4> DW_AT_declaration : (flag_present) 1\n <9d4> DW_AT_sibling : (ref_udata) <0x9eb>\n@@ -1530,15 +1530,15 @@\n <2><9e0>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <9e1> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2><9e5>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <9e6> DW_AT_type : (ref_addr) <0x3f>, int\n <2><9ea>: Abbrev Number: 0\n <1><9eb>: Abbrev Number: 2 (DW_TAG_subprogram)\n <9ec> DW_AT_external : (flag_present) 1\n- <9ec> DW_AT_name : (strp) (offset: 0x34b): dilation\n+ <9ec> DW_AT_name : (strp) (offset: 0x34d): dilation\n <9f0> DW_AT_decl_file : (data1) 16\n <9f1> DW_AT_decl_line : (data1) 59\n <9f2> DW_AT_decl_column : (data1) 13\n <9f3> DW_AT_prototyped : (flag_present) 1\n <9f3> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <9f7> DW_AT_declaration : (flag_present) 1\n <9f7> DW_AT_sibling : (ref_udata) <0xa0e>\n@@ -1549,15 +1549,15 @@\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x35a): adapt_threshold\n+ DW_AT_name : (strp) (offset: 0x35c): adapt_threshold\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 129\n DW_AT_decl_column : (data1) 8\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xa45>\n@@ -1576,15 +1576,15 @@\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x605): get_maxval\n+ DW_AT_name : (strp) (offset: 0x607): get_maxval\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 146\n DW_AT_decl_column : (data1) 8\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xa72>\n@@ -1599,15 +1599,15 @@\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x332): get_minval\n+ DW_AT_name : (strp) (offset: 0x31a): get_minval\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 142\n DW_AT_decl_column : (data1) 8\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xa9f>\n@@ -1622,159 +1622,159 @@\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x443): report_imlib_error\n+ DW_AT_name : (strp) (offset: 0x445): report_imlib_error\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 184\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xaae>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3a7>, Imlib_Load_Error, unsigned int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 4 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xaeb): free\n+ DW_AT_name : (strp) (offset: 0xaed): free\n DW_AT_decl_file : (data1) 15\n DW_AT_decl_line : (data2) 568\n DW_AT_decl_column : (data1) 13\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xabf>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x76>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x6d1): imlib_load_image_with_error_return\n+ DW_AT_name : (strp) (offset: 0x6d3): imlib_load_image_with_error_return\n DW_AT_decl_file : (data1) 5\n DW_AT_decl_line : (data2) 2947\n DW_AT_decl_column : (data1) 21\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xad9>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x41b>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x4c4): print_cs_key\n+ DW_AT_name : (strp) (offset: 0x4c6): print_cs_key\n DW_AT_decl_file : (data1) 18\n DW_AT_decl_line : (data1) 41\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xaed>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x4f3>, charset_t, charset_e\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x524): print_lum_key\n+ DW_AT_name : (strp) (offset: 0x526): print_lum_key\n DW_AT_decl_file : (data1) 18\n DW_AT_decl_line : (data1) 35\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb01>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x3dc): short_usage\n+ DW_AT_name : (strp) (offset: 0x3de): short_usage\n DW_AT_decl_file : (data1) 18\n DW_AT_decl_line : (data1) 25\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb15>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x78>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xbc0): parse_charset\n+ DW_AT_name : (strp) (offset: 0xbc2): parse_charset\n DW_AT_decl_file : (data1) 13\n DW_AT_decl_line : (data1) 25\n DW_AT_decl_column : (data1) 11\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x4f3>, charset_t, charset_e\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb29>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x78>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x162): parse_lum\n+ DW_AT_name : (strp) (offset: 0x14a): parse_lum\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 23\n DW_AT_decl_column : (data1) 13\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb3d>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x78>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x3f9): set_bg_color\n+ DW_AT_name : (strp) (offset: 0x3fb): set_bg_color\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 29\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb4c>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xa33): set_fg_color\n+ DW_AT_name : (strp) (offset: 0xa35): set_fg_color\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 26\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb5b>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x8ed): strdup\n+ DW_AT_name : (strp) (offset: 0x8ef): strdup\n DW_AT_decl_file : (data1) 14\n DW_AT_decl_line : (data1) 187\n DW_AT_decl_column : (data1) 14\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb6f>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x183): atof\n+ DW_AT_name : (strp) (offset: 0x16b): atof\n DW_AT_decl_file : (data1) 15\n DW_AT_decl_line : (data1) 102\n DW_AT_decl_column : (data1) 15\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb83>\n@@ -1791,15 +1791,15 @@\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xb92>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x74e): getopt_long\n+ DW_AT_name : (strp) (offset: 0x750): getopt_long\n DW_AT_decl_file : (data1) 10\n DW_AT_decl_line : (data1) 66\n DW_AT_decl_column : (data1) 12\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xbb4>\n@@ -1818,87 +1818,87 @@\n DW_AT_byte_size : (implicit_const) 4\n DW_AT_type : (ref_udata) <0x594>\n <1>: Abbrev Number: 17 (DW_TAG_pointer_type)\n DW_AT_byte_size : (implicit_const) 4\n DW_AT_type : (ref_udata) <0x617>, option\n <1>: Abbrev Number: 7 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x3e2): usage\n+ DW_AT_name : (strp) (offset: 0x3e4): usage\n DW_AT_decl_file : (data1) 18\n DW_AT_decl_line : (data1) 26\n DW_AT_decl_column : (implicit_const) 6\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xbcd>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x78>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x188): atoi\n+ DW_AT_name : (strp) (offset: 0x170): atoi\n DW_AT_decl_file : (data1) 15\n DW_AT_decl_line : (data1) 105\n DW_AT_decl_column : (data1) 12\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xbe1>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x1c7): strchr\n+ DW_AT_name : (strp) (offset: 0x1af): strchr\n DW_AT_decl_file : (data1) 14\n DW_AT_decl_line : (data1) 246\n DW_AT_decl_column : (data1) 14\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xbfa>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x8de): fputc\n+ DW_AT_name : (strp) (offset: 0x8e0): fputc\n DW_AT_decl_file : (data1) 8\n DW_AT_decl_line : (data2) 549\n DW_AT_decl_column : (data1) 12\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xc14>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x27c): is_pixel_set\n+ DW_AT_name : (strp) (offset: 0x264): is_pixel_set\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 44\n DW_AT_decl_column : (data1) 5\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xc2d>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f7>, double\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x9f): get_lum\n+ DW_AT_name : (strp) (offset: 0x87): get_lum\n DW_AT_decl_file : (data1) 16\n DW_AT_decl_line : (data1) 150\n DW_AT_decl_column : (data1) 5\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xc46>\n@@ -1918,41 +1918,41 @@\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xc5b>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x4e7): ferror\n+ DW_AT_name : (strp) (offset: 0x4e9): ferror\n DW_AT_decl_file : (data1) 8\n DW_AT_decl_line : (data2) 790\n DW_AT_decl_column : (data1) 12\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xc70>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x202>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xbe5): close\n+ DW_AT_name : (strp) (offset: 0xbe7): close\n DW_AT_decl_file : (data1) 19\n DW_AT_decl_line : (data2) 358\n DW_AT_decl_column : (data1) 12\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xc85>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x3f>, int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xb47): fread\n+ DW_AT_name : (strp) (offset: 0xb49): fread\n DW_AT_decl_file : (data1) 8\n DW_AT_decl_line : (data2) 675\n DW_AT_decl_column : (data1) 15\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xca6>\n@@ -1980,41 +1980,41 @@\n <2>: Abbrev Number: 13 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_udata) <0x5bf>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x90d): mkstemp\n+ DW_AT_name : (strp) (offset: 0x90f): mkstemp\n DW_AT_decl_file : (data1) 15\n DW_AT_decl_line : (data2) 708\n DW_AT_decl_column : (data1) 12\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xcd4>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x78>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 6 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x23b): umask\n+ DW_AT_name : (strp) (offset: 0x223): umask\n DW_AT_decl_file : (data1) 20\n DW_AT_decl_line : (data2) 380\n DW_AT_decl_column : (data1) 17\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_udata) <0x577>, __mode_t, unsigned int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xce3>\n <2>: Abbrev Number: 13 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_udata) <0x577>, __mode_t, unsigned int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 2 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xa2c): memcpy\n+ DW_AT_name : (strp) (offset: 0xa2e): memcpy\n DW_AT_decl_file : (data1) 14\n DW_AT_decl_line : (data1) 43\n DW_AT_decl_column : (data1) 14\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x76>\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xcfe>\n@@ -2023,129 +2023,129 @@\n <2>: Abbrev Number: 13 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_udata) <0x5bf>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 4 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x61d): perror\n+ DW_AT_name : (strp) (offset: 0x61f): perror\n DW_AT_decl_file : (data1) 8\n DW_AT_decl_line : (data2) 804\n DW_AT_decl_column : (data1) 13\n DW_AT_prototyped : (flag_present) 1\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xd0f>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x6be): calloc\n+ DW_AT_name : (strp) (offset: 0x6c0): calloc\n DW_AT_decl_file : (data1) 15\n DW_AT_decl_line : (data2) 556\n DW_AT_decl_column : (data1) 14\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x76>\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xd29>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0xa03): strlen\n+ DW_AT_name : (strp) (offset: 0xa05): strlen\n DW_AT_decl_file : (data1) 14\n DW_AT_decl_line : (data2) 407\n DW_AT_decl_column : (data1) 15\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xd3e>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 25 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x4bd): getenv\n+ DW_AT_name : (strp) (offset: 0x4bf): getenv\n DW_AT_decl_file : (data1) 15\n DW_AT_decl_line : (data2) 654\n DW_AT_decl_column : (data1) 14\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_declaration : (flag_present) 1\n DW_AT_sibling : (ref_udata) <0xd53>\n <2>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n DW_AT_type : (ref_addr) <0x208>\n <2>: Abbrev Number: 0\n <1>: Abbrev Number: 33 (DW_TAG_subprogram)\n DW_AT_external : (flag_present) 1\n- DW_AT_name : (strp) (offset: 0x219): main\n+ DW_AT_name : (strp) (offset: 0x201): main\n DW_AT_decl_file : (data1) 1\n DW_AT_decl_line : (data1) 236\n DW_AT_decl_column : (data1) 5\n DW_AT_prototyped : (flag_present) 1\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_low_pc : (addr) 0x1848\n DW_AT_high_pc : (udata) 28772\n DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n DW_AT_call_all_tail_calls: (flag_present) 1\n DW_AT_sibling : (ref_udata) <0x130c>\n <2>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- DW_AT_name : (strp) (offset: 0x54a): argc\n+ DW_AT_name : (strp) (offset: 0x54c): argc\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 236\n DW_AT_decl_column : (data1) 14\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 dc 7c \t(DW_OP_fbreg: -420)\n <2>: Abbrev Number: 9 (DW_TAG_formal_parameter)\n- DW_AT_name : (strp) (offset: 0x5c1): argv\n+ DW_AT_name : (strp) (offset: 0x5c3): argv\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 236\n DW_AT_decl_column : (data1) 27\n DW_AT_type : (ref_udata) <0x5a2>\n DW_AT_location : (exprloc) 3 byte block: 91 d8 7c \t(DW_OP_fbreg: -424)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xda1): image\n+ DW_AT_name : (strp) (offset: 0xd99): image\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 238\n DW_AT_decl_column : (data1) 15\n DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n DW_AT_location : (exprloc) 3 byte block: 91 e0 7c \t(DW_OP_fbreg: -416)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ DW_AT_name : (strp) (offset: 0x3bc): new_image\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 239\n DW_AT_decl_column : (data1) 15\n DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n DW_AT_location : (exprloc) 3 byte block: 91 ec 7c \t(DW_OP_fbreg: -404)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x948): debug_image\n+ DW_AT_name : (strp) (offset: 0x94a): debug_image\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 240\n DW_AT_decl_column : (data1) 15\n DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n DW_AT_location : (exprloc) 3 byte block: 91 e4 7c \t(DW_OP_fbreg: -412)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x53f): load_error\n+ DW_AT_name : (strp) (offset: 0x541): load_error\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 241\n DW_AT_decl_column : (data1) 20\n DW_AT_type : (ref_addr) <0x3a7>, Imlib_Load_Error, unsigned int\n DW_AT_location : (exprloc) 3 byte block: 91 e8 7c \t(DW_OP_fbreg: -408)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x45a): imgfile\n+ DW_AT_name : (strp) (offset: 0x45c): imgfile\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 242\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_location : (exprloc) 3 byte block: 91 f0 7c \t(DW_OP_fbreg: -400)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xc15): use_tmpfile\n+ DW_AT_name : (strp) (offset: 0xc17): use_tmpfile\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 243\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 f4 7c \t(DW_OP_fbreg: -396)\n <2>: Abbrev Number: 43 (DW_TAG_variable)\n DW_AT_name : (string) i\n@@ -2165,162 +2165,162 @@\n DW_AT_name : (string) d\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 245\n DW_AT_decl_column : (data1) 13\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 80 7d \t(DW_OP_fbreg: -384)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x33d): unknown_digit\n+ DW_AT_name : (strp) (offset: 0x325): unknown_digit\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 246\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 84 7d \t(DW_OP_fbreg: -380)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n DW_AT_name : (strp) (offset: 0xe): need_pixels\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 247\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 88 7d \t(DW_OP_fbreg: -376)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x9f7): min_segment\n+ DW_AT_name : (strp) (offset: 0x9f9): min_segment\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 248\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 8c 7d \t(DW_OP_fbreg: -372)\n <2>: Abbrev Number: 30 (DW_TAG_variable)\n DW_AT_name : (strp) (offset: 0): min_char_dims\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 249\n DW_AT_decl_column : (data1) 21\n DW_AT_type : (ref_udata) <0x6d4>, dimensions_struct\n DW_AT_location : (exprloc) 3 byte block: 91 ac 7f \t(DW_OP_fbreg: -84)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x497): potential_digits\n+ DW_AT_name : (strp) (offset: 0x499): potential_digits\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 250\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 90 7d \t(DW_OP_fbreg: -368)\n <2>: Abbrev Number: 30 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xb5b): expected_digits\n+ DW_AT_name : (strp) (offset: 0xb5d): expected_digits\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 251\n DW_AT_decl_column : (data1) 19\n DW_AT_type : (ref_udata) <0x6ff>, interval_struct\n DW_AT_location : (exprloc) 3 byte block: 91 b4 7f \t(DW_OP_fbreg: -76)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x2f6): number_of_digits\n+ DW_AT_name : (strp) (offset: 0x2de): number_of_digits\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 252\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 c4 7e \t(DW_OP_fbreg: -188)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x4af): ignore_pixels\n+ DW_AT_name : (strp) (offset: 0x4b1): ignore_pixels\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 253\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 94 7d \t(DW_OP_fbreg: -364)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x92d): one_ratio\n+ DW_AT_name : (strp) (offset: 0x92f): one_ratio\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 254\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 98 7d \t(DW_OP_fbreg: -360)\n <2>: Abbrev Number: 11 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x64f): minus_ratio\n+ DW_AT_name : (strp) (offset: 0x651): minus_ratio\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data1) 255\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 9c 7d \t(DW_OP_fbreg: -356)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x62c): dec_h_ratio\n+ DW_AT_name : (strp) (offset: 0x62e): dec_h_ratio\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 256\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 a0 7d \t(DW_OP_fbreg: -352)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x6c5): dec_w_ratio\n+ DW_AT_name : (strp) (offset: 0x6c7): dec_w_ratio\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 257\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 a4 7d \t(DW_OP_fbreg: -348)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x5d4): spc_fac\n+ DW_AT_name : (strp) (offset: 0x5d6): spc_fac\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 258\n DW_AT_decl_column : (data1) 10\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_location : (exprloc) 3 byte block: 91 f0 7e \t(DW_OP_fbreg: -144)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xd05): thresh\n+ DW_AT_name : (strp) (offset: 0xd07): thresh\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 259\n DW_AT_decl_column : (data1) 10\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_location : (exprloc) 3 byte block: 91 f8 7e \t(DW_OP_fbreg: -136)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x58e): offset\n+ DW_AT_name : (strp) (offset: 0x590): offset\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 260\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 a8 7e \t(DW_OP_fbreg: -216)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x70c): theta\n+ DW_AT_name : (strp) (offset: 0x70e): theta\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 261\n DW_AT_decl_column : (data1) 10\n DW_AT_type : (ref_addr) <0x3f7>, double\n DW_AT_location : (exprloc) 3 byte block: 91 90 7f \t(DW_OP_fbreg: -112)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x982): output_file\n+ DW_AT_name : (strp) (offset: 0x984): output_file\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 262\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_location : (exprloc) 3 byte block: 91 a8 7d \t(DW_OP_fbreg: -344)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xc21): output_fmt\n+ DW_AT_name : (strp) (offset: 0xc23): output_fmt\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 263\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_location : (exprloc) 3 byte block: 91 ac 7d \t(DW_OP_fbreg: -340)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x1b6): debug_image_file\n+ DW_AT_name : (strp) (offset: 0x19e): debug_image_file\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 264\n DW_AT_decl_column : (data1) 9\n DW_AT_type : (ref_addr) <0x78>\n DW_AT_location : (exprloc) 3 byte block: 91 b0 7d \t(DW_OP_fbreg: -336)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x675): flags\n+ DW_AT_name : (strp) (offset: 0x677): flags\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 265\n DW_AT_decl_column : (data1) 16\n DW_AT_type : (ref_addr) <0x23>, unsigned int\n DW_AT_location : (exprloc) 3 byte block: 91 b4 7d \t(DW_OP_fbreg: -332)\n <2>: Abbrev Number: 12 (DW_TAG_variable)\n DW_AT_name : (string) lt\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 266\n DW_AT_decl_column : (data1) 15\n DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n DW_AT_location : (exprloc) 3 byte block: 91 b8 7d \t(DW_OP_fbreg: -328)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xbc6): charset\n+ DW_AT_name : (strp) (offset: 0xbc8): charset\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 267\n DW_AT_decl_column : (data1) 13\n DW_AT_type : (ref_addr) <0x4f3>, charset_t, charset_e\n DW_AT_location : (exprloc) 3 byte block: 91 bc 7d \t(DW_OP_fbreg: -324)\n <2>: Abbrev Number: 12 (DW_TAG_variable)\n DW_AT_name : (string) w\n@@ -2354,95 +2354,95 @@\n DW_AT_name : (string) row\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 271\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 cc 7d \t(DW_OP_fbreg: -308)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xc05): dig_w\n+ DW_AT_name : (strp) (offset: 0xc07): dig_w\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 272\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 c8 7e \t(DW_OP_fbreg: -184)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xbdf): dig_h\n+ DW_AT_name : (strp) (offset: 0xbe1): dig_h\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 273\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 cc 7e \t(DW_OP_fbreg: -180)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xbdb): max_dig_h\n+ DW_AT_name : (strp) (offset: 0xbdd): max_dig_h\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 274\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 d0 7d \t(DW_OP_fbreg: -304)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xc01): max_dig_w\n+ DW_AT_name : (strp) (offset: 0xc03): max_dig_w\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 274\n DW_AT_decl_column : (data1) 20\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 d4 7d \t(DW_OP_fbreg: -300)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0x7d5): color\n+ DW_AT_name : (strp) (offset: 0x7d7): color\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 275\n DW_AT_decl_column : (data1) 15\n DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2>: Abbrev Number: 19 (DW_TAG_variable)\n- DW_AT_name : (strp) (offset: 0xb6): state\n+ DW_AT_name : (strp) (offset: 0x9e): state\n DW_AT_decl_file : (implicit_const) 1\n DW_AT_decl_line : (data2) 277\n DW_AT_decl_column : (data1) 7\n DW_AT_type : (ref_addr) <0x3f>, int\n DW_AT_location : (exprloc) 3 byte block: 91 d8 7d \t(DW_OP_fbreg: -296)\n <2><1003>: Abbrev Number: 40 (DW_TAG_variable)\n- <1004> DW_AT_name : (strp) (offset: 0xb64): digits\n+ <1004> DW_AT_name : (strp) (offset: 0xb66): digits\n <1008> DW_AT_decl_file : (implicit_const) 1\n <1008> DW_AT_decl_line : (data2) 278\n <100a> DW_AT_decl_column : (data1) 17\n <100b> DW_AT_type : (ref_udata) <0x130c>\n <100d> DW_AT_location : (exprloc) 3 byte block: 91 dc 7d \t(DW_OP_fbreg: -292)\n <2><1011>: Abbrev Number: 19 (DW_TAG_variable)\n- <1012> DW_AT_name : (strp) (offset: 0x725): found_pixels\n+ <1012> DW_AT_name : (strp) (offset: 0x727): found_pixels\n <1016> DW_AT_decl_file : (implicit_const) 1\n <1016> DW_AT_decl_line : (data2) 279\n <1018> DW_AT_decl_column : (data1) 7\n <1019> DW_AT_type : (ref_addr) <0x3f>, int\n <101d> DW_AT_location : (exprloc) 3 byte block: 91 e0 7d \t(DW_OP_fbreg: -288)\n <2><1021>: Abbrev Number: 40 (DW_TAG_variable)\n- <1022> DW_AT_name : (strp) (offset: 0xfe): d_color\n+ <1022> DW_AT_name : (strp) (offset: 0xe6): d_color\n <1026> DW_AT_decl_file : (implicit_const) 1\n <1026> DW_AT_decl_line : (data2) 280\n <1028> DW_AT_decl_column : (data1) 16\n <1029> DW_AT_type : (ref_udata) <0x6ad>, color_struct\n <102b> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><102e>: Abbrev Number: 27 (DW_TAG_lexical_block)\n <102f> DW_AT_ranges : (sec_offset) 0xc\n <1033> DW_AT_sibling : (ref_udata) <0x1095>\n <3><1035>: Abbrev Number: 19 (DW_TAG_variable)\n- <1036> DW_AT_name : (strp) (offset: 0x8f4): option_index\n+ <1036> DW_AT_name : (strp) (offset: 0x8f6): option_index\n <103a> DW_AT_decl_file : (implicit_const) 1\n <103a> DW_AT_decl_line : (data2) 295\n <103c> DW_AT_decl_column : (data1) 9\n <103d> DW_AT_type : (ref_addr) <0x3f>, int\n <1041> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <3><1045>: Abbrev Number: 12 (DW_TAG_variable)\n <1046> DW_AT_name : (string) c\n <1048> DW_AT_decl_file : (implicit_const) 1\n <1048> DW_AT_decl_line : (data2) 296\n <104a> DW_AT_decl_column : (data1) 9\n <104b> DW_AT_type : (ref_addr) <0x3f>, int\n <104f> DW_AT_location : (exprloc) 3 byte block: 91 fc 7d \t(DW_OP_fbreg: -260)\n <3><1053>: Abbrev Number: 40 (DW_TAG_variable)\n- <1054> DW_AT_name : (strp) (offset: 0x46f): long_options\n+ <1054> DW_AT_name : (strp) (offset: 0x471): long_options\n <1058> DW_AT_decl_file : (implicit_const) 1\n <1058> DW_AT_decl_line : (data2) 297\n <105a> DW_AT_decl_column : (data1) 26\n <105b> DW_AT_type : (ref_udata) <0x130f>, option\n <105d> DW_AT_location : (exprloc) 5 byte block: 3 c 20 1 0 \t(DW_OP_addr: 1200c)\n <3><1063>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <1064> DW_AT_low_pc : (addr) 0x1e84\n@@ -2517,39 +2517,39 @@\n <10f0> DW_AT_location : (exprloc) 3 byte block: 91 b0 7e \t(DW_OP_fbreg: -208)\n <3><10f4>: Abbrev Number: 0\n <2><10f5>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <10f6> DW_AT_low_pc : (addr) 0x3a2c\n <10fa> DW_AT_high_pc : (udata) 350\n <10fc> DW_AT_sibling : (ref_udata) <0x110f>\n <3><10fe>: Abbrev Number: 19 (DW_TAG_variable)\n- <10ff> DW_AT_name : (strp) (offset: 0x18d): bdwidth\n+ <10ff> DW_AT_name : (strp) (offset: 0x175): bdwidth\n <1103> DW_AT_decl_file : (implicit_const) 1\n <1103> DW_AT_decl_line : (data2) 813\n <1105> DW_AT_decl_column : (data1) 13\n <1106> DW_AT_type : (ref_addr) <0x3f>, int\n <110a> DW_AT_location : (exprloc) 3 byte block: 91 ac 7e \t(DW_OP_fbreg: -212)\n <3><110e>: Abbrev Number: 0\n <2><110f>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <1110> DW_AT_low_pc : (addr) 0x3d4a\n <1114> DW_AT_high_pc : (udata) 360\n <1116> DW_AT_sibling : (ref_udata) <0x1129>\n <3><1118>: Abbrev Number: 19 (DW_TAG_variable)\n- <1119> DW_AT_name : (strp) (offset: 0x23c): mask\n+ <1119> DW_AT_name : (strp) (offset: 0x224): mask\n <111d> DW_AT_decl_file : (implicit_const) 1\n <111d> DW_AT_decl_line : (data2) 851\n <111f> DW_AT_decl_column : (data1) 13\n <1120> DW_AT_type : (ref_addr) <0x3f>, int\n <1124> DW_AT_location : (exprloc) 3 byte block: 91 a4 7e \t(DW_OP_fbreg: -220)\n <3><1128>: Abbrev Number: 0\n <2><1129>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <112a> DW_AT_low_pc : (addr) 0x3ee2\n <112e> DW_AT_high_pc : (udata) 360\n <1130> DW_AT_sibling : (ref_udata) <0x1143>\n <3><1132>: Abbrev Number: 19 (DW_TAG_variable)\n- <1133> DW_AT_name : (strp) (offset: 0x23c): mask\n+ <1133> DW_AT_name : (strp) (offset: 0x224): mask\n <1137> DW_AT_decl_file : (implicit_const) 1\n <1137> DW_AT_decl_line : (data2) 871\n <1139> DW_AT_decl_column : (data1) 13\n <113a> DW_AT_type : (ref_addr) <0x3f>, int\n <113e> DW_AT_location : (exprloc) 3 byte block: 91 a0 7e \t(DW_OP_fbreg: -224)\n <3><1142>: Abbrev Number: 0\n <2><1143>: Abbrev Number: 45 (DW_TAG_lexical_block)\n@@ -2642,27 +2642,27 @@\n <11fa> DW_AT_location : (exprloc) 3 byte block: 91 94 7e \t(DW_OP_fbreg: -236)\n <3><11fe>: Abbrev Number: 0\n <2><11ff>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <1200> DW_AT_low_pc : (addr) 0x5802\n <1204> DW_AT_high_pc : (udata) 1666\n <1206> DW_AT_sibling : (ref_udata) <0x1219>\n <3><1208>: Abbrev Number: 19 (DW_TAG_variable)\n- <1209> DW_AT_name : (strp) (offset: 0x328): found_top\n+ <1209> DW_AT_name : (strp) (offset: 0x310): found_top\n <120d> DW_AT_decl_file : (implicit_const) 1\n <120d> DW_AT_decl_line : (data2) 1194\n <120f> DW_AT_decl_column : (data1) 9\n <1210> DW_AT_type : (ref_addr) <0x3f>, int\n <1214> DW_AT_location : (exprloc) 3 byte block: 91 e4 7d \t(DW_OP_fbreg: -284)\n <3><1218>: Abbrev Number: 0\n <2><1219>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <121a> DW_AT_low_pc : (addr) 0x5ef6\n <121e> DW_AT_high_pc : (udata) 784\n <1220> DW_AT_sibling : (ref_udata) <0x1251>\n <3><1222>: Abbrev Number: 19 (DW_TAG_variable)\n- <1223> DW_AT_name : (strp) (offset: 0x130): digit_count\n+ <1223> DW_AT_name : (strp) (offset: 0x118): digit_count\n <1227> DW_AT_decl_file : (implicit_const) 1\n <1227> DW_AT_decl_line : (data2) 1275\n <1229> DW_AT_decl_column : (data1) 9\n <122a> DW_AT_type : (ref_addr) <0x3f>, int\n <122e> DW_AT_location : (exprloc) 3 byte block: 91 e8 7d \t(DW_OP_fbreg: -280)\n <3><1232>: Abbrev Number: 12 (DW_TAG_variable)\n <1233> DW_AT_name : (string) pos\n@@ -2680,86 +2680,86 @@\n <124c> DW_AT_location : (exprloc) 3 byte block: 91 c0 7e \t(DW_OP_fbreg: -192)\n <3><1250>: Abbrev Number: 0\n <2><1251>: Abbrev Number: 45 (DW_TAG_lexical_block)\n <1252> DW_AT_low_pc : (addr) 0x7456\n <1256> DW_AT_high_pc : (udata) 2744\n <1258> DW_AT_sibling : (ref_udata) <0x12a3>\n <3><125a>: Abbrev Number: 19 (DW_TAG_variable)\n- <125b> DW_AT_name : (strp) (offset: 0x9d2): d_height\n+ <125b> DW_AT_name : (strp) (offset: 0x9d4): d_height\n <125f> DW_AT_decl_file : (implicit_const) 1\n <125f> DW_AT_decl_line : (data2) 1481\n <1261> DW_AT_decl_column : (data1) 9\n <1262> DW_AT_type : (ref_addr) <0x3f>, int\n <1266> DW_AT_location : (exprloc) 3 byte block: 91 dc 7e \t(DW_OP_fbreg: -164)\n <3><126a>: Abbrev Number: 8 (DW_TAG_lexical_block)\n <126b> DW_AT_low_pc : (addr) 0x7580\n <126f> DW_AT_high_pc : (udata) 2444\n <4><1271>: Abbrev Number: 19 (DW_TAG_variable)\n- <1272> DW_AT_name : (strp) (offset: 0x8d7): middle\n+ <1272> DW_AT_name : (strp) (offset: 0x8d9): middle\n <1276> DW_AT_decl_file : (implicit_const) 1\n <1276> DW_AT_decl_line : (data2) 1491\n <1278> DW_AT_decl_column : (data1) 11\n <1279> DW_AT_type : (ref_addr) <0x3f>, int\n <127d> DW_AT_location : (exprloc) 3 byte block: 91 e0 7e \t(DW_OP_fbreg: -160)\n <4><1281>: Abbrev Number: 19 (DW_TAG_variable)\n- <1282> DW_AT_name : (strp) (offset: 0x143): quarter\n+ <1282> DW_AT_name : (strp) (offset: 0x12b): quarter\n <1286> DW_AT_decl_file : (implicit_const) 1\n <1286> DW_AT_decl_line : (data2) 1492\n <1288> DW_AT_decl_column : (data1) 11\n <1289> DW_AT_type : (ref_addr) <0x3f>, int\n <128d> DW_AT_location : (exprloc) 3 byte block: 91 e4 7e \t(DW_OP_fbreg: -156)\n <4><1291>: Abbrev Number: 19 (DW_TAG_variable)\n- <1292> DW_AT_name : (strp) (offset: 0x9c3): three_quarters\n+ <1292> DW_AT_name : (strp) (offset: 0x9c5): three_quarters\n <1296> DW_AT_decl_file : (implicit_const) 1\n <1296> DW_AT_decl_line : (data2) 1493\n <1298> DW_AT_decl_column : (data1) 11\n <1299> DW_AT_type : (ref_addr) <0x3f>, int\n <129d> DW_AT_location : (exprloc) 3 byte block: 91 e8 7e \t(DW_OP_fbreg: -152)\n <4><12a1>: Abbrev Number: 0\n <3><12a2>: Abbrev Number: 0\n <2><12a3>: Abbrev Number: 8 (DW_TAG_lexical_block)\n <12a4> DW_AT_low_pc : (addr) 0x7f56\n <12a8> DW_AT_high_pc : (udata) 782\n <3><12aa>: Abbrev Number: 19 (DW_TAG_variable)\n- <12ab> DW_AT_name : (strp) (offset: 0x807): min_dst\n+ <12ab> DW_AT_name : (strp) (offset: 0x809): min_dst\n <12af> DW_AT_decl_file : (implicit_const) 1\n <12af> DW_AT_decl_line : (data2) 1563\n <12b1> DW_AT_decl_column : (data1) 9\n <12b2> DW_AT_type : (ref_addr) <0x3f>, int\n <12b6> DW_AT_location : (exprloc) 3 byte block: 91 f0 7d \t(DW_OP_fbreg: -272)\n <3><12ba>: Abbrev Number: 19 (DW_TAG_variable)\n- <12bb> DW_AT_name : (strp) (offset: 0x22d): avg_dst\n+ <12bb> DW_AT_name : (strp) (offset: 0x215): avg_dst\n <12bf> DW_AT_decl_file : (implicit_const) 1\n <12bf> DW_AT_decl_line : (data2) 1563\n <12c1> DW_AT_decl_column : (data1) 18\n <12c2> DW_AT_type : (ref_addr) <0x3f>, int\n <12c6> DW_AT_location : (exprloc) 3 byte block: 91 d0 7e \t(DW_OP_fbreg: -176)\n <3><12ca>: Abbrev Number: 19 (DW_TAG_variable)\n- <12cb> DW_AT_name : (strp) (offset: 0x2e6): dst_sum\n+ <12cb> DW_AT_name : (strp) (offset: 0x2ce): dst_sum\n <12cf> DW_AT_decl_file : (implicit_const) 1\n <12cf> DW_AT_decl_line : (data2) 1563\n <12d1> DW_AT_decl_column : (data1) 27\n <12d2> DW_AT_type : (ref_addr) <0x3f>, int\n <12d6> DW_AT_location : (exprloc) 3 byte block: 91 f4 7d \t(DW_OP_fbreg: -268)\n <3><12da>: Abbrev Number: 19 (DW_TAG_variable)\n- <12db> DW_AT_name : (strp) (offset: 0xbb8): cur_dst\n+ <12db> DW_AT_name : (strp) (offset: 0xbba): cur_dst\n <12df> DW_AT_decl_file : (implicit_const) 1\n <12df> DW_AT_decl_line : (data2) 1563\n <12e1> DW_AT_decl_column : (data1) 36\n <12e2> DW_AT_type : (ref_addr) <0x3f>, int\n <12e6> DW_AT_location : (exprloc) 3 byte block: 91 d8 7e \t(DW_OP_fbreg: -168)\n <3><12ea>: Abbrev Number: 19 (DW_TAG_variable)\n- <12eb> DW_AT_name : (strp) (offset: 0x195): base_dst\n+ <12eb> DW_AT_name : (strp) (offset: 0x17d): base_dst\n <12ef> DW_AT_decl_file : (implicit_const) 1\n <12ef> DW_AT_decl_line : (data2) 1563\n <12f1> DW_AT_decl_column : (data1) 45\n <12f2> DW_AT_type : (ref_addr) <0x3f>, int\n <12f6> DW_AT_location : (exprloc) 3 byte block: 91 f8 7d \t(DW_OP_fbreg: -264)\n <3><12fa>: Abbrev Number: 19 (DW_TAG_variable)\n- <12fb> DW_AT_name : (strp) (offset: 0x5f8): num_spc\n+ <12fb> DW_AT_name : (strp) (offset: 0x5fa): num_spc\n <12ff> DW_AT_decl_file : (implicit_const) 1\n <12ff> DW_AT_decl_line : (data2) 1563\n <1301> DW_AT_decl_column : (data1) 55\n <1302> DW_AT_type : (ref_addr) <0x3f>, int\n <1306> DW_AT_location : (exprloc) 3 byte block: 91 d4 7e \t(DW_OP_fbreg: -172)\n <3><130a>: Abbrev Number: 0\n <2><130b>: Abbrev Number: 0\n@@ -2770,15 +2770,15 @@\n <1310> DW_AT_type : (ref_udata) <0x5da>, option\n <1312> DW_AT_sibling : (ref_udata) <0x131b>\n <2><1314>: Abbrev Number: 31 (DW_TAG_subrange_type)\n <1315> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <1319> DW_AT_upper_bound : (data1) 32\n <2><131a>: Abbrev Number: 0\n <1><131b>: Abbrev Number: 41 (DW_TAG_subprogram)\n- <131c> DW_AT_name : (strp) (offset: 0xb98): parse_interval\n+ <131c> DW_AT_name : (strp) (offset: 0xb9a): parse_interval\n <1320> DW_AT_decl_file : (implicit_const) 1\n <1320> DW_AT_decl_line : (data1) 198\n <1321> DW_AT_decl_column : (data1) 12\n <1322> DW_AT_prototyped : (flag_present) 1\n <1322> DW_AT_type : (ref_addr) <0x3f>, int\n <1326> DW_AT_low_pc : (addr) 0x1710\n <132a> DW_AT_high_pc : (udata) 312\n@@ -2810,26 +2810,26 @@\n <1355> DW_AT_name : (string) max\n <1359> DW_AT_decl_file : (implicit_const) 1\n <1359> DW_AT_decl_line : (data1) 199\n <135a> DW_AT_decl_column : (data1) 12\n <135b> DW_AT_type : (ref_addr) <0x3f>, int\n <135f> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><1362>: Abbrev Number: 11 (DW_TAG_variable)\n- <1363> DW_AT_name : (strp) (offset: 0x354): upper\n+ <1363> DW_AT_name : (strp) (offset: 0x356): upper\n <1367> DW_AT_decl_file : (implicit_const) 1\n <1367> DW_AT_decl_line : (data1) 200\n <1368> DW_AT_decl_column : (data1) 9\n <1369> DW_AT_type : (ref_addr) <0x78>\n <136d> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1370>: Abbrev Number: 0\n <1><1371>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <1372> DW_AT_byte_size : (implicit_const) 4\n <1372> DW_AT_type : (ref_udata) <0x6ff>, interval_struct\n <1><1374>: Abbrev Number: 41 (DW_TAG_subprogram)\n- <1375> DW_AT_name : (strp) (offset: 0x406): parse_width_height\n+ <1375> DW_AT_name : (strp) (offset: 0x408): parse_width_height\n <1379> DW_AT_decl_file : (implicit_const) 1\n <1379> DW_AT_decl_line : (data1) 150\n <137a> DW_AT_decl_column : (data1) 12\n <137b> DW_AT_prototyped : (flag_present) 1\n <137b> DW_AT_type : (ref_addr) <0x3f>, int\n <137f> DW_AT_low_pc : (addr) 0x15b4\n <1383> DW_AT_high_pc : (udata) 348\n@@ -2854,22 +2854,22 @@\n <13a0> DW_AT_name : (string) l\n <13a2> DW_AT_decl_file : (implicit_const) 1\n <13a2> DW_AT_decl_line : (data1) 152\n <13a3> DW_AT_decl_column : (data1) 10\n <13a4> DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <13a8> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><13ab>: Abbrev Number: 11 (DW_TAG_variable)\n- <13ac> DW_AT_name : (strp) (offset: 0xc2): width_string\n+ <13ac> DW_AT_name : (strp) (offset: 0xaa): width_string\n <13b0> DW_AT_decl_file : (implicit_const) 1\n <13b0> DW_AT_decl_line : (data1) 153\n <13b1> DW_AT_decl_column : (data1) 15\n <13b2> DW_AT_type : (ref_addr) <0x208>\n <13b6> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><13b9>: Abbrev Number: 11 (DW_TAG_variable)\n- <13ba> DW_AT_name : (strp) (offset: 0x6b0): height_string\n+ <13ba> DW_AT_name : (strp) (offset: 0x6b2): height_string\n <13be> DW_AT_decl_file : (implicit_const) 1\n <13be> DW_AT_decl_line : (data1) 154\n <13bf> DW_AT_decl_column : (data1) 9\n <13c0> DW_AT_type : (ref_addr) <0x78>\n <13c4> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><13c7>: Abbrev Number: 43 (DW_TAG_variable)\n <13c8> DW_AT_name : (string) w\n@@ -2886,15 +2886,15 @@\n <13d8> DW_AT_type : (ref_addr) <0x3f>, int\n <13dc> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><13df>: Abbrev Number: 0\n <1><13e0>: Abbrev Number: 17 (DW_TAG_pointer_type)\n <13e1> DW_AT_byte_size : (implicit_const) 4\n <13e1> DW_AT_type : (ref_udata) <0x6d4>, dimensions_struct\n <1><13e3>: Abbrev Number: 15 (DW_TAG_subprogram)\n- <13e4> DW_AT_name : (strp) (offset: 0x893): print_spaces\n+ <13e4> DW_AT_name : (strp) (offset: 0x895): print_spaces\n <13e8> DW_AT_decl_file : (data1) 1\n <13e9> DW_AT_decl_line : (data1) 141\n <13ea> DW_AT_decl_column : (data1) 13\n <13eb> DW_AT_prototyped : (flag_present) 1\n <13eb> DW_AT_low_pc : (addr) 0x1550\n <13ef> DW_AT_high_pc : (udata) 100\n <13f0> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n@@ -2919,34 +2919,34 @@\n <140f> DW_AT_decl_file : (implicit_const) 1\n <140f> DW_AT_decl_line : (data1) 143\n <1410> DW_AT_decl_column : (data1) 7\n <1411> DW_AT_type : (ref_addr) <0x3f>, int\n <1415> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><1418>: Abbrev Number: 0\n <1><1419>: Abbrev Number: 41 (DW_TAG_subprogram)\n- <141a> DW_AT_name : (strp) (offset: 0x773): scanline\n+ <141a> DW_AT_name : (strp) (offset: 0x775): scanline\n <141e> DW_AT_decl_file : (implicit_const) 1\n <141e> DW_AT_decl_line : (data1) 112\n <141f> DW_AT_decl_column : (data1) 21\n <1420> DW_AT_prototyped : (flag_present) 1\n <1420> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <1424> DW_AT_low_pc : (addr) 0x1430\n <1428> DW_AT_high_pc : (udata) 288\n <142a> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <142c> DW_AT_call_all_tail_calls: (flag_present) 1\n <142c> DW_AT_sibling : (ref_udata) <0x152a>\n <2><142e>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <142f> DW_AT_name : (strp) (offset: 0xda1): image\n+ <142f> DW_AT_name : (strp) (offset: 0xd99): image\n <1433> DW_AT_decl_file : (implicit_const) 1\n <1433> DW_AT_decl_line : (data1) 112\n <1434> DW_AT_decl_column : (data1) 43\n <1435> DW_AT_type : (ref_addr) <0x3f5>\n <1439> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2><143d>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <143e> DW_AT_name : (strp) (offset: 0x948): debug_image\n+ <143e> DW_AT_name : (strp) (offset: 0x94a): debug_image\n <1442> DW_AT_decl_file : (implicit_const) 1\n <1442> DW_AT_decl_line : (data1) 112\n <1443> DW_AT_decl_column : (data1) 63\n <1444> DW_AT_type : (ref_addr) <0x3f5>\n <1448> DW_AT_location : (exprloc) 3 byte block: 91 b8 7f \t(DW_OP_fbreg: -72)\n <2><144c>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <144d> DW_AT_name : (string) x\n@@ -2973,43 +2973,43 @@\n <1476> DW_AT_name : (string) dir\n <147a> DW_AT_decl_file : (implicit_const) 1\n <147a> DW_AT_decl_line : (data1) 113\n <147b> DW_AT_decl_column : (data1) 65\n <147c> DW_AT_type : (ref_addr) <0x3cb>, direction_t, direction_e\n <1480> DW_AT_location : (exprloc) 3 byte block: 91 a8 7f \t(DW_OP_fbreg: -88)\n <2><1484>: Abbrev Number: 9 (DW_TAG_formal_parameter)\n- <1485> DW_AT_name : (strp) (offset: 0xfe): d_color\n+ <1485> DW_AT_name : (strp) (offset: 0xe6): d_color\n <1489> DW_AT_decl_file : (implicit_const) 1\n <1489> DW_AT_decl_line : (data1) 114\n <148a> DW_AT_decl_column : (data1) 43\n <148b> DW_AT_type : (ref_udata) <0x6ad>, color_struct\n <148d> DW_AT_location : (exprloc) 3 byte block: 91 98 7f \t(DW_OP_fbreg: -104)\n <2><1491>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <1492> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <1492> DW_AT_name : (strp) (offset: 0xd07): thresh\n <1496> DW_AT_decl_file : (implicit_const) 1\n <1496> DW_AT_decl_line : (data1) 114\n <1497> DW_AT_decl_column : (data1) 59\n <1498> DW_AT_type : (ref_addr) <0x3f7>, double\n <149c> DW_AT_location : (exprloc) 3 byte block: 91 90 7f \t(DW_OP_fbreg: -112)\n <2><14a0>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <14a1> DW_AT_name : (string) lt\n <14a4> DW_AT_decl_file : (implicit_const) 1\n <14a4> DW_AT_decl_line : (data1) 115\n <14a5> DW_AT_decl_column : (data1) 42\n <14a6> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <14aa> DW_AT_location : (exprloc) 3 byte block: 91 8c 7f \t(DW_OP_fbreg: -116)\n <2><14ae>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <14af> DW_AT_name : (strp) (offset: 0x675): flags\n+ <14af> DW_AT_name : (strp) (offset: 0x677): flags\n <14b3> DW_AT_decl_file : (implicit_const) 1\n <14b3> DW_AT_decl_line : (data1) 115\n <14b4> DW_AT_decl_column : (data1) 59\n <14b5> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <14b9> DW_AT_location : (exprloc) 3 byte block: 91 88 7f \t(DW_OP_fbreg: -120)\n <2><14bd>: Abbrev Number: 11 (DW_TAG_variable)\n- <14be> DW_AT_name : (strp) (offset: 0x7cf): imlib_color\n+ <14be> DW_AT_name : (strp) (offset: 0x7d1): imlib_color\n <14c2> DW_AT_decl_file : (implicit_const) 1\n <14c2> DW_AT_decl_line : (data1) 117\n <14c3> DW_AT_decl_column : (data1) 15\n <14c4> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <14c8> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><14cb>: Abbrev Number: 43 (DW_TAG_variable)\n <14cc> DW_AT_name : (string) lum\n@@ -3050,121 +3050,121 @@\n <150e> DW_AT_name : (string) end\n <1512> DW_AT_decl_file : (implicit_const) 1\n <1512> DW_AT_decl_line : (data1) 118\n <1513> DW_AT_decl_column : (data1) 34\n <1514> DW_AT_type : (ref_addr) <0x3f>, int\n <1518> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><151b>: Abbrev Number: 11 (DW_TAG_variable)\n- <151c> DW_AT_name : (strp) (offset: 0x725): found_pixels\n+ <151c> DW_AT_name : (strp) (offset: 0x727): found_pixels\n <1520> DW_AT_decl_file : (implicit_const) 1\n <1520> DW_AT_decl_line : (data1) 119\n <1521> DW_AT_decl_column : (data1) 16\n <1522> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <1526> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><1529>: Abbrev Number: 0\n <1><152a>: Abbrev Number: 24 (DW_TAG_subprogram)\n- <152b> DW_AT_name : (strp) (offset: 0x456): tmp_imgfile\n+ <152b> DW_AT_name : (strp) (offset: 0x458): tmp_imgfile\n <152f> DW_AT_decl_file : (data1) 1\n <1530> DW_AT_decl_line : (data1) 53\n <1531> DW_AT_decl_column : (data1) 15\n <1532> DW_AT_prototyped : (flag_present) 1\n <1532> DW_AT_type : (ref_addr) <0x78>\n <1536> DW_AT_low_pc : (addr) 0x1240\n <153a> DW_AT_high_pc : (udata) 496\n <153c> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <153e> DW_AT_call_all_tail_calls: (flag_present) 1\n <2><153e>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <153f> DW_AT_name : (strp) (offset: 0x675): flags\n+ <153f> DW_AT_name : (strp) (offset: 0x677): flags\n <1543> DW_AT_decl_file : (implicit_const) 1\n <1543> DW_AT_decl_line : (data1) 53\n <1544> DW_AT_decl_column : (data1) 40\n <1545> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <1549> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><154c>: Abbrev Number: 43 (DW_TAG_variable)\n <154d> DW_AT_name : (string) dir\n <1551> DW_AT_decl_file : (implicit_const) 1\n <1551> DW_AT_decl_line : (data1) 55\n <1552> DW_AT_decl_column : (data1) 9\n <1553> DW_AT_type : (ref_addr) <0x78>\n <1557> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><155a>: Abbrev Number: 11 (DW_TAG_variable)\n- <155b> DW_AT_name : (strp) (offset: 0xdce): name\n+ <155b> DW_AT_name : (strp) (offset: 0xdc6): name\n <155f> DW_AT_decl_file : (implicit_const) 1\n <155f> DW_AT_decl_line : (data1) 56\n <1560> DW_AT_decl_column : (data1) 9\n <1561> DW_AT_type : (ref_addr) <0x78>\n <1565> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1568>: Abbrev Number: 11 (DW_TAG_variable)\n- <1569> DW_AT_name : (strp) (offset: 0x57d): pattern_len\n+ <1569> DW_AT_name : (strp) (offset: 0x57f): pattern_len\n <156d> DW_AT_decl_file : (implicit_const) 1\n <156d> DW_AT_decl_line : (data1) 57\n <156e> DW_AT_decl_column : (data1) 10\n <156f> DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <1573> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1576>: Abbrev Number: 11 (DW_TAG_variable)\n- <1577> DW_AT_name : (strp) (offset: 0x71e): handle\n+ <1577> DW_AT_name : (strp) (offset: 0x720): handle\n <157b> DW_AT_decl_file : (implicit_const) 1\n <157b> DW_AT_decl_line : (data1) 58\n <157c> DW_AT_decl_column : (data1) 7\n <157d> DW_AT_type : (ref_addr) <0x3f>, int\n <1581> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><1584>: Abbrev Number: 43 (DW_TAG_variable)\n <1585> DW_AT_name : (string) buf\n <1589> DW_AT_decl_file : (implicit_const) 1\n <1589> DW_AT_decl_line : (data1) 59\n <158a> DW_AT_decl_column : (data1) 17\n <158b> DW_AT_type : (ref_addr) <0x15>, unsigned char\n <158f> DW_AT_location : (exprloc) 2 byte block: 91 4f \t(DW_OP_fbreg: -49)\n <2><1592>: Abbrev Number: 30 (DW_TAG_variable)\n- <1593> DW_AT_name : (strp) (offset: 0x136): count\n+ <1593> DW_AT_name : (strp) (offset: 0x11e): count\n <1597> DW_AT_decl_file : (implicit_const) 1\n <1597> DW_AT_decl_line : (data1) 60\n <1598> DW_AT_decl_column : (data1) 11\n <1599> DW_AT_type : (ref_udata) <0x599>, ssize_t, __ssize_t, int\n <159a> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><159d>: Abbrev Number: 11 (DW_TAG_variable)\n- <159e> DW_AT_name : (strp) (offset: 0x21e): pat_suffix_len\n+ <159e> DW_AT_name : (strp) (offset: 0x206): pat_suffix_len\n <15a2> DW_AT_decl_file : (implicit_const) 1\n <15a2> DW_AT_decl_line : (data1) 61\n <15a3> DW_AT_decl_column : (data1) 10\n <15a4> DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <15a8> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><15ab>: Abbrev Number: 11 (DW_TAG_variable)\n- <15ac> DW_AT_name : (strp) (offset: 0x5cc): dir_len\n+ <15ac> DW_AT_name : (strp) (offset: 0x5ce): dir_len\n <15b0> DW_AT_decl_file : (implicit_const) 1\n <15b0> DW_AT_decl_line : (data1) 62\n <15b1> DW_AT_decl_column : (data1) 10\n <15b2> DW_AT_type : (ref_addr) <0x83>, size_t, unsigned int\n <15b6> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><15b9>: Abbrev Number: 0\n <1><15ba>: Abbrev Number: 0\n Compilation Unit @ offset 0x15bb:\n Length: 0x1473 (32-bit)\n Version: 5\n Unit Type: DW_UT_compile (1)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><15c7>: Abbrev Number: 23 (DW_TAG_compile_unit)\n- <15c8> DW_AT_producer : (strp) (offset: 0xa4d): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n+ <15c8> DW_AT_producer : (strp) (offset: 0xa4f): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n <15cc> DW_AT_language : (data1) 29\t(C11)\n- <15cd> DW_AT_name : (strp) (offset: 0xe2a): imgproc.c\n- <15d1> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <15cd> DW_AT_name : (strp) (offset: 0xe22): imgproc.c\n+ <15d1> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <15d5> DW_AT_low_pc : (addr) 0x88b0\n <15d9> DW_AT_high_pc : (udata) 10188\n <15db> DW_AT_stmt_list : (sec_offset) 0x1c89\n <1><15df>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <15e0> DW_AT_import : (ref_addr) <0x2be>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><15e4>: Abbrev Number: 36 (DW_TAG_const_type)\n <15e5> DW_AT_type : (ref_addr) <0x208>\n <1><15e9>: Abbrev Number: 55 (DW_TAG_base_type)\n <15ea> DW_AT_byte_size : (data1) 4\n <15eb> DW_AT_encoding : (data1) 4\t(float)\n- <15ec> DW_AT_name : (strp) (offset: 0xe1c): float\n+ <15ec> DW_AT_name : (strp) (offset: 0xe14): float\n <1><15f0>: Abbrev Number: 52 (DW_TAG_enumeration_type)\n- <15f1> DW_AT_name : (strp) (offset: 0xe22): fg_bg_e\n+ <15f1> DW_AT_name : (strp) (offset: 0xe1a): fg_bg_e\n <15f5> DW_AT_encoding : (implicit_const) 7\t(unsigned)\n <15f5> DW_AT_byte_size : (implicit_const) 4\n <15f5> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <15f9> DW_AT_decl_file : (implicit_const) 7\n <15f9> DW_AT_decl_line : (data1) 170\n <15fa> DW_AT_decl_column : (implicit_const) 14\n <15fa> DW_AT_sibling : (ref_udata) <0x1606>\n@@ -3172,87 +3172,87 @@\n <15fc> DW_AT_name : (string) FG\n <15ff> DW_AT_const_value : (data1) 0\n <2><1600>: Abbrev Number: 58 (DW_TAG_enumerator)\n <1601> DW_AT_name : (string) BG\n <1604> DW_AT_const_value : (data1) 1\n <2><1605>: Abbrev Number: 0\n <1><1606>: Abbrev Number: 39 (DW_TAG_typedef)\n- <1607> DW_AT_name : (strp) (offset: 0xe40): fg_bg_t\n+ <1607> DW_AT_name : (strp) (offset: 0xe38): fg_bg_t\n <160b> DW_AT_decl_file : (data1) 7\n <160c> DW_AT_decl_line : (data1) 173\n <160d> DW_AT_decl_column : (data1) 3\n <160e> DW_AT_type : (ref_udata) <0x15f0>, fg_bg_e\n <1><160f>: Abbrev Number: 38 (DW_TAG_variable)\n- <1610> DW_AT_name : (strp) (offset: 0x793): ssocr_foreground\n+ <1610> DW_AT_name : (strp) (offset: 0x795): ssocr_foreground\n <1614> DW_AT_decl_file : (data1) 1\n <1615> DW_AT_decl_line : (data1) 39\n <1616> DW_AT_decl_column : (data1) 12\n <1617> DW_AT_type : (ref_addr) <0x3f>, int\n <161b> DW_AT_external : (flag_present) 1\n <161b> DW_AT_declaration : (flag_present) 1\n <1><161b>: Abbrev Number: 38 (DW_TAG_variable)\n- <161c> DW_AT_name : (strp) (offset: 0x8aa): ssocr_background\n+ <161c> DW_AT_name : (strp) (offset: 0x8ac): ssocr_background\n <1620> DW_AT_decl_file : (data1) 1\n <1621> DW_AT_decl_line : (data1) 40\n <1622> DW_AT_decl_column : (data1) 12\n <1623> DW_AT_type : (ref_addr) <0x3f>, int\n <1627> DW_AT_external : (flag_present) 1\n <1627> DW_AT_declaration : (flag_present) 1\n <1><1627>: Abbrev Number: 47 (DW_TAG_subprogram)\n <1628> DW_AT_external : (flag_present) 1\n- <1628> DW_AT_name : (strp) (offset: 0xd5a): print_lum_help\n+ <1628> DW_AT_name : (strp) (offset: 0xd52): print_lum_help\n <162c> DW_AT_decl_file : (data1) 12\n <162d> DW_AT_decl_line : (data1) 29\n <162e> DW_AT_decl_column : (data1) 6\n <162f> DW_AT_prototyped : (flag_present) 1\n <162f> DW_AT_declaration : (flag_present) 1\n <1><162f>: Abbrev Number: 50 (DW_TAG_subprogram)\n <1630> DW_AT_external : (flag_present) 1\n- <1630> DW_AT_name : (strp) (offset: 0xe48): imlib_save_image_with_error_return\n+ <1630> DW_AT_name : (strp) (offset: 0xe4a): imlib_save_image_with_error_return\n <1634> DW_AT_decl_file : (implicit_const) 4\n <1634> DW_AT_decl_line : (data2) 2963\n <1636> DW_AT_decl_column : (implicit_const) 21\n <1636> DW_AT_prototyped : (flag_present) 1\n <1636> DW_AT_declaration : (flag_present) 1\n <1636> DW_AT_sibling : (ref_udata) <0x1643>\n <2><1638>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <1639> DW_AT_type : (ref_addr) <0x208>\n <2><163d>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <163e> DW_AT_type : (ref_addr) <0x41b>\n <2><1642>: Abbrev Number: 0\n <1><1643>: Abbrev Number: 50 (DW_TAG_subprogram)\n <1644> DW_AT_external : (flag_present) 1\n- <1644> DW_AT_name : (strp) (offset: 0xd43): imlib_image_set_format\n+ <1644> DW_AT_name : (strp) (offset: 0xd3b): imlib_image_set_format\n <1648> DW_AT_decl_file : (implicit_const) 4\n <1648> DW_AT_decl_line : (data2) 979\n <164a> DW_AT_decl_column : (implicit_const) 21\n <164a> DW_AT_prototyped : (flag_present) 1\n <164a> DW_AT_declaration : (flag_present) 1\n <164a> DW_AT_sibling : (ref_udata) <0x1652>\n <2><164c>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <164d> DW_AT_type : (ref_addr) <0x208>\n <2><1651>: Abbrev Number: 0\n <1><1652>: Abbrev Number: 25 (DW_TAG_subprogram)\n <1653> DW_AT_external : (flag_present) 1\n- <1653> DW_AT_name : (strp) (offset: 0xe09): strrchr\n+ <1653> DW_AT_name : (strp) (offset: 0xe01): strrchr\n <1657> DW_AT_decl_file : (data1) 10\n <1658> DW_AT_decl_line : (data2) 273\n <165a> DW_AT_decl_column : (data1) 14\n <165b> DW_AT_prototyped : (flag_present) 1\n <165b> DW_AT_type : (ref_addr) <0x78>\n <165f> DW_AT_declaration : (flag_present) 1\n <165f> DW_AT_sibling : (ref_udata) <0x166c>\n <2><1661>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <1662> DW_AT_type : (ref_addr) <0x208>\n <2><1666>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <1667> DW_AT_type : (ref_addr) <0x3f>, int\n <2><166b>: Abbrev Number: 0\n <1><166c>: Abbrev Number: 25 (DW_TAG_subprogram)\n <166d> DW_AT_external : (flag_present) 1\n- <166d> DW_AT_name : (strp) (offset: 0xd8c): imlib_create_cropped_image\n+ <166d> DW_AT_name : (strp) (offset: 0xd84): imlib_create_cropped_image\n <1671> DW_AT_decl_file : (data1) 4\n <1672> DW_AT_decl_line : (data2) 1245\n <1674> DW_AT_decl_column : (data1) 21\n <1675> DW_AT_prototyped : (flag_present) 1\n <1675> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1679> DW_AT_declaration : (flag_present) 1\n <1679> DW_AT_sibling : (ref_udata) <0x1690>\n@@ -3289,162 +3289,162 @@\n <16ac> DW_AT_declaration : (flag_present) 1\n <16ac> DW_AT_sibling : (ref_udata) <0x16b4>\n <2><16ae>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <16af> DW_AT_type : (ref_addr) <0x3f7>, double\n <2><16b3>: Abbrev Number: 0\n <1><16b4>: Abbrev Number: 59 (DW_TAG_subprogram)\n <16b5> DW_AT_external : (flag_present) 1\n- <16b5> DW_AT_name : (strp) (offset: 0xc75): imlib_clone_image\n+ <16b5> DW_AT_name : (strp) (offset: 0xc77): imlib_clone_image\n <16b9> DW_AT_decl_file : (implicit_const) 4\n <16b9> DW_AT_decl_line : (data2) 1230\n <16bb> DW_AT_decl_column : (implicit_const) 21\n <16bb> DW_AT_prototyped : (flag_present) 1\n <16bb> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <16bf> DW_AT_declaration : (flag_present) 1\n <1><16bf>: Abbrev Number: 59 (DW_TAG_subprogram)\n <16c0> DW_AT_external : (flag_present) 1\n- <16c0> DW_AT_name : (strp) (offset: 0xd69): imlib_context_get_image\n+ <16c0> DW_AT_name : (strp) (offset: 0xd61): imlib_context_get_image\n <16c4> DW_AT_decl_file : (implicit_const) 4\n <16c4> DW_AT_decl_line : (data2) 636\n <16c6> DW_AT_decl_column : (implicit_const) 21\n <16c6> DW_AT_prototyped : (flag_present) 1\n <16c6> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <16ca> DW_AT_declaration : (flag_present) 1\n <1><16ca>: Abbrev Number: 60 (DW_TAG_subprogram)\n <16cb> DW_AT_external : (flag_present) 1\n- <16cb> DW_AT_name : (strp) (offset: 0x443): report_imlib_error\n+ <16cb> DW_AT_name : (strp) (offset: 0x445): report_imlib_error\n <16cf> DW_AT_decl_file : (implicit_const) 1\n <16cf> DW_AT_decl_line : (data2) 1134\n <16d1> DW_AT_decl_column : (implicit_const) 6\n <16d1> DW_AT_prototyped : (flag_present) 1\n <16d1> DW_AT_low_pc : (addr) 0xae48\n <16d5> DW_AT_high_pc : (udata) 564\n <16d7> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <16d9> DW_AT_call_all_tail_calls: (flag_present) 1\n <16d9> DW_AT_sibling : (ref_udata) <0x16eb>\n <2><16db>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <16dc> DW_AT_name : (strp) (offset: 0x450): error\n+ <16dc> DW_AT_name : (strp) (offset: 0x452): error\n <16e0> DW_AT_decl_file : (implicit_const) 1\n <16e0> DW_AT_decl_line : (data2) 1134\n <16e2> DW_AT_decl_column : (data1) 42\n <16e3> DW_AT_type : (ref_addr) <0x3a7>, Imlib_Load_Error, unsigned int\n <16e7> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><16ea>: Abbrev Number: 0\n <1><16eb>: Abbrev Number: 51 (DW_TAG_subprogram)\n <16ec> DW_AT_external : (flag_present) 1\n- <16ec> DW_AT_name : (strp) (offset: 0x162): parse_lum\n+ <16ec> DW_AT_name : (strp) (offset: 0x14a): parse_lum\n <16f0> DW_AT_decl_file : (implicit_const) 1\n <16f0> DW_AT_decl_line : (data2) 1107\n <16f2> DW_AT_decl_column : (data1) 13\n <16f3> DW_AT_prototyped : (flag_present) 1\n <16f3> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <16f7> DW_AT_low_pc : (addr) 0xad10\n <16fb> DW_AT_high_pc : (udata) 312\n <16fd> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <16ff> DW_AT_call_all_tail_calls: (flag_present) 1\n <16ff> DW_AT_sibling : (ref_udata) <0x1711>\n <2><1701>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1702> DW_AT_name : (strp) (offset: 0xe77): keyword\n+ <1702> DW_AT_name : (strp) (offset: 0xe79): keyword\n <1706> DW_AT_decl_file : (implicit_const) 1\n <1706> DW_AT_decl_line : (data2) 1107\n <1708> DW_AT_decl_column : (data1) 29\n <1709> DW_AT_type : (ref_addr) <0x78>\n <170d> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><1710>: Abbrev Number: 0\n <1><1711>: Abbrev Number: 60 (DW_TAG_subprogram)\n <1712> DW_AT_external : (flag_present) 1\n- <1712> DW_AT_name : (strp) (offset: 0x3c4): save_image\n+ <1712> DW_AT_name : (strp) (offset: 0x3c6): save_image\n <1716> DW_AT_decl_file : (implicit_const) 1\n <1716> DW_AT_decl_line : (data2) 1064\n <1718> DW_AT_decl_column : (implicit_const) 6\n <1718> DW_AT_prototyped : (flag_present) 1\n <1718> DW_AT_low_pc : (addr) 0xaba0\n <171c> DW_AT_high_pc : (udata) 368\n <171e> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1720> DW_AT_call_all_tail_calls: (flag_present) 1\n <1720> DW_AT_sibling : (ref_udata) <0x17a7>\n <2><1722>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1723> DW_AT_name : (strp) (offset: 0xdf4): image_type\n+ <1723> DW_AT_name : (strp) (offset: 0xdec): image_type\n <1727> DW_AT_decl_file : (implicit_const) 1\n <1727> DW_AT_decl_line : (data2) 1064\n <1729> DW_AT_decl_column : (data1) 29\n <172a> DW_AT_type : (ref_addr) <0x208>\n <172e> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1731>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1732> DW_AT_name : (strp) (offset: 0xda1): image\n+ <1732> DW_AT_name : (strp) (offset: 0xd99): image\n <1736> DW_AT_decl_file : (implicit_const) 1\n <1736> DW_AT_decl_line : (data2) 1064\n <1738> DW_AT_decl_column : (data1) 54\n <1739> DW_AT_type : (ref_addr) <0x3f5>\n <173d> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1740>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <1741> DW_AT_name : (string) fmt\n <1745> DW_AT_decl_file : (implicit_const) 1\n <1745> DW_AT_decl_line : (data2) 1064\n <1747> DW_AT_decl_column : (data1) 73\n <1748> DW_AT_type : (ref_addr) <0x208>\n <174c> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><174f>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1750> DW_AT_name : (strp) (offset: 0xdca): filename\n+ <1750> DW_AT_name : (strp) (offset: 0xdc2): filename\n <1754> DW_AT_decl_file : (implicit_const) 1\n <1754> DW_AT_decl_line : (data2) 1065\n <1756> DW_AT_decl_column : (data1) 29\n <1757> DW_AT_type : (ref_addr) <0x208>\n <175b> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><175e>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <175f> DW_AT_name : (strp) (offset: 0x675): flags\n+ <175f> DW_AT_name : (strp) (offset: 0x677): flags\n <1763> DW_AT_decl_file : (implicit_const) 1\n <1763> DW_AT_decl_line : (data2) 1065\n <1765> DW_AT_decl_column : (data1) 52\n <1766> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <176a> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><176d>: Abbrev Number: 12 (DW_TAG_variable)\n <176e> DW_AT_name : (string) tmp\n <1772> DW_AT_decl_file : (implicit_const) 1\n <1772> DW_AT_decl_line : (data2) 1067\n <1774> DW_AT_decl_column : (data1) 15\n <1775> DW_AT_type : (ref_addr) <0x208>\n <1779> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><177c>: Abbrev Number: 19 (DW_TAG_variable)\n- <177d> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <177d> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1781> DW_AT_decl_file : (implicit_const) 1\n <1781> DW_AT_decl_line : (data2) 1068\n <1783> DW_AT_decl_column : (data1) 16\n <1784> DW_AT_type : (ref_addr) <0x3f5>\n <1788> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><178b>: Abbrev Number: 19 (DW_TAG_variable)\n- <178c> DW_AT_name : (strp) (offset: 0xda7): save_error\n+ <178c> DW_AT_name : (strp) (offset: 0xd9f): save_error\n <1790> DW_AT_decl_file : (implicit_const) 1\n <1790> DW_AT_decl_line : (data2) 1069\n <1792> DW_AT_decl_column : (data1) 20\n <1793> DW_AT_type : (ref_addr) <0x3a7>, Imlib_Load_Error, unsigned int\n <1797> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><179a>: Abbrev Number: 40 (DW_TAG_variable)\n- <179b> DW_AT_name : (strp) (offset: 0xed0): stdout_file\n+ <179b> DW_AT_name : (strp) (offset: 0xed2): stdout_file\n <179f> DW_AT_decl_file : (implicit_const) 1\n <179f> DW_AT_decl_line : (data2) 1070\n <17a1> DW_AT_decl_column : (data1) 21\n <17a2> DW_AT_type : (ref_udata) <0x15e4>\n <17a3> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><17a6>: Abbrev Number: 0\n <1><17a7>: Abbrev Number: 51 (DW_TAG_subprogram)\n <17a8> DW_AT_external : (flag_present) 1\n- <17a8> DW_AT_name : (strp) (offset: 0xc87): clip\n+ <17a8> DW_AT_name : (strp) (offset: 0xc89): clip\n <17ac> DW_AT_decl_file : (implicit_const) 1\n <17ac> DW_AT_decl_line : (data2) 1058\n <17ae> DW_AT_decl_column : (data1) 5\n <17af> DW_AT_prototyped : (flag_present) 1\n <17af> DW_AT_type : (ref_addr) <0x3f>, int\n <17b3> DW_AT_low_pc : (addr) 0xab40\n <17b7> DW_AT_high_pc : (udata) 96\n <17b8> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <17ba> DW_AT_call_all_tail_calls: (flag_present) 1\n <17ba> DW_AT_sibling : (ref_udata) <0x17ea>\n <2><17bc>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <17bd> DW_AT_name : (strp) (offset: 0xcfb): value\n+ <17bd> DW_AT_name : (strp) (offset: 0xcfd): value\n <17c1> DW_AT_decl_file : (implicit_const) 1\n <17c1> DW_AT_decl_line : (data2) 1058\n <17c3> DW_AT_decl_column : (data1) 14\n <17c4> DW_AT_type : (ref_addr) <0x3f>, int\n <17c8> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><17cb>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <17cc> DW_AT_name : (string) min\n@@ -3459,195 +3459,195 @@\n <17df> DW_AT_decl_line : (data2) 1058\n <17e1> DW_AT_decl_column : (data1) 34\n <17e2> DW_AT_type : (ref_addr) <0x3f>, int\n <17e6> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><17e9>: Abbrev Number: 0\n <1><17ea>: Abbrev Number: 51 (DW_TAG_subprogram)\n <17eb> DW_AT_external : (flag_present) 1\n- <17eb> DW_AT_name : (strp) (offset: 0xec3): get_lum_blue\n+ <17eb> DW_AT_name : (strp) (offset: 0xec5): get_lum_blue\n <17ef> DW_AT_decl_file : (implicit_const) 1\n <17ef> DW_AT_decl_line : (data2) 1052\n <17f1> DW_AT_decl_column : (data1) 5\n <17f2> DW_AT_prototyped : (flag_present) 1\n <17f2> DW_AT_type : (ref_addr) <0x3f>, int\n <17f6> DW_AT_low_pc : (addr) 0xaaf8\n <17fa> DW_AT_high_pc : (udata) 72\n <17fb> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <17fd> DW_AT_call_all_tail_calls: (flag_present) 1\n <17fd> DW_AT_sibling : (ref_udata) <0x180f>\n <2><17ff>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1800> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1800> DW_AT_name : (strp) (offset: 0x7d7): color\n <1804> DW_AT_decl_file : (implicit_const) 1\n <1804> DW_AT_decl_line : (data2) 1052\n <1806> DW_AT_decl_column : (data1) 31\n <1807> DW_AT_type : (ref_addr) <0x49a>\n <180b> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><180e>: Abbrev Number: 0\n <1><180f>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1810> DW_AT_external : (flag_present) 1\n- <1810> DW_AT_name : (strp) (offset: 0xea5): get_lum_green\n+ <1810> DW_AT_name : (strp) (offset: 0xea7): get_lum_green\n <1814> DW_AT_decl_file : (implicit_const) 1\n <1814> DW_AT_decl_line : (data2) 1046\n <1816> DW_AT_decl_column : (data1) 5\n <1817> DW_AT_prototyped : (flag_present) 1\n <1817> DW_AT_type : (ref_addr) <0x3f>, int\n <181b> DW_AT_low_pc : (addr) 0xaab0\n <181f> DW_AT_high_pc : (udata) 72\n <1820> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1822> DW_AT_call_all_tail_calls: (flag_present) 1\n <1822> DW_AT_sibling : (ref_udata) <0x1834>\n <2><1824>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1825> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1825> DW_AT_name : (strp) (offset: 0x7d7): color\n <1829> DW_AT_decl_file : (implicit_const) 1\n <1829> DW_AT_decl_line : (data2) 1046\n <182b> DW_AT_decl_column : (data1) 32\n <182c> DW_AT_type : (ref_addr) <0x49a>\n <1830> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><1833>: Abbrev Number: 0\n <1><1834>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1835> DW_AT_external : (flag_present) 1\n- <1835> DW_AT_name : (strp) (offset: 0xe6b): get_lum_red\n+ <1835> DW_AT_name : (strp) (offset: 0xe6d): get_lum_red\n <1839> DW_AT_decl_file : (implicit_const) 1\n <1839> DW_AT_decl_line : (data2) 1040\n <183b> DW_AT_decl_column : (data1) 5\n <183c> DW_AT_prototyped : (flag_present) 1\n <183c> DW_AT_type : (ref_addr) <0x3f>, int\n <1840> DW_AT_low_pc : (addr) 0xaa68\n <1844> DW_AT_high_pc : (udata) 72\n <1845> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1847> DW_AT_call_all_tail_calls: (flag_present) 1\n <1847> DW_AT_sibling : (ref_udata) <0x1859>\n <2><1849>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <184a> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <184a> DW_AT_name : (strp) (offset: 0x7d7): color\n <184e> DW_AT_decl_file : (implicit_const) 1\n <184e> DW_AT_decl_line : (data2) 1040\n <1850> DW_AT_decl_column : (data1) 30\n <1851> DW_AT_type : (ref_addr) <0x49a>\n <1855> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><1858>: Abbrev Number: 0\n <1><1859>: Abbrev Number: 51 (DW_TAG_subprogram)\n <185a> DW_AT_external : (flag_present) 1\n- <185a> DW_AT_name : (strp) (offset: 0xe34): get_lum_max\n+ <185a> DW_AT_name : (strp) (offset: 0xe2c): get_lum_max\n <185e> DW_AT_decl_file : (implicit_const) 1\n <185e> DW_AT_decl_line : (data2) 1032\n <1860> DW_AT_decl_column : (data1) 5\n <1861> DW_AT_prototyped : (flag_present) 1\n <1861> DW_AT_type : (ref_addr) <0x3f>, int\n <1865> DW_AT_low_pc : (addr) 0xa9f8\n <1869> DW_AT_high_pc : (udata) 112\n <186a> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <186c> DW_AT_call_all_tail_calls: (flag_present) 1\n <186c> DW_AT_sibling : (ref_udata) <0x187e>\n <2><186e>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <186f> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <186f> DW_AT_name : (strp) (offset: 0x7d7): color\n <1873> DW_AT_decl_file : (implicit_const) 1\n <1873> DW_AT_decl_line : (data2) 1032\n <1875> DW_AT_decl_column : (data1) 30\n <1876> DW_AT_type : (ref_addr) <0x49a>\n <187a> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><187d>: Abbrev Number: 0\n <1><187e>: Abbrev Number: 51 (DW_TAG_subprogram)\n <187f> DW_AT_external : (flag_present) 1\n- <187f> DW_AT_name : (strp) (offset: 0xcb9): get_lum_min\n+ <187f> DW_AT_name : (strp) (offset: 0xcbb): get_lum_min\n <1883> DW_AT_decl_file : (implicit_const) 1\n <1883> DW_AT_decl_line : (data2) 1024\n <1885> DW_AT_decl_column : (data1) 5\n <1886> DW_AT_prototyped : (flag_present) 1\n <1886> DW_AT_type : (ref_addr) <0x3f>, int\n <188a> DW_AT_low_pc : (addr) 0xa988\n <188e> DW_AT_high_pc : (udata) 112\n <188f> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1891> DW_AT_call_all_tail_calls: (flag_present) 1\n <1891> DW_AT_sibling : (ref_udata) <0x18a3>\n <2><1893>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1894> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1894> DW_AT_name : (strp) (offset: 0x7d7): color\n <1898> DW_AT_decl_file : (implicit_const) 1\n <1898> DW_AT_decl_line : (data2) 1024\n <189a> DW_AT_decl_column : (data1) 30\n <189b> DW_AT_type : (ref_addr) <0x49a>\n <189f> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><18a2>: Abbrev Number: 0\n <1><18a3>: Abbrev Number: 51 (DW_TAG_subprogram)\n <18a4> DW_AT_external : (flag_present) 1\n- <18a4> DW_AT_name : (strp) (offset: 0xd37): get_lum_lin\n+ <18a4> DW_AT_name : (strp) (offset: 0xd2f): get_lum_lin\n <18a8> DW_AT_decl_file : (implicit_const) 1\n <18a8> DW_AT_decl_line : (data2) 1018\n <18aa> DW_AT_decl_column : (data1) 5\n <18ab> DW_AT_prototyped : (flag_present) 1\n <18ab> DW_AT_type : (ref_addr) <0x3f>, int\n <18af> DW_AT_low_pc : (addr) 0xa924\n <18b3> DW_AT_high_pc : (udata) 100\n <18b4> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <18b6> DW_AT_call_all_tail_calls: (flag_present) 1\n <18b6> DW_AT_sibling : (ref_udata) <0x18c8>\n <2><18b8>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <18b9> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <18b9> DW_AT_name : (strp) (offset: 0x7d7): color\n <18bd> DW_AT_decl_file : (implicit_const) 1\n <18bd> DW_AT_decl_line : (data2) 1018\n <18bf> DW_AT_decl_column : (data1) 30\n <18c0> DW_AT_type : (ref_addr) <0x49a>\n <18c4> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><18c7>: Abbrev Number: 0\n <1><18c8>: Abbrev Number: 51 (DW_TAG_subprogram)\n <18c9> DW_AT_external : (flag_present) 1\n- <18c9> DW_AT_name : (strp) (offset: 0xd18): get_lum_601\n+ <18c9> DW_AT_name : (strp) (offset: 0xd1a): get_lum_601\n <18cd> DW_AT_decl_file : (implicit_const) 1\n <18cd> DW_AT_decl_line : (data2) 1012\n <18cf> DW_AT_decl_column : (data1) 5\n <18d0> DW_AT_prototyped : (flag_present) 1\n <18d0> DW_AT_type : (ref_addr) <0x3f>, int\n <18d4> DW_AT_low_pc : (addr) 0xa87c\n <18d8> DW_AT_high_pc : (udata) 168\n <18da> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <18dc> DW_AT_call_all_tail_calls: (flag_present) 1\n <18dc> DW_AT_sibling : (ref_udata) <0x18ee>\n <2><18de>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <18df> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <18df> DW_AT_name : (strp) (offset: 0x7d7): color\n <18e3> DW_AT_decl_file : (implicit_const) 1\n <18e3> DW_AT_decl_line : (data2) 1012\n <18e5> DW_AT_decl_column : (data1) 30\n <18e6> DW_AT_type : (ref_addr) <0x49a>\n <18ea> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><18ed>: Abbrev Number: 0\n <1><18ee>: Abbrev Number: 51 (DW_TAG_subprogram)\n <18ef> DW_AT_external : (flag_present) 1\n- <18ef> DW_AT_name : (strp) (offset: 0xd0c): get_lum_709\n+ <18ef> DW_AT_name : (strp) (offset: 0xd0e): get_lum_709\n <18f3> DW_AT_decl_file : (implicit_const) 1\n <18f3> DW_AT_decl_line : (data2) 1006\n <18f5> DW_AT_decl_column : (data1) 5\n <18f6> DW_AT_prototyped : (flag_present) 1\n <18f6> DW_AT_type : (ref_addr) <0x3f>, int\n <18fa> DW_AT_low_pc : (addr) 0xa7d0\n <18fe> DW_AT_high_pc : (udata) 172\n <1900> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1902> DW_AT_call_all_tail_calls: (flag_present) 1\n <1902> DW_AT_sibling : (ref_udata) <0x1914>\n <2><1904>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1905> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1905> DW_AT_name : (strp) (offset: 0x7d7): color\n <1909> DW_AT_decl_file : (implicit_const) 1\n <1909> DW_AT_decl_line : (data2) 1006\n <190b> DW_AT_decl_column : (data1) 30\n <190c> DW_AT_type : (ref_addr) <0x49a>\n <1910> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><1913>: Abbrev Number: 0\n <1><1914>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1915> DW_AT_external : (flag_present) 1\n- <1915> DW_AT_name : (strp) (offset: 0x9f): get_lum\n+ <1915> DW_AT_name : (strp) (offset: 0x87): get_lum\n <1919> DW_AT_decl_file : (implicit_const) 1\n <1919> DW_AT_decl_line : (data2) 987\n <191b> DW_AT_decl_column : (data1) 5\n <191c> DW_AT_prototyped : (flag_present) 1\n <191c> DW_AT_type : (ref_addr) <0x3f>, int\n <1920> DW_AT_low_pc : (addr) 0xa6d8\n <1924> DW_AT_high_pc : (udata) 248\n <1926> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1928> DW_AT_call_all_tail_calls: (flag_present) 1\n <1928> DW_AT_sibling : (ref_udata) <0x1948>\n <2><192a>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <192b> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <192b> DW_AT_name : (strp) (offset: 0x7d7): color\n <192f> DW_AT_decl_file : (implicit_const) 1\n <192f> DW_AT_decl_line : (data2) 987\n <1931> DW_AT_decl_column : (data1) 26\n <1932> DW_AT_type : (ref_addr) <0x49a>\n <1936> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><1939>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <193a> DW_AT_name : (string) lt\n@@ -3655,27 +3655,27 @@\n <193d> DW_AT_decl_line : (data2) 987\n <193f> DW_AT_decl_column : (data1) 45\n <1940> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <1944> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><1947>: Abbrev Number: 0\n <1><1948>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1949> DW_AT_external : (flag_present) 1\n- <1949> DW_AT_name : (strp) (offset: 0x876): crop\n+ <1949> DW_AT_name : (strp) (offset: 0x878): crop\n <194d> DW_AT_decl_file : (implicit_const) 1\n <194d> DW_AT_decl_line : (data2) 953\n <194f> DW_AT_decl_column : (data1) 13\n <1950> DW_AT_prototyped : (flag_present) 1\n <1950> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1954> DW_AT_low_pc : (addr) 0xa5f4\n <1958> DW_AT_high_pc : (udata) 228\n <195a> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <195c> DW_AT_call_all_tail_calls: (flag_present) 1\n <195c> DW_AT_sibling : (ref_udata) <0x19de>\n <2><195e>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <195f> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <195f> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1963> DW_AT_decl_file : (implicit_const) 1\n <1963> DW_AT_decl_line : (data2) 953\n <1965> DW_AT_decl_column : (data1) 31\n <1966> DW_AT_type : (ref_addr) <0x3f5>\n <196a> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><196d>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <196e> DW_AT_name : (string) x\n@@ -3702,99 +3702,99 @@\n <1995> DW_AT_name : (string) h\n <1997> DW_AT_decl_file : (implicit_const) 1\n <1997> DW_AT_decl_line : (data2) 953\n <1999> DW_AT_decl_column : (data1) 70\n <199a> DW_AT_type : (ref_addr) <0x3f>, int\n <199e> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><19a1>: Abbrev Number: 19 (DW_TAG_variable)\n- <19a2> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <19a2> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <19a6> DW_AT_decl_file : (implicit_const) 1\n <19a6> DW_AT_decl_line : (data2) 955\n <19a8> DW_AT_decl_column : (data1) 15\n <19a9> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <19ad> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><19b0>: Abbrev Number: 19 (DW_TAG_variable)\n- <19b1> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <19b1> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <19b5> DW_AT_decl_file : (implicit_const) 1\n <19b5> DW_AT_decl_line : (data2) 956\n <19b7> DW_AT_decl_column : (data1) 15\n <19b8> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <19bc> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><19bf>: Abbrev Number: 19 (DW_TAG_variable)\n- <19c0> DW_AT_name : (strp) (offset: 0xad9): width\n+ <19c0> DW_AT_name : (strp) (offset: 0xadb): width\n <19c4> DW_AT_decl_file : (implicit_const) 1\n <19c4> DW_AT_decl_line : (data2) 957\n <19c6> DW_AT_decl_column : (data1) 7\n <19c7> DW_AT_type : (ref_addr) <0x3f>, int\n <19cb> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><19ce>: Abbrev Number: 19 (DW_TAG_variable)\n- <19cf> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <19cf> DW_AT_name : (strp) (offset: 0x9d6): height\n <19d3> DW_AT_decl_file : (implicit_const) 1\n <19d3> DW_AT_decl_line : (data2) 957\n <19d5> DW_AT_decl_column : (data1) 14\n <19d6> DW_AT_type : (ref_addr) <0x3f>, int\n <19da> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><19dd>: Abbrev Number: 0\n <1><19de>: Abbrev Number: 51 (DW_TAG_subprogram)\n <19df> DW_AT_external : (flag_present) 1\n- <19df> DW_AT_name : (strp) (offset: 0x7db): invert\n+ <19df> DW_AT_name : (strp) (offset: 0x7dd): invert\n <19e3> DW_AT_decl_file : (implicit_const) 1\n <19e3> DW_AT_decl_line : (data2) 914\n <19e5> DW_AT_decl_column : (data1) 13\n <19e6> DW_AT_prototyped : (flag_present) 1\n <19e6> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <19ea> DW_AT_low_pc : (addr) 0xa514\n <19ee> DW_AT_high_pc : (udata) 224\n <19f0> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <19f2> DW_AT_call_all_tail_calls: (flag_present) 1\n <19f2> DW_AT_sibling : (ref_udata) <0x1a96>\n <2><19f4>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <19f5> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <19f5> DW_AT_name : (strp) (offset: 0xe81): source_image\n <19f9> DW_AT_decl_file : (implicit_const) 1\n <19f9> DW_AT_decl_line : (data2) 914\n <19fb> DW_AT_decl_column : (data1) 33\n <19fc> DW_AT_type : (ref_addr) <0x3f5>\n <1a00> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1a03>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1a04> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <1a04> DW_AT_name : (strp) (offset: 0xd07): thresh\n <1a08> DW_AT_decl_file : (implicit_const) 1\n <1a08> DW_AT_decl_line : (data2) 914\n <1a0a> DW_AT_decl_column : (data1) 54\n <1a0b> DW_AT_type : (ref_addr) <0x3f7>, double\n <1a0f> DW_AT_location : (exprloc) 3 byte block: 91 b8 7f \t(DW_OP_fbreg: -72)\n <2><1a13>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <1a14> DW_AT_name : (string) lt\n <1a17> DW_AT_decl_file : (implicit_const) 1\n <1a17> DW_AT_decl_line : (data2) 914\n <1a19> DW_AT_decl_column : (data1) 74\n <1a1a> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <1a1e> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><1a21>: Abbrev Number: 19 (DW_TAG_variable)\n- <1a22> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <1a22> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <1a26> DW_AT_decl_file : (implicit_const) 1\n <1a26> DW_AT_decl_line : (data2) 916\n <1a28> DW_AT_decl_column : (data1) 15\n <1a29> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1a2d> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><1a30>: Abbrev Number: 19 (DW_TAG_variable)\n- <1a31> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1a31> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1a35> DW_AT_decl_file : (implicit_const) 1\n <1a35> DW_AT_decl_line : (data2) 917\n <1a37> DW_AT_decl_column : (data1) 15\n <1a38> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1a3c> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1a3f>: Abbrev Number: 19 (DW_TAG_variable)\n- <1a40> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1a40> DW_AT_name : (strp) (offset: 0x9d6): height\n <1a44> DW_AT_decl_file : (implicit_const) 1\n <1a44> DW_AT_decl_line : (data2) 918\n <1a46> DW_AT_decl_column : (data1) 7\n <1a47> DW_AT_type : (ref_addr) <0x3f>, int\n <1a4b> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1a4e>: Abbrev Number: 19 (DW_TAG_variable)\n- <1a4f> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1a4f> DW_AT_name : (strp) (offset: 0xadb): width\n <1a53> DW_AT_decl_file : (implicit_const) 1\n <1a53> DW_AT_decl_line : (data2) 918\n <1a55> DW_AT_decl_column : (data1) 15\n <1a56> DW_AT_type : (ref_addr) <0x3f>, int\n <1a5a> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><1a5d>: Abbrev Number: 12 (DW_TAG_variable)\n <1a5e> DW_AT_name : (string) x\n@@ -3807,15 +3807,15 @@\n <1a6b> DW_AT_name : (string) y\n <1a6d> DW_AT_decl_file : (implicit_const) 1\n <1a6d> DW_AT_decl_line : (data2) 919\n <1a6f> DW_AT_decl_column : (data1) 9\n <1a70> DW_AT_type : (ref_addr) <0x3f>, int\n <1a74> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><1a77>: Abbrev Number: 19 (DW_TAG_variable)\n- <1a78> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1a78> DW_AT_name : (strp) (offset: 0x7d7): color\n <1a7c> DW_AT_decl_file : (implicit_const) 1\n <1a7c> DW_AT_decl_line : (data2) 920\n <1a7e> DW_AT_decl_column : (data1) 15\n <1a7f> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1a83> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1a86>: Abbrev Number: 12 (DW_TAG_variable)\n <1a87> DW_AT_name : (string) lum\n@@ -3823,62 +3823,62 @@\n <1a8b> DW_AT_decl_line : (data2) 921\n <1a8d> DW_AT_decl_column : (data1) 7\n <1a8e> DW_AT_type : (ref_addr) <0x3f>, int\n <1a92> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1a95>: Abbrev Number: 0\n <1><1a96>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1a97> DW_AT_external : (flag_present) 1\n- <1a97> DW_AT_name : (strp) (offset: 0x114): grayscale\n+ <1a97> DW_AT_name : (strp) (offset: 0xfc): grayscale\n <1a9b> DW_AT_decl_file : (implicit_const) 1\n <1a9b> DW_AT_decl_line : (data2) 876\n <1a9d> DW_AT_decl_column : (data1) 13\n <1a9e> DW_AT_prototyped : (flag_present) 1\n <1a9e> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1aa2> DW_AT_low_pc : (addr) 0xa428\n <1aa6> DW_AT_high_pc : (udata) 236\n <1aa8> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1aaa> DW_AT_call_all_tail_calls: (flag_present) 1\n <1aaa> DW_AT_sibling : (ref_udata) <0x1b3e>\n <2><1aac>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1aad> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1aad> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1ab1> DW_AT_decl_file : (implicit_const) 1\n <1ab1> DW_AT_decl_line : (data2) 876\n <1ab3> DW_AT_decl_column : (data1) 36\n <1ab4> DW_AT_type : (ref_addr) <0x3f5>\n <1ab8> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1abb>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <1abc> DW_AT_name : (string) lt\n <1abf> DW_AT_decl_file : (implicit_const) 1\n <1abf> DW_AT_decl_line : (data2) 876\n <1ac1> DW_AT_decl_column : (data1) 62\n <1ac2> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <1ac6> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><1ac9>: Abbrev Number: 19 (DW_TAG_variable)\n- <1aca> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <1aca> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <1ace> DW_AT_decl_file : (implicit_const) 1\n <1ace> DW_AT_decl_line : (data2) 878\n <1ad0> DW_AT_decl_column : (data1) 15\n <1ad1> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1ad5> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1ad8>: Abbrev Number: 19 (DW_TAG_variable)\n- <1ad9> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1ad9> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1add> DW_AT_decl_file : (implicit_const) 1\n <1add> DW_AT_decl_line : (data2) 879\n <1adf> DW_AT_decl_column : (data1) 15\n <1ae0> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1ae4> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1ae7>: Abbrev Number: 19 (DW_TAG_variable)\n- <1ae8> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1ae8> DW_AT_name : (strp) (offset: 0x9d6): height\n <1aec> DW_AT_decl_file : (implicit_const) 1\n <1aec> DW_AT_decl_line : (data2) 880\n <1aee> DW_AT_decl_column : (data1) 7\n <1aef> DW_AT_type : (ref_addr) <0x3f>, int\n <1af3> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><1af6>: Abbrev Number: 19 (DW_TAG_variable)\n- <1af7> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1af7> DW_AT_name : (strp) (offset: 0xadb): width\n <1afb> DW_AT_decl_file : (implicit_const) 1\n <1afb> DW_AT_decl_line : (data2) 880\n <1afd> DW_AT_decl_column : (data1) 15\n <1afe> DW_AT_type : (ref_addr) <0x3f>, int\n <1b02> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><1b05>: Abbrev Number: 12 (DW_TAG_variable)\n <1b06> DW_AT_name : (string) x\n@@ -3891,15 +3891,15 @@\n <1b13> DW_AT_name : (string) y\n <1b15> DW_AT_decl_file : (implicit_const) 1\n <1b15> DW_AT_decl_line : (data2) 881\n <1b17> DW_AT_decl_column : (data1) 9\n <1b18> DW_AT_type : (ref_addr) <0x3f>, int\n <1b1c> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><1b1f>: Abbrev Number: 19 (DW_TAG_variable)\n- <1b20> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1b20> DW_AT_name : (strp) (offset: 0x7d7): color\n <1b24> DW_AT_decl_file : (implicit_const) 1\n <1b24> DW_AT_decl_line : (data2) 882\n <1b26> DW_AT_decl_column : (data1) 15\n <1b27> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1b2b> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1b2e>: Abbrev Number: 12 (DW_TAG_variable)\n <1b2f> DW_AT_name : (string) lum\n@@ -3907,62 +3907,62 @@\n <1b33> DW_AT_decl_line : (data2) 883\n <1b35> DW_AT_decl_column : (data1) 7\n <1b36> DW_AT_type : (ref_addr) <0x3f>, int\n <1b3a> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1b3d>: Abbrev Number: 0\n <1><1b3e>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1b3f> DW_AT_external : (flag_present) 1\n- <1b3f> DW_AT_name : (strp) (offset: 0x8d0): mirror\n+ <1b3f> DW_AT_name : (strp) (offset: 0x8d2): mirror\n <1b43> DW_AT_decl_file : (implicit_const) 1\n <1b43> DW_AT_decl_line : (data2) 828\n <1b45> DW_AT_decl_column : (data1) 13\n <1b46> DW_AT_prototyped : (flag_present) 1\n <1b46> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1b4a> DW_AT_low_pc : (addr) 0xa2e4\n <1b4e> DW_AT_high_pc : (udata) 324\n <1b50> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1b52> DW_AT_call_all_tail_calls: (flag_present) 1\n <1b52> DW_AT_sibling : (ref_udata) <0x1bd6>\n <2><1b54>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1b55> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1b55> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1b59> DW_AT_decl_file : (implicit_const) 1\n <1b59> DW_AT_decl_line : (data2) 828\n <1b5b> DW_AT_decl_column : (data1) 33\n <1b5c> DW_AT_type : (ref_addr) <0x3f5>\n <1b60> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1b63>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1b64> DW_AT_name : (strp) (offset: 0xc6b): direction\n+ <1b64> DW_AT_name : (strp) (offset: 0xc6d): direction\n <1b68> DW_AT_decl_file : (implicit_const) 1\n <1b68> DW_AT_decl_line : (data2) 828\n <1b6a> DW_AT_decl_column : (data1) 59\n <1b6b> DW_AT_type : (ref_addr) <0x3cb>, direction_t, direction_e\n <1b6f> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><1b72>: Abbrev Number: 19 (DW_TAG_variable)\n- <1b73> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <1b73> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <1b77> DW_AT_decl_file : (implicit_const) 1\n <1b77> DW_AT_decl_line : (data2) 830\n <1b79> DW_AT_decl_column : (data1) 15\n <1b7a> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1b7e> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1b81>: Abbrev Number: 19 (DW_TAG_variable)\n- <1b82> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1b82> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1b86> DW_AT_decl_file : (implicit_const) 1\n <1b86> DW_AT_decl_line : (data2) 831\n <1b88> DW_AT_decl_column : (data1) 15\n <1b89> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1b8d> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1b90>: Abbrev Number: 19 (DW_TAG_variable)\n- <1b91> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1b91> DW_AT_name : (strp) (offset: 0x9d6): height\n <1b95> DW_AT_decl_file : (implicit_const) 1\n <1b95> DW_AT_decl_line : (data2) 832\n <1b97> DW_AT_decl_column : (data1) 7\n <1b98> DW_AT_type : (ref_addr) <0x3f>, int\n <1b9c> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><1b9f>: Abbrev Number: 19 (DW_TAG_variable)\n- <1ba0> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1ba0> DW_AT_name : (strp) (offset: 0xadb): width\n <1ba4> DW_AT_decl_file : (implicit_const) 1\n <1ba4> DW_AT_decl_line : (data2) 832\n <1ba6> DW_AT_decl_column : (data1) 15\n <1ba7> DW_AT_type : (ref_addr) <0x3f>, int\n <1bab> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><1bae>: Abbrev Number: 12 (DW_TAG_variable)\n <1baf> DW_AT_name : (string) x\n@@ -3984,62 +3984,62 @@\n <1bcb> DW_AT_decl_line : (data2) 834\n <1bcd> DW_AT_decl_column : (data1) 15\n <1bce> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1bd2> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1bd5>: Abbrev Number: 0\n <1><1bd6>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1bd7> DW_AT_external : (flag_present) 1\n- <1bd7> DW_AT_name : (strp) (offset: 0x3b3): rotate\n+ <1bd7> DW_AT_name : (strp) (offset: 0x3b5): rotate\n <1bdb> DW_AT_decl_file : (implicit_const) 1\n <1bdb> DW_AT_decl_line : (data2) 780\n <1bdd> DW_AT_decl_column : (data1) 13\n <1bde> DW_AT_prototyped : (flag_present) 1\n <1bde> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1be2> DW_AT_low_pc : (addr) 0xa0cc\n <1be6> DW_AT_high_pc : (udata) 536\n <1be8> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1bea> DW_AT_call_all_tail_calls: (flag_present) 1\n <1bea> DW_AT_sibling : (ref_udata) <0x1c8f>\n <2><1bec>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1bed> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1bed> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1bf1> DW_AT_decl_file : (implicit_const) 1\n <1bf1> DW_AT_decl_line : (data2) 780\n <1bf3> DW_AT_decl_column : (data1) 33\n <1bf4> DW_AT_type : (ref_addr) <0x3f5>\n <1bf8> DW_AT_location : (exprloc) 3 byte block: 91 ac 7f \t(DW_OP_fbreg: -84)\n <2><1bfc>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1bfd> DW_AT_name : (strp) (offset: 0x70c): theta\n+ <1bfd> DW_AT_name : (strp) (offset: 0x70e): theta\n <1c01> DW_AT_decl_file : (implicit_const) 1\n <1c01> DW_AT_decl_line : (data2) 780\n <1c03> DW_AT_decl_column : (data1) 54\n <1c04> DW_AT_type : (ref_addr) <0x3f7>, double\n <1c08> DW_AT_location : (exprloc) 3 byte block: 91 a0 7f \t(DW_OP_fbreg: -96)\n <2><1c0c>: Abbrev Number: 19 (DW_TAG_variable)\n- <1c0d> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <1c0d> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <1c11> DW_AT_decl_file : (implicit_const) 1\n <1c11> DW_AT_decl_line : (data2) 782\n <1c13> DW_AT_decl_column : (data1) 15\n <1c14> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1c18> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><1c1b>: Abbrev Number: 19 (DW_TAG_variable)\n- <1c1c> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1c1c> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1c20> DW_AT_decl_file : (implicit_const) 1\n <1c20> DW_AT_decl_line : (data2) 783\n <1c22> DW_AT_decl_column : (data1) 15\n <1c23> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1c27> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2><1c2b>: Abbrev Number: 19 (DW_TAG_variable)\n- <1c2c> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1c2c> DW_AT_name : (strp) (offset: 0x9d6): height\n <1c30> DW_AT_decl_file : (implicit_const) 1\n <1c30> DW_AT_decl_line : (data2) 784\n <1c32> DW_AT_decl_column : (data1) 7\n <1c33> DW_AT_type : (ref_addr) <0x3f>, int\n <1c37> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><1c3a>: Abbrev Number: 19 (DW_TAG_variable)\n- <1c3b> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1c3b> DW_AT_name : (strp) (offset: 0xadb): width\n <1c3f> DW_AT_decl_file : (implicit_const) 1\n <1c3f> DW_AT_decl_line : (data2) 784\n <1c41> DW_AT_decl_column : (data1) 15\n <1c42> DW_AT_type : (ref_addr) <0x3f>, int\n <1c46> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1c49>: Abbrev Number: 12 (DW_TAG_variable)\n <1c4a> DW_AT_name : (string) x\n@@ -4075,62 +4075,62 @@\n <1c84> DW_AT_decl_line : (data2) 787\n <1c86> DW_AT_decl_column : (data1) 15\n <1c87> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1c8b> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1c8e>: Abbrev Number: 0\n <1><1c8f>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1c90> DW_AT_external : (flag_present) 1\n- <1c90> DW_AT_name : (strp) (offset: 0x5c6): shear\n+ <1c90> DW_AT_name : (strp) (offset: 0x5c8): shear\n <1c94> DW_AT_decl_file : (implicit_const) 1\n <1c94> DW_AT_decl_line : (data2) 736\n <1c96> DW_AT_decl_column : (data1) 13\n <1c97> DW_AT_prototyped : (flag_present) 1\n <1c97> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1c9b> DW_AT_low_pc : (addr) 0x9fc4\n <1c9f> DW_AT_high_pc : (udata) 264\n <1ca1> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1ca3> DW_AT_call_all_tail_calls: (flag_present) 1\n <1ca3> DW_AT_sibling : (ref_udata) <0x1d38>\n <2><1ca5>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1ca6> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1ca6> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1caa> DW_AT_decl_file : (implicit_const) 1\n <1caa> DW_AT_decl_line : (data2) 736\n <1cac> DW_AT_decl_column : (data1) 32\n <1cad> DW_AT_type : (ref_addr) <0x3f5>\n <1cb1> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1cb4>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1cb5> DW_AT_name : (strp) (offset: 0x58e): offset\n+ <1cb5> DW_AT_name : (strp) (offset: 0x590): offset\n <1cb9> DW_AT_decl_file : (implicit_const) 1\n <1cb9> DW_AT_decl_line : (data2) 736\n <1cbb> DW_AT_decl_column : (data1) 50\n <1cbc> DW_AT_type : (ref_addr) <0x3f>, int\n <1cc0> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><1cc3>: Abbrev Number: 19 (DW_TAG_variable)\n- <1cc4> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <1cc4> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <1cc8> DW_AT_decl_file : (implicit_const) 1\n <1cc8> DW_AT_decl_line : (data2) 738\n <1cca> DW_AT_decl_column : (data1) 15\n <1ccb> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1ccf> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><1cd2>: Abbrev Number: 19 (DW_TAG_variable)\n- <1cd3> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1cd3> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1cd7> DW_AT_decl_file : (implicit_const) 1\n <1cd7> DW_AT_decl_line : (data2) 739\n <1cd9> DW_AT_decl_column : (data1) 15\n <1cda> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1cde> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1ce1>: Abbrev Number: 19 (DW_TAG_variable)\n- <1ce2> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1ce2> DW_AT_name : (strp) (offset: 0x9d6): height\n <1ce6> DW_AT_decl_file : (implicit_const) 1\n <1ce6> DW_AT_decl_line : (data2) 740\n <1ce8> DW_AT_decl_column : (data1) 7\n <1ce9> DW_AT_type : (ref_addr) <0x3f>, int\n <1ced> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1cf0>: Abbrev Number: 19 (DW_TAG_variable)\n- <1cf1> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1cf1> DW_AT_name : (strp) (offset: 0xadb): width\n <1cf5> DW_AT_decl_file : (implicit_const) 1\n <1cf5> DW_AT_decl_line : (data2) 740\n <1cf7> DW_AT_decl_column : (data1) 15\n <1cf8> DW_AT_type : (ref_addr) <0x3f>, int\n <1cfc> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><1cff>: Abbrev Number: 12 (DW_TAG_variable)\n <1d00> DW_AT_name : (string) x\n@@ -4143,78 +4143,78 @@\n <1d0d> DW_AT_name : (string) y\n <1d0f> DW_AT_decl_file : (implicit_const) 1\n <1d0f> DW_AT_decl_line : (data2) 741\n <1d11> DW_AT_decl_column : (data1) 9\n <1d12> DW_AT_type : (ref_addr) <0x3f>, int\n <1d16> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><1d19>: Abbrev Number: 19 (DW_TAG_variable)\n- <1d1a> DW_AT_name : (strp) (offset: 0xcd3): shift\n+ <1d1a> DW_AT_name : (strp) (offset: 0xcd5): shift\n <1d1e> DW_AT_decl_file : (implicit_const) 1\n <1d1e> DW_AT_decl_line : (data2) 742\n <1d20> DW_AT_decl_column : (data1) 7\n <1d21> DW_AT_type : (ref_addr) <0x3f>, int\n <1d25> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1d28>: Abbrev Number: 19 (DW_TAG_variable)\n- <1d29> DW_AT_name : (strp) (offset: 0xc53): color_return\n+ <1d29> DW_AT_name : (strp) (offset: 0xc55): color_return\n <1d2d> DW_AT_decl_file : (implicit_const) 1\n <1d2d> DW_AT_decl_line : (data2) 743\n <1d2f> DW_AT_decl_column : (data1) 15\n <1d30> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1d34> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1d37>: Abbrev Number: 0\n <1><1d38>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1d39> DW_AT_external : (flag_present) 1\n- <1d39> DW_AT_name : (strp) (offset: 0x419): white_border\n+ <1d39> DW_AT_name : (strp) (offset: 0x41b): white_border\n <1d3d> DW_AT_decl_file : (implicit_const) 1\n <1d3d> DW_AT_decl_line : (data2) 697\n <1d3f> DW_AT_decl_column : (data1) 13\n <1d40> DW_AT_prototyped : (flag_present) 1\n <1d40> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1d44> DW_AT_low_pc : (addr) 0x9edc\n <1d48> DW_AT_high_pc : (udata) 232\n <1d4a> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1d4c> DW_AT_call_all_tail_calls: (flag_present) 1\n <1d4c> DW_AT_sibling : (ref_udata) <0x1dc3>\n <2><1d4e>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1d4f> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1d4f> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1d53> DW_AT_decl_file : (implicit_const) 1\n <1d53> DW_AT_decl_line : (data2) 697\n <1d55> DW_AT_decl_column : (data1) 39\n <1d56> DW_AT_type : (ref_addr) <0x3f5>\n <1d5a> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1d5d>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1d5e> DW_AT_name : (strp) (offset: 0x18d): bdwidth\n+ <1d5e> DW_AT_name : (strp) (offset: 0x175): bdwidth\n <1d62> DW_AT_decl_file : (implicit_const) 1\n <1d62> DW_AT_decl_line : (data2) 697\n <1d64> DW_AT_decl_column : (data1) 57\n <1d65> DW_AT_type : (ref_addr) <0x3f>, int\n <1d69> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1d6c>: Abbrev Number: 19 (DW_TAG_variable)\n- <1d6d> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <1d6d> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <1d71> DW_AT_decl_file : (implicit_const) 1\n <1d71> DW_AT_decl_line : (data2) 699\n <1d73> DW_AT_decl_column : (data1) 15\n <1d74> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1d78> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><1d7b>: Abbrev Number: 19 (DW_TAG_variable)\n- <1d7c> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1d7c> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1d80> DW_AT_decl_file : (implicit_const) 1\n <1d80> DW_AT_decl_line : (data2) 700\n <1d82> DW_AT_decl_column : (data1) 15\n <1d83> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1d87> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1d8a>: Abbrev Number: 19 (DW_TAG_variable)\n- <1d8b> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1d8b> DW_AT_name : (strp) (offset: 0x9d6): height\n <1d8f> DW_AT_decl_file : (implicit_const) 1\n <1d8f> DW_AT_decl_line : (data2) 701\n <1d91> DW_AT_decl_column : (data1) 7\n <1d92> DW_AT_type : (ref_addr) <0x3f>, int\n <1d96> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><1d99>: Abbrev Number: 19 (DW_TAG_variable)\n- <1d9a> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1d9a> DW_AT_name : (strp) (offset: 0xadb): width\n <1d9e> DW_AT_decl_file : (implicit_const) 1\n <1d9e> DW_AT_decl_line : (data2) 701\n <1da0> DW_AT_decl_column : (data1) 15\n <1da1> DW_AT_type : (ref_addr) <0x3f>, int\n <1da5> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><1da8>: Abbrev Number: 12 (DW_TAG_variable)\n <1da9> DW_AT_name : (string) x\n@@ -4229,27 +4229,27 @@\n <1db8> DW_AT_decl_line : (data2) 702\n <1dba> DW_AT_decl_column : (data1) 9\n <1dbb> DW_AT_type : (ref_addr) <0x3f>, int\n <1dbf> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1dc2>: Abbrev Number: 0\n <1><1dc3>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1dc4> DW_AT_external : (flag_present) 1\n- <1dc4> DW_AT_name : (strp) (offset: 0x605): get_maxval\n+ <1dc4> DW_AT_name : (strp) (offset: 0x607): get_maxval\n <1dc8> DW_AT_decl_file : (implicit_const) 1\n <1dc8> DW_AT_decl_line : (data2) 652\n <1dca> DW_AT_decl_column : (data1) 8\n <1dcb> DW_AT_prototyped : (flag_present) 1\n <1dcb> DW_AT_type : (ref_addr) <0x3f7>, double\n <1dcf> DW_AT_low_pc : (addr) 0x9d94\n <1dd3> DW_AT_high_pc : (udata) 328\n <1dd5> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1dd7> DW_AT_call_all_tail_calls: (flag_present) 1\n <1dd7> DW_AT_sibling : (ref_udata) <0x1ea5>\n <2><1dd9>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1dda> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1dda> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1dde> DW_AT_decl_file : (implicit_const) 1\n <1dde> DW_AT_decl_line : (data2) 652\n <1de0> DW_AT_decl_column : (data1) 32\n <1de1> DW_AT_type : (ref_addr) <0x3f5>\n <1de5> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1de8>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <1de9> DW_AT_name : (string) x\n@@ -4283,29 +4283,29 @@\n <1e20> DW_AT_name : (string) lt\n <1e23> DW_AT_decl_file : (implicit_const) 1\n <1e23> DW_AT_decl_line : (data2) 653\n <1e25> DW_AT_decl_column : (data1) 30\n <1e26> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <1e2a> DW_AT_location : (exprloc) 3 byte block: 91 b0 7f \t(DW_OP_fbreg: -80)\n <2><1e2e>: Abbrev Number: 19 (DW_TAG_variable)\n- <1e2f> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1e2f> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1e33> DW_AT_decl_file : (implicit_const) 1\n <1e33> DW_AT_decl_line : (data2) 655\n <1e35> DW_AT_decl_column : (data1) 15\n <1e36> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1e3a> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><1e3d>: Abbrev Number: 19 (DW_TAG_variable)\n- <1e3e> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1e3e> DW_AT_name : (strp) (offset: 0x9d6): height\n <1e42> DW_AT_decl_file : (implicit_const) 1\n <1e42> DW_AT_decl_line : (data2) 656\n <1e44> DW_AT_decl_column : (data1) 7\n <1e45> DW_AT_type : (ref_addr) <0x3f>, int\n <1e49> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><1e4c>: Abbrev Number: 19 (DW_TAG_variable)\n- <1e4d> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1e4d> DW_AT_name : (strp) (offset: 0xadb): width\n <1e51> DW_AT_decl_file : (implicit_const) 1\n <1e51> DW_AT_decl_line : (data2) 656\n <1e53> DW_AT_decl_column : (data1) 15\n <1e54> DW_AT_type : (ref_addr) <0x3f>, int\n <1e58> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1e5b>: Abbrev Number: 12 (DW_TAG_variable)\n <1e5c> DW_AT_name : (string) xi\n@@ -4318,50 +4318,50 @@\n <1e6a> DW_AT_name : (string) yi\n <1e6d> DW_AT_decl_file : (implicit_const) 1\n <1e6d> DW_AT_decl_line : (data2) 657\n <1e6f> DW_AT_decl_column : (data1) 10\n <1e70> DW_AT_type : (ref_addr) <0x3f>, int\n <1e74> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><1e77>: Abbrev Number: 19 (DW_TAG_variable)\n- <1e78> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1e78> DW_AT_name : (strp) (offset: 0x7d7): color\n <1e7c> DW_AT_decl_file : (implicit_const) 1\n <1e7c> DW_AT_decl_line : (data2) 658\n <1e7e> DW_AT_decl_column : (data1) 15\n <1e7f> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1e83> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1e86>: Abbrev Number: 12 (DW_TAG_variable)\n <1e87> DW_AT_name : (string) lum\n <1e8b> DW_AT_decl_file : (implicit_const) 1\n <1e8b> DW_AT_decl_line : (data2) 659\n <1e8d> DW_AT_decl_column : (data1) 7\n <1e8e> DW_AT_type : (ref_addr) <0x3f>, int\n <1e92> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1e95>: Abbrev Number: 19 (DW_TAG_variable)\n- <1e96> DW_AT_name : (strp) (offset: 0x609): maxval\n+ <1e96> DW_AT_name : (strp) (offset: 0x60b): maxval\n <1e9a> DW_AT_decl_file : (implicit_const) 1\n <1e9a> DW_AT_decl_line : (data2) 660\n <1e9c> DW_AT_decl_column : (data1) 7\n <1e9d> DW_AT_type : (ref_addr) <0x3f>, int\n <1ea1> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1ea4>: Abbrev Number: 0\n <1><1ea5>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1ea6> DW_AT_external : (flag_present) 1\n- <1ea6> DW_AT_name : (strp) (offset: 0x332): get_minval\n+ <1ea6> DW_AT_name : (strp) (offset: 0x31a): get_minval\n <1eaa> DW_AT_decl_file : (implicit_const) 1\n <1eaa> DW_AT_decl_line : (data2) 608\n <1eac> DW_AT_decl_column : (data1) 8\n <1ead> DW_AT_prototyped : (flag_present) 1\n <1ead> DW_AT_type : (ref_addr) <0x3f7>, double\n <1eb1> DW_AT_low_pc : (addr) 0x9c4c\n <1eb5> DW_AT_high_pc : (udata) 328\n <1eb7> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1eb9> DW_AT_call_all_tail_calls: (flag_present) 1\n <1eb9> DW_AT_sibling : (ref_udata) <0x1f87>\n <2><1ebb>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1ebc> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1ebc> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1ec0> DW_AT_decl_file : (implicit_const) 1\n <1ec0> DW_AT_decl_line : (data2) 608\n <1ec2> DW_AT_decl_column : (data1) 32\n <1ec3> DW_AT_type : (ref_addr) <0x3f5>\n <1ec7> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><1eca>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <1ecb> DW_AT_name : (string) x\n@@ -4395,29 +4395,29 @@\n <1f02> DW_AT_name : (string) lt\n <1f05> DW_AT_decl_file : (implicit_const) 1\n <1f05> DW_AT_decl_line : (data2) 609\n <1f07> DW_AT_decl_column : (data1) 30\n <1f08> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <1f0c> DW_AT_location : (exprloc) 3 byte block: 91 b0 7f \t(DW_OP_fbreg: -80)\n <2><1f10>: Abbrev Number: 19 (DW_TAG_variable)\n- <1f11> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <1f11> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <1f15> DW_AT_decl_file : (implicit_const) 1\n <1f15> DW_AT_decl_line : (data2) 611\n <1f17> DW_AT_decl_column : (data1) 15\n <1f18> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <1f1c> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><1f1f>: Abbrev Number: 19 (DW_TAG_variable)\n- <1f20> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <1f20> DW_AT_name : (strp) (offset: 0x9d6): height\n <1f24> DW_AT_decl_file : (implicit_const) 1\n <1f24> DW_AT_decl_line : (data2) 612\n <1f26> DW_AT_decl_column : (data1) 7\n <1f27> DW_AT_type : (ref_addr) <0x3f>, int\n <1f2b> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><1f2e>: Abbrev Number: 19 (DW_TAG_variable)\n- <1f2f> DW_AT_name : (strp) (offset: 0xad9): width\n+ <1f2f> DW_AT_name : (strp) (offset: 0xadb): width\n <1f33> DW_AT_decl_file : (implicit_const) 1\n <1f33> DW_AT_decl_line : (data2) 612\n <1f35> DW_AT_decl_column : (data1) 15\n <1f36> DW_AT_type : (ref_addr) <0x3f>, int\n <1f3a> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><1f3d>: Abbrev Number: 12 (DW_TAG_variable)\n <1f3e> DW_AT_name : (string) xi\n@@ -4430,22 +4430,22 @@\n <1f4c> DW_AT_name : (string) yi\n <1f4f> DW_AT_decl_file : (implicit_const) 1\n <1f4f> DW_AT_decl_line : (data2) 613\n <1f51> DW_AT_decl_column : (data1) 10\n <1f52> DW_AT_type : (ref_addr) <0x3f>, int\n <1f56> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><1f59>: Abbrev Number: 19 (DW_TAG_variable)\n- <1f5a> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <1f5a> DW_AT_name : (strp) (offset: 0x7d7): color\n <1f5e> DW_AT_decl_file : (implicit_const) 1\n <1f5e> DW_AT_decl_line : (data2) 614\n <1f60> DW_AT_decl_column : (data1) 15\n <1f61> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <1f65> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><1f68>: Abbrev Number: 19 (DW_TAG_variable)\n- <1f69> DW_AT_name : (strp) (offset: 0x336): minval\n+ <1f69> DW_AT_name : (strp) (offset: 0x31e): minval\n <1f6d> DW_AT_decl_file : (implicit_const) 1\n <1f6d> DW_AT_decl_line : (data2) 615\n <1f6f> DW_AT_decl_column : (data1) 7\n <1f70> DW_AT_type : (ref_addr) <0x3f>, int\n <1f74> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><1f77>: Abbrev Number: 12 (DW_TAG_variable)\n <1f78> DW_AT_name : (string) lum\n@@ -4453,34 +4453,34 @@\n <1f7c> DW_AT_decl_line : (data2) 616\n <1f7e> DW_AT_decl_column : (data1) 7\n <1f7f> DW_AT_type : (ref_addr) <0x3f>, int\n <1f83> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><1f86>: Abbrev Number: 0\n <1><1f87>: Abbrev Number: 51 (DW_TAG_subprogram)\n <1f88> DW_AT_external : (flag_present) 1\n- <1f88> DW_AT_name : (strp) (offset: 0xce7): iterative_threshold\n+ <1f88> DW_AT_name : (strp) (offset: 0xce9): iterative_threshold\n <1f8c> DW_AT_decl_file : (implicit_const) 1\n <1f8c> DW_AT_decl_line : (data2) 530\n <1f8e> DW_AT_decl_column : (data1) 8\n <1f8f> DW_AT_prototyped : (flag_present) 1\n <1f8f> DW_AT_type : (ref_addr) <0x3f7>, double\n <1f93> DW_AT_low_pc : (addr) 0x99dc\n <1f97> DW_AT_high_pc : (udata) 624\n <1f99> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <1f9b> DW_AT_call_all_tail_calls: (flag_present) 1\n <1f9b> DW_AT_sibling : (ref_udata) <0x20fe>\n <2><1f9d>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1f9e> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <1f9e> DW_AT_name : (strp) (offset: 0xe81): source_image\n <1fa2> DW_AT_decl_file : (implicit_const) 1\n <1fa2> DW_AT_decl_line : (data2) 530\n <1fa4> DW_AT_decl_column : (data1) 41\n <1fa5> DW_AT_type : (ref_addr) <0x3f5>\n <1fa9> DW_AT_location : (exprloc) 3 byte block: 91 8c 7f \t(DW_OP_fbreg: -116)\n <2><1fad>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <1fae> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <1fae> DW_AT_name : (strp) (offset: 0xd07): thresh\n <1fb2> DW_AT_decl_file : (implicit_const) 1\n <1fb2> DW_AT_decl_line : (data2) 530\n <1fb4> DW_AT_decl_column : (data1) 62\n <1fb5> DW_AT_type : (ref_addr) <0x3f7>, double\n <1fb9> DW_AT_location : (exprloc) 3 byte block: 91 80 7f \t(DW_OP_fbreg: -128)\n <2><1fbd>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <1fbe> DW_AT_name : (string) lt\n@@ -4514,29 +4514,29 @@\n <1ff7> DW_AT_name : (string) h\n <1ff9> DW_AT_decl_file : (implicit_const) 1\n <1ff9> DW_AT_decl_line : (data2) 531\n <1ffb> DW_AT_decl_column : (data1) 69\n <1ffc> DW_AT_type : (ref_addr) <0x3f>, int\n <2000> DW_AT_location : (exprloc) 3 byte block: 91 f0 7e \t(DW_OP_fbreg: -144)\n <2><2004>: Abbrev Number: 19 (DW_TAG_variable)\n- <2005> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <2005> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <2009> DW_AT_decl_file : (implicit_const) 1\n <2009> DW_AT_decl_line : (data2) 533\n <200b> DW_AT_decl_column : (data1) 15\n <200c> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2010> DW_AT_location : (exprloc) 3 byte block: 91 ac 7f \t(DW_OP_fbreg: -84)\n <2><2014>: Abbrev Number: 19 (DW_TAG_variable)\n- <2015> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <2015> DW_AT_name : (strp) (offset: 0x9d6): height\n <2019> DW_AT_decl_file : (implicit_const) 1\n <2019> DW_AT_decl_line : (data2) 534\n <201b> DW_AT_decl_column : (data1) 7\n <201c> DW_AT_type : (ref_addr) <0x3f>, int\n <2020> DW_AT_location : (exprloc) 3 byte block: 91 b0 7f \t(DW_OP_fbreg: -80)\n <2><2024>: Abbrev Number: 19 (DW_TAG_variable)\n- <2025> DW_AT_name : (strp) (offset: 0xad9): width\n+ <2025> DW_AT_name : (strp) (offset: 0xadb): width\n <2029> DW_AT_decl_file : (implicit_const) 1\n <2029> DW_AT_decl_line : (data2) 534\n <202b> DW_AT_decl_column : (data1) 15\n <202c> DW_AT_type : (ref_addr) <0x3f>, int\n <2030> DW_AT_location : (exprloc) 3 byte block: 91 b4 7f \t(DW_OP_fbreg: -76)\n <2><2034>: Abbrev Number: 12 (DW_TAG_variable)\n <2035> DW_AT_name : (string) xi\n@@ -4549,113 +4549,113 @@\n <2044> DW_AT_name : (string) yi\n <2047> DW_AT_decl_file : (implicit_const) 1\n <2047> DW_AT_decl_line : (data2) 535\n <2049> DW_AT_decl_column : (data1) 10\n <204a> DW_AT_type : (ref_addr) <0x3f>, int\n <204e> DW_AT_location : (exprloc) 3 byte block: 91 98 7f \t(DW_OP_fbreg: -104)\n <2><2052>: Abbrev Number: 19 (DW_TAG_variable)\n- <2053> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <2053> DW_AT_name : (strp) (offset: 0x7d7): color\n <2057> DW_AT_decl_file : (implicit_const) 1\n <2057> DW_AT_decl_line : (data2) 536\n <2059> DW_AT_decl_column : (data1) 15\n <205a> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <205e> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><2061>: Abbrev Number: 12 (DW_TAG_variable)\n <2062> DW_AT_name : (string) lum\n <2066> DW_AT_decl_file : (implicit_const) 1\n <2066> DW_AT_decl_line : (data2) 537\n <2068> DW_AT_decl_column : (data1) 7\n <2069> DW_AT_type : (ref_addr) <0x3f>, int\n <206d> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2><2071>: Abbrev Number: 19 (DW_TAG_variable)\n- <2072> DW_AT_name : (strp) (offset: 0xd81): size_white\n+ <2072> DW_AT_name : (strp) (offset: 0xd79): size_white\n <2076> DW_AT_decl_file : (implicit_const) 1\n <2076> DW_AT_decl_line : (data2) 538\n <2078> DW_AT_decl_column : (data1) 16\n <2079> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <207d> DW_AT_location : (exprloc) 3 byte block: 91 9c 7f \t(DW_OP_fbreg: -100)\n <2><2081>: Abbrev Number: 19 (DW_TAG_variable)\n- <2082> DW_AT_name : (strp) (offset: 0xc60): size_black\n+ <2082> DW_AT_name : (strp) (offset: 0xc62): size_black\n <2086> DW_AT_decl_file : (implicit_const) 1\n <2086> DW_AT_decl_line : (data2) 538\n <2088> DW_AT_decl_column : (data1) 28\n <2089> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <208d> DW_AT_location : (exprloc) 3 byte block: 91 a0 7f \t(DW_OP_fbreg: -96)\n <2><2091>: Abbrev Number: 19 (DW_TAG_variable)\n- <2092> DW_AT_name : (strp) (offset: 0xd2d): sum_white\n+ <2092> DW_AT_name : (strp) (offset: 0xe40): sum_white\n <2096> DW_AT_decl_file : (implicit_const) 1\n <2096> DW_AT_decl_line : (data2) 539\n <2098> DW_AT_decl_column : (data1) 21\n <2099> DW_AT_type : (ref_addr) <0x2a>, long unsigned int\n <209d> DW_AT_location : (exprloc) 3 byte block: 91 a4 7f \t(DW_OP_fbreg: -92)\n <2><20a1>: Abbrev Number: 19 (DW_TAG_variable)\n- <20a2> DW_AT_name : (strp) (offset: 0xcaf): sum_black\n+ <20a2> DW_AT_name : (strp) (offset: 0xcb1): sum_black\n <20a6> DW_AT_decl_file : (implicit_const) 1\n <20a6> DW_AT_decl_line : (data2) 539\n <20a8> DW_AT_decl_column : (data1) 32\n <20a9> DW_AT_type : (ref_addr) <0x2a>, long unsigned int\n <20ad> DW_AT_location : (exprloc) 3 byte block: 91 a8 7f \t(DW_OP_fbreg: -88)\n <2><20b1>: Abbrev Number: 19 (DW_TAG_variable)\n- <20b2> DW_AT_name : (strp) (offset: 0xdd3): avg_white\n+ <20b2> DW_AT_name : (strp) (offset: 0xdcb): avg_white\n <20b6> DW_AT_decl_file : (implicit_const) 1\n <20b6> DW_AT_decl_line : (data2) 540\n <20b8> DW_AT_decl_column : (data1) 16\n <20b9> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <20bd> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><20c0>: Abbrev Number: 19 (DW_TAG_variable)\n- <20c1> DW_AT_name : (strp) (offset: 0xc8c): avg_black\n+ <20c1> DW_AT_name : (strp) (offset: 0xc8e): avg_black\n <20c5> DW_AT_decl_file : (implicit_const) 1\n <20c5> DW_AT_decl_line : (data2) 540\n <20c7> DW_AT_decl_column : (data1) 27\n <20c8> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <20cc> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><20cf>: Abbrev Number: 19 (DW_TAG_variable)\n- <20d0> DW_AT_name : (strp) (offset: 0xd01): old_thresh\n+ <20d0> DW_AT_name : (strp) (offset: 0xd03): old_thresh\n <20d4> DW_AT_decl_file : (implicit_const) 1\n <20d4> DW_AT_decl_line : (data2) 541\n <20d6> DW_AT_decl_column : (data1) 10\n <20d7> DW_AT_type : (ref_addr) <0x3f7>, double\n <20db> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><20de>: Abbrev Number: 19 (DW_TAG_variable)\n- <20df> DW_AT_name : (strp) (offset: 0xc96): new_thresh\n+ <20df> DW_AT_name : (strp) (offset: 0xc98): new_thresh\n <20e3> DW_AT_decl_file : (implicit_const) 1\n <20e3> DW_AT_decl_line : (data2) 542\n <20e5> DW_AT_decl_column : (data1) 10\n <20e6> DW_AT_type : (ref_addr) <0x3f7>, double\n <20ea> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><20ed>: Abbrev Number: 19 (DW_TAG_variable)\n- <20ee> DW_AT_name : (strp) (offset: 0xe9a): thresh_lum\n+ <20ee> DW_AT_name : (strp) (offset: 0xe9c): thresh_lum\n <20f2> DW_AT_decl_file : (implicit_const) 1\n <20f2> DW_AT_decl_line : (data2) 543\n <20f4> DW_AT_decl_column : (data1) 7\n <20f5> DW_AT_type : (ref_addr) <0x3f>, int\n <20f9> DW_AT_location : (exprloc) 3 byte block: 91 b8 7f \t(DW_OP_fbreg: -72)\n <2><20fd>: Abbrev Number: 0\n <1><20fe>: Abbrev Number: 51 (DW_TAG_subprogram)\n <20ff> DW_AT_external : (flag_present) 1\n- <20ff> DW_AT_name : (strp) (offset: 0xe8c): get_threshold\n+ <20ff> DW_AT_name : (strp) (offset: 0xe8e): get_threshold\n <2103> DW_AT_decl_file : (implicit_const) 1\n <2103> DW_AT_decl_line : (data2) 485\n <2105> DW_AT_decl_column : (data1) 8\n <2106> DW_AT_prototyped : (flag_present) 1\n <2106> DW_AT_type : (ref_addr) <0x3f7>, double\n <210a> DW_AT_low_pc : (addr) 0x9810\n <210e> DW_AT_high_pc : (udata) 460\n <2110> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2112> DW_AT_call_all_tail_calls: (flag_present) 1\n <2112> DW_AT_sibling : (ref_udata) <0x2203>\n <2><2114>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <2115> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2115> DW_AT_name : (strp) (offset: 0xe81): source_image\n <2119> DW_AT_decl_file : (implicit_const) 1\n <2119> DW_AT_decl_line : (data2) 485\n <211b> DW_AT_decl_column : (data1) 35\n <211c> DW_AT_type : (ref_addr) <0x3f5>\n <2120> DW_AT_location : (exprloc) 3 byte block: 91 b4 7f \t(DW_OP_fbreg: -76)\n <2><2124>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <2125> DW_AT_name : (strp) (offset: 0xd24): fraction\n+ <2125> DW_AT_name : (strp) (offset: 0xd26): fraction\n <2129> DW_AT_decl_file : (implicit_const) 1\n <2129> DW_AT_decl_line : (data2) 485\n <212b> DW_AT_decl_column : (data1) 56\n <212c> DW_AT_type : (ref_addr) <0x3f7>, double\n <2130> DW_AT_location : (exprloc) 3 byte block: 91 a8 7f \t(DW_OP_fbreg: -88)\n <2><2134>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <2135> DW_AT_name : (string) lt\n@@ -4689,29 +4689,29 @@\n <216e> DW_AT_name : (string) h\n <2170> DW_AT_decl_file : (implicit_const) 1\n <2170> DW_AT_decl_line : (data2) 486\n <2172> DW_AT_decl_column : (data1) 46\n <2173> DW_AT_type : (ref_addr) <0x3f>, int\n <2177> DW_AT_location : (exprloc) 3 byte block: 91 98 7f \t(DW_OP_fbreg: -104)\n <2><217b>: Abbrev Number: 19 (DW_TAG_variable)\n- <217c> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <217c> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <2180> DW_AT_decl_file : (implicit_const) 1\n <2180> DW_AT_decl_line : (data2) 488\n <2182> DW_AT_decl_column : (data1) 15\n <2183> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2187> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><218a>: Abbrev Number: 19 (DW_TAG_variable)\n- <218b> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <218b> DW_AT_name : (strp) (offset: 0x9d6): height\n <218f> DW_AT_decl_file : (implicit_const) 1\n <218f> DW_AT_decl_line : (data2) 489\n <2191> DW_AT_decl_column : (data1) 7\n <2192> DW_AT_type : (ref_addr) <0x3f>, int\n <2196> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><2199>: Abbrev Number: 19 (DW_TAG_variable)\n- <219a> DW_AT_name : (strp) (offset: 0xad9): width\n+ <219a> DW_AT_name : (strp) (offset: 0xadb): width\n <219e> DW_AT_decl_file : (implicit_const) 1\n <219e> DW_AT_decl_line : (data2) 489\n <21a0> DW_AT_decl_column : (data1) 15\n <21a1> DW_AT_type : (ref_addr) <0x3f>, int\n <21a5> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><21a8>: Abbrev Number: 12 (DW_TAG_variable)\n <21a9> DW_AT_name : (string) xi\n@@ -4724,64 +4724,64 @@\n <21b8> DW_AT_name : (string) yi\n <21bb> DW_AT_decl_file : (implicit_const) 1\n <21bb> DW_AT_decl_line : (data2) 490\n <21bd> DW_AT_decl_column : (data1) 10\n <21be> DW_AT_type : (ref_addr) <0x3f>, int\n <21c2> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2><21c6>: Abbrev Number: 19 (DW_TAG_variable)\n- <21c7> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <21c7> DW_AT_name : (strp) (offset: 0x7d7): color\n <21cb> DW_AT_decl_file : (implicit_const) 1\n <21cb> DW_AT_decl_line : (data2) 491\n <21cd> DW_AT_decl_column : (data1) 15\n <21ce> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <21d2> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><21d5>: Abbrev Number: 12 (DW_TAG_variable)\n <21d6> DW_AT_name : (string) lum\n <21da> DW_AT_decl_file : (implicit_const) 1\n <21da> DW_AT_decl_line : (data2) 492\n <21dc> DW_AT_decl_column : (data1) 7\n <21dd> DW_AT_type : (ref_addr) <0x3f>, int\n <21e1> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><21e4>: Abbrev Number: 19 (DW_TAG_variable)\n- <21e5> DW_AT_name : (strp) (offset: 0x336): minval\n+ <21e5> DW_AT_name : (strp) (offset: 0x31e): minval\n <21e9> DW_AT_decl_file : (implicit_const) 1\n <21e9> DW_AT_decl_line : (data2) 493\n <21eb> DW_AT_decl_column : (data1) 10\n <21ec> DW_AT_type : (ref_addr) <0x3f7>, double\n <21f0> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><21f3>: Abbrev Number: 19 (DW_TAG_variable)\n- <21f4> DW_AT_name : (strp) (offset: 0x609): maxval\n+ <21f4> DW_AT_name : (strp) (offset: 0x60b): maxval\n <21f8> DW_AT_decl_file : (implicit_const) 1\n <21f8> DW_AT_decl_line : (data2) 493\n <21fa> DW_AT_decl_column : (data1) 33\n <21fb> DW_AT_type : (ref_addr) <0x3f7>, double\n <21ff> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><2202>: Abbrev Number: 0\n <1><2203>: Abbrev Number: 51 (DW_TAG_subprogram)\n <2204> DW_AT_external : (flag_present) 1\n- <2204> DW_AT_name : (strp) (offset: 0x35a): adapt_threshold\n+ <2204> DW_AT_name : (strp) (offset: 0x35c): adapt_threshold\n <2208> DW_AT_decl_file : (implicit_const) 1\n <2208> DW_AT_decl_line : (data2) 459\n <220a> DW_AT_decl_column : (data1) 8\n <220b> DW_AT_prototyped : (flag_present) 1\n <220b> DW_AT_type : (ref_addr) <0x3f7>, double\n <220f> DW_AT_low_pc : (addr) 0x968c\n <2213> DW_AT_high_pc : (udata) 388\n <2215> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2217> DW_AT_call_all_tail_calls: (flag_present) 1\n <2217> DW_AT_sibling : (ref_udata) <0x2297>\n <2><2219>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <221a> DW_AT_name : (strp) (offset: 0xda1): image\n+ <221a> DW_AT_name : (strp) (offset: 0xd99): image\n <221e> DW_AT_decl_file : (implicit_const) 1\n <221e> DW_AT_decl_line : (data2) 459\n <2220> DW_AT_decl_column : (data1) 37\n <2221> DW_AT_type : (ref_addr) <0x3f5>\n <2225> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><2228>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <2229> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <2229> DW_AT_name : (strp) (offset: 0xd07): thresh\n <222d> DW_AT_decl_file : (implicit_const) 1\n <222d> DW_AT_decl_line : (data2) 459\n <222f> DW_AT_decl_column : (data1) 51\n <2230> DW_AT_type : (ref_addr) <0x3f7>, double\n <2234> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><2237>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <2238> DW_AT_name : (string) lt\n@@ -4815,15 +4815,15 @@\n <226d> DW_AT_name : (string) h\n <226f> DW_AT_decl_file : (implicit_const) 1\n <226f> DW_AT_decl_line : (data2) 460\n <2271> DW_AT_decl_column : (data1) 42\n <2272> DW_AT_type : (ref_addr) <0x3f>, int\n <2276> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><2279>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <227a> DW_AT_name : (strp) (offset: 0x675): flags\n+ <227a> DW_AT_name : (strp) (offset: 0x677): flags\n <227e> DW_AT_decl_file : (implicit_const) 1\n <227e> DW_AT_decl_line : (data2) 460\n <2280> DW_AT_decl_column : (data1) 58\n <2281> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2285> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2><2289>: Abbrev Number: 12 (DW_TAG_variable)\n <228a> DW_AT_name : (string) t\n@@ -4831,69 +4831,69 @@\n <228c> DW_AT_decl_line : (data2) 462\n <228e> DW_AT_decl_column : (data1) 10\n <228f> DW_AT_type : (ref_addr) <0x3f7>, double\n <2293> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><2296>: Abbrev Number: 0\n <1><2297>: Abbrev Number: 51 (DW_TAG_subprogram)\n <2298> DW_AT_external : (flag_present) 1\n- <2298> DW_AT_name : (strp) (offset: 0x307): make_mono\n+ <2298> DW_AT_name : (strp) (offset: 0x2ef): make_mono\n <229c> DW_AT_decl_file : (implicit_const) 1\n <229c> DW_AT_decl_line : (data2) 420\n <229e> DW_AT_decl_column : (data1) 13\n <229f> DW_AT_prototyped : (flag_present) 1\n <229f> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <22a3> DW_AT_low_pc : (addr) 0x95ac\n <22a7> DW_AT_high_pc : (udata) 224\n <22a9> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <22ab> DW_AT_call_all_tail_calls: (flag_present) 1\n <22ab> DW_AT_sibling : (ref_udata) <0x234f>\n <2><22ad>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <22ae> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <22ae> DW_AT_name : (strp) (offset: 0xe81): source_image\n <22b2> DW_AT_decl_file : (implicit_const) 1\n <22b2> DW_AT_decl_line : (data2) 420\n <22b4> DW_AT_decl_column : (data1) 36\n <22b5> DW_AT_type : (ref_addr) <0x3f5>\n <22b9> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><22bc>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <22bd> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <22bd> DW_AT_name : (strp) (offset: 0xd07): thresh\n <22c1> DW_AT_decl_file : (implicit_const) 1\n <22c1> DW_AT_decl_line : (data2) 420\n <22c3> DW_AT_decl_column : (data1) 57\n <22c4> DW_AT_type : (ref_addr) <0x3f7>, double\n <22c8> DW_AT_location : (exprloc) 3 byte block: 91 b8 7f \t(DW_OP_fbreg: -72)\n <2><22cc>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <22cd> DW_AT_name : (string) lt\n <22d0> DW_AT_decl_file : (implicit_const) 1\n <22d0> DW_AT_decl_line : (data2) 420\n <22d2> DW_AT_decl_column : (data1) 77\n <22d3> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <22d7> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><22da>: Abbrev Number: 19 (DW_TAG_variable)\n- <22db> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <22db> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <22df> DW_AT_decl_file : (implicit_const) 1\n <22df> DW_AT_decl_line : (data2) 422\n <22e1> DW_AT_decl_column : (data1) 15\n <22e2> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <22e6> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><22e9>: Abbrev Number: 19 (DW_TAG_variable)\n- <22ea> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <22ea> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <22ee> DW_AT_decl_file : (implicit_const) 1\n <22ee> DW_AT_decl_line : (data2) 423\n <22f0> DW_AT_decl_column : (data1) 15\n <22f1> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <22f5> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><22f8>: Abbrev Number: 19 (DW_TAG_variable)\n- <22f9> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <22f9> DW_AT_name : (strp) (offset: 0x9d6): height\n <22fd> DW_AT_decl_file : (implicit_const) 1\n <22fd> DW_AT_decl_line : (data2) 424\n <22ff> DW_AT_decl_column : (data1) 7\n <2300> DW_AT_type : (ref_addr) <0x3f>, int\n <2304> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><2307>: Abbrev Number: 19 (DW_TAG_variable)\n- <2308> DW_AT_name : (strp) (offset: 0xad9): width\n+ <2308> DW_AT_name : (strp) (offset: 0xadb): width\n <230c> DW_AT_decl_file : (implicit_const) 1\n <230c> DW_AT_decl_line : (data2) 424\n <230e> DW_AT_decl_column : (data1) 15\n <230f> DW_AT_type : (ref_addr) <0x3f>, int\n <2313> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><2316>: Abbrev Number: 12 (DW_TAG_variable)\n <2317> DW_AT_name : (string) x\n@@ -4906,15 +4906,15 @@\n <2324> DW_AT_name : (string) y\n <2326> DW_AT_decl_file : (implicit_const) 1\n <2326> DW_AT_decl_line : (data2) 425\n <2328> DW_AT_decl_column : (data1) 9\n <2329> DW_AT_type : (ref_addr) <0x3f>, int\n <232d> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><2330>: Abbrev Number: 19 (DW_TAG_variable)\n- <2331> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <2331> DW_AT_name : (strp) (offset: 0x7d7): color\n <2335> DW_AT_decl_file : (implicit_const) 1\n <2335> DW_AT_decl_line : (data2) 426\n <2337> DW_AT_decl_column : (data1) 15\n <2338> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <233c> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><233f>: Abbrev Number: 12 (DW_TAG_variable)\n <2340> DW_AT_name : (string) lum\n@@ -4922,27 +4922,27 @@\n <2344> DW_AT_decl_line : (data2) 427\n <2346> DW_AT_decl_column : (data1) 7\n <2347> DW_AT_type : (ref_addr) <0x3f>, int\n <234b> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><234e>: Abbrev Number: 0\n <1><234f>: Abbrev Number: 51 (DW_TAG_subprogram)\n <2350> DW_AT_external : (flag_present) 1\n- <2350> DW_AT_name : (strp) (offset: 0x386): dynamic_threshold\n+ <2350> DW_AT_name : (strp) (offset: 0x388): dynamic_threshold\n <2354> DW_AT_decl_file : (implicit_const) 1\n <2354> DW_AT_decl_line : (data2) 378\n <2356> DW_AT_decl_column : (data1) 13\n <2357> DW_AT_prototyped : (flag_present) 1\n <2357> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <235b> DW_AT_low_pc : (addr) 0x9474\n <235f> DW_AT_high_pc : (udata) 312\n <2361> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2363> DW_AT_call_all_tail_calls: (flag_present) 1\n <2363> DW_AT_sibling : (ref_udata) <0x2435>\n <2><2365>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <2366> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2366> DW_AT_name : (strp) (offset: 0xe81): source_image\n <236a> DW_AT_decl_file : (implicit_const) 1\n <236a> DW_AT_decl_line : (data2) 378\n <236c> DW_AT_decl_column : (data1) 44\n <236d> DW_AT_type : (ref_addr) <0x3f5>\n <2371> DW_AT_location : (exprloc) 3 byte block: 91 b4 7f \t(DW_OP_fbreg: -76)\n <2><2375>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <2376> DW_AT_name : (string) t\n@@ -4969,36 +4969,36 @@\n <23a2> DW_AT_name : (string) wh\n <23a5> DW_AT_decl_file : (implicit_const) 1\n <23a5> DW_AT_decl_line : (data2) 379\n <23a7> DW_AT_decl_column : (data1) 43\n <23a8> DW_AT_type : (ref_addr) <0x3f>, int\n <23ac> DW_AT_location : (exprloc) 3 byte block: 91 a0 7f \t(DW_OP_fbreg: -96)\n <2><23b0>: Abbrev Number: 19 (DW_TAG_variable)\n- <23b1> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <23b1> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <23b5> DW_AT_decl_file : (implicit_const) 1\n <23b5> DW_AT_decl_line : (data2) 381\n <23b7> DW_AT_decl_column : (data1) 15\n <23b8> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <23bc> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><23bf>: Abbrev Number: 19 (DW_TAG_variable)\n- <23c0> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <23c0> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <23c4> DW_AT_decl_file : (implicit_const) 1\n <23c4> DW_AT_decl_line : (data2) 382\n <23c6> DW_AT_decl_column : (data1) 15\n <23c7> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <23cb> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><23ce>: Abbrev Number: 19 (DW_TAG_variable)\n- <23cf> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <23cf> DW_AT_name : (strp) (offset: 0x9d6): height\n <23d3> DW_AT_decl_file : (implicit_const) 1\n <23d3> DW_AT_decl_line : (data2) 383\n <23d5> DW_AT_decl_column : (data1) 7\n <23d6> DW_AT_type : (ref_addr) <0x3f>, int\n <23da> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><23dd>: Abbrev Number: 19 (DW_TAG_variable)\n- <23de> DW_AT_name : (strp) (offset: 0xad9): width\n+ <23de> DW_AT_name : (strp) (offset: 0xadb): width\n <23e2> DW_AT_decl_file : (implicit_const) 1\n <23e2> DW_AT_decl_line : (data2) 383\n <23e4> DW_AT_decl_column : (data1) 15\n <23e5> DW_AT_type : (ref_addr) <0x3f>, int\n <23e9> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><23ec>: Abbrev Number: 12 (DW_TAG_variable)\n <23ed> DW_AT_name : (string) x\n@@ -5011,50 +5011,50 @@\n <23fb> DW_AT_name : (string) y\n <23fd> DW_AT_decl_file : (implicit_const) 1\n <23fd> DW_AT_decl_line : (data2) 384\n <23ff> DW_AT_decl_column : (data1) 9\n <2400> DW_AT_type : (ref_addr) <0x3f>, int\n <2404> DW_AT_location : (exprloc) 2 byte block: 91 40 \t(DW_OP_fbreg: -64)\n <2><2407>: Abbrev Number: 19 (DW_TAG_variable)\n- <2408> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <2408> DW_AT_name : (strp) (offset: 0x7d7): color\n <240c> DW_AT_decl_file : (implicit_const) 1\n <240c> DW_AT_decl_line : (data2) 385\n <240e> DW_AT_decl_column : (data1) 15\n <240f> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <2413> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><2416>: Abbrev Number: 12 (DW_TAG_variable)\n <2417> DW_AT_name : (string) lum\n <241b> DW_AT_decl_file : (implicit_const) 1\n <241b> DW_AT_decl_line : (data2) 386\n <241d> DW_AT_decl_column : (data1) 7\n <241e> DW_AT_type : (ref_addr) <0x3f>, int\n <2422> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><2425>: Abbrev Number: 19 (DW_TAG_variable)\n- <2426> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <2426> DW_AT_name : (strp) (offset: 0xd07): thresh\n <242a> DW_AT_decl_file : (implicit_const) 1\n <242a> DW_AT_decl_line : (data2) 387\n <242c> DW_AT_decl_column : (data1) 10\n <242d> DW_AT_type : (ref_addr) <0x3f7>, double\n <2431> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><2434>: Abbrev Number: 0\n <1><2435>: Abbrev Number: 51 (DW_TAG_subprogram)\n <2436> DW_AT_external : (flag_present) 1\n- <2436> DW_AT_name : (strp) (offset: 0x462): gray_stretch\n+ <2436> DW_AT_name : (strp) (offset: 0x464): gray_stretch\n <243a> DW_AT_decl_file : (implicit_const) 1\n <243a> DW_AT_decl_line : (data2) 310\n <243c> DW_AT_decl_column : (data1) 13\n <243d> DW_AT_prototyped : (flag_present) 1\n <243d> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2441> DW_AT_low_pc : (addr) 0x91b4\n <2445> DW_AT_high_pc : (udata) 704\n <2447> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2449> DW_AT_call_all_tail_calls: (flag_present) 1\n <2449> DW_AT_sibling : (ref_udata) <0x24fd>\n <2><244b>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <244c> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <244c> DW_AT_name : (strp) (offset: 0xe81): source_image\n <2450> DW_AT_decl_file : (implicit_const) 1\n <2450> DW_AT_decl_line : (data2) 310\n <2452> DW_AT_decl_column : (data1) 39\n <2453> DW_AT_type : (ref_addr) <0x3f5>\n <2457> DW_AT_location : (exprloc) 3 byte block: 91 bc 7f \t(DW_OP_fbreg: -68)\n <2><245b>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <245c> DW_AT_name : (string) t1\n@@ -5074,36 +5074,36 @@\n <247a> DW_AT_name : (string) lt\n <247d> DW_AT_decl_file : (implicit_const) 1\n <247d> DW_AT_decl_line : (data2) 311\n <247f> DW_AT_decl_column : (data1) 38\n <2480> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2484> DW_AT_location : (exprloc) 3 byte block: 91 b8 7f \t(DW_OP_fbreg: -72)\n <2><2488>: Abbrev Number: 19 (DW_TAG_variable)\n- <2489> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <2489> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <248d> DW_AT_decl_file : (implicit_const) 1\n <248d> DW_AT_decl_line : (data2) 313\n <248f> DW_AT_decl_column : (data1) 15\n <2490> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2494> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><2497>: Abbrev Number: 19 (DW_TAG_variable)\n- <2498> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <2498> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <249c> DW_AT_decl_file : (implicit_const) 1\n <249c> DW_AT_decl_line : (data2) 314\n <249e> DW_AT_decl_column : (data1) 15\n <249f> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <24a3> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><24a6>: Abbrev Number: 19 (DW_TAG_variable)\n- <24a7> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <24a7> DW_AT_name : (strp) (offset: 0x9d6): height\n <24ab> DW_AT_decl_file : (implicit_const) 1\n <24ab> DW_AT_decl_line : (data2) 315\n <24ad> DW_AT_decl_column : (data1) 7\n <24ae> DW_AT_type : (ref_addr) <0x3f>, int\n <24b2> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><24b5>: Abbrev Number: 19 (DW_TAG_variable)\n- <24b6> DW_AT_name : (strp) (offset: 0xad9): width\n+ <24b6> DW_AT_name : (strp) (offset: 0xadb): width\n <24ba> DW_AT_decl_file : (implicit_const) 1\n <24ba> DW_AT_decl_line : (data2) 315\n <24bc> DW_AT_decl_column : (data1) 15\n <24bd> DW_AT_type : (ref_addr) <0x3f>, int\n <24c1> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><24c4>: Abbrev Number: 12 (DW_TAG_variable)\n <24c5> DW_AT_name : (string) x\n@@ -5116,15 +5116,15 @@\n <24d2> DW_AT_name : (string) y\n <24d4> DW_AT_decl_file : (implicit_const) 1\n <24d4> DW_AT_decl_line : (data2) 316\n <24d6> DW_AT_decl_column : (data1) 9\n <24d7> DW_AT_type : (ref_addr) <0x3f>, int\n <24db> DW_AT_location : (exprloc) 2 byte block: 91 44 \t(DW_OP_fbreg: -60)\n <2><24de>: Abbrev Number: 19 (DW_TAG_variable)\n- <24df> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <24df> DW_AT_name : (strp) (offset: 0x7d7): color\n <24e3> DW_AT_decl_file : (implicit_const) 1\n <24e3> DW_AT_decl_line : (data2) 317\n <24e5> DW_AT_decl_column : (data1) 15\n <24e6> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <24ea> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><24ed>: Abbrev Number: 12 (DW_TAG_variable)\n <24ee> DW_AT_name : (string) lum\n@@ -5132,34 +5132,34 @@\n <24f2> DW_AT_decl_line : (data2) 318\n <24f4> DW_AT_decl_column : (data1) 7\n <24f5> DW_AT_type : (ref_addr) <0x3f>, int\n <24f9> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><24fc>: Abbrev Number: 0\n <1><24fd>: Abbrev Number: 51 (DW_TAG_subprogram)\n <24fe> DW_AT_external : (flag_present) 1\n- <24fe> DW_AT_name : (strp) (offset: 0x915): remove_isolated\n+ <24fe> DW_AT_name : (strp) (offset: 0x917): remove_isolated\n <2502> DW_AT_decl_file : (implicit_const) 1\n <2502> DW_AT_decl_line : (data2) 302\n <2504> DW_AT_decl_column : (data1) 13\n <2505> DW_AT_prototyped : (flag_present) 1\n <2505> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2509> DW_AT_low_pc : (addr) 0x9158\n <250d> DW_AT_high_pc : (udata) 92\n <250e> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2510> DW_AT_call_all_tail_calls: (flag_present) 1\n <2510> DW_AT_sibling : (ref_udata) <0x253f>\n <2><2512>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <2513> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2513> DW_AT_name : (strp) (offset: 0xe81): source_image\n <2517> DW_AT_decl_file : (implicit_const) 1\n <2517> DW_AT_decl_line : (data2) 302\n <2519> DW_AT_decl_column : (data1) 42\n <251a> DW_AT_type : (ref_addr) <0x3f5>\n <251e> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2521>: Abbrev Number: 48 (DW_TAG_formal_parameter)\n- <2522> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <2522> DW_AT_name : (strp) (offset: 0xd07): thresh\n <2526> DW_AT_decl_file : (implicit_const) 1\n <2526> DW_AT_decl_line : (data2) 302\n <2528> DW_AT_decl_column : (data1) 63\n <2529> DW_AT_type : (ref_addr) <0x3f7>, double\n <252d> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><2530>: Abbrev Number: 57 (DW_TAG_formal_parameter)\n <2531> DW_AT_name : (string) lt\n@@ -5179,64 +5179,64 @@\n <2546> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <254a> DW_AT_low_pc : (addr) 0x8fcc\n <254e> DW_AT_high_pc : (udata) 396\n <2550> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2552> DW_AT_call_all_tail_calls: (flag_present) 1\n <2552> DW_AT_sibling : (ref_udata) <0x2623>\n <2><2554>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2555> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2555> DW_AT_name : (strp) (offset: 0xe81): source_image\n <2559> DW_AT_decl_file : (implicit_const) 1\n <2559> DW_AT_decl_line : (data1) 240\n <255a> DW_AT_decl_column : (data1) 45\n <255b> DW_AT_type : (ref_addr) <0x3f5>\n <255f> DW_AT_location : (exprloc) 3 byte block: 91 b4 7f \t(DW_OP_fbreg: -76)\n <2><2563>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2564> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <2564> DW_AT_name : (strp) (offset: 0xd07): thresh\n <2568> DW_AT_decl_file : (implicit_const) 1\n <2568> DW_AT_decl_line : (data1) 240\n <2569> DW_AT_decl_column : (data1) 66\n <256a> DW_AT_type : (ref_addr) <0x3f7>, double\n <256e> DW_AT_location : (exprloc) 3 byte block: 91 a8 7f \t(DW_OP_fbreg: -88)\n <2><2572>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <2573> DW_AT_name : (string) lt\n <2576> DW_AT_decl_file : (implicit_const) 1\n <2576> DW_AT_decl_line : (data1) 241\n <2577> DW_AT_decl_column : (data1) 44\n <2578> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <257c> DW_AT_location : (exprloc) 3 byte block: 91 b0 7f \t(DW_OP_fbreg: -80)\n <2><2580>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2581> DW_AT_name : (strp) (offset: 0x23c): mask\n+ <2581> DW_AT_name : (strp) (offset: 0x224): mask\n <2585> DW_AT_decl_file : (implicit_const) 1\n <2585> DW_AT_decl_line : (data1) 241\n <2586> DW_AT_decl_column : (data1) 52\n <2587> DW_AT_type : (ref_addr) <0x3f>, int\n <258b> DW_AT_location : (exprloc) 3 byte block: 91 a4 7f \t(DW_OP_fbreg: -92)\n <2><258f>: Abbrev Number: 11 (DW_TAG_variable)\n- <2590> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <2590> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <2594> DW_AT_decl_file : (implicit_const) 1\n <2594> DW_AT_decl_line : (data1) 243\n <2595> DW_AT_decl_column : (data1) 15\n <2596> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <259a> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><259d>: Abbrev Number: 11 (DW_TAG_variable)\n- <259e> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <259e> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <25a2> DW_AT_decl_file : (implicit_const) 1\n <25a2> DW_AT_decl_line : (data1) 244\n <25a3> DW_AT_decl_column : (data1) 15\n <25a4> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <25a8> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><25ab>: Abbrev Number: 11 (DW_TAG_variable)\n- <25ac> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <25ac> DW_AT_name : (strp) (offset: 0x9d6): height\n <25b0> DW_AT_decl_file : (implicit_const) 1\n <25b0> DW_AT_decl_line : (data1) 245\n <25b1> DW_AT_decl_column : (data1) 7\n <25b2> DW_AT_type : (ref_addr) <0x3f>, int\n <25b6> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><25b9>: Abbrev Number: 11 (DW_TAG_variable)\n- <25ba> DW_AT_name : (strp) (offset: 0xad9): width\n+ <25ba> DW_AT_name : (strp) (offset: 0xadb): width\n <25be> DW_AT_decl_file : (implicit_const) 1\n <25be> DW_AT_decl_line : (data1) 245\n <25bf> DW_AT_decl_column : (data1) 15\n <25c0> DW_AT_type : (ref_addr) <0x3f>, int\n <25c4> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><25c7>: Abbrev Number: 43 (DW_TAG_variable)\n <25c8> DW_AT_name : (string) x\n@@ -5263,22 +5263,22 @@\n <25ed> DW_AT_name : (string) j\n <25ef> DW_AT_decl_file : (implicit_const) 1\n <25ef> DW_AT_decl_line : (data1) 246\n <25f0> DW_AT_decl_column : (data1) 13\n <25f1> DW_AT_type : (ref_addr) <0x3f>, int\n <25f5> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><25f8>: Abbrev Number: 11 (DW_TAG_variable)\n- <25f9> DW_AT_name : (strp) (offset: 0xdff): set_pixel\n+ <25f9> DW_AT_name : (strp) (offset: 0xdf7): set_pixel\n <25fd> DW_AT_decl_file : (implicit_const) 1\n <25fd> DW_AT_decl_line : (data1) 247\n <25fe> DW_AT_decl_column : (data1) 7\n <25ff> DW_AT_type : (ref_addr) <0x3f>, int\n <2603> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><2606>: Abbrev Number: 11 (DW_TAG_variable)\n- <2607> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <2607> DW_AT_name : (strp) (offset: 0x7d7): color\n <260b> DW_AT_decl_file : (implicit_const) 1\n <260b> DW_AT_decl_line : (data1) 248\n <260c> DW_AT_decl_column : (data1) 15\n <260d> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <2611> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><2614>: Abbrev Number: 43 (DW_TAG_variable)\n <2615> DW_AT_name : (string) lum\n@@ -5286,34 +5286,34 @@\n <2619> DW_AT_decl_line : (data1) 249\n <261a> DW_AT_decl_column : (data1) 7\n <261b> DW_AT_type : (ref_addr) <0x3f>, int\n <261f> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><2622>: Abbrev Number: 0\n <1><2623>: Abbrev Number: 56 (DW_TAG_subprogram)\n <2624> DW_AT_external : (flag_present) 1\n- <2624> DW_AT_name : (strp) (offset: 0x65b): opening\n+ <2624> DW_AT_name : (strp) (offset: 0x65d): opening\n <2628> DW_AT_decl_file : (implicit_const) 1\n <2628> DW_AT_decl_line : (data1) 223\n <2629> DW_AT_decl_column : (data1) 13\n <262a> DW_AT_prototyped : (flag_present) 1\n <262a> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <262e> DW_AT_low_pc : (addr) 0x8f4c\n <2632> DW_AT_high_pc : (udata) 128\n <2634> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2636> DW_AT_call_all_tail_calls: (flag_present) 1\n <2636> DW_AT_sibling : (ref_udata) <0x268a>\n <2><2638>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2639> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2639> DW_AT_name : (strp) (offset: 0xe81): source_image\n <263d> DW_AT_decl_file : (implicit_const) 1\n <263d> DW_AT_decl_line : (data1) 223\n <263e> DW_AT_decl_column : (data1) 34\n <263f> DW_AT_type : (ref_addr) <0x3f5>\n <2643> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><2646>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2647> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <2647> DW_AT_name : (strp) (offset: 0xd07): thresh\n <264b> DW_AT_decl_file : (implicit_const) 1\n <264b> DW_AT_decl_line : (data1) 223\n <264c> DW_AT_decl_column : (data1) 55\n <264d> DW_AT_type : (ref_addr) <0x3f7>, double\n <2651> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><2654>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <2655> DW_AT_name : (string) lt\n@@ -5326,50 +5326,50 @@\n <2662> DW_AT_name : (string) n\n <2664> DW_AT_decl_file : (implicit_const) 1\n <2664> DW_AT_decl_line : (data1) 224\n <2665> DW_AT_decl_column : (data1) 25\n <2666> DW_AT_type : (ref_addr) <0x3f>, int\n <266a> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><266d>: Abbrev Number: 11 (DW_TAG_variable)\n- <266e> DW_AT_name : (strp) (offset: 0xe11): temp_image\n+ <266e> DW_AT_name : (strp) (offset: 0xe09): temp_image\n <2672> DW_AT_decl_file : (implicit_const) 1\n <2672> DW_AT_decl_line : (data1) 226\n <2673> DW_AT_decl_column : (data1) 15\n <2674> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2678> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><267b>: Abbrev Number: 11 (DW_TAG_variable)\n- <267c> DW_AT_name : (strp) (offset: 0xc46): return_image\n+ <267c> DW_AT_name : (strp) (offset: 0xc48): return_image\n <2680> DW_AT_decl_file : (implicit_const) 1\n <2680> DW_AT_decl_line : (data1) 226\n <2681> DW_AT_decl_column : (data1) 27\n <2682> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2686> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><2689>: Abbrev Number: 0\n <1><268a>: Abbrev Number: 56 (DW_TAG_subprogram)\n <268b> DW_AT_external : (flag_present) 1\n- <268b> DW_AT_name : (strp) (offset: 0x9db): closing\n+ <268b> DW_AT_name : (strp) (offset: 0x9dd): closing\n <268f> DW_AT_decl_file : (implicit_const) 1\n <268f> DW_AT_decl_line : (data1) 210\n <2690> DW_AT_decl_column : (data1) 13\n <2691> DW_AT_prototyped : (flag_present) 1\n <2691> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2695> DW_AT_low_pc : (addr) 0x8ecc\n <2699> DW_AT_high_pc : (udata) 128\n <269b> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <269d> DW_AT_call_all_tail_calls: (flag_present) 1\n <269d> DW_AT_sibling : (ref_udata) <0x26f1>\n <2><269f>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <26a0> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <26a0> DW_AT_name : (strp) (offset: 0xe81): source_image\n <26a4> DW_AT_decl_file : (implicit_const) 1\n <26a4> DW_AT_decl_line : (data1) 210\n <26a5> DW_AT_decl_column : (data1) 34\n <26a6> DW_AT_type : (ref_addr) <0x3f5>\n <26aa> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><26ad>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <26ae> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <26ae> DW_AT_name : (strp) (offset: 0xd07): thresh\n <26b2> DW_AT_decl_file : (implicit_const) 1\n <26b2> DW_AT_decl_line : (data1) 210\n <26b3> DW_AT_decl_column : (data1) 55\n <26b4> DW_AT_type : (ref_addr) <0x3f7>, double\n <26b8> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><26bb>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <26bc> DW_AT_name : (string) lt\n@@ -5382,50 +5382,50 @@\n <26c9> DW_AT_name : (string) n\n <26cb> DW_AT_decl_file : (implicit_const) 1\n <26cb> DW_AT_decl_line : (data1) 211\n <26cc> DW_AT_decl_column : (data1) 25\n <26cd> DW_AT_type : (ref_addr) <0x3f>, int\n <26d1> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><26d4>: Abbrev Number: 11 (DW_TAG_variable)\n- <26d5> DW_AT_name : (strp) (offset: 0xe11): temp_image\n+ <26d5> DW_AT_name : (strp) (offset: 0xe09): temp_image\n <26d9> DW_AT_decl_file : (implicit_const) 1\n <26d9> DW_AT_decl_line : (data1) 213\n <26da> DW_AT_decl_column : (data1) 15\n <26db> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <26df> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><26e2>: Abbrev Number: 11 (DW_TAG_variable)\n- <26e3> DW_AT_name : (strp) (offset: 0xc46): return_image\n+ <26e3> DW_AT_name : (strp) (offset: 0xc48): return_image\n <26e7> DW_AT_decl_file : (implicit_const) 1\n <26e7> DW_AT_decl_line : (data1) 213\n <26e8> DW_AT_decl_column : (data1) 27\n <26e9> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <26ed> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><26f0>: Abbrev Number: 0\n <1><26f1>: Abbrev Number: 56 (DW_TAG_subprogram)\n <26f2> DW_AT_external : (flag_present) 1\n- <26f2> DW_AT_name : (strp) (offset: 0x3e8): erosion\n+ <26f2> DW_AT_name : (strp) (offset: 0x3ea): erosion\n <26f6> DW_AT_decl_file : (implicit_const) 1\n <26f6> DW_AT_decl_line : (data1) 204\n <26f7> DW_AT_decl_column : (data1) 13\n <26f8> DW_AT_prototyped : (flag_present) 1\n <26f8> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <26fc> DW_AT_low_pc : (addr) 0x8e6c\n <2700> DW_AT_high_pc : (udata) 96\n <2701> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2703> DW_AT_call_all_tail_calls: (flag_present) 1\n <2703> DW_AT_sibling : (ref_udata) <0x273b>\n <2><2705>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2706> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2706> DW_AT_name : (strp) (offset: 0xe81): source_image\n <270a> DW_AT_decl_file : (implicit_const) 1\n <270a> DW_AT_decl_line : (data1) 204\n <270b> DW_AT_decl_column : (data1) 34\n <270c> DW_AT_type : (ref_addr) <0x3f5>\n <2710> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2713>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2714> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <2714> DW_AT_name : (strp) (offset: 0xd07): thresh\n <2718> DW_AT_decl_file : (implicit_const) 1\n <2718> DW_AT_decl_line : (data1) 204\n <2719> DW_AT_decl_column : (data1) 55\n <271a> DW_AT_type : (ref_addr) <0x3f7>, double\n <271e> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><2721>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <2722> DW_AT_name : (string) lt\n@@ -5440,34 +5440,34 @@\n <2731> DW_AT_decl_line : (data1) 205\n <2732> DW_AT_decl_column : (data1) 25\n <2733> DW_AT_type : (ref_addr) <0x3f>, int\n <2737> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><273a>: Abbrev Number: 0\n <1><273b>: Abbrev Number: 56 (DW_TAG_subprogram)\n <273c> DW_AT_external : (flag_present) 1\n- <273c> DW_AT_name : (strp) (offset: 0x34b): dilation\n+ <273c> DW_AT_name : (strp) (offset: 0x34d): dilation\n <2740> DW_AT_decl_file : (implicit_const) 1\n <2740> DW_AT_decl_line : (data1) 198\n <2741> DW_AT_decl_column : (data1) 13\n <2742> DW_AT_prototyped : (flag_present) 1\n <2742> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2746> DW_AT_low_pc : (addr) 0x8e0c\n <274a> DW_AT_high_pc : (udata) 96\n <274b> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <274d> DW_AT_call_all_tail_calls: (flag_present) 1\n <274d> DW_AT_sibling : (ref_udata) <0x2785>\n <2><274f>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2750> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <2750> DW_AT_name : (strp) (offset: 0xe81): source_image\n <2754> DW_AT_decl_file : (implicit_const) 1\n <2754> DW_AT_decl_line : (data1) 198\n <2755> DW_AT_decl_column : (data1) 35\n <2756> DW_AT_type : (ref_addr) <0x3f5>\n <275a> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><275d>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <275e> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <275e> DW_AT_name : (strp) (offset: 0xd07): thresh\n <2762> DW_AT_decl_file : (implicit_const) 1\n <2762> DW_AT_decl_line : (data1) 198\n <2763> DW_AT_decl_column : (data1) 56\n <2764> DW_AT_type : (ref_addr) <0x3f7>, double\n <2768> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><276b>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <276c> DW_AT_name : (string) lt\n@@ -5482,146 +5482,146 @@\n <277b> DW_AT_decl_line : (data1) 199\n <277c> DW_AT_decl_column : (data1) 26\n <277d> DW_AT_type : (ref_addr) <0x3f>, int\n <2781> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><2784>: Abbrev Number: 0\n <1><2785>: Abbrev Number: 56 (DW_TAG_subprogram)\n <2786> DW_AT_external : (flag_present) 1\n- <2786> DW_AT_name : (strp) (offset: 0xddd): set_pixels_filter_iter\n+ <2786> DW_AT_name : (strp) (offset: 0xdd5): set_pixels_filter_iter\n <278a> DW_AT_decl_file : (implicit_const) 1\n <278a> DW_AT_decl_line : (data1) 182\n <278b> DW_AT_decl_column : (data1) 13\n <278c> DW_AT_prototyped : (flag_present) 1\n <278c> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2790> DW_AT_low_pc : (addr) 0x8d70\n <2794> DW_AT_high_pc : (udata) 156\n <2796> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2798> DW_AT_call_all_tail_calls: (flag_present) 1\n <2798> DW_AT_sibling : (ref_udata) <0x2808>\n <2><279a>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <279b> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <279b> DW_AT_name : (strp) (offset: 0xe81): source_image\n <279f> DW_AT_decl_file : (implicit_const) 1\n <279f> DW_AT_decl_line : (data1) 182\n <27a0> DW_AT_decl_column : (data1) 49\n <27a1> DW_AT_type : (ref_addr) <0x3f5>\n <27a5> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><27a8>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <27a9> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <27a9> DW_AT_name : (strp) (offset: 0xd07): thresh\n <27ad> DW_AT_decl_file : (implicit_const) 1\n <27ad> DW_AT_decl_line : (data1) 182\n <27ae> DW_AT_decl_column : (data1) 70\n <27af> DW_AT_type : (ref_addr) <0x3f7>, double\n <27b3> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><27b6>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <27b7> DW_AT_name : (string) lt\n <27ba> DW_AT_decl_file : (implicit_const) 1\n <27ba> DW_AT_decl_line : (data1) 183\n <27bb> DW_AT_decl_column : (data1) 48\n <27bc> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <27c0> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><27c3>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <27c4> DW_AT_name : (strp) (offset: 0x23c): mask\n+ <27c4> DW_AT_name : (strp) (offset: 0x224): mask\n <27c8> DW_AT_decl_file : (implicit_const) 1\n <27c8> DW_AT_decl_line : (data1) 183\n <27c9> DW_AT_decl_column : (data1) 56\n <27ca> DW_AT_type : (ref_addr) <0x3f>, int\n <27ce> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><27d1>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <27d2> DW_AT_name : (strp) (offset: 0xdef): iter\n+ <27d2> DW_AT_name : (strp) (offset: 0xde7): iter\n <27d6> DW_AT_decl_file : (implicit_const) 1\n <27d6> DW_AT_decl_line : (data1) 183\n <27d7> DW_AT_decl_column : (data1) 66\n <27d8> DW_AT_type : (ref_addr) <0x3f>, int\n <27dc> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><27df>: Abbrev Number: 43 (DW_TAG_variable)\n <27e0> DW_AT_name : (string) i\n <27e2> DW_AT_decl_file : (implicit_const) 1\n <27e2> DW_AT_decl_line : (data1) 185\n <27e3> DW_AT_decl_column : (data1) 7\n <27e4> DW_AT_type : (ref_addr) <0x3f>, int\n <27e8> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><27eb>: Abbrev Number: 11 (DW_TAG_variable)\n- <27ec> DW_AT_name : (strp) (offset: 0xdb2): temp_image1\n+ <27ec> DW_AT_name : (strp) (offset: 0xdaa): temp_image1\n <27f0> DW_AT_decl_file : (implicit_const) 1\n <27f0> DW_AT_decl_line : (data1) 186\n <27f1> DW_AT_decl_column : (data1) 15\n <27f2> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <27f6> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><27f9>: Abbrev Number: 11 (DW_TAG_variable)\n- <27fa> DW_AT_name : (strp) (offset: 0xdbe): temp_image2\n+ <27fa> DW_AT_name : (strp) (offset: 0xdb6): temp_image2\n <27fe> DW_AT_decl_file : (implicit_const) 1\n <27fe> DW_AT_decl_line : (data1) 186\n <27ff> DW_AT_decl_column : (data1) 28\n <2800> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2804> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><2807>: Abbrev Number: 0\n <1><2808>: Abbrev Number: 56 (DW_TAG_subprogram)\n <2809> DW_AT_external : (flag_present) 1\n- <2809> DW_AT_name : (strp) (offset: 0x11e): set_pixels_filter\n+ <2809> DW_AT_name : (strp) (offset: 0x106): set_pixels_filter\n <280d> DW_AT_decl_file : (implicit_const) 1\n <280d> DW_AT_decl_line : (data1) 131\n <280e> DW_AT_decl_column : (data1) 13\n <280f> DW_AT_prototyped : (flag_present) 1\n <280f> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2813> DW_AT_low_pc : (addr) 0x8c30\n <2817> DW_AT_high_pc : (udata) 320\n <2819> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <281b> DW_AT_call_all_tail_calls: (flag_present) 1\n <281b> DW_AT_sibling : (ref_udata) <0x28ec>\n <2><281d>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <281e> DW_AT_name : (strp) (offset: 0xe7f): source_image\n+ <281e> DW_AT_name : (strp) (offset: 0xe81): source_image\n <2822> DW_AT_decl_file : (implicit_const) 1\n <2822> DW_AT_decl_line : (data1) 131\n <2823> DW_AT_decl_column : (data1) 44\n <2824> DW_AT_type : (ref_addr) <0x3f5>\n <2828> DW_AT_location : (exprloc) 3 byte block: 91 b4 7f \t(DW_OP_fbreg: -76)\n <2><282c>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <282d> DW_AT_name : (strp) (offset: 0xd05): thresh\n+ <282d> DW_AT_name : (strp) (offset: 0xd07): thresh\n <2831> DW_AT_decl_file : (implicit_const) 1\n <2831> DW_AT_decl_line : (data1) 131\n <2832> DW_AT_decl_column : (data1) 65\n <2833> DW_AT_type : (ref_addr) <0x3f7>, double\n <2837> DW_AT_location : (exprloc) 3 byte block: 91 a8 7f \t(DW_OP_fbreg: -88)\n <2><283b>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <283c> DW_AT_name : (string) lt\n <283f> DW_AT_decl_file : (implicit_const) 1\n <283f> DW_AT_decl_line : (data1) 132\n <2840> DW_AT_decl_column : (data1) 43\n <2841> DW_AT_type : (ref_addr) <0x277>, luminance_t, luminance_e\n <2845> DW_AT_location : (exprloc) 3 byte block: 91 b0 7f \t(DW_OP_fbreg: -80)\n <2><2849>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <284a> DW_AT_name : (strp) (offset: 0x23c): mask\n+ <284a> DW_AT_name : (strp) (offset: 0x224): mask\n <284e> DW_AT_decl_file : (implicit_const) 1\n <284e> DW_AT_decl_line : (data1) 132\n <284f> DW_AT_decl_column : (data1) 51\n <2850> DW_AT_type : (ref_addr) <0x3f>, int\n <2854> DW_AT_location : (exprloc) 3 byte block: 91 a4 7f \t(DW_OP_fbreg: -92)\n <2><2858>: Abbrev Number: 11 (DW_TAG_variable)\n- <2859> DW_AT_name : (strp) (offset: 0x3ba): new_image\n+ <2859> DW_AT_name : (strp) (offset: 0x3bc): new_image\n <285d> DW_AT_decl_file : (implicit_const) 1\n <285d> DW_AT_decl_line : (data1) 134\n <285e> DW_AT_decl_column : (data1) 15\n <285f> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2863> DW_AT_location : (exprloc) 2 byte block: 91 5c \t(DW_OP_fbreg: -36)\n <2><2866>: Abbrev Number: 11 (DW_TAG_variable)\n- <2867> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <2867> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <286b> DW_AT_decl_file : (implicit_const) 1\n <286b> DW_AT_decl_line : (data1) 135\n <286c> DW_AT_decl_column : (data1) 15\n <286d> DW_AT_type : (ref_addr) <0x2d8>, Imlib_Image\n <2871> DW_AT_location : (exprloc) 2 byte block: 91 50 \t(DW_OP_fbreg: -48)\n <2><2874>: Abbrev Number: 11 (DW_TAG_variable)\n- <2875> DW_AT_name : (strp) (offset: 0x9d4): height\n+ <2875> DW_AT_name : (strp) (offset: 0x9d6): height\n <2879> DW_AT_decl_file : (implicit_const) 1\n <2879> DW_AT_decl_line : (data1) 136\n <287a> DW_AT_decl_column : (data1) 7\n <287b> DW_AT_type : (ref_addr) <0x3f>, int\n <287f> DW_AT_location : (exprloc) 2 byte block: 91 54 \t(DW_OP_fbreg: -44)\n <2><2882>: Abbrev Number: 11 (DW_TAG_variable)\n- <2883> DW_AT_name : (strp) (offset: 0xad9): width\n+ <2883> DW_AT_name : (strp) (offset: 0xadb): width\n <2887> DW_AT_decl_file : (implicit_const) 1\n <2887> DW_AT_decl_line : (data1) 136\n <2888> DW_AT_decl_column : (data1) 15\n <2889> DW_AT_type : (ref_addr) <0x3f>, int\n <288d> DW_AT_location : (exprloc) 2 byte block: 91 58 \t(DW_OP_fbreg: -40)\n <2><2890>: Abbrev Number: 43 (DW_TAG_variable)\n <2891> DW_AT_name : (string) x\n@@ -5648,22 +5648,22 @@\n <28b6> DW_AT_name : (string) j\n <28b8> DW_AT_decl_file : (implicit_const) 1\n <28b8> DW_AT_decl_line : (data1) 137\n <28b9> DW_AT_decl_column : (data1) 13\n <28ba> DW_AT_type : (ref_addr) <0x3f>, int\n <28be> DW_AT_location : (exprloc) 2 byte block: 91 48 \t(DW_OP_fbreg: -56)\n <2><28c1>: Abbrev Number: 11 (DW_TAG_variable)\n- <28c2> DW_AT_name : (strp) (offset: 0xdff): set_pixel\n+ <28c2> DW_AT_name : (strp) (offset: 0xdf7): set_pixel\n <28c6> DW_AT_decl_file : (implicit_const) 1\n <28c6> DW_AT_decl_line : (data1) 138\n <28c7> DW_AT_decl_column : (data1) 7\n <28c8> DW_AT_type : (ref_addr) <0x3f>, int\n <28cc> DW_AT_location : (exprloc) 2 byte block: 91 4c \t(DW_OP_fbreg: -52)\n <2><28cf>: Abbrev Number: 11 (DW_TAG_variable)\n- <28d0> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <28d0> DW_AT_name : (strp) (offset: 0x7d7): color\n <28d4> DW_AT_decl_file : (implicit_const) 1\n <28d4> DW_AT_decl_line : (data1) 139\n <28d5> DW_AT_decl_column : (data1) 15\n <28d6> DW_AT_type : (ref_addr) <0x32a>, Imlib_Color\n <28da> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><28dd>: Abbrev Number: 43 (DW_TAG_variable)\n <28de> DW_AT_name : (string) lum\n@@ -5671,54 +5671,54 @@\n <28e2> DW_AT_decl_line : (data1) 140\n <28e3> DW_AT_decl_column : (data1) 7\n <28e4> DW_AT_type : (ref_addr) <0x3f>, int\n <28e8> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><28eb>: Abbrev Number: 0\n <1><28ec>: Abbrev Number: 56 (DW_TAG_subprogram)\n <28ed> DW_AT_external : (flag_present) 1\n- <28ed> DW_AT_name : (strp) (offset: 0x27c): is_pixel_set\n+ <28ed> DW_AT_name : (strp) (offset: 0x264): is_pixel_set\n <28f1> DW_AT_decl_file : (implicit_const) 1\n <28f1> DW_AT_decl_line : (data1) 103\n <28f2> DW_AT_decl_column : (data1) 5\n <28f3> DW_AT_prototyped : (flag_present) 1\n <28f3> DW_AT_type : (ref_addr) <0x3f>, int\n <28f7> DW_AT_low_pc : (addr) 0x8b30\n <28fb> DW_AT_high_pc : (udata) 256\n <28fd> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <28ff> DW_AT_call_all_tail_calls: (flag_present) 1\n <28ff> DW_AT_sibling : (ref_udata) <0x291e>\n <2><2901>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2902> DW_AT_name : (strp) (offset: 0xcfb): value\n+ <2902> DW_AT_name : (strp) (offset: 0xcfd): value\n <2906> DW_AT_decl_file : (implicit_const) 1\n <2906> DW_AT_decl_line : (data1) 103\n <2907> DW_AT_decl_column : (data1) 22\n <2908> DW_AT_type : (ref_addr) <0x3f>, int\n <290c> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><290f>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2910> DW_AT_name : (strp) (offset: 0x38e): threshold\n+ <2910> DW_AT_name : (strp) (offset: 0x390): threshold\n <2914> DW_AT_decl_file : (implicit_const) 1\n <2914> DW_AT_decl_line : (data1) 103\n <2915> DW_AT_decl_column : (data1) 36\n <2916> DW_AT_type : (ref_addr) <0x3f7>, double\n <291a> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><291d>: Abbrev Number: 0\n <1><291e>: Abbrev Number: 49 (DW_TAG_subprogram)\n <291f> DW_AT_external : (flag_present) 1\n- <291f> DW_AT_name : (strp) (offset: 0xca1): draw_bg_pixel\n+ <291f> DW_AT_name : (strp) (offset: 0xca3): draw_bg_pixel\n <2923> DW_AT_decl_file : (implicit_const) 1\n <2923> DW_AT_decl_line : (data1) 97\n <2924> DW_AT_decl_column : (implicit_const) 6\n <2924> DW_AT_prototyped : (flag_present) 1\n <2924> DW_AT_low_pc : (addr) 0x8adc\n <2928> DW_AT_high_pc : (udata) 84\n <2929> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <292b> DW_AT_call_all_tail_calls: (flag_present) 1\n <292b> DW_AT_sibling : (ref_udata) <0x2954>\n <2><292d>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <292e> DW_AT_name : (strp) (offset: 0xda1): image\n+ <292e> DW_AT_name : (strp) (offset: 0xd99): image\n <2932> DW_AT_decl_file : (implicit_const) 1\n <2932> DW_AT_decl_line : (data1) 97\n <2933> DW_AT_decl_column : (data1) 33\n <2934> DW_AT_type : (ref_addr) <0x3f5>\n <2938> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><293b>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <293c> DW_AT_name : (string) x\n@@ -5733,26 +5733,26 @@\n <294a> DW_AT_decl_line : (data1) 97\n <294b> DW_AT_decl_column : (data1) 51\n <294c> DW_AT_type : (ref_addr) <0x3f>, int\n <2950> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><2953>: Abbrev Number: 0\n <1><2954>: Abbrev Number: 49 (DW_TAG_subprogram)\n <2955> DW_AT_external : (flag_present) 1\n- <2955> DW_AT_name : (strp) (offset: 0xcd9): draw_fg_pixel\n+ <2955> DW_AT_name : (strp) (offset: 0xcdb): draw_fg_pixel\n <2959> DW_AT_decl_file : (implicit_const) 1\n <2959> DW_AT_decl_line : (data1) 91\n <295a> DW_AT_decl_column : (implicit_const) 6\n <295a> DW_AT_prototyped : (flag_present) 1\n <295a> DW_AT_low_pc : (addr) 0x8a88\n <295e> DW_AT_high_pc : (udata) 84\n <295f> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2961> DW_AT_call_all_tail_calls: (flag_present) 1\n <2961> DW_AT_sibling : (ref_udata) <0x298a>\n <2><2963>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2964> DW_AT_name : (strp) (offset: 0xda1): image\n+ <2964> DW_AT_name : (strp) (offset: 0xd99): image\n <2968> DW_AT_decl_file : (implicit_const) 1\n <2968> DW_AT_decl_line : (data1) 91\n <2969> DW_AT_decl_column : (data1) 33\n <296a> DW_AT_type : (ref_addr) <0x3f5>\n <296e> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2971>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <2972> DW_AT_name : (string) x\n@@ -5767,26 +5767,26 @@\n <2980> DW_AT_decl_line : (data1) 91\n <2981> DW_AT_decl_column : (data1) 51\n <2982> DW_AT_type : (ref_addr) <0x3f>, int\n <2986> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><2989>: Abbrev Number: 0\n <1><298a>: Abbrev Number: 49 (DW_TAG_subprogram)\n <298b> DW_AT_external : (flag_present) 1\n- <298b> DW_AT_name : (strp) (offset: 0x31d): draw_pixel\n+ <298b> DW_AT_name : (strp) (offset: 0x305): draw_pixel\n <298f> DW_AT_decl_file : (implicit_const) 1\n <298f> DW_AT_decl_line : (data1) 79\n <2990> DW_AT_decl_column : (implicit_const) 6\n <2990> DW_AT_prototyped : (flag_present) 1\n <2990> DW_AT_low_pc : (addr) 0x8a1c\n <2994> DW_AT_high_pc : (udata) 108\n <2995> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2997> DW_AT_call_all_tail_calls: (flag_present) 1\n <2997> DW_AT_sibling : (ref_udata) <0x29d9>\n <2><2999>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <299a> DW_AT_name : (strp) (offset: 0xda1): image\n+ <299a> DW_AT_name : (strp) (offset: 0xd99): image\n <299e> DW_AT_decl_file : (implicit_const) 1\n <299e> DW_AT_decl_line : (data1) 79\n <299f> DW_AT_decl_column : (data1) 30\n <29a0> DW_AT_type : (ref_addr) <0x3f5>\n <29a4> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><29a7>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <29a8> DW_AT_name : (string) x\n@@ -5799,148 +5799,148 @@\n <29b4> DW_AT_name : (string) y\n <29b6> DW_AT_decl_file : (implicit_const) 1\n <29b6> DW_AT_decl_line : (data1) 79\n <29b7> DW_AT_decl_column : (data1) 48\n <29b8> DW_AT_type : (ref_addr) <0x3f>, int\n <29bc> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><29bf>: Abbrev Number: 9 (DW_TAG_formal_parameter)\n- <29c0> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <29c0> DW_AT_name : (strp) (offset: 0x7d7): color\n <29c4> DW_AT_decl_file : (implicit_const) 1\n <29c4> DW_AT_decl_line : (data1) 79\n <29c5> DW_AT_decl_column : (data1) 59\n <29c6> DW_AT_type : (ref_udata) <0x1606>, fg_bg_t, fg_bg_e\n <29c7> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><29ca>: Abbrev Number: 11 (DW_TAG_variable)\n- <29cb> DW_AT_name : (strp) (offset: 0xcc5): current_image\n+ <29cb> DW_AT_name : (strp) (offset: 0xcc7): current_image\n <29cf> DW_AT_decl_file : (implicit_const) 1\n <29cf> DW_AT_decl_line : (data1) 81\n <29d0> DW_AT_decl_column : (data1) 16\n <29d1> DW_AT_type : (ref_addr) <0x3f5>\n <29d5> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><29d8>: Abbrev Number: 0\n <1><29d9>: Abbrev Number: 49 (DW_TAG_subprogram)\n <29da> DW_AT_external : (flag_present) 1\n- <29da> DW_AT_name : (strp) (offset: 0xeb3): ssocr_set_color\n+ <29da> DW_AT_name : (strp) (offset: 0xeb5): ssocr_set_color\n <29de> DW_AT_decl_file : (implicit_const) 1\n <29de> DW_AT_decl_line : (data1) 59\n <29df> DW_AT_decl_column : (implicit_const) 6\n <29df> DW_AT_prototyped : (flag_present) 1\n <29df> DW_AT_low_pc : (addr) 0x8960\n <29e3> DW_AT_high_pc : (udata) 188\n <29e5> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <29e7> DW_AT_call_all_tail_calls: (flag_present) 1\n <29e7> DW_AT_sibling : (ref_udata) <0x29f5>\n <2><29e9>: Abbrev Number: 9 (DW_TAG_formal_parameter)\n- <29ea> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <29ea> DW_AT_name : (strp) (offset: 0x7d7): color\n <29ee> DW_AT_decl_file : (implicit_const) 1\n <29ee> DW_AT_decl_line : (data1) 59\n <29ef> DW_AT_decl_column : (data1) 30\n <29f0> DW_AT_type : (ref_udata) <0x1606>, fg_bg_t, fg_bg_e\n <29f1> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><29f4>: Abbrev Number: 0\n <1><29f5>: Abbrev Number: 49 (DW_TAG_subprogram)\n <29f6> DW_AT_external : (flag_present) 1\n- <29f6> DW_AT_name : (strp) (offset: 0x3f9): set_bg_color\n+ <29f6> DW_AT_name : (strp) (offset: 0x3fb): set_bg_color\n <29fa> DW_AT_decl_file : (implicit_const) 1\n <29fa> DW_AT_decl_line : (data1) 53\n <29fb> DW_AT_decl_column : (implicit_const) 6\n <29fb> DW_AT_prototyped : (flag_present) 1\n <29fb> DW_AT_low_pc : (addr) 0x8908\n <29ff> DW_AT_high_pc : (udata) 88\n <2a00> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2a02> DW_AT_call_all_tail_calls: (flag_present) 1\n <2a02> DW_AT_sibling : (ref_udata) <0x2a13>\n <2><2a04>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2a05> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <2a05> DW_AT_name : (strp) (offset: 0x7d7): color\n <2a09> DW_AT_decl_file : (implicit_const) 1\n <2a09> DW_AT_decl_line : (data1) 53\n <2a0a> DW_AT_decl_column : (data1) 23\n <2a0b> DW_AT_type : (ref_addr) <0x3f>, int\n <2a0f> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2a12>: Abbrev Number: 0\n <1><2a13>: Abbrev Number: 53 (DW_TAG_subprogram)\n <2a14> DW_AT_external : (flag_present) 1\n- <2a14> DW_AT_name : (strp) (offset: 0xa33): set_fg_color\n+ <2a14> DW_AT_name : (strp) (offset: 0xa35): set_fg_color\n <2a18> DW_AT_decl_file : (data1) 1\n <2a19> DW_AT_decl_line : (data1) 47\n <2a1a> DW_AT_decl_column : (data1) 6\n <2a1b> DW_AT_prototyped : (flag_present) 1\n <2a1b> DW_AT_low_pc : (addr) 0x88b0\n <2a1f> DW_AT_high_pc : (udata) 88\n <2a20> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2a22> DW_AT_call_all_tail_calls: (flag_present) 1\n <2><2a22>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2a23> DW_AT_name : (strp) (offset: 0x7d5): color\n+ <2a23> DW_AT_name : (strp) (offset: 0x7d7): color\n <2a27> DW_AT_decl_file : (implicit_const) 1\n <2a27> DW_AT_decl_line : (data1) 47\n <2a28> DW_AT_decl_column : (data1) 23\n <2a29> DW_AT_type : (ref_addr) <0x3f>, int\n <2a2d> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2a30>: Abbrev Number: 0\n <1><2a31>: Abbrev Number: 0\n Compilation Unit @ offset 0x2a32:\n Length: 0x159 (32-bit)\n Version: 5\n Unit Type: DW_UT_compile (1)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><2a3e>: Abbrev Number: 23 (DW_TAG_compile_unit)\n- <2a3f> DW_AT_producer : (strp) (offset: 0xa4d): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n+ <2a3f> DW_AT_producer : (strp) (offset: 0xa4f): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n <2a43> DW_AT_language : (data1) 29\t(C11)\n- <2a44> DW_AT_name : (strp) (offset: 0xef0): help.c\n- <2a48> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <2a44> DW_AT_name : (strp) (offset: 0xef2): help.c\n+ <2a48> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <2a4c> DW_AT_low_pc : (addr) 0xb080\n <2a50> DW_AT_high_pc : (udata) 3216\n <2a52> DW_AT_stmt_list : (sec_offset) 0x2b5f\n <1><2a56>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2a57> DW_AT_import : (ref_addr) <0x22d>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2a5b>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2a5c> DW_AT_import : (ref_addr) <0x4c0>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2a60>: Abbrev Number: 81 (DW_TAG_subprogram)\n <2a61> DW_AT_external : (flag_present) 1\n- <2a61> DW_AT_name : (strp) (offset: 0xeea): fputs\n+ <2a61> DW_AT_name : (strp) (offset: 0xeec): fputs\n <2a65> DW_AT_decl_file : (implicit_const) 7\n <2a65> DW_AT_decl_line : (data2) 655\n <2a67> DW_AT_decl_column : (implicit_const) 12\n <2a67> DW_AT_prototyped : (flag_present) 1\n <2a67> DW_AT_type : (ref_addr) <0x3f>, int\n <2a6b> DW_AT_declaration : (flag_present) 1\n <2a6b> DW_AT_sibling : (ref_udata) <0x2a77>\n <2><2a6c>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <2a6d> DW_AT_type : (ref_addr) <0x20b>\n <2><2a71>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <2a72> DW_AT_type : (ref_addr) <0x205>\n <2><2a76>: Abbrev Number: 0\n <1><2a77>: Abbrev Number: 81 (DW_TAG_subprogram)\n <2a78> DW_AT_external : (flag_present) 1\n- <2a78> DW_AT_name : (strp) (offset: 0xeeb): puts\n+ <2a78> DW_AT_name : (strp) (offset: 0xeed): puts\n <2a7c> DW_AT_decl_file : (implicit_const) 7\n <2a7c> DW_AT_decl_line : (data2) 661\n <2a7e> DW_AT_decl_column : (implicit_const) 12\n <2a7e> DW_AT_prototyped : (flag_present) 1\n <2a7e> DW_AT_type : (ref_addr) <0x3f>, int\n <2a82> DW_AT_declaration : (flag_present) 1\n <2a82> DW_AT_sibling : (ref_udata) <0x2a89>\n <2><2a83>: Abbrev Number: 18 (DW_TAG_formal_parameter)\n <2a84> DW_AT_type : (ref_addr) <0x208>\n <2><2a88>: Abbrev Number: 0\n <1><2a89>: Abbrev Number: 49 (DW_TAG_subprogram)\n <2a8a> DW_AT_external : (flag_present) 1\n- <2a8a> DW_AT_name : (strp) (offset: 0x3e2): usage\n+ <2a8a> DW_AT_name : (strp) (offset: 0x3e4): usage\n <2a8e> DW_AT_decl_file : (implicit_const) 1\n <2a8e> DW_AT_decl_line : (data1) 111\n <2a8f> DW_AT_decl_column : (implicit_const) 6\n <2a8f> DW_AT_prototyped : (flag_present) 1\n <2a8f> DW_AT_low_pc : (addr) 0xb4e4\n <2a93> DW_AT_high_pc : (udata) 2092\n <2a95> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2a97> DW_AT_call_all_tail_calls: (flag_present) 1\n <2a97> DW_AT_sibling : (ref_udata) <0x2ab4>\n <2><2a99>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2a9a> DW_AT_name : (strp) (offset: 0xdce): name\n+ <2a9a> DW_AT_name : (strp) (offset: 0xdc6): name\n <2a9e> DW_AT_decl_file : (implicit_const) 1\n <2a9e> DW_AT_decl_line : (data1) 111\n <2a9f> DW_AT_decl_column : (data1) 18\n <2aa0> DW_AT_type : (ref_addr) <0x78>\n <2aa4> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2aa7>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <2aa8> DW_AT_name : (string) f\n@@ -5948,26 +5948,26 @@\n <2aaa> DW_AT_decl_line : (data1) 111\n <2aab> DW_AT_decl_column : (data1) 30\n <2aac> DW_AT_type : (ref_addr) <0x202>\n <2ab0> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><2ab3>: Abbrev Number: 0\n <1><2ab4>: Abbrev Number: 49 (DW_TAG_subprogram)\n <2ab5> DW_AT_external : (flag_present) 1\n- <2ab5> DW_AT_name : (strp) (offset: 0x3dc): short_usage\n+ <2ab5> DW_AT_name : (strp) (offset: 0x3de): short_usage\n <2ab9> DW_AT_decl_file : (implicit_const) 1\n <2ab9> DW_AT_decl_line : (data1) 103\n <2aba> DW_AT_decl_column : (implicit_const) 6\n <2aba> DW_AT_prototyped : (flag_present) 1\n <2aba> DW_AT_low_pc : (addr) 0xb478\n <2abe> DW_AT_high_pc : (udata) 108\n <2abf> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2ac1> DW_AT_call_all_tail_calls: (flag_present) 1\n <2ac1> DW_AT_sibling : (ref_udata) <0x2ade>\n <2><2ac3>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2ac4> DW_AT_name : (strp) (offset: 0xdce): name\n+ <2ac4> DW_AT_name : (strp) (offset: 0xdc6): name\n <2ac8> DW_AT_decl_file : (implicit_const) 1\n <2ac8> DW_AT_decl_line : (data1) 103\n <2ac9> DW_AT_decl_column : (data1) 24\n <2aca> DW_AT_type : (ref_addr) <0x78>\n <2ace> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2ad1>: Abbrev Number: 34 (DW_TAG_formal_parameter)\n <2ad2> DW_AT_name : (string) f\n@@ -5995,26 +5995,26 @@\n <2af1> DW_AT_decl_line : (data1) 91\n <2af2> DW_AT_decl_column : (data1) 26\n <2af3> DW_AT_type : (ref_addr) <0x202>\n <2af7> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2afa>: Abbrev Number: 0\n <1><2afb>: Abbrev Number: 80 (DW_TAG_subprogram)\n <2afc> DW_AT_external : (flag_present) 1\n- <2afc> DW_AT_name : (strp) (offset: 0xedc): print_cs_help\n+ <2afc> DW_AT_name : (strp) (offset: 0xede): print_cs_help\n <2b00> DW_AT_decl_file : (implicit_const) 1\n <2b00> DW_AT_decl_line : (data1) 81\n <2b01> DW_AT_decl_column : (implicit_const) 6\n <2b01> DW_AT_prototyped : (flag_present) 1\n <2b01> DW_AT_low_pc : (addr) 0xb35c\n <2b05> DW_AT_high_pc : (udata) 136\n <2b07> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2b09> DW_AT_call_all_tail_calls: (flag_present) 1\n <1><2b09>: Abbrev Number: 49 (DW_TAG_subprogram)\n <2b0a> DW_AT_external : (flag_present) 1\n- <2b0a> DW_AT_name : (strp) (offset: 0x4c4): print_cs_key\n+ <2b0a> DW_AT_name : (strp) (offset: 0x4c6): print_cs_key\n <2b0e> DW_AT_decl_file : (implicit_const) 1\n <2b0e> DW_AT_decl_line : (data1) 75\n <2b0f> DW_AT_decl_column : (implicit_const) 6\n <2b0f> DW_AT_prototyped : (flag_present) 1\n <2b0f> DW_AT_low_pc : (addr) 0xb304\n <2b13> DW_AT_high_pc : (udata) 88\n <2b14> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n@@ -6033,15 +6033,15 @@\n <2b28> DW_AT_decl_line : (data1) 75\n <2b29> DW_AT_decl_column : (data1) 39\n <2b2a> DW_AT_type : (ref_addr) <0x202>\n <2b2e> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><2b31>: Abbrev Number: 0\n <1><2b32>: Abbrev Number: 33 (DW_TAG_subprogram)\n <2b33> DW_AT_external : (flag_present) 1\n- <2b33> DW_AT_name : (strp) (offset: 0x4ca): cs_key\n+ <2b33> DW_AT_name : (strp) (offset: 0x4cc): cs_key\n <2b37> DW_AT_decl_file : (data1) 1\n <2b38> DW_AT_decl_line : (data1) 62\n <2b39> DW_AT_decl_column : (data1) 13\n <2b3a> DW_AT_prototyped : (flag_present) 1\n <2b3a> DW_AT_type : (ref_addr) <0x208>\n <2b3e> DW_AT_low_pc : (addr) 0xb260\n <2b42> DW_AT_high_pc : (udata) 164\n@@ -6054,26 +6054,26 @@\n <2b4c> DW_AT_decl_line : (data1) 62\n <2b4d> DW_AT_decl_column : (data1) 30\n <2b4e> DW_AT_type : (ref_addr) <0x4f3>, charset_t, charset_e\n <2b52> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2b55>: Abbrev Number: 0\n <1><2b56>: Abbrev Number: 80 (DW_TAG_subprogram)\n <2b57> DW_AT_external : (flag_present) 1\n- <2b57> DW_AT_name : (strp) (offset: 0xd5a): print_lum_help\n+ <2b57> DW_AT_name : (strp) (offset: 0xd52): print_lum_help\n <2b5b> DW_AT_decl_file : (implicit_const) 1\n <2b5b> DW_AT_decl_line : (data1) 49\n <2b5c> DW_AT_decl_column : (implicit_const) 6\n <2b5c> DW_AT_prototyped : (flag_present) 1\n <2b5c> DW_AT_low_pc : (addr) 0xb1ac\n <2b60> DW_AT_high_pc : (udata) 180\n <2b62> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2b64> DW_AT_call_all_tail_calls: (flag_present) 1\n <1><2b64>: Abbrev Number: 53 (DW_TAG_subprogram)\n <2b65> DW_AT_external : (flag_present) 1\n- <2b65> DW_AT_name : (strp) (offset: 0x524): print_lum_key\n+ <2b65> DW_AT_name : (strp) (offset: 0x526): print_lum_key\n <2b69> DW_AT_decl_file : (data1) 1\n <2b6a> DW_AT_decl_line : (data1) 33\n <2b6b> DW_AT_decl_column : (data1) 6\n <2b6c> DW_AT_prototyped : (flag_present) 1\n <2b6c> DW_AT_low_pc : (addr) 0xb080\n <2b70> DW_AT_high_pc : (udata) 300\n <2b72> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n@@ -6097,122 +6097,122 @@\n Compilation Unit @ offset 0x2b8f:\n Length: 0x132 (32-bit)\n Version: 5\n Unit Type: DW_UT_compile (1)\n Abbrev Offset: 0\n Pointer Size: 4\n <0><2b9b>: Abbrev Number: 23 (DW_TAG_compile_unit)\n- <2b9c> DW_AT_producer : (strp) (offset: 0xa4d): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n+ <2b9c> DW_AT_producer : (strp) (offset: 0xa4f): GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n <2ba0> DW_AT_language : (data1) 29\t(C11)\n- <2ba1> DW_AT_name : (strp) (offset: 0xf05): charset.c\n- <2ba5> DW_AT_comp_dir : (strp) (offset: 0x87): /build/1st/ssocr-2.23.0\n+ <2ba1> DW_AT_name : (strp) (offset: 0xf07): charset.c\n+ <2ba5> DW_AT_comp_dir : (strp) (offset: 0x333): /build/2/ssocr-2.23.0/2nd\n <2ba9> DW_AT_low_pc : (addr) 0xbd10\n <2bad> DW_AT_high_pc : (udata) 2040\n <2baf> DW_AT_stmt_list : (sec_offset) 0x2da5\n <1><2bb3>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2bb4> DW_AT_import : (ref_addr) <0xc>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2bb8>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2bb9> DW_AT_import : (ref_addr) <0x28d>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2bbd>: Abbrev Number: 1 (DW_TAG_imported_unit)\n <2bbe> DW_AT_import : (ref_addr) <0x509>\t[Abbrev Number: 66 (DW_TAG_partial_unit)]\n <1><2bc2>: Abbrev Number: 68 (DW_TAG_enumeration_type)\n- <2bc3> DW_AT_name : (strp) (offset: 0xc0b): charset_e\n+ <2bc3> DW_AT_name : (strp) (offset: 0xc0d): charset_e\n <2bc7> DW_AT_encoding : (data1) 7\t(unsigned)\n <2bc8> DW_AT_byte_size : (data1) 4\n <2bc9> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2bcd> DW_AT_decl_file : (data1) 6\n <2bce> DW_AT_decl_line : (data1) 194\n <2bcf> DW_AT_decl_column : (data1) 14\n <2bd0> DW_AT_sibling : (ref_udata) <0x2bf0>\n <2><2bd1>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <2bd2> DW_AT_name : (strp) (offset: 0x297): CS_FULL\n+ <2bd2> DW_AT_name : (strp) (offset: 0x27f): CS_FULL\n <2bd6> DW_AT_const_value : (data1) 0\n <2><2bd7>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <2bd8> DW_AT_name : (strp) (offset: 0xb3d): CS_DIGITS\n+ <2bd8> DW_AT_name : (strp) (offset: 0xb3f): CS_DIGITS\n <2bdc> DW_AT_const_value : (data1) 1\n <2><2bdd>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <2bde> DW_AT_name : (strp) (offset: 0x8bb): CS_DECIMAL\n+ <2bde> DW_AT_name : (strp) (offset: 0x8bd): CS_DECIMAL\n <2be2> DW_AT_const_value : (data1) 2\n <2><2be3>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <2be4> DW_AT_name : (strp) (offset: 0xab2): CS_HEXADECIMAL\n+ <2be4> DW_AT_name : (strp) (offset: 0xab4): CS_HEXADECIMAL\n <2be8> DW_AT_const_value : (data1) 3\n <2><2be9>: Abbrev Number: 64 (DW_TAG_enumerator)\n- <2bea> DW_AT_name : (strp) (offset: 0xbac): CS_TT_ROBOT\n+ <2bea> DW_AT_name : (strp) (offset: 0xbae): CS_TT_ROBOT\n <2bee> DW_AT_const_value : (data1) 4\n <2><2bef>: Abbrev Number: 0\n <1><2bf0>: Abbrev Number: 39 (DW_TAG_typedef)\n- <2bf1> DW_AT_name : (strp) (offset: 0xc2c): charset_t\n+ <2bf1> DW_AT_name : (strp) (offset: 0xc2e): charset_t\n <2bf5> DW_AT_decl_file : (data1) 6\n <2bf6> DW_AT_decl_line : (data1) 200\n <2bf7> DW_AT_decl_column : (data1) 3\n <2bf8> DW_AT_type : (ref_udata) <0x2bc2>, charset_e, unsigned int\n <1><2bf9>: Abbrev Number: 72 (DW_TAG_array_type)\n <2bfa> DW_AT_type : (ref_addr) <0x7a>, char\n <2bfe> DW_AT_sibling : (ref_udata) <0x2c06>\n <2><2bff>: Abbrev Number: 31 (DW_TAG_subrange_type)\n <2c00> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2c04> DW_AT_upper_bound : (data1) 128\n <2><2c05>: Abbrev Number: 0\n <1><2c06>: Abbrev Number: 30 (DW_TAG_variable)\n- <2c07> DW_AT_name : (strp) (offset: 0xef7): charset_array\n+ <2c07> DW_AT_name : (strp) (offset: 0xef9): charset_array\n <2c0b> DW_AT_decl_file : (implicit_const) 1\n <2c0b> DW_AT_decl_line : (data1) 52\n <2c0c> DW_AT_decl_column : (data1) 13\n <2c0d> DW_AT_type : (ref_udata) <0x2bf9>, char\n <2c0e> DW_AT_location : (exprloc) 5 byte block: 3 24 22 1 0 \t(DW_OP_addr: 12224)\n <1><2c14>: Abbrev Number: 2 (DW_TAG_subprogram)\n <2c15> DW_AT_external : (flag_present) 1\n- <2c15> DW_AT_name : (strp) (offset: 0x4ca): cs_key\n+ <2c15> DW_AT_name : (strp) (offset: 0x4cc): cs_key\n <2c19> DW_AT_decl_file : (data1) 8\n <2c1a> DW_AT_decl_line : (data1) 38\n <2c1b> DW_AT_decl_column : (data1) 13\n <2c1c> DW_AT_prototyped : (flag_present) 1\n <2c1c> DW_AT_type : (ref_addr) <0x208>\n <2c20> DW_AT_declaration : (flag_present) 1\n <2c20> DW_AT_sibling : (ref_udata) <0x2c25>\n <2><2c22>: Abbrev Number: 13 (DW_TAG_formal_parameter)\n <2c23> DW_AT_type : (ref_udata) <0x2bf0>, charset_t, charset_e, unsigned int\n <2><2c24>: Abbrev Number: 0\n <1><2c25>: Abbrev Number: 47 (DW_TAG_subprogram)\n <2c26> DW_AT_external : (flag_present) 1\n- <2c26> DW_AT_name : (strp) (offset: 0xedc): print_cs_help\n+ <2c26> DW_AT_name : (strp) (offset: 0xede): print_cs_help\n <2c2a> DW_AT_decl_file : (data1) 8\n <2c2b> DW_AT_decl_line : (data1) 44\n <2c2c> DW_AT_decl_column : (data1) 6\n <2c2d> DW_AT_prototyped : (flag_present) 1\n <2c2d> DW_AT_declaration : (flag_present) 1\n <1><2c2d>: Abbrev Number: 33 (DW_TAG_subprogram)\n <2c2e> DW_AT_external : (flag_present) 1\n- <2c2e> DW_AT_name : (strp) (offset: 0x712): print_digit\n+ <2c2e> DW_AT_name : (strp) (offset: 0x714): print_digit\n <2c32> DW_AT_decl_file : (data1) 1\n <2c33> DW_AT_decl_line : (data1) 185\n <2c34> DW_AT_decl_column : (data1) 5\n <2c35> DW_AT_prototyped : (flag_present) 1\n <2c35> DW_AT_type : (ref_addr) <0x3f>, int\n <2c39> DW_AT_low_pc : (addr) 0xc480\n <2c3d> DW_AT_high_pc : (udata) 136\n <2c3f> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2c41> DW_AT_call_all_tail_calls: (flag_present) 1\n <2c41> DW_AT_sibling : (ref_udata) <0x2c7a>\n <2><2c43>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2c44> DW_AT_name : (strp) (offset: 0x345): digit\n+ <2c44> DW_AT_name : (strp) (offset: 0x32d): digit\n <2c48> DW_AT_decl_file : (implicit_const) 1\n <2c48> DW_AT_decl_line : (data1) 185\n <2c49> DW_AT_decl_column : (data1) 21\n <2c4a> DW_AT_type : (ref_addr) <0x3f>, int\n <2c4e> DW_AT_location : (exprloc) 2 byte block: 91 64 \t(DW_OP_fbreg: -28)\n <2><2c51>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2c52> DW_AT_name : (strp) (offset: 0x675): flags\n+ <2c52> DW_AT_name : (strp) (offset: 0x677): flags\n <2c56> DW_AT_decl_file : (implicit_const) 1\n <2c56> DW_AT_decl_line : (data1) 185\n <2c57> DW_AT_decl_column : (data1) 41\n <2c58> DW_AT_type : (ref_addr) <0x23>, unsigned int\n <2c5c> DW_AT_location : (exprloc) 2 byte block: 91 60 \t(DW_OP_fbreg: -32)\n <2><2c5f>: Abbrev Number: 11 (DW_TAG_variable)\n- <2c60> DW_AT_name : (strp) (offset: 0x33d): unknown_digit\n+ <2c60> DW_AT_name : (strp) (offset: 0x325): unknown_digit\n <2c64> DW_AT_decl_file : (implicit_const) 1\n <2c64> DW_AT_decl_line : (data1) 187\n <2c65> DW_AT_decl_column : (data1) 7\n <2c66> DW_AT_type : (ref_addr) <0x3f>, int\n <2c6a> DW_AT_location : (exprloc) 2 byte block: 91 70 \t(DW_OP_fbreg: -16)\n <2><2c6d>: Abbrev Number: 43 (DW_TAG_variable)\n <2c6e> DW_AT_name : (string) c\n@@ -6220,15 +6220,15 @@\n <2c70> DW_AT_decl_line : (data1) 188\n <2c71> DW_AT_decl_column : (data1) 8\n <2c72> DW_AT_type : (ref_addr) <0x7a>, char\n <2c76> DW_AT_location : (exprloc) 2 byte block: 91 6f \t(DW_OP_fbreg: -17)\n <2><2c79>: Abbrev Number: 0\n <1><2c7a>: Abbrev Number: 70 (DW_TAG_subprogram)\n <2c7b> DW_AT_external : (flag_present) 1\n- <2c7b> DW_AT_name : (strp) (offset: 0x483): init_charset\n+ <2c7b> DW_AT_name : (strp) (offset: 0x485): init_charset\n <2c7f> DW_AT_decl_file : (data1) 1\n <2c80> DW_AT_decl_line : (data1) 55\n <2c81> DW_AT_decl_column : (data1) 6\n <2c82> DW_AT_prototyped : (flag_present) 1\n <2c82> DW_AT_low_pc : (addr) 0xbe04\n <2c86> DW_AT_high_pc : (udata) 1660\n <2c88> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n@@ -6247,26 +6247,26 @@\n <2c9a> DW_AT_decl_line : (data1) 57\n <2c9b> DW_AT_decl_column : (data1) 7\n <2c9c> DW_AT_type : (ref_addr) <0x3f>, int\n <2ca0> DW_AT_location : (exprloc) 2 byte block: 91 68 \t(DW_OP_fbreg: -24)\n <2><2ca3>: Abbrev Number: 0\n <1><2ca4>: Abbrev Number: 71 (DW_TAG_subprogram)\n <2ca5> DW_AT_external : (flag_present) 1\n- <2ca5> DW_AT_name : (strp) (offset: 0xbc0): parse_charset\n+ <2ca5> DW_AT_name : (strp) (offset: 0xbc2): parse_charset\n <2ca9> DW_AT_decl_file : (data1) 1\n <2caa> DW_AT_decl_line : (data1) 31\n <2cab> DW_AT_decl_column : (data1) 11\n <2cac> DW_AT_prototyped : (flag_present) 1\n <2cac> DW_AT_type : (ref_udata) <0x2bf0>, charset_t, charset_e, unsigned int\n <2cad> DW_AT_low_pc : (addr) 0xbd10\n <2cb1> DW_AT_high_pc : (udata) 244\n <2cb3> DW_AT_frame_base : (exprloc) 1 byte block: 9c \t(DW_OP_call_frame_cfa)\n <2cb5> DW_AT_call_all_tail_calls: (flag_present) 1\n <2><2cb5>: Abbrev Number: 46 (DW_TAG_formal_parameter)\n- <2cb6> DW_AT_name : (strp) (offset: 0xe77): keyword\n+ <2cb6> DW_AT_name : (strp) (offset: 0xe79): keyword\n <2cba> DW_AT_decl_file : (implicit_const) 1\n <2cba> DW_AT_decl_line : (data1) 31\n <2cbb> DW_AT_decl_column : (data1) 31\n <2cbc> DW_AT_type : (ref_addr) <0x78>\n <2cc0> DW_AT_location : (exprloc) 2 byte block: 91 6c \t(DW_OP_fbreg: -20)\n <2><2cc3>: Abbrev Number: 0\n <1><2cc4>: Abbrev Number: 0\n"}, {"source1": "strings --all --bytes=8 {}", "source2": "strings --all --bytes=8 {}", "unified_diff": "@@ -1,9 +1,10 @@\n GCC: (Debian 12.2.0-14) 12.2.0\n a```bpfe``a\n+*Jm-lL6I\n \\qz5TwYe\n LA6ynv[0\n __abi_tag\n call_weak_fn\n crtstuff.c\n all_implied_fbits\n deregister_tm_clones\n"}, {"source1": "readelf --wide --decompress --string-dump=.debug_str {}", "source2": "readelf --wide --decompress --string-dump=.debug_str {}", "comments": ["error from `readelf --wide --decompress --string-dump=.debug_str {}`:", "readelf: Error: Unable to find program interpreter name"], "unified_diff": "@@ -7,285 +7,285 @@\n [ 27] IMLIB_LOAD_ERROR_NONE\n [ 3d] __ssize_t\n [ 47] _IO_codecvt\n [ 53] _IO_save_end\n [ 60] print_version\n [ 6e] keep_pixels_filter\n [ 81] write\n- [ 87] /build/1st/ssocr-2.23.0\n- [ 9f] get_lum\n- [ a7] _IO_write_base\n- [ b6] state\n- [ bc] _lock\n- [ c2] width_string\n- [ cf] Imlib_Color\n- [ db] IMLIB_LOAD_ERROR_OUT_OF_DISK_SPACE\n- [ fe] d_color\n- [ 106] _IO_save_base\n- [ 114] grayscale\n- [ 11e] set_pixels_filter\n- [ 130] digit_count\n- [ 13c] _chain\n- [ 143] quarter\n- [ 14b] _cur_column\n- [ 157] strcasecmp\n- [ 162] parse_lum\n- [ 16c] Imlib_Load_Error\n- [ 17d] alpha\n- [ 183] atof\n- [ 188] atoi\n- [ 18d] bdwidth\n- [ 195] base_dst\n- [ 19e] imlib_context_set_color\n- [ 1b6] debug_image_file\n- [ 1c7] strchr\n- [ 1ce] has_arg\n- [ 1d6] imlib_image_draw_rectangle\n- [ 1f1] _IO_marker\n- [ 1fc] imlib_free_image_and_decache\n- [ 219] main\n- [ 21e] pat_suffix_len\n- [ 22d] avg_dst\n- [ 235] GREEN\n- [ 23b] umask\n- [ 241] REC601\n- [ 248] IMLIB_LOAD_ERROR_NO_LOADER_FOR_FILE_FORMAT\n- [ 273] _IO_FILE\n- [ 27c] is_pixel_set\n- [ 289] _IO_wide_data\n- [ 297] CS_FULL\n- [ 29f] IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_READ\n- [ 2ca] unsigned char\n- [ 2d8] _freeres_list\n- [ 2e6] dst_sum\n- [ 2ee] realloc\n- [ 2f6] number_of_digits\n- [ 307] make_mono\n- [ 311] imlib_image_draw_pixel\n- [ 328] found_top\n- [ 332] get_minval\n- [ 33d] unknown_digit\n- [ 34b] dilation\n- [ 354] upper\n- [ 35a] adapt_threshold\n- [ 36a] _IO_lock_t\n- [ 375] MAXIMUM\n- [ 37d] __mode_t\n- [ 386] dynamic_threshold\n- [ 398] _IO_read_ptr\n- [ 3a5] Imlib_Updates\n- [ 3b3] rotate\n- [ 3ba] new_image\n- [ 3c4] save_image\n- [ 3cf] strcmp\n- [ 3d6] stdin\n- [ 3dc] short_usage\n- [ 3e8] erosion\n- [ 3f0] _markers\n- [ 3f9] set_bg_color\n- [ 406] parse_width_height\n- [ 419] white_border\n- [ 426] IMLIB_LOAD_ERROR_IMAGE_FRAME\n- [ 443] report_imlib_error\n- [ 456] tmp_imgfile\n- [ 462] gray_stretch\n- [ 46f] long_options\n- [ 47c] LINEAR\n- [ 483] init_charset\n- [ 490] optind\n- [ 497] potential_digits\n- [ 4a8] REC709\n- [ 4af] ignore_pixels\n- [ 4bd] getenv\n- [ 4c4] print_cs_key\n- [ 4d1] _flags2\n- [ 4d9] _IO_read_base\n- [ 4e7] ferror\n- [ 4ee] optarg\n- [ 4f5] option\n- [ 4fc] IMLIB_LOAD_ERROR_OUT_OF_MEMORY\n- [ 51b] _unused2\n- [ 524] print_lum_key\n- [ 532] color_struct\n- [ 53f] load_error\n- [ 54a] argc\n- [ 54f] IMLIB_LOAD_ERROR_PATH_COMPONENT_NOT_DIRECTORY\n- [ 57d] pattern_len\n- [ 589] _old_offset\n- [ 595] IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_WRITE\n- [ 5c1] argv\n- [ 5c6] shear\n- [ 5cc] dir_len\n- [ 5d4] spc_fac\n- [ 5dc] long long int\n- [ 5ea] _IO_write_end\n- [ 5f8] num_spc\n- [ 600] BLUE\n- [ 605] get_maxval\n- [ 610] _IO_buf_base\n- [ 61d] perror\n- [ 624] ssocr.c\n- [ 62c] dec_h_ratio\n- [ 638] __pad5\n- [ 63f] HORIZONTAL\n- [ 64a] flag\n- [ 64f] minus_ratio\n- [ 65b] opening\n- [ 663] imlib_free_image\n- [ 674] _flags\n- [ 67b] _mode\n- [ 681] imlib_image_query_pixel\n- [ 699] imlib_image_get_height\n- [ 6b0] height_string\n- [ 6be] calloc\n- [ 6c5] dec_w_ratio\n- [ 6d1] imlib_load_image_with_error_return\n- [ 6f4] long double\n- [ 700] Imlib_Image\n- [ 70c] theta\n- [ 712] print_digit\n- [ 71e] handle\n- [ 725] found_pixels\n- [ 732] IMLIB_LOAD_ERROR_IMAGE_READ\n- [ 74e] getopt_long\n- [ 75a] IMLIB_LOAD_ERROR_UNKNOWN\n- [ 773] scanline\n- [ 77c] long long unsigned int\n- [ 793] ssocr_foreground\n- [ 7a4] __off_t\n- [ 7ac] IMLIB_LOAD_ERROR_FILE_IS_DIRECTORY\n- [ 7cf] imlib_color\n- [ 7db] invert\n- [ 7e2] imlib_context_set_image\n- [ 7fa] _freeres_buf\n- [ 807] min_dst\n- [ 80f] dimensions_struct\n- [ 821] IMLIB_LOAD_ERROR_TOO_MANY_SYMBOLIC_LINKS\n- [ 84a] IMLIB_LOAD_ERROR_FILE_DOES_NOT_EXIST\n- [ 86f] memset\n- [ 876] crop\n- [ 87b] MINIMUM\n- [ 883] _IO_backup_base\n- [ 893] print_spaces\n- [ 8a0] _shortbuf\n- [ 8aa] ssocr_background\n- [ 8bb] CS_DECIMAL\n- [ 8c6] __off64_t\n- [ 8d0] mirror\n- [ 8d7] middle\n- [ 8de] fputc\n- [ 8e4] VERTICAL\n- [ 8ed] strdup\n- [ 8f4] option_index\n- [ 901] _IO_buf_end\n- [ 90d] mkstemp\n- [ 915] remove_isolated\n- [ 925] fprintf\n- [ 92d] one_ratio\n- [ 937] stderr\n- [ 93e] short int\n- [ 948] debug_image\n- [ 954] IMLIB_LOAD_ERROR_PATH_TOO_LONG\n- [ 973] _vtable_offset\n- [ 982] output_file\n- [ 98e] IMLIB_LOAD_ERROR_OUT_OF_FILE_DESCRIPTORS\n- [ 9b7] direction_e\n- [ 9c3] three_quarters\n- [ 9d2] d_height\n- [ 9db] closing\n- [ 9e3] direction_t\n- [ 9ef] putchar\n- [ 9f7] min_segment\n- [ a03] strlen\n- [ a0a] luminance_e\n- [ a16] __int64_t\n- [ a20] luminance_t\n- [ a2c] memcpy\n- [ a33] set_fg_color\n- [ a40] _IO_read_end\n- [ a4d] GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n- [ ab2] CS_HEXADECIMAL\n- [ ac1] _fileno\n- [ ac9] imlib_image_get_width\n- [ adf] strncasecmp\n- [ aeb] free\n- [ af0] short unsigned int\n- [ b03] stdout\n- [ b0a] IMLIB_LOAD_ERROR_PATH_POINTS_OUTSIDE_ADDRESS_SPACE\n- [ b3d] CS_DIGITS\n- [ b47] fread\n- [ b4d] _IO_write_ptr\n- [ b5b] expected_digits\n- [ b6b] IMLIB_LOAD_ERROR_PATH_COMPONENT_NON_EXISTANT\n- [ b98] parse_interval\n- [ ba7] exit\n- [ bac] CS_TT_ROBOT\n- [ bb8] cur_dst\n- [ bc0] parse_charset\n- [ bce] digit_struct\n- [ bdb] max_dig_h\n- [ be5] close\n- [ beb] imlib_image_draw_line\n- [ c01] max_dig_w\n- [ c0b] charset_e\n- [ c15] use_tmpfile\n- [ c21] output_fmt\n- [ c2c] charset_t\n- [ c36] interval_struct\n- [ c46] return_image\n- [ c53] color_return\n- [ c60] size_black\n- [ c6b] direction\n- [ c75] imlib_clone_image\n- [ c87] clip\n- [ c8c] avg_black\n- [ c96] new_thresh\n- [ ca1] draw_bg_pixel\n- [ caf] sum_black\n- [ cb9] get_lum_min\n- [ cc5] current_image\n- [ cd3] shift\n- [ cd9] draw_fg_pixel\n- [ ce7] iterative_threshold\n- [ cfb] value\n- [ d01] old_thresh\n- [ d0c] get_lum_709\n- [ d18] get_lum_601\n- [ d24] fraction\n- [ d2d] sum_white\n- [ d37] get_lum_lin\n- [ d43] imlib_image_set_format\n- [ d5a] print_lum_help\n- [ d69] imlib_context_get_image\n- [ d81] size_white\n- [ d8c] imlib_create_cropped_image\n- [ da7] save_error\n- [ db2] temp_image1\n- [ dbe] temp_image2\n- [ dca] filename\n- [ dd3] avg_white\n- [ ddd] set_pixels_filter_iter\n- [ df4] image_type\n- [ dff] set_pixel\n- [ e09] strrchr\n- [ e11] temp_image\n- [ e1c] float\n- [ e22] fg_bg_e\n- [ e2a] imgproc.c\n- [ e34] get_lum_max\n- [ e40] fg_bg_t\n- [ e48] imlib_save_image_with_error_return\n- [ e6b] get_lum_red\n- [ e77] keyword\n- [ e7f] source_image\n- [ e8c] get_threshold\n- [ e9a] thresh_lum\n- [ ea5] get_lum_green\n- [ eb3] ssocr_set_color\n- [ ec3] get_lum_blue\n- [ ed0] stdout_file\n- [ edc] print_cs_help\n- [ eea] fputs\n- [ ef0] help.c\n- [ ef7] charset_array\n- [ f05] charset.c\n+ [ 87] get_lum\n+ [ 8f] _IO_write_base\n+ [ 9e] state\n+ [ a4] _lock\n+ [ aa] width_string\n+ [ b7] Imlib_Color\n+ [ c3] IMLIB_LOAD_ERROR_OUT_OF_DISK_SPACE\n+ [ e6] d_color\n+ [ ee] _IO_save_base\n+ [ fc] grayscale\n+ [ 106] set_pixels_filter\n+ [ 118] digit_count\n+ [ 124] _chain\n+ [ 12b] quarter\n+ [ 133] _cur_column\n+ [ 13f] strcasecmp\n+ [ 14a] parse_lum\n+ [ 154] Imlib_Load_Error\n+ [ 165] alpha\n+ [ 16b] atof\n+ [ 170] atoi\n+ [ 175] bdwidth\n+ [ 17d] base_dst\n+ [ 186] imlib_context_set_color\n+ [ 19e] debug_image_file\n+ [ 1af] strchr\n+ [ 1b6] has_arg\n+ [ 1be] imlib_image_draw_rectangle\n+ [ 1d9] _IO_marker\n+ [ 1e4] imlib_free_image_and_decache\n+ [ 201] main\n+ [ 206] pat_suffix_len\n+ [ 215] avg_dst\n+ [ 21d] GREEN\n+ [ 223] umask\n+ [ 229] REC601\n+ [ 230] IMLIB_LOAD_ERROR_NO_LOADER_FOR_FILE_FORMAT\n+ [ 25b] _IO_FILE\n+ [ 264] is_pixel_set\n+ [ 271] _IO_wide_data\n+ [ 27f] CS_FULL\n+ [ 287] IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_READ\n+ [ 2b2] unsigned char\n+ [ 2c0] _freeres_list\n+ [ 2ce] dst_sum\n+ [ 2d6] realloc\n+ [ 2de] number_of_digits\n+ [ 2ef] make_mono\n+ [ 2f9] imlib_image_draw_pixel\n+ [ 310] found_top\n+ [ 31a] get_minval\n+ [ 325] unknown_digit\n+ [ 333] /build/2/ssocr-2.23.0/2nd\n+ [ 34d] dilation\n+ [ 356] upper\n+ [ 35c] adapt_threshold\n+ [ 36c] _IO_lock_t\n+ [ 377] MAXIMUM\n+ [ 37f] __mode_t\n+ [ 388] dynamic_threshold\n+ [ 39a] _IO_read_ptr\n+ [ 3a7] Imlib_Updates\n+ [ 3b5] rotate\n+ [ 3bc] new_image\n+ [ 3c6] save_image\n+ [ 3d1] strcmp\n+ [ 3d8] stdin\n+ [ 3de] short_usage\n+ [ 3ea] erosion\n+ [ 3f2] _markers\n+ [ 3fb] set_bg_color\n+ [ 408] parse_width_height\n+ [ 41b] white_border\n+ [ 428] IMLIB_LOAD_ERROR_IMAGE_FRAME\n+ [ 445] report_imlib_error\n+ [ 458] tmp_imgfile\n+ [ 464] gray_stretch\n+ [ 471] long_options\n+ [ 47e] LINEAR\n+ [ 485] init_charset\n+ [ 492] optind\n+ [ 499] potential_digits\n+ [ 4aa] REC709\n+ [ 4b1] ignore_pixels\n+ [ 4bf] getenv\n+ [ 4c6] print_cs_key\n+ [ 4d3] _flags2\n+ [ 4db] _IO_read_base\n+ [ 4e9] ferror\n+ [ 4f0] optarg\n+ [ 4f7] option\n+ [ 4fe] IMLIB_LOAD_ERROR_OUT_OF_MEMORY\n+ [ 51d] _unused2\n+ [ 526] print_lum_key\n+ [ 534] color_struct\n+ [ 541] load_error\n+ [ 54c] argc\n+ [ 551] IMLIB_LOAD_ERROR_PATH_COMPONENT_NOT_DIRECTORY\n+ [ 57f] pattern_len\n+ [ 58b] _old_offset\n+ [ 597] IMLIB_LOAD_ERROR_PERMISSION_DENIED_TO_WRITE\n+ [ 5c3] argv\n+ [ 5c8] shear\n+ [ 5ce] dir_len\n+ [ 5d6] spc_fac\n+ [ 5de] long long int\n+ [ 5ec] _IO_write_end\n+ [ 5fa] num_spc\n+ [ 602] BLUE\n+ [ 607] get_maxval\n+ [ 612] _IO_buf_base\n+ [ 61f] perror\n+ [ 626] ssocr.c\n+ [ 62e] dec_h_ratio\n+ [ 63a] __pad5\n+ [ 641] HORIZONTAL\n+ [ 64c] flag\n+ [ 651] minus_ratio\n+ [ 65d] opening\n+ [ 665] imlib_free_image\n+ [ 676] _flags\n+ [ 67d] _mode\n+ [ 683] imlib_image_query_pixel\n+ [ 69b] imlib_image_get_height\n+ [ 6b2] height_string\n+ [ 6c0] calloc\n+ [ 6c7] dec_w_ratio\n+ [ 6d3] imlib_load_image_with_error_return\n+ [ 6f6] long double\n+ [ 702] Imlib_Image\n+ [ 70e] theta\n+ [ 714] print_digit\n+ [ 720] handle\n+ [ 727] found_pixels\n+ [ 734] IMLIB_LOAD_ERROR_IMAGE_READ\n+ [ 750] getopt_long\n+ [ 75c] IMLIB_LOAD_ERROR_UNKNOWN\n+ [ 775] scanline\n+ [ 77e] long long unsigned int\n+ [ 795] ssocr_foreground\n+ [ 7a6] __off_t\n+ [ 7ae] IMLIB_LOAD_ERROR_FILE_IS_DIRECTORY\n+ [ 7d1] imlib_color\n+ [ 7dd] invert\n+ [ 7e4] imlib_context_set_image\n+ [ 7fc] _freeres_buf\n+ [ 809] min_dst\n+ [ 811] dimensions_struct\n+ [ 823] IMLIB_LOAD_ERROR_TOO_MANY_SYMBOLIC_LINKS\n+ [ 84c] IMLIB_LOAD_ERROR_FILE_DOES_NOT_EXIST\n+ [ 871] memset\n+ [ 878] crop\n+ [ 87d] MINIMUM\n+ [ 885] _IO_backup_base\n+ [ 895] print_spaces\n+ [ 8a2] _shortbuf\n+ [ 8ac] ssocr_background\n+ [ 8bd] CS_DECIMAL\n+ [ 8c8] __off64_t\n+ [ 8d2] mirror\n+ [ 8d9] middle\n+ [ 8e0] fputc\n+ [ 8e6] VERTICAL\n+ [ 8ef] strdup\n+ [ 8f6] option_index\n+ [ 903] _IO_buf_end\n+ [ 90f] mkstemp\n+ [ 917] remove_isolated\n+ [ 927] fprintf\n+ [ 92f] one_ratio\n+ [ 939] stderr\n+ [ 940] short int\n+ [ 94a] debug_image\n+ [ 956] IMLIB_LOAD_ERROR_PATH_TOO_LONG\n+ [ 975] _vtable_offset\n+ [ 984] output_file\n+ [ 990] IMLIB_LOAD_ERROR_OUT_OF_FILE_DESCRIPTORS\n+ [ 9b9] direction_e\n+ [ 9c5] three_quarters\n+ [ 9d4] d_height\n+ [ 9dd] closing\n+ [ 9e5] direction_t\n+ [ 9f1] putchar\n+ [ 9f9] min_segment\n+ [ a05] strlen\n+ [ a0c] luminance_e\n+ [ a18] __int64_t\n+ [ a22] luminance_t\n+ [ a2e] memcpy\n+ [ a35] set_fg_color\n+ [ a42] _IO_read_end\n+ [ a4f] GNU C17 12.2.0 -mfloat-abi=hard -mtls-dialect=gnu -mthumb -march=armv7-a+fp -g -fstack-protector-all\n+ [ ab4] CS_HEXADECIMAL\n+ [ ac3] _fileno\n+ [ acb] imlib_image_get_width\n+ [ ae1] strncasecmp\n+ [ aed] free\n+ [ af2] short unsigned int\n+ [ b05] stdout\n+ [ b0c] IMLIB_LOAD_ERROR_PATH_POINTS_OUTSIDE_ADDRESS_SPACE\n+ [ b3f] CS_DIGITS\n+ [ b49] fread\n+ [ b4f] _IO_write_ptr\n+ [ b5d] expected_digits\n+ [ b6d] IMLIB_LOAD_ERROR_PATH_COMPONENT_NON_EXISTANT\n+ [ b9a] parse_interval\n+ [ ba9] exit\n+ [ bae] CS_TT_ROBOT\n+ [ bba] cur_dst\n+ [ bc2] parse_charset\n+ [ bd0] digit_struct\n+ [ bdd] max_dig_h\n+ [ be7] close\n+ [ bed] imlib_image_draw_line\n+ [ c03] max_dig_w\n+ [ c0d] charset_e\n+ [ c17] use_tmpfile\n+ [ c23] output_fmt\n+ [ c2e] charset_t\n+ [ c38] interval_struct\n+ [ c48] return_image\n+ [ c55] color_return\n+ [ c62] size_black\n+ [ c6d] direction\n+ [ c77] imlib_clone_image\n+ [ c89] clip\n+ [ c8e] avg_black\n+ [ c98] new_thresh\n+ [ ca3] draw_bg_pixel\n+ [ cb1] sum_black\n+ [ cbb] get_lum_min\n+ [ cc7] current_image\n+ [ cd5] shift\n+ [ cdb] draw_fg_pixel\n+ [ ce9] iterative_threshold\n+ [ cfd] value\n+ [ d03] old_thresh\n+ [ d0e] get_lum_709\n+ [ d1a] get_lum_601\n+ [ d26] fraction\n+ [ d2f] get_lum_lin\n+ [ d3b] imlib_image_set_format\n+ [ d52] print_lum_help\n+ [ d61] imlib_context_get_image\n+ [ d79] size_white\n+ [ d84] imlib_create_cropped_image\n+ [ d9f] save_error\n+ [ daa] temp_image1\n+ [ db6] temp_image2\n+ [ dc2] filename\n+ [ dcb] avg_white\n+ [ dd5] set_pixels_filter_iter\n+ [ dec] image_type\n+ [ df7] set_pixel\n+ [ e01] strrchr\n+ [ e09] temp_image\n+ [ e14] float\n+ [ e1a] fg_bg_e\n+ [ e22] imgproc.c\n+ [ e2c] get_lum_max\n+ [ e38] fg_bg_t\n+ [ e40] sum_white\n+ [ e4a] imlib_save_image_with_error_return\n+ [ e6d] get_lum_red\n+ [ e79] keyword\n+ [ e81] source_image\n+ [ e8e] get_threshold\n+ [ e9c] thresh_lum\n+ [ ea7] get_lum_green\n+ [ eb5] ssocr_set_color\n+ [ ec5] get_lum_blue\n+ [ ed2] stdout_file\n+ [ ede] print_cs_help\n+ [ eec] fputs\n+ [ ef2] help.c\n+ [ ef9] charset_array\n+ [ f07] charset.c\n \n"}]}]}]}]}]}