{"diffoscope-json-version": 1, "source1": "/srv/reproducible-results/rbuild-debian/r-b-build.NK6en4il/b1/ggml_0.0~git20250712.d62df60-5_amd64.changes", "source2": "/srv/reproducible-results/rbuild-debian/r-b-build.NK6en4il/b2/ggml_0.0~git20250712.d62df60-5_amd64.changes", "unified_diff": null, "details": [{"source1": "Files", "source2": "Files", "unified_diff": "@@ -1,12 +1,12 @@\n \n 562a457a004f4c26d920ecbacf21057a 35440 libdevel optional libggml-dev_0.0~git20250712.d62df60-5_amd64.deb\n 605071d6a3434a8319681b847ce19555 140152 debug optional libggml0-backend-blas-dbgsym_0.0~git20250712.d62df60-5_amd64.deb\n dde54916998266f7ae7f1f400b9d3273 19140 libs optional libggml0-backend-blas_0.0~git20250712.d62df60-5_amd64.deb\n 5394cf07ca45d91bdc36858f0e978724 7602508 debug optional libggml0-backend-cpu-dbgsym_0.0~git20250712.d62df60-5_amd64.deb\n 6baf550faa7f466ebb43382c584f312a 595496 libs optional libggml0-backend-cpu_0.0~git20250712.d62df60-5_amd64.deb\n- 0c72eb50f44499c9b16b13b74f19731d 1861944 debug optional libggml0-backend-hip-dbgsym_0.0~git20250712.d62df60-5_amd64.deb\n- af6f1a7dfbaf0892c06f8d11a1ac2426 108439420 libs optional libggml0-backend-hip_0.0~git20250712.d62df60-5_amd64.deb\n+ 6ee56365db8795bb4f448404a29a9218 1861820 debug optional libggml0-backend-hip-dbgsym_0.0~git20250712.d62df60-5_amd64.deb\n+ fe4a45713e4cb422fa32513cd911dc8d 108441864 libs optional libggml0-backend-hip_0.0~git20250712.d62df60-5_amd64.deb\n ba3c0ec689b236badd87e54d300cee9a 2828756 debug optional libggml0-backend-vulkan-dbgsym_0.0~git20250712.d62df60-5_amd64.deb\n 6162ce52f7be229896b42dbec72da3b9 2136760 libs optional libggml0-backend-vulkan_0.0~git20250712.d62df60-5_amd64.deb\n 7f8973bc041eab67d39944df1484b227 3179088 debug optional libggml0-dbgsym_0.0~git20250712.d62df60-5_amd64.deb\n 32a9826a4489dc95ecb440683e7f2652 333688 libs optional libggml0_0.0~git20250712.d62df60-5_amd64.deb\n"}, {"source1": "libggml0-backend-hip_0.0~git20250712.d62df60-5_amd64.deb", "source2": "libggml0-backend-hip_0.0~git20250712.d62df60-5_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2025-09-09 17:17:03.000000 debian-binary\n -rw-r--r-- 0 0 0 1120 2025-09-09 17:17:03.000000 control.tar.xz\n--rw-r--r-- 0 0 0 108438108 2025-09-09 17:17:03.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 108440552 2025-09-09 17:17:03.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./control", "source2": "./control", "unified_diff": "@@ -1,13 +1,13 @@\n Package: libggml0-backend-hip\n Source: ggml\n Version: 0.0~git20250712.d62df60-5\n Architecture: amd64\n Maintainer: Debian Deep Learning Team \n-Installed-Size: 896300\n+Installed-Size: 896304\n Depends: libamdhip64-5 (>= 4.5.2), libc6 (>= 2.38), libgcc-s1 (>= 3.0), libggml0 (>= 0.0~git20250712.d62df60), libhipblas0 (>= 5.3.3), librocblas0 (>= 5.3.3)\n Conflicts: libggml0-backend-vulkan\n Provides: libggml0-backend (= 0.0~git20250712.d62df60-5)\n Section: libs\n Priority: optional\n Multi-Arch: same\n Homepage: https://github.com/ggml-org/ggml\n"}, {"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,14 +1,14 @@\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/x86_64-linux-gnu/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/x86_64-linux-gnu/ggml/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/x86_64-linux-gnu/ggml/backends0/\n--rw-r--r-- 0 root (0) root (0) 917786840 2025-09-09 17:17:03.000000 ./usr/lib/x86_64-linux-gnu/ggml/backends0/libggml-hip.so\n+-rw-r--r-- 0 root (0) root (0) 917790936 2025-09-09 17:17:03.000000 ./usr/lib/x86_64-linux-gnu/ggml/backends0/libggml-hip.so\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/doc/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/doc/libggml0-backend-hip/\n -rw-r--r-- 0 root (0) root (0) 2106 2025-09-09 17:17:03.000000 ./usr/share/doc/libggml0-backend-hip/changelog.Debian.gz\n -rw-r--r-- 0 root (0) root (0) 6516 2025-09-09 17:17:03.000000 ./usr/share/doc/libggml0-backend-hip/copyright\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/lintian/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/lintian/overrides/\n"}, {"source1": "./usr/lib/x86_64-linux-gnu/ggml/backends0/libggml-hip.so", "source2": "./usr/lib/x86_64-linux-gnu/ggml/backends0/libggml-hip.so", "comments": ["File has been modified after NT_GNU_BUILD_ID has been applied."], "unified_diff": null, "details": [{"source1": "readelf --wide --file-header {}", "source2": "readelf --wide --file-header {}", "unified_diff": "@@ -6,15 +6,15 @@\n OS/ABI: UNIX - System V\n ABI Version: 0\n Type: DYN (Shared object file)\n Machine: Advanced Micro Devices X86-64\n Version: 0x1\n Entry point address: 0x0\n Start of program headers: 64 (bytes into file)\n- Start of section headers: 917784984 (bytes into file)\n+ Start of section headers: 917789080 (bytes into file)\n Flags: 0x0\n Size of this header: 64 (bytes)\n Size of program headers: 56 (bytes)\n Number of program headers: 9\n Size of section headers: 64 (bytes)\n Number of section headers: 29\n Section header string table index: 28\n"}, {"source1": "readelf --wide --program-header {}", "source2": "readelf --wide --program-header {}", "unified_diff": "@@ -3,21 +3,21 @@\n Entry point 0x0\n There are 9 program headers, starting at offset 64\n \n Program Headers:\n Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x021990 0x021990 R 0x1000\n LOAD 0x022000 0x0000000000022000 0x0000000000022000 0x2b8579 0x2b8579 R E 0x1000\n- LOAD 0x2db000 0x00000000002db000 0x00000000002db000 0x368195d4 0x368195d4 R 0x1000\n- LOAD 0x36af4fd8 0x0000000036af5fd8 0x0000000036af5fd8 0x04f870 0x050560 RW 0x1000\n- DYNAMIC 0x36b43090 0x0000000036b44090 0x0000000036b44090 0x000240 0x000240 RW 0x8\n+ LOAD 0x2db000 0x00000000002db000 0x00000000002db000 0x3681a5d4 0x3681a5d4 R 0x1000\n+ LOAD 0x36af5fd8 0x0000000036af6fd8 0x0000000036af6fd8 0x04f870 0x050560 RW 0x1000\n+ DYNAMIC 0x36b44090 0x0000000036b45090 0x0000000036b45090 0x000240 0x000240 RW 0x8\n NOTE 0x000238 0x0000000000000238 0x0000000000000238 0x000024 0x000024 R 0x4\n- GNU_EH_FRAME 0x36ae3d18 0x0000000036ae3d18 0x0000000036ae3d18 0x006384 0x006384 R 0x4\n+ GNU_EH_FRAME 0x36ae4d18 0x0000000036ae4d18 0x0000000036ae4d18 0x006384 0x006384 R 0x4\n GNU_STACK 0x000000 0x0000000000000000 0x0000000000000000 0x000000 0x000000 RW 0x10\n- GNU_RELRO 0x36af4fd8 0x0000000036af5fd8 0x0000000036af5fd8 0x04f028 0x04f028 R 0x1\n+ GNU_RELRO 0x36af5fd8 0x0000000036af6fd8 0x0000000036af6fd8 0x04f028 0x04f028 R 0x1\n \n Section to Segment mapping:\n Segment Sections...\n 00 .note.gnu.build-id .gnu.hash .dynsym .dynstr .gnu.version .gnu.version_r .rela.dyn .rela.plt \n 01 .init .plt .plt.got .text .fini \n 02 .rodata .hip_fatbin .eh_frame_hdr .gcc_except_table \n 03 .eh_frame .init_array .fini_array .data.rel.ro .dynamic .got .data .hipFatBinSegment .bss \n"}, {"source1": "readelf --wide --sections {}", "source2": "readelf --wide --sections {}", "unified_diff": "@@ -1,8 +1,8 @@\n-There are 29 section headers, starting at offset 0x36b44998:\n+There are 29 section headers, starting at offset 0x36b45998:\n \n Section Headers:\n [Nr] Name Type Address Off Size ES Flg Lk Inf Al\n [ 0] NULL 0000000000000000 000000 000000 00 0 0 0\n [ 1] .note.gnu.build-id NOTE 0000000000000238 000238 000024 00 A 0 0 4\n [ 2] .gnu.hash GNU_HASH 0000000000000260 000260 000c8c 00 A 3 0 8\n [ 3] .dynsym DYNSYM 0000000000000ef0 000ef0 0032b8 18 A 4 1 8\n@@ -13,26 +13,26 @@\n [ 8] .rela.plt RELA 000000000001f518 01f518 002478 18 AI 3 23 8\n [ 9] .init PROGBITS 0000000000022000 022000 000017 00 AX 0 0 4\n [10] .plt PROGBITS 0000000000022020 022020 001860 10 AX 0 0 16\n [11] .plt.got PROGBITS 0000000000023880 023880 000018 08 AX 0 0 8\n [12] .text PROGBITS 00000000000238a0 0238a0 2b6cd0 00 AX 0 0 16\n [13] .fini PROGBITS 00000000002da570 2da570 000009 00 AX 0 0 4\n [14] .rodata PROGBITS 00000000002db000 2db000 034f64 00 A 0 0 16\n- [15] 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00011b 00 0 0 1\n+ [15] .hip_fatbin PROGBITS 0000000000310000 310000 367d4d18 00 A 0 0 4096\n+ [16] .eh_frame_hdr PROGBITS 0000000036ae4d18 36ae4d18 006384 00 A 0 0 4\n+ [17] .gcc_except_table PROGBITS 0000000036aeb09c 36aeb09c 00a538 00 A 0 0 4\n+ [18] .eh_frame PROGBITS 0000000036af6fd8 36af5fd8 048cf0 00 WA 0 0 8\n+ [19] .init_array INIT_ARRAY 0000000036b3fcc8 36b3ecc8 0002d8 08 WA 0 0 8\n+ [20] .fini_array FINI_ARRAY 0000000036b3ffa0 36b3efa0 000008 08 WA 0 0 8\n+ [21] .data.rel.ro PROGBITS 0000000036b3ffa8 36b3efa8 0050e8 00 WA 0 0 8\n+ [22] .dynamic DYNAMIC 0000000036b45090 36b44090 000240 10 WA 4 0 8\n+ [23] .got PROGBITS 0000000036b452d0 36b442d0 000d30 08 WA 0 0 8\n+ [24] .data PROGBITS 0000000036b46000 36b45000 000020 00 WA 0 0 16\n+ [25] .hipFatBinSegment PROGBITS 0000000036b46020 36b45020 000828 00 WA 0 0 8\n+ [26] .bss NOBITS 0000000036b46850 36b45848 000ce8 00 WA 0 0 16\n+ [27] .gnu_debuglink PROGBITS 0000000000000000 36b45848 000034 00 0 0 4\n+ [28] .shstrtab STRTAB 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_Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi128ELi128ELi16ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 158: 00000000001524c0 4422 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi112ELi4ELi4EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 159: 000000000016c9b0 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi80ELi80ELi8ELi1EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 160: 0000000000024630 813 FUNC GLOBAL DEFAULT 12 _Z20ggml_cuda_op_argsortR25ggml_backend_cuda_contextP11ggml_tensor\n 161: 0000000000111cd0 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi96ELi96ELi16ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensor\n- 162: 0000000036b46318 8 OBJECT WEAK DEFAULT 26 _ZGVZN22batched_mul_mat_traitsIL9ggml_type1EE8get_betaEvE3val\n+ 162: 0000000036b47318 8 OBJECT WEAK DEFAULT 26 _ZGVZN22batched_mul_mat_traitsIL9ggml_type1EE8get_betaEvE3val\n 163: 00000000000f5720 638 FUNC GLOBAL DEFAULT 12 _Z16ggml_cuda_op_absR25ggml_backend_cuda_contextP11ggml_tensor\n 164: 000000000013a510 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi64ELi64ELi32ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 165: 000000000018b6a0 4422 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi112ELi8ELi8EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 166: 000000000013a590 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi64ELi32ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 167: 00000000002b3700 41967 FUNC WEAK DEFAULT 12 _Z14mul_mat_q_caseIL9ggml_type8EEvR25ggml_backend_cuda_contextRK8mmq_argsP12ihipStream_t\n 168: 000000000030f30c 4 OBJECT WEAK DEFAULT 14 _ZZN22batched_mul_mat_traitsIL9ggml_type0EE9get_alphaEvE3val\n 169: 000000000015e060 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi256ELi256ELi4ELi8EEvR25ggml_backend_cuda_contextP11ggml_tensor\n@@ -195,19 +195,19 @@\n 191: 00000000000fd060 1667 FUNC GLOBAL DEFAULT 12 _Z20ggml_cuda_op_upscaleR25ggml_backend_cuda_contextP11ggml_tensor\n 192: 00000000000539e0 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi96ELi16ELi1EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 193: 00000000001089e0 4385 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi256ELi1ELi8EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 194: 000000000012ff90 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi96ELi96ELi2ELi8EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 195: 0000000000280c70 41967 FUNC WEAK DEFAULT 12 _Z14mul_mat_q_caseIL9ggml_type7EEvR25ggml_backend_cuda_contextRK8mmq_argsP12ihipStream_t\n 196: 0000000000043540 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi128ELi16ELi1EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 197: 00000000000f5400 476 FUNC GLOBAL DEFAULT 12 _Z31ggml_cuda_op_timestep_embeddingR25ggml_backend_cuda_contextP11ggml_tensor\n- 198: 0000000036b40a30 8 OBJECT WEAK DEFAULT 21 _Z18ssm_scan_f32_groupILi16ELi256EEvPKfS1_S1_S1_S1_S1_PKiPfiiiiiiiiiiilllll\n+ 198: 0000000036b41a30 8 OBJECT WEAK DEFAULT 21 _Z18ssm_scan_f32_groupILi16ELi256EEvPKfS1_S1_S1_S1_S1_PKiPfiiiiiiiiiiilllll\n 199: 0000000000126710 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi96ELi96ELi2ELi4EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 200: 0000000000171130 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi256ELi8ELi1EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 201: 00000000000fe150 1315 FUNC GLOBAL DEFAULT 12 _Z22ggml_cuda_op_rwkv_wkv7R25ggml_backend_cuda_contextP11ggml_tensor\n- 202: 0000000036b46310 2 OBJECT WEAK DEFAULT 26 _ZZN22batched_mul_mat_traitsIL9ggml_type1EE8get_betaEvE3val\n+ 202: 0000000036b47310 2 OBJECT WEAK DEFAULT 26 _ZZN22batched_mul_mat_traitsIL9ggml_type1EE8get_betaEvE3val\n 203: 0000000000149e30 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi128ELi4ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 204: 00000000000f4910 465 FUNC WEAK DEFAULT 12 _Z33__device_stub__ssm_scan_f32_groupILi16ELi128EEvPKfS1_S1_S1_S1_S1_PKiPfiiiiiiiiiiilllll\n 205: 000000000013b750 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi80ELi32ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 206: 0000000000154860 4422 FUNC WEAK DEFAULT 12 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_Z12launch_fattnILi64ELi8ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 236: 00000000001374f0 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi80ELi80ELi32ELi1EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 237: 00000000000bd8f0 1814 FUNC GLOBAL DEFAULT 12 _Z23ggml_cuda_mul_mat_vec_qR25ggml_backend_cuda_contextPK11ggml_tensorS3_S3_PS1_\n 238: 000000000018a450 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi96ELi96ELi8ELi8EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 239: 00000000000f5ea0 638 FUNC GLOBAL DEFAULT 12 _Z17ggml_cuda_op_stepR25ggml_backend_cuda_contextP11ggml_tensor\n 240: 0000000000035c30 30 FUNC GLOBAL DEFAULT 12 _Z21ggml_get_to_bf16_cuda9ggml_type\n- 241: 0000000036b3fad0 24 OBJECT WEAK DEFAULT 21 _ZTI18ggml_cuda_pool_leg\n+ 241: 0000000036b40ad0 24 OBJECT WEAK DEFAULT 21 _ZTI18ggml_cuda_pool_leg\n 242: 000000000018c870 4422 FUNC WEAK DEFAULT 12 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0x0000000000000019 (INIT_ARRAY) 0x36b3fcc8\n 0x000000000000001b (INIT_ARRAYSZ) 728 (bytes)\n- 0x000000000000001a (FINI_ARRAY) 0x36b3efa0\n+ 0x000000000000001a (FINI_ARRAY) 0x36b3ffa0\n 0x000000000000001c (FINI_ARRAYSZ) 8 (bytes)\n 0x000000006ffffef5 (GNU_HASH) 0x260\n 0x0000000000000005 (STRTAB) 0x41a8\n 0x0000000000000006 (SYMTAB) 0xef0\n 0x000000000000000a (STRSZ) 43588 (bytes)\n 0x000000000000000b (SYMENT) 24 (bytes)\n- 0x0000000000000003 (PLTGOT) 0x36b442d0\n+ 0x0000000000000003 (PLTGOT) 0x36b452d0\n 0x0000000000000002 (PLTRELSZ) 9336 (bytes)\n 0x0000000000000014 (PLTREL) RELA\n 0x0000000000000017 (JMPREL) 0x1f518\n 0x0000000000000007 (RELA) 0xf0a8\n 0x0000000000000008 (RELASZ) 66672 (bytes)\n 0x0000000000000009 (RELAENT) 24 (bytes)\n 0x000000000000001e (FLAGS) BIND_NOW\n"}, {"source1": "readelf --wide --notes {}", "source2": "readelf --wide --notes {}", "unified_diff": "@@ -1,4 +1,4 @@\n \n Displaying notes found in: .note.gnu.build-id\n Owner Data size \tDescription\n- GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 92c8ad8746b7b281916d9ea9c1e66aece6c9424b\n+ GNU 0x00000014\tNT_GNU_BUILD_ID (unique build ID bitstring)\t Build ID: 7fc98e67d590b4ca7d05e6fc36a71d965857e044\n"}, {"source1": "readelf --wide --debug-dump=frames {}", "source2": "readelf --wide --debug-dump=frames {}", "unified_diff": "@@ -1,3198 +1,3198 @@\n Contents of the .eh_frame_hdr section:\n \n Version: 1\n Pointer Encoding Format: 0x1b (sdata4, pcrel)\n Count Encoding Format: 0x3 (udata4, absolute)\n Table Encoding Format: 0x3b (sdata4, datarel)\n- Start of frame section: 0x122bc (offset: 0x36af5fd8)\n+ Start of frame section: 0x122bc (offset: 0x36af6fd8)\n Entries in search table: 0xc6f\n- 0xffffffffc953e308 (offset: 0x22020) -> 0x122d8 fde=[ 18]\n- 0xffffffffc953fb68 (offset: 0x23880) -> 0x12300 fde=[ 40]\n- 0xffffffffc953fb88 (offset: 0x238a0) -> 0x18550 fde=[ 6290]\n- 0xffffffffc953fbd8 (offset: 0x238f0) -> 0x18570 fde=[ 62b0]\n- 0xffffffffc953fc28 (offset: 0x23940) -> 0x18fc0 fde=[ 6d00]\n- 0xffffffffc953fc58 (offset: 0x23970) -> 0x12318 fde=[ 58]\n- 0xffffffffc953fca8 (offset: 0x239c0) -> 0x12338 fde=[ 78]\n- 0xffffffffc953fd18 (offset: 0x23a30) -> 0x12358 fde=[ 98]\n- 0xffffffffc9540118 (offset: 0x23e30) -> 0x123b4 fde=[ f4]\n- 0xffffffffc9540238 (offset: 0x23f50) -> 0x123d8 fde=[ 118]\n- 0xffffffffc95402a8 (offset: 0x23fc0) -> 0x123f0 fde=[ 130]\n- 0xffffffffc95402d8 (offset: 0x23ff0) -> 0x12408 fde=[ 148]\n- 0xffffffffc95404c8 (offset: 0x241e0) -> 0x12454 fde=[ 194]\n- 0xffffffffc9540558 (offset: 0x24270) -> 0x12478 fde=[ 1b8]\n- 0xffffffffc95405c8 (offset: 0x242e0) -> 0x12490 fde=[ 1d0]\n- 0xffffffffc95405f8 (offset: 0x24310) -> 0x124a8 fde=[ 1e8]\n- 0xffffffffc95407f8 (offset: 0x24510) -> 0x124fc fde=[ 23c]\n- 0xffffffffc9540878 (offset: 0x24590) -> 0x1251c fde=[ 25c]\n- 0xffffffffc95408e8 (offset: 0x24600) -> 0x12534 fde=[ 274]\n- 0xffffffffc9540918 (offset: 0x24630) -> 0x12550 fde=[ 290]\n- 0xffffffffc9540c48 (offset: 0x24960) -> 0x125ac fde=[ 2ec]\n- 0xffffffffc9540cd8 (offset: 0x249f0) -> 0x125d0 fde=[ 310]\n- 0xffffffffc9540d68 (offset: 0x24a80) -> 0x125f4 fde=[ 334]\n- 0xffffffffc9540e08 (offset: 0x24b20) -> 0x12614 fde=[ 354]\n- 0xffffffffc9540e38 (offset: 0x24b50) -> 0x12630 fde=[ 370]\n- 0xffffffffc95420a8 (offset: 0x25dc0) -> 0x127f0 fde=[ 530]\n- 0xffffffffc9544078 (offset: 0x27d90) -> 0x12a30 fde=[ 770]\n- 0xffffffffc9546048 (offset: 0x29d60) -> 0x12c70 fde=[ 9b0]\n- 0xffffffffc9548018 (offset: 0x2bd30) -> 0x12eb0 fde=[ bf0]\n- 0xffffffffc9549fe8 (offset: 0x2dd00) -> 0x130f0 fde=[ e30]\n- 0xffffffffc954a488 (offset: 0x2e1a0) -> 0x1314c fde=[ e8c]\n- 0xffffffffc954a628 (offset: 0x2e340) -> 0x13170 fde=[ eb0]\n- 0xffffffffc954a7c8 (offset: 0x2e4e0) -> 0x13194 fde=[ ed4]\n- 0xffffffffc954a968 (offset: 0x2e680) -> 0x131b8 fde=[ ef8]\n- 0xffffffffc954ab08 (offset: 0x2e820) -> 0x131dc fde=[ f1c]\n- 0xffffffffc954aca8 (offset: 0x2e9c0) -> 0x13200 fde=[ f40]\n- 0xffffffffc954ae48 (offset: 0x2eb60) -> 0x13224 fde=[ f64]\n- 0xffffffffc954afe8 (offset: 0x2ed00) -> 0x13248 fde=[ f88]\n- 0xffffffffc954b188 (offset: 0x2eea0) -> 0x1326c fde=[ fac]\n- 0xffffffffc954b328 (offset: 0x2f040) -> 0x13290 fde=[ fd0]\n- 0xffffffffc954b4c8 (offset: 0x2f1e0) -> 0x132b4 fde=[ ff4]\n- 0xffffffffc954b668 (offset: 0x2f380) -> 0x132d8 fde=[ 1018]\n- 0xffffffffc954b808 (offset: 0x2f520) -> 0x132fc fde=[ 103c]\n- 0xffffffffc954b9a8 (offset: 0x2f6c0) -> 0x13320 fde=[ 1060]\n- 0xffffffffc954bb48 (offset: 0x2f860) -> 0x13344 fde=[ 1084]\n- 0xffffffffc954bce8 (offset: 0x2fa00) -> 0x13368 fde=[ 10a8]\n- 0xffffffffc954be88 (offset: 0x2fba0) -> 0x1338c fde=[ 10cc]\n- 0xffffffffc954c028 (offset: 0x2fd40) -> 0x133b0 fde=[ 10f0]\n- 0xffffffffc954c1c8 (offset: 0x2fee0) -> 0x133d4 fde=[ 1114]\n- 0xffffffffc954c368 (offset: 0x30080) -> 0x133f8 fde=[ 1138]\n- 0xffffffffc954c508 (offset: 0x30220) -> 0x1341c fde=[ 115c]\n- 0xffffffffc954c6a8 (offset: 0x303c0) -> 0x13440 fde=[ 1180]\n- 0xffffffffc954c848 (offset: 0x30560) -> 0x13464 fde=[ 11a4]\n- 0xffffffffc954c9e8 (offset: 0x30700) -> 0x13488 fde=[ 11c8]\n- 0xffffffffc954cb88 (offset: 0x308a0) -> 0x134ac fde=[ 11ec]\n- 0xffffffffc954cd28 (offset: 0x30a40) -> 0x134d0 fde=[ 1210]\n- 0xffffffffc954cec8 (offset: 0x30be0) -> 0x134f4 fde=[ 1234]\n- 0xffffffffc954d068 (offset: 0x30d80) -> 0x13518 fde=[ 1258]\n- 0xffffffffc954d208 (offset: 0x30f20) -> 0x1353c fde=[ 127c]\n- 0xffffffffc954d3a8 (offset: 0x310c0) -> 0x13560 fde=[ 12a0]\n- 0xffffffffc954d548 (offset: 0x31260) -> 0x13584 fde=[ 12c4]\n- 0xffffffffc954d6e8 (offset: 0x31400) -> 0x135a8 fde=[ 12e8]\n- 0xffffffffc954d888 (offset: 0x315a0) -> 0x135cc fde=[ 130c]\n- 0xffffffffc954da28 (offset: 0x31740) -> 0x135f0 fde=[ 1330]\n- 0xffffffffc954dbc8 (offset: 0x318e0) -> 0x13614 fde=[ 1354]\n- 0xffffffffc954dd68 (offset: 0x31a80) -> 0x13638 fde=[ 1378]\n- 0xffffffffc954df08 (offset: 0x31c20) -> 0x1365c fde=[ 139c]\n- 0xffffffffc954e0a8 (offset: 0x31dc0) -> 0x13680 fde=[ 13c0]\n- 0xffffffffc954e248 (offset: 0x31f60) -> 0x136a4 fde=[ 13e4]\n- 0xffffffffc954e3e8 (offset: 0x32100) -> 0x136c8 fde=[ 1408]\n- 0xffffffffc954e588 (offset: 0x322a0) -> 0x136ec fde=[ 142c]\n- 0xffffffffc954e6c8 (offset: 0x323e0) -> 0x13710 fde=[ 1450]\n- 0xffffffffc954ee68 (offset: 0x32b80) -> 0x13734 fde=[ 1474]\n- 0xffffffffc954ee98 (offset: 0x32bb0) -> 0x13750 fde=[ 1490]\n- 0xffffffffc954f188 (offset: 0x32ea0) -> 0x137ac fde=[ 14ec]\n- 0xffffffffc954f228 (offset: 0x32f40) -> 0x137d0 fde=[ 1510]\n- 0xffffffffc954f2c8 (offset: 0x32fe0) -> 0x137f4 fde=[ 1534]\n- 0xffffffffc954f368 (offset: 0x33080) -> 0x13814 fde=[ 1554]\n- 0xffffffffc954f398 (offset: 0x330b0) -> 0x13830 fde=[ 1570]\n- 0xffffffffc954fd68 (offset: 0x33a80) -> 0x13880 fde=[ 15c0]\n- 0xffffffffc954fe08 (offset: 0x33b20) -> 0x138a4 fde=[ 15e4]\n- 0xffffffffc954fea8 (offset: 0x33bc0) -> 0x138c8 fde=[ 1608]\n- 0xffffffffc954ff48 (offset: 0x33c60) -> 0x138ec fde=[ 162c]\n- 0xffffffffc9550158 (offset: 0x33e70) -> 0x13910 fde=[ 1650]\n- 0xffffffffc9550368 (offset: 0x34080) -> 0x13934 fde=[ 1674]\n- 0xffffffffc9550578 (offset: 0x34290) -> 0x13958 fde=[ 1698]\n- 0xffffffffc9550788 (offset: 0x344a0) -> 0x1397c fde=[ 16bc]\n- 0xffffffffc9550908 (offset: 0x34620) -> 0x139a0 fde=[ 16e0]\n- 0xffffffffc9550938 (offset: 0x34650) -> 0x139b8 fde=[ 16f8]\n- 0xffffffffc9550d88 (offset: 0x34aa0) -> 0x13a14 fde=[ 1754]\n- 0xffffffffc9550f08 (offset: 0x34c20) -> 0x13a38 fde=[ 1778]\n- 0xffffffffc9550f78 (offset: 0x34c90) -> 0x13a50 fde=[ 1790]\n- 0xffffffffc9550fa8 (offset: 0x34cc0) -> 0x13a68 fde=[ 17a8]\n- 0xffffffffc9551598 (offset: 0x352b0) -> 0x13b0c fde=[ 184c]\n- 0xffffffffc9551638 (offset: 0x35350) -> 0x13b2c fde=[ 186c]\n- 0xffffffffc9551668 (offset: 0x35380) -> 0x13ac4 fde=[ 1804]\n- 0xffffffffc95517d8 (offset: 0x354f0) -> 0x13ae8 fde=[ 1828]\n- 0xffffffffc9551948 (offset: 0x35660) -> 0x13b48 fde=[ 1888]\n- 0xffffffffc9551a78 (offset: 0x35790) -> 0x13b6c fde=[ 18ac]\n- 0xffffffffc9551e78 (offset: 0x35b90) -> 0x13bc8 fde=[ 1908]\n- 0xffffffffc9551ee8 (offset: 0x35c00) -> 0x13be0 fde=[ 1920]\n- 0xffffffffc9551f18 (offset: 0x35c30) -> 0x13bf8 fde=[ 1938]\n- 0xffffffffc9551f38 (offset: 0x35c50) -> 0x13c0c fde=[ 194c]\n- 0xffffffffc9551f68 (offset: 0x35c80) -> 0x13c34 fde=[ 1974]\n- 0xffffffffc9551f98 (offset: 0x35cb0) -> 0x13c5c fde=[ 199c]\n- 0xffffffffc9552088 (offset: 0x35da0) -> 0x13c78 fde=[ 19b8]\n- 0xffffffffc9552178 (offset: 0x35e90) -> 0x13cb8 fde=[ 19f8]\n- 0xffffffffc9552268 (offset: 0x35f80) -> 0x13cf8 fde=[ 1a38]\n- 0xffffffffc9552348 (offset: 0x36060) -> 0x13d38 fde=[ 1a78]\n- 0xffffffffc9552428 (offset: 0x36140) -> 0x13d78 fde=[ 1ab8]\n- 0xffffffffc9552578 (offset: 0x36290) -> 0x13db8 fde=[ 1af8]\n- 0xffffffffc9552658 (offset: 0x36370) -> 0x13df8 fde=[ 1b38]\n- 0xffffffffc9552718 (offset: 0x36430) -> 0x13e2c fde=[ 1b6c]\n- 0xffffffffc95527d8 (offset: 0x364f0) -> 0x13e60 fde=[ 1ba0]\n- 0xffffffffc9552898 (offset: 0x365b0) -> 0x13e94 fde=[ 1bd4]\n- 0xffffffffc9552958 (offset: 0x36670) -> 0x13ec8 fde=[ 1c08]\n- 0xffffffffc9552a18 (offset: 0x36730) -> 0x13efc fde=[ 1c3c]\n- 0xffffffffc9552ad8 (offset: 0x367f0) -> 0x13f30 fde=[ 1c70]\n- 0xffffffffc9552b98 (offset: 0x368b0) -> 0x13f64 fde=[ 1ca4]\n- 0xffffffffc9552c58 (offset: 0x36970) -> 0x13f98 fde=[ 1cd8]\n- 0xffffffffc9552d18 (offset: 0x36a30) -> 0x13fcc fde=[ 1d0c]\n- 0xffffffffc9552dd8 (offset: 0x36af0) -> 0x14000 fde=[ 1d40]\n- 0xffffffffc9552e98 (offset: 0x36bb0) -> 0x14034 fde=[ 1d74]\n- 0xffffffffc9552f58 (offset: 0x36c70) -> 0x14068 fde=[ 1da8]\n- 0xffffffffc9553018 (offset: 0x36d30) -> 0x1409c fde=[ 1ddc]\n- 0xffffffffc95530d8 (offset: 0x36df0) -> 0x140d0 fde=[ 1e10]\n- 0xffffffffc9553108 (offset: 0x36e20) -> 0x140f8 fde=[ 1e38]\n- 0xffffffffc9553138 (offset: 0x36e50) -> 0x14120 fde=[ 1e60]\n- 0xffffffffc9553158 (offset: 0x36e70) -> 0x14134 fde=[ 1e74]\n- 0xffffffffc9553248 (offset: 0x36f60) -> 0x14174 fde=[ 1eb4]\n- 0xffffffffc9553338 (offset: 0x37050) -> 0x141b4 fde=[ 1ef4]\n- 0xffffffffc9553418 (offset: 0x37130) -> 0x141f4 fde=[ 1f34]\n- 0xffffffffc95534f8 (offset: 0x37210) -> 0x14234 fde=[ 1f74]\n- 0xffffffffc95535d8 (offset: 0x372f0) -> 0x14274 fde=[ 1fb4]\n- 0xffffffffc9553698 (offset: 0x373b0) -> 0x142a8 fde=[ 1fe8]\n- 0xffffffffc9553758 (offset: 0x37470) -> 0x142dc fde=[ 201c]\n- 0xffffffffc9553818 (offset: 0x37530) -> 0x14310 fde=[ 2050]\n- 0xffffffffc95538d8 (offset: 0x375f0) -> 0x14344 fde=[ 2084]\n- 0xffffffffc9553998 (offset: 0x376b0) -> 0x14378 fde=[ 20b8]\n- 0xffffffffc9553a58 (offset: 0x37770) -> 0x143ac fde=[ 20ec]\n- 0xffffffffc9553b18 (offset: 0x37830) -> 0x143e0 fde=[ 2120]\n- 0xffffffffc9553bd8 (offset: 0x378f0) -> 0x14414 fde=[ 2154]\n- 0xffffffffc9553c98 (offset: 0x379b0) -> 0x14448 fde=[ 2188]\n- 0xffffffffc9553d58 (offset: 0x37a70) -> 0x1447c fde=[ 21bc]\n- 0xffffffffc9553e18 (offset: 0x37b30) -> 0x144b0 fde=[ 21f0]\n- 0xffffffffc9553ed8 (offset: 0x37bf0) -> 0x144e4 fde=[ 2224]\n- 0xffffffffc9553f98 (offset: 0x37cb0) -> 0x14518 fde=[ 2258]\n- 0xffffffffc9554058 (offset: 0x37d70) -> 0x1454c fde=[ 228c]\n- 0xffffffffc9554088 (offset: 0x37da0) -> 0x14574 fde=[ 22b4]\n- 0xffffffffc95540b8 (offset: 0x37dd0) -> 0x1459c fde=[ 22dc]\n- 0xffffffffc95540d8 (offset: 0x37df0) -> 0x145b0 fde=[ 22f0]\n- 0xffffffffc9554248 (offset: 0x37f60) -> 0x14600 fde=[ 2340]\n- 0xffffffffc95543b8 (offset: 0x380d0) -> 0x14650 fde=[ 2390]\n- 0xffffffffc95543d8 (offset: 0x380f0) -> 0x14664 fde=[ 23a4]\n- 0xffffffffc9554548 (offset: 0x38260) -> 0x146b4 fde=[ 23f4]\n- 0xffffffffc95546b8 (offset: 0x383d0) -> 0x14704 fde=[ 2444]\n- 0xffffffffc95546d8 (offset: 0x383f0) -> 0x14718 fde=[ 2458]\n- 0xffffffffc9554848 (offset: 0x38560) -> 0x14768 fde=[ 24a8]\n- 0xffffffffc95549b8 (offset: 0x386d0) -> 0x147b8 fde=[ 24f8]\n- 0xffffffffc9554a38 (offset: 0x38750) -> 0x147d8 fde=[ 2518]\n- 0xffffffffc9554ab8 (offset: 0x387d0) -> 0x147f8 fde=[ 2538]\n- 0xffffffffc9554b38 (offset: 0x38850) -> 0x14818 fde=[ 2558]\n- 0xffffffffc9554bb8 (offset: 0x388d0) -> 0x14838 fde=[ 2578]\n- 0xffffffffc9554c38 (offset: 0x38950) -> 0x14858 fde=[ 2598]\n- 0xffffffffc9554cb8 (offset: 0x389d0) -> 0x14878 fde=[ 25b8]\n- 0xffffffffc9554d38 (offset: 0x38a50) -> 0x14898 fde=[ 25d8]\n- 0xffffffffc9554da8 (offset: 0x38ac0) -> 0x148b8 fde=[ 25f8]\n- 0xffffffffc9554e18 (offset: 0x38b30) -> 0x148d8 fde=[ 2618]\n- 0xffffffffc9554e88 (offset: 0x38ba0) -> 0x148f8 fde=[ 2638]\n- 0xffffffffc9554ef8 (offset: 0x38c10) -> 0x14918 fde=[ 2658]\n- 0xffffffffc9554f68 (offset: 0x38c80) -> 0x14938 fde=[ 2678]\n- 0xffffffffc9554fd8 (offset: 0x38cf0) -> 0x14958 fde=[ 2698]\n- 0xffffffffc9555048 (offset: 0x38d60) -> 0x14978 fde=[ 26b8]\n- 0xffffffffc95550b8 (offset: 0x38dd0) -> 0x14998 fde=[ 26d8]\n- 0xffffffffc9555128 (offset: 0x38e40) -> 0x149b8 fde=[ 26f8]\n- 0xffffffffc9555198 (offset: 0x38eb0) -> 0x149d8 fde=[ 2718]\n- 0xffffffffc9555208 (offset: 0x38f20) -> 0x149f8 fde=[ 2738]\n- 0xffffffffc9555278 (offset: 0x38f90) -> 0x14a18 fde=[ 2758]\n- 0xffffffffc95552e8 (offset: 0x39000) -> 0x14a38 fde=[ 2778]\n- 0xffffffffc9555358 (offset: 0x39070) -> 0x14a58 fde=[ 2798]\n- 0xffffffffc95553d8 (offset: 0x390f0) -> 0x14a78 fde=[ 27b8]\n- 0xffffffffc9555458 (offset: 0x39170) -> 0x14a98 fde=[ 27d8]\n- 0xffffffffc95554d8 (offset: 0x391f0) -> 0x14ab8 fde=[ 27f8]\n- 0xffffffffc9555558 (offset: 0x39270) -> 0x14ad8 fde=[ 2818]\n- 0xffffffffc95555d8 (offset: 0x392f0) -> 0x14af8 fde=[ 2838]\n- 0xffffffffc9555648 (offset: 0x39360) -> 0x14b18 fde=[ 2858]\n- 0xffffffffc95556b8 (offset: 0x393d0) -> 0x14b38 fde=[ 2878]\n- 0xffffffffc9555728 (offset: 0x39440) -> 0x14b58 fde=[ 2898]\n- 0xffffffffc9555798 (offset: 0x394b0) -> 0x14b78 fde=[ 28b8]\n- 0xffffffffc9555808 (offset: 0x39520) -> 0x14b98 fde=[ 28d8]\n- 0xffffffffc9555878 (offset: 0x39590) -> 0x14bb8 fde=[ 28f8]\n- 0xffffffffc95558e8 (offset: 0x39600) -> 0x14bd8 fde=[ 2918]\n- 0xffffffffc9555958 (offset: 0x39670) -> 0x14bf8 fde=[ 2938]\n- 0xffffffffc95559c8 (offset: 0x396e0) -> 0x14c18 fde=[ 2958]\n- 0xffffffffc9555a38 (offset: 0x39750) -> 0x14c38 fde=[ 2978]\n- 0xffffffffc9555aa8 (offset: 0x397c0) -> 0x14c58 fde=[ 2998]\n- 0xffffffffc9555b18 (offset: 0x39830) -> 0x14c78 fde=[ 29b8]\n- 0xffffffffc9555b88 (offset: 0x398a0) -> 0x14c98 fde=[ 29d8]\n- 0xffffffffc9555bf8 (offset: 0x39910) -> 0x14cb8 fde=[ 29f8]\n- 0xffffffffc9555cd8 (offset: 0x399f0) -> 0x14cdc fde=[ 2a1c]\n- 0xffffffffc9555db8 (offset: 0x39ad0) -> 0x14d00 fde=[ 2a40]\n- 0xffffffffc9555e98 (offset: 0x39bb0) -> 0x14d24 fde=[ 2a64]\n- 0xffffffffc9555f78 (offset: 0x39c90) -> 0x14d48 fde=[ 2a88]\n- 0xffffffffc9556058 (offset: 0x39d70) -> 0x14d6c fde=[ 2aac]\n- 0xffffffffc9556138 (offset: 0x39e50) -> 0x14d90 fde=[ 2ad0]\n- 0xffffffffc95569b8 (offset: 0x3a6d0) -> 0x14db4 fde=[ 2af4]\n- 0xffffffffc95569e8 (offset: 0x3a700) -> 0x14dd0 fde=[ 2b10]\n- 0xffffffffc9556da8 (offset: 0x3aac0) -> 0x14e2c fde=[ 2b6c]\n- 0xffffffffc9556e58 (offset: 0x3ab70) -> 0x14e50 fde=[ 2b90]\n- 0xffffffffc9556ec8 (offset: 0x3abe0) -> 0x14e68 fde=[ 2ba8]\n- 0xffffffffc9556ef8 (offset: 0x3ac10) -> 0x14e80 fde=[ 2bc0]\n- 0xffffffffc9556f08 (offset: 0x3ac20) -> 0x14e94 fde=[ 2bd4]\n- 0xffffffffc9559028 (offset: 0x3cd40) -> 0x14fe4 fde=[ 2d24]\n- 0xffffffffc95592d8 (offset: 0x3cff0) -> 0x15040 fde=[ 2d80]\n- 0xffffffffc9559588 (offset: 0x3d2a0) -> 0x1509c fde=[ 2ddc]\n- 0xffffffffc95597f8 (offset: 0x3d510) -> 0x150f4 fde=[ 2e34]\n- 0xffffffffc9559a78 (offset: 0x3d790) -> 0x1514c fde=[ 2e8c]\n- 0xffffffffc9559a98 (offset: 0x3d7b0) -> 0x15160 fde=[ 2ea0]\n- 0xffffffffc9559bf8 (offset: 0x3d910) -> 0x1518c fde=[ 2ecc]\n- 0xffffffffc9559d78 (offset: 0x3da90) -> 0x151b0 fde=[ 2ef0]\n- 0xffffffffc9559ef8 (offset: 0x3dc10) -> 0x151d4 fde=[ 2f14]\n- 0xffffffffc955a078 (offset: 0x3dd90) -> 0x151f8 fde=[ 2f38]\n- 0xffffffffc955a1f8 (offset: 0x3df10) -> 0x1521c fde=[ 2f5c]\n- 0xffffffffc955a378 (offset: 0x3e090) -> 0x15240 fde=[ 2f80]\n- 0xffffffffc955a4f8 (offset: 0x3e210) -> 0x15264 fde=[ 2fa4]\n- 0xffffffffc955a678 (offset: 0x3e390) -> 0x15288 fde=[ 2fc8]\n- 0xffffffffc955a7f8 (offset: 0x3e510) -> 0x152ac fde=[ 2fec]\n- 0xffffffffc955a978 (offset: 0x3e690) -> 0x152d0 fde=[ 3010]\n- 0xffffffffc955aaf8 (offset: 0x3e810) -> 0x152f4 fde=[ 3034]\n- 0xffffffffc955ac78 (offset: 0x3e990) -> 0x15318 fde=[ 3058]\n- 0xffffffffc955adf8 (offset: 0x3eb10) -> 0x1533c fde=[ 307c]\n- 0xffffffffc955af78 (offset: 0x3ec90) -> 0x15360 fde=[ 30a0]\n- 0xffffffffc955b0f8 (offset: 0x3ee10) -> 0x15384 fde=[ 30c4]\n- 0xffffffffc955b278 (offset: 0x3ef90) -> 0x153a8 fde=[ 30e8]\n- 0xffffffffc955b3f8 (offset: 0x3f110) -> 0x153cc fde=[ 310c]\n- 0xffffffffc955b718 (offset: 0x3f430) -> 0x153f0 fde=[ 3130]\n- 0xffffffffc955b748 (offset: 0x3f460) -> 0x15560 fde=[ 32a0]\n- 0xffffffffc955bc78 (offset: 0x3f990) -> 0x15408 fde=[ 3148]\n- 0xffffffffc955bd18 (offset: 0x3fa30) -> 0x1542c fde=[ 316c]\n- 0xffffffffc955bdb8 (offset: 0x3fad0) -> 0x15450 fde=[ 3190]\n- 0xffffffffc955c268 (offset: 0x3ff80) -> 0x154ac fde=[ 31ec]\n- 0xffffffffc955c318 (offset: 0x40030) -> 0x154d0 fde=[ 3210]\n- 0xffffffffc955c3c8 (offset: 0x400e0) -> 0x15508 fde=[ 3248]\n- 0xffffffffc955c4b8 (offset: 0x401d0) -> 0x15528 fde=[ 3268]\n- 0xffffffffc955c4e8 (offset: 0x40200) -> 0x15630 fde=[ 3370]\n- 0xffffffffc955c518 (offset: 0x40230) -> 0x154f4 fde=[ 3234]\n- 0xffffffffc955c528 (offset: 0x40240) -> 0x15650 fde=[ 3390]\n- 0xffffffffc955c718 (offset: 0x40430) -> 0x156ac fde=[ 33ec]\n- 0xffffffffc955c7b8 (offset: 0x404d0) -> 0x156d0 fde=[ 3410]\n- 0xffffffffc955c828 (offset: 0x40540) -> 0x156e8 fde=[ 3428]\n- 0xffffffffc955c858 (offset: 0x40570) -> 0x15700 fde=[ 3440]\n- 0xffffffffc955c9d8 (offset: 0x406f0) -> 0x15758 fde=[ 3498]\n- 0xffffffffc955cca8 (offset: 0x409c0) -> 0x1577c fde=[ 34bc]\n- 0xffffffffc955cf78 (offset: 0x40c90) -> 0x157a0 fde=[ 34e0]\n- 0xffffffffc955d018 (offset: 0x40d30) -> 0x157c4 fde=[ 3504]\n- 0xffffffffc955d0a8 (offset: 0x40dc0) -> 0x157e8 fde=[ 3528]\n- 0xffffffffc955d148 (offset: 0x40e60) -> 0x1580c fde=[ 354c]\n- 0xffffffffc955d1d8 (offset: 0x40ef0) -> 0x15830 fde=[ 3570]\n- 0xffffffffc955d4a8 (offset: 0x411c0) -> 0x15854 fde=[ 3594]\n- 0xffffffffc955d778 (offset: 0x41490) -> 0x15878 fde=[ 35b8]\n- 0xffffffffc955da48 (offset: 0x41760) -> 0x1589c fde=[ 35dc]\n- 0xffffffffc955dd18 (offset: 0x41a30) -> 0x158c0 fde=[ 3600]\n- 0xffffffffc955ddb8 (offset: 0x41ad0) -> 0x158e4 fde=[ 3624]\n- 0xffffffffc955de58 (offset: 0x41b70) -> 0x15908 fde=[ 3648]\n- 0xffffffffc955e128 (offset: 0x41e40) -> 0x1592c fde=[ 366c]\n- 0xffffffffc955e3f8 (offset: 0x42110) -> 0x15950 fde=[ 3690]\n- 0xffffffffc955e6b8 (offset: 0x423d0) -> 0x15974 fde=[ 36b4]\n- 0xffffffffc955e6e8 (offset: 0x42400) -> 0x1598c fde=[ 36cc]\n- 0xffffffffc955f828 (offset: 0x43540) -> 0x15b68 fde=[ 38a8]\n- 0xffffffffc9560968 (offset: 0x44680) -> 0x15d44 fde=[ 3a84]\n- 0xffffffffc9560998 (offset: 0x446b0) -> 0x15d64 fde=[ 3aa4]\n- 0xffffffffc95609c8 (offset: 0x446e0) -> 0x15d84 fde=[ 3ac4]\n- 0xffffffffc9561b08 (offset: 0x45820) -> 0x15f60 fde=[ 3ca0]\n- 0xffffffffc9562c48 (offset: 0x46960) -> 0x16140 fde=[ 3e80]\n- 0xffffffffc9562da8 (offset: 0x46ac0) -> 0x16198 fde=[ 3ed8]\n- 0xffffffffc9563078 (offset: 0x46d90) -> 0x161bc fde=[ 3efc]\n- 0xffffffffc9563348 (offset: 0x47060) -> 0x161e0 fde=[ 3f20]\n- 0xffffffffc95633e8 (offset: 0x47100) -> 0x16204 fde=[ 3f44]\n- 0xffffffffc9563478 (offset: 0x47190) -> 0x16228 fde=[ 3f68]\n- 0xffffffffc9563518 (offset: 0x47230) -> 0x1624c fde=[ 3f8c]\n- 0xffffffffc95635a8 (offset: 0x472c0) -> 0x16270 fde=[ 3fb0]\n- 0xffffffffc9563878 (offset: 0x47590) -> 0x16294 fde=[ 3fd4]\n- 0xffffffffc9563b48 (offset: 0x47860) -> 0x162b8 fde=[ 3ff8]\n- 0xffffffffc9563e18 (offset: 0x47b30) -> 0x162dc fde=[ 401c]\n- 0xffffffffc95640e8 (offset: 0x47e00) -> 0x16300 fde=[ 4040]\n- 0xffffffffc9564188 (offset: 0x47ea0) -> 0x16324 fde=[ 4064]\n- 0xffffffffc9564228 (offset: 0x47f40) -> 0x16348 fde=[ 4088]\n- 0xffffffffc95644f8 (offset: 0x48210) -> 0x1636c fde=[ 40ac]\n- 0xffffffffc95647c8 (offset: 0x484e0) -> 0x16390 fde=[ 40d0]\n- 0xffffffffc9564a88 (offset: 0x487a0) -> 0x163b4 fde=[ 40f4]\n- 0xffffffffc9564ab8 (offset: 0x487d0) -> 0x163d0 fde=[ 4110]\n- 0xffffffffc9565248 (offset: 0x48f60) -> 0x164cc fde=[ 420c]\n- 0xffffffffc9565518 (offset: 0x49230) -> 0x164f0 fde=[ 4230]\n- 0xffffffffc95657e8 (offset: 0x49500) -> 0x16514 fde=[ 4254]\n- 0xffffffffc9565888 (offset: 0x495a0) -> 0x16538 fde=[ 4278]\n- 0xffffffffc9565918 (offset: 0x49630) -> 0x1655c fde=[ 429c]\n- 0xffffffffc9565be8 (offset: 0x49900) -> 0x16580 fde=[ 42c0]\n- 0xffffffffc9565eb8 (offset: 0x49bd0) -> 0x165a4 fde=[ 42e4]\n- 0xffffffffc9565f58 (offset: 0x49c70) -> 0x165c8 fde=[ 4308]\n- 0xffffffffc9565fe8 (offset: 0x49d00) -> 0x165ec fde=[ 432c]\n- 0xffffffffc95662b8 (offset: 0x49fd0) -> 0x16610 fde=[ 4350]\n- 0xffffffffc9566588 (offset: 0x4a2a0) -> 0x16634 fde=[ 4374]\n- 0xffffffffc9566628 (offset: 0x4a340) -> 0x16658 fde=[ 4398]\n- 0xffffffffc95666b8 (offset: 0x4a3d0) -> 0x1667c fde=[ 43bc]\n- 0xffffffffc9566988 (offset: 0x4a6a0) -> 0x166a0 fde=[ 43e0]\n- 0xffffffffc9566c58 (offset: 0x4a970) -> 0x166c4 fde=[ 4404]\n- 0xffffffffc9566cf8 (offset: 0x4aa10) -> 0x166e8 fde=[ 4428]\n- 0xffffffffc9566d88 (offset: 0x4aaa0) -> 0x1670c fde=[ 444c]\n- 0xffffffffc9567058 (offset: 0x4ad70) -> 0x16730 fde=[ 4470]\n- 0xffffffffc9567328 (offset: 0x4b040) -> 0x16754 fde=[ 4494]\n- 0xffffffffc95673c8 (offset: 0x4b0e0) -> 0x16778 fde=[ 44b8]\n- 0xffffffffc9567458 (offset: 0x4b170) -> 0x1679c fde=[ 44dc]\n- 0xffffffffc9567728 (offset: 0x4b440) -> 0x167c0 fde=[ 4500]\n- 0xffffffffc95679f8 (offset: 0x4b710) -> 0x167e4 fde=[ 4524]\n- 0xffffffffc9567a98 (offset: 0x4b7b0) -> 0x16808 fde=[ 4548]\n- 0xffffffffc9567b28 (offset: 0x4b840) -> 0x1682c fde=[ 456c]\n- 0xffffffffc9567df8 (offset: 0x4bb10) -> 0x16850 fde=[ 4590]\n- 0xffffffffc95680c8 (offset: 0x4bde0) -> 0x16874 fde=[ 45b4]\n- 0xffffffffc9568168 (offset: 0x4be80) -> 0x16898 fde=[ 45d8]\n- 0xffffffffc9568438 (offset: 0x4c150) -> 0x168bc fde=[ 45fc]\n- 0xffffffffc9568708 (offset: 0x4c420) -> 0x168e0 fde=[ 4620]\n- 0xffffffffc95687a8 (offset: 0x4c4c0) -> 0x16904 fde=[ 4644]\n- 0xffffffffc9568a78 (offset: 0x4c790) -> 0x16928 fde=[ 4668]\n- 0xffffffffc9568d48 (offset: 0x4ca60) -> 0x1694c fde=[ 468c]\n- 0xffffffffc9568de8 (offset: 0x4cb00) -> 0x16970 fde=[ 46b0]\n- 0xffffffffc95690b8 (offset: 0x4cdd0) -> 0x16994 fde=[ 46d4]\n- 0xffffffffc9569388 (offset: 0x4d0a0) -> 0x169b8 fde=[ 46f8]\n- 0xffffffffc9569428 (offset: 0x4d140) -> 0x169dc fde=[ 471c]\n- 0xffffffffc95696f8 (offset: 0x4d410) -> 0x16a00 fde=[ 4740]\n- 0xffffffffc95699c8 (offset: 0x4d6e0) -> 0x16a24 fde=[ 4764]\n- 0xffffffffc9569a68 (offset: 0x4d780) -> 0x16a48 fde=[ 4788]\n- 0xffffffffc9569d38 (offset: 0x4da50) -> 0x16a6c fde=[ 47ac]\n- 0xffffffffc956a008 (offset: 0x4dd20) -> 0x16a90 fde=[ 47d0]\n- 0xffffffffc956a2d8 (offset: 0x4dff0) -> 0x16ab4 fde=[ 47f4]\n- 0xffffffffc956a5a8 (offset: 0x4e2c0) -> 0x16ad8 fde=[ 4818]\n- 0xffffffffc956a878 (offset: 0x4e590) -> 0x16afc fde=[ 483c]\n- 0xffffffffc956ab48 (offset: 0x4e860) -> 0x16b20 fde=[ 4860]\n- 0xffffffffc956ae18 (offset: 0x4eb30) -> 0x16b44 fde=[ 4884]\n- 0xffffffffc956b0e8 (offset: 0x4ee00) -> 0x16b68 fde=[ 48a8]\n- 0xffffffffc956b3b8 (offset: 0x4f0d0) -> 0x16b8c fde=[ 48cc]\n- 0xffffffffc956b688 (offset: 0x4f3a0) -> 0x16bb0 fde=[ 48f0]\n- 0xffffffffc956b958 (offset: 0x4f670) -> 0x16bd4 fde=[ 4914]\n- 0xffffffffc956bc28 (offset: 0x4f940) -> 0x16bf8 fde=[ 4938]\n- 0xffffffffc956bef8 (offset: 0x4fc10) -> 0x16c1c fde=[ 495c]\n- 0xffffffffc956c1c8 (offset: 0x4fee0) -> 0x16c40 fde=[ 4980]\n- 0xffffffffc956c498 (offset: 0x501b0) -> 0x16c64 fde=[ 49a4]\n- 0xffffffffc956c768 (offset: 0x50480) -> 0x16c88 fde=[ 49c8]\n- 0xffffffffc956ca38 (offset: 0x50750) -> 0x16cac fde=[ 49ec]\n- 0xffffffffc956cd08 (offset: 0x50a20) -> 0x16cd0 fde=[ 4a10]\n- 0xffffffffc956cfd8 (offset: 0x50cf0) -> 0x16cf4 fde=[ 4a34]\n- 0xffffffffc956d2a8 (offset: 0x50fc0) -> 0x16d18 fde=[ 4a58]\n- 0xffffffffc956d578 (offset: 0x51290) -> 0x16d3c fde=[ 4a7c]\n- 0xffffffffc956d848 (offset: 0x51560) -> 0x16d60 fde=[ 4aa0]\n- 0xffffffffc956db18 (offset: 0x51830) -> 0x16d84 fde=[ 4ac4]\n- 0xffffffffc956dde8 (offset: 0x51b00) -> 0x16da8 fde=[ 4ae8]\n- 0xffffffffc956de88 (offset: 0x51ba0) -> 0x16dcc fde=[ 4b0c]\n- 0xffffffffc956eb58 (offset: 0x52870) -> 0x16df0 fde=[ 4b30]\n- 0xffffffffc956eb88 (offset: 0x528a0) -> 0x16e08 fde=[ 4b48]\n- 0xffffffffc956fcc8 (offset: 0x539e0) -> 0x16fe4 fde=[ 4d24]\n- 0xffffffffc9570e08 (offset: 0x54b20) -> 0x171c0 fde=[ 4f00]\n- 0xffffffffc9571f48 (offset: 0x55c60) -> 0x1739c fde=[ 50dc]\n- 0xffffffffc9573088 (offset: 0x56da0) -> 0x17578 fde=[ 52b8]\n- 0xffffffffc95741c8 (offset: 0x57ee0) -> 0x17754 fde=[ 5494]\n- 0xffffffffc9575308 (offset: 0x59020) -> 0x17930 fde=[ 5670]\n- 0xffffffffc9576448 (offset: 0x5a160) -> 0x17b0c fde=[ 584c]\n- 0xffffffffc9577588 (offset: 0x5b2a0) -> 0x17ce8 fde=[ 5a28]\n- 0xffffffffc9577678 (offset: 0x5b390) -> 0x17d5c fde=[ 5a9c]\n- 0xffffffffc9577708 (offset: 0x5b420) -> 0x17d74 fde=[ 5ab4]\n- 0xffffffffc9577798 (offset: 0x5b4b0) -> 0x17d8c fde=[ 5acc]\n- 0xffffffffc9577918 (offset: 0x5b630) -> 0x17da8 fde=[ 5ae8]\n- 0xffffffffc957c038 (offset: 0x5fd50) -> 0x17e04 fde=[ 5b44]\n- 0xffffffffc957c2a8 (offset: 0x5ffc0) -> 0x17e8c fde=[ 5bcc]\n- 0xffffffffc957c698 (offset: 0x603b0) -> 0x17ee8 fde=[ 5c28]\n- 0xffffffffc957c748 (offset: 0x60460) -> 0x17f0c fde=[ 5c4c]\n- 0xffffffffc957c888 (offset: 0x605a0) -> 0x17f30 fde=[ 5c70]\n- 0xffffffffc957c9c8 (offset: 0x606e0) -> 0x17f54 fde=[ 5c94]\n- 0xffffffffc957cb08 (offset: 0x60820) -> 0x17f78 fde=[ 5cb8]\n- 0xffffffffc957cc48 (offset: 0x60960) -> 0x17f9c fde=[ 5cdc]\n- 0xffffffffc957cd88 (offset: 0x60aa0) -> 0x17fc0 fde=[ 5d00]\n- 0xffffffffc957cec8 (offset: 0x60be0) -> 0x17fe4 fde=[ 5d24]\n- 0xffffffffc957d008 (offset: 0x60d20) -> 0x18008 fde=[ 5d48]\n- 0xffffffffc957d148 (offset: 0x60e60) -> 0x1802c fde=[ 5d6c]\n- 0xffffffffc957d288 (offset: 0x60fa0) -> 0x18050 fde=[ 5d90]\n- 0xffffffffc957d3c8 (offset: 0x610e0) -> 0x18074 fde=[ 5db4]\n- 0xffffffffc957d508 (offset: 0x61220) -> 0x18098 fde=[ 5dd8]\n- 0xffffffffc957d648 (offset: 0x61360) -> 0x180bc fde=[ 5dfc]\n- 0xffffffffc957d788 (offset: 0x614a0) -> 0x180e0 fde=[ 5e20]\n- 0xffffffffc957d8c8 (offset: 0x615e0) -> 0x18104 fde=[ 5e44]\n- 0xffffffffc957da08 (offset: 0x61720) -> 0x18128 fde=[ 5e68]\n- 0xffffffffc957db48 (offset: 0x61860) -> 0x1814c fde=[ 5e8c]\n- 0xffffffffc957dc88 (offset: 0x619a0) -> 0x18170 fde=[ 5eb0]\n- 0xffffffffc957ddc8 (offset: 0x61ae0) -> 0x18194 fde=[ 5ed4]\n- 0xffffffffc957df08 (offset: 0x61c20) -> 0x181b8 fde=[ 5ef8]\n- 0xffffffffc957e048 (offset: 0x61d60) -> 0x181dc fde=[ 5f1c]\n- 0xffffffffc957e188 (offset: 0x61ea0) -> 0x18200 fde=[ 5f40]\n- 0xffffffffc957e2c8 (offset: 0x61fe0) -> 0x18224 fde=[ 5f64]\n- 0xffffffffc957e408 (offset: 0x62120) -> 0x18248 fde=[ 5f88]\n- 0xffffffffc957e548 (offset: 0x62260) -> 0x1826c fde=[ 5fac]\n- 0xffffffffc957e688 (offset: 0x623a0) -> 0x18290 fde=[ 5fd0]\n- 0xffffffffc957e7c8 (offset: 0x624e0) -> 0x182b4 fde=[ 5ff4]\n- 0xffffffffc957e908 (offset: 0x62620) -> 0x182d8 fde=[ 6018]\n- 0xffffffffc957ea48 (offset: 0x62760) -> 0x182fc fde=[ 603c]\n- 0xffffffffc957eb88 (offset: 0x628a0) -> 0x18320 fde=[ 6060]\n- 0xffffffffc957ecc8 (offset: 0x629e0) -> 0x18344 fde=[ 6084]\n- 0xffffffffc957ee08 (offset: 0x62b20) -> 0x18368 fde=[ 60a8]\n- 0xffffffffc957ef48 (offset: 0x62c60) -> 0x1838c fde=[ 60cc]\n- 0xffffffffc957f088 (offset: 0x62da0) -> 0x183b0 fde=[ 60f0]\n- 0xffffffffc957f1c8 (offset: 0x62ee0) -> 0x183d4 fde=[ 6114]\n- 0xffffffffc957f308 (offset: 0x63020) -> 0x183f8 fde=[ 6138]\n- 0xffffffffc957f448 (offset: 0x63160) -> 0x1841c fde=[ 615c]\n- 0xffffffffc957fb28 (offset: 0x63840) -> 0x18440 fde=[ 6180]\n- 0xffffffffc957fb58 (offset: 0x63870) -> 0x18458 fde=[ 6198]\n- 0xffffffffc957fbf8 (offset: 0x63910) -> 0x18488 fde=[ 61c8]\n- 0xffffffffc957fc78 (offset: 0x63990) -> 0x184ac fde=[ 61ec]\n- 0xffffffffc957fcb8 (offset: 0x639d0) -> 0x1900c fde=[ 6d4c]\n- 0xffffffffc957fd08 (offset: 0x63a20) -> 0x1902c fde=[ 6d6c]\n- 0xffffffffc9580228 (offset: 0x63f40) -> 0x184c8 fde=[ 6208]\n- 0xffffffffc9580278 (offset: 0x63f90) -> 0x190f0 fde=[ 6e30]\n- 0xffffffffc95806b8 (offset: 0x643d0) -> 0x184f4 fde=[ 6234]\n- 0xffffffffc95806e8 (offset: 0x64400) -> 0x1912c fde=[ 6e6c]\n- 0xffffffffc9580a98 (offset: 0x647b0) -> 0x1917c fde=[ 6ebc]\n- 0xffffffffc9580ae8 (offset: 0x64800) -> 0x1919c fde=[ 6edc]\n- 0xffffffffc95810f8 (offset: 0x64e10) -> 0x191f0 fde=[ 6f30]\n- 0xffffffffc95818b8 (offset: 0x655d0) -> 0x19264 fde=[ 6fa4]\n- 0xffffffffc9581988 (offset: 0x656a0) -> 0x18508 fde=[ 6248]\n- 0xffffffffc9581998 (offset: 0x656b0) -> 0x1851c fde=[ 625c]\n- 0xffffffffc9581a88 (offset: 0x657a0) -> 0x18590 fde=[ 62d0]\n- 0xffffffffc9581aa8 (offset: 0x657c0) -> 0x185a4 fde=[ 62e4]\n- 0xffffffffc9581b18 (offset: 0x65830) -> 0x185d0 fde=[ 6310]\n- 0xffffffffc9581b68 (offset: 0x65880) -> 0x185fc fde=[ 633c]\n- 0xffffffffc9581b88 (offset: 0x658a0) -> 0x18614 fde=[ 6354]\n- 0xffffffffc9581bb8 (offset: 0x658d0) -> 0x19284 fde=[ 6fc4]\n- 0xffffffffc9581d08 (offset: 0x65a20) -> 0x18634 fde=[ 6374]\n- 0xffffffffc9581d18 (offset: 0x65a30) -> 0x1864c fde=[ 638c]\n- 0xffffffffc9581e58 (offset: 0x65b70) -> 0x18740 fde=[ 6480]\n- 0xffffffffc9581f18 (offset: 0x65c30) -> 0x1877c fde=[ 64bc]\n- 0xffffffffc9581f28 (offset: 0x65c40) -> 0x19338 fde=[ 7078]\n- 0xffffffffc9582058 (offset: 0x65d70) -> 0x18790 fde=[ 64d0]\n- 0xffffffffc9582068 (offset: 0x65d80) -> 0x187a4 fde=[ 64e4]\n- 0xffffffffc9582108 (offset: 0x65e20) -> 0x193d4 fde=[ 7114]\n- 0xffffffffc9582178 (offset: 0x65e90) -> 0x187e0 fde=[ 6520]\n- 0xffffffffc9582188 (offset: 0x65ea0) -> 0x187f4 fde=[ 6534]\n- 0xffffffffc9582248 (offset: 0x65f60) -> 0x18830 fde=[ 6570]\n- 0xffffffffc95822f8 (offset: 0x66010) -> 0x1886c fde=[ 65ac]\n- 0xffffffffc95823a8 (offset: 0x660c0) -> 0x188a8 fde=[ 65e8]\n- 0xffffffffc9582458 (offset: 0x66170) -> 0x188e4 fde=[ 6624]\n- 0xffffffffc9582588 (offset: 0x662a0) -> 0x18930 fde=[ 6670]\n- 0xffffffffc9582628 (offset: 0x66340) -> 0x18988 fde=[ 66c8]\n- 0xffffffffc9582638 (offset: 0x66350) -> 0x1899c fde=[ 66dc]\n- 0xffffffffc95826b8 (offset: 0x663d0) -> 0x189c4 fde=[ 6704]\n- 0xffffffffc95826c8 (offset: 0x663e0) -> 0x193fc fde=[ 713c]\n- 0xffffffffc9582838 (offset: 0x66550) -> 0x189d8 fde=[ 6718]\n- 0xffffffffc9582848 (offset: 0x66560) -> 0x189ec fde=[ 672c]\n- 0xffffffffc9582868 (offset: 0x66580) -> 0x18a0c fde=[ 674c]\n- 0xffffffffc9582878 (offset: 0x66590) -> 0x1944c fde=[ 718c]\n- 0xffffffffc9582d18 (offset: 0x66a30) -> 0x194a0 fde=[ 71e0]\n- 0xffffffffc9582fd8 (offset: 0x66cf0) -> 0x194f4 fde=[ 7234]\n- 0xffffffffc9583298 (offset: 0x66fb0) -> 0x18a20 fde=[ 6760]\n- 0xffffffffc95832a8 (offset: 0x66fc0) -> 0x1959c fde=[ 72dc]\n- 0xffffffffc95833b8 (offset: 0x670d0) -> 0x195ec fde=[ 732c]\n- 0xffffffffc9583548 (offset: 0x67260) -> 0x18a34 fde=[ 6774]\n- 0xffffffffc9583588 (offset: 0x672a0) -> 0x18a50 fde=[ 6790]\n- 0xffffffffc9583598 (offset: 0x672b0) -> 0x18a64 fde=[ 67a4]\n- 0xffffffffc95835a8 (offset: 0x672c0) -> 0x18a78 fde=[ 67b8]\n- 0xffffffffc9583608 (offset: 0x67320) -> 0x18aa4 fde=[ 67e4]\n- 0xffffffffc9583618 (offset: 0x67330) -> 0x18ab8 fde=[ 67f8]\n- 0xffffffffc95836a8 (offset: 0x673c0) -> 0x18ae8 fde=[ 6828]\n- 0xffffffffc95836b8 (offset: 0x673d0) -> 0x18afc fde=[ 683c]\n- 0xffffffffc95836c8 (offset: 0x673e0) -> 0x18b10 fde=[ 6850]\n- 0xffffffffc95836d8 (offset: 0x673f0) -> 0x18b28 fde=[ 6868]\n- 0xffffffffc9583f78 (offset: 0x67c90) -> 0x1963c fde=[ 737c]\n- 0xffffffffc9584038 (offset: 0x67d50) -> 0x18bb0 fde=[ 68f0]\n- 0xffffffffc9584078 (offset: 0x67d90) -> 0x18bc8 fde=[ 6908]\n- 0xffffffffc95840e8 (offset: 0x67e00) -> 0x18bec fde=[ 692c]\n- 0xffffffffc9584138 (offset: 0x67e50) -> 0x18c08 fde=[ 6948]\n- 0xffffffffc9584178 (offset: 0x67e90) -> 0x18c24 fde=[ 6964]\n- 0xffffffffc9584188 (offset: 0x67ea0) -> 0x18c38 fde=[ 6978]\n- 0xffffffffc9584198 (offset: 0x67eb0) -> 0x18c4c fde=[ 698c]\n- 0xffffffffc95841d8 (offset: 0x67ef0) -> 0x18c60 fde=[ 69a0]\n- 0xffffffffc9584258 (offset: 0x67f70) -> 0x19670 fde=[ 73b0]\n- 0xffffffffc95842c8 (offset: 0x67fe0) -> 0x19690 fde=[ 73d0]\n- 0xffffffffc95843f8 (offset: 0x68110) -> 0x18ca0 fde=[ 69e0]\n- 0xffffffffc9584408 (offset: 0x68120) -> 0x18cb4 fde=[ 69f4]\n- 0xffffffffc9584438 (offset: 0x68150) -> 0x18cdc fde=[ 6a1c]\n- 0xffffffffc9584558 (offset: 0x68270) -> 0x18d28 fde=[ 6a68]\n- 0xffffffffc9584678 (offset: 0x68390) -> 0x18d74 fde=[ 6ab4]\n- 0xffffffffc9584968 (offset: 0x68680) -> 0x18dc0 fde=[ 6b00]\n- 0xffffffffc9584a08 (offset: 0x68720) -> 0x196c0 fde=[ 7400]\n- 0xffffffffc95864e8 (offset: 0x6a200) -> 0x18de0 fde=[ 6b20]\n- 0xffffffffc9586598 (offset: 0x6a2b0) -> 0x18e0c fde=[ 6b4c]\n- 0xffffffffc9586678 (offset: 0x6a390) -> 0x19a24 fde=[ 7764]\n- 0xffffffffc958bf48 (offset: 0x6fc60) -> 0x1a1f0 fde=[ 7f30]\n- 0xffffffffc958f0e8 (offset: 0x72e00) -> 0x1a73c fde=[ 847c]\n- 0xffffffffc95904f8 (offset: 0x74210) -> 0x18e5c fde=[ 6b9c]\n- 0xffffffffc9590658 (offset: 0x74370) -> 0x18e80 fde=[ 6bc0]\n- 0xffffffffc9590818 (offset: 0x74530) -> 0x1aa20 fde=[ 8760]\n- 0xffffffffc95908a8 (offset: 0x745c0) -> 0x18fdc fde=[ 6d1c]\n- 0xffffffffc9590918 (offset: 0x74630) -> 0x18ff4 fde=[ 6d34]\n- 0xffffffffc9590948 (offset: 0x74660) -> 0x1aa94 fde=[ 87d4]\n- 0xffffffffc9592ad8 (offset: 0x767f0) -> 0x1ad74 fde=[ 8ab4]\n- 0xffffffffc9594a08 (offset: 0x78720) -> 0x19244 fde=[ 6f84]\n- 0xffffffffc9594a28 (offset: 0x78740) -> 0x192b8 fde=[ 6ff8]\n- 0xffffffffc9594c28 (offset: 0x78940) -> 0x18674 fde=[ 63b4]\n- 0xffffffffc9594d58 (offset: 0x78a70) -> 0x19308 fde=[ 7048]\n- 0xffffffffc9594e28 (offset: 0x78b40) -> 0x186c0 fde=[ 6400]\n- 0xffffffffc9594e48 (offset: 0x78b60) -> 0x186dc fde=[ 641c]\n- 0xffffffffc9594f98 (offset: 0x78cb0) -> 0x18710 fde=[ 6450]\n- 0xffffffffc9595098 (offset: 0x78db0) -> 0x19384 fde=[ 70c4]\n- 0xffffffffc9595278 (offset: 0x78f90) -> 0x1895c fde=[ 669c]\n- 0xffffffffc95952b8 (offset: 0x78fd0) -> 0x19548 fde=[ 7288]\n- 0xffffffffc9595448 (offset: 0x79160) -> 0x18c8c fde=[ 69cc]\n- 0xffffffffc9595458 (offset: 0x79170) -> 0x18e38 fde=[ 6b78]\n- 0xffffffffc95954c8 (offset: 0x791e0) -> 0x1a9c0 fde=[ 8700]\n- 0xffffffffc95954f8 (offset: 0x79210) -> 0x1a9e0 fde=[ 8720]\n- 0xffffffffc9595528 (offset: 0x79240) -> 0x1aa00 fde=[ 8740]\n- 0xffffffffc9595558 (offset: 0x79270) -> 0x18ef8 fde=[ 6c38]\n- 0xffffffffc95959c8 (offset: 0x796e0) -> 0x18f60 fde=[ 6ca0]\n- 0xffffffffc9595b48 (offset: 0x79860) -> 0x1aa44 fde=[ 8784]\n- 0xffffffffc9595c58 (offset: 0x79970) -> 0x18f74 fde=[ 6cb4]\n- 0xffffffffc9595f38 (offset: 0x79c50) -> 0x1adc8 fde=[ 8b08]\n- 0xffffffffc95963f8 (offset: 0x7a110) -> 0x1ae24 fde=[ 8b64]\n- 0xffffffffc9596508 (offset: 0x7a220) -> 0x1ae48 fde=[ 8b88]\n- 0xffffffffc9596618 (offset: 0x7a330) -> 0x1ae6c fde=[ 8bac]\n- 0xffffffffc95966b8 (offset: 0x7a3d0) -> 0x1ae8c fde=[ 8bcc]\n- 0xffffffffc95966e8 (offset: 0x7a400) -> 0x1aea8 fde=[ 8be8]\n- 0xffffffffc9596d68 (offset: 0x7aa80) -> 0x1af04 fde=[ 8c44]\n- 0xffffffffc9596ef8 (offset: 0x7ac10) -> 0x1af28 fde=[ 8c68]\n- 0xffffffffc9597088 (offset: 0x7ada0) -> 0x1af4c fde=[ 8c8c]\n- 0xffffffffc9597128 (offset: 0x7ae40) -> 0x1af6c fde=[ 8cac]\n- 0xffffffffc9597158 (offset: 0x7ae70) -> 0x1af88 fde=[ 8cc8]\n- 0xffffffffc9597328 (offset: 0x7b040) -> 0x1afdc fde=[ 8d1c]\n- 0xffffffffc95973a8 (offset: 0x7b0c0) -> 0x1affc fde=[ 8d3c]\n- 0xffffffffc9597418 (offset: 0x7b130) -> 0x1b014 fde=[ 8d54]\n- 0xffffffffc9597448 (offset: 0x7b160) -> 0x1b0ac fde=[ 8dec]\n- 0xffffffffc9598b88 (offset: 0x7c8a0) -> 0x1b030 fde=[ 8d70]\n- 0xffffffffc9598c18 (offset: 0x7c930) -> 0x1b048 fde=[ 8d88]\n- 0xffffffffc9598dc8 (offset: 0x7cae0) -> 0x1b098 fde=[ 8dd8]\n- 0xffffffffc9598e38 (offset: 0x7cb50) -> 0x1b2b4 fde=[ 8ff4]\n- 0xffffffffc9598e68 (offset: 0x7cb80) -> 0x1b2d4 fde=[ 9014]\n- 0xffffffffc9598e98 (offset: 0x7cbb0) -> 0x1b2f8 fde=[ 9038]\n- 0xffffffffc95996d8 (offset: 0x7d3f0) -> 0x1b454 fde=[ 9194]\n- 0xffffffffc9599918 (offset: 0x7d630) -> 0x1b59c fde=[ 92dc]\n- 0xffffffffc9599a98 (offset: 0x7d7b0) -> 0x1b5b0 fde=[ 92f0]\n- 0xffffffffc95a3348 (offset: 0x87060) -> 0x1b60c fde=[ 934c]\n- 0xffffffffc95a34b8 (offset: 0x871d0) -> 0x1b630 fde=[ 9370]\n- 0xffffffffc95a3628 (offset: 0x87340) -> 0x1b654 fde=[ 9394]\n- 0xffffffffc95a3798 (offset: 0x874b0) -> 0x1b678 fde=[ 93b8]\n- 0xffffffffc95a3908 (offset: 0x87620) -> 0x1b69c fde=[ 93dc]\n- 0xffffffffc95a3a78 (offset: 0x87790) -> 0x1b6c0 fde=[ 9400]\n- 0xffffffffc95a3be8 (offset: 0x87900) -> 0x1b6e4 fde=[ 9424]\n- 0xffffffffc95a3d58 (offset: 0x87a70) -> 0x1b708 fde=[ 9448]\n- 0xffffffffc95a3ec8 (offset: 0x87be0) -> 0x1b72c fde=[ 946c]\n- 0xffffffffc95a4038 (offset: 0x87d50) -> 0x1b750 fde=[ 9490]\n- 0xffffffffc95a41a8 (offset: 0x87ec0) -> 0x1b774 fde=[ 94b4]\n- 0xffffffffc95a4318 (offset: 0x88030) -> 0x1b798 fde=[ 94d8]\n- 0xffffffffc95a4488 (offset: 0x881a0) -> 0x1b7bc fde=[ 94fc]\n- 0xffffffffc95a45f8 (offset: 0x88310) -> 0x1b7e0 fde=[ 9520]\n- 0xffffffffc95a4768 (offset: 0x88480) -> 0x1b804 fde=[ 9544]\n- 0xffffffffc95a48d8 (offset: 0x885f0) -> 0x1b828 fde=[ 9568]\n- 0xffffffffc95a4a48 (offset: 0x88760) -> 0x1b84c fde=[ 958c]\n- 0xffffffffc95a4bb8 (offset: 0x888d0) -> 0x1b870 fde=[ 95b0]\n- 0xffffffffc95a4d28 (offset: 0x88a40) -> 0x1b894 fde=[ 95d4]\n- 0xffffffffc95a4e98 (offset: 0x88bb0) -> 0x1b8b8 fde=[ 95f8]\n- 0xffffffffc95a5008 (offset: 0x88d20) -> 0x1b8dc fde=[ 961c]\n- 0xffffffffc95a5178 (offset: 0x88e90) -> 0x1b900 fde=[ 9640]\n- 0xffffffffc95a52e8 (offset: 0x89000) -> 0x1b924 fde=[ 9664]\n- 0xffffffffc95a5458 (offset: 0x89170) -> 0x1b948 fde=[ 9688]\n- 0xffffffffc95a55c8 (offset: 0x892e0) -> 0x1b96c fde=[ 96ac]\n- 0xffffffffc95a5738 (offset: 0x89450) -> 0x1b990 fde=[ 96d0]\n- 0xffffffffc95a58a8 (offset: 0x895c0) -> 0x1b9b4 fde=[ 96f4]\n- 0xffffffffc95a5a18 (offset: 0x89730) -> 0x1b9d8 fde=[ 9718]\n- 0xffffffffc95a5b88 (offset: 0x898a0) -> 0x1b9fc fde=[ 973c]\n- 0xffffffffc95a5cf8 (offset: 0x89a10) -> 0x1ba20 fde=[ 9760]\n- 0xffffffffc95a5e68 (offset: 0x89b80) -> 0x1ba44 fde=[ 9784]\n- 0xffffffffc95a5fd8 (offset: 0x89cf0) -> 0x1ba68 fde=[ 97a8]\n- 0xffffffffc95a6148 (offset: 0x89e60) -> 0x1ba8c fde=[ 97cc]\n- 0xffffffffc95a62b8 (offset: 0x89fd0) -> 0x1bab0 fde=[ 97f0]\n- 0xffffffffc95a6428 (offset: 0x8a140) -> 0x1bad4 fde=[ 9814]\n- 0xffffffffc95a6598 (offset: 0x8a2b0) -> 0x1baf8 fde=[ 9838]\n- 0xffffffffc95a6708 (offset: 0x8a420) -> 0x1bb1c fde=[ 985c]\n- 0xffffffffc95a6878 (offset: 0x8a590) -> 0x1bb40 fde=[ 9880]\n- 0xffffffffc95a69e8 (offset: 0x8a700) -> 0x1bb64 fde=[ 98a4]\n- 0xffffffffc95a6b58 (offset: 0x8a870) -> 0x1bb88 fde=[ 98c8]\n- 0xffffffffc95a6cc8 (offset: 0x8a9e0) -> 0x1bbac fde=[ 98ec]\n- 0xffffffffc95a6e38 (offset: 0x8ab50) -> 0x1bbd0 fde=[ 9910]\n- 0xffffffffc95a6fa8 (offset: 0x8acc0) -> 0x1bbf4 fde=[ 9934]\n- 0xffffffffc95a7118 (offset: 0x8ae30) -> 0x1bc18 fde=[ 9958]\n- 0xffffffffc95a7288 (offset: 0x8afa0) -> 0x1bc3c fde=[ 997c]\n- 0xffffffffc95a73f8 (offset: 0x8b110) -> 0x1bc60 fde=[ 99a0]\n- 0xffffffffc95a7568 (offset: 0x8b280) -> 0x1bc84 fde=[ 99c4]\n- 0xffffffffc95a76d8 (offset: 0x8b3f0) -> 0x1bca8 fde=[ 99e8]\n- 0xffffffffc95a7848 (offset: 0x8b560) -> 0x1bccc fde=[ 9a0c]\n- 0xffffffffc95a79b8 (offset: 0x8b6d0) -> 0x1bcf0 fde=[ 9a30]\n- 0xffffffffc95a7b28 (offset: 0x8b840) -> 0x1bd14 fde=[ 9a54]\n- 0xffffffffc95a7c98 (offset: 0x8b9b0) -> 0x1bd38 fde=[ 9a78]\n- 0xffffffffc95a7e08 (offset: 0x8bb20) -> 0x1bd5c fde=[ 9a9c]\n- 0xffffffffc95a7f78 (offset: 0x8bc90) -> 0x1bd80 fde=[ 9ac0]\n- 0xffffffffc95a80e8 (offset: 0x8be00) -> 0x1bda4 fde=[ 9ae4]\n- 0xffffffffc95a8258 (offset: 0x8bf70) -> 0x1bdc8 fde=[ 9b08]\n- 0xffffffffc95a83c8 (offset: 0x8c0e0) -> 0x1bdec fde=[ 9b2c]\n- 0xffffffffc95a8538 (offset: 0x8c250) -> 0x1be10 fde=[ 9b50]\n- 0xffffffffc95a86a8 (offset: 0x8c3c0) -> 0x1be34 fde=[ 9b74]\n- 0xffffffffc95a8818 (offset: 0x8c530) -> 0x1be58 fde=[ 9b98]\n- 0xffffffffc95a8988 (offset: 0x8c6a0) -> 0x1be7c fde=[ 9bbc]\n- 0xffffffffc95a8af8 (offset: 0x8c810) -> 0x1bea0 fde=[ 9be0]\n- 0xffffffffc95a8c68 (offset: 0x8c980) -> 0x1bec4 fde=[ 9c04]\n- 0xffffffffc95a8dd8 (offset: 0x8caf0) -> 0x1bee8 fde=[ 9c28]\n- 0xffffffffc95a8f48 (offset: 0x8cc60) -> 0x1bf0c fde=[ 9c4c]\n- 0xffffffffc95b27f8 (offset: 0x96510) -> 0x1bf68 fde=[ 9ca8]\n- 0xffffffffc95bc0a8 (offset: 0x9fdc0) -> 0x1bfc4 fde=[ 9d04]\n- 0xffffffffc95bc218 (offset: 0x9ff30) -> 0x1bfe8 fde=[ 9d28]\n- 0xffffffffc95bc388 (offset: 0xa00a0) -> 0x1c00c fde=[ 9d4c]\n- 0xffffffffc95bc4f8 (offset: 0xa0210) -> 0x1c030 fde=[ 9d70]\n- 0xffffffffc95bc668 (offset: 0xa0380) -> 0x1c054 fde=[ 9d94]\n- 0xffffffffc95bc7d8 (offset: 0xa04f0) -> 0x1c078 fde=[ 9db8]\n- 0xffffffffc95bc948 (offset: 0xa0660) -> 0x1c09c fde=[ 9ddc]\n- 0xffffffffc95bcab8 (offset: 0xa07d0) -> 0x1c0c0 fde=[ 9e00]\n- 0xffffffffc95bcc28 (offset: 0xa0940) -> 0x1c0e4 fde=[ 9e24]\n- 0xffffffffc95bcd98 (offset: 0xa0ab0) -> 0x1c108 fde=[ 9e48]\n- 0xffffffffc95bcf08 (offset: 0xa0c20) -> 0x1c12c fde=[ 9e6c]\n- 0xffffffffc95bd078 (offset: 0xa0d90) -> 0x1c150 fde=[ 9e90]\n- 0xffffffffc95bd1e8 (offset: 0xa0f00) -> 0x1c174 fde=[ 9eb4]\n- 0xffffffffc95bd358 (offset: 0xa1070) -> 0x1c198 fde=[ 9ed8]\n- 0xffffffffc95bd4c8 (offset: 0xa11e0) -> 0x1c1bc fde=[ 9efc]\n- 0xffffffffc95bd638 (offset: 0xa1350) -> 0x1c1e0 fde=[ 9f20]\n- 0xffffffffc95bd7a8 (offset: 0xa14c0) -> 0x1c204 fde=[ 9f44]\n- 0xffffffffc95bd918 (offset: 0xa1630) -> 0x1c228 fde=[ 9f68]\n- 0xffffffffc95bda88 (offset: 0xa17a0) -> 0x1c24c fde=[ 9f8c]\n- 0xffffffffc95bdbf8 (offset: 0xa1910) -> 0x1c270 fde=[ 9fb0]\n- 0xffffffffc95bdd68 (offset: 0xa1a80) -> 0x1c294 fde=[ 9fd4]\n- 0xffffffffc95bded8 (offset: 0xa1bf0) -> 0x1c2b8 fde=[ 9ff8]\n- 0xffffffffc95be048 (offset: 0xa1d60) -> 0x1c2dc fde=[ a01c]\n- 0xffffffffc95be1b8 (offset: 0xa1ed0) -> 0x1c300 fde=[ a040]\n- 0xffffffffc95be328 (offset: 0xa2040) -> 0x1c324 fde=[ a064]\n- 0xffffffffc95be498 (offset: 0xa21b0) -> 0x1c348 fde=[ a088]\n- 0xffffffffc95be608 (offset: 0xa2320) -> 0x1c36c fde=[ a0ac]\n- 0xffffffffc95be778 (offset: 0xa2490) -> 0x1c390 fde=[ a0d0]\n- 0xffffffffc95be8e8 (offset: 0xa2600) -> 0x1c3b4 fde=[ a0f4]\n- 0xffffffffc95bea58 (offset: 0xa2770) -> 0x1c3d8 fde=[ a118]\n- 0xffffffffc95bebc8 (offset: 0xa28e0) -> 0x1c3fc fde=[ a13c]\n- 0xffffffffc95bed38 (offset: 0xa2a50) -> 0x1c420 fde=[ a160]\n- 0xffffffffc95beea8 (offset: 0xa2bc0) -> 0x1c444 fde=[ a184]\n- 0xffffffffc95bf018 (offset: 0xa2d30) -> 0x1c468 fde=[ a1a8]\n- 0xffffffffc95bf188 (offset: 0xa2ea0) -> 0x1c48c fde=[ a1cc]\n- 0xffffffffc95bf2f8 (offset: 0xa3010) -> 0x1c4b0 fde=[ a1f0]\n- 0xffffffffc95bf468 (offset: 0xa3180) -> 0x1c4d4 fde=[ a214]\n- 0xffffffffc95bf5d8 (offset: 0xa32f0) -> 0x1c4f8 fde=[ a238]\n- 0xffffffffc95bf748 (offset: 0xa3460) -> 0x1c51c fde=[ a25c]\n- 0xffffffffc95bf8b8 (offset: 0xa35d0) -> 0x1c540 fde=[ a280]\n- 0xffffffffc95bfa28 (offset: 0xa3740) -> 0x1c564 fde=[ a2a4]\n- 0xffffffffc95bfb98 (offset: 0xa38b0) -> 0x1c588 fde=[ a2c8]\n- 0xffffffffc95bfd08 (offset: 0xa3a20) -> 0x1c5ac fde=[ a2ec]\n- 0xffffffffc95bfe78 (offset: 0xa3b90) -> 0x1c5d0 fde=[ a310]\n- 0xffffffffc95bffe8 (offset: 0xa3d00) -> 0x1c5f4 fde=[ a334]\n- 0xffffffffc95c0158 (offset: 0xa3e70) -> 0x1c618 fde=[ a358]\n- 0xffffffffc95c02c8 (offset: 0xa3fe0) -> 0x1c63c fde=[ a37c]\n- 0xffffffffc95c0438 (offset: 0xa4150) -> 0x1c660 fde=[ a3a0]\n- 0xffffffffc95c05a8 (offset: 0xa42c0) -> 0x1c684 fde=[ a3c4]\n- 0xffffffffc95c0718 (offset: 0xa4430) -> 0x1c6a8 fde=[ a3e8]\n- 0xffffffffc95c0888 (offset: 0xa45a0) -> 0x1c6cc fde=[ a40c]\n- 0xffffffffc95c09f8 (offset: 0xa4710) -> 0x1c6f0 fde=[ a430]\n- 0xffffffffc95c0b68 (offset: 0xa4880) -> 0x1c714 fde=[ a454]\n- 0xffffffffc95c0cd8 (offset: 0xa49f0) -> 0x1c738 fde=[ a478]\n- 0xffffffffc95c0e48 (offset: 0xa4b60) -> 0x1c75c fde=[ a49c]\n- 0xffffffffc95c0fb8 (offset: 0xa4cd0) -> 0x1c780 fde=[ a4c0]\n- 0xffffffffc95c1128 (offset: 0xa4e40) -> 0x1c7a4 fde=[ a4e4]\n- 0xffffffffc95c1298 (offset: 0xa4fb0) -> 0x1c7c8 fde=[ a508]\n- 0xffffffffc95c1408 (offset: 0xa5120) -> 0x1c7ec fde=[ a52c]\n- 0xffffffffc95c1578 (offset: 0xa5290) -> 0x1c810 fde=[ a550]\n- 0xffffffffc95c16e8 (offset: 0xa5400) -> 0x1c834 fde=[ a574]\n- 0xffffffffc95c1858 (offset: 0xa5570) -> 0x1c858 fde=[ a598]\n- 0xffffffffc95c19c8 (offset: 0xa56e0) -> 0x1c87c fde=[ a5bc]\n- 0xffffffffc95c1b38 (offset: 0xa5850) -> 0x1c8a0 fde=[ a5e0]\n- 0xffffffffc95c1ca8 (offset: 0xa59c0) -> 0x1c8c4 fde=[ a604]\n- 0xffffffffc95c1e18 (offset: 0xa5b30) -> 0x1c8e8 fde=[ a628]\n- 0xffffffffc95c1f88 (offset: 0xa5ca0) -> 0x1c90c fde=[ a64c]\n- 0xffffffffc95c20f8 (offset: 0xa5e10) -> 0x1c930 fde=[ a670]\n- 0xffffffffc95c2268 (offset: 0xa5f80) -> 0x1c954 fde=[ a694]\n- 0xffffffffc95c23d8 (offset: 0xa60f0) -> 0x1c978 fde=[ a6b8]\n- 0xffffffffc95c2548 (offset: 0xa6260) -> 0x1c99c fde=[ a6dc]\n- 0xffffffffc95c26b8 (offset: 0xa63d0) -> 0x1c9c0 fde=[ a700]\n- 0xffffffffc95c2828 (offset: 0xa6540) -> 0x1c9e4 fde=[ a724]\n- 0xffffffffc95c2998 (offset: 0xa66b0) -> 0x1ca08 fde=[ a748]\n- 0xffffffffc95c2b08 (offset: 0xa6820) -> 0x1ca2c fde=[ a76c]\n- 0xffffffffc95c2c78 (offset: 0xa6990) -> 0x1ca50 fde=[ a790]\n- 0xffffffffc95c2de8 (offset: 0xa6b00) -> 0x1ca74 fde=[ a7b4]\n- 0xffffffffc95c2f58 (offset: 0xa6c70) -> 0x1ca98 fde=[ a7d8]\n- 0xffffffffc95c30c8 (offset: 0xa6de0) -> 0x1cabc fde=[ a7fc]\n- 0xffffffffc95c3238 (offset: 0xa6f50) -> 0x1cae0 fde=[ a820]\n- 0xffffffffc95c33a8 (offset: 0xa70c0) -> 0x1cb04 fde=[ a844]\n- 0xffffffffc95c3518 (offset: 0xa7230) -> 0x1cb28 fde=[ a868]\n- 0xffffffffc95c3688 (offset: 0xa73a0) -> 0x1cb4c fde=[ a88c]\n- 0xffffffffc95c37f8 (offset: 0xa7510) -> 0x1cb70 fde=[ a8b0]\n- 0xffffffffc95c3968 (offset: 0xa7680) -> 0x1cb94 fde=[ a8d4]\n- 0xffffffffc95c3ad8 (offset: 0xa77f0) -> 0x1cbb8 fde=[ a8f8]\n- 0xffffffffc95c3c48 (offset: 0xa7960) -> 0x1cbdc fde=[ a91c]\n- 0xffffffffc95c3db8 (offset: 0xa7ad0) -> 0x1cc00 fde=[ a940]\n- 0xffffffffc95c3f28 (offset: 0xa7c40) -> 0x1cc24 fde=[ a964]\n- 0xffffffffc95c4098 (offset: 0xa7db0) -> 0x1cc48 fde=[ a988]\n- 0xffffffffc95c4208 (offset: 0xa7f20) -> 0x1cc6c fde=[ a9ac]\n- 0xffffffffc95c4378 (offset: 0xa8090) -> 0x1cc90 fde=[ a9d0]\n- 0xffffffffc95c44e8 (offset: 0xa8200) -> 0x1ccb4 fde=[ a9f4]\n- 0xffffffffc95c4658 (offset: 0xa8370) -> 0x1ccd8 fde=[ aa18]\n- 0xffffffffc95c47c8 (offset: 0xa84e0) -> 0x1ccfc fde=[ aa3c]\n- 0xffffffffc95c4938 (offset: 0xa8650) -> 0x1cd20 fde=[ aa60]\n- 0xffffffffc95c4aa8 (offset: 0xa87c0) -> 0x1cd44 fde=[ aa84]\n- 0xffffffffc95c4c18 (offset: 0xa8930) -> 0x1cd68 fde=[ aaa8]\n- 0xffffffffc95c4d88 (offset: 0xa8aa0) -> 0x1cd8c fde=[ aacc]\n- 0xffffffffc95c4ef8 (offset: 0xa8c10) -> 0x1cdb0 fde=[ aaf0]\n- 0xffffffffc95c5068 (offset: 0xa8d80) -> 0x1cdd4 fde=[ ab14]\n- 0xffffffffc95c51d8 (offset: 0xa8ef0) -> 0x1cdf8 fde=[ ab38]\n- 0xffffffffc95c5348 (offset: 0xa9060) -> 0x1ce1c fde=[ ab5c]\n- 0xffffffffc95c54b8 (offset: 0xa91d0) -> 0x1ce40 fde=[ ab80]\n- 0xffffffffc95c5628 (offset: 0xa9340) -> 0x1ce64 fde=[ aba4]\n- 0xffffffffc95c5798 (offset: 0xa94b0) -> 0x1ce88 fde=[ abc8]\n- 0xffffffffc95c5908 (offset: 0xa9620) -> 0x1ceac fde=[ abec]\n- 0xffffffffc95c5a78 (offset: 0xa9790) -> 0x1ced0 fde=[ ac10]\n- 0xffffffffc95c5be8 (offset: 0xa9900) -> 0x1cef4 fde=[ ac34]\n- 0xffffffffc95c5d58 (offset: 0xa9a70) -> 0x1cf18 fde=[ ac58]\n- 0xffffffffc95c5ec8 (offset: 0xa9be0) -> 0x1cf3c fde=[ ac7c]\n- 0xffffffffc95c6038 (offset: 0xa9d50) -> 0x1cf60 fde=[ aca0]\n- 0xffffffffc95c61a8 (offset: 0xa9ec0) -> 0x1cf84 fde=[ acc4]\n- 0xffffffffc95c6318 (offset: 0xaa030) -> 0x1cfa8 fde=[ ace8]\n- 0xffffffffc95c6488 (offset: 0xaa1a0) -> 0x1cfcc fde=[ ad0c]\n- 0xffffffffc95c65f8 (offset: 0xaa310) -> 0x1cff0 fde=[ ad30]\n- 0xffffffffc95c6768 (offset: 0xaa480) -> 0x1d014 fde=[ ad54]\n- 0xffffffffc95c68d8 (offset: 0xaa5f0) -> 0x1d038 fde=[ ad78]\n- 0xffffffffc95c6a48 (offset: 0xaa760) -> 0x1d05c fde=[ ad9c]\n- 0xffffffffc95c6bb8 (offset: 0xaa8d0) -> 0x1d080 fde=[ adc0]\n- 0xffffffffc95c6d28 (offset: 0xaaa40) -> 0x1d0a4 fde=[ ade4]\n- 0xffffffffc95c6e98 (offset: 0xaabb0) -> 0x1d0c8 fde=[ ae08]\n- 0xffffffffc95c7008 (offset: 0xaad20) -> 0x1d0ec fde=[ ae2c]\n- 0xffffffffc95c7178 (offset: 0xaae90) -> 0x1d110 fde=[ ae50]\n- 0xffffffffc95c72e8 (offset: 0xab000) -> 0x1d134 fde=[ ae74]\n- 0xffffffffc95c7458 (offset: 0xab170) -> 0x1d158 fde=[ ae98]\n- 0xffffffffc95c75c8 (offset: 0xab2e0) -> 0x1d17c fde=[ aebc]\n- 0xffffffffc95c7738 (offset: 0xab450) -> 0x1d1a0 fde=[ aee0]\n- 0xffffffffc95c78a8 (offset: 0xab5c0) -> 0x1d1c4 fde=[ af04]\n- 0xffffffffc95d1158 (offset: 0xb4e70) -> 0x1d220 fde=[ af60]\n- 0xffffffffc95d12c8 (offset: 0xb4fe0) -> 0x1d244 fde=[ af84]\n- 0xffffffffc95d1438 (offset: 0xb5150) -> 0x1d268 fde=[ afa8]\n- 0xffffffffc95d15a8 (offset: 0xb52c0) -> 0x1d28c fde=[ afcc]\n- 0xffffffffc95d1718 (offset: 0xb5430) -> 0x1d2b0 fde=[ aff0]\n- 0xffffffffc95d1888 (offset: 0xb55a0) -> 0x1d2d4 fde=[ b014]\n- 0xffffffffc95d19f8 (offset: 0xb5710) -> 0x1d2f8 fde=[ b038]\n- 0xffffffffc95d1b68 (offset: 0xb5880) -> 0x1d31c fde=[ b05c]\n- 0xffffffffc95d1cd8 (offset: 0xb59f0) -> 0x1d340 fde=[ b080]\n- 0xffffffffc95d1e48 (offset: 0xb5b60) -> 0x1d364 fde=[ b0a4]\n- 0xffffffffc95d1fb8 (offset: 0xb5cd0) -> 0x1d388 fde=[ b0c8]\n- 0xffffffffc95d2128 (offset: 0xb5e40) -> 0x1d3ac fde=[ b0ec]\n- 0xffffffffc95d2298 (offset: 0xb5fb0) -> 0x1d3d0 fde=[ b110]\n- 0xffffffffc95d2408 (offset: 0xb6120) -> 0x1d3f4 fde=[ b134]\n- 0xffffffffc95d2578 (offset: 0xb6290) -> 0x1d418 fde=[ b158]\n- 0xffffffffc95d26e8 (offset: 0xb6400) -> 0x1d43c fde=[ b17c]\n- 0xffffffffc95d2858 (offset: 0xb6570) -> 0x1d460 fde=[ b1a0]\n- 0xffffffffc95d29c8 (offset: 0xb66e0) -> 0x1d484 fde=[ b1c4]\n- 0xffffffffc95d2b38 (offset: 0xb6850) -> 0x1d4a8 fde=[ b1e8]\n- 0xffffffffc95d2ca8 (offset: 0xb69c0) -> 0x1d4cc fde=[ b20c]\n- 0xffffffffc95d2e18 (offset: 0xb6b30) -> 0x1d4f0 fde=[ b230]\n- 0xffffffffc95d2f88 (offset: 0xb6ca0) -> 0x1d514 fde=[ b254]\n- 0xffffffffc95d30f8 (offset: 0xb6e10) -> 0x1d538 fde=[ b278]\n- 0xffffffffc95d3268 (offset: 0xb6f80) -> 0x1d55c fde=[ b29c]\n- 0xffffffffc95d33d8 (offset: 0xb70f0) -> 0x1d580 fde=[ b2c0]\n- 0xffffffffc95d3548 (offset: 0xb7260) -> 0x1d5a4 fde=[ b2e4]\n- 0xffffffffc95d36b8 (offset: 0xb73d0) -> 0x1d5c8 fde=[ b308]\n- 0xffffffffc95d3828 (offset: 0xb7540) -> 0x1d5ec fde=[ b32c]\n- 0xffffffffc95d3998 (offset: 0xb76b0) -> 0x1d610 fde=[ b350]\n- 0xffffffffc95d3b08 (offset: 0xb7820) -> 0x1d634 fde=[ b374]\n- 0xffffffffc95d3c78 (offset: 0xb7990) -> 0x1d658 fde=[ b398]\n- 0xffffffffc95d3de8 (offset: 0xb7b00) -> 0x1d67c fde=[ b3bc]\n- 0xffffffffc95d3f58 (offset: 0xb7c70) -> 0x1d6a0 fde=[ b3e0]\n- 0xffffffffc95d40c8 (offset: 0xb7de0) -> 0x1d6c4 fde=[ b404]\n- 0xffffffffc95d4238 (offset: 0xb7f50) -> 0x1d6e8 fde=[ b428]\n- 0xffffffffc95d43a8 (offset: 0xb80c0) -> 0x1d70c fde=[ b44c]\n- 0xffffffffc95d4518 (offset: 0xb8230) -> 0x1d730 fde=[ b470]\n- 0xffffffffc95d4688 (offset: 0xb83a0) -> 0x1d754 fde=[ b494]\n- 0xffffffffc95d47f8 (offset: 0xb8510) -> 0x1d778 fde=[ b4b8]\n- 0xffffffffc95d4968 (offset: 0xb8680) -> 0x1d79c fde=[ b4dc]\n- 0xffffffffc95d4ad8 (offset: 0xb87f0) -> 0x1d7c0 fde=[ b500]\n- 0xffffffffc95d4c48 (offset: 0xb8960) -> 0x1d7e4 fde=[ b524]\n- 0xffffffffc95d4db8 (offset: 0xb8ad0) -> 0x1d808 fde=[ b548]\n- 0xffffffffc95d4f28 (offset: 0xb8c40) -> 0x1d82c fde=[ b56c]\n- 0xffffffffc95d5098 (offset: 0xb8db0) -> 0x1d850 fde=[ b590]\n- 0xffffffffc95d5208 (offset: 0xb8f20) -> 0x1d874 fde=[ b5b4]\n- 0xffffffffc95d5378 (offset: 0xb9090) -> 0x1d898 fde=[ b5d8]\n- 0xffffffffc95d54e8 (offset: 0xb9200) -> 0x1d8bc fde=[ b5fc]\n- 0xffffffffc95d5658 (offset: 0xb9370) -> 0x1d8e0 fde=[ b620]\n- 0xffffffffc95d57c8 (offset: 0xb94e0) -> 0x1d904 fde=[ b644]\n- 0xffffffffc95d5938 (offset: 0xb9650) -> 0x1d928 fde=[ b668]\n- 0xffffffffc95d5aa8 (offset: 0xb97c0) -> 0x1d94c fde=[ b68c]\n- 0xffffffffc95d5c18 (offset: 0xb9930) -> 0x1d970 fde=[ b6b0]\n- 0xffffffffc95d5d88 (offset: 0xb9aa0) -> 0x1d994 fde=[ b6d4]\n- 0xffffffffc95d5ef8 (offset: 0xb9c10) -> 0x1d9b8 fde=[ b6f8]\n- 0xffffffffc95d6068 (offset: 0xb9d80) -> 0x1d9dc fde=[ b71c]\n- 0xffffffffc95d61d8 (offset: 0xb9ef0) -> 0x1da00 fde=[ b740]\n- 0xffffffffc95d6348 (offset: 0xba060) -> 0x1da24 fde=[ b764]\n- 0xffffffffc95d64b8 (offset: 0xba1d0) -> 0x1da48 fde=[ b788]\n- 0xffffffffc95d6628 (offset: 0xba340) -> 0x1da6c fde=[ b7ac]\n- 0xffffffffc95d6798 (offset: 0xba4b0) -> 0x1da90 fde=[ b7d0]\n- 0xffffffffc95d6908 (offset: 0xba620) -> 0x1dab4 fde=[ b7f4]\n- 0xffffffffc95d6a78 (offset: 0xba790) -> 0x1dad8 fde=[ b818]\n- 0xffffffffc95d6be8 (offset: 0xba900) -> 0x1dafc fde=[ b83c]\n- 0xffffffffc95d6d58 (offset: 0xbaa70) -> 0x1db20 fde=[ b860]\n- 0xffffffffc95d9b68 (offset: 0xbd880) -> 0x1e738 fde=[ c478]\n- 0xffffffffc95d9ba8 (offset: 0xbd8c0) -> 0x1e750 fde=[ c490]\n- 0xffffffffc95d9bd8 (offset: 0xbd8f0) -> 0x203c8 fde=[ e108]\n- 0xffffffffc95da2f8 (offset: 0xbe010) -> 0x1e768 fde=[ c4a8]\n- 0xffffffffc95f0658 (offset: 0xd4370) -> 0x1e7c4 fde=[ c504]\n- 0xffffffffc95f0758 (offset: 0xd4470) -> 0x1e850 fde=[ c590]\n- 0xffffffffc95f08c8 (offset: 0xd45e0) -> 0x1e874 fde=[ c5b4]\n- 0xffffffffc95f0a38 (offset: 0xd4750) -> 0x1e898 fde=[ c5d8]\n- 0xffffffffc95f0ba8 (offset: 0xd48c0) -> 0x1e8bc fde=[ c5fc]\n- 0xffffffffc95f0d18 (offset: 0xd4a30) -> 0x1e8e0 fde=[ c620]\n- 0xffffffffc95f0e88 (offset: 0xd4ba0) -> 0x1e904 fde=[ c644]\n- 0xffffffffc95f0ff8 (offset: 0xd4d10) -> 0x1e928 fde=[ c668]\n- 0xffffffffc95f1168 (offset: 0xd4e80) -> 0x1e94c fde=[ c68c]\n- 0xffffffffc95f12d8 (offset: 0xd4ff0) -> 0x1e970 fde=[ c6b0]\n- 0xffffffffc95f1448 (offset: 0xd5160) -> 0x1e994 fde=[ c6d4]\n- 0xffffffffc95f15b8 (offset: 0xd52d0) -> 0x1e9b8 fde=[ c6f8]\n- 0xffffffffc95f1728 (offset: 0xd5440) -> 0x1e9dc fde=[ c71c]\n- 0xffffffffc95f1898 (offset: 0xd55b0) -> 0x1ea00 fde=[ c740]\n- 0xffffffffc95f1a08 (offset: 0xd5720) -> 0x1ea24 fde=[ c764]\n- 0xffffffffc95f1b78 (offset: 0xd5890) -> 0x1ea48 fde=[ c788]\n- 0xffffffffc95f1ce8 (offset: 0xd5a00) -> 0x1ea6c fde=[ c7ac]\n- 0xffffffffc95f1e58 (offset: 0xd5b70) -> 0x1ea90 fde=[ c7d0]\n- 0xffffffffc95f1fc8 (offset: 0xd5ce0) -> 0x1eab4 fde=[ c7f4]\n- 0xffffffffc95f2138 (offset: 0xd5e50) -> 0x1ead8 fde=[ c818]\n- 0xffffffffc95f22a8 (offset: 0xd5fc0) -> 0x1eafc fde=[ c83c]\n- 0xffffffffc95f2418 (offset: 0xd6130) -> 0x1eb20 fde=[ c860]\n- 0xffffffffc95f2588 (offset: 0xd62a0) -> 0x1eb44 fde=[ c884]\n- 0xffffffffc95f26f8 (offset: 0xd6410) -> 0x1eb68 fde=[ c8a8]\n- 0xffffffffc95f2868 (offset: 0xd6580) -> 0x1eb8c fde=[ c8cc]\n- 0xffffffffc95f29d8 (offset: 0xd66f0) -> 0x1ebb0 fde=[ c8f0]\n- 0xffffffffc95f2b48 (offset: 0xd6860) -> 0x1ebd4 fde=[ c914]\n- 0xffffffffc95f2cb8 (offset: 0xd69d0) -> 0x1ebf8 fde=[ c938]\n- 0xffffffffc95f2e28 (offset: 0xd6b40) -> 0x1ec1c fde=[ c95c]\n- 0xffffffffc95f2f98 (offset: 0xd6cb0) -> 0x1ec40 fde=[ c980]\n- 0xffffffffc95f3108 (offset: 0xd6e20) -> 0x1ec64 fde=[ c9a4]\n- 0xffffffffc95f3278 (offset: 0xd6f90) -> 0x1ec88 fde=[ c9c8]\n- 0xffffffffc95f33e8 (offset: 0xd7100) -> 0x1ecac fde=[ c9ec]\n- 0xffffffffc95f3558 (offset: 0xd7270) -> 0x1ecd0 fde=[ ca10]\n- 0xffffffffc95f36c8 (offset: 0xd73e0) -> 0x1ecf4 fde=[ ca34]\n- 0xffffffffc95f3838 (offset: 0xd7550) -> 0x1ed18 fde=[ ca58]\n- 0xffffffffc95f39a8 (offset: 0xd76c0) -> 0x1ed3c fde=[ ca7c]\n- 0xffffffffc95f3b18 (offset: 0xd7830) -> 0x1ed60 fde=[ caa0]\n- 0xffffffffc95f3c88 (offset: 0xd79a0) -> 0x1ed84 fde=[ cac4]\n- 0xffffffffc95f3df8 (offset: 0xd7b10) -> 0x1eda8 fde=[ cae8]\n- 0xffffffffc95f3f68 (offset: 0xd7c80) -> 0x1edcc fde=[ cb0c]\n- 0xffffffffc95f40d8 (offset: 0xd7df0) -> 0x1edf0 fde=[ cb30]\n- 0xffffffffc95f4248 (offset: 0xd7f60) -> 0x1ee14 fde=[ cb54]\n- 0xffffffffc95f43b8 (offset: 0xd80d0) -> 0x1ee38 fde=[ cb78]\n- 0xffffffffc95f4528 (offset: 0xd8240) -> 0x1ee5c fde=[ cb9c]\n- 0xffffffffc95f4698 (offset: 0xd83b0) -> 0x1ee80 fde=[ cbc0]\n- 0xffffffffc95f4808 (offset: 0xd8520) -> 0x1eea4 fde=[ cbe4]\n- 0xffffffffc95f4978 (offset: 0xd8690) -> 0x1eec8 fde=[ cc08]\n- 0xffffffffc95f4ae8 (offset: 0xd8800) -> 0x1eeec fde=[ cc2c]\n- 0xffffffffc95f4c58 (offset: 0xd8970) -> 0x1ef10 fde=[ cc50]\n- 0xffffffffc95f4dc8 (offset: 0xd8ae0) -> 0x1ef34 fde=[ cc74]\n- 0xffffffffc95f4f38 (offset: 0xd8c50) -> 0x1ef58 fde=[ cc98]\n- 0xffffffffc95f50a8 (offset: 0xd8dc0) -> 0x1ef7c fde=[ ccbc]\n- 0xffffffffc95f5218 (offset: 0xd8f30) -> 0x1efa0 fde=[ cce0]\n- 0xffffffffc95f5388 (offset: 0xd90a0) -> 0x1efc4 fde=[ cd04]\n- 0xffffffffc95f54f8 (offset: 0xd9210) -> 0x1efe8 fde=[ cd28]\n- 0xffffffffc95f5668 (offset: 0xd9380) -> 0x1f00c fde=[ cd4c]\n- 0xffffffffc95f57d8 (offset: 0xd94f0) -> 0x1f030 fde=[ cd70]\n- 0xffffffffc95f5948 (offset: 0xd9660) -> 0x1f054 fde=[ cd94]\n- 0xffffffffc95f5ab8 (offset: 0xd97d0) -> 0x1f078 fde=[ cdb8]\n- 0xffffffffc95f5c28 (offset: 0xd9940) -> 0x1f09c fde=[ cddc]\n- 0xffffffffc95f5d98 (offset: 0xd9ab0) -> 0x1f0c0 fde=[ ce00]\n- 0xffffffffc95f5f08 (offset: 0xd9c20) -> 0x1f0e4 fde=[ ce24]\n- 0xffffffffc95f6078 (offset: 0xd9d90) -> 0x1f108 fde=[ ce48]\n- 0xffffffffc95f61e8 (offset: 0xd9f00) -> 0x1f12c fde=[ ce6c]\n- 0xffffffffc95f6358 (offset: 0xda070) -> 0x1f150 fde=[ ce90]\n- 0xffffffffc95f64c8 (offset: 0xda1e0) -> 0x1f174 fde=[ ceb4]\n- 0xffffffffc95f6638 (offset: 0xda350) -> 0x1f198 fde=[ ced8]\n- 0xffffffffc95f67a8 (offset: 0xda4c0) -> 0x1f1bc fde=[ cefc]\n- 0xffffffffc95f6918 (offset: 0xda630) -> 0x1f1e0 fde=[ cf20]\n- 0xffffffffc95f6a88 (offset: 0xda7a0) -> 0x1f204 fde=[ cf44]\n- 0xffffffffc95f6bf8 (offset: 0xda910) -> 0x1f228 fde=[ cf68]\n- 0xffffffffc95f6d68 (offset: 0xdaa80) -> 0x1f24c fde=[ cf8c]\n- 0xffffffffc95f6ed8 (offset: 0xdabf0) -> 0x1f270 fde=[ cfb0]\n- 0xffffffffc95f7048 (offset: 0xdad60) -> 0x1f294 fde=[ cfd4]\n- 0xffffffffc95f71b8 (offset: 0xdaed0) -> 0x1f2b8 fde=[ cff8]\n- 0xffffffffc95f7328 (offset: 0xdb040) -> 0x1f2dc fde=[ d01c]\n- 0xffffffffc95f7498 (offset: 0xdb1b0) -> 0x1f300 fde=[ d040]\n- 0xffffffffc95f7608 (offset: 0xdb320) -> 0x1f324 fde=[ d064]\n- 0xffffffffc95f7778 (offset: 0xdb490) -> 0x1f348 fde=[ d088]\n- 0xffffffffc95f78e8 (offset: 0xdb600) -> 0x1f36c fde=[ d0ac]\n- 0xffffffffc95f7a58 (offset: 0xdb770) -> 0x1f390 fde=[ d0d0]\n- 0xffffffffc95f7bc8 (offset: 0xdb8e0) -> 0x1f3b4 fde=[ d0f4]\n- 0xffffffffc95f7d38 (offset: 0xdba50) -> 0x1f3d8 fde=[ d118]\n- 0xffffffffc95f7ea8 (offset: 0xdbbc0) -> 0x1f3fc fde=[ d13c]\n- 0xffffffffc95f8018 (offset: 0xdbd30) -> 0x1f420 fde=[ d160]\n- 0xffffffffc95f8188 (offset: 0xdbea0) -> 0x1f444 fde=[ d184]\n- 0xffffffffc95f82f8 (offset: 0xdc010) -> 0x1f468 fde=[ d1a8]\n- 0xffffffffc95f8468 (offset: 0xdc180) -> 0x1f48c fde=[ d1cc]\n- 0xffffffffc95f85d8 (offset: 0xdc2f0) -> 0x1f4b0 fde=[ d1f0]\n- 0xffffffffc95f8748 (offset: 0xdc460) -> 0x1f4d4 fde=[ d214]\n- 0xffffffffc95f88b8 (offset: 0xdc5d0) -> 0x1f4f8 fde=[ d238]\n- 0xffffffffc95f8a28 (offset: 0xdc740) -> 0x1f51c fde=[ d25c]\n- 0xffffffffc95f8b98 (offset: 0xdc8b0) -> 0x1f540 fde=[ d280]\n- 0xffffffffc95f8d08 (offset: 0xdca20) -> 0x1f564 fde=[ d2a4]\n- 0xffffffffc95f8e78 (offset: 0xdcb90) -> 0x1f588 fde=[ d2c8]\n- 0xffffffffc95f8fe8 (offset: 0xdcd00) -> 0x1f5ac fde=[ d2ec]\n- 0xffffffffc95f9158 (offset: 0xdce70) -> 0x1f5d0 fde=[ d310]\n- 0xffffffffc95f92c8 (offset: 0xdcfe0) -> 0x1f5f4 fde=[ d334]\n- 0xffffffffc95f9438 (offset: 0xdd150) -> 0x1f618 fde=[ d358]\n- 0xffffffffc95f95a8 (offset: 0xdd2c0) -> 0x1f63c fde=[ d37c]\n- 0xffffffffc95f9718 (offset: 0xdd430) -> 0x1f660 fde=[ d3a0]\n- 0xffffffffc95f9888 (offset: 0xdd5a0) -> 0x1f684 fde=[ d3c4]\n- 0xffffffffc95f99f8 (offset: 0xdd710) -> 0x1f6a8 fde=[ d3e8]\n- 0xffffffffc95f9b68 (offset: 0xdd880) -> 0x1f6cc fde=[ d40c]\n- 0xffffffffc95f9cd8 (offset: 0xdd9f0) -> 0x1f6f0 fde=[ d430]\n- 0xffffffffc95f9e48 (offset: 0xddb60) -> 0x1f714 fde=[ d454]\n- 0xffffffffc95f9fb8 (offset: 0xddcd0) -> 0x1f738 fde=[ d478]\n- 0xffffffffc95fa128 (offset: 0xdde40) -> 0x1f75c fde=[ d49c]\n- 0xffffffffc95fa298 (offset: 0xddfb0) -> 0x1f780 fde=[ d4c0]\n- 0xffffffffc95fa408 (offset: 0xde120) -> 0x1f7a4 fde=[ d4e4]\n- 0xffffffffc95fa578 (offset: 0xde290) -> 0x1f7c8 fde=[ d508]\n- 0xffffffffc95fa6e8 (offset: 0xde400) -> 0x1f7ec fde=[ d52c]\n- 0xffffffffc95fa858 (offset: 0xde570) -> 0x1f810 fde=[ d550]\n- 0xffffffffc95fa9c8 (offset: 0xde6e0) -> 0x1f834 fde=[ d574]\n- 0xffffffffc95fab38 (offset: 0xde850) -> 0x1f858 fde=[ d598]\n- 0xffffffffc95faca8 (offset: 0xde9c0) -> 0x1f87c fde=[ d5bc]\n- 0xffffffffc95fae18 (offset: 0xdeb30) -> 0x1f8a0 fde=[ d5e0]\n- 0xffffffffc95faf88 (offset: 0xdeca0) -> 0x1f8c4 fde=[ d604]\n- 0xffffffffc95fb0f8 (offset: 0xdee10) -> 0x1f8e8 fde=[ d628]\n- 0xffffffffc95fb268 (offset: 0xdef80) -> 0x1f90c fde=[ d64c]\n- 0xffffffffc95fb3d8 (offset: 0xdf0f0) -> 0x1f930 fde=[ d670]\n- 0xffffffffc95fb548 (offset: 0xdf260) -> 0x1f954 fde=[ d694]\n- 0xffffffffc95fb6b8 (offset: 0xdf3d0) -> 0x1f978 fde=[ d6b8]\n- 0xffffffffc95fb828 (offset: 0xdf540) -> 0x1f99c fde=[ d6dc]\n- 0xffffffffc95fb998 (offset: 0xdf6b0) -> 0x1f9c0 fde=[ d700]\n- 0xffffffffc95fbb08 (offset: 0xdf820) -> 0x1f9e4 fde=[ d724]\n- 0xffffffffc95fbc78 (offset: 0xdf990) -> 0x1fa08 fde=[ d748]\n- 0xffffffffc95fbde8 (offset: 0xdfb00) -> 0x1fa2c fde=[ d76c]\n- 0xffffffffc95fbf58 (offset: 0xdfc70) -> 0x1fa50 fde=[ d790]\n- 0xffffffffc95fc0c8 (offset: 0xdfde0) -> 0x1fa74 fde=[ d7b4]\n- 0xffffffffc95fc238 (offset: 0xdff50) -> 0x1fa98 fde=[ d7d8]\n- 0xffffffffc95fc3a8 (offset: 0xe00c0) -> 0x1fabc fde=[ d7fc]\n- 0xffffffffc95fc518 (offset: 0xe0230) -> 0x1fae0 fde=[ d820]\n- 0xffffffffc95fc688 (offset: 0xe03a0) -> 0x1fb04 fde=[ d844]\n- 0xffffffffc95fc7f8 (offset: 0xe0510) -> 0x1fb28 fde=[ d868]\n- 0xffffffffc95fc968 (offset: 0xe0680) -> 0x1fb4c fde=[ d88c]\n- 0xffffffffc95fcad8 (offset: 0xe07f0) -> 0x1fb70 fde=[ d8b0]\n- 0xffffffffc95fcc48 (offset: 0xe0960) -> 0x1fb94 fde=[ d8d4]\n- 0xffffffffc95fcdb8 (offset: 0xe0ad0) -> 0x1fbb8 fde=[ d8f8]\n- 0xffffffffc95fcf28 (offset: 0xe0c40) -> 0x1fbdc fde=[ d91c]\n- 0xffffffffc95fd098 (offset: 0xe0db0) -> 0x1fc00 fde=[ d940]\n- 0xffffffffc95fd208 (offset: 0xe0f20) -> 0x1fc24 fde=[ d964]\n- 0xffffffffc95fd378 (offset: 0xe1090) -> 0x1fc48 fde=[ d988]\n- 0xffffffffc95fd4e8 (offset: 0xe1200) -> 0x1fc6c fde=[ d9ac]\n- 0xffffffffc95fd658 (offset: 0xe1370) -> 0x1fc90 fde=[ d9d0]\n- 0xffffffffc95fd7c8 (offset: 0xe14e0) -> 0x1fcb4 fde=[ d9f4]\n- 0xffffffffc95fd938 (offset: 0xe1650) -> 0x1fcd8 fde=[ da18]\n- 0xffffffffc95fdaa8 (offset: 0xe17c0) -> 0x1fcfc fde=[ da3c]\n- 0xffffffffc95fdc18 (offset: 0xe1930) -> 0x1fd20 fde=[ da60]\n- 0xffffffffc95fdd88 (offset: 0xe1aa0) -> 0x1fd44 fde=[ da84]\n- 0xffffffffc95fdef8 (offset: 0xe1c10) -> 0x1fd68 fde=[ daa8]\n- 0xffffffffc95fe068 (offset: 0xe1d80) -> 0x1fd8c fde=[ dacc]\n- 0xffffffffc95fe1d8 (offset: 0xe1ef0) -> 0x1fdb0 fde=[ daf0]\n- 0xffffffffc95ffd68 (offset: 0xe3a80) -> 0x203b0 fde=[ e0f0]\n- 0xffffffffc95ffd98 (offset: 0xe3ab0) -> 0x20500 fde=[ e240]\n- 0xffffffffc96001c8 (offset: 0xe3ee0) -> 0x2055c fde=[ e29c]\n- 0xffffffffc96004e8 (offset: 0xe4200) -> 0x205b8 fde=[ e2f8]\n- 0xffffffffc9600918 (offset: 0xe4630) -> 0x20614 fde=[ e354]\n- 0xffffffffc9600c68 (offset: 0xe4980) -> 0x20670 fde=[ e3b0]\n- 0xffffffffc9601098 (offset: 0xe4db0) -> 0x206cc fde=[ e40c]\n- 0xffffffffc9601168 (offset: 0xe4e80) -> 0x206f0 fde=[ e430]\n- 0xffffffffc9601238 (offset: 0xe4f50) -> 0x20714 fde=[ e454]\n- 0xffffffffc96012d8 (offset: 0xe4ff0) -> 0x20738 fde=[ e478]\n- 0xffffffffc9601378 (offset: 0xe5090) -> 0x2075c fde=[ e49c]\n- 0xffffffffc9601448 (offset: 0xe5160) -> 0x20780 fde=[ e4c0]\n- 0xffffffffc9601518 (offset: 0xe5230) -> 0x207a4 fde=[ e4e4]\n- 0xffffffffc96015b8 (offset: 0xe52d0) -> 0x207c8 fde=[ e508]\n- 0xffffffffc9601658 (offset: 0xe5370) -> 0x207ec fde=[ e52c]\n- 0xffffffffc9601728 (offset: 0xe5440) -> 0x20810 fde=[ e550]\n- 0xffffffffc96017f8 (offset: 0xe5510) -> 0x20834 fde=[ e574]\n- 0xffffffffc9601a08 (offset: 0xe5720) -> 0x20858 fde=[ e598]\n- 0xffffffffc9601a38 (offset: 0xe5750) -> 0x20870 fde=[ e5b0]\n- 0xffffffffc9601ec8 (offset: 0xe5be0) -> 0x208cc fde=[ e60c]\n- 0xffffffffc9601f88 (offset: 0xe5ca0) -> 0x208f0 fde=[ e630]\n- 0xffffffffc9601ff8 (offset: 0xe5d10) -> 0x20908 fde=[ e648]\n- 0xffffffffc9602028 (offset: 0xe5d40) -> 0x20920 fde=[ e660]\n- 0xffffffffc9602658 (offset: 0xe6370) -> 0x20994 fde=[ e6d4]\n- 0xffffffffc9602688 (offset: 0xe63a0) -> 0x209a8 fde=[ e6e8]\n- 0xffffffffc96028d8 (offset: 0xe65f0) -> 0x20a04 fde=[ e744]\n- 0xffffffffc9602998 (offset: 0xe66b0) -> 0x20a28 fde=[ e768]\n- 0xffffffffc9602a08 (offset: 0xe6720) -> 0x20a40 fde=[ e780]\n- 0xffffffffc9602a38 (offset: 0xe6750) -> 0x20a58 fde=[ e798]\n- 0xffffffffc9602d48 (offset: 0xe6a60) -> 0x20ab4 fde=[ e7f4]\n- 0xffffffffc9602e78 (offset: 0xe6b90) -> 0x20ad8 fde=[ e818]\n- 0xffffffffc9602ee8 (offset: 0xe6c00) -> 0x20af0 fde=[ e830]\n- 0xffffffffc9602f18 (offset: 0xe6c30) -> 0x20b08 fde=[ e848]\n- 0xffffffffc9603108 (offset: 0xe6e20) -> 0x20b64 fde=[ e8a4]\n- 0xffffffffc96031f8 (offset: 0xe6f10) -> 0x20b88 fde=[ e8c8]\n- 0xffffffffc96036a8 (offset: 0xe73c0) -> 0x20be4 fde=[ e924]\n- 0xffffffffc96037a8 (offset: 0xe74c0) -> 0x20c08 fde=[ e948]\n- 0xffffffffc96038a8 (offset: 0xe75c0) -> 0x20c2c fde=[ e96c]\n- 0xffffffffc96039a8 (offset: 0xe76c0) -> 0x20c50 fde=[ e990]\n- 0xffffffffc9603a98 (offset: 0xe77b0) -> 0x20c70 fde=[ e9b0]\n- 0xffffffffc9603ac8 (offset: 0xe77e0) -> 0x20c88 fde=[ e9c8]\n- 0xffffffffc9603ad8 (offset: 0xe77f0) -> 0x20d04 fde=[ ea44]\n- 0xffffffffc9603ae8 (offset: 0xe7800) -> 0x20d80 fde=[ eac0]\n- 0xffffffffc9603c38 (offset: 0xe7950) -> 0x20da4 fde=[ eae4]\n- 0xffffffffc9603d88 (offset: 0xe7aa0) -> 0x20dc8 fde=[ eb08]\n- 0xffffffffc9603ed8 (offset: 0xe7bf0) -> 0x20dec fde=[ eb2c]\n- 0xffffffffc9604028 (offset: 0xe7d40) -> 0x20e10 fde=[ eb50]\n- 0xffffffffc9604198 (offset: 0xe7eb0) -> 0x20e34 fde=[ eb74]\n- 0xffffffffc9604308 (offset: 0xe8020) -> 0x20e58 fde=[ eb98]\n- 0xffffffffc9604478 (offset: 0xe8190) -> 0x20e7c fde=[ ebbc]\n- 0xffffffffc96045e8 (offset: 0xe8300) -> 0x20ea0 fde=[ ebe0]\n- 0xffffffffc9604758 (offset: 0xe8470) -> 0x20ec4 fde=[ ec04]\n- 0xffffffffc96048c8 (offset: 0xe85e0) -> 0x20ee8 fde=[ ec28]\n- 0xffffffffc9604a38 (offset: 0xe8750) -> 0x20f0c fde=[ ec4c]\n- 0xffffffffc9604ba8 (offset: 0xe88c0) -> 0x20f30 fde=[ ec70]\n- 0xffffffffc9604cf8 (offset: 0xe8a10) -> 0x20f54 fde=[ ec94]\n- 0xffffffffc9604e48 (offset: 0xe8b60) -> 0x20f78 fde=[ ecb8]\n- 0xffffffffc9604f98 (offset: 0xe8cb0) -> 0x20f9c fde=[ ecdc]\n- 0xffffffffc96050e8 (offset: 0xe8e00) -> 0x20fc0 fde=[ ed00]\n- 0xffffffffc9605238 (offset: 0xe8f50) -> 0x20fe4 fde=[ ed24]\n- 0xffffffffc9605388 (offset: 0xe90a0) -> 0x21008 fde=[ ed48]\n- 0xffffffffc96054d8 (offset: 0xe91f0) -> 0x2102c fde=[ ed6c]\n- 0xffffffffc9605628 (offset: 0xe9340) -> 0x21050 fde=[ ed90]\n- 0xffffffffc9605798 (offset: 0xe94b0) -> 0x21074 fde=[ edb4]\n- 0xffffffffc9605908 (offset: 0xe9620) -> 0x21098 fde=[ edd8]\n- 0xffffffffc9605a78 (offset: 0xe9790) -> 0x210bc fde=[ edfc]\n- 0xffffffffc9605be8 (offset: 0xe9900) -> 0x210e0 fde=[ ee20]\n- 0xffffffffc9605d58 (offset: 0xe9a70) -> 0x21104 fde=[ ee44]\n- 0xffffffffc9605ec8 (offset: 0xe9be0) -> 0x21128 fde=[ ee68]\n- 0xffffffffc9606038 (offset: 0xe9d50) -> 0x2114c fde=[ ee8c]\n- 0xffffffffc96061a8 (offset: 0xe9ec0) -> 0x21170 fde=[ eeb0]\n- 0xffffffffc96062f8 (offset: 0xea010) -> 0x21194 fde=[ eed4]\n- 0xffffffffc9606448 (offset: 0xea160) -> 0x211b8 fde=[ eef8]\n- 0xffffffffc9606598 (offset: 0xea2b0) -> 0x211dc fde=[ ef1c]\n- 0xffffffffc96066e8 (offset: 0xea400) -> 0x21200 fde=[ ef40]\n- 0xffffffffc9606ce8 (offset: 0xeaa00) -> 0x21224 fde=[ ef64]\n- 0xffffffffc9606d18 (offset: 0xeaa30) -> 0x20c9c fde=[ e9dc]\n- 0xffffffffc9609358 (offset: 0xed070) -> 0x20d18 fde=[ ea58]\n- 0xffffffffc960b998 (offset: 0xef6b0) -> 0x21240 fde=[ ef80]\n- 0xffffffffc960bb98 (offset: 0xef8b0) -> 0x21294 fde=[ efd4]\n- 0xffffffffc960bc38 (offset: 0xef950) -> 0x212b8 fde=[ eff8]\n- 0xffffffffc960bca8 (offset: 0xef9c0) -> 0x212d0 fde=[ f010]\n- 0xffffffffc960bcd8 (offset: 0xef9f0) -> 0x212e8 fde=[ f028]\n- 0xffffffffc960e338 (offset: 0xf2050) -> 0x21344 fde=[ f084]\n- 0xffffffffc960e598 (offset: 0xf22b0) -> 0x213a0 fde=[ f0e0]\n- 0xffffffffc960e638 (offset: 0xf2350) -> 0x213c4 fde=[ f104]\n- 0xffffffffc960e6c8 (offset: 0xf23e0) -> 0x213e8 fde=[ f128]\n- 0xffffffffc960e758 (offset: 0xf2470) -> 0x2140c fde=[ f14c]\n- 0xffffffffc960e7e8 (offset: 0xf2500) -> 0x21430 fde=[ f170]\n- 0xffffffffc960e878 (offset: 0xf2590) -> 0x21454 fde=[ f194]\n- 0xffffffffc960e908 (offset: 0xf2620) -> 0x21478 fde=[ f1b8]\n- 0xffffffffc960e998 (offset: 0xf26b0) -> 0x2149c fde=[ f1dc]\n- 0xffffffffc960ea28 (offset: 0xf2740) -> 0x214c0 fde=[ f200]\n- 0xffffffffc960eab8 (offset: 0xf27d0) -> 0x214e4 fde=[ f224]\n- 0xffffffffc960eb48 (offset: 0xf2860) -> 0x21508 fde=[ f248]\n- 0xffffffffc960ebd8 (offset: 0xf28f0) -> 0x2152c fde=[ f26c]\n- 0xffffffffc960ec68 (offset: 0xf2980) -> 0x21550 fde=[ f290]\n- 0xffffffffc960ecf8 (offset: 0xf2a10) -> 0x21574 fde=[ f2b4]\n- 0xffffffffc960ed88 (offset: 0xf2aa0) -> 0x21598 fde=[ f2d8]\n- 0xffffffffc960ee18 (offset: 0xf2b30) -> 0x215bc fde=[ f2fc]\n- 0xffffffffc960eea8 (offset: 0xf2bc0) -> 0x215e0 fde=[ f320]\n- 0xffffffffc960ef38 (offset: 0xf2c50) -> 0x21604 fde=[ f344]\n- 0xffffffffc960efc8 (offset: 0xf2ce0) -> 0x21628 fde=[ f368]\n- 0xffffffffc960f058 (offset: 0xf2d70) -> 0x2164c fde=[ f38c]\n- 0xffffffffc960f0e8 (offset: 0xf2e00) -> 0x21670 fde=[ f3b0]\n- 0xffffffffc960f178 (offset: 0xf2e90) -> 0x21694 fde=[ f3d4]\n- 0xffffffffc960f578 (offset: 0xf3290) -> 0x216b8 fde=[ f3f8]\n- 0xffffffffc960f5a8 (offset: 0xf32c0) -> 0x216d0 fde=[ f410]\n- 0xffffffffc960fe08 (offset: 0xf3b20) -> 0x2172c fde=[ f46c]\n- 0xffffffffc960ff08 (offset: 0xf3c20) -> 0x21750 fde=[ f490]\n- 0xffffffffc9610008 (offset: 0xf3d20) -> 0x21774 fde=[ f4b4]\n- 0xffffffffc9610108 (offset: 0xf3e20) -> 0x21798 fde=[ f4d8]\n- 0xffffffffc9610208 (offset: 0xf3f20) -> 0x217bc fde=[ f4fc]\n- 0xffffffffc96102f8 (offset: 0xf4010) -> 0x217dc fde=[ f51c]\n- 0xffffffffc9610328 (offset: 0xf4040) -> 0x217f8 fde=[ f538]\n- 0xffffffffc9610af8 (offset: 0xf4810) -> 0x21998 fde=[ f6d8]\n- 0xffffffffc9610bc8 (offset: 0xf48e0) -> 0x219b8 fde=[ f6f8]\n- 0xffffffffc9610bf8 (offset: 0xf4910) -> 0x2192c fde=[ f66c]\n- 0xffffffffc9610dd8 (offset: 0xf4af0) -> 0x21950 fde=[ f690]\n- 0xffffffffc9610fb8 (offset: 0xf4cd0) -> 0x21974 fde=[ f6b4]\n- 0xffffffffc9611178 (offset: 0xf4e90) -> 0x219d0 fde=[ f710]\n- 0xffffffffc9611198 (offset: 0xf4eb0) -> 0x219e4 fde=[ f724]\n- 0xffffffffc9611338 (offset: 0xf5050) -> 0x21a28 fde=[ f768]\n- 0xffffffffc96113f8 (offset: 0xf5110) -> 0x21a68 fde=[ f7a8]\n- 0xffffffffc9611478 (offset: 0xf5190) -> 0x21a88 fde=[ f7c8]\n- 0xffffffffc9611648 (offset: 0xf5360) -> 0x21adc fde=[ f81c]\n- 0xffffffffc96116b8 (offset: 0xf53d0) -> 0x21af4 fde=[ f834]\n- 0xffffffffc96116e8 (offset: 0xf5400) -> 0x21b10 fde=[ f850]\n- 0xffffffffc96118c8 (offset: 0xf55e0) -> 0x21b6c fde=[ f8ac]\n- 0xffffffffc9611968 (offset: 0xf5680) -> 0x21b90 fde=[ f8d0]\n- 0xffffffffc96119d8 (offset: 0xf56f0) -> 0x21ba8 fde=[ f8e8]\n- 0xffffffffc9611a08 (offset: 0xf5720) -> 0x21bc0 fde=[ f900]\n- 0xffffffffc9611c88 (offset: 0xf59a0) -> 0x21c1c fde=[ f95c]\n- 0xffffffffc9611f08 (offset: 0xf5c20) -> 0x21c78 fde=[ f9b8]\n- 0xffffffffc9612188 (offset: 0xf5ea0) -> 0x21cd4 fde=[ fa14]\n- 0xffffffffc9612408 (offset: 0xf6120) -> 0x21d30 fde=[ fa70]\n- 0xffffffffc9612688 (offset: 0xf63a0) -> 0x21d8c fde=[ facc]\n- 0xffffffffc9612908 (offset: 0xf6620) -> 0x21de8 fde=[ fb28]\n- 0xffffffffc9612b88 (offset: 0xf68a0) -> 0x21e44 fde=[ fb84]\n- 0xffffffffc9612e08 (offset: 0xf6b20) -> 0x21ea0 fde=[ fbe0]\n- 0xffffffffc9613088 (offset: 0xf6da0) -> 0x21efc fde=[ fc3c]\n- 0xffffffffc9613308 (offset: 0xf7020) -> 0x21f58 fde=[ fc98]\n- 0xffffffffc9613588 (offset: 0xf72a0) -> 0x21fb4 fde=[ fcf4]\n- 0xffffffffc9613808 (offset: 0xf7520) -> 0x22010 fde=[ fd50]\n- 0xffffffffc9613a88 (offset: 0xf77a0) -> 0x2206c fde=[ fdac]\n- 0xffffffffc9613d08 (offset: 0xf7a20) -> 0x220c8 fde=[ fe08]\n- 0xffffffffc9613f88 (offset: 0xf7ca0) -> 0x22124 fde=[ fe64]\n- 0xffffffffc9614208 (offset: 0xf7f20) -> 0x22180 fde=[ fec0]\n- 0xffffffffc9614488 (offset: 0xf81a0) -> 0x221dc fde=[ ff1c]\n- 0xffffffffc9614708 (offset: 0xf8420) -> 0x22238 fde=[ ff78]\n- 0xffffffffc9614988 (offset: 0xf86a0) -> 0x22294 fde=[ ffd4]\n- 0xffffffffc9614f58 (offset: 0xf8c70) -> 0x222f0 fde=[ 10030]\n- 0xffffffffc9615528 (offset: 0xf9240) -> 0x2234c fde=[ 1008c]\n- 0xffffffffc9615af8 (offset: 0xf9810) -> 0x223a8 fde=[ 100e8]\n- 0xffffffffc96160c8 (offset: 0xf9de0) -> 0x22404 fde=[ 10144]\n- 0xffffffffc9616698 (offset: 0xfa3b0) -> 0x22460 fde=[ 101a0]\n- 0xffffffffc9616968 (offset: 0xfa680) -> 0x224bc fde=[ 101fc]\n- 0xffffffffc9616c28 (offset: 0xfa940) -> 0x22518 fde=[ 10258]\n- 0xffffffffc9616ca8 (offset: 0xfa9c0) -> 0x22538 fde=[ 10278]\n- 0xffffffffc9616d28 (offset: 0xfaa40) -> 0x22558 fde=[ 10298]\n- 0xffffffffc9616da8 (offset: 0xfaac0) -> 0x22578 fde=[ 102b8]\n- 0xffffffffc9616e28 (offset: 0xfab40) -> 0x22598 fde=[ 102d8]\n- 0xffffffffc9616ea8 (offset: 0xfabc0) -> 0x225b8 fde=[ 102f8]\n- 0xffffffffc9616f28 (offset: 0xfac40) -> 0x225d8 fde=[ 10318]\n- 0xffffffffc9616fa8 (offset: 0xfacc0) -> 0x225f8 fde=[ 10338]\n- 0xffffffffc9617028 (offset: 0xfad40) -> 0x22618 fde=[ 10358]\n- 0xffffffffc96170a8 (offset: 0xfadc0) -> 0x22638 fde=[ 10378]\n- 0xffffffffc9617128 (offset: 0xfae40) -> 0x22658 fde=[ 10398]\n- 0xffffffffc96171a8 (offset: 0xfaec0) -> 0x22678 fde=[ 103b8]\n- 0xffffffffc9617228 (offset: 0xfaf40) -> 0x22698 fde=[ 103d8]\n- 0xffffffffc96172a8 (offset: 0xfafc0) -> 0x226b8 fde=[ 103f8]\n- 0xffffffffc9617328 (offset: 0xfb040) -> 0x226d8 fde=[ 10418]\n- 0xffffffffc96173a8 (offset: 0xfb0c0) -> 0x226f8 fde=[ 10438]\n- 0xffffffffc9617428 (offset: 0xfb140) -> 0x22718 fde=[ 10458]\n- 0xffffffffc96174a8 (offset: 0xfb1c0) -> 0x22738 fde=[ 10478]\n- 0xffffffffc9617528 (offset: 0xfb240) -> 0x22758 fde=[ 10498]\n- 0xffffffffc96175a8 (offset: 0xfb2c0) -> 0x22778 fde=[ 104b8]\n- 0xffffffffc9617628 (offset: 0xfb340) -> 0x22798 fde=[ 104d8]\n- 0xffffffffc96176a8 (offset: 0xfb3c0) -> 0x227b8 fde=[ 104f8]\n- 0xffffffffc9617728 (offset: 0xfb440) -> 0x227d8 fde=[ 10518]\n- 0xffffffffc96177a8 (offset: 0xfb4c0) -> 0x227f8 fde=[ 10538]\n- 0xffffffffc9617828 (offset: 0xfb540) -> 0x22818 fde=[ 10558]\n- 0xffffffffc96178a8 (offset: 0xfb5c0) -> 0x22838 fde=[ 10578]\n- 0xffffffffc9617928 (offset: 0xfb640) -> 0x22858 fde=[ 10598]\n- 0xffffffffc96179a8 (offset: 0xfb6c0) -> 0x22878 fde=[ 105b8]\n- 0xffffffffc9617a28 (offset: 0xfb740) -> 0x22898 fde=[ 105d8]\n- 0xffffffffc9617aa8 (offset: 0xfb7c0) -> 0x228b8 fde=[ 105f8]\n- 0xffffffffc9617b28 (offset: 0xfb840) -> 0x228d8 fde=[ 10618]\n- 0xffffffffc9617ba8 (offset: 0xfb8c0) -> 0x228f8 fde=[ 10638]\n- 0xffffffffc9617c28 (offset: 0xfb940) -> 0x22918 fde=[ 10658]\n- 0xffffffffc9617ca8 (offset: 0xfb9c0) -> 0x22938 fde=[ 10678]\n- 0xffffffffc9617d28 (offset: 0xfba40) -> 0x22958 fde=[ 10698]\n- 0xffffffffc9617da8 (offset: 0xfbac0) -> 0x22978 fde=[ 106b8]\n- 0xffffffffc9617e28 (offset: 0xfbb40) -> 0x22998 fde=[ 106d8]\n- 0xffffffffc9617ea8 (offset: 0xfbbc0) -> 0x229b8 fde=[ 106f8]\n- 0xffffffffc9617f28 (offset: 0xfbc40) -> 0x229d8 fde=[ 10718]\n- 0xffffffffc9617ff8 (offset: 0xfbd10) -> 0x229fc fde=[ 1073c]\n- 0xffffffffc96180c8 (offset: 0xfbde0) -> 0x22a20 fde=[ 10760]\n- 0xffffffffc9618198 (offset: 0xfbeb0) -> 0x22a44 fde=[ 10784]\n- 0xffffffffc9618268 (offset: 0xfbf80) -> 0x22a68 fde=[ 107a8]\n- 0xffffffffc9618338 (offset: 0xfc050) -> 0x22a8c fde=[ 107cc]\n- 0xffffffffc9618408 (offset: 0xfc120) -> 0x22ab0 fde=[ 107f0]\n- 0xffffffffc96184d8 (offset: 0xfc1f0) -> 0x22ad4 fde=[ 10814]\n- 0xffffffffc96185a8 (offset: 0xfc2c0) -> 0x22af8 fde=[ 10838]\n- 0xffffffffc9618678 (offset: 0xfc390) -> 0x22b1c fde=[ 1085c]\n- 0xffffffffc9618748 (offset: 0xfc460) -> 0x22b40 fde=[ 10880]\n- 0xffffffffc96187d8 (offset: 0xfc4f0) -> 0x22b64 fde=[ 108a4]\n- 0xffffffffc9618868 (offset: 0xfc580) -> 0x22b88 fde=[ 108c8]\n- 0xffffffffc96188f8 (offset: 0xfc610) -> 0x22bac fde=[ 108ec]\n- 0xffffffffc9618988 (offset: 0xfc6a0) -> 0x22bd0 fde=[ 10910]\n- 0xffffffffc9619318 (offset: 0xfd030) -> 0x22bf4 fde=[ 10934]\n- 0xffffffffc9619348 (offset: 0xfd060) -> 0x22c10 fde=[ 10950]\n- 0xffffffffc96199d8 (offset: 0xfd6f0) -> 0x22c6c fde=[ 109ac]\n- 0xffffffffc9619b18 (offset: 0xfd830) -> 0x22c90 fde=[ 109d0]\n- 0xffffffffc9619c98 (offset: 0xfd9b0) -> 0x22cb4 fde=[ 109f4]\n- 0xffffffffc9619d38 (offset: 0xfda50) -> 0x22cd4 fde=[ 10a14]\n- 0xffffffffc9619d68 (offset: 0xfda80) -> 0x22cf0 fde=[ 10a30]\n- 0xffffffffc961a238 (offset: 0xfdf50) -> 0x22d4c fde=[ 10a8c]\n- 0xffffffffc961a338 (offset: 0xfe050) -> 0x22d70 fde=[ 10ab0]\n- 0xffffffffc961a438 (offset: 0xfe150) -> 0x22d94 fde=[ 10ad4]\n- 0xffffffffc961a968 (offset: 0xfe680) -> 0x22df0 fde=[ 10b30]\n- 0xffffffffc961aa78 (offset: 0xfe790) -> 0x22e14 fde=[ 10b54]\n- 0xffffffffc961ab88 (offset: 0xfe8a0) -> 0x22e38 fde=[ 10b78]\n- 0xffffffffc961ac78 (offset: 0xfe990) -> 0x22e58 fde=[ 10b98]\n- 0xffffffffc961aca8 (offset: 0xfe9c0) -> 0x22eac fde=[ 10bec]\n- 0xffffffffc961af78 (offset: 0xfec90) -> 0x22ed0 fde=[ 10c10]\n- 0xffffffffc961b248 (offset: 0xfef60) -> 0x22ef4 fde=[ 10c34]\n- 0xffffffffc961b2e8 (offset: 0xff000) -> 0x22f18 fde=[ 10c58]\n- 0xffffffffc961b378 (offset: 0xff090) -> 0x22f3c fde=[ 10c7c]\n- 0xffffffffc961b468 (offset: 0xff180) -> 0x22f5c fde=[ 10c9c]\n- 0xffffffffc961b498 (offset: 0xff1b0) -> 0x22e70 fde=[ 10bb0]\n- 0xffffffffc961b518 (offset: 0xff230) -> 0x22f74 fde=[ 10cb4]\n- 0xffffffffc961c638 (offset: 0x100350) -> 0x2318c fde=[ 10ecc]\n- 0xffffffffc961c908 (offset: 0x100620) -> 0x231b0 fde=[ 10ef0]\n- 0xffffffffc961cbd8 (offset: 0x1008f0) -> 0x23210 fde=[ 10f50]\n- 0xffffffffc961cea8 (offset: 0x100bc0) -> 0x23234 fde=[ 10f74]\n- 0xffffffffc961d178 (offset: 0x100e90) -> 0x23294 fde=[ 10fd4]\n- 0xffffffffc961d448 (offset: 0x101160) -> 0x232b8 fde=[ 10ff8]\n- 0xffffffffc961d718 (offset: 0x101430) -> 0x23318 fde=[ 11058]\n- 0xffffffffc961d9e8 (offset: 0x101700) -> 0x2333c fde=[ 1107c]\n- 0xffffffffc961dcb8 (offset: 0x1019d0) -> 0x2339c fde=[ 110dc]\n- 0xffffffffc961df88 (offset: 0x101ca0) -> 0x233c0 fde=[ 11100]\n- 0xffffffffc961e258 (offset: 0x101f70) -> 0x23420 fde=[ 11160]\n- 0xffffffffc961e528 (offset: 0x102240) -> 0x23444 fde=[ 11184]\n- 0xffffffffc961e7f8 (offset: 0x102510) -> 0x23468 fde=[ 111a8]\n- 0xffffffffc961e898 (offset: 0x1025b0) -> 0x2348c fde=[ 111cc]\n- 0xffffffffc961e928 (offset: 0x102640) -> 0x234b0 fde=[ 111f0]\n- 0xffffffffc961e9c8 (offset: 0x1026e0) -> 0x234d4 fde=[ 11214]\n- 0xffffffffc961ea58 (offset: 0x102770) -> 0x234f8 fde=[ 11238]\n- 0xffffffffc961eaf8 (offset: 0x102810) -> 0x2351c fde=[ 1125c]\n- 0xffffffffc961eb88 (offset: 0x1028a0) -> 0x23540 fde=[ 11280]\n- 0xffffffffc961ec28 (offset: 0x102940) -> 0x23564 fde=[ 112a4]\n- 0xffffffffc961ecb8 (offset: 0x1029d0) -> 0x23588 fde=[ 112c8]\n- 0xffffffffc961ed58 (offset: 0x102a70) -> 0x235ac fde=[ 112ec]\n- 0xffffffffc961ede8 (offset: 0x102b00) -> 0x235d0 fde=[ 11310]\n- 0xffffffffc961ee88 (offset: 0x102ba0) -> 0x235f4 fde=[ 11334]\n- 0xffffffffc961ef18 (offset: 0x102c30) -> 0x23618 fde=[ 11358]\n- 0xffffffffc961f3a8 (offset: 0x1030c0) -> 0x2363c fde=[ 1137c]\n- 0xffffffffc961f3d8 (offset: 0x1030f0) -> 0x23150 fde=[ 10e90]\n- 0xffffffffc961f458 (offset: 0x103170) -> 0x23654 fde=[ 11394]\n- 0xffffffffc9620588 (offset: 0x1042a0) -> 0x231d4 fde=[ 10f14]\n- 0xffffffffc9620608 (offset: 0x104320) -> 0x23830 fde=[ 11570]\n- 0xffffffffc9621738 (offset: 0x105450) -> 0x23258 fde=[ 10f98]\n- 0xffffffffc96217b8 (offset: 0x1054d0) -> 0x23a0c fde=[ 1174c]\n- 0xffffffffc96228e8 (offset: 0x106600) -> 0x232dc fde=[ 1101c]\n- 0xffffffffc9622968 (offset: 0x106680) -> 0x23be8 fde=[ 11928]\n- 0xffffffffc9623a98 (offset: 0x1077b0) -> 0x23360 fde=[ 110a0]\n- 0xffffffffc9623b18 (offset: 0x107830) -> 0x23dc4 fde=[ 11b04]\n- 0xffffffffc9624c48 (offset: 0x108960) -> 0x233e4 fde=[ 11124]\n- 0xffffffffc9624cc8 (offset: 0x1089e0) -> 0x23fa0 fde=[ 11ce0]\n- 0xffffffffc9625df8 (offset: 0x109b10) -> 0x241bc fde=[ 11efc]\n- 0xffffffffc96260c8 (offset: 0x109de0) -> 0x241e0 fde=[ 11f20]\n- 0xffffffffc9626398 (offset: 0x10a0b0) -> 0x24240 fde=[ 11f80]\n- 0xffffffffc9626668 (offset: 0x10a380) -> 0x24264 fde=[ 11fa4]\n- 0xffffffffc9626938 (offset: 0x10a650) -> 0x242c4 fde=[ 12004]\n- 0xffffffffc9626c08 (offset: 0x10a920) -> 0x242e8 fde=[ 12028]\n- 0xffffffffc9626ed8 (offset: 0x10abf0) -> 0x24348 fde=[ 12088]\n- 0xffffffffc96271a8 (offset: 0x10aec0) -> 0x2436c fde=[ 120ac]\n- 0xffffffffc9627478 (offset: 0x10b190) -> 0x243cc fde=[ 1210c]\n- 0xffffffffc9627748 (offset: 0x10b460) -> 0x243f0 fde=[ 12130]\n- 0xffffffffc9627a18 (offset: 0x10b730) -> 0x24450 fde=[ 12190]\n- 0xffffffffc9627ce8 (offset: 0x10ba00) -> 0x24474 fde=[ 121b4]\n- 0xffffffffc9627fb8 (offset: 0x10bcd0) -> 0x24498 fde=[ 121d8]\n- 0xffffffffc9628058 (offset: 0x10bd70) -> 0x244bc fde=[ 121fc]\n- 0xffffffffc96280e8 (offset: 0x10be00) -> 0x244e0 fde=[ 12220]\n- 0xffffffffc9628188 (offset: 0x10bea0) -> 0x24504 fde=[ 12244]\n- 0xffffffffc9628218 (offset: 0x10bf30) -> 0x24528 fde=[ 12268]\n- 0xffffffffc96282b8 (offset: 0x10bfd0) -> 0x2454c fde=[ 1228c]\n- 0xffffffffc9628348 (offset: 0x10c060) -> 0x24570 fde=[ 122b0]\n- 0xffffffffc96283e8 (offset: 0x10c100) -> 0x24594 fde=[ 122d4]\n- 0xffffffffc9628478 (offset: 0x10c190) -> 0x245b8 fde=[ 122f8]\n- 0xffffffffc9628518 (offset: 0x10c230) -> 0x245dc fde=[ 1231c]\n- 0xffffffffc96285a8 (offset: 0x10c2c0) -> 0x24600 fde=[ 12340]\n- 0xffffffffc9628648 (offset: 0x10c360) -> 0x24624 fde=[ 12364]\n- 0xffffffffc96286d8 (offset: 0x10c3f0) -> 0x24648 fde=[ 12388]\n- 0xffffffffc9628b68 (offset: 0x10c880) -> 0x2466c fde=[ 123ac]\n- 0xffffffffc9628b98 (offset: 0x10c8b0) -> 0x24180 fde=[ 11ec0]\n- 0xffffffffc9628c18 (offset: 0x10c930) -> 0x24204 fde=[ 11f44]\n- 0xffffffffc9628c98 (offset: 0x10c9b0) -> 0x24288 fde=[ 11fc8]\n- 0xffffffffc9628d18 (offset: 0x10ca30) -> 0x2430c fde=[ 1204c]\n- 0xffffffffc9628d98 (offset: 0x10cab0) -> 0x24390 fde=[ 120d0]\n- 0xffffffffc9628e18 (offset: 0x10cb30) -> 0x24414 fde=[ 12154]\n- 0xffffffffc9628e98 (offset: 0x10cbb0) -> 0x246c4 fde=[ 12404]\n- 0xffffffffc9629168 (offset: 0x10ce80) -> 0x246e8 fde=[ 12428]\n- 0xffffffffc9629438 (offset: 0x10d150) -> 0x24748 fde=[ 12488]\n- 0xffffffffc9629708 (offset: 0x10d420) -> 0x2476c fde=[ 124ac]\n- 0xffffffffc96299d8 (offset: 0x10d6f0) -> 0x247cc fde=[ 1250c]\n- 0xffffffffc9629ca8 (offset: 0x10d9c0) -> 0x247f0 fde=[ 12530]\n- 0xffffffffc9629f78 (offset: 0x10dc90) -> 0x24850 fde=[ 12590]\n- 0xffffffffc962a248 (offset: 0x10df60) -> 0x24874 fde=[ 125b4]\n- 0xffffffffc962a518 (offset: 0x10e230) -> 0x248d4 fde=[ 12614]\n- 0xffffffffc962a7e8 (offset: 0x10e500) -> 0x248f8 fde=[ 12638]\n- 0xffffffffc962aab8 (offset: 0x10e7d0) -> 0x24958 fde=[ 12698]\n- 0xffffffffc962ad88 (offset: 0x10eaa0) -> 0x2497c fde=[ 126bc]\n- 0xffffffffc962b058 (offset: 0x10ed70) -> 0x249a0 fde=[ 126e0]\n- 0xffffffffc962b0f8 (offset: 0x10ee10) -> 0x249c4 fde=[ 12704]\n- 0xffffffffc962b188 (offset: 0x10eea0) -> 0x249e8 fde=[ 12728]\n- 0xffffffffc962b228 (offset: 0x10ef40) -> 0x24a0c fde=[ 1274c]\n- 0xffffffffc962b2b8 (offset: 0x10efd0) -> 0x24a30 fde=[ 12770]\n- 0xffffffffc962b358 (offset: 0x10f070) -> 0x24a54 fde=[ 12794]\n- 0xffffffffc962b3e8 (offset: 0x10f100) -> 0x24a78 fde=[ 127b8]\n- 0xffffffffc962b488 (offset: 0x10f1a0) -> 0x24a9c fde=[ 127dc]\n- 0xffffffffc962b518 (offset: 0x10f230) -> 0x24ac0 fde=[ 12800]\n- 0xffffffffc962b5b8 (offset: 0x10f2d0) -> 0x24ae4 fde=[ 12824]\n- 0xffffffffc962b648 (offset: 0x10f360) -> 0x24b08 fde=[ 12848]\n- 0xffffffffc962b6e8 (offset: 0x10f400) -> 0x24b2c fde=[ 1286c]\n- 0xffffffffc962b778 (offset: 0x10f490) -> 0x24b50 fde=[ 12890]\n- 0xffffffffc962bc08 (offset: 0x10f920) -> 0x24b74 fde=[ 128b4]\n- 0xffffffffc962bc38 (offset: 0x10f950) -> 0x24688 fde=[ 123c8]\n- 0xffffffffc962bcb8 (offset: 0x10f9d0) -> 0x24b8c fde=[ 128cc]\n- 0xffffffffc962cdf8 (offset: 0x110b10) -> 0x2470c fde=[ 1244c]\n- 0xffffffffc962ce78 (offset: 0x110b90) -> 0x24d68 fde=[ 12aa8]\n- 0xffffffffc962dfb8 (offset: 0x111cd0) -> 0x24790 fde=[ 124d0]\n- 0xffffffffc962e038 (offset: 0x111d50) -> 0x24f44 fde=[ 12c84]\n- 0xffffffffc962f178 (offset: 0x112e90) -> 0x24814 fde=[ 12554]\n- 0xffffffffc962f1f8 (offset: 0x112f10) -> 0x25120 fde=[ 12e60]\n- 0xffffffffc9630338 (offset: 0x114050) -> 0x24898 fde=[ 125d8]\n- 0xffffffffc96303b8 (offset: 0x1140d0) -> 0x252fc fde=[ 1303c]\n- 0xffffffffc96314f8 (offset: 0x115210) -> 0x2491c fde=[ 1265c]\n- 0xffffffffc9631578 (offset: 0x115290) -> 0x254d8 fde=[ 13218]\n- 0xffffffffc96326b8 (offset: 0x1163d0) -> 0x256f4 fde=[ 13434]\n- 0xffffffffc9632988 (offset: 0x1166a0) -> 0x25718 fde=[ 13458]\n- 0xffffffffc9632c58 (offset: 0x116970) -> 0x25778 fde=[ 134b8]\n- 0xffffffffc9632f28 (offset: 0x116c40) -> 0x2579c fde=[ 134dc]\n- 0xffffffffc96331f8 (offset: 0x116f10) -> 0x257fc fde=[ 1353c]\n- 0xffffffffc96334c8 (offset: 0x1171e0) -> 0x25820 fde=[ 13560]\n- 0xffffffffc9633798 (offset: 0x1174b0) -> 0x25880 fde=[ 135c0]\n- 0xffffffffc9633a68 (offset: 0x117780) -> 0x258a4 fde=[ 135e4]\n- 0xffffffffc9633d38 (offset: 0x117a50) -> 0x25904 fde=[ 13644]\n- 0xffffffffc9634008 (offset: 0x117d20) -> 0x25928 fde=[ 13668]\n- 0xffffffffc96342d8 (offset: 0x117ff0) -> 0x25988 fde=[ 136c8]\n- 0xffffffffc96345a8 (offset: 0x1182c0) -> 0x259ac fde=[ 136ec]\n- 0xffffffffc9634878 (offset: 0x118590) -> 0x259d0 fde=[ 13710]\n- 0xffffffffc9634918 (offset: 0x118630) -> 0x259f4 fde=[ 13734]\n- 0xffffffffc96349a8 (offset: 0x1186c0) -> 0x25a18 fde=[ 13758]\n- 0xffffffffc9634a48 (offset: 0x118760) -> 0x25a3c fde=[ 1377c]\n- 0xffffffffc9634ad8 (offset: 0x1187f0) -> 0x25a60 fde=[ 137a0]\n- 0xffffffffc9634b78 (offset: 0x118890) -> 0x25a84 fde=[ 137c4]\n- 0xffffffffc9634c08 (offset: 0x118920) -> 0x25aa8 fde=[ 137e8]\n- 0xffffffffc9634ca8 (offset: 0x1189c0) -> 0x25acc fde=[ 1380c]\n- 0xffffffffc9634d38 (offset: 0x118a50) -> 0x25af0 fde=[ 13830]\n- 0xffffffffc9634dd8 (offset: 0x118af0) -> 0x25b14 fde=[ 13854]\n- 0xffffffffc9634e68 (offset: 0x118b80) -> 0x25b38 fde=[ 13878]\n- 0xffffffffc9634f08 (offset: 0x118c20) -> 0x25b5c fde=[ 1389c]\n- 0xffffffffc9634f98 (offset: 0x118cb0) -> 0x25b80 fde=[ 138c0]\n- 0xffffffffc9635428 (offset: 0x119140) -> 0x25ba4 fde=[ 138e4]\n- 0xffffffffc9635458 (offset: 0x119170) -> 0x256b8 fde=[ 133f8]\n- 0xffffffffc96354d8 (offset: 0x1191f0) -> 0x25bbc fde=[ 138fc]\n- 0xffffffffc9636628 (offset: 0x11a340) -> 0x2573c fde=[ 1347c]\n- 0xffffffffc96366a8 (offset: 0x11a3c0) -> 0x25d98 fde=[ 13ad8]\n- 0xffffffffc96377f8 (offset: 0x11b510) -> 0x257c0 fde=[ 13500]\n- 0xffffffffc9637878 (offset: 0x11b590) -> 0x25f74 fde=[ 13cb4]\n- 0xffffffffc96389c8 (offset: 0x11c6e0) -> 0x25844 fde=[ 13584]\n- 0xffffffffc9638a48 (offset: 0x11c760) -> 0x26150 fde=[ 13e90]\n- 0xffffffffc9639b98 (offset: 0x11d8b0) -> 0x258c8 fde=[ 13608]\n- 0xffffffffc9639c18 (offset: 0x11d930) -> 0x2632c fde=[ 1406c]\n- 0xffffffffc963ad68 (offset: 0x11ea80) -> 0x2594c fde=[ 1368c]\n- 0xffffffffc963ade8 (offset: 0x11eb00) -> 0x26508 fde=[ 14248]\n- 0xffffffffc963bf38 (offset: 0x11fc50) -> 0x2671c fde=[ 1445c]\n- 0xffffffffc963c208 (offset: 0x11ff20) -> 0x26740 fde=[ 14480]\n- 0xffffffffc963c4d8 (offset: 0x1201f0) -> 0x26764 fde=[ 144a4]\n- 0xffffffffc963c578 (offset: 0x120290) -> 0x26788 fde=[ 144c8]\n- 0xffffffffc963c608 (offset: 0x120320) -> 0x267ac fde=[ 144ec]\n- 0xffffffffc963c6f8 (offset: 0x120410) -> 0x267cc fde=[ 1450c]\n- 0xffffffffc963c728 (offset: 0x120440) -> 0x266e8 fde=[ 14428]\n- 0xffffffffc963c788 (offset: 0x1204a0) -> 0x267e4 fde=[ 14524]\n- 0xffffffffc963d8b8 (offset: 0x1215d0) -> 0x269fc fde=[ 1473c]\n- 0xffffffffc963db88 (offset: 0x1218a0) -> 0x26a20 fde=[ 14760]\n- 0xffffffffc963de58 (offset: 0x121b70) -> 0x26a80 fde=[ 147c0]\n- 0xffffffffc963e128 (offset: 0x121e40) -> 0x26aa4 fde=[ 147e4]\n- 0xffffffffc963e3f8 (offset: 0x122110) -> 0x26b04 fde=[ 14844]\n- 0xffffffffc963e6c8 (offset: 0x1223e0) -> 0x26b28 fde=[ 14868]\n- 0xffffffffc963e998 (offset: 0x1226b0) -> 0x26b88 fde=[ 148c8]\n- 0xffffffffc963ec68 (offset: 0x122980) -> 0x26bac fde=[ 148ec]\n- 0xffffffffc963ef38 (offset: 0x122c50) -> 0x26c0c fde=[ 1494c]\n- 0xffffffffc963f208 (offset: 0x122f20) -> 0x26c30 fde=[ 14970]\n- 0xffffffffc963f4d8 (offset: 0x1231f0) -> 0x26c90 fde=[ 149d0]\n- 0xffffffffc963f7a8 (offset: 0x1234c0) -> 0x26cb4 fde=[ 149f4]\n- 0xffffffffc963fa78 (offset: 0x123790) -> 0x26cd8 fde=[ 14a18]\n- 0xffffffffc963fb18 (offset: 0x123830) -> 0x26cfc fde=[ 14a3c]\n- 0xffffffffc963fba8 (offset: 0x1238c0) -> 0x26d20 fde=[ 14a60]\n- 0xffffffffc963fc48 (offset: 0x123960) -> 0x26d44 fde=[ 14a84]\n- 0xffffffffc963fcd8 (offset: 0x1239f0) -> 0x26d68 fde=[ 14aa8]\n- 0xffffffffc963fd78 (offset: 0x123a90) -> 0x26d8c fde=[ 14acc]\n- 0xffffffffc963fe08 (offset: 0x123b20) -> 0x26db0 fde=[ 14af0]\n- 0xffffffffc963fea8 (offset: 0x123bc0) -> 0x26dd4 fde=[ 14b14]\n- 0xffffffffc963ff38 (offset: 0x123c50) -> 0x26df8 fde=[ 14b38]\n- 0xffffffffc963ffd8 (offset: 0x123cf0) -> 0x26e1c fde=[ 14b5c]\n- 0xffffffffc9640068 (offset: 0x123d80) -> 0x26e40 fde=[ 14b80]\n- 0xffffffffc9640108 (offset: 0x123e20) -> 0x26e64 fde=[ 14ba4]\n- 0xffffffffc9640198 (offset: 0x123eb0) -> 0x26e88 fde=[ 14bc8]\n- 0xffffffffc9640628 (offset: 0x124340) -> 0x26eac fde=[ 14bec]\n- 0xffffffffc9640658 (offset: 0x124370) -> 0x269c0 fde=[ 14700]\n- 0xffffffffc96406d8 (offset: 0x1243f0) -> 0x26ec4 fde=[ 14c04]\n- 0xffffffffc9641828 (offset: 0x125540) -> 0x26a44 fde=[ 14784]\n- 0xffffffffc96418a8 (offset: 0x1255c0) -> 0x270a0 fde=[ 14de0]\n- 0xffffffffc96429f8 (offset: 0x126710) -> 0x26ac8 fde=[ 14808]\n- 0xffffffffc9642a78 (offset: 0x126790) -> 0x2727c fde=[ 14fbc]\n- 0xffffffffc9643bc8 (offset: 0x1278e0) -> 0x26b4c fde=[ 1488c]\n- 0xffffffffc9643c48 (offset: 0x127960) -> 0x27458 fde=[ 15198]\n- 0xffffffffc9644d98 (offset: 0x128ab0) -> 0x26bd0 fde=[ 14910]\n- 0xffffffffc9644e18 (offset: 0x128b30) -> 0x27634 fde=[ 15374]\n- 0xffffffffc9645f68 (offset: 0x129c80) -> 0x26c54 fde=[ 14994]\n- 0xffffffffc9645fe8 (offset: 0x129d00) -> 0x27810 fde=[ 15550]\n- 0xffffffffc9647138 (offset: 0x12ae50) -> 0x27a2c fde=[ 1576c]\n- 0xffffffffc9647408 (offset: 0x12b120) -> 0x27a50 fde=[ 15790]\n- 0xffffffffc96476d8 (offset: 0x12b3f0) -> 0x27ab0 fde=[ 157f0]\n- 0xffffffffc96479a8 (offset: 0x12b6c0) -> 0x27ad4 fde=[ 15814]\n- 0xffffffffc9647c78 (offset: 0x12b990) -> 0x27b34 fde=[ 15874]\n- 0xffffffffc9647f48 (offset: 0x12bc60) -> 0x27b58 fde=[ 15898]\n- 0xffffffffc9648218 (offset: 0x12bf30) -> 0x27bb8 fde=[ 158f8]\n- 0xffffffffc96484e8 (offset: 0x12c200) -> 0x27bdc fde=[ 1591c]\n- 0xffffffffc96487b8 (offset: 0x12c4d0) -> 0x27c3c fde=[ 1597c]\n- 0xffffffffc9648a88 (offset: 0x12c7a0) -> 0x27c60 fde=[ 159a0]\n- 0xffffffffc9648d58 (offset: 0x12ca70) -> 0x27cc0 fde=[ 15a00]\n- 0xffffffffc9649028 (offset: 0x12cd40) -> 0x27ce4 fde=[ 15a24]\n- 0xffffffffc96492f8 (offset: 0x12d010) -> 0x27d08 fde=[ 15a48]\n- 0xffffffffc9649398 (offset: 0x12d0b0) -> 0x27d2c fde=[ 15a6c]\n- 0xffffffffc9649428 (offset: 0x12d140) -> 0x27d50 fde=[ 15a90]\n- 0xffffffffc96494c8 (offset: 0x12d1e0) -> 0x27d74 fde=[ 15ab4]\n- 0xffffffffc9649558 (offset: 0x12d270) -> 0x27d98 fde=[ 15ad8]\n- 0xffffffffc96495f8 (offset: 0x12d310) -> 0x27dbc fde=[ 15afc]\n- 0xffffffffc9649688 (offset: 0x12d3a0) -> 0x27de0 fde=[ 15b20]\n- 0xffffffffc9649728 (offset: 0x12d440) -> 0x27e04 fde=[ 15b44]\n- 0xffffffffc96497b8 (offset: 0x12d4d0) -> 0x27e28 fde=[ 15b68]\n- 0xffffffffc9649858 (offset: 0x12d570) -> 0x27e4c fde=[ 15b8c]\n- 0xffffffffc96498e8 (offset: 0x12d600) -> 0x27e70 fde=[ 15bb0]\n- 0xffffffffc9649988 (offset: 0x12d6a0) -> 0x27e94 fde=[ 15bd4]\n- 0xffffffffc9649a18 (offset: 0x12d730) -> 0x27eb8 fde=[ 15bf8]\n- 0xffffffffc9649ea8 (offset: 0x12dbc0) -> 0x27edc fde=[ 15c1c]\n- 0xffffffffc9649ed8 (offset: 0x12dbf0) -> 0x279f0 fde=[ 15730]\n- 0xffffffffc9649f58 (offset: 0x12dc70) -> 0x27ef4 fde=[ 15c34]\n- 0xffffffffc964b0a8 (offset: 0x12edc0) -> 0x27a74 fde=[ 157b4]\n- 0xffffffffc964b128 (offset: 0x12ee40) -> 0x280d0 fde=[ 15e10]\n- 0xffffffffc964c278 (offset: 0x12ff90) -> 0x27af8 fde=[ 15838]\n- 0xffffffffc964c2f8 (offset: 0x130010) -> 0x282ac fde=[ 15fec]\n- 0xffffffffc964d448 (offset: 0x131160) -> 0x27b7c fde=[ 158bc]\n- 0xffffffffc964d4c8 (offset: 0x1311e0) -> 0x28488 fde=[ 161c8]\n- 0xffffffffc964e618 (offset: 0x132330) -> 0x27c00 fde=[ 15940]\n- 0xffffffffc964e698 (offset: 0x1323b0) -> 0x28664 fde=[ 163a4]\n- 0xffffffffc964f7e8 (offset: 0x133500) -> 0x27c84 fde=[ 159c4]\n- 0xffffffffc964f868 (offset: 0x133580) -> 0x28840 fde=[ 16580]\n- 0xffffffffc96509b8 (offset: 0x1346d0) -> 0x28a5c fde=[ 1679c]\n- 0xffffffffc9650c88 (offset: 0x1349a0) -> 0x28a80 fde=[ 167c0]\n- 0xffffffffc9650f58 (offset: 0x134c70) -> 0x28ae0 fde=[ 16820]\n- 0xffffffffc9651228 (offset: 0x134f40) -> 0x28b04 fde=[ 16844]\n- 0xffffffffc96514f8 (offset: 0x135210) -> 0x28b64 fde=[ 168a4]\n- 0xffffffffc96517c8 (offset: 0x1354e0) -> 0x28b88 fde=[ 168c8]\n- 0xffffffffc9651a98 (offset: 0x1357b0) -> 0x28be8 fde=[ 16928]\n- 0xffffffffc9651d68 (offset: 0x135a80) -> 0x28c0c fde=[ 1694c]\n- 0xffffffffc9652038 (offset: 0x135d50) -> 0x28c6c fde=[ 169ac]\n- 0xffffffffc9652308 (offset: 0x136020) -> 0x28c90 fde=[ 169d0]\n- 0xffffffffc96525d8 (offset: 0x1362f0) -> 0x28cf0 fde=[ 16a30]\n- 0xffffffffc96528a8 (offset: 0x1365c0) -> 0x28d14 fde=[ 16a54]\n- 0xffffffffc9652b78 (offset: 0x136890) -> 0x28d38 fde=[ 16a78]\n- 0xffffffffc9652c18 (offset: 0x136930) -> 0x28d5c fde=[ 16a9c]\n- 0xffffffffc9652ca8 (offset: 0x1369c0) -> 0x28d80 fde=[ 16ac0]\n- 0xffffffffc9652d48 (offset: 0x136a60) -> 0x28da4 fde=[ 16ae4]\n- 0xffffffffc9652dd8 (offset: 0x136af0) -> 0x28dc8 fde=[ 16b08]\n- 0xffffffffc9652e78 (offset: 0x136b90) -> 0x28dec fde=[ 16b2c]\n- 0xffffffffc9652f08 (offset: 0x136c20) -> 0x28e10 fde=[ 16b50]\n- 0xffffffffc9652fa8 (offset: 0x136cc0) -> 0x28e34 fde=[ 16b74]\n- 0xffffffffc9653038 (offset: 0x136d50) -> 0x28e58 fde=[ 16b98]\n- 0xffffffffc96530d8 (offset: 0x136df0) -> 0x28e7c fde=[ 16bbc]\n- 0xffffffffc9653168 (offset: 0x136e80) -> 0x28ea0 fde=[ 16be0]\n- 0xffffffffc9653208 (offset: 0x136f20) -> 0x28ec4 fde=[ 16c04]\n- 0xffffffffc9653298 (offset: 0x136fb0) -> 0x28ee8 fde=[ 16c28]\n- 0xffffffffc9653728 (offset: 0x137440) -> 0x28f0c fde=[ 16c4c]\n- 0xffffffffc9653758 (offset: 0x137470) -> 0x28a20 fde=[ 16760]\n- 0xffffffffc96537d8 (offset: 0x1374f0) -> 0x28aa4 fde=[ 167e4]\n- 0xffffffffc9653858 (offset: 0x137570) -> 0x28b28 fde=[ 16868]\n- 0xffffffffc96538d8 (offset: 0x1375f0) -> 0x28bac fde=[ 168ec]\n- 0xffffffffc9653958 (offset: 0x137670) -> 0x28c30 fde=[ 16970]\n- 0xffffffffc96539d8 (offset: 0x1376f0) -> 0x28cb4 fde=[ 169f4]\n- 0xffffffffc9653a58 (offset: 0x137770) -> 0x28f64 fde=[ 16ca4]\n- 0xffffffffc9653d28 (offset: 0x137a40) -> 0x28f88 fde=[ 16cc8]\n- 0xffffffffc9653ff8 (offset: 0x137d10) -> 0x28fe8 fde=[ 16d28]\n- 0xffffffffc96542c8 (offset: 0x137fe0) -> 0x2900c fde=[ 16d4c]\n- 0xffffffffc9654598 (offset: 0x1382b0) -> 0x2906c fde=[ 16dac]\n- 0xffffffffc9654868 (offset: 0x138580) -> 0x29090 fde=[ 16dd0]\n- 0xffffffffc9654b38 (offset: 0x138850) -> 0x290f0 fde=[ 16e30]\n- 0xffffffffc9654e08 (offset: 0x138b20) -> 0x29114 fde=[ 16e54]\n- 0xffffffffc96550d8 (offset: 0x138df0) -> 0x29174 fde=[ 16eb4]\n- 0xffffffffc96553a8 (offset: 0x1390c0) -> 0x29198 fde=[ 16ed8]\n- 0xffffffffc9655678 (offset: 0x139390) -> 0x291f8 fde=[ 16f38]\n- 0xffffffffc9655948 (offset: 0x139660) -> 0x2921c fde=[ 16f5c]\n- 0xffffffffc9655c18 (offset: 0x139930) -> 0x29240 fde=[ 16f80]\n- 0xffffffffc9655cb8 (offset: 0x1399d0) -> 0x29264 fde=[ 16fa4]\n- 0xffffffffc9655d48 (offset: 0x139a60) -> 0x29288 fde=[ 16fc8]\n- 0xffffffffc9655de8 (offset: 0x139b00) -> 0x292ac fde=[ 16fec]\n- 0xffffffffc9655e78 (offset: 0x139b90) -> 0x292d0 fde=[ 17010]\n- 0xffffffffc9655f18 (offset: 0x139c30) -> 0x292f4 fde=[ 17034]\n- 0xffffffffc9655fa8 (offset: 0x139cc0) -> 0x29318 fde=[ 17058]\n- 0xffffffffc9656048 (offset: 0x139d60) -> 0x2933c fde=[ 1707c]\n- 0xffffffffc96560d8 (offset: 0x139df0) -> 0x29360 fde=[ 170a0]\n- 0xffffffffc9656178 (offset: 0x139e90) -> 0x29384 fde=[ 170c4]\n- 0xffffffffc9656208 (offset: 0x139f20) -> 0x293a8 fde=[ 170e8]\n- 0xffffffffc96562a8 (offset: 0x139fc0) -> 0x293cc fde=[ 1710c]\n- 0xffffffffc9656338 (offset: 0x13a050) -> 0x293f0 fde=[ 17130]\n- 0xffffffffc96567c8 (offset: 0x13a4e0) -> 0x29414 fde=[ 17154]\n- 0xffffffffc96567f8 (offset: 0x13a510) -> 0x28f28 fde=[ 16c68]\n- 0xffffffffc9656878 (offset: 0x13a590) -> 0x2942c fde=[ 1716c]\n- 0xffffffffc96579b8 (offset: 0x13b6d0) -> 0x28fac fde=[ 16cec]\n- 0xffffffffc9657a38 (offset: 0x13b750) -> 0x29608 fde=[ 17348]\n- 0xffffffffc9658b78 (offset: 0x13c890) -> 0x29030 fde=[ 16d70]\n- 0xffffffffc9658bf8 (offset: 0x13c910) -> 0x297e4 fde=[ 17524]\n- 0xffffffffc9659d38 (offset: 0x13da50) -> 0x290b4 fde=[ 16df4]\n- 0xffffffffc9659db8 (offset: 0x13dad0) -> 0x299c0 fde=[ 17700]\n- 0xffffffffc965aef8 (offset: 0x13ec10) -> 0x29138 fde=[ 16e78]\n- 0xffffffffc965af78 (offset: 0x13ec90) -> 0x29b9c fde=[ 178dc]\n- 0xffffffffc965c0b8 (offset: 0x13fdd0) -> 0x291bc fde=[ 16efc]\n- 0xffffffffc965c138 (offset: 0x13fe50) -> 0x29d78 fde=[ 17ab8]\n- 0xffffffffc965d278 (offset: 0x140f90) -> 0x29f8c fde=[ 17ccc]\n- 0xffffffffc965d548 (offset: 0x141260) -> 0x29fb0 fde=[ 17cf0]\n- 0xffffffffc965d818 (offset: 0x141530) -> 0x29fd4 fde=[ 17d14]\n- 0xffffffffc965d8b8 (offset: 0x1415d0) -> 0x29ff8 fde=[ 17d38]\n- 0xffffffffc965d948 (offset: 0x141660) -> 0x2a01c fde=[ 17d5c]\n- 0xffffffffc965da38 (offset: 0x141750) -> 0x2a03c fde=[ 17d7c]\n- 0xffffffffc965da68 (offset: 0x141780) -> 0x29f58 fde=[ 17c98]\n- 0xffffffffc965dac8 (offset: 0x1417e0) -> 0x2a054 fde=[ 17d94]\n- 0xffffffffc965ebf8 (offset: 0x142910) -> 0x2a26c fde=[ 17fac]\n- 0xffffffffc965eec8 (offset: 0x142be0) -> 0x2a290 fde=[ 17fd0]\n- 0xffffffffc965f198 (offset: 0x142eb0) -> 0x2a2f0 fde=[ 18030]\n- 0xffffffffc965f468 (offset: 0x143180) -> 0x2a314 fde=[ 18054]\n- 0xffffffffc965f738 (offset: 0x143450) -> 0x2a374 fde=[ 180b4]\n- 0xffffffffc965fa08 (offset: 0x143720) -> 0x2a398 fde=[ 180d8]\n- 0xffffffffc965fcd8 (offset: 0x1439f0) -> 0x2a3f8 fde=[ 18138]\n- 0xffffffffc965ffa8 (offset: 0x143cc0) -> 0x2a41c fde=[ 1815c]\n- 0xffffffffc9660278 (offset: 0x143f90) -> 0x2a47c fde=[ 181bc]\n- 0xffffffffc9660548 (offset: 0x144260) -> 0x2a4a0 fde=[ 181e0]\n- 0xffffffffc9660818 (offset: 0x144530) -> 0x2a500 fde=[ 18240]\n- 0xffffffffc9660ae8 (offset: 0x144800) -> 0x2a524 fde=[ 18264]\n- 0xffffffffc9660db8 (offset: 0x144ad0) -> 0x2a548 fde=[ 18288]\n- 0xffffffffc9660e58 (offset: 0x144b70) -> 0x2a56c fde=[ 182ac]\n- 0xffffffffc9660ee8 (offset: 0x144c00) -> 0x2a590 fde=[ 182d0]\n- 0xffffffffc9660f88 (offset: 0x144ca0) -> 0x2a5b4 fde=[ 182f4]\n- 0xffffffffc9661018 (offset: 0x144d30) -> 0x2a5d8 fde=[ 18318]\n- 0xffffffffc96610b8 (offset: 0x144dd0) -> 0x2a5fc fde=[ 1833c]\n- 0xffffffffc9661148 (offset: 0x144e60) -> 0x2a620 fde=[ 18360]\n- 0xffffffffc96611e8 (offset: 0x144f00) -> 0x2a644 fde=[ 18384]\n- 0xffffffffc9661278 (offset: 0x144f90) -> 0x2a668 fde=[ 183a8]\n- 0xffffffffc9661318 (offset: 0x145030) -> 0x2a68c fde=[ 183cc]\n- 0xffffffffc96613a8 (offset: 0x1450c0) -> 0x2a6b0 fde=[ 183f0]\n- 0xffffffffc9661448 (offset: 0x145160) -> 0x2a6d4 fde=[ 18414]\n- 0xffffffffc96614d8 (offset: 0x1451f0) -> 0x2a6f8 fde=[ 18438]\n- 0xffffffffc9661968 (offset: 0x145680) -> 0x2a71c fde=[ 1845c]\n- 0xffffffffc9661998 (offset: 0x1456b0) -> 0x2a230 fde=[ 17f70]\n- 0xffffffffc9661a18 (offset: 0x145730) -> 0x2a734 fde=[ 18474]\n- 0xffffffffc9662b58 (offset: 0x146870) -> 0x2a2b4 fde=[ 17ff4]\n- 0xffffffffc9662bd8 (offset: 0x1468f0) -> 0x2a910 fde=[ 18650]\n- 0xffffffffc9663d18 (offset: 0x147a30) -> 0x2a338 fde=[ 18078]\n- 0xffffffffc9663d98 (offset: 0x147ab0) -> 0x2aaec fde=[ 1882c]\n- 0xffffffffc9664ed8 (offset: 0x148bf0) -> 0x2a3bc fde=[ 180fc]\n- 0xffffffffc9664f58 (offset: 0x148c70) -> 0x2acc8 fde=[ 18a08]\n- 0xffffffffc9666098 (offset: 0x149db0) -> 0x2a440 fde=[ 18180]\n- 0xffffffffc9666118 (offset: 0x149e30) -> 0x2aea4 fde=[ 18be4]\n- 0xffffffffc9667258 (offset: 0x14af70) -> 0x2a4c4 fde=[ 18204]\n- 0xffffffffc96672d8 (offset: 0x14aff0) -> 0x2b080 fde=[ 18dc0]\n- 0xffffffffc9668418 (offset: 0x14c130) -> 0x2b29c fde=[ 18fdc]\n- 0xffffffffc96686e8 (offset: 0x14c400) -> 0x2b2c0 fde=[ 19000]\n- 0xffffffffc96689b8 (offset: 0x14c6d0) -> 0x2b320 fde=[ 19060]\n- 0xffffffffc9668c88 (offset: 0x14c9a0) -> 0x2b344 fde=[ 19084]\n- 0xffffffffc9668f58 (offset: 0x14cc70) -> 0x2b3a4 fde=[ 190e4]\n- 0xffffffffc9669228 (offset: 0x14cf40) -> 0x2b3c8 fde=[ 19108]\n- 0xffffffffc96694f8 (offset: 0x14d210) -> 0x2b428 fde=[ 19168]\n- 0xffffffffc96697c8 (offset: 0x14d4e0) -> 0x2b44c fde=[ 1918c]\n- 0xffffffffc9669a98 (offset: 0x14d7b0) -> 0x2b4ac fde=[ 191ec]\n- 0xffffffffc9669d68 (offset: 0x14da80) -> 0x2b4d0 fde=[ 19210]\n- 0xffffffffc966a038 (offset: 0x14dd50) -> 0x2b530 fde=[ 19270]\n- 0xffffffffc966a308 (offset: 0x14e020) -> 0x2b554 fde=[ 19294]\n- 0xffffffffc966a5d8 (offset: 0x14e2f0) -> 0x2b578 fde=[ 192b8]\n- 0xffffffffc966a678 (offset: 0x14e390) -> 0x2b59c fde=[ 192dc]\n- 0xffffffffc966a708 (offset: 0x14e420) -> 0x2b5c0 fde=[ 19300]\n- 0xffffffffc966a7a8 (offset: 0x14e4c0) -> 0x2b5e4 fde=[ 19324]\n- 0xffffffffc966a838 (offset: 0x14e550) -> 0x2b608 fde=[ 19348]\n- 0xffffffffc966a8d8 (offset: 0x14e5f0) -> 0x2b62c fde=[ 1936c]\n- 0xffffffffc966a968 (offset: 0x14e680) -> 0x2b650 fde=[ 19390]\n- 0xffffffffc966aa08 (offset: 0x14e720) -> 0x2b674 fde=[ 193b4]\n- 0xffffffffc966aa98 (offset: 0x14e7b0) -> 0x2b698 fde=[ 193d8]\n- 0xffffffffc966ab38 (offset: 0x14e850) -> 0x2b6bc fde=[ 193fc]\n- 0xffffffffc966abc8 (offset: 0x14e8e0) -> 0x2b6e0 fde=[ 19420]\n- 0xffffffffc966ac68 (offset: 0x14e980) -> 0x2b704 fde=[ 19444]\n- 0xffffffffc966acf8 (offset: 0x14ea10) -> 0x2b728 fde=[ 19468]\n- 0xffffffffc966b188 (offset: 0x14eea0) -> 0x2b74c fde=[ 1948c]\n- 0xffffffffc966b1b8 (offset: 0x14eed0) -> 0x2b260 fde=[ 18fa0]\n- 0xffffffffc966b238 (offset: 0x14ef50) -> 0x2b764 fde=[ 194a4]\n- 0xffffffffc966c388 (offset: 0x1500a0) -> 0x2b2e4 fde=[ 19024]\n- 0xffffffffc966c408 (offset: 0x150120) -> 0x2b940 fde=[ 19680]\n- 0xffffffffc966d558 (offset: 0x151270) -> 0x2b368 fde=[ 190a8]\n- 0xffffffffc966d5d8 (offset: 0x1512f0) -> 0x2bb1c fde=[ 1985c]\n- 0xffffffffc966e728 (offset: 0x152440) -> 0x2b3ec fde=[ 1912c]\n- 0xffffffffc966e7a8 (offset: 0x1524c0) -> 0x2bcf8 fde=[ 19a38]\n- 0xffffffffc966f8f8 (offset: 0x153610) -> 0x2b470 fde=[ 191b0]\n- 0xffffffffc966f978 (offset: 0x153690) -> 0x2bed4 fde=[ 19c14]\n- 0xffffffffc9670ac8 (offset: 0x1547e0) -> 0x2b4f4 fde=[ 19234]\n- 0xffffffffc9670b48 (offset: 0x154860) -> 0x2c0b0 fde=[ 19df0]\n- 0xffffffffc9671c98 (offset: 0x1559b0) -> 0x2c2cc fde=[ 1a00c]\n- 0xffffffffc9671f68 (offset: 0x155c80) -> 0x2c2f0 fde=[ 1a030]\n- 0xffffffffc9672238 (offset: 0x155f50) -> 0x2c350 fde=[ 1a090]\n- 0xffffffffc9672508 (offset: 0x156220) -> 0x2c374 fde=[ 1a0b4]\n- 0xffffffffc96727d8 (offset: 0x1564f0) -> 0x2c3d4 fde=[ 1a114]\n- 0xffffffffc9672aa8 (offset: 0x1567c0) -> 0x2c3f8 fde=[ 1a138]\n- 0xffffffffc9672d78 (offset: 0x156a90) -> 0x2c458 fde=[ 1a198]\n- 0xffffffffc9673048 (offset: 0x156d60) -> 0x2c47c fde=[ 1a1bc]\n- 0xffffffffc9673318 (offset: 0x157030) -> 0x2c4dc fde=[ 1a21c]\n- 0xffffffffc96735e8 (offset: 0x157300) -> 0x2c500 fde=[ 1a240]\n- 0xffffffffc96738b8 (offset: 0x1575d0) -> 0x2c560 fde=[ 1a2a0]\n- 0xffffffffc9673b88 (offset: 0x1578a0) -> 0x2c584 fde=[ 1a2c4]\n- 0xffffffffc9673e58 (offset: 0x157b70) -> 0x2c5a8 fde=[ 1a2e8]\n- 0xffffffffc9673ef8 (offset: 0x157c10) -> 0x2c5cc fde=[ 1a30c]\n- 0xffffffffc9673f88 (offset: 0x157ca0) -> 0x2c5f0 fde=[ 1a330]\n- 0xffffffffc9674028 (offset: 0x157d40) -> 0x2c614 fde=[ 1a354]\n- 0xffffffffc96740b8 (offset: 0x157dd0) -> 0x2c638 fde=[ 1a378]\n- 0xffffffffc9674158 (offset: 0x157e70) -> 0x2c65c fde=[ 1a39c]\n- 0xffffffffc96741e8 (offset: 0x157f00) -> 0x2c680 fde=[ 1a3c0]\n- 0xffffffffc9674288 (offset: 0x157fa0) -> 0x2c6a4 fde=[ 1a3e4]\n- 0xffffffffc9674318 (offset: 0x158030) -> 0x2c6c8 fde=[ 1a408]\n- 0xffffffffc96743b8 (offset: 0x1580d0) -> 0x2c6ec fde=[ 1a42c]\n- 0xffffffffc9674448 (offset: 0x158160) -> 0x2c710 fde=[ 1a450]\n- 0xffffffffc96744e8 (offset: 0x158200) -> 0x2c734 fde=[ 1a474]\n- 0xffffffffc9674578 (offset: 0x158290) -> 0x2c758 fde=[ 1a498]\n- 0xffffffffc9674a08 (offset: 0x158720) -> 0x2c77c fde=[ 1a4bc]\n- 0xffffffffc9674a38 (offset: 0x158750) -> 0x2c290 fde=[ 19fd0]\n- 0xffffffffc9674ab8 (offset: 0x1587d0) -> 0x2c794 fde=[ 1a4d4]\n- 0xffffffffc9675c08 (offset: 0x159920) -> 0x2c314 fde=[ 1a054]\n- 0xffffffffc9675c88 (offset: 0x1599a0) -> 0x2c970 fde=[ 1a6b0]\n- 0xffffffffc9676dd8 (offset: 0x15aaf0) -> 0x2c398 fde=[ 1a0d8]\n- 0xffffffffc9676e58 (offset: 0x15ab70) -> 0x2cb4c fde=[ 1a88c]\n- 0xffffffffc9677fa8 (offset: 0x15bcc0) -> 0x2c41c fde=[ 1a15c]\n- 0xffffffffc9678028 (offset: 0x15bd40) -> 0x2cd28 fde=[ 1aa68]\n- 0xffffffffc9679178 (offset: 0x15ce90) -> 0x2c4a0 fde=[ 1a1e0]\n- 0xffffffffc96791f8 (offset: 0x15cf10) -> 0x2cf04 fde=[ 1ac44]\n- 0xffffffffc967a348 (offset: 0x15e060) -> 0x2c524 fde=[ 1a264]\n- 0xffffffffc967a3c8 (offset: 0x15e0e0) -> 0x2d0e0 fde=[ 1ae20]\n- 0xffffffffc967b518 (offset: 0x15f230) -> 0x2d2fc fde=[ 1b03c]\n- 0xffffffffc967b7e8 (offset: 0x15f500) -> 0x2d320 fde=[ 1b060]\n- 0xffffffffc967bab8 (offset: 0x15f7d0) -> 0x2d380 fde=[ 1b0c0]\n- 0xffffffffc967bd88 (offset: 0x15faa0) -> 0x2d3a4 fde=[ 1b0e4]\n- 0xffffffffc967c058 (offset: 0x15fd70) -> 0x2d404 fde=[ 1b144]\n- 0xffffffffc967c328 (offset: 0x160040) -> 0x2d428 fde=[ 1b168]\n- 0xffffffffc967c5f8 (offset: 0x160310) -> 0x2d488 fde=[ 1b1c8]\n- 0xffffffffc967c8c8 (offset: 0x1605e0) -> 0x2d4ac fde=[ 1b1ec]\n- 0xffffffffc967cb98 (offset: 0x1608b0) -> 0x2d50c fde=[ 1b24c]\n- 0xffffffffc967ce68 (offset: 0x160b80) -> 0x2d530 fde=[ 1b270]\n- 0xffffffffc967d138 (offset: 0x160e50) -> 0x2d590 fde=[ 1b2d0]\n- 0xffffffffc967d408 (offset: 0x161120) -> 0x2d5b4 fde=[ 1b2f4]\n- 0xffffffffc967d6d8 (offset: 0x1613f0) -> 0x2d5d8 fde=[ 1b318]\n- 0xffffffffc967d778 (offset: 0x161490) -> 0x2d5fc fde=[ 1b33c]\n- 0xffffffffc967d808 (offset: 0x161520) -> 0x2d620 fde=[ 1b360]\n- 0xffffffffc967d8a8 (offset: 0x1615c0) -> 0x2d644 fde=[ 1b384]\n- 0xffffffffc967d938 (offset: 0x161650) -> 0x2d668 fde=[ 1b3a8]\n- 0xffffffffc967d9d8 (offset: 0x1616f0) -> 0x2d68c fde=[ 1b3cc]\n- 0xffffffffc967da68 (offset: 0x161780) -> 0x2d6b0 fde=[ 1b3f0]\n- 0xffffffffc967db08 (offset: 0x161820) -> 0x2d6d4 fde=[ 1b414]\n- 0xffffffffc967db98 (offset: 0x1618b0) -> 0x2d6f8 fde=[ 1b438]\n- 0xffffffffc967dc38 (offset: 0x161950) -> 0x2d71c fde=[ 1b45c]\n- 0xffffffffc967dcc8 (offset: 0x1619e0) -> 0x2d740 fde=[ 1b480]\n- 0xffffffffc967dd68 (offset: 0x161a80) -> 0x2d764 fde=[ 1b4a4]\n- 0xffffffffc967ddf8 (offset: 0x161b10) -> 0x2d788 fde=[ 1b4c8]\n- 0xffffffffc967e288 (offset: 0x161fa0) -> 0x2d7ac fde=[ 1b4ec]\n- 0xffffffffc967e2b8 (offset: 0x161fd0) -> 0x2d2c0 fde=[ 1b000]\n- 0xffffffffc967e338 (offset: 0x162050) -> 0x2d7c4 fde=[ 1b504]\n- 0xffffffffc967f478 (offset: 0x163190) -> 0x2d344 fde=[ 1b084]\n- 0xffffffffc967f4f8 (offset: 0x163210) -> 0x2d9a0 fde=[ 1b6e0]\n- 0xffffffffc9680638 (offset: 0x164350) -> 0x2d3c8 fde=[ 1b108]\n- 0xffffffffc96806b8 (offset: 0x1643d0) -> 0x2db7c fde=[ 1b8bc]\n- 0xffffffffc96817f8 (offset: 0x165510) -> 0x2d44c fde=[ 1b18c]\n- 0xffffffffc9681878 (offset: 0x165590) -> 0x2dd58 fde=[ 1ba98]\n- 0xffffffffc96829b8 (offset: 0x1666d0) -> 0x2d4d0 fde=[ 1b210]\n- 0xffffffffc9682a38 (offset: 0x166750) -> 0x2df34 fde=[ 1bc74]\n- 0xffffffffc9683b78 (offset: 0x167890) -> 0x2d554 fde=[ 1b294]\n- 0xffffffffc9683bf8 (offset: 0x167910) -> 0x2e110 fde=[ 1be50]\n- 0xffffffffc9684d38 (offset: 0x168a50) -> 0x2e32c fde=[ 1c06c]\n- 0xffffffffc9685008 (offset: 0x168d20) -> 0x2e350 fde=[ 1c090]\n- 0xffffffffc96852d8 (offset: 0x168ff0) -> 0x2e3b0 fde=[ 1c0f0]\n- 0xffffffffc96855a8 (offset: 0x1692c0) -> 0x2e3d4 fde=[ 1c114]\n- 0xffffffffc9685878 (offset: 0x169590) -> 0x2e434 fde=[ 1c174]\n- 0xffffffffc9685b48 (offset: 0x169860) -> 0x2e458 fde=[ 1c198]\n- 0xffffffffc9685e18 (offset: 0x169b30) -> 0x2e4b8 fde=[ 1c1f8]\n- 0xffffffffc96860e8 (offset: 0x169e00) -> 0x2e4dc fde=[ 1c21c]\n- 0xffffffffc96863b8 (offset: 0x16a0d0) -> 0x2e53c fde=[ 1c27c]\n- 0xffffffffc9686688 (offset: 0x16a3a0) -> 0x2e560 fde=[ 1c2a0]\n- 0xffffffffc9686958 (offset: 0x16a670) -> 0x2e5c0 fde=[ 1c300]\n- 0xffffffffc9686c28 (offset: 0x16a940) -> 0x2e5e4 fde=[ 1c324]\n- 0xffffffffc9686ef8 (offset: 0x16ac10) -> 0x2e608 fde=[ 1c348]\n- 0xffffffffc9686f98 (offset: 0x16acb0) -> 0x2e62c fde=[ 1c36c]\n- 0xffffffffc9687028 (offset: 0x16ad40) -> 0x2e650 fde=[ 1c390]\n- 0xffffffffc96870c8 (offset: 0x16ade0) -> 0x2e674 fde=[ 1c3b4]\n- 0xffffffffc9687158 (offset: 0x16ae70) -> 0x2e698 fde=[ 1c3d8]\n- 0xffffffffc96871f8 (offset: 0x16af10) -> 0x2e6bc fde=[ 1c3fc]\n- 0xffffffffc9687288 (offset: 0x16afa0) -> 0x2e6e0 fde=[ 1c420]\n- 0xffffffffc9687328 (offset: 0x16b040) -> 0x2e704 fde=[ 1c444]\n- 0xffffffffc96873b8 (offset: 0x16b0d0) -> 0x2e728 fde=[ 1c468]\n- 0xffffffffc9687458 (offset: 0x16b170) -> 0x2e74c fde=[ 1c48c]\n- 0xffffffffc96874e8 (offset: 0x16b200) -> 0x2e770 fde=[ 1c4b0]\n- 0xffffffffc9687588 (offset: 0x16b2a0) -> 0x2e794 fde=[ 1c4d4]\n- 0xffffffffc9687618 (offset: 0x16b330) -> 0x2e7b8 fde=[ 1c4f8]\n- 0xffffffffc9687aa8 (offset: 0x16b7c0) -> 0x2e7dc fde=[ 1c51c]\n- 0xffffffffc9687ad8 (offset: 0x16b7f0) -> 0x2e2f0 fde=[ 1c030]\n- 0xffffffffc9687b58 (offset: 0x16b870) -> 0x2e7f4 fde=[ 1c534]\n- 0xffffffffc9688c98 (offset: 0x16c9b0) -> 0x2e374 fde=[ 1c0b4]\n- 0xffffffffc9688d18 (offset: 0x16ca30) -> 0x2e9d0 fde=[ 1c710]\n- 0xffffffffc9689e58 (offset: 0x16db70) -> 0x2e3f8 fde=[ 1c138]\n- 0xffffffffc9689ed8 (offset: 0x16dbf0) -> 0x2ebac fde=[ 1c8ec]\n- 0xffffffffc968b018 (offset: 0x16ed30) -> 0x2e47c fde=[ 1c1bc]\n- 0xffffffffc968b098 (offset: 0x16edb0) -> 0x2ed88 fde=[ 1cac8]\n- 0xffffffffc968c1d8 (offset: 0x16fef0) -> 0x2e500 fde=[ 1c240]\n- 0xffffffffc968c258 (offset: 0x16ff70) -> 0x2ef64 fde=[ 1cca4]\n- 0xffffffffc968d398 (offset: 0x1710b0) -> 0x2e584 fde=[ 1c2c4]\n- 0xffffffffc968d418 (offset: 0x171130) -> 0x2f140 fde=[ 1ce80]\n- 0xffffffffc968e558 (offset: 0x172270) -> 0x2f35c fde=[ 1d09c]\n- 0xffffffffc968e828 (offset: 0x172540) -> 0x2f380 fde=[ 1d0c0]\n- 0xffffffffc968eaf8 (offset: 0x172810) -> 0x2f3e0 fde=[ 1d120]\n- 0xffffffffc968edc8 (offset: 0x172ae0) -> 0x2f404 fde=[ 1d144]\n- 0xffffffffc968f098 (offset: 0x172db0) -> 0x2f464 fde=[ 1d1a4]\n- 0xffffffffc968f368 (offset: 0x173080) -> 0x2f488 fde=[ 1d1c8]\n- 0xffffffffc968f638 (offset: 0x173350) -> 0x2f4e8 fde=[ 1d228]\n- 0xffffffffc968f908 (offset: 0x173620) -> 0x2f50c fde=[ 1d24c]\n- 0xffffffffc968fbd8 (offset: 0x1738f0) -> 0x2f56c fde=[ 1d2ac]\n- 0xffffffffc968fea8 (offset: 0x173bc0) -> 0x2f590 fde=[ 1d2d0]\n- 0xffffffffc9690178 (offset: 0x173e90) -> 0x2f5f0 fde=[ 1d330]\n- 0xffffffffc9690448 (offset: 0x174160) -> 0x2f614 fde=[ 1d354]\n- 0xffffffffc9690718 (offset: 0x174430) -> 0x2f638 fde=[ 1d378]\n- 0xffffffffc96907b8 (offset: 0x1744d0) -> 0x2f65c fde=[ 1d39c]\n- 0xffffffffc9690848 (offset: 0x174560) -> 0x2f680 fde=[ 1d3c0]\n- 0xffffffffc96908e8 (offset: 0x174600) -> 0x2f6a4 fde=[ 1d3e4]\n- 0xffffffffc9690978 (offset: 0x174690) -> 0x2f6c8 fde=[ 1d408]\n- 0xffffffffc9690a18 (offset: 0x174730) -> 0x2f6ec fde=[ 1d42c]\n- 0xffffffffc9690aa8 (offset: 0x1747c0) -> 0x2f710 fde=[ 1d450]\n- 0xffffffffc9690b48 (offset: 0x174860) -> 0x2f734 fde=[ 1d474]\n- 0xffffffffc9690bd8 (offset: 0x1748f0) -> 0x2f758 fde=[ 1d498]\n- 0xffffffffc9690c78 (offset: 0x174990) -> 0x2f77c fde=[ 1d4bc]\n- 0xffffffffc9690d08 (offset: 0x174a20) -> 0x2f7a0 fde=[ 1d4e0]\n- 0xffffffffc9690da8 (offset: 0x174ac0) -> 0x2f7c4 fde=[ 1d504]\n- 0xffffffffc9690e38 (offset: 0x174b50) -> 0x2f7e8 fde=[ 1d528]\n- 0xffffffffc96912c8 (offset: 0x174fe0) -> 0x2f80c fde=[ 1d54c]\n- 0xffffffffc96912f8 (offset: 0x175010) -> 0x2f320 fde=[ 1d060]\n- 0xffffffffc9691378 (offset: 0x175090) -> 0x2f824 fde=[ 1d564]\n- 0xffffffffc96924b8 (offset: 0x1761d0) -> 0x2f3a4 fde=[ 1d0e4]\n- 0xffffffffc9692538 (offset: 0x176250) -> 0x2fa00 fde=[ 1d740]\n- 0xffffffffc9693678 (offset: 0x177390) -> 0x2f428 fde=[ 1d168]\n- 0xffffffffc96936f8 (offset: 0x177410) -> 0x2fbdc fde=[ 1d91c]\n- 0xffffffffc9694838 (offset: 0x178550) -> 0x2f4ac fde=[ 1d1ec]\n- 0xffffffffc96948b8 (offset: 0x1785d0) -> 0x2fdb8 fde=[ 1daf8]\n- 0xffffffffc96959f8 (offset: 0x179710) -> 0x2f530 fde=[ 1d270]\n- 0xffffffffc9695a78 (offset: 0x179790) -> 0x2ff94 fde=[ 1dcd4]\n- 0xffffffffc9696bb8 (offset: 0x17a8d0) -> 0x2f5b4 fde=[ 1d2f4]\n- 0xffffffffc9696c38 (offset: 0x17a950) -> 0x30170 fde=[ 1deb0]\n- 0xffffffffc9697d78 (offset: 0x17ba90) -> 0x3038c fde=[ 1e0cc]\n- 0xffffffffc9698048 (offset: 0x17bd60) -> 0x303b0 fde=[ 1e0f0]\n- 0xffffffffc9698318 (offset: 0x17c030) -> 0x30410 fde=[ 1e150]\n- 0xffffffffc96985e8 (offset: 0x17c300) -> 0x30434 fde=[ 1e174]\n- 0xffffffffc96988b8 (offset: 0x17c5d0) -> 0x30494 fde=[ 1e1d4]\n- 0xffffffffc9698b88 (offset: 0x17c8a0) -> 0x304b8 fde=[ 1e1f8]\n- 0xffffffffc9698e58 (offset: 0x17cb70) -> 0x30518 fde=[ 1e258]\n- 0xffffffffc9699128 (offset: 0x17ce40) -> 0x3053c fde=[ 1e27c]\n- 0xffffffffc96993f8 (offset: 0x17d110) -> 0x3059c fde=[ 1e2dc]\n- 0xffffffffc96996c8 (offset: 0x17d3e0) -> 0x305c0 fde=[ 1e300]\n- 0xffffffffc9699998 (offset: 0x17d6b0) -> 0x30620 fde=[ 1e360]\n- 0xffffffffc9699c68 (offset: 0x17d980) -> 0x30644 fde=[ 1e384]\n- 0xffffffffc9699f38 (offset: 0x17dc50) -> 0x30668 fde=[ 1e3a8]\n- 0xffffffffc9699fd8 (offset: 0x17dcf0) -> 0x3068c fde=[ 1e3cc]\n- 0xffffffffc969a068 (offset: 0x17dd80) -> 0x306b0 fde=[ 1e3f0]\n- 0xffffffffc969a108 (offset: 0x17de20) -> 0x306d4 fde=[ 1e414]\n- 0xffffffffc969a198 (offset: 0x17deb0) -> 0x306f8 fde=[ 1e438]\n- 0xffffffffc969a238 (offset: 0x17df50) -> 0x3071c fde=[ 1e45c]\n- 0xffffffffc969a2c8 (offset: 0x17dfe0) -> 0x30740 fde=[ 1e480]\n- 0xffffffffc969a368 (offset: 0x17e080) -> 0x30764 fde=[ 1e4a4]\n- 0xffffffffc969a3f8 (offset: 0x17e110) -> 0x30788 fde=[ 1e4c8]\n- 0xffffffffc969a498 (offset: 0x17e1b0) -> 0x307ac fde=[ 1e4ec]\n- 0xffffffffc969a528 (offset: 0x17e240) -> 0x307d0 fde=[ 1e510]\n- 0xffffffffc969a5c8 (offset: 0x17e2e0) -> 0x307f4 fde=[ 1e534]\n- 0xffffffffc969a658 (offset: 0x17e370) -> 0x30818 fde=[ 1e558]\n- 0xffffffffc969aae8 (offset: 0x17e800) -> 0x3083c fde=[ 1e57c]\n- 0xffffffffc969ab18 (offset: 0x17e830) -> 0x30350 fde=[ 1e090]\n- 0xffffffffc969ab98 (offset: 0x17e8b0) -> 0x30854 fde=[ 1e594]\n- 0xffffffffc969bce8 (offset: 0x17fa00) -> 0x303d4 fde=[ 1e114]\n- 0xffffffffc969bd68 (offset: 0x17fa80) -> 0x30a30 fde=[ 1e770]\n- 0xffffffffc969ceb8 (offset: 0x180bd0) -> 0x30458 fde=[ 1e198]\n- 0xffffffffc969cf38 (offset: 0x180c50) -> 0x30c0c fde=[ 1e94c]\n- 0xffffffffc969e088 (offset: 0x181da0) -> 0x304dc fde=[ 1e21c]\n- 0xffffffffc969e108 (offset: 0x181e20) -> 0x30de8 fde=[ 1eb28]\n- 0xffffffffc969f258 (offset: 0x182f70) -> 0x30560 fde=[ 1e2a0]\n- 0xffffffffc969f2d8 (offset: 0x182ff0) -> 0x30fc4 fde=[ 1ed04]\n- 0xffffffffc96a0428 (offset: 0x184140) -> 0x305e4 fde=[ 1e324]\n- 0xffffffffc96a04a8 (offset: 0x1841c0) -> 0x311a0 fde=[ 1eee0]\n- 0xffffffffc96a15f8 (offset: 0x185310) -> 0x313bc fde=[ 1f0fc]\n- 0xffffffffc96a18c8 (offset: 0x1855e0) -> 0x313e0 fde=[ 1f120]\n- 0xffffffffc96a1b98 (offset: 0x1858b0) -> 0x31440 fde=[ 1f180]\n- 0xffffffffc96a1e68 (offset: 0x185b80) -> 0x31464 fde=[ 1f1a4]\n- 0xffffffffc96a2138 (offset: 0x185e50) -> 0x314c4 fde=[ 1f204]\n- 0xffffffffc96a2408 (offset: 0x186120) -> 0x314e8 fde=[ 1f228]\n- 0xffffffffc96a26d8 (offset: 0x1863f0) -> 0x31548 fde=[ 1f288]\n- 0xffffffffc96a29a8 (offset: 0x1866c0) -> 0x3156c fde=[ 1f2ac]\n- 0xffffffffc96a2c78 (offset: 0x186990) -> 0x315cc fde=[ 1f30c]\n- 0xffffffffc96a2f48 (offset: 0x186c60) -> 0x315f0 fde=[ 1f330]\n- 0xffffffffc96a3218 (offset: 0x186f30) -> 0x31650 fde=[ 1f390]\n- 0xffffffffc96a34e8 (offset: 0x187200) -> 0x31674 fde=[ 1f3b4]\n- 0xffffffffc96a37b8 (offset: 0x1874d0) -> 0x31698 fde=[ 1f3d8]\n- 0xffffffffc96a3858 (offset: 0x187570) -> 0x316bc fde=[ 1f3fc]\n- 0xffffffffc96a38e8 (offset: 0x187600) -> 0x316e0 fde=[ 1f420]\n- 0xffffffffc96a3988 (offset: 0x1876a0) -> 0x31704 fde=[ 1f444]\n- 0xffffffffc96a3a18 (offset: 0x187730) -> 0x31728 fde=[ 1f468]\n- 0xffffffffc96a3ab8 (offset: 0x1877d0) -> 0x3174c fde=[ 1f48c]\n- 0xffffffffc96a3b48 (offset: 0x187860) -> 0x31770 fde=[ 1f4b0]\n- 0xffffffffc96a3be8 (offset: 0x187900) -> 0x31794 fde=[ 1f4d4]\n- 0xffffffffc96a3c78 (offset: 0x187990) -> 0x317b8 fde=[ 1f4f8]\n- 0xffffffffc96a3d18 (offset: 0x187a30) -> 0x317dc fde=[ 1f51c]\n- 0xffffffffc96a3da8 (offset: 0x187ac0) -> 0x31800 fde=[ 1f540]\n- 0xffffffffc96a3e48 (offset: 0x187b60) -> 0x31824 fde=[ 1f564]\n- 0xffffffffc96a3ed8 (offset: 0x187bf0) -> 0x31848 fde=[ 1f588]\n- 0xffffffffc96a4368 (offset: 0x188080) -> 0x3186c fde=[ 1f5ac]\n- 0xffffffffc96a4398 (offset: 0x1880b0) -> 0x31380 fde=[ 1f0c0]\n- 0xffffffffc96a4418 (offset: 0x188130) -> 0x31884 fde=[ 1f5c4]\n- 0xffffffffc96a5568 (offset: 0x189280) -> 0x31404 fde=[ 1f144]\n- 0xffffffffc96a55e8 (offset: 0x189300) -> 0x31a60 fde=[ 1f7a0]\n- 0xffffffffc96a6738 (offset: 0x18a450) -> 0x31488 fde=[ 1f1c8]\n- 0xffffffffc96a67b8 (offset: 0x18a4d0) -> 0x31c3c fde=[ 1f97c]\n- 0xffffffffc96a7908 (offset: 0x18b620) -> 0x3150c fde=[ 1f24c]\n- 0xffffffffc96a7988 (offset: 0x18b6a0) -> 0x31e18 fde=[ 1fb58]\n- 0xffffffffc96a8ad8 (offset: 0x18c7f0) -> 0x31590 fde=[ 1f2d0]\n- 0xffffffffc96a8b58 (offset: 0x18c870) -> 0x31ff4 fde=[ 1fd34]\n- 0xffffffffc96a9ca8 (offset: 0x18d9c0) -> 0x31614 fde=[ 1f354]\n- 0xffffffffc96a9d28 (offset: 0x18da40) -> 0x321d0 fde=[ 1ff10]\n- 0xffffffffc96aae78 (offset: 0x18eb90) -> 0x323b0 fde=[ 200f0]\n- 0xffffffffc96ab038 (offset: 0x18ed50) -> 0x323d4 fde=[ 20114]\n- 0xffffffffc96ab1f8 (offset: 0x18ef10) -> 0x323f8 fde=[ 20138]\n- 0xffffffffc96ab318 (offset: 0x18f030) -> 0x3241c fde=[ 2015c]\n- 0xffffffffc96ab438 (offset: 0x18f150) -> 0x32440 fde=[ 20180]\n- 0xffffffffc96ab5f8 (offset: 0x18f310) -> 0x32464 fde=[ 201a4]\n- 0xffffffffc96ab7b8 (offset: 0x18f4d0) -> 0x32488 fde=[ 201c8]\n- 0xffffffffc96ab8d8 (offset: 0x18f5f0) -> 0x324ac fde=[ 201ec]\n- 0xffffffffc96ab9f8 (offset: 0x18f710) -> 0x324d0 fde=[ 20210]\n- 0xffffffffc96abbb8 (offset: 0x18f8d0) -> 0x324f4 fde=[ 20234]\n- 0xffffffffc96abd78 (offset: 0x18fa90) -> 0x32518 fde=[ 20258]\n- 0xffffffffc96abe98 (offset: 0x18fbb0) -> 0x3253c fde=[ 2027c]\n- 0xffffffffc96abfb8 (offset: 0x18fcd0) -> 0x32560 fde=[ 202a0]\n- 0xffffffffc96ac178 (offset: 0x18fe90) -> 0x32584 fde=[ 202c4]\n- 0xffffffffc96ac338 (offset: 0x190050) -> 0x325a8 fde=[ 202e8]\n- 0xffffffffc96ac458 (offset: 0x190170) -> 0x325cc fde=[ 2030c]\n- 0xffffffffc96ac578 (offset: 0x190290) -> 0x325f0 fde=[ 20330]\n- 0xffffffffc96ac738 (offset: 0x190450) -> 0x32614 fde=[ 20354]\n- 0xffffffffc96ac8f8 (offset: 0x190610) -> 0x32638 fde=[ 20378]\n- 0xffffffffc96aca18 (offset: 0x190730) -> 0x3265c fde=[ 2039c]\n- 0xffffffffc96acb38 (offset: 0x190850) -> 0x32680 fde=[ 203c0]\n- 0xffffffffc96accf8 (offset: 0x190a10) -> 0x326a4 fde=[ 203e4]\n- 0xffffffffc96aceb8 (offset: 0x190bd0) -> 0x326c8 fde=[ 20408]\n- 0xffffffffc96acfd8 (offset: 0x190cf0) -> 0x326ec fde=[ 2042c]\n- 0xffffffffc96ad0f8 (offset: 0x190e10) -> 0x32710 fde=[ 20450]\n- 0xffffffffc96ad2b8 (offset: 0x190fd0) -> 0x32734 fde=[ 20474]\n- 0xffffffffc96ad478 (offset: 0x191190) -> 0x32758 fde=[ 20498]\n- 0xffffffffc96ad598 (offset: 0x1912b0) -> 0x3277c fde=[ 204bc]\n- 0xffffffffc96ad6b8 (offset: 0x1913d0) -> 0x327a0 fde=[ 204e0]\n- 0xffffffffc96ad878 (offset: 0x191590) -> 0x327c4 fde=[ 20504]\n- 0xffffffffc96ada38 (offset: 0x191750) -> 0x327e8 fde=[ 20528]\n- 0xffffffffc96adb58 (offset: 0x191870) -> 0x3280c fde=[ 2054c]\n- 0xffffffffc96adc78 (offset: 0x191990) -> 0x32830 fde=[ 20570]\n- 0xffffffffc96ade38 (offset: 0x191b50) -> 0x32854 fde=[ 20594]\n- 0xffffffffc96adff8 (offset: 0x191d10) -> 0x32878 fde=[ 205b8]\n- 0xffffffffc96ae118 (offset: 0x191e30) -> 0x3289c fde=[ 205dc]\n- 0xffffffffc96ae238 (offset: 0x191f50) -> 0x328c0 fde=[ 20600]\n- 0xffffffffc96ae3f8 (offset: 0x192110) -> 0x328e4 fde=[ 20624]\n- 0xffffffffc96ae5b8 (offset: 0x1922d0) -> 0x32908 fde=[ 20648]\n- 0xffffffffc96ae6d8 (offset: 0x1923f0) -> 0x3292c fde=[ 2066c]\n- 0xffffffffc96ae7f8 (offset: 0x192510) -> 0x32950 fde=[ 20690]\n- 0xffffffffc96ae9b8 (offset: 0x1926d0) -> 0x32974 fde=[ 206b4]\n- 0xffffffffc96aeb78 (offset: 0x192890) -> 0x32998 fde=[ 206d8]\n- 0xffffffffc96aec98 (offset: 0x1929b0) -> 0x329bc fde=[ 206fc]\n- 0xffffffffc96aedb8 (offset: 0x192ad0) -> 0x329e0 fde=[ 20720]\n- 0xffffffffc96aef78 (offset: 0x192c90) -> 0x32a04 fde=[ 20744]\n- 0xffffffffc96af138 (offset: 0x192e50) -> 0x32a28 fde=[ 20768]\n- 0xffffffffc96af258 (offset: 0x192f70) -> 0x32a4c fde=[ 2078c]\n- 0xffffffffc96af378 (offset: 0x193090) -> 0x32a70 fde=[ 207b0]\n- 0xffffffffc96af538 (offset: 0x193250) -> 0x32a94 fde=[ 207d4]\n- 0xffffffffc96af6f8 (offset: 0x193410) -> 0x32ab8 fde=[ 207f8]\n- 0xffffffffc96af818 (offset: 0x193530) -> 0x32adc fde=[ 2081c]\n- 0xffffffffc96af938 (offset: 0x193650) -> 0x32b00 fde=[ 20840]\n- 0xffffffffc96afaf8 (offset: 0x193810) -> 0x32b24 fde=[ 20864]\n- 0xffffffffc96afcb8 (offset: 0x1939d0) -> 0x32b48 fde=[ 20888]\n- 0xffffffffc96afdd8 (offset: 0x193af0) -> 0x32b6c fde=[ 208ac]\n- 0xffffffffc96afef8 (offset: 0x193c10) -> 0x32b90 fde=[ 208d0]\n- 0xffffffffc96b00b8 (offset: 0x193dd0) -> 0x32bb4 fde=[ 208f4]\n- 0xffffffffc96b0278 (offset: 0x193f90) -> 0x32bd8 fde=[ 20918]\n- 0xffffffffc96b0398 (offset: 0x1940b0) -> 0x32bfc fde=[ 2093c]\n- 0xffffffffc96b04b8 (offset: 0x1941d0) -> 0x32c20 fde=[ 20960]\n- 0xffffffffc96b0678 (offset: 0x194390) -> 0x32c44 fde=[ 20984]\n- 0xffffffffc96b0838 (offset: 0x194550) -> 0x32c68 fde=[ 209a8]\n- 0xffffffffc96b0958 (offset: 0x194670) -> 0x32c8c fde=[ 209cc]\n- 0xffffffffc96b0a78 (offset: 0x194790) -> 0x32cb0 fde=[ 209f0]\n- 0xffffffffc96b1748 (offset: 0x195460) -> 0x32cd4 fde=[ 20a14]\n- 0xffffffffc96b1778 (offset: 0x195490) -> 0x32cec fde=[ 20a2c]\n- 0xffffffffc96bbb68 (offset: 0x19f880) -> 0x34590 fde=[ 222d0]\n- 0xffffffffc96bbd28 (offset: 0x19fa40) -> 0x345b4 fde=[ 222f4]\n- 0xffffffffc96bbee8 (offset: 0x19fc00) -> 0x345d8 fde=[ 22318]\n- 0xffffffffc96bc008 (offset: 0x19fd20) -> 0x345fc fde=[ 2233c]\n- 0xffffffffc96bc128 (offset: 0x19fe40) -> 0x34620 fde=[ 22360]\n- 0xffffffffc96bc2e8 (offset: 0x1a0000) -> 0x34644 fde=[ 22384]\n- 0xffffffffc96bc4a8 (offset: 0x1a01c0) -> 0x34668 fde=[ 223a8]\n- 0xffffffffc96bc5c8 (offset: 0x1a02e0) -> 0x3468c fde=[ 223cc]\n- 0xffffffffc96bc6e8 (offset: 0x1a0400) -> 0x346b0 fde=[ 223f0]\n- 0xffffffffc96bc8a8 (offset: 0x1a05c0) -> 0x346d4 fde=[ 22414]\n- 0xffffffffc96bca68 (offset: 0x1a0780) -> 0x346f8 fde=[ 22438]\n- 0xffffffffc96bcb88 (offset: 0x1a08a0) -> 0x3471c fde=[ 2245c]\n- 0xffffffffc96bcca8 (offset: 0x1a09c0) -> 0x34740 fde=[ 22480]\n- 0xffffffffc96bce68 (offset: 0x1a0b80) -> 0x34764 fde=[ 224a4]\n- 0xffffffffc96bd028 (offset: 0x1a0d40) -> 0x34788 fde=[ 224c8]\n- 0xffffffffc96bd148 (offset: 0x1a0e60) -> 0x347ac fde=[ 224ec]\n- 0xffffffffc96bd268 (offset: 0x1a0f80) -> 0x347d0 fde=[ 22510]\n- 0xffffffffc96bd428 (offset: 0x1a1140) -> 0x347f4 fde=[ 22534]\n- 0xffffffffc96bd5e8 (offset: 0x1a1300) -> 0x34818 fde=[ 22558]\n- 0xffffffffc96bd708 (offset: 0x1a1420) -> 0x3483c fde=[ 2257c]\n- 0xffffffffc96bd828 (offset: 0x1a1540) -> 0x34860 fde=[ 225a0]\n- 0xffffffffc96bd9e8 (offset: 0x1a1700) -> 0x34884 fde=[ 225c4]\n- 0xffffffffc96bdba8 (offset: 0x1a18c0) -> 0x348a8 fde=[ 225e8]\n- 0xffffffffc96bdcc8 (offset: 0x1a19e0) -> 0x348cc fde=[ 2260c]\n- 0xffffffffc96bdde8 (offset: 0x1a1b00) -> 0x348f0 fde=[ 22630]\n- 0xffffffffc96bdfa8 (offset: 0x1a1cc0) -> 0x34914 fde=[ 22654]\n- 0xffffffffc96be168 (offset: 0x1a1e80) -> 0x34938 fde=[ 22678]\n- 0xffffffffc96be288 (offset: 0x1a1fa0) -> 0x3495c fde=[ 2269c]\n- 0xffffffffc96be3a8 (offset: 0x1a20c0) -> 0x34980 fde=[ 226c0]\n- 0xffffffffc96be568 (offset: 0x1a2280) -> 0x349a4 fde=[ 226e4]\n- 0xffffffffc96be728 (offset: 0x1a2440) -> 0x349c8 fde=[ 22708]\n- 0xffffffffc96be848 (offset: 0x1a2560) -> 0x349ec fde=[ 2272c]\n- 0xffffffffc96be968 (offset: 0x1a2680) -> 0x34a10 fde=[ 22750]\n- 0xffffffffc96beb28 (offset: 0x1a2840) -> 0x34a34 fde=[ 22774]\n- 0xffffffffc96bece8 (offset: 0x1a2a00) -> 0x34a58 fde=[ 22798]\n- 0xffffffffc96bee08 (offset: 0x1a2b20) -> 0x34a7c fde=[ 227bc]\n- 0xffffffffc96bef28 (offset: 0x1a2c40) -> 0x34aa0 fde=[ 227e0]\n- 0xffffffffc96bf0e8 (offset: 0x1a2e00) -> 0x34ac4 fde=[ 22804]\n- 0xffffffffc96bf2a8 (offset: 0x1a2fc0) -> 0x34ae8 fde=[ 22828]\n- 0xffffffffc96bf3c8 (offset: 0x1a30e0) -> 0x34b0c fde=[ 2284c]\n- 0xffffffffc96bf4e8 (offset: 0x1a3200) -> 0x34b30 fde=[ 22870]\n- 0xffffffffc96bf6a8 (offset: 0x1a33c0) -> 0x34b54 fde=[ 22894]\n- 0xffffffffc96bf868 (offset: 0x1a3580) -> 0x34b78 fde=[ 228b8]\n- 0xffffffffc96bf988 (offset: 0x1a36a0) -> 0x34b9c fde=[ 228dc]\n- 0xffffffffc96bfaa8 (offset: 0x1a37c0) -> 0x34bc0 fde=[ 22900]\n- 0xffffffffc96bfc68 (offset: 0x1a3980) -> 0x34be4 fde=[ 22924]\n- 0xffffffffc96bfe28 (offset: 0x1a3b40) -> 0x34c08 fde=[ 22948]\n- 0xffffffffc96bff48 (offset: 0x1a3c60) -> 0x34c2c fde=[ 2296c]\n- 0xffffffffc96c0068 (offset: 0x1a3d80) -> 0x34c50 fde=[ 22990]\n- 0xffffffffc96c0228 (offset: 0x1a3f40) -> 0x34c74 fde=[ 229b4]\n- 0xffffffffc96c03e8 (offset: 0x1a4100) -> 0x34c98 fde=[ 229d8]\n- 0xffffffffc96c0508 (offset: 0x1a4220) -> 0x34cbc fde=[ 229fc]\n- 0xffffffffc96c0628 (offset: 0x1a4340) -> 0x34ce0 fde=[ 22a20]\n- 0xffffffffc96c07e8 (offset: 0x1a4500) -> 0x34d04 fde=[ 22a44]\n- 0xffffffffc96c09a8 (offset: 0x1a46c0) -> 0x34d28 fde=[ 22a68]\n- 0xffffffffc96c0ac8 (offset: 0x1a47e0) -> 0x34d4c fde=[ 22a8c]\n- 0xffffffffc96c0be8 (offset: 0x1a4900) -> 0x34d70 fde=[ 22ab0]\n- 0xffffffffc96c0da8 (offset: 0x1a4ac0) -> 0x34d94 fde=[ 22ad4]\n- 0xffffffffc96c0f68 (offset: 0x1a4c80) -> 0x34db8 fde=[ 22af8]\n- 0xffffffffc96c1088 (offset: 0x1a4da0) -> 0x34ddc fde=[ 22b1c]\n- 0xffffffffc96c11a8 (offset: 0x1a4ec0) -> 0x34e00 fde=[ 22b40]\n- 0xffffffffc96c1368 (offset: 0x1a5080) -> 0x34e24 fde=[ 22b64]\n- 0xffffffffc96c1528 (offset: 0x1a5240) -> 0x34e48 fde=[ 22b88]\n- 0xffffffffc96c1648 (offset: 0x1a5360) -> 0x34e6c fde=[ 22bac]\n- 0xffffffffc96c1768 (offset: 0x1a5480) -> 0x34e90 fde=[ 22bd0]\n- 0xffffffffc96c2438 (offset: 0x1a6150) -> 0x34eb4 fde=[ 22bf4]\n- 0xffffffffc96c2468 (offset: 0x1a6180) -> 0x34ecc fde=[ 22c0c]\n- 0xffffffffc96cc858 (offset: 0x1b0570) -> 0x36770 fde=[ 244b0]\n- 0xffffffffc96cca18 (offset: 0x1b0730) -> 0x36794 fde=[ 244d4]\n- 0xffffffffc96ccbd8 (offset: 0x1b08f0) -> 0x367b8 fde=[ 244f8]\n- 0xffffffffc96cccf8 (offset: 0x1b0a10) -> 0x367dc fde=[ 2451c]\n- 0xffffffffc96cce18 (offset: 0x1b0b30) -> 0x36800 fde=[ 24540]\n- 0xffffffffc96ccfd8 (offset: 0x1b0cf0) -> 0x36824 fde=[ 24564]\n- 0xffffffffc96cd198 (offset: 0x1b0eb0) -> 0x36848 fde=[ 24588]\n- 0xffffffffc96cd2b8 (offset: 0x1b0fd0) -> 0x3686c fde=[ 245ac]\n- 0xffffffffc96cd3d8 (offset: 0x1b10f0) -> 0x36890 fde=[ 245d0]\n- 0xffffffffc96cd598 (offset: 0x1b12b0) -> 0x368b4 fde=[ 245f4]\n- 0xffffffffc96cd758 (offset: 0x1b1470) -> 0x368d8 fde=[ 24618]\n- 0xffffffffc96cd878 (offset: 0x1b1590) -> 0x368fc fde=[ 2463c]\n- 0xffffffffc96cd998 (offset: 0x1b16b0) -> 0x36920 fde=[ 24660]\n- 0xffffffffc96cdb58 (offset: 0x1b1870) -> 0x36944 fde=[ 24684]\n- 0xffffffffc96cdd18 (offset: 0x1b1a30) -> 0x36968 fde=[ 246a8]\n- 0xffffffffc96cde38 (offset: 0x1b1b50) -> 0x3698c fde=[ 246cc]\n- 0xffffffffc96cdf58 (offset: 0x1b1c70) -> 0x369b0 fde=[ 246f0]\n- 0xffffffffc96ce118 (offset: 0x1b1e30) -> 0x369d4 fde=[ 24714]\n- 0xffffffffc96ce2d8 (offset: 0x1b1ff0) -> 0x369f8 fde=[ 24738]\n- 0xffffffffc96ce3f8 (offset: 0x1b2110) -> 0x36a1c fde=[ 2475c]\n- 0xffffffffc96ce518 (offset: 0x1b2230) -> 0x36a40 fde=[ 24780]\n- 0xffffffffc96ce6d8 (offset: 0x1b23f0) -> 0x36a64 fde=[ 247a4]\n- 0xffffffffc96ce898 (offset: 0x1b25b0) -> 0x36a88 fde=[ 247c8]\n- 0xffffffffc96ce9b8 (offset: 0x1b26d0) -> 0x36aac fde=[ 247ec]\n- 0xffffffffc96cead8 (offset: 0x1b27f0) -> 0x36ad0 fde=[ 24810]\n- 0xffffffffc96cec98 (offset: 0x1b29b0) -> 0x36af4 fde=[ 24834]\n- 0xffffffffc96cee58 (offset: 0x1b2b70) -> 0x36b18 fde=[ 24858]\n- 0xffffffffc96cef78 (offset: 0x1b2c90) -> 0x36b3c fde=[ 2487c]\n- 0xffffffffc96cf098 (offset: 0x1b2db0) -> 0x36b60 fde=[ 248a0]\n- 0xffffffffc96cf258 (offset: 0x1b2f70) -> 0x36b84 fde=[ 248c4]\n- 0xffffffffc96cf418 (offset: 0x1b3130) -> 0x36ba8 fde=[ 248e8]\n- 0xffffffffc96cf538 (offset: 0x1b3250) -> 0x36bcc fde=[ 2490c]\n- 0xffffffffc96cf658 (offset: 0x1b3370) -> 0x36bf0 fde=[ 24930]\n- 0xffffffffc96cf818 (offset: 0x1b3530) -> 0x36c14 fde=[ 24954]\n- 0xffffffffc96cf9d8 (offset: 0x1b36f0) -> 0x36c38 fde=[ 24978]\n- 0xffffffffc96cfaf8 (offset: 0x1b3810) -> 0x36c5c fde=[ 2499c]\n- 0xffffffffc96cfc18 (offset: 0x1b3930) -> 0x36c80 fde=[ 249c0]\n- 0xffffffffc96cfdd8 (offset: 0x1b3af0) -> 0x36ca4 fde=[ 249e4]\n- 0xffffffffc96cff98 (offset: 0x1b3cb0) -> 0x36cc8 fde=[ 24a08]\n- 0xffffffffc96d00b8 (offset: 0x1b3dd0) -> 0x36cec fde=[ 24a2c]\n- 0xffffffffc96d01d8 (offset: 0x1b3ef0) -> 0x36d10 fde=[ 24a50]\n- 0xffffffffc96d0398 (offset: 0x1b40b0) -> 0x36d34 fde=[ 24a74]\n- 0xffffffffc96d0558 (offset: 0x1b4270) -> 0x36d58 fde=[ 24a98]\n- 0xffffffffc96d0678 (offset: 0x1b4390) -> 0x36d7c fde=[ 24abc]\n- 0xffffffffc96d0798 (offset: 0x1b44b0) -> 0x36da0 fde=[ 24ae0]\n- 0xffffffffc96d0958 (offset: 0x1b4670) -> 0x36dc4 fde=[ 24b04]\n- 0xffffffffc96d0b18 (offset: 0x1b4830) -> 0x36de8 fde=[ 24b28]\n- 0xffffffffc96d0c38 (offset: 0x1b4950) -> 0x36e0c fde=[ 24b4c]\n- 0xffffffffc96d0d58 (offset: 0x1b4a70) -> 0x36e30 fde=[ 24b70]\n- 0xffffffffc96d0f18 (offset: 0x1b4c30) -> 0x36e54 fde=[ 24b94]\n- 0xffffffffc96d10d8 (offset: 0x1b4df0) -> 0x36e78 fde=[ 24bb8]\n- 0xffffffffc96d11f8 (offset: 0x1b4f10) -> 0x36e9c fde=[ 24bdc]\n- 0xffffffffc96d1318 (offset: 0x1b5030) -> 0x36ec0 fde=[ 24c00]\n- 0xffffffffc96d14d8 (offset: 0x1b51f0) -> 0x36ee4 fde=[ 24c24]\n- 0xffffffffc96d1698 (offset: 0x1b53b0) -> 0x36f08 fde=[ 24c48]\n- 0xffffffffc96d17b8 (offset: 0x1b54d0) -> 0x36f2c fde=[ 24c6c]\n- 0xffffffffc96d18d8 (offset: 0x1b55f0) -> 0x36f50 fde=[ 24c90]\n- 0xffffffffc96d1a98 (offset: 0x1b57b0) -> 0x36f74 fde=[ 24cb4]\n- 0xffffffffc96d1c58 (offset: 0x1b5970) -> 0x36f98 fde=[ 24cd8]\n- 0xffffffffc96d1d78 (offset: 0x1b5a90) -> 0x36fbc fde=[ 24cfc]\n- 0xffffffffc96d1e98 (offset: 0x1b5bb0) -> 0x36fe0 fde=[ 24d20]\n- 0xffffffffc96d2058 (offset: 0x1b5d70) -> 0x37004 fde=[ 24d44]\n- 0xffffffffc96d2218 (offset: 0x1b5f30) -> 0x37028 fde=[ 24d68]\n- 0xffffffffc96d2338 (offset: 0x1b6050) -> 0x3704c fde=[ 24d8c]\n- 0xffffffffc96d2458 (offset: 0x1b6170) -> 0x37070 fde=[ 24db0]\n- 0xffffffffc96d3128 (offset: 0x1b6e40) -> 0x37094 fde=[ 24dd4]\n- 0xffffffffc96d3158 (offset: 0x1b6e70) -> 0x370ac fde=[ 24dec]\n- 0xffffffffc96dd548 (offset: 0x1c1260) -> 0x38950 fde=[ 26690]\n- 0xffffffffc96dd708 (offset: 0x1c1420) -> 0x38974 fde=[ 266b4]\n- 0xffffffffc96dd8c8 (offset: 0x1c15e0) -> 0x38998 fde=[ 266d8]\n- 0xffffffffc96dd9e8 (offset: 0x1c1700) -> 0x389bc fde=[ 266fc]\n- 0xffffffffc96ddb08 (offset: 0x1c1820) -> 0x389e0 fde=[ 26720]\n- 0xffffffffc96ddcc8 (offset: 0x1c19e0) -> 0x38a04 fde=[ 26744]\n- 0xffffffffc96dde88 (offset: 0x1c1ba0) -> 0x38a28 fde=[ 26768]\n- 0xffffffffc96ddfa8 (offset: 0x1c1cc0) -> 0x38a4c fde=[ 2678c]\n- 0xffffffffc96de0c8 (offset: 0x1c1de0) -> 0x38a70 fde=[ 267b0]\n- 0xffffffffc96de288 (offset: 0x1c1fa0) -> 0x38a94 fde=[ 267d4]\n- 0xffffffffc96de448 (offset: 0x1c2160) -> 0x38ab8 fde=[ 267f8]\n- 0xffffffffc96de568 (offset: 0x1c2280) -> 0x38adc fde=[ 2681c]\n- 0xffffffffc96de688 (offset: 0x1c23a0) -> 0x38b00 fde=[ 26840]\n- 0xffffffffc96de848 (offset: 0x1c2560) -> 0x38b24 fde=[ 26864]\n- 0xffffffffc96dea08 (offset: 0x1c2720) -> 0x38b48 fde=[ 26888]\n- 0xffffffffc96deb28 (offset: 0x1c2840) -> 0x38b6c fde=[ 268ac]\n- 0xffffffffc96dec48 (offset: 0x1c2960) -> 0x38b90 fde=[ 268d0]\n- 0xffffffffc96dee08 (offset: 0x1c2b20) -> 0x38bb4 fde=[ 268f4]\n- 0xffffffffc96defc8 (offset: 0x1c2ce0) -> 0x38bd8 fde=[ 26918]\n- 0xffffffffc96df0e8 (offset: 0x1c2e00) -> 0x38bfc fde=[ 2693c]\n- 0xffffffffc96df208 (offset: 0x1c2f20) -> 0x38c20 fde=[ 26960]\n- 0xffffffffc96df3c8 (offset: 0x1c30e0) -> 0x38c44 fde=[ 26984]\n- 0xffffffffc96df588 (offset: 0x1c32a0) -> 0x38c68 fde=[ 269a8]\n- 0xffffffffc96df6a8 (offset: 0x1c33c0) -> 0x38c8c fde=[ 269cc]\n- 0xffffffffc96df7c8 (offset: 0x1c34e0) -> 0x38cb0 fde=[ 269f0]\n- 0xffffffffc96df988 (offset: 0x1c36a0) -> 0x38cd4 fde=[ 26a14]\n- 0xffffffffc96dfb48 (offset: 0x1c3860) -> 0x38cf8 fde=[ 26a38]\n- 0xffffffffc96dfc68 (offset: 0x1c3980) -> 0x38d1c fde=[ 26a5c]\n- 0xffffffffc96dfd88 (offset: 0x1c3aa0) -> 0x38d40 fde=[ 26a80]\n- 0xffffffffc96dff48 (offset: 0x1c3c60) -> 0x38d64 fde=[ 26aa4]\n- 0xffffffffc96e0108 (offset: 0x1c3e20) -> 0x38d88 fde=[ 26ac8]\n- 0xffffffffc96e0228 (offset: 0x1c3f40) -> 0x38dac fde=[ 26aec]\n- 0xffffffffc96e0348 (offset: 0x1c4060) -> 0x38dd0 fde=[ 26b10]\n- 0xffffffffc96e0508 (offset: 0x1c4220) -> 0x38df4 fde=[ 26b34]\n- 0xffffffffc96e06c8 (offset: 0x1c43e0) -> 0x38e18 fde=[ 26b58]\n- 0xffffffffc96e07e8 (offset: 0x1c4500) -> 0x38e3c fde=[ 26b7c]\n- 0xffffffffc96e0908 (offset: 0x1c4620) -> 0x38e60 fde=[ 26ba0]\n- 0xffffffffc96e0ac8 (offset: 0x1c47e0) -> 0x38e84 fde=[ 26bc4]\n- 0xffffffffc96e0c88 (offset: 0x1c49a0) -> 0x38ea8 fde=[ 26be8]\n- 0xffffffffc96e0da8 (offset: 0x1c4ac0) -> 0x38ecc fde=[ 26c0c]\n- 0xffffffffc96e0ec8 (offset: 0x1c4be0) -> 0x38ef0 fde=[ 26c30]\n- 0xffffffffc96e1088 (offset: 0x1c4da0) -> 0x38f14 fde=[ 26c54]\n- 0xffffffffc96e1248 (offset: 0x1c4f60) -> 0x38f38 fde=[ 26c78]\n- 0xffffffffc96e1368 (offset: 0x1c5080) -> 0x38f5c fde=[ 26c9c]\n- 0xffffffffc96e1488 (offset: 0x1c51a0) -> 0x38f80 fde=[ 26cc0]\n- 0xffffffffc96e1648 (offset: 0x1c5360) -> 0x38fa4 fde=[ 26ce4]\n- 0xffffffffc96e1808 (offset: 0x1c5520) -> 0x38fc8 fde=[ 26d08]\n- 0xffffffffc96e1928 (offset: 0x1c5640) -> 0x38fec fde=[ 26d2c]\n- 0xffffffffc96e1a48 (offset: 0x1c5760) -> 0x39010 fde=[ 26d50]\n- 0xffffffffc96e1c08 (offset: 0x1c5920) -> 0x39034 fde=[ 26d74]\n- 0xffffffffc96e1dc8 (offset: 0x1c5ae0) -> 0x39058 fde=[ 26d98]\n- 0xffffffffc96e1ee8 (offset: 0x1c5c00) -> 0x3907c fde=[ 26dbc]\n- 0xffffffffc96e2008 (offset: 0x1c5d20) -> 0x390a0 fde=[ 26de0]\n- 0xffffffffc96e21c8 (offset: 0x1c5ee0) -> 0x390c4 fde=[ 26e04]\n- 0xffffffffc96e2388 (offset: 0x1c60a0) -> 0x390e8 fde=[ 26e28]\n- 0xffffffffc96e24a8 (offset: 0x1c61c0) -> 0x3910c fde=[ 26e4c]\n- 0xffffffffc96e25c8 (offset: 0x1c62e0) -> 0x39130 fde=[ 26e70]\n- 0xffffffffc96e2788 (offset: 0x1c64a0) -> 0x39154 fde=[ 26e94]\n- 0xffffffffc96e2948 (offset: 0x1c6660) -> 0x39178 fde=[ 26eb8]\n- 0xffffffffc96e2a68 (offset: 0x1c6780) -> 0x3919c fde=[ 26edc]\n- 0xffffffffc96e2b88 (offset: 0x1c68a0) -> 0x391c0 fde=[ 26f00]\n- 0xffffffffc96e2d48 (offset: 0x1c6a60) -> 0x391e4 fde=[ 26f24]\n- 0xffffffffc96e2f08 (offset: 0x1c6c20) -> 0x39208 fde=[ 26f48]\n- 0xffffffffc96e3028 (offset: 0x1c6d40) -> 0x3922c fde=[ 26f6c]\n- 0xffffffffc96e3148 (offset: 0x1c6e60) -> 0x39250 fde=[ 26f90]\n- 0xffffffffc96e3e18 (offset: 0x1c7b30) -> 0x39274 fde=[ 26fb4]\n- 0xffffffffc96e3e48 (offset: 0x1c7b60) -> 0x3928c fde=[ 26fcc]\n- 0xffffffffc96ee238 (offset: 0x1d1f50) -> 0x3ab30 fde=[ 28870]\n- 0xffffffffc96ee3f8 (offset: 0x1d2110) -> 0x3ab54 fde=[ 28894]\n- 0xffffffffc96ee5b8 (offset: 0x1d22d0) -> 0x3ab78 fde=[ 288b8]\n- 0xffffffffc96ee6d8 (offset: 0x1d23f0) -> 0x3ab9c fde=[ 288dc]\n- 0xffffffffc96ee7f8 (offset: 0x1d2510) -> 0x3abc0 fde=[ 28900]\n- 0xffffffffc96ee9b8 (offset: 0x1d26d0) -> 0x3abe4 fde=[ 28924]\n- 0xffffffffc96eeb78 (offset: 0x1d2890) -> 0x3ac08 fde=[ 28948]\n- 0xffffffffc96eec98 (offset: 0x1d29b0) -> 0x3ac2c fde=[ 2896c]\n- 0xffffffffc96eedb8 (offset: 0x1d2ad0) -> 0x3ac50 fde=[ 28990]\n- 0xffffffffc96eef78 (offset: 0x1d2c90) -> 0x3ac74 fde=[ 289b4]\n- 0xffffffffc96ef138 (offset: 0x1d2e50) -> 0x3ac98 fde=[ 289d8]\n- 0xffffffffc96ef258 (offset: 0x1d2f70) -> 0x3acbc fde=[ 289fc]\n- 0xffffffffc96ef378 (offset: 0x1d3090) -> 0x3ace0 fde=[ 28a20]\n- 0xffffffffc96ef538 (offset: 0x1d3250) -> 0x3ad04 fde=[ 28a44]\n- 0xffffffffc96ef6f8 (offset: 0x1d3410) -> 0x3ad28 fde=[ 28a68]\n- 0xffffffffc96ef818 (offset: 0x1d3530) -> 0x3ad4c fde=[ 28a8c]\n- 0xffffffffc96ef938 (offset: 0x1d3650) -> 0x3ad70 fde=[ 28ab0]\n- 0xffffffffc96efaf8 (offset: 0x1d3810) -> 0x3ad94 fde=[ 28ad4]\n- 0xffffffffc96efcb8 (offset: 0x1d39d0) -> 0x3adb8 fde=[ 28af8]\n- 0xffffffffc96efdd8 (offset: 0x1d3af0) -> 0x3addc fde=[ 28b1c]\n- 0xffffffffc96efef8 (offset: 0x1d3c10) -> 0x3ae00 fde=[ 28b40]\n- 0xffffffffc96f00b8 (offset: 0x1d3dd0) -> 0x3ae24 fde=[ 28b64]\n- 0xffffffffc96f0278 (offset: 0x1d3f90) -> 0x3ae48 fde=[ 28b88]\n- 0xffffffffc96f0398 (offset: 0x1d40b0) -> 0x3ae6c fde=[ 28bac]\n- 0xffffffffc96f04b8 (offset: 0x1d41d0) -> 0x3ae90 fde=[ 28bd0]\n- 0xffffffffc96f0678 (offset: 0x1d4390) -> 0x3aeb4 fde=[ 28bf4]\n- 0xffffffffc96f0838 (offset: 0x1d4550) -> 0x3aed8 fde=[ 28c18]\n- 0xffffffffc96f0958 (offset: 0x1d4670) -> 0x3aefc fde=[ 28c3c]\n- 0xffffffffc96f0a78 (offset: 0x1d4790) -> 0x3af20 fde=[ 28c60]\n- 0xffffffffc96f0c38 (offset: 0x1d4950) -> 0x3af44 fde=[ 28c84]\n- 0xffffffffc96f0df8 (offset: 0x1d4b10) -> 0x3af68 fde=[ 28ca8]\n- 0xffffffffc96f0f18 (offset: 0x1d4c30) -> 0x3af8c fde=[ 28ccc]\n- 0xffffffffc96f1038 (offset: 0x1d4d50) -> 0x3afb0 fde=[ 28cf0]\n- 0xffffffffc96f11f8 (offset: 0x1d4f10) -> 0x3afd4 fde=[ 28d14]\n- 0xffffffffc96f13b8 (offset: 0x1d50d0) -> 0x3aff8 fde=[ 28d38]\n- 0xffffffffc96f14d8 (offset: 0x1d51f0) -> 0x3b01c fde=[ 28d5c]\n- 0xffffffffc96f15f8 (offset: 0x1d5310) -> 0x3b040 fde=[ 28d80]\n- 0xffffffffc96f17b8 (offset: 0x1d54d0) -> 0x3b064 fde=[ 28da4]\n- 0xffffffffc96f1978 (offset: 0x1d5690) -> 0x3b088 fde=[ 28dc8]\n- 0xffffffffc96f1a98 (offset: 0x1d57b0) -> 0x3b0ac fde=[ 28dec]\n- 0xffffffffc96f1bb8 (offset: 0x1d58d0) -> 0x3b0d0 fde=[ 28e10]\n- 0xffffffffc96f1d78 (offset: 0x1d5a90) -> 0x3b0f4 fde=[ 28e34]\n- 0xffffffffc96f1f38 (offset: 0x1d5c50) -> 0x3b118 fde=[ 28e58]\n- 0xffffffffc96f2058 (offset: 0x1d5d70) -> 0x3b13c fde=[ 28e7c]\n- 0xffffffffc96f2178 (offset: 0x1d5e90) -> 0x3b160 fde=[ 28ea0]\n- 0xffffffffc96f2338 (offset: 0x1d6050) -> 0x3b184 fde=[ 28ec4]\n- 0xffffffffc96f24f8 (offset: 0x1d6210) -> 0x3b1a8 fde=[ 28ee8]\n- 0xffffffffc96f2618 (offset: 0x1d6330) -> 0x3b1cc fde=[ 28f0c]\n- 0xffffffffc96f2738 (offset: 0x1d6450) -> 0x3b1f0 fde=[ 28f30]\n- 0xffffffffc96f28f8 (offset: 0x1d6610) -> 0x3b214 fde=[ 28f54]\n- 0xffffffffc96f2ab8 (offset: 0x1d67d0) -> 0x3b238 fde=[ 28f78]\n- 0xffffffffc96f2bd8 (offset: 0x1d68f0) -> 0x3b25c fde=[ 28f9c]\n- 0xffffffffc96f2cf8 (offset: 0x1d6a10) -> 0x3b280 fde=[ 28fc0]\n- 0xffffffffc96f2eb8 (offset: 0x1d6bd0) -> 0x3b2a4 fde=[ 28fe4]\n- 0xffffffffc96f3078 (offset: 0x1d6d90) -> 0x3b2c8 fde=[ 29008]\n- 0xffffffffc96f3198 (offset: 0x1d6eb0) -> 0x3b2ec fde=[ 2902c]\n- 0xffffffffc96f32b8 (offset: 0x1d6fd0) -> 0x3b310 fde=[ 29050]\n- 0xffffffffc96f3478 (offset: 0x1d7190) -> 0x3b334 fde=[ 29074]\n- 0xffffffffc96f3638 (offset: 0x1d7350) -> 0x3b358 fde=[ 29098]\n- 0xffffffffc96f3758 (offset: 0x1d7470) -> 0x3b37c fde=[ 290bc]\n- 0xffffffffc96f3878 (offset: 0x1d7590) -> 0x3b3a0 fde=[ 290e0]\n- 0xffffffffc96f3a38 (offset: 0x1d7750) -> 0x3b3c4 fde=[ 29104]\n- 0xffffffffc96f3bf8 (offset: 0x1d7910) -> 0x3b3e8 fde=[ 29128]\n- 0xffffffffc96f3d18 (offset: 0x1d7a30) -> 0x3b40c fde=[ 2914c]\n- 0xffffffffc96f3e38 (offset: 0x1d7b50) -> 0x3b430 fde=[ 29170]\n- 0xffffffffc96f4b08 (offset: 0x1d8820) -> 0x3b454 fde=[ 29194]\n- 0xffffffffc96f4b38 (offset: 0x1d8850) -> 0x3b46c fde=[ 291ac]\n- 0xffffffffc96fef28 (offset: 0x1e2c40) -> 0x3cd10 fde=[ 2aa50]\n- 0xffffffffc96ff0e8 (offset: 0x1e2e00) -> 0x3cd34 fde=[ 2aa74]\n- 0xffffffffc96ff2a8 (offset: 0x1e2fc0) -> 0x3cd58 fde=[ 2aa98]\n- 0xffffffffc96ff3c8 (offset: 0x1e30e0) -> 0x3cd7c fde=[ 2aabc]\n- 0xffffffffc96ff4e8 (offset: 0x1e3200) -> 0x3cda0 fde=[ 2aae0]\n- 0xffffffffc96ff6a8 (offset: 0x1e33c0) -> 0x3cdc4 fde=[ 2ab04]\n- 0xffffffffc96ff868 (offset: 0x1e3580) -> 0x3cde8 fde=[ 2ab28]\n- 0xffffffffc96ff988 (offset: 0x1e36a0) -> 0x3ce0c fde=[ 2ab4c]\n- 0xffffffffc96ffaa8 (offset: 0x1e37c0) -> 0x3ce30 fde=[ 2ab70]\n- 0xffffffffc96ffc68 (offset: 0x1e3980) -> 0x3ce54 fde=[ 2ab94]\n- 0xffffffffc96ffe28 (offset: 0x1e3b40) -> 0x3ce78 fde=[ 2abb8]\n- 0xffffffffc96fff48 (offset: 0x1e3c60) -> 0x3ce9c fde=[ 2abdc]\n- 0xffffffffc9700068 (offset: 0x1e3d80) -> 0x3cec0 fde=[ 2ac00]\n- 0xffffffffc9700228 (offset: 0x1e3f40) -> 0x3cee4 fde=[ 2ac24]\n- 0xffffffffc97003e8 (offset: 0x1e4100) -> 0x3cf08 fde=[ 2ac48]\n- 0xffffffffc9700508 (offset: 0x1e4220) -> 0x3cf2c fde=[ 2ac6c]\n- 0xffffffffc9700628 (offset: 0x1e4340) -> 0x3cf50 fde=[ 2ac90]\n- 0xffffffffc97007e8 (offset: 0x1e4500) -> 0x3cf74 fde=[ 2acb4]\n- 0xffffffffc97009a8 (offset: 0x1e46c0) -> 0x3cf98 fde=[ 2acd8]\n- 0xffffffffc9700ac8 (offset: 0x1e47e0) -> 0x3cfbc fde=[ 2acfc]\n- 0xffffffffc9700be8 (offset: 0x1e4900) -> 0x3cfe0 fde=[ 2ad20]\n- 0xffffffffc9700da8 (offset: 0x1e4ac0) -> 0x3d004 fde=[ 2ad44]\n- 0xffffffffc9700f68 (offset: 0x1e4c80) -> 0x3d028 fde=[ 2ad68]\n- 0xffffffffc9701088 (offset: 0x1e4da0) -> 0x3d04c fde=[ 2ad8c]\n- 0xffffffffc97011a8 (offset: 0x1e4ec0) -> 0x3d070 fde=[ 2adb0]\n- 0xffffffffc9701368 (offset: 0x1e5080) -> 0x3d094 fde=[ 2add4]\n- 0xffffffffc9701528 (offset: 0x1e5240) -> 0x3d0b8 fde=[ 2adf8]\n- 0xffffffffc9701648 (offset: 0x1e5360) -> 0x3d0dc fde=[ 2ae1c]\n- 0xffffffffc9701768 (offset: 0x1e5480) -> 0x3d100 fde=[ 2ae40]\n- 0xffffffffc9701928 (offset: 0x1e5640) -> 0x3d124 fde=[ 2ae64]\n- 0xffffffffc9701ae8 (offset: 0x1e5800) -> 0x3d148 fde=[ 2ae88]\n- 0xffffffffc9701c08 (offset: 0x1e5920) -> 0x3d16c fde=[ 2aeac]\n- 0xffffffffc9701d28 (offset: 0x1e5a40) -> 0x3d190 fde=[ 2aed0]\n- 0xffffffffc9701ee8 (offset: 0x1e5c00) -> 0x3d1b4 fde=[ 2aef4]\n- 0xffffffffc97020a8 (offset: 0x1e5dc0) -> 0x3d1d8 fde=[ 2af18]\n- 0xffffffffc97021c8 (offset: 0x1e5ee0) -> 0x3d1fc fde=[ 2af3c]\n- 0xffffffffc97022e8 (offset: 0x1e6000) -> 0x3d220 fde=[ 2af60]\n- 0xffffffffc97024a8 (offset: 0x1e61c0) -> 0x3d244 fde=[ 2af84]\n- 0xffffffffc9702668 (offset: 0x1e6380) -> 0x3d268 fde=[ 2afa8]\n- 0xffffffffc9702788 (offset: 0x1e64a0) -> 0x3d28c fde=[ 2afcc]\n- 0xffffffffc97028a8 (offset: 0x1e65c0) -> 0x3d2b0 fde=[ 2aff0]\n- 0xffffffffc9702a68 (offset: 0x1e6780) -> 0x3d2d4 fde=[ 2b014]\n- 0xffffffffc9702c28 (offset: 0x1e6940) -> 0x3d2f8 fde=[ 2b038]\n- 0xffffffffc9702d48 (offset: 0x1e6a60) -> 0x3d31c fde=[ 2b05c]\n- 0xffffffffc9702e68 (offset: 0x1e6b80) -> 0x3d340 fde=[ 2b080]\n- 0xffffffffc9703028 (offset: 0x1e6d40) -> 0x3d364 fde=[ 2b0a4]\n- 0xffffffffc97031e8 (offset: 0x1e6f00) -> 0x3d388 fde=[ 2b0c8]\n- 0xffffffffc9703308 (offset: 0x1e7020) -> 0x3d3ac fde=[ 2b0ec]\n- 0xffffffffc9703428 (offset: 0x1e7140) -> 0x3d3d0 fde=[ 2b110]\n- 0xffffffffc97035e8 (offset: 0x1e7300) -> 0x3d3f4 fde=[ 2b134]\n- 0xffffffffc97037a8 (offset: 0x1e74c0) -> 0x3d418 fde=[ 2b158]\n- 0xffffffffc97038c8 (offset: 0x1e75e0) -> 0x3d43c fde=[ 2b17c]\n- 0xffffffffc97039e8 (offset: 0x1e7700) -> 0x3d460 fde=[ 2b1a0]\n- 0xffffffffc9703ba8 (offset: 0x1e78c0) -> 0x3d484 fde=[ 2b1c4]\n- 0xffffffffc9703d68 (offset: 0x1e7a80) -> 0x3d4a8 fde=[ 2b1e8]\n- 0xffffffffc9703e88 (offset: 0x1e7ba0) -> 0x3d4cc fde=[ 2b20c]\n- 0xffffffffc9703fa8 (offset: 0x1e7cc0) -> 0x3d4f0 fde=[ 2b230]\n- 0xffffffffc9704168 (offset: 0x1e7e80) -> 0x3d514 fde=[ 2b254]\n- 0xffffffffc9704328 (offset: 0x1e8040) -> 0x3d538 fde=[ 2b278]\n- 0xffffffffc9704448 (offset: 0x1e8160) -> 0x3d55c fde=[ 2b29c]\n- 0xffffffffc9704568 (offset: 0x1e8280) -> 0x3d580 fde=[ 2b2c0]\n- 0xffffffffc9704728 (offset: 0x1e8440) -> 0x3d5a4 fde=[ 2b2e4]\n- 0xffffffffc97048e8 (offset: 0x1e8600) -> 0x3d5c8 fde=[ 2b308]\n- 0xffffffffc9704a08 (offset: 0x1e8720) -> 0x3d5ec fde=[ 2b32c]\n- 0xffffffffc9704b28 (offset: 0x1e8840) -> 0x3d610 fde=[ 2b350]\n- 0xffffffffc97057f8 (offset: 0x1e9510) -> 0x3d634 fde=[ 2b374]\n- 0xffffffffc9705828 (offset: 0x1e9540) -> 0x3d64c fde=[ 2b38c]\n- 0xffffffffc970fc18 (offset: 0x1f3930) -> 0x3eef0 fde=[ 2cc30]\n- 0xffffffffc970fdd8 (offset: 0x1f3af0) -> 0x3ef14 fde=[ 2cc54]\n- 0xffffffffc970ff98 (offset: 0x1f3cb0) -> 0x3ef38 fde=[ 2cc78]\n- 0xffffffffc97100b8 (offset: 0x1f3dd0) -> 0x3ef5c fde=[ 2cc9c]\n- 0xffffffffc97101d8 (offset: 0x1f3ef0) -> 0x3ef80 fde=[ 2ccc0]\n- 0xffffffffc9710398 (offset: 0x1f40b0) -> 0x3efa4 fde=[ 2cce4]\n- 0xffffffffc9710558 (offset: 0x1f4270) -> 0x3efc8 fde=[ 2cd08]\n- 0xffffffffc9710678 (offset: 0x1f4390) -> 0x3efec fde=[ 2cd2c]\n- 0xffffffffc9710798 (offset: 0x1f44b0) -> 0x3f010 fde=[ 2cd50]\n- 0xffffffffc9710958 (offset: 0x1f4670) -> 0x3f034 fde=[ 2cd74]\n- 0xffffffffc9710b18 (offset: 0x1f4830) -> 0x3f058 fde=[ 2cd98]\n- 0xffffffffc9710c38 (offset: 0x1f4950) -> 0x3f07c fde=[ 2cdbc]\n- 0xffffffffc9710d58 (offset: 0x1f4a70) -> 0x3f0a0 fde=[ 2cde0]\n- 0xffffffffc9710f18 (offset: 0x1f4c30) -> 0x3f0c4 fde=[ 2ce04]\n- 0xffffffffc97110d8 (offset: 0x1f4df0) -> 0x3f0e8 fde=[ 2ce28]\n- 0xffffffffc97111f8 (offset: 0x1f4f10) -> 0x3f10c fde=[ 2ce4c]\n- 0xffffffffc9711318 (offset: 0x1f5030) -> 0x3f130 fde=[ 2ce70]\n- 0xffffffffc97114d8 (offset: 0x1f51f0) -> 0x3f154 fde=[ 2ce94]\n- 0xffffffffc9711698 (offset: 0x1f53b0) -> 0x3f178 fde=[ 2ceb8]\n- 0xffffffffc97117b8 (offset: 0x1f54d0) -> 0x3f19c fde=[ 2cedc]\n- 0xffffffffc97118d8 (offset: 0x1f55f0) -> 0x3f1c0 fde=[ 2cf00]\n- 0xffffffffc9711a98 (offset: 0x1f57b0) -> 0x3f1e4 fde=[ 2cf24]\n- 0xffffffffc9711c58 (offset: 0x1f5970) -> 0x3f208 fde=[ 2cf48]\n- 0xffffffffc9711d78 (offset: 0x1f5a90) -> 0x3f22c fde=[ 2cf6c]\n- 0xffffffffc9711e98 (offset: 0x1f5bb0) -> 0x3f250 fde=[ 2cf90]\n- 0xffffffffc9712058 (offset: 0x1f5d70) -> 0x3f274 fde=[ 2cfb4]\n- 0xffffffffc9712218 (offset: 0x1f5f30) -> 0x3f298 fde=[ 2cfd8]\n- 0xffffffffc9712338 (offset: 0x1f6050) -> 0x3f2bc fde=[ 2cffc]\n- 0xffffffffc9712458 (offset: 0x1f6170) -> 0x3f2e0 fde=[ 2d020]\n- 0xffffffffc9712618 (offset: 0x1f6330) -> 0x3f304 fde=[ 2d044]\n- 0xffffffffc97127d8 (offset: 0x1f64f0) -> 0x3f328 fde=[ 2d068]\n- 0xffffffffc97128f8 (offset: 0x1f6610) -> 0x3f34c fde=[ 2d08c]\n- 0xffffffffc9712a18 (offset: 0x1f6730) -> 0x3f370 fde=[ 2d0b0]\n- 0xffffffffc9712bd8 (offset: 0x1f68f0) -> 0x3f394 fde=[ 2d0d4]\n- 0xffffffffc9712d98 (offset: 0x1f6ab0) -> 0x3f3b8 fde=[ 2d0f8]\n- 0xffffffffc9712eb8 (offset: 0x1f6bd0) -> 0x3f3dc fde=[ 2d11c]\n- 0xffffffffc9712fd8 (offset: 0x1f6cf0) -> 0x3f400 fde=[ 2d140]\n- 0xffffffffc9713198 (offset: 0x1f6eb0) -> 0x3f424 fde=[ 2d164]\n- 0xffffffffc9713358 (offset: 0x1f7070) -> 0x3f448 fde=[ 2d188]\n- 0xffffffffc9713478 (offset: 0x1f7190) -> 0x3f46c fde=[ 2d1ac]\n- 0xffffffffc9713598 (offset: 0x1f72b0) -> 0x3f490 fde=[ 2d1d0]\n- 0xffffffffc9713758 (offset: 0x1f7470) -> 0x3f4b4 fde=[ 2d1f4]\n- 0xffffffffc9713918 (offset: 0x1f7630) -> 0x3f4d8 fde=[ 2d218]\n- 0xffffffffc9713a38 (offset: 0x1f7750) -> 0x3f4fc fde=[ 2d23c]\n- 0xffffffffc9713b58 (offset: 0x1f7870) -> 0x3f520 fde=[ 2d260]\n- 0xffffffffc9713d18 (offset: 0x1f7a30) -> 0x3f544 fde=[ 2d284]\n- 0xffffffffc9713ed8 (offset: 0x1f7bf0) -> 0x3f568 fde=[ 2d2a8]\n- 0xffffffffc9713ff8 (offset: 0x1f7d10) -> 0x3f58c fde=[ 2d2cc]\n- 0xffffffffc9714118 (offset: 0x1f7e30) -> 0x3f5b0 fde=[ 2d2f0]\n- 0xffffffffc97142d8 (offset: 0x1f7ff0) -> 0x3f5d4 fde=[ 2d314]\n- 0xffffffffc9714498 (offset: 0x1f81b0) -> 0x3f5f8 fde=[ 2d338]\n- 0xffffffffc97145b8 (offset: 0x1f82d0) -> 0x3f61c fde=[ 2d35c]\n- 0xffffffffc97146d8 (offset: 0x1f83f0) -> 0x3f640 fde=[ 2d380]\n- 0xffffffffc9714898 (offset: 0x1f85b0) -> 0x3f664 fde=[ 2d3a4]\n- 0xffffffffc9714a58 (offset: 0x1f8770) -> 0x3f688 fde=[ 2d3c8]\n- 0xffffffffc9714b78 (offset: 0x1f8890) -> 0x3f6ac fde=[ 2d3ec]\n- 0xffffffffc9714c98 (offset: 0x1f89b0) -> 0x3f6d0 fde=[ 2d410]\n- 0xffffffffc9714e58 (offset: 0x1f8b70) -> 0x3f6f4 fde=[ 2d434]\n- 0xffffffffc9715018 (offset: 0x1f8d30) -> 0x3f718 fde=[ 2d458]\n- 0xffffffffc9715138 (offset: 0x1f8e50) -> 0x3f73c fde=[ 2d47c]\n- 0xffffffffc9715258 (offset: 0x1f8f70) -> 0x3f760 fde=[ 2d4a0]\n- 0xffffffffc9715418 (offset: 0x1f9130) -> 0x3f784 fde=[ 2d4c4]\n- 0xffffffffc97155d8 (offset: 0x1f92f0) -> 0x3f7a8 fde=[ 2d4e8]\n- 0xffffffffc97156f8 (offset: 0x1f9410) -> 0x3f7cc fde=[ 2d50c]\n- 0xffffffffc9715818 (offset: 0x1f9530) -> 0x3f7f0 fde=[ 2d530]\n- 0xffffffffc97164e8 (offset: 0x1fa200) -> 0x3f814 fde=[ 2d554]\n- 0xffffffffc9716518 (offset: 0x1fa230) -> 0x3f82c fde=[ 2d56c]\n- 0xffffffffc9720908 (offset: 0x204620) -> 0x410d0 fde=[ 2ee10]\n- 0xffffffffc9720ac8 (offset: 0x2047e0) -> 0x410f4 fde=[ 2ee34]\n- 0xffffffffc9720c88 (offset: 0x2049a0) -> 0x41118 fde=[ 2ee58]\n- 0xffffffffc9720da8 (offset: 0x204ac0) -> 0x4113c fde=[ 2ee7c]\n- 0xffffffffc9720ec8 (offset: 0x204be0) -> 0x41160 fde=[ 2eea0]\n- 0xffffffffc9721088 (offset: 0x204da0) -> 0x41184 fde=[ 2eec4]\n- 0xffffffffc9721248 (offset: 0x204f60) -> 0x411a8 fde=[ 2eee8]\n- 0xffffffffc9721368 (offset: 0x205080) -> 0x411cc fde=[ 2ef0c]\n- 0xffffffffc9721488 (offset: 0x2051a0) -> 0x411f0 fde=[ 2ef30]\n- 0xffffffffc9721648 (offset: 0x205360) -> 0x41214 fde=[ 2ef54]\n- 0xffffffffc9721808 (offset: 0x205520) -> 0x41238 fde=[ 2ef78]\n- 0xffffffffc9721928 (offset: 0x205640) -> 0x4125c fde=[ 2ef9c]\n- 0xffffffffc9721a48 (offset: 0x205760) -> 0x41280 fde=[ 2efc0]\n- 0xffffffffc9721c08 (offset: 0x205920) -> 0x412a4 fde=[ 2efe4]\n- 0xffffffffc9721dc8 (offset: 0x205ae0) -> 0x412c8 fde=[ 2f008]\n- 0xffffffffc9721ee8 (offset: 0x205c00) -> 0x412ec fde=[ 2f02c]\n- 0xffffffffc9722008 (offset: 0x205d20) -> 0x41310 fde=[ 2f050]\n- 0xffffffffc97221c8 (offset: 0x205ee0) -> 0x41334 fde=[ 2f074]\n- 0xffffffffc9722388 (offset: 0x2060a0) -> 0x41358 fde=[ 2f098]\n- 0xffffffffc97224a8 (offset: 0x2061c0) -> 0x4137c fde=[ 2f0bc]\n- 0xffffffffc97225c8 (offset: 0x2062e0) -> 0x413a0 fde=[ 2f0e0]\n- 0xffffffffc9722788 (offset: 0x2064a0) -> 0x413c4 fde=[ 2f104]\n- 0xffffffffc9722948 (offset: 0x206660) -> 0x413e8 fde=[ 2f128]\n- 0xffffffffc9722a68 (offset: 0x206780) -> 0x4140c fde=[ 2f14c]\n- 0xffffffffc9722b88 (offset: 0x2068a0) -> 0x41430 fde=[ 2f170]\n- 0xffffffffc9722d48 (offset: 0x206a60) -> 0x41454 fde=[ 2f194]\n- 0xffffffffc9722f08 (offset: 0x206c20) -> 0x41478 fde=[ 2f1b8]\n- 0xffffffffc9723028 (offset: 0x206d40) -> 0x4149c fde=[ 2f1dc]\n- 0xffffffffc9723148 (offset: 0x206e60) -> 0x414c0 fde=[ 2f200]\n- 0xffffffffc9723308 (offset: 0x207020) -> 0x414e4 fde=[ 2f224]\n- 0xffffffffc97234c8 (offset: 0x2071e0) -> 0x41508 fde=[ 2f248]\n- 0xffffffffc97235e8 (offset: 0x207300) -> 0x4152c fde=[ 2f26c]\n- 0xffffffffc9723708 (offset: 0x207420) -> 0x41550 fde=[ 2f290]\n- 0xffffffffc97238c8 (offset: 0x2075e0) -> 0x41574 fde=[ 2f2b4]\n- 0xffffffffc9723a88 (offset: 0x2077a0) -> 0x41598 fde=[ 2f2d8]\n- 0xffffffffc9723ba8 (offset: 0x2078c0) -> 0x415bc fde=[ 2f2fc]\n- 0xffffffffc9723cc8 (offset: 0x2079e0) -> 0x415e0 fde=[ 2f320]\n- 0xffffffffc9723e88 (offset: 0x207ba0) -> 0x41604 fde=[ 2f344]\n- 0xffffffffc9724048 (offset: 0x207d60) -> 0x41628 fde=[ 2f368]\n- 0xffffffffc9724168 (offset: 0x207e80) -> 0x4164c fde=[ 2f38c]\n- 0xffffffffc9724288 (offset: 0x207fa0) -> 0x41670 fde=[ 2f3b0]\n- 0xffffffffc9724448 (offset: 0x208160) -> 0x41694 fde=[ 2f3d4]\n- 0xffffffffc9724608 (offset: 0x208320) -> 0x416b8 fde=[ 2f3f8]\n- 0xffffffffc9724728 (offset: 0x208440) -> 0x416dc fde=[ 2f41c]\n- 0xffffffffc9724848 (offset: 0x208560) -> 0x41700 fde=[ 2f440]\n- 0xffffffffc9724a08 (offset: 0x208720) -> 0x41724 fde=[ 2f464]\n- 0xffffffffc9724bc8 (offset: 0x2088e0) -> 0x41748 fde=[ 2f488]\n- 0xffffffffc9724ce8 (offset: 0x208a00) -> 0x4176c fde=[ 2f4ac]\n- 0xffffffffc9724e08 (offset: 0x208b20) -> 0x41790 fde=[ 2f4d0]\n- 0xffffffffc9724fc8 (offset: 0x208ce0) -> 0x417b4 fde=[ 2f4f4]\n- 0xffffffffc9725188 (offset: 0x208ea0) -> 0x417d8 fde=[ 2f518]\n- 0xffffffffc97252a8 (offset: 0x208fc0) -> 0x417fc fde=[ 2f53c]\n- 0xffffffffc97253c8 (offset: 0x2090e0) -> 0x41820 fde=[ 2f560]\n- 0xffffffffc9725588 (offset: 0x2092a0) -> 0x41844 fde=[ 2f584]\n- 0xffffffffc9725748 (offset: 0x209460) -> 0x41868 fde=[ 2f5a8]\n- 0xffffffffc9725868 (offset: 0x209580) -> 0x4188c fde=[ 2f5cc]\n- 0xffffffffc9725988 (offset: 0x2096a0) -> 0x418b0 fde=[ 2f5f0]\n- 0xffffffffc9725b48 (offset: 0x209860) -> 0x418d4 fde=[ 2f614]\n- 0xffffffffc9725d08 (offset: 0x209a20) -> 0x418f8 fde=[ 2f638]\n- 0xffffffffc9725e28 (offset: 0x209b40) -> 0x4191c fde=[ 2f65c]\n- 0xffffffffc9725f48 (offset: 0x209c60) -> 0x41940 fde=[ 2f680]\n- 0xffffffffc9726108 (offset: 0x209e20) -> 0x41964 fde=[ 2f6a4]\n- 0xffffffffc97262c8 (offset: 0x209fe0) -> 0x41988 fde=[ 2f6c8]\n- 0xffffffffc97263e8 (offset: 0x20a100) -> 0x419ac fde=[ 2f6ec]\n- 0xffffffffc9726508 (offset: 0x20a220) -> 0x419d0 fde=[ 2f710]\n- 0xffffffffc97271d8 (offset: 0x20aef0) -> 0x419f4 fde=[ 2f734]\n- 0xffffffffc9727208 (offset: 0x20af20) -> 0x41a0c fde=[ 2f74c]\n- 0xffffffffc97315f8 (offset: 0x215310) -> 0x432b0 fde=[ 30ff0]\n- 0xffffffffc97317b8 (offset: 0x2154d0) -> 0x432d4 fde=[ 31014]\n- 0xffffffffc9731978 (offset: 0x215690) -> 0x432f8 fde=[ 31038]\n- 0xffffffffc9731a98 (offset: 0x2157b0) -> 0x4331c fde=[ 3105c]\n- 0xffffffffc9731bb8 (offset: 0x2158d0) -> 0x43340 fde=[ 31080]\n- 0xffffffffc9731d78 (offset: 0x215a90) -> 0x43364 fde=[ 310a4]\n- 0xffffffffc9731f38 (offset: 0x215c50) -> 0x43388 fde=[ 310c8]\n- 0xffffffffc9732058 (offset: 0x215d70) -> 0x433ac fde=[ 310ec]\n- 0xffffffffc9732178 (offset: 0x215e90) -> 0x433d0 fde=[ 31110]\n- 0xffffffffc9732338 (offset: 0x216050) -> 0x433f4 fde=[ 31134]\n- 0xffffffffc97324f8 (offset: 0x216210) -> 0x43418 fde=[ 31158]\n- 0xffffffffc9732618 (offset: 0x216330) -> 0x4343c fde=[ 3117c]\n- 0xffffffffc9732738 (offset: 0x216450) -> 0x43460 fde=[ 311a0]\n- 0xffffffffc97328f8 (offset: 0x216610) -> 0x43484 fde=[ 311c4]\n- 0xffffffffc9732ab8 (offset: 0x2167d0) -> 0x434a8 fde=[ 311e8]\n- 0xffffffffc9732bd8 (offset: 0x2168f0) -> 0x434cc fde=[ 3120c]\n- 0xffffffffc9732cf8 (offset: 0x216a10) -> 0x434f0 fde=[ 31230]\n- 0xffffffffc9732eb8 (offset: 0x216bd0) -> 0x43514 fde=[ 31254]\n- 0xffffffffc9733078 (offset: 0x216d90) -> 0x43538 fde=[ 31278]\n- 0xffffffffc9733198 (offset: 0x216eb0) -> 0x4355c fde=[ 3129c]\n- 0xffffffffc97332b8 (offset: 0x216fd0) -> 0x43580 fde=[ 312c0]\n- 0xffffffffc9733478 (offset: 0x217190) -> 0x435a4 fde=[ 312e4]\n- 0xffffffffc9733638 (offset: 0x217350) -> 0x435c8 fde=[ 31308]\n- 0xffffffffc9733758 (offset: 0x217470) -> 0x435ec fde=[ 3132c]\n- 0xffffffffc9733878 (offset: 0x217590) -> 0x43610 fde=[ 31350]\n- 0xffffffffc9733a38 (offset: 0x217750) -> 0x43634 fde=[ 31374]\n- 0xffffffffc9733bf8 (offset: 0x217910) -> 0x43658 fde=[ 31398]\n- 0xffffffffc9733d18 (offset: 0x217a30) -> 0x4367c fde=[ 313bc]\n- 0xffffffffc9733e38 (offset: 0x217b50) -> 0x436a0 fde=[ 313e0]\n- 0xffffffffc9733ff8 (offset: 0x217d10) -> 0x436c4 fde=[ 31404]\n- 0xffffffffc97341b8 (offset: 0x217ed0) -> 0x436e8 fde=[ 31428]\n- 0xffffffffc97342d8 (offset: 0x217ff0) -> 0x4370c fde=[ 3144c]\n- 0xffffffffc97343f8 (offset: 0x218110) -> 0x43730 fde=[ 31470]\n- 0xffffffffc97345b8 (offset: 0x2182d0) -> 0x43754 fde=[ 31494]\n- 0xffffffffc9734778 (offset: 0x218490) -> 0x43778 fde=[ 314b8]\n- 0xffffffffc9734898 (offset: 0x2185b0) -> 0x4379c fde=[ 314dc]\n- 0xffffffffc97349b8 (offset: 0x2186d0) -> 0x437c0 fde=[ 31500]\n- 0xffffffffc9734b78 (offset: 0x218890) -> 0x437e4 fde=[ 31524]\n- 0xffffffffc9734d38 (offset: 0x218a50) -> 0x43808 fde=[ 31548]\n- 0xffffffffc9734e58 (offset: 0x218b70) -> 0x4382c fde=[ 3156c]\n- 0xffffffffc9734f78 (offset: 0x218c90) -> 0x43850 fde=[ 31590]\n- 0xffffffffc9735138 (offset: 0x218e50) -> 0x43874 fde=[ 315b4]\n- 0xffffffffc97352f8 (offset: 0x219010) -> 0x43898 fde=[ 315d8]\n- 0xffffffffc9735418 (offset: 0x219130) -> 0x438bc fde=[ 315fc]\n- 0xffffffffc9735538 (offset: 0x219250) -> 0x438e0 fde=[ 31620]\n- 0xffffffffc97356f8 (offset: 0x219410) -> 0x43904 fde=[ 31644]\n- 0xffffffffc97358b8 (offset: 0x2195d0) -> 0x43928 fde=[ 31668]\n- 0xffffffffc97359d8 (offset: 0x2196f0) -> 0x4394c fde=[ 3168c]\n- 0xffffffffc9735af8 (offset: 0x219810) -> 0x43970 fde=[ 316b0]\n- 0xffffffffc9735cb8 (offset: 0x2199d0) -> 0x43994 fde=[ 316d4]\n- 0xffffffffc9735e78 (offset: 0x219b90) -> 0x439b8 fde=[ 316f8]\n- 0xffffffffc9735f98 (offset: 0x219cb0) -> 0x439dc fde=[ 3171c]\n- 0xffffffffc97360b8 (offset: 0x219dd0) -> 0x43a00 fde=[ 31740]\n- 0xffffffffc9736278 (offset: 0x219f90) -> 0x43a24 fde=[ 31764]\n- 0xffffffffc9736438 (offset: 0x21a150) -> 0x43a48 fde=[ 31788]\n- 0xffffffffc9736558 (offset: 0x21a270) -> 0x43a6c fde=[ 317ac]\n- 0xffffffffc9736678 (offset: 0x21a390) -> 0x43a90 fde=[ 317d0]\n- 0xffffffffc9736838 (offset: 0x21a550) -> 0x43ab4 fde=[ 317f4]\n- 0xffffffffc97369f8 (offset: 0x21a710) -> 0x43ad8 fde=[ 31818]\n- 0xffffffffc9736b18 (offset: 0x21a830) -> 0x43afc fde=[ 3183c]\n- 0xffffffffc9736c38 (offset: 0x21a950) -> 0x43b20 fde=[ 31860]\n- 0xffffffffc9736df8 (offset: 0x21ab10) -> 0x43b44 fde=[ 31884]\n- 0xffffffffc9736fb8 (offset: 0x21acd0) -> 0x43b68 fde=[ 318a8]\n- 0xffffffffc97370d8 (offset: 0x21adf0) -> 0x43b8c fde=[ 318cc]\n- 0xffffffffc97371f8 (offset: 0x21af10) -> 0x43bb0 fde=[ 318f0]\n- 0xffffffffc9737ec8 (offset: 0x21bbe0) -> 0x43bd4 fde=[ 31914]\n- 0xffffffffc9737ef8 (offset: 0x21bc10) -> 0x43bec fde=[ 3192c]\n- 0xffffffffc97422e8 (offset: 0x226000) -> 0x45490 fde=[ 331d0]\n- 0xffffffffc97424a8 (offset: 0x2261c0) -> 0x454b4 fde=[ 331f4]\n- 0xffffffffc9742668 (offset: 0x226380) -> 0x454d8 fde=[ 33218]\n- 0xffffffffc9742788 (offset: 0x2264a0) -> 0x454fc fde=[ 3323c]\n- 0xffffffffc97428a8 (offset: 0x2265c0) -> 0x45520 fde=[ 33260]\n- 0xffffffffc9742a68 (offset: 0x226780) -> 0x45544 fde=[ 33284]\n- 0xffffffffc9742c28 (offset: 0x226940) -> 0x45568 fde=[ 332a8]\n- 0xffffffffc9742d48 (offset: 0x226a60) -> 0x4558c fde=[ 332cc]\n- 0xffffffffc9742e68 (offset: 0x226b80) -> 0x455b0 fde=[ 332f0]\n- 0xffffffffc9743028 (offset: 0x226d40) -> 0x455d4 fde=[ 33314]\n- 0xffffffffc97431e8 (offset: 0x226f00) -> 0x455f8 fde=[ 33338]\n- 0xffffffffc9743308 (offset: 0x227020) -> 0x4561c fde=[ 3335c]\n- 0xffffffffc9743428 (offset: 0x227140) -> 0x45640 fde=[ 33380]\n- 0xffffffffc97435e8 (offset: 0x227300) -> 0x45664 fde=[ 333a4]\n- 0xffffffffc97437a8 (offset: 0x2274c0) -> 0x45688 fde=[ 333c8]\n- 0xffffffffc97438c8 (offset: 0x2275e0) -> 0x456ac fde=[ 333ec]\n- 0xffffffffc97439e8 (offset: 0x227700) -> 0x456d0 fde=[ 33410]\n- 0xffffffffc9743ba8 (offset: 0x2278c0) -> 0x456f4 fde=[ 33434]\n- 0xffffffffc9743d68 (offset: 0x227a80) -> 0x45718 fde=[ 33458]\n- 0xffffffffc9743e88 (offset: 0x227ba0) -> 0x4573c fde=[ 3347c]\n- 0xffffffffc9743fa8 (offset: 0x227cc0) -> 0x45760 fde=[ 334a0]\n- 0xffffffffc9744168 (offset: 0x227e80) -> 0x45784 fde=[ 334c4]\n- 0xffffffffc9744328 (offset: 0x228040) -> 0x457a8 fde=[ 334e8]\n- 0xffffffffc9744448 (offset: 0x228160) -> 0x457cc fde=[ 3350c]\n- 0xffffffffc9744568 (offset: 0x228280) -> 0x457f0 fde=[ 33530]\n- 0xffffffffc9744728 (offset: 0x228440) -> 0x45814 fde=[ 33554]\n- 0xffffffffc97448e8 (offset: 0x228600) -> 0x45838 fde=[ 33578]\n- 0xffffffffc9744a08 (offset: 0x228720) -> 0x4585c fde=[ 3359c]\n- 0xffffffffc9744b28 (offset: 0x228840) -> 0x45880 fde=[ 335c0]\n- 0xffffffffc9744ce8 (offset: 0x228a00) -> 0x458a4 fde=[ 335e4]\n- 0xffffffffc9744ea8 (offset: 0x228bc0) -> 0x458c8 fde=[ 33608]\n- 0xffffffffc9744fc8 (offset: 0x228ce0) -> 0x458ec fde=[ 3362c]\n- 0xffffffffc97450e8 (offset: 0x228e00) -> 0x45910 fde=[ 33650]\n- 0xffffffffc97452a8 (offset: 0x228fc0) -> 0x45934 fde=[ 33674]\n- 0xffffffffc9745468 (offset: 0x229180) -> 0x45958 fde=[ 33698]\n- 0xffffffffc9745588 (offset: 0x2292a0) -> 0x4597c fde=[ 336bc]\n- 0xffffffffc97456a8 (offset: 0x2293c0) -> 0x459a0 fde=[ 336e0]\n- 0xffffffffc9745868 (offset: 0x229580) -> 0x459c4 fde=[ 33704]\n- 0xffffffffc9745a28 (offset: 0x229740) -> 0x459e8 fde=[ 33728]\n- 0xffffffffc9745b48 (offset: 0x229860) -> 0x45a0c fde=[ 3374c]\n- 0xffffffffc9745c68 (offset: 0x229980) -> 0x45a30 fde=[ 33770]\n- 0xffffffffc9745e28 (offset: 0x229b40) -> 0x45a54 fde=[ 33794]\n- 0xffffffffc9745fe8 (offset: 0x229d00) -> 0x45a78 fde=[ 337b8]\n- 0xffffffffc9746108 (offset: 0x229e20) -> 0x45a9c fde=[ 337dc]\n- 0xffffffffc9746228 (offset: 0x229f40) -> 0x45ac0 fde=[ 33800]\n- 0xffffffffc97463e8 (offset: 0x22a100) -> 0x45ae4 fde=[ 33824]\n- 0xffffffffc97465a8 (offset: 0x22a2c0) -> 0x45b08 fde=[ 33848]\n- 0xffffffffc97466c8 (offset: 0x22a3e0) -> 0x45b2c fde=[ 3386c]\n- 0xffffffffc97467e8 (offset: 0x22a500) -> 0x45b50 fde=[ 33890]\n- 0xffffffffc97469a8 (offset: 0x22a6c0) -> 0x45b74 fde=[ 338b4]\n- 0xffffffffc9746b68 (offset: 0x22a880) -> 0x45b98 fde=[ 338d8]\n- 0xffffffffc9746c88 (offset: 0x22a9a0) -> 0x45bbc fde=[ 338fc]\n- 0xffffffffc9746da8 (offset: 0x22aac0) -> 0x45be0 fde=[ 33920]\n- 0xffffffffc9746f68 (offset: 0x22ac80) -> 0x45c04 fde=[ 33944]\n- 0xffffffffc9747128 (offset: 0x22ae40) -> 0x45c28 fde=[ 33968]\n- 0xffffffffc9747248 (offset: 0x22af60) -> 0x45c4c fde=[ 3398c]\n- 0xffffffffc9747368 (offset: 0x22b080) -> 0x45c70 fde=[ 339b0]\n- 0xffffffffc9747528 (offset: 0x22b240) -> 0x45c94 fde=[ 339d4]\n- 0xffffffffc97476e8 (offset: 0x22b400) -> 0x45cb8 fde=[ 339f8]\n- 0xffffffffc9747808 (offset: 0x22b520) -> 0x45cdc fde=[ 33a1c]\n- 0xffffffffc9747928 (offset: 0x22b640) -> 0x45d00 fde=[ 33a40]\n- 0xffffffffc9747ae8 (offset: 0x22b800) -> 0x45d24 fde=[ 33a64]\n- 0xffffffffc9747ca8 (offset: 0x22b9c0) -> 0x45d48 fde=[ 33a88]\n- 0xffffffffc9747dc8 (offset: 0x22bae0) -> 0x45d6c fde=[ 33aac]\n- 0xffffffffc9747ee8 (offset: 0x22bc00) -> 0x45d90 fde=[ 33ad0]\n- 0xffffffffc9748bb8 (offset: 0x22c8d0) -> 0x45db4 fde=[ 33af4]\n- 0xffffffffc9748be8 (offset: 0x22c900) -> 0x45dcc fde=[ 33b0c]\n- 0xffffffffc9753138 (offset: 0x236e50) -> 0x47670 fde=[ 353b0]\n- 0xffffffffc97532f8 (offset: 0x237010) -> 0x47694 fde=[ 353d4]\n- 0xffffffffc97534b8 (offset: 0x2371d0) -> 0x476b8 fde=[ 353f8]\n- 0xffffffffc97535d8 (offset: 0x2372f0) -> 0x476dc fde=[ 3541c]\n- 0xffffffffc97536f8 (offset: 0x237410) -> 0x47700 fde=[ 35440]\n- 0xffffffffc97538b8 (offset: 0x2375d0) -> 0x47724 fde=[ 35464]\n- 0xffffffffc9753a78 (offset: 0x237790) -> 0x47748 fde=[ 35488]\n- 0xffffffffc9753b98 (offset: 0x2378b0) -> 0x4776c fde=[ 354ac]\n- 0xffffffffc9753cb8 (offset: 0x2379d0) -> 0x47790 fde=[ 354d0]\n- 0xffffffffc9753e78 (offset: 0x237b90) -> 0x477b4 fde=[ 354f4]\n- 0xffffffffc9754038 (offset: 0x237d50) -> 0x477d8 fde=[ 35518]\n- 0xffffffffc9754158 (offset: 0x237e70) -> 0x477fc fde=[ 3553c]\n- 0xffffffffc9754278 (offset: 0x237f90) -> 0x47820 fde=[ 35560]\n- 0xffffffffc9754438 (offset: 0x238150) -> 0x47844 fde=[ 35584]\n- 0xffffffffc97545f8 (offset: 0x238310) -> 0x47868 fde=[ 355a8]\n- 0xffffffffc9754718 (offset: 0x238430) -> 0x4788c fde=[ 355cc]\n- 0xffffffffc9754838 (offset: 0x238550) -> 0x478b0 fde=[ 355f0]\n- 0xffffffffc97549f8 (offset: 0x238710) -> 0x478d4 fde=[ 35614]\n- 0xffffffffc9754bb8 (offset: 0x2388d0) -> 0x478f8 fde=[ 35638]\n- 0xffffffffc9754cd8 (offset: 0x2389f0) -> 0x4791c fde=[ 3565c]\n- 0xffffffffc9754df8 (offset: 0x238b10) -> 0x47940 fde=[ 35680]\n- 0xffffffffc9754fb8 (offset: 0x238cd0) -> 0x47964 fde=[ 356a4]\n- 0xffffffffc9755178 (offset: 0x238e90) -> 0x47988 fde=[ 356c8]\n- 0xffffffffc9755298 (offset: 0x238fb0) -> 0x479ac fde=[ 356ec]\n- 0xffffffffc97553b8 (offset: 0x2390d0) -> 0x479d0 fde=[ 35710]\n- 0xffffffffc9755578 (offset: 0x239290) -> 0x479f4 fde=[ 35734]\n- 0xffffffffc9755738 (offset: 0x239450) -> 0x47a18 fde=[ 35758]\n- 0xffffffffc9755858 (offset: 0x239570) -> 0x47a3c fde=[ 3577c]\n- 0xffffffffc9755978 (offset: 0x239690) -> 0x47a60 fde=[ 357a0]\n- 0xffffffffc9755b38 (offset: 0x239850) -> 0x47a84 fde=[ 357c4]\n- 0xffffffffc9755cf8 (offset: 0x239a10) -> 0x47aa8 fde=[ 357e8]\n- 0xffffffffc9755e18 (offset: 0x239b30) -> 0x47acc fde=[ 3580c]\n- 0xffffffffc9755f38 (offset: 0x239c50) -> 0x47af0 fde=[ 35830]\n- 0xffffffffc97560f8 (offset: 0x239e10) -> 0x47b14 fde=[ 35854]\n- 0xffffffffc97562b8 (offset: 0x239fd0) -> 0x47b38 fde=[ 35878]\n- 0xffffffffc97563d8 (offset: 0x23a0f0) -> 0x47b5c fde=[ 3589c]\n- 0xffffffffc97564f8 (offset: 0x23a210) -> 0x47b80 fde=[ 358c0]\n- 0xffffffffc97566b8 (offset: 0x23a3d0) -> 0x47ba4 fde=[ 358e4]\n- 0xffffffffc9756878 (offset: 0x23a590) -> 0x47bc8 fde=[ 35908]\n- 0xffffffffc9756998 (offset: 0x23a6b0) -> 0x47bec fde=[ 3592c]\n- 0xffffffffc9756ab8 (offset: 0x23a7d0) -> 0x47c10 fde=[ 35950]\n- 0xffffffffc9756c78 (offset: 0x23a990) -> 0x47c34 fde=[ 35974]\n- 0xffffffffc9756e38 (offset: 0x23ab50) -> 0x47c58 fde=[ 35998]\n- 0xffffffffc9756f58 (offset: 0x23ac70) -> 0x47c7c fde=[ 359bc]\n- 0xffffffffc9757078 (offset: 0x23ad90) -> 0x47ca0 fde=[ 359e0]\n- 0xffffffffc9757238 (offset: 0x23af50) -> 0x47cc4 fde=[ 35a04]\n- 0xffffffffc97573f8 (offset: 0x23b110) -> 0x47ce8 fde=[ 35a28]\n- 0xffffffffc9757518 (offset: 0x23b230) -> 0x47d0c fde=[ 35a4c]\n- 0xffffffffc9757638 (offset: 0x23b350) -> 0x47d30 fde=[ 35a70]\n- 0xffffffffc97577f8 (offset: 0x23b510) -> 0x47d54 fde=[ 35a94]\n- 0xffffffffc97579b8 (offset: 0x23b6d0) -> 0x47d78 fde=[ 35ab8]\n- 0xffffffffc9757ad8 (offset: 0x23b7f0) -> 0x47d9c fde=[ 35adc]\n- 0xffffffffc9757bf8 (offset: 0x23b910) -> 0x47dc0 fde=[ 35b00]\n- 0xffffffffc9757db8 (offset: 0x23bad0) -> 0x47de4 fde=[ 35b24]\n- 0xffffffffc9757f78 (offset: 0x23bc90) -> 0x47e08 fde=[ 35b48]\n- 0xffffffffc9758098 (offset: 0x23bdb0) -> 0x47e2c fde=[ 35b6c]\n- 0xffffffffc97581b8 (offset: 0x23bed0) -> 0x47e50 fde=[ 35b90]\n- 0xffffffffc9758378 (offset: 0x23c090) -> 0x47e74 fde=[ 35bb4]\n- 0xffffffffc9758538 (offset: 0x23c250) -> 0x47e98 fde=[ 35bd8]\n- 0xffffffffc9758658 (offset: 0x23c370) -> 0x47ebc fde=[ 35bfc]\n- 0xffffffffc9758778 (offset: 0x23c490) -> 0x47ee0 fde=[ 35c20]\n- 0xffffffffc9758938 (offset: 0x23c650) -> 0x47f04 fde=[ 35c44]\n- 0xffffffffc9758af8 (offset: 0x23c810) -> 0x47f28 fde=[ 35c68]\n- 0xffffffffc9758c18 (offset: 0x23c930) -> 0x47f4c fde=[ 35c8c]\n- 0xffffffffc9758d38 (offset: 0x23ca50) -> 0x47f70 fde=[ 35cb0]\n- 0xffffffffc9759a08 (offset: 0x23d720) -> 0x47f94 fde=[ 35cd4]\n- 0xffffffffc9759a38 (offset: 0x23d750) -> 0x47fac fde=[ 35cec]\n- 0xffffffffc9763e28 (offset: 0x247b40) -> 0x49850 fde=[ 37590]\n- 0xffffffffc9763fe8 (offset: 0x247d00) -> 0x49874 fde=[ 375b4]\n- 0xffffffffc97641a8 (offset: 0x247ec0) -> 0x49898 fde=[ 375d8]\n- 0xffffffffc97642c8 (offset: 0x247fe0) -> 0x498bc fde=[ 375fc]\n- 0xffffffffc97643e8 (offset: 0x248100) -> 0x498e0 fde=[ 37620]\n- 0xffffffffc97645a8 (offset: 0x2482c0) -> 0x49904 fde=[ 37644]\n- 0xffffffffc9764768 (offset: 0x248480) -> 0x49928 fde=[ 37668]\n- 0xffffffffc9764888 (offset: 0x2485a0) -> 0x4994c fde=[ 3768c]\n- 0xffffffffc97649a8 (offset: 0x2486c0) -> 0x49970 fde=[ 376b0]\n- 0xffffffffc9764b68 (offset: 0x248880) -> 0x49994 fde=[ 376d4]\n- 0xffffffffc9764d28 (offset: 0x248a40) -> 0x499b8 fde=[ 376f8]\n- 0xffffffffc9764e48 (offset: 0x248b60) -> 0x499dc fde=[ 3771c]\n- 0xffffffffc9764f68 (offset: 0x248c80) -> 0x49a00 fde=[ 37740]\n- 0xffffffffc9765128 (offset: 0x248e40) -> 0x49a24 fde=[ 37764]\n- 0xffffffffc97652e8 (offset: 0x249000) -> 0x49a48 fde=[ 37788]\n- 0xffffffffc9765408 (offset: 0x249120) -> 0x49a6c fde=[ 377ac]\n- 0xffffffffc9765528 (offset: 0x249240) -> 0x49a90 fde=[ 377d0]\n- 0xffffffffc97656e8 (offset: 0x249400) -> 0x49ab4 fde=[ 377f4]\n- 0xffffffffc97658a8 (offset: 0x2495c0) -> 0x49ad8 fde=[ 37818]\n- 0xffffffffc97659c8 (offset: 0x2496e0) -> 0x49afc fde=[ 3783c]\n- 0xffffffffc9765ae8 (offset: 0x249800) -> 0x49b20 fde=[ 37860]\n- 0xffffffffc9765ca8 (offset: 0x2499c0) -> 0x49b44 fde=[ 37884]\n- 0xffffffffc9765e68 (offset: 0x249b80) -> 0x49b68 fde=[ 378a8]\n- 0xffffffffc9765f88 (offset: 0x249ca0) -> 0x49b8c fde=[ 378cc]\n- 0xffffffffc97660a8 (offset: 0x249dc0) -> 0x49bb0 fde=[ 378f0]\n- 0xffffffffc9766268 (offset: 0x249f80) -> 0x49bd4 fde=[ 37914]\n- 0xffffffffc9766428 (offset: 0x24a140) -> 0x49bf8 fde=[ 37938]\n- 0xffffffffc9766548 (offset: 0x24a260) -> 0x49c1c fde=[ 3795c]\n- 0xffffffffc9766668 (offset: 0x24a380) -> 0x49c40 fde=[ 37980]\n- 0xffffffffc9766828 (offset: 0x24a540) -> 0x49c64 fde=[ 379a4]\n- 0xffffffffc97669e8 (offset: 0x24a700) -> 0x49c88 fde=[ 379c8]\n- 0xffffffffc9766b08 (offset: 0x24a820) -> 0x49cac fde=[ 379ec]\n- 0xffffffffc9766c28 (offset: 0x24a940) -> 0x49cd0 fde=[ 37a10]\n- 0xffffffffc9766de8 (offset: 0x24ab00) -> 0x49cf4 fde=[ 37a34]\n- 0xffffffffc9766fa8 (offset: 0x24acc0) -> 0x49d18 fde=[ 37a58]\n- 0xffffffffc97670c8 (offset: 0x24ade0) -> 0x49d3c fde=[ 37a7c]\n- 0xffffffffc97671e8 (offset: 0x24af00) -> 0x49d60 fde=[ 37aa0]\n- 0xffffffffc97673a8 (offset: 0x24b0c0) -> 0x49d84 fde=[ 37ac4]\n- 0xffffffffc9767568 (offset: 0x24b280) -> 0x49da8 fde=[ 37ae8]\n- 0xffffffffc9767688 (offset: 0x24b3a0) -> 0x49dcc fde=[ 37b0c]\n- 0xffffffffc97677a8 (offset: 0x24b4c0) -> 0x49df0 fde=[ 37b30]\n- 0xffffffffc9767968 (offset: 0x24b680) -> 0x49e14 fde=[ 37b54]\n- 0xffffffffc9767b28 (offset: 0x24b840) -> 0x49e38 fde=[ 37b78]\n- 0xffffffffc9767c48 (offset: 0x24b960) -> 0x49e5c fde=[ 37b9c]\n- 0xffffffffc9767d68 (offset: 0x24ba80) -> 0x49e80 fde=[ 37bc0]\n- 0xffffffffc9767f28 (offset: 0x24bc40) -> 0x49ea4 fde=[ 37be4]\n- 0xffffffffc97680e8 (offset: 0x24be00) -> 0x49ec8 fde=[ 37c08]\n- 0xffffffffc9768208 (offset: 0x24bf20) -> 0x49eec fde=[ 37c2c]\n- 0xffffffffc9768328 (offset: 0x24c040) -> 0x49f10 fde=[ 37c50]\n- 0xffffffffc97684e8 (offset: 0x24c200) -> 0x49f34 fde=[ 37c74]\n- 0xffffffffc97686a8 (offset: 0x24c3c0) -> 0x49f58 fde=[ 37c98]\n- 0xffffffffc97687c8 (offset: 0x24c4e0) -> 0x49f7c fde=[ 37cbc]\n- 0xffffffffc97688e8 (offset: 0x24c600) -> 0x49fa0 fde=[ 37ce0]\n- 0xffffffffc9768aa8 (offset: 0x24c7c0) -> 0x49fc4 fde=[ 37d04]\n- 0xffffffffc9768c68 (offset: 0x24c980) -> 0x49fe8 fde=[ 37d28]\n- 0xffffffffc9768d88 (offset: 0x24caa0) -> 0x4a00c fde=[ 37d4c]\n- 0xffffffffc9768ea8 (offset: 0x24cbc0) -> 0x4a030 fde=[ 37d70]\n- 0xffffffffc9769068 (offset: 0x24cd80) -> 0x4a054 fde=[ 37d94]\n- 0xffffffffc9769228 (offset: 0x24cf40) -> 0x4a078 fde=[ 37db8]\n- 0xffffffffc9769348 (offset: 0x24d060) -> 0x4a09c fde=[ 37ddc]\n- 0xffffffffc9769468 (offset: 0x24d180) -> 0x4a0c0 fde=[ 37e00]\n- 0xffffffffc9769628 (offset: 0x24d340) -> 0x4a0e4 fde=[ 37e24]\n- 0xffffffffc97697e8 (offset: 0x24d500) -> 0x4a108 fde=[ 37e48]\n- 0xffffffffc9769908 (offset: 0x24d620) -> 0x4a12c fde=[ 37e6c]\n- 0xffffffffc9769a28 (offset: 0x24d740) -> 0x4a150 fde=[ 37e90]\n- 0xffffffffc976a6f8 (offset: 0x24e410) -> 0x4a174 fde=[ 37eb4]\n- 0xffffffffc976a728 (offset: 0x24e440) -> 0x4a18c fde=[ 37ecc]\n- 0xffffffffc9774b18 (offset: 0x258830) -> 0x4ba30 fde=[ 39770]\n- 0xffffffffc9774cd8 (offset: 0x2589f0) -> 0x4ba54 fde=[ 39794]\n- 0xffffffffc9774e98 (offset: 0x258bb0) -> 0x4ba78 fde=[ 397b8]\n- 0xffffffffc9774fb8 (offset: 0x258cd0) -> 0x4ba9c fde=[ 397dc]\n- 0xffffffffc97750d8 (offset: 0x258df0) -> 0x4bac0 fde=[ 39800]\n- 0xffffffffc9775298 (offset: 0x258fb0) -> 0x4bae4 fde=[ 39824]\n- 0xffffffffc9775458 (offset: 0x259170) -> 0x4bb08 fde=[ 39848]\n- 0xffffffffc9775578 (offset: 0x259290) -> 0x4bb2c fde=[ 3986c]\n- 0xffffffffc9775698 (offset: 0x2593b0) -> 0x4bb50 fde=[ 39890]\n- 0xffffffffc9775858 (offset: 0x259570) -> 0x4bb74 fde=[ 398b4]\n- 0xffffffffc9775a18 (offset: 0x259730) -> 0x4bb98 fde=[ 398d8]\n- 0xffffffffc9775b38 (offset: 0x259850) -> 0x4bbbc fde=[ 398fc]\n- 0xffffffffc9775c58 (offset: 0x259970) -> 0x4bbe0 fde=[ 39920]\n- 0xffffffffc9775e18 (offset: 0x259b30) -> 0x4bc04 fde=[ 39944]\n- 0xffffffffc9775fd8 (offset: 0x259cf0) -> 0x4bc28 fde=[ 39968]\n- 0xffffffffc97760f8 (offset: 0x259e10) -> 0x4bc4c fde=[ 3998c]\n- 0xffffffffc9776218 (offset: 0x259f30) -> 0x4bc70 fde=[ 399b0]\n- 0xffffffffc97763d8 (offset: 0x25a0f0) -> 0x4bc94 fde=[ 399d4]\n- 0xffffffffc9776598 (offset: 0x25a2b0) -> 0x4bcb8 fde=[ 399f8]\n- 0xffffffffc97766b8 (offset: 0x25a3d0) -> 0x4bcdc fde=[ 39a1c]\n- 0xffffffffc97767d8 (offset: 0x25a4f0) -> 0x4bd00 fde=[ 39a40]\n- 0xffffffffc9776998 (offset: 0x25a6b0) -> 0x4bd24 fde=[ 39a64]\n- 0xffffffffc9776b58 (offset: 0x25a870) -> 0x4bd48 fde=[ 39a88]\n- 0xffffffffc9776c78 (offset: 0x25a990) -> 0x4bd6c fde=[ 39aac]\n- 0xffffffffc9776d98 (offset: 0x25aab0) -> 0x4bd90 fde=[ 39ad0]\n- 0xffffffffc9776f58 (offset: 0x25ac70) -> 0x4bdb4 fde=[ 39af4]\n- 0xffffffffc9777118 (offset: 0x25ae30) -> 0x4bdd8 fde=[ 39b18]\n- 0xffffffffc9777238 (offset: 0x25af50) -> 0x4bdfc fde=[ 39b3c]\n- 0xffffffffc9777358 (offset: 0x25b070) -> 0x4be20 fde=[ 39b60]\n- 0xffffffffc9777518 (offset: 0x25b230) -> 0x4be44 fde=[ 39b84]\n- 0xffffffffc97776d8 (offset: 0x25b3f0) -> 0x4be68 fde=[ 39ba8]\n- 0xffffffffc97777f8 (offset: 0x25b510) -> 0x4be8c fde=[ 39bcc]\n- 0xffffffffc9777918 (offset: 0x25b630) -> 0x4beb0 fde=[ 39bf0]\n- 0xffffffffc9777ad8 (offset: 0x25b7f0) -> 0x4bed4 fde=[ 39c14]\n- 0xffffffffc9777c98 (offset: 0x25b9b0) -> 0x4bef8 fde=[ 39c38]\n- 0xffffffffc9777db8 (offset: 0x25bad0) -> 0x4bf1c fde=[ 39c5c]\n- 0xffffffffc9777ed8 (offset: 0x25bbf0) -> 0x4bf40 fde=[ 39c80]\n- 0xffffffffc9778098 (offset: 0x25bdb0) -> 0x4bf64 fde=[ 39ca4]\n- 0xffffffffc9778258 (offset: 0x25bf70) -> 0x4bf88 fde=[ 39cc8]\n- 0xffffffffc9778378 (offset: 0x25c090) -> 0x4bfac fde=[ 39cec]\n- 0xffffffffc9778498 (offset: 0x25c1b0) -> 0x4bfd0 fde=[ 39d10]\n- 0xffffffffc9778658 (offset: 0x25c370) -> 0x4bff4 fde=[ 39d34]\n- 0xffffffffc9778818 (offset: 0x25c530) -> 0x4c018 fde=[ 39d58]\n- 0xffffffffc9778938 (offset: 0x25c650) -> 0x4c03c fde=[ 39d7c]\n- 0xffffffffc9778a58 (offset: 0x25c770) -> 0x4c060 fde=[ 39da0]\n- 0xffffffffc9778c18 (offset: 0x25c930) -> 0x4c084 fde=[ 39dc4]\n- 0xffffffffc9778dd8 (offset: 0x25caf0) -> 0x4c0a8 fde=[ 39de8]\n- 0xffffffffc9778ef8 (offset: 0x25cc10) -> 0x4c0cc fde=[ 39e0c]\n- 0xffffffffc9779018 (offset: 0x25cd30) -> 0x4c0f0 fde=[ 39e30]\n- 0xffffffffc97791d8 (offset: 0x25cef0) -> 0x4c114 fde=[ 39e54]\n- 0xffffffffc9779398 (offset: 0x25d0b0) -> 0x4c138 fde=[ 39e78]\n- 0xffffffffc97794b8 (offset: 0x25d1d0) -> 0x4c15c fde=[ 39e9c]\n- 0xffffffffc97795d8 (offset: 0x25d2f0) -> 0x4c180 fde=[ 39ec0]\n- 0xffffffffc9779798 (offset: 0x25d4b0) -> 0x4c1a4 fde=[ 39ee4]\n- 0xffffffffc9779958 (offset: 0x25d670) -> 0x4c1c8 fde=[ 39f08]\n- 0xffffffffc9779a78 (offset: 0x25d790) -> 0x4c1ec fde=[ 39f2c]\n- 0xffffffffc9779b98 (offset: 0x25d8b0) -> 0x4c210 fde=[ 39f50]\n- 0xffffffffc9779d58 (offset: 0x25da70) -> 0x4c234 fde=[ 39f74]\n- 0xffffffffc9779f18 (offset: 0x25dc30) -> 0x4c258 fde=[ 39f98]\n- 0xffffffffc977a038 (offset: 0x25dd50) -> 0x4c27c fde=[ 39fbc]\n- 0xffffffffc977a158 (offset: 0x25de70) -> 0x4c2a0 fde=[ 39fe0]\n- 0xffffffffc977a318 (offset: 0x25e030) -> 0x4c2c4 fde=[ 3a004]\n- 0xffffffffc977a4d8 (offset: 0x25e1f0) -> 0x4c2e8 fde=[ 3a028]\n- 0xffffffffc977a5f8 (offset: 0x25e310) -> 0x4c30c fde=[ 3a04c]\n- 0xffffffffc977a718 (offset: 0x25e430) -> 0x4c330 fde=[ 3a070]\n- 0xffffffffc977b3e8 (offset: 0x25f100) -> 0x4c354 fde=[ 3a094]\n- 0xffffffffc977b418 (offset: 0x25f130) -> 0x4c36c fde=[ 3a0ac]\n- 0xffffffffc9785968 (offset: 0x269680) -> 0x4dc10 fde=[ 3b950]\n- 0xffffffffc9785b28 (offset: 0x269840) -> 0x4dc34 fde=[ 3b974]\n- 0xffffffffc9785ce8 (offset: 0x269a00) -> 0x4dc58 fde=[ 3b998]\n- 0xffffffffc9785e08 (offset: 0x269b20) -> 0x4dc7c fde=[ 3b9bc]\n- 0xffffffffc9785f28 (offset: 0x269c40) -> 0x4dca0 fde=[ 3b9e0]\n- 0xffffffffc97860e8 (offset: 0x269e00) -> 0x4dcc4 fde=[ 3ba04]\n- 0xffffffffc97862a8 (offset: 0x269fc0) -> 0x4dce8 fde=[ 3ba28]\n- 0xffffffffc97863c8 (offset: 0x26a0e0) -> 0x4dd0c fde=[ 3ba4c]\n- 0xffffffffc97864e8 (offset: 0x26a200) -> 0x4dd30 fde=[ 3ba70]\n- 0xffffffffc97866a8 (offset: 0x26a3c0) -> 0x4dd54 fde=[ 3ba94]\n- 0xffffffffc9786868 (offset: 0x26a580) -> 0x4dd78 fde=[ 3bab8]\n- 0xffffffffc9786988 (offset: 0x26a6a0) -> 0x4dd9c fde=[ 3badc]\n- 0xffffffffc9786aa8 (offset: 0x26a7c0) -> 0x4ddc0 fde=[ 3bb00]\n- 0xffffffffc9786c68 (offset: 0x26a980) -> 0x4dde4 fde=[ 3bb24]\n- 0xffffffffc9786e28 (offset: 0x26ab40) -> 0x4de08 fde=[ 3bb48]\n- 0xffffffffc9786f48 (offset: 0x26ac60) -> 0x4de2c fde=[ 3bb6c]\n- 0xffffffffc9787068 (offset: 0x26ad80) -> 0x4de50 fde=[ 3bb90]\n- 0xffffffffc9787228 (offset: 0x26af40) -> 0x4de74 fde=[ 3bbb4]\n- 0xffffffffc97873e8 (offset: 0x26b100) -> 0x4de98 fde=[ 3bbd8]\n- 0xffffffffc9787508 (offset: 0x26b220) -> 0x4debc fde=[ 3bbfc]\n- 0xffffffffc9787628 (offset: 0x26b340) -> 0x4dee0 fde=[ 3bc20]\n- 0xffffffffc97877e8 (offset: 0x26b500) -> 0x4df04 fde=[ 3bc44]\n- 0xffffffffc97879a8 (offset: 0x26b6c0) -> 0x4df28 fde=[ 3bc68]\n- 0xffffffffc9787ac8 (offset: 0x26b7e0) -> 0x4df4c fde=[ 3bc8c]\n- 0xffffffffc9787be8 (offset: 0x26b900) -> 0x4df70 fde=[ 3bcb0]\n- 0xffffffffc9787da8 (offset: 0x26bac0) -> 0x4df94 fde=[ 3bcd4]\n- 0xffffffffc9787f68 (offset: 0x26bc80) -> 0x4dfb8 fde=[ 3bcf8]\n- 0xffffffffc9788088 (offset: 0x26bda0) -> 0x4dfdc fde=[ 3bd1c]\n- 0xffffffffc97881a8 (offset: 0x26bec0) -> 0x4e000 fde=[ 3bd40]\n- 0xffffffffc9788368 (offset: 0x26c080) -> 0x4e024 fde=[ 3bd64]\n- 0xffffffffc9788528 (offset: 0x26c240) -> 0x4e048 fde=[ 3bd88]\n- 0xffffffffc9788648 (offset: 0x26c360) -> 0x4e06c fde=[ 3bdac]\n- 0xffffffffc9788768 (offset: 0x26c480) -> 0x4e090 fde=[ 3bdd0]\n- 0xffffffffc9788928 (offset: 0x26c640) -> 0x4e0b4 fde=[ 3bdf4]\n- 0xffffffffc9788ae8 (offset: 0x26c800) -> 0x4e0d8 fde=[ 3be18]\n- 0xffffffffc9788c08 (offset: 0x26c920) -> 0x4e0fc fde=[ 3be3c]\n- 0xffffffffc9788d28 (offset: 0x26ca40) -> 0x4e120 fde=[ 3be60]\n- 0xffffffffc9788ee8 (offset: 0x26cc00) -> 0x4e144 fde=[ 3be84]\n- 0xffffffffc97890a8 (offset: 0x26cdc0) -> 0x4e168 fde=[ 3bea8]\n- 0xffffffffc97891c8 (offset: 0x26cee0) -> 0x4e18c fde=[ 3becc]\n- 0xffffffffc97892e8 (offset: 0x26d000) -> 0x4e1b0 fde=[ 3bef0]\n- 0xffffffffc97894a8 (offset: 0x26d1c0) -> 0x4e1d4 fde=[ 3bf14]\n- 0xffffffffc9789668 (offset: 0x26d380) -> 0x4e1f8 fde=[ 3bf38]\n- 0xffffffffc9789788 (offset: 0x26d4a0) -> 0x4e21c fde=[ 3bf5c]\n- 0xffffffffc97898a8 (offset: 0x26d5c0) -> 0x4e240 fde=[ 3bf80]\n- 0xffffffffc9789a68 (offset: 0x26d780) -> 0x4e264 fde=[ 3bfa4]\n- 0xffffffffc9789c28 (offset: 0x26d940) -> 0x4e288 fde=[ 3bfc8]\n- 0xffffffffc9789d48 (offset: 0x26da60) -> 0x4e2ac fde=[ 3bfec]\n- 0xffffffffc9789e68 (offset: 0x26db80) -> 0x4e2d0 fde=[ 3c010]\n- 0xffffffffc978a028 (offset: 0x26dd40) -> 0x4e2f4 fde=[ 3c034]\n- 0xffffffffc978a1e8 (offset: 0x26df00) -> 0x4e318 fde=[ 3c058]\n- 0xffffffffc978a308 (offset: 0x26e020) -> 0x4e33c fde=[ 3c07c]\n- 0xffffffffc978a428 (offset: 0x26e140) -> 0x4e360 fde=[ 3c0a0]\n- 0xffffffffc978a5e8 (offset: 0x26e300) -> 0x4e384 fde=[ 3c0c4]\n- 0xffffffffc978a7a8 (offset: 0x26e4c0) -> 0x4e3a8 fde=[ 3c0e8]\n- 0xffffffffc978a8c8 (offset: 0x26e5e0) -> 0x4e3cc fde=[ 3c10c]\n- 0xffffffffc978a9e8 (offset: 0x26e700) -> 0x4e3f0 fde=[ 3c130]\n- 0xffffffffc978aba8 (offset: 0x26e8c0) -> 0x4e414 fde=[ 3c154]\n- 0xffffffffc978ad68 (offset: 0x26ea80) -> 0x4e438 fde=[ 3c178]\n- 0xffffffffc978ae88 (offset: 0x26eba0) -> 0x4e45c fde=[ 3c19c]\n- 0xffffffffc978afa8 (offset: 0x26ecc0) -> 0x4e480 fde=[ 3c1c0]\n- 0xffffffffc978b168 (offset: 0x26ee80) -> 0x4e4a4 fde=[ 3c1e4]\n- 0xffffffffc978b328 (offset: 0x26f040) -> 0x4e4c8 fde=[ 3c208]\n- 0xffffffffc978b448 (offset: 0x26f160) -> 0x4e4ec fde=[ 3c22c]\n- 0xffffffffc978b568 (offset: 0x26f280) -> 0x4e510 fde=[ 3c250]\n- 0xffffffffc978c238 (offset: 0x26ff50) -> 0x4e534 fde=[ 3c274]\n- 0xffffffffc978c268 (offset: 0x26ff80) -> 0x4e54c fde=[ 3c28c]\n- 0xffffffffc9796658 (offset: 0x27a370) -> 0x4fdf0 fde=[ 3db30]\n- 0xffffffffc9796818 (offset: 0x27a530) -> 0x4fe14 fde=[ 3db54]\n- 0xffffffffc97969d8 (offset: 0x27a6f0) -> 0x4fe38 fde=[ 3db78]\n- 0xffffffffc9796af8 (offset: 0x27a810) -> 0x4fe5c fde=[ 3db9c]\n- 0xffffffffc9796c18 (offset: 0x27a930) -> 0x4fe80 fde=[ 3dbc0]\n- 0xffffffffc9796dd8 (offset: 0x27aaf0) -> 0x4fea4 fde=[ 3dbe4]\n- 0xffffffffc9796f98 (offset: 0x27acb0) -> 0x4fec8 fde=[ 3dc08]\n- 0xffffffffc97970b8 (offset: 0x27add0) -> 0x4feec fde=[ 3dc2c]\n- 0xffffffffc97971d8 (offset: 0x27aef0) -> 0x4ff10 fde=[ 3dc50]\n- 0xffffffffc9797398 (offset: 0x27b0b0) -> 0x4ff34 fde=[ 3dc74]\n- 0xffffffffc9797558 (offset: 0x27b270) -> 0x4ff58 fde=[ 3dc98]\n- 0xffffffffc9797678 (offset: 0x27b390) -> 0x4ff7c fde=[ 3dcbc]\n- 0xffffffffc9797798 (offset: 0x27b4b0) -> 0x4ffa0 fde=[ 3dce0]\n- 0xffffffffc9797958 (offset: 0x27b670) -> 0x4ffc4 fde=[ 3dd04]\n- 0xffffffffc9797b18 (offset: 0x27b830) -> 0x4ffe8 fde=[ 3dd28]\n- 0xffffffffc9797c38 (offset: 0x27b950) -> 0x5000c fde=[ 3dd4c]\n- 0xffffffffc9797d58 (offset: 0x27ba70) -> 0x50030 fde=[ 3dd70]\n- 0xffffffffc9797f18 (offset: 0x27bc30) -> 0x50054 fde=[ 3dd94]\n- 0xffffffffc97980d8 (offset: 0x27bdf0) -> 0x50078 fde=[ 3ddb8]\n- 0xffffffffc97981f8 (offset: 0x27bf10) -> 0x5009c fde=[ 3dddc]\n- 0xffffffffc9798318 (offset: 0x27c030) -> 0x500c0 fde=[ 3de00]\n- 0xffffffffc97984d8 (offset: 0x27c1f0) -> 0x500e4 fde=[ 3de24]\n- 0xffffffffc9798698 (offset: 0x27c3b0) -> 0x50108 fde=[ 3de48]\n- 0xffffffffc97987b8 (offset: 0x27c4d0) -> 0x5012c fde=[ 3de6c]\n- 0xffffffffc97988d8 (offset: 0x27c5f0) -> 0x50150 fde=[ 3de90]\n- 0xffffffffc9798a98 (offset: 0x27c7b0) -> 0x50174 fde=[ 3deb4]\n- 0xffffffffc9798c58 (offset: 0x27c970) -> 0x50198 fde=[ 3ded8]\n- 0xffffffffc9798d78 (offset: 0x27ca90) -> 0x501bc fde=[ 3defc]\n- 0xffffffffc9798e98 (offset: 0x27cbb0) -> 0x501e0 fde=[ 3df20]\n- 0xffffffffc9799058 (offset: 0x27cd70) -> 0x50204 fde=[ 3df44]\n- 0xffffffffc9799218 (offset: 0x27cf30) -> 0x50228 fde=[ 3df68]\n- 0xffffffffc9799338 (offset: 0x27d050) -> 0x5024c fde=[ 3df8c]\n- 0xffffffffc9799458 (offset: 0x27d170) -> 0x50270 fde=[ 3dfb0]\n- 0xffffffffc9799618 (offset: 0x27d330) -> 0x50294 fde=[ 3dfd4]\n- 0xffffffffc97997d8 (offset: 0x27d4f0) -> 0x502b8 fde=[ 3dff8]\n- 0xffffffffc97998f8 (offset: 0x27d610) -> 0x502dc fde=[ 3e01c]\n- 0xffffffffc9799a18 (offset: 0x27d730) -> 0x50300 fde=[ 3e040]\n- 0xffffffffc9799bd8 (offset: 0x27d8f0) -> 0x50324 fde=[ 3e064]\n- 0xffffffffc9799d98 (offset: 0x27dab0) -> 0x50348 fde=[ 3e088]\n- 0xffffffffc9799eb8 (offset: 0x27dbd0) -> 0x5036c fde=[ 3e0ac]\n- 0xffffffffc9799fd8 (offset: 0x27dcf0) -> 0x50390 fde=[ 3e0d0]\n- 0xffffffffc979a198 (offset: 0x27deb0) -> 0x503b4 fde=[ 3e0f4]\n- 0xffffffffc979a358 (offset: 0x27e070) -> 0x503d8 fde=[ 3e118]\n- 0xffffffffc979a478 (offset: 0x27e190) -> 0x503fc fde=[ 3e13c]\n- 0xffffffffc979a598 (offset: 0x27e2b0) -> 0x50420 fde=[ 3e160]\n- 0xffffffffc979a758 (offset: 0x27e470) -> 0x50444 fde=[ 3e184]\n- 0xffffffffc979a918 (offset: 0x27e630) -> 0x50468 fde=[ 3e1a8]\n- 0xffffffffc979aa38 (offset: 0x27e750) -> 0x5048c fde=[ 3e1cc]\n- 0xffffffffc979ab58 (offset: 0x27e870) -> 0x504b0 fde=[ 3e1f0]\n- 0xffffffffc979ad18 (offset: 0x27ea30) -> 0x504d4 fde=[ 3e214]\n- 0xffffffffc979aed8 (offset: 0x27ebf0) -> 0x504f8 fde=[ 3e238]\n- 0xffffffffc979aff8 (offset: 0x27ed10) -> 0x5051c fde=[ 3e25c]\n- 0xffffffffc979b118 (offset: 0x27ee30) -> 0x50540 fde=[ 3e280]\n- 0xffffffffc979b2d8 (offset: 0x27eff0) -> 0x50564 fde=[ 3e2a4]\n- 0xffffffffc979b498 (offset: 0x27f1b0) -> 0x50588 fde=[ 3e2c8]\n- 0xffffffffc979b5b8 (offset: 0x27f2d0) -> 0x505ac fde=[ 3e2ec]\n- 0xffffffffc979b6d8 (offset: 0x27f3f0) -> 0x505d0 fde=[ 3e310]\n- 0xffffffffc979b898 (offset: 0x27f5b0) -> 0x505f4 fde=[ 3e334]\n- 0xffffffffc979ba58 (offset: 0x27f770) -> 0x50618 fde=[ 3e358]\n- 0xffffffffc979bb78 (offset: 0x27f890) -> 0x5063c fde=[ 3e37c]\n- 0xffffffffc979bc98 (offset: 0x27f9b0) -> 0x50660 fde=[ 3e3a0]\n- 0xffffffffc979be58 (offset: 0x27fb70) -> 0x50684 fde=[ 3e3c4]\n- 0xffffffffc979c018 (offset: 0x27fd30) -> 0x506a8 fde=[ 3e3e8]\n- 0xffffffffc979c138 (offset: 0x27fe50) -> 0x506cc fde=[ 3e40c]\n- 0xffffffffc979c258 (offset: 0x27ff70) -> 0x506f0 fde=[ 3e430]\n- 0xffffffffc979cf28 (offset: 0x280c40) -> 0x50714 fde=[ 3e454]\n- 0xffffffffc979cf58 (offset: 0x280c70) -> 0x5072c fde=[ 3e46c]\n- 0xffffffffc97a7348 (offset: 0x28b060) -> 0x51fd0 fde=[ 3fd10]\n- 0xffffffffc97a7508 (offset: 0x28b220) -> 0x51ff4 fde=[ 3fd34]\n- 0xffffffffc97a76c8 (offset: 0x28b3e0) -> 0x52018 fde=[ 3fd58]\n- 0xffffffffc97a77e8 (offset: 0x28b500) -> 0x5203c fde=[ 3fd7c]\n- 0xffffffffc97a7908 (offset: 0x28b620) -> 0x52060 fde=[ 3fda0]\n- 0xffffffffc97a7ac8 (offset: 0x28b7e0) -> 0x52084 fde=[ 3fdc4]\n- 0xffffffffc97a7c88 (offset: 0x28b9a0) -> 0x520a8 fde=[ 3fde8]\n- 0xffffffffc97a7da8 (offset: 0x28bac0) -> 0x520cc fde=[ 3fe0c]\n- 0xffffffffc97a7ec8 (offset: 0x28bbe0) -> 0x520f0 fde=[ 3fe30]\n- 0xffffffffc97a8088 (offset: 0x28bda0) -> 0x52114 fde=[ 3fe54]\n- 0xffffffffc97a8248 (offset: 0x28bf60) -> 0x52138 fde=[ 3fe78]\n- 0xffffffffc97a8368 (offset: 0x28c080) -> 0x5215c fde=[ 3fe9c]\n- 0xffffffffc97a8488 (offset: 0x28c1a0) -> 0x52180 fde=[ 3fec0]\n- 0xffffffffc97a8648 (offset: 0x28c360) -> 0x521a4 fde=[ 3fee4]\n- 0xffffffffc97a8808 (offset: 0x28c520) -> 0x521c8 fde=[ 3ff08]\n- 0xffffffffc97a8928 (offset: 0x28c640) -> 0x521ec fde=[ 3ff2c]\n- 0xffffffffc97a8a48 (offset: 0x28c760) -> 0x52210 fde=[ 3ff50]\n- 0xffffffffc97a8c08 (offset: 0x28c920) -> 0x52234 fde=[ 3ff74]\n- 0xffffffffc97a8dc8 (offset: 0x28cae0) -> 0x52258 fde=[ 3ff98]\n- 0xffffffffc97a8ee8 (offset: 0x28cc00) -> 0x5227c fde=[ 3ffbc]\n- 0xffffffffc97a9008 (offset: 0x28cd20) -> 0x522a0 fde=[ 3ffe0]\n- 0xffffffffc97a91c8 (offset: 0x28cee0) -> 0x522c4 fde=[ 40004]\n- 0xffffffffc97a9388 (offset: 0x28d0a0) -> 0x522e8 fde=[ 40028]\n- 0xffffffffc97a94a8 (offset: 0x28d1c0) -> 0x5230c fde=[ 4004c]\n- 0xffffffffc97a95c8 (offset: 0x28d2e0) -> 0x52330 fde=[ 40070]\n- 0xffffffffc97a9788 (offset: 0x28d4a0) -> 0x52354 fde=[ 40094]\n- 0xffffffffc97a9948 (offset: 0x28d660) -> 0x52378 fde=[ 400b8]\n- 0xffffffffc97a9a68 (offset: 0x28d780) -> 0x5239c fde=[ 400dc]\n- 0xffffffffc97a9b88 (offset: 0x28d8a0) -> 0x523c0 fde=[ 40100]\n- 0xffffffffc97a9d48 (offset: 0x28da60) -> 0x523e4 fde=[ 40124]\n- 0xffffffffc97a9f08 (offset: 0x28dc20) -> 0x52408 fde=[ 40148]\n- 0xffffffffc97aa028 (offset: 0x28dd40) -> 0x5242c fde=[ 4016c]\n- 0xffffffffc97aa148 (offset: 0x28de60) -> 0x52450 fde=[ 40190]\n- 0xffffffffc97aa308 (offset: 0x28e020) -> 0x52474 fde=[ 401b4]\n- 0xffffffffc97aa4c8 (offset: 0x28e1e0) -> 0x52498 fde=[ 401d8]\n- 0xffffffffc97aa5e8 (offset: 0x28e300) -> 0x524bc fde=[ 401fc]\n- 0xffffffffc97aa708 (offset: 0x28e420) -> 0x524e0 fde=[ 40220]\n- 0xffffffffc97aa8c8 (offset: 0x28e5e0) -> 0x52504 fde=[ 40244]\n- 0xffffffffc97aaa88 (offset: 0x28e7a0) -> 0x52528 fde=[ 40268]\n- 0xffffffffc97aaba8 (offset: 0x28e8c0) -> 0x5254c fde=[ 4028c]\n- 0xffffffffc97aacc8 (offset: 0x28e9e0) -> 0x52570 fde=[ 402b0]\n- 0xffffffffc97aae88 (offset: 0x28eba0) -> 0x52594 fde=[ 402d4]\n- 0xffffffffc97ab048 (offset: 0x28ed60) -> 0x525b8 fde=[ 402f8]\n- 0xffffffffc97ab168 (offset: 0x28ee80) -> 0x525dc fde=[ 4031c]\n- 0xffffffffc97ab288 (offset: 0x28efa0) -> 0x52600 fde=[ 40340]\n- 0xffffffffc97ab448 (offset: 0x28f160) -> 0x52624 fde=[ 40364]\n- 0xffffffffc97ab608 (offset: 0x28f320) -> 0x52648 fde=[ 40388]\n- 0xffffffffc97ab728 (offset: 0x28f440) -> 0x5266c fde=[ 403ac]\n- 0xffffffffc97ab848 (offset: 0x28f560) -> 0x52690 fde=[ 403d0]\n- 0xffffffffc97aba08 (offset: 0x28f720) -> 0x526b4 fde=[ 403f4]\n- 0xffffffffc97abbc8 (offset: 0x28f8e0) -> 0x526d8 fde=[ 40418]\n- 0xffffffffc97abce8 (offset: 0x28fa00) -> 0x526fc fde=[ 4043c]\n- 0xffffffffc97abe08 (offset: 0x28fb20) -> 0x52720 fde=[ 40460]\n- 0xffffffffc97abfc8 (offset: 0x28fce0) -> 0x52744 fde=[ 40484]\n- 0xffffffffc97ac188 (offset: 0x28fea0) -> 0x52768 fde=[ 404a8]\n- 0xffffffffc97ac2a8 (offset: 0x28ffc0) -> 0x5278c fde=[ 404cc]\n- 0xffffffffc97ac3c8 (offset: 0x2900e0) -> 0x527b0 fde=[ 404f0]\n- 0xffffffffc97ac588 (offset: 0x2902a0) -> 0x527d4 fde=[ 40514]\n- 0xffffffffc97ac748 (offset: 0x290460) -> 0x527f8 fde=[ 40538]\n- 0xffffffffc97ac868 (offset: 0x290580) -> 0x5281c fde=[ 4055c]\n- 0xffffffffc97ac988 (offset: 0x2906a0) -> 0x52840 fde=[ 40580]\n- 0xffffffffc97acb48 (offset: 0x290860) -> 0x52864 fde=[ 405a4]\n- 0xffffffffc97acd08 (offset: 0x290a20) -> 0x52888 fde=[ 405c8]\n- 0xffffffffc97ace28 (offset: 0x290b40) -> 0x528ac fde=[ 405ec]\n- 0xffffffffc97acf48 (offset: 0x290c60) -> 0x528d0 fde=[ 40610]\n- 0xffffffffc97adc18 (offset: 0x291930) -> 0x528f4 fde=[ 40634]\n- 0xffffffffc97adc48 (offset: 0x291960) -> 0x5290c fde=[ 4064c]\n- 0xffffffffc97b8218 (offset: 0x29bf30) -> 0x541b0 fde=[ 41ef0]\n- 0xffffffffc97b83d8 (offset: 0x29c0f0) -> 0x541d4 fde=[ 41f14]\n- 0xffffffffc97b8598 (offset: 0x29c2b0) -> 0x541f8 fde=[ 41f38]\n- 0xffffffffc97b86b8 (offset: 0x29c3d0) -> 0x5421c fde=[ 41f5c]\n- 0xffffffffc97b87d8 (offset: 0x29c4f0) -> 0x54240 fde=[ 41f80]\n- 0xffffffffc97b8998 (offset: 0x29c6b0) -> 0x54264 fde=[ 41fa4]\n- 0xffffffffc97b8b58 (offset: 0x29c870) -> 0x54288 fde=[ 41fc8]\n- 0xffffffffc97b8c78 (offset: 0x29c990) -> 0x542ac fde=[ 41fec]\n- 0xffffffffc97b8d98 (offset: 0x29cab0) -> 0x542d0 fde=[ 42010]\n- 0xffffffffc97b8f58 (offset: 0x29cc70) -> 0x542f4 fde=[ 42034]\n- 0xffffffffc97b9118 (offset: 0x29ce30) -> 0x54318 fde=[ 42058]\n- 0xffffffffc97b9238 (offset: 0x29cf50) -> 0x5433c fde=[ 4207c]\n- 0xffffffffc97b9358 (offset: 0x29d070) -> 0x54360 fde=[ 420a0]\n- 0xffffffffc97b9518 (offset: 0x29d230) -> 0x54384 fde=[ 420c4]\n- 0xffffffffc97b96d8 (offset: 0x29d3f0) -> 0x543a8 fde=[ 420e8]\n- 0xffffffffc97b97f8 (offset: 0x29d510) -> 0x543cc fde=[ 4210c]\n- 0xffffffffc97b9918 (offset: 0x29d630) -> 0x543f0 fde=[ 42130]\n- 0xffffffffc97b9ad8 (offset: 0x29d7f0) -> 0x54414 fde=[ 42154]\n- 0xffffffffc97b9c98 (offset: 0x29d9b0) -> 0x54438 fde=[ 42178]\n- 0xffffffffc97b9db8 (offset: 0x29dad0) -> 0x5445c fde=[ 4219c]\n- 0xffffffffc97b9ed8 (offset: 0x29dbf0) -> 0x54480 fde=[ 421c0]\n- 0xffffffffc97ba098 (offset: 0x29ddb0) -> 0x544a4 fde=[ 421e4]\n- 0xffffffffc97ba258 (offset: 0x29df70) -> 0x544c8 fde=[ 42208]\n- 0xffffffffc97ba378 (offset: 0x29e090) -> 0x544ec fde=[ 4222c]\n- 0xffffffffc97ba498 (offset: 0x29e1b0) -> 0x54510 fde=[ 42250]\n- 0xffffffffc97ba658 (offset: 0x29e370) -> 0x54534 fde=[ 42274]\n- 0xffffffffc97ba818 (offset: 0x29e530) -> 0x54558 fde=[ 42298]\n- 0xffffffffc97ba938 (offset: 0x29e650) -> 0x5457c fde=[ 422bc]\n- 0xffffffffc97baa58 (offset: 0x29e770) -> 0x545a0 fde=[ 422e0]\n- 0xffffffffc97bac18 (offset: 0x29e930) -> 0x545c4 fde=[ 42304]\n- 0xffffffffc97badd8 (offset: 0x29eaf0) -> 0x545e8 fde=[ 42328]\n- 0xffffffffc97baef8 (offset: 0x29ec10) -> 0x5460c fde=[ 4234c]\n- 0xffffffffc97bb018 (offset: 0x29ed30) -> 0x54630 fde=[ 42370]\n- 0xffffffffc97bb1d8 (offset: 0x29eef0) -> 0x54654 fde=[ 42394]\n- 0xffffffffc97bb398 (offset: 0x29f0b0) -> 0x54678 fde=[ 423b8]\n- 0xffffffffc97bb4b8 (offset: 0x29f1d0) -> 0x5469c fde=[ 423dc]\n- 0xffffffffc97bb5d8 (offset: 0x29f2f0) -> 0x546c0 fde=[ 42400]\n- 0xffffffffc97bb798 (offset: 0x29f4b0) -> 0x546e4 fde=[ 42424]\n- 0xffffffffc97bb958 (offset: 0x29f670) -> 0x54708 fde=[ 42448]\n- 0xffffffffc97bba78 (offset: 0x29f790) -> 0x5472c fde=[ 4246c]\n- 0xffffffffc97bbb98 (offset: 0x29f8b0) -> 0x54750 fde=[ 42490]\n- 0xffffffffc97bbd58 (offset: 0x29fa70) -> 0x54774 fde=[ 424b4]\n- 0xffffffffc97bbf18 (offset: 0x29fc30) -> 0x54798 fde=[ 424d8]\n- 0xffffffffc97bc038 (offset: 0x29fd50) -> 0x547bc fde=[ 424fc]\n- 0xffffffffc97bc158 (offset: 0x29fe70) -> 0x547e0 fde=[ 42520]\n- 0xffffffffc97bc318 (offset: 0x2a0030) -> 0x54804 fde=[ 42544]\n- 0xffffffffc97bc4d8 (offset: 0x2a01f0) -> 0x54828 fde=[ 42568]\n- 0xffffffffc97bc5f8 (offset: 0x2a0310) -> 0x5484c fde=[ 4258c]\n- 0xffffffffc97bc718 (offset: 0x2a0430) -> 0x54870 fde=[ 425b0]\n- 0xffffffffc97bc8d8 (offset: 0x2a05f0) -> 0x54894 fde=[ 425d4]\n- 0xffffffffc97bca98 (offset: 0x2a07b0) -> 0x548b8 fde=[ 425f8]\n- 0xffffffffc97bcbb8 (offset: 0x2a08d0) -> 0x548dc fde=[ 4261c]\n- 0xffffffffc97bccd8 (offset: 0x2a09f0) -> 0x54900 fde=[ 42640]\n- 0xffffffffc97bce98 (offset: 0x2a0bb0) -> 0x54924 fde=[ 42664]\n- 0xffffffffc97bd058 (offset: 0x2a0d70) -> 0x54948 fde=[ 42688]\n- 0xffffffffc97bd178 (offset: 0x2a0e90) -> 0x5496c fde=[ 426ac]\n- 0xffffffffc97bd298 (offset: 0x2a0fb0) -> 0x54990 fde=[ 426d0]\n- 0xffffffffc97bd458 (offset: 0x2a1170) -> 0x549b4 fde=[ 426f4]\n- 0xffffffffc97bd618 (offset: 0x2a1330) -> 0x549d8 fde=[ 42718]\n- 0xffffffffc97bd738 (offset: 0x2a1450) -> 0x549fc fde=[ 4273c]\n- 0xffffffffc97bd858 (offset: 0x2a1570) -> 0x54a20 fde=[ 42760]\n- 0xffffffffc97bda18 (offset: 0x2a1730) -> 0x54a44 fde=[ 42784]\n- 0xffffffffc97bdbd8 (offset: 0x2a18f0) -> 0x54a68 fde=[ 427a8]\n- 0xffffffffc97bdcf8 (offset: 0x2a1a10) -> 0x54a8c fde=[ 427cc]\n- 0xffffffffc97bde18 (offset: 0x2a1b30) -> 0x54ab0 fde=[ 427f0]\n- 0xffffffffc97beae8 (offset: 0x2a2800) -> 0x54ad4 fde=[ 42814]\n- 0xffffffffc97beb18 (offset: 0x2a2830) -> 0x54aec fde=[ 4282c]\n- 0xffffffffc97c90e8 (offset: 0x2ace00) -> 0x56390 fde=[ 440d0]\n- 0xffffffffc97c92a8 (offset: 0x2acfc0) -> 0x563b4 fde=[ 440f4]\n- 0xffffffffc97c9468 (offset: 0x2ad180) -> 0x563d8 fde=[ 44118]\n- 0xffffffffc97c9588 (offset: 0x2ad2a0) -> 0x563fc fde=[ 4413c]\n- 0xffffffffc97c96a8 (offset: 0x2ad3c0) -> 0x56420 fde=[ 44160]\n- 0xffffffffc97c9868 (offset: 0x2ad580) -> 0x56444 fde=[ 44184]\n- 0xffffffffc97c9a28 (offset: 0x2ad740) -> 0x56468 fde=[ 441a8]\n- 0xffffffffc97c9b48 (offset: 0x2ad860) -> 0x5648c fde=[ 441cc]\n- 0xffffffffc97c9c68 (offset: 0x2ad980) -> 0x564b0 fde=[ 441f0]\n- 0xffffffffc97c9e28 (offset: 0x2adb40) -> 0x564d4 fde=[ 44214]\n- 0xffffffffc97c9fe8 (offset: 0x2add00) -> 0x564f8 fde=[ 44238]\n- 0xffffffffc97ca108 (offset: 0x2ade20) -> 0x5651c fde=[ 4425c]\n- 0xffffffffc97ca228 (offset: 0x2adf40) -> 0x56540 fde=[ 44280]\n- 0xffffffffc97ca3e8 (offset: 0x2ae100) -> 0x56564 fde=[ 442a4]\n- 0xffffffffc97ca5a8 (offset: 0x2ae2c0) -> 0x56588 fde=[ 442c8]\n- 0xffffffffc97ca6c8 (offset: 0x2ae3e0) -> 0x565ac fde=[ 442ec]\n- 0xffffffffc97ca7e8 (offset: 0x2ae500) -> 0x565d0 fde=[ 44310]\n- 0xffffffffc97ca9a8 (offset: 0x2ae6c0) -> 0x565f4 fde=[ 44334]\n- 0xffffffffc97cab68 (offset: 0x2ae880) -> 0x56618 fde=[ 44358]\n- 0xffffffffc97cac88 (offset: 0x2ae9a0) -> 0x5663c fde=[ 4437c]\n- 0xffffffffc97cada8 (offset: 0x2aeac0) -> 0x56660 fde=[ 443a0]\n- 0xffffffffc97caf68 (offset: 0x2aec80) -> 0x56684 fde=[ 443c4]\n- 0xffffffffc97cb128 (offset: 0x2aee40) -> 0x566a8 fde=[ 443e8]\n- 0xffffffffc97cb248 (offset: 0x2aef60) -> 0x566cc fde=[ 4440c]\n- 0xffffffffc97cb368 (offset: 0x2af080) -> 0x566f0 fde=[ 44430]\n- 0xffffffffc97cb528 (offset: 0x2af240) -> 0x56714 fde=[ 44454]\n- 0xffffffffc97cb6e8 (offset: 0x2af400) -> 0x56738 fde=[ 44478]\n- 0xffffffffc97cb808 (offset: 0x2af520) -> 0x5675c fde=[ 4449c]\n- 0xffffffffc97cb928 (offset: 0x2af640) -> 0x56780 fde=[ 444c0]\n- 0xffffffffc97cbae8 (offset: 0x2af800) -> 0x567a4 fde=[ 444e4]\n- 0xffffffffc97cbca8 (offset: 0x2af9c0) -> 0x567c8 fde=[ 44508]\n- 0xffffffffc97cbdc8 (offset: 0x2afae0) -> 0x567ec fde=[ 4452c]\n- 0xffffffffc97cbee8 (offset: 0x2afc00) -> 0x56810 fde=[ 44550]\n- 0xffffffffc97cc0a8 (offset: 0x2afdc0) -> 0x56834 fde=[ 44574]\n- 0xffffffffc97cc268 (offset: 0x2aff80) -> 0x56858 fde=[ 44598]\n- 0xffffffffc97cc388 (offset: 0x2b00a0) -> 0x5687c fde=[ 445bc]\n- 0xffffffffc97cc4a8 (offset: 0x2b01c0) -> 0x568a0 fde=[ 445e0]\n- 0xffffffffc97cc668 (offset: 0x2b0380) -> 0x568c4 fde=[ 44604]\n- 0xffffffffc97cc828 (offset: 0x2b0540) -> 0x568e8 fde=[ 44628]\n- 0xffffffffc97cc948 (offset: 0x2b0660) -> 0x5690c fde=[ 4464c]\n- 0xffffffffc97cca68 (offset: 0x2b0780) -> 0x56930 fde=[ 44670]\n- 0xffffffffc97ccc28 (offset: 0x2b0940) -> 0x56954 fde=[ 44694]\n- 0xffffffffc97ccde8 (offset: 0x2b0b00) -> 0x56978 fde=[ 446b8]\n- 0xffffffffc97ccf08 (offset: 0x2b0c20) -> 0x5699c fde=[ 446dc]\n- 0xffffffffc97cd028 (offset: 0x2b0d40) -> 0x569c0 fde=[ 44700]\n- 0xffffffffc97cd1e8 (offset: 0x2b0f00) -> 0x569e4 fde=[ 44724]\n- 0xffffffffc97cd3a8 (offset: 0x2b10c0) -> 0x56a08 fde=[ 44748]\n- 0xffffffffc97cd4c8 (offset: 0x2b11e0) -> 0x56a2c fde=[ 4476c]\n- 0xffffffffc97cd5e8 (offset: 0x2b1300) -> 0x56a50 fde=[ 44790]\n- 0xffffffffc97cd7a8 (offset: 0x2b14c0) -> 0x56a74 fde=[ 447b4]\n- 0xffffffffc97cd968 (offset: 0x2b1680) -> 0x56a98 fde=[ 447d8]\n- 0xffffffffc97cda88 (offset: 0x2b17a0) -> 0x56abc fde=[ 447fc]\n- 0xffffffffc97cdba8 (offset: 0x2b18c0) -> 0x56ae0 fde=[ 44820]\n- 0xffffffffc97cdd68 (offset: 0x2b1a80) -> 0x56b04 fde=[ 44844]\n- 0xffffffffc97cdf28 (offset: 0x2b1c40) -> 0x56b28 fde=[ 44868]\n- 0xffffffffc97ce048 (offset: 0x2b1d60) -> 0x56b4c fde=[ 4488c]\n- 0xffffffffc97ce168 (offset: 0x2b1e80) -> 0x56b70 fde=[ 448b0]\n- 0xffffffffc97ce328 (offset: 0x2b2040) -> 0x56b94 fde=[ 448d4]\n- 0xffffffffc97ce4e8 (offset: 0x2b2200) -> 0x56bb8 fde=[ 448f8]\n- 0xffffffffc97ce608 (offset: 0x2b2320) -> 0x56bdc fde=[ 4491c]\n- 0xffffffffc97ce728 (offset: 0x2b2440) -> 0x56c00 fde=[ 44940]\n- 0xffffffffc97ce8e8 (offset: 0x2b2600) -> 0x56c24 fde=[ 44964]\n- 0xffffffffc97ceaa8 (offset: 0x2b27c0) -> 0x56c48 fde=[ 44988]\n- 0xffffffffc97cebc8 (offset: 0x2b28e0) -> 0x56c6c fde=[ 449ac]\n- 0xffffffffc97cece8 (offset: 0x2b2a00) -> 0x56c90 fde=[ 449d0]\n- 0xffffffffc97cf9b8 (offset: 0x2b36d0) -> 0x56cb4 fde=[ 449f4]\n- 0xffffffffc97cf9e8 (offset: 0x2b3700) -> 0x56ccc fde=[ 44a0c]\n- 0xffffffffc97d9dd8 (offset: 0x2bdaf0) -> 0x585e4 fde=[ 46324]\n- 0xffffffffc97da0a8 (offset: 0x2bddc0) -> 0x58608 fde=[ 46348]\n- 0xffffffffc97da148 (offset: 0x2bde60) -> 0x5862c fde=[ 4636c]\n- 0xffffffffc97da1d8 (offset: 0x2bdef0) -> 0x58650 fde=[ 46390]\n- 0xffffffffc97da4a8 (offset: 0x2be1c0) -> 0x58674 fde=[ 463b4]\n- 0xffffffffc97da778 (offset: 0x2be490) -> 0x58698 fde=[ 463d8]\n- 0xffffffffc97da818 (offset: 0x2be530) -> 0x586bc fde=[ 463fc]\n- 0xffffffffc97daae8 (offset: 0x2be800) -> 0x586e0 fde=[ 46420]\n- 0xffffffffc97dadb8 (offset: 0x2bead0) -> 0x58704 fde=[ 46444]\n- 0xffffffffc97dae58 (offset: 0x2beb70) -> 0x58728 fde=[ 46468]\n- 0xffffffffc97db128 (offset: 0x2bee40) -> 0x5874c fde=[ 4648c]\n- 0xffffffffc97db3f8 (offset: 0x2bf110) -> 0x58770 fde=[ 464b0]\n- 0xffffffffc97db498 (offset: 0x2bf1b0) -> 0x58794 fde=[ 464d4]\n- 0xffffffffc97db768 (offset: 0x2bf480) -> 0x587b8 fde=[ 464f8]\n- 0xffffffffc97db9f8 (offset: 0x2bf710) -> 0x587dc fde=[ 4651c]\n- 0xffffffffc97dba28 (offset: 0x2bf740) -> 0x58570 fde=[ 462b0]\n- 0xffffffffc97dbc28 (offset: 0x2bf940) -> 0x587f4 fde=[ 46534]\n- 0xffffffffc97dcd48 (offset: 0x2c0a60) -> 0x589d0 fde=[ 46710]\n- 0xffffffffc97dde88 (offset: 0x2c1ba0) -> 0x58bac fde=[ 468ec]\n- 0xffffffffc97defc8 (offset: 0x2c2ce0) -> 0x58dfc fde=[ 46b3c]\n- 0xffffffffc97df298 (offset: 0x2c2fb0) -> 0x58e20 fde=[ 46b60]\n- 0xffffffffc97df338 (offset: 0x2c3050) -> 0x58e44 fde=[ 46b84]\n- 0xffffffffc97df3c8 (offset: 0x2c30e0) -> 0x58e68 fde=[ 46ba8]\n- 0xffffffffc97df698 (offset: 0x2c33b0) -> 0x58e8c fde=[ 46bcc]\n- 0xffffffffc97df968 (offset: 0x2c3680) -> 0x58eb0 fde=[ 46bf0]\n- 0xffffffffc97dfa08 (offset: 0x2c3720) -> 0x58ed4 fde=[ 46c14]\n- 0xffffffffc97dfcd8 (offset: 0x2c39f0) -> 0x58ef8 fde=[ 46c38]\n- 0xffffffffc97dffa8 (offset: 0x2c3cc0) -> 0x58f1c fde=[ 46c5c]\n- 0xffffffffc97e0048 (offset: 0x2c3d60) -> 0x58f40 fde=[ 46c80]\n- 0xffffffffc97e0318 (offset: 0x2c4030) -> 0x58f64 fde=[ 46ca4]\n- 0xffffffffc97e05e8 (offset: 0x2c4300) -> 0x58f88 fde=[ 46cc8]\n- 0xffffffffc97e0688 (offset: 0x2c43a0) -> 0x58fac fde=[ 46cec]\n- 0xffffffffc97e0958 (offset: 0x2c4670) -> 0x58fd0 fde=[ 46d10]\n- 0xffffffffc97e0be8 (offset: 0x2c4900) -> 0x58ff4 fde=[ 46d34]\n- 0xffffffffc97e0c18 (offset: 0x2c4930) -> 0x58d88 fde=[ 46ac8]\n- 0xffffffffc97e0df8 (offset: 0x2c4b10) -> 0x59084 fde=[ 46dc4]\n- 0xffffffffc97e10c8 (offset: 0x2c4de0) -> 0x590a8 fde=[ 46de8]\n- 0xffffffffc97e1168 (offset: 0x2c4e80) -> 0x590cc fde=[ 46e0c]\n- 0xffffffffc97e11f8 (offset: 0x2c4f10) -> 0x590f0 fde=[ 46e30]\n- 0xffffffffc97e14c8 (offset: 0x2c51e0) -> 0x59114 fde=[ 46e54]\n- 0xffffffffc97e1798 (offset: 0x2c54b0) -> 0x59138 fde=[ 46e78]\n- 0xffffffffc97e1838 (offset: 0x2c5550) -> 0x5915c fde=[ 46e9c]\n- 0xffffffffc97e1b08 (offset: 0x2c5820) -> 0x59180 fde=[ 46ec0]\n- 0xffffffffc97e1dd8 (offset: 0x2c5af0) -> 0x591a4 fde=[ 46ee4]\n- 0xffffffffc97e1e78 (offset: 0x2c5b90) -> 0x591c8 fde=[ 46f08]\n- 0xffffffffc97e2148 (offset: 0x2c5e60) -> 0x591ec fde=[ 46f2c]\n- 0xffffffffc97e2418 (offset: 0x2c6130) -> 0x59210 fde=[ 46f50]\n- 0xffffffffc97e24b8 (offset: 0x2c61d0) -> 0x59234 fde=[ 46f74]\n- 0xffffffffc97e2788 (offset: 0x2c64a0) -> 0x59258 fde=[ 46f98]\n- 0xffffffffc97e2a18 (offset: 0x2c6730) -> 0x5927c fde=[ 46fbc]\n- 0xffffffffc97e2a48 (offset: 0x2c6760) -> 0x59010 fde=[ 46d50]\n- 0xffffffffc97e2c48 (offset: 0x2c6960) -> 0x5930c fde=[ 4704c]\n- 0xffffffffc97e2f18 (offset: 0x2c6c30) -> 0x59330 fde=[ 47070]\n- 0xffffffffc97e2fb8 (offset: 0x2c6cd0) -> 0x59354 fde=[ 47094]\n- 0xffffffffc97e3048 (offset: 0x2c6d60) -> 0x59378 fde=[ 470b8]\n- 0xffffffffc97e3318 (offset: 0x2c7030) -> 0x5939c fde=[ 470dc]\n- 0xffffffffc97e35e8 (offset: 0x2c7300) -> 0x593c0 fde=[ 47100]\n- 0xffffffffc97e3688 (offset: 0x2c73a0) -> 0x593e4 fde=[ 47124]\n- 0xffffffffc97e3958 (offset: 0x2c7670) -> 0x59408 fde=[ 47148]\n- 0xffffffffc97e3c28 (offset: 0x2c7940) -> 0x5942c fde=[ 4716c]\n- 0xffffffffc97e3cc8 (offset: 0x2c79e0) -> 0x59450 fde=[ 47190]\n- 0xffffffffc97e3f98 (offset: 0x2c7cb0) -> 0x59474 fde=[ 471b4]\n- 0xffffffffc97e4268 (offset: 0x2c7f80) -> 0x59498 fde=[ 471d8]\n- 0xffffffffc97e4308 (offset: 0x2c8020) -> 0x594bc fde=[ 471fc]\n- 0xffffffffc97e45d8 (offset: 0x2c82f0) -> 0x594e0 fde=[ 47220]\n- 0xffffffffc97e4868 (offset: 0x2c8580) -> 0x59504 fde=[ 47244]\n- 0xffffffffc97e4898 (offset: 0x2c85b0) -> 0x59298 fde=[ 46fd8]\n- 0xffffffffc97e4a78 (offset: 0x2c8790) -> 0x59594 fde=[ 472d4]\n- 0xffffffffc97e4d48 (offset: 0x2c8a60) -> 0x595b8 fde=[ 472f8]\n- 0xffffffffc97e4de8 (offset: 0x2c8b00) -> 0x595dc fde=[ 4731c]\n- 0xffffffffc97e4e78 (offset: 0x2c8b90) -> 0x59600 fde=[ 47340]\n- 0xffffffffc97e5148 (offset: 0x2c8e60) -> 0x59624 fde=[ 47364]\n- 0xffffffffc97e5418 (offset: 0x2c9130) -> 0x59648 fde=[ 47388]\n- 0xffffffffc97e54b8 (offset: 0x2c91d0) -> 0x5966c fde=[ 473ac]\n- 0xffffffffc97e5788 (offset: 0x2c94a0) -> 0x59690 fde=[ 473d0]\n- 0xffffffffc97e5a58 (offset: 0x2c9770) -> 0x596b4 fde=[ 473f4]\n- 0xffffffffc97e5af8 (offset: 0x2c9810) -> 0x596d8 fde=[ 47418]\n- 0xffffffffc97e5dc8 (offset: 0x2c9ae0) -> 0x596fc fde=[ 4743c]\n- 0xffffffffc97e6098 (offset: 0x2c9db0) -> 0x59720 fde=[ 47460]\n- 0xffffffffc97e6138 (offset: 0x2c9e50) -> 0x59744 fde=[ 47484]\n- 0xffffffffc97e6408 (offset: 0x2ca120) -> 0x59768 fde=[ 474a8]\n- 0xffffffffc97e6698 (offset: 0x2ca3b0) -> 0x5978c fde=[ 474cc]\n- 0xffffffffc97e66c8 (offset: 0x2ca3e0) -> 0x59520 fde=[ 47260]\n- 0xffffffffc97e68c8 (offset: 0x2ca5e0) -> 0x5981c fde=[ 4755c]\n- 0xffffffffc97e6b98 (offset: 0x2ca8b0) -> 0x59840 fde=[ 47580]\n- 0xffffffffc97e6c38 (offset: 0x2ca950) -> 0x59864 fde=[ 475a4]\n- 0xffffffffc97e6cc8 (offset: 0x2ca9e0) -> 0x59888 fde=[ 475c8]\n- 0xffffffffc97e6f98 (offset: 0x2cacb0) -> 0x598ac fde=[ 475ec]\n- 0xffffffffc97e7268 (offset: 0x2caf80) -> 0x598d0 fde=[ 47610]\n- 0xffffffffc97e7308 (offset: 0x2cb020) -> 0x598f4 fde=[ 47634]\n- 0xffffffffc97e75d8 (offset: 0x2cb2f0) -> 0x59918 fde=[ 47658]\n- 0xffffffffc97e78a8 (offset: 0x2cb5c0) -> 0x5993c fde=[ 4767c]\n- 0xffffffffc97e7948 (offset: 0x2cb660) -> 0x59960 fde=[ 476a0]\n- 0xffffffffc97e7c18 (offset: 0x2cb930) -> 0x59984 fde=[ 476c4]\n- 0xffffffffc97e7ee8 (offset: 0x2cbc00) -> 0x599a8 fde=[ 476e8]\n- 0xffffffffc97e7f88 (offset: 0x2cbca0) -> 0x599cc fde=[ 4770c]\n- 0xffffffffc97e8258 (offset: 0x2cbf70) -> 0x599f0 fde=[ 47730]\n- 0xffffffffc97e84e8 (offset: 0x2cc200) -> 0x59a14 fde=[ 47754]\n- 0xffffffffc97e8518 (offset: 0x2cc230) -> 0x597a8 fde=[ 474e8]\n- 0xffffffffc97e8718 (offset: 0x2cc430) -> 0x59a2c fde=[ 4776c]\n- 0xffffffffc97e9838 (offset: 0x2cd550) -> 0x59c08 fde=[ 47948]\n- 0xffffffffc97ea978 (offset: 0x2ce690) -> 0x59de4 fde=[ 47b24]\n- 0xffffffffc97ebab8 (offset: 0x2cf7d0) -> 0x5a034 fde=[ 47d74]\n- 0xffffffffc97ebd88 (offset: 0x2cfaa0) -> 0x5a058 fde=[ 47d98]\n- 0xffffffffc97ebe28 (offset: 0x2cfb40) -> 0x5a07c fde=[ 47dbc]\n- 0xffffffffc97ebeb8 (offset: 0x2cfbd0) -> 0x5a0a0 fde=[ 47de0]\n- 0xffffffffc97ec188 (offset: 0x2cfea0) -> 0x5a0c4 fde=[ 47e04]\n- 0xffffffffc97ec458 (offset: 0x2d0170) -> 0x5a0e8 fde=[ 47e28]\n- 0xffffffffc97ec4f8 (offset: 0x2d0210) -> 0x5a10c fde=[ 47e4c]\n- 0xffffffffc97ec7c8 (offset: 0x2d04e0) -> 0x5a130 fde=[ 47e70]\n- 0xffffffffc97eca98 (offset: 0x2d07b0) -> 0x5a154 fde=[ 47e94]\n- 0xffffffffc97ecb38 (offset: 0x2d0850) -> 0x5a178 fde=[ 47eb8]\n- 0xffffffffc97ece08 (offset: 0x2d0b20) -> 0x5a19c fde=[ 47edc]\n- 0xffffffffc97ed0d8 (offset: 0x2d0df0) -> 0x5a1c0 fde=[ 47f00]\n- 0xffffffffc97ed178 (offset: 0x2d0e90) -> 0x5a1e4 fde=[ 47f24]\n- 0xffffffffc97ed448 (offset: 0x2d1160) -> 0x5a208 fde=[ 47f48]\n- 0xffffffffc97ed6d8 (offset: 0x2d13f0) -> 0x5a22c fde=[ 47f6c]\n- 0xffffffffc97ed708 (offset: 0x2d1420) -> 0x59fc0 fde=[ 47d00]\n- 0xffffffffc97ed908 (offset: 0x2d1620) -> 0x5a244 fde=[ 47f84]\n- 0xffffffffc97eea28 (offset: 0x2d2740) -> 0x5a420 fde=[ 48160]\n- 0xffffffffc97efb68 (offset: 0x2d3880) -> 0x5a5fc fde=[ 4833c]\n- 0xffffffffc97f0ca8 (offset: 0x2d49c0) -> 0x5a84c fde=[ 4858c]\n- 0xffffffffc97f0f78 (offset: 0x2d4c90) -> 0x5a870 fde=[ 485b0]\n- 0xffffffffc97f1018 (offset: 0x2d4d30) -> 0x5a894 fde=[ 485d4]\n- 0xffffffffc97f10a8 (offset: 0x2d4dc0) -> 0x5a8b8 fde=[ 485f8]\n- 0xffffffffc97f1378 (offset: 0x2d5090) -> 0x5a8dc fde=[ 4861c]\n- 0xffffffffc97f1648 (offset: 0x2d5360) -> 0x5a900 fde=[ 48640]\n- 0xffffffffc97f16e8 (offset: 0x2d5400) -> 0x5a924 fde=[ 48664]\n- 0xffffffffc97f19b8 (offset: 0x2d56d0) -> 0x5a948 fde=[ 48688]\n- 0xffffffffc97f1c88 (offset: 0x2d59a0) -> 0x5a96c fde=[ 486ac]\n- 0xffffffffc97f1d28 (offset: 0x2d5a40) -> 0x5a990 fde=[ 486d0]\n- 0xffffffffc97f1ff8 (offset: 0x2d5d10) -> 0x5a9b4 fde=[ 486f4]\n- 0xffffffffc97f22c8 (offset: 0x2d5fe0) -> 0x5a9d8 fde=[ 48718]\n- 0xffffffffc97f2368 (offset: 0x2d6080) -> 0x5a9fc fde=[ 4873c]\n- 0xffffffffc97f2638 (offset: 0x2d6350) -> 0x5aa20 fde=[ 48760]\n- 0xffffffffc97f28c8 (offset: 0x2d65e0) -> 0x5aa44 fde=[ 48784]\n- 0xffffffffc97f28f8 (offset: 0x2d6610) -> 0x5a7d8 fde=[ 48518]\n- 0xffffffffc97f2ad8 (offset: 0x2d67f0) -> 0x5aad4 fde=[ 48814]\n- 0xffffffffc97f2da8 (offset: 0x2d6ac0) -> 0x5aaf8 fde=[ 48838]\n- 0xffffffffc97f2e48 (offset: 0x2d6b60) -> 0x5ab1c fde=[ 4885c]\n- 0xffffffffc97f2ed8 (offset: 0x2d6bf0) -> 0x5ab40 fde=[ 48880]\n- 0xffffffffc97f31a8 (offset: 0x2d6ec0) -> 0x5ab64 fde=[ 488a4]\n- 0xffffffffc97f3478 (offset: 0x2d7190) -> 0x5ab88 fde=[ 488c8]\n- 0xffffffffc97f3518 (offset: 0x2d7230) -> 0x5abac fde=[ 488ec]\n- 0xffffffffc97f37e8 (offset: 0x2d7500) -> 0x5abd0 fde=[ 48910]\n- 0xffffffffc97f3ab8 (offset: 0x2d77d0) -> 0x5abf4 fde=[ 48934]\n- 0xffffffffc97f3b58 (offset: 0x2d7870) -> 0x5ac18 fde=[ 48958]\n- 0xffffffffc97f3e28 (offset: 0x2d7b40) -> 0x5ac3c fde=[ 4897c]\n- 0xffffffffc97f40f8 (offset: 0x2d7e10) -> 0x5ac60 fde=[ 489a0]\n- 0xffffffffc97f4198 (offset: 0x2d7eb0) -> 0x5ac84 fde=[ 489c4]\n- 0xffffffffc97f4468 (offset: 0x2d8180) -> 0x5aca8 fde=[ 489e8]\n- 0xffffffffc97f46f8 (offset: 0x2d8410) -> 0x5accc fde=[ 48a0c]\n- 0xffffffffc97f4728 (offset: 0x2d8440) -> 0x5aa60 fde=[ 487a0]\n- 0xffffffffc97f4908 (offset: 0x2d8620) -> 0x5ad5c fde=[ 48a9c]\n- 0xffffffffc97f4bd8 (offset: 0x2d88f0) -> 0x5ad80 fde=[ 48ac0]\n- 0xffffffffc97f4c78 (offset: 0x2d8990) -> 0x5ada4 fde=[ 48ae4]\n- 0xffffffffc97f4d08 (offset: 0x2d8a20) -> 0x5adc8 fde=[ 48b08]\n- 0xffffffffc97f4fd8 (offset: 0x2d8cf0) -> 0x5adec fde=[ 48b2c]\n- 0xffffffffc97f52a8 (offset: 0x2d8fc0) -> 0x5ae10 fde=[ 48b50]\n- 0xffffffffc97f5348 (offset: 0x2d9060) -> 0x5ae34 fde=[ 48b74]\n- 0xffffffffc97f5618 (offset: 0x2d9330) -> 0x5ae58 fde=[ 48b98]\n- 0xffffffffc97f58e8 (offset: 0x2d9600) -> 0x5ae7c fde=[ 48bbc]\n- 0xffffffffc97f5988 (offset: 0x2d96a0) -> 0x5aea0 fde=[ 48be0]\n- 0xffffffffc97f5c58 (offset: 0x2d9970) -> 0x5aec4 fde=[ 48c04]\n- 0xffffffffc97f5f28 (offset: 0x2d9c40) -> 0x5aee8 fde=[ 48c28]\n- 0xffffffffc97f5fc8 (offset: 0x2d9ce0) -> 0x5af0c fde=[ 48c4c]\n- 0xffffffffc97f6298 (offset: 0x2d9fb0) -> 0x5af30 fde=[ 48c70]\n- 0xffffffffc97f6528 (offset: 0x2da240) -> 0x5af54 fde=[ 48c94]\n- 0xffffffffc97f6558 (offset: 0x2da270) -> 0x5ace8 fde=[ 48a28]\n- 0xffffffffc97f6738 (offset: 0x2da450) -> 0x5af70 fde=[ 48cb0]\n- 0xffffffffc97f6838 (offset: 0x2da550) -> 0x5af84 fde=[ 48cc4]\n- 0xffffffffc97f6848 (offset: 0x2da560) -> 0x5af98 fde=[ 48cd8]\n+ 0xffffffffc953d308 (offset: 0x22020) -> 0x122d8 fde=[ 18]\n+ 0xffffffffc953eb68 (offset: 0x23880) -> 0x12300 fde=[ 40]\n+ 0xffffffffc953eb88 (offset: 0x238a0) -> 0x18550 fde=[ 6290]\n+ 0xffffffffc953ebd8 (offset: 0x238f0) -> 0x18570 fde=[ 62b0]\n+ 0xffffffffc953ec28 (offset: 0x23940) -> 0x18fc0 fde=[ 6d00]\n+ 0xffffffffc953ec58 (offset: 0x23970) -> 0x12318 fde=[ 58]\n+ 0xffffffffc953eca8 (offset: 0x239c0) -> 0x12338 fde=[ 78]\n+ 0xffffffffc953ed18 (offset: 0x23a30) -> 0x12358 fde=[ 98]\n+ 0xffffffffc953f118 (offset: 0x23e30) -> 0x123b4 fde=[ f4]\n+ 0xffffffffc953f238 (offset: 0x23f50) -> 0x123d8 fde=[ 118]\n+ 0xffffffffc953f2a8 (offset: 0x23fc0) -> 0x123f0 fde=[ 130]\n+ 0xffffffffc953f2d8 (offset: 0x23ff0) -> 0x12408 fde=[ 148]\n+ 0xffffffffc953f4c8 (offset: 0x241e0) -> 0x12454 fde=[ 194]\n+ 0xffffffffc953f558 (offset: 0x24270) -> 0x12478 fde=[ 1b8]\n+ 0xffffffffc953f5c8 (offset: 0x242e0) -> 0x12490 fde=[ 1d0]\n+ 0xffffffffc953f5f8 (offset: 0x24310) -> 0x124a8 fde=[ 1e8]\n+ 0xffffffffc953f7f8 (offset: 0x24510) -> 0x124fc fde=[ 23c]\n+ 0xffffffffc953f878 (offset: 0x24590) -> 0x1251c fde=[ 25c]\n+ 0xffffffffc953f8e8 (offset: 0x24600) -> 0x12534 fde=[ 274]\n+ 0xffffffffc953f918 (offset: 0x24630) -> 0x12550 fde=[ 290]\n+ 0xffffffffc953fc48 (offset: 0x24960) -> 0x125ac fde=[ 2ec]\n+ 0xffffffffc953fcd8 (offset: 0x249f0) -> 0x125d0 fde=[ 310]\n+ 0xffffffffc953fd68 (offset: 0x24a80) -> 0x125f4 fde=[ 334]\n+ 0xffffffffc953fe08 (offset: 0x24b20) -> 0x12614 fde=[ 354]\n+ 0xffffffffc953fe38 (offset: 0x24b50) -> 0x12630 fde=[ 370]\n+ 0xffffffffc95410a8 (offset: 0x25dc0) -> 0x127f0 fde=[ 530]\n+ 0xffffffffc9543078 (offset: 0x27d90) -> 0x12a30 fde=[ 770]\n+ 0xffffffffc9545048 (offset: 0x29d60) -> 0x12c70 fde=[ 9b0]\n+ 0xffffffffc9547018 (offset: 0x2bd30) -> 0x12eb0 fde=[ bf0]\n+ 0xffffffffc9548fe8 (offset: 0x2dd00) -> 0x130f0 fde=[ e30]\n+ 0xffffffffc9549488 (offset: 0x2e1a0) -> 0x1314c fde=[ e8c]\n+ 0xffffffffc9549628 (offset: 0x2e340) -> 0x13170 fde=[ eb0]\n+ 0xffffffffc95497c8 (offset: 0x2e4e0) -> 0x13194 fde=[ ed4]\n+ 0xffffffffc9549968 (offset: 0x2e680) -> 0x131b8 fde=[ ef8]\n+ 0xffffffffc9549b08 (offset: 0x2e820) -> 0x131dc fde=[ f1c]\n+ 0xffffffffc9549ca8 (offset: 0x2e9c0) -> 0x13200 fde=[ f40]\n+ 0xffffffffc9549e48 (offset: 0x2eb60) -> 0x13224 fde=[ f64]\n+ 0xffffffffc9549fe8 (offset: 0x2ed00) -> 0x13248 fde=[ f88]\n+ 0xffffffffc954a188 (offset: 0x2eea0) -> 0x1326c fde=[ fac]\n+ 0xffffffffc954a328 (offset: 0x2f040) -> 0x13290 fde=[ fd0]\n+ 0xffffffffc954a4c8 (offset: 0x2f1e0) -> 0x132b4 fde=[ ff4]\n+ 0xffffffffc954a668 (offset: 0x2f380) -> 0x132d8 fde=[ 1018]\n+ 0xffffffffc954a808 (offset: 0x2f520) -> 0x132fc fde=[ 103c]\n+ 0xffffffffc954a9a8 (offset: 0x2f6c0) -> 0x13320 fde=[ 1060]\n+ 0xffffffffc954ab48 (offset: 0x2f860) -> 0x13344 fde=[ 1084]\n+ 0xffffffffc954ace8 (offset: 0x2fa00) -> 0x13368 fde=[ 10a8]\n+ 0xffffffffc954ae88 (offset: 0x2fba0) -> 0x1338c fde=[ 10cc]\n+ 0xffffffffc954b028 (offset: 0x2fd40) -> 0x133b0 fde=[ 10f0]\n+ 0xffffffffc954b1c8 (offset: 0x2fee0) -> 0x133d4 fde=[ 1114]\n+ 0xffffffffc954b368 (offset: 0x30080) -> 0x133f8 fde=[ 1138]\n+ 0xffffffffc954b508 (offset: 0x30220) -> 0x1341c fde=[ 115c]\n+ 0xffffffffc954b6a8 (offset: 0x303c0) -> 0x13440 fde=[ 1180]\n+ 0xffffffffc954b848 (offset: 0x30560) -> 0x13464 fde=[ 11a4]\n+ 0xffffffffc954b9e8 (offset: 0x30700) -> 0x13488 fde=[ 11c8]\n+ 0xffffffffc954bb88 (offset: 0x308a0) -> 0x134ac fde=[ 11ec]\n+ 0xffffffffc954bd28 (offset: 0x30a40) -> 0x134d0 fde=[ 1210]\n+ 0xffffffffc954bec8 (offset: 0x30be0) -> 0x134f4 fde=[ 1234]\n+ 0xffffffffc954c068 (offset: 0x30d80) -> 0x13518 fde=[ 1258]\n+ 0xffffffffc954c208 (offset: 0x30f20) -> 0x1353c fde=[ 127c]\n+ 0xffffffffc954c3a8 (offset: 0x310c0) -> 0x13560 fde=[ 12a0]\n+ 0xffffffffc954c548 (offset: 0x31260) -> 0x13584 fde=[ 12c4]\n+ 0xffffffffc954c6e8 (offset: 0x31400) -> 0x135a8 fde=[ 12e8]\n+ 0xffffffffc954c888 (offset: 0x315a0) -> 0x135cc fde=[ 130c]\n+ 0xffffffffc954ca28 (offset: 0x31740) -> 0x135f0 fde=[ 1330]\n+ 0xffffffffc954cbc8 (offset: 0x318e0) -> 0x13614 fde=[ 1354]\n+ 0xffffffffc954cd68 (offset: 0x31a80) -> 0x13638 fde=[ 1378]\n+ 0xffffffffc954cf08 (offset: 0x31c20) -> 0x1365c fde=[ 139c]\n+ 0xffffffffc954d0a8 (offset: 0x31dc0) -> 0x13680 fde=[ 13c0]\n+ 0xffffffffc954d248 (offset: 0x31f60) -> 0x136a4 fde=[ 13e4]\n+ 0xffffffffc954d3e8 (offset: 0x32100) -> 0x136c8 fde=[ 1408]\n+ 0xffffffffc954d588 (offset: 0x322a0) -> 0x136ec fde=[ 142c]\n+ 0xffffffffc954d6c8 (offset: 0x323e0) -> 0x13710 fde=[ 1450]\n+ 0xffffffffc954de68 (offset: 0x32b80) -> 0x13734 fde=[ 1474]\n+ 0xffffffffc954de98 (offset: 0x32bb0) -> 0x13750 fde=[ 1490]\n+ 0xffffffffc954e188 (offset: 0x32ea0) -> 0x137ac fde=[ 14ec]\n+ 0xffffffffc954e228 (offset: 0x32f40) -> 0x137d0 fde=[ 1510]\n+ 0xffffffffc954e2c8 (offset: 0x32fe0) -> 0x137f4 fde=[ 1534]\n+ 0xffffffffc954e368 (offset: 0x33080) -> 0x13814 fde=[ 1554]\n+ 0xffffffffc954e398 (offset: 0x330b0) -> 0x13830 fde=[ 1570]\n+ 0xffffffffc954ed68 (offset: 0x33a80) -> 0x13880 fde=[ 15c0]\n+ 0xffffffffc954ee08 (offset: 0x33b20) -> 0x138a4 fde=[ 15e4]\n+ 0xffffffffc954eea8 (offset: 0x33bc0) -> 0x138c8 fde=[ 1608]\n+ 0xffffffffc954ef48 (offset: 0x33c60) -> 0x138ec fde=[ 162c]\n+ 0xffffffffc954f158 (offset: 0x33e70) -> 0x13910 fde=[ 1650]\n+ 0xffffffffc954f368 (offset: 0x34080) -> 0x13934 fde=[ 1674]\n+ 0xffffffffc954f578 (offset: 0x34290) -> 0x13958 fde=[ 1698]\n+ 0xffffffffc954f788 (offset: 0x344a0) -> 0x1397c fde=[ 16bc]\n+ 0xffffffffc954f908 (offset: 0x34620) -> 0x139a0 fde=[ 16e0]\n+ 0xffffffffc954f938 (offset: 0x34650) -> 0x139b8 fde=[ 16f8]\n+ 0xffffffffc954fd88 (offset: 0x34aa0) -> 0x13a14 fde=[ 1754]\n+ 0xffffffffc954ff08 (offset: 0x34c20) -> 0x13a38 fde=[ 1778]\n+ 0xffffffffc954ff78 (offset: 0x34c90) -> 0x13a50 fde=[ 1790]\n+ 0xffffffffc954ffa8 (offset: 0x34cc0) -> 0x13a68 fde=[ 17a8]\n+ 0xffffffffc9550598 (offset: 0x352b0) -> 0x13b0c fde=[ 184c]\n+ 0xffffffffc9550638 (offset: 0x35350) -> 0x13b2c fde=[ 186c]\n+ 0xffffffffc9550668 (offset: 0x35380) -> 0x13ac4 fde=[ 1804]\n+ 0xffffffffc95507d8 (offset: 0x354f0) -> 0x13ae8 fde=[ 1828]\n+ 0xffffffffc9550948 (offset: 0x35660) -> 0x13b48 fde=[ 1888]\n+ 0xffffffffc9550a78 (offset: 0x35790) -> 0x13b6c fde=[ 18ac]\n+ 0xffffffffc9550e78 (offset: 0x35b90) -> 0x13bc8 fde=[ 1908]\n+ 0xffffffffc9550ee8 (offset: 0x35c00) -> 0x13be0 fde=[ 1920]\n+ 0xffffffffc9550f18 (offset: 0x35c30) -> 0x13bf8 fde=[ 1938]\n+ 0xffffffffc9550f38 (offset: 0x35c50) -> 0x13c0c fde=[ 194c]\n+ 0xffffffffc9550f68 (offset: 0x35c80) -> 0x13c34 fde=[ 1974]\n+ 0xffffffffc9550f98 (offset: 0x35cb0) -> 0x13c5c fde=[ 199c]\n+ 0xffffffffc9551088 (offset: 0x35da0) -> 0x13c78 fde=[ 19b8]\n+ 0xffffffffc9551178 (offset: 0x35e90) -> 0x13cb8 fde=[ 19f8]\n+ 0xffffffffc9551268 (offset: 0x35f80) -> 0x13cf8 fde=[ 1a38]\n+ 0xffffffffc9551348 (offset: 0x36060) -> 0x13d38 fde=[ 1a78]\n+ 0xffffffffc9551428 (offset: 0x36140) -> 0x13d78 fde=[ 1ab8]\n+ 0xffffffffc9551578 (offset: 0x36290) -> 0x13db8 fde=[ 1af8]\n+ 0xffffffffc9551658 (offset: 0x36370) -> 0x13df8 fde=[ 1b38]\n+ 0xffffffffc9551718 (offset: 0x36430) -> 0x13e2c fde=[ 1b6c]\n+ 0xffffffffc95517d8 (offset: 0x364f0) -> 0x13e60 fde=[ 1ba0]\n+ 0xffffffffc9551898 (offset: 0x365b0) -> 0x13e94 fde=[ 1bd4]\n+ 0xffffffffc9551958 (offset: 0x36670) -> 0x13ec8 fde=[ 1c08]\n+ 0xffffffffc9551a18 (offset: 0x36730) -> 0x13efc fde=[ 1c3c]\n+ 0xffffffffc9551ad8 (offset: 0x367f0) -> 0x13f30 fde=[ 1c70]\n+ 0xffffffffc9551b98 (offset: 0x368b0) -> 0x13f64 fde=[ 1ca4]\n+ 0xffffffffc9551c58 (offset: 0x36970) -> 0x13f98 fde=[ 1cd8]\n+ 0xffffffffc9551d18 (offset: 0x36a30) -> 0x13fcc fde=[ 1d0c]\n+ 0xffffffffc9551dd8 (offset: 0x36af0) -> 0x14000 fde=[ 1d40]\n+ 0xffffffffc9551e98 (offset: 0x36bb0) -> 0x14034 fde=[ 1d74]\n+ 0xffffffffc9551f58 (offset: 0x36c70) -> 0x14068 fde=[ 1da8]\n+ 0xffffffffc9552018 (offset: 0x36d30) -> 0x1409c fde=[ 1ddc]\n+ 0xffffffffc95520d8 (offset: 0x36df0) -> 0x140d0 fde=[ 1e10]\n+ 0xffffffffc9552108 (offset: 0x36e20) -> 0x140f8 fde=[ 1e38]\n+ 0xffffffffc9552138 (offset: 0x36e50) -> 0x14120 fde=[ 1e60]\n+ 0xffffffffc9552158 (offset: 0x36e70) -> 0x14134 fde=[ 1e74]\n+ 0xffffffffc9552248 (offset: 0x36f60) -> 0x14174 fde=[ 1eb4]\n+ 0xffffffffc9552338 (offset: 0x37050) -> 0x141b4 fde=[ 1ef4]\n+ 0xffffffffc9552418 (offset: 0x37130) -> 0x141f4 fde=[ 1f34]\n+ 0xffffffffc95524f8 (offset: 0x37210) -> 0x14234 fde=[ 1f74]\n+ 0xffffffffc95525d8 (offset: 0x372f0) -> 0x14274 fde=[ 1fb4]\n+ 0xffffffffc9552698 (offset: 0x373b0) -> 0x142a8 fde=[ 1fe8]\n+ 0xffffffffc9552758 (offset: 0x37470) -> 0x142dc fde=[ 201c]\n+ 0xffffffffc9552818 (offset: 0x37530) -> 0x14310 fde=[ 2050]\n+ 0xffffffffc95528d8 (offset: 0x375f0) -> 0x14344 fde=[ 2084]\n+ 0xffffffffc9552998 (offset: 0x376b0) -> 0x14378 fde=[ 20b8]\n+ 0xffffffffc9552a58 (offset: 0x37770) -> 0x143ac fde=[ 20ec]\n+ 0xffffffffc9552b18 (offset: 0x37830) -> 0x143e0 fde=[ 2120]\n+ 0xffffffffc9552bd8 (offset: 0x378f0) -> 0x14414 fde=[ 2154]\n+ 0xffffffffc9552c98 (offset: 0x379b0) -> 0x14448 fde=[ 2188]\n+ 0xffffffffc9552d58 (offset: 0x37a70) -> 0x1447c fde=[ 21bc]\n+ 0xffffffffc9552e18 (offset: 0x37b30) -> 0x144b0 fde=[ 21f0]\n+ 0xffffffffc9552ed8 (offset: 0x37bf0) -> 0x144e4 fde=[ 2224]\n+ 0xffffffffc9552f98 (offset: 0x37cb0) -> 0x14518 fde=[ 2258]\n+ 0xffffffffc9553058 (offset: 0x37d70) -> 0x1454c fde=[ 228c]\n+ 0xffffffffc9553088 (offset: 0x37da0) -> 0x14574 fde=[ 22b4]\n+ 0xffffffffc95530b8 (offset: 0x37dd0) -> 0x1459c fde=[ 22dc]\n+ 0xffffffffc95530d8 (offset: 0x37df0) -> 0x145b0 fde=[ 22f0]\n+ 0xffffffffc9553248 (offset: 0x37f60) -> 0x14600 fde=[ 2340]\n+ 0xffffffffc95533b8 (offset: 0x380d0) -> 0x14650 fde=[ 2390]\n+ 0xffffffffc95533d8 (offset: 0x380f0) -> 0x14664 fde=[ 23a4]\n+ 0xffffffffc9553548 (offset: 0x38260) -> 0x146b4 fde=[ 23f4]\n+ 0xffffffffc95536b8 (offset: 0x383d0) -> 0x14704 fde=[ 2444]\n+ 0xffffffffc95536d8 (offset: 0x383f0) -> 0x14718 fde=[ 2458]\n+ 0xffffffffc9553848 (offset: 0x38560) -> 0x14768 fde=[ 24a8]\n+ 0xffffffffc95539b8 (offset: 0x386d0) -> 0x147b8 fde=[ 24f8]\n+ 0xffffffffc9553a38 (offset: 0x38750) -> 0x147d8 fde=[ 2518]\n+ 0xffffffffc9553ab8 (offset: 0x387d0) -> 0x147f8 fde=[ 2538]\n+ 0xffffffffc9553b38 (offset: 0x38850) -> 0x14818 fde=[ 2558]\n+ 0xffffffffc9553bb8 (offset: 0x388d0) -> 0x14838 fde=[ 2578]\n+ 0xffffffffc9553c38 (offset: 0x38950) -> 0x14858 fde=[ 2598]\n+ 0xffffffffc9553cb8 (offset: 0x389d0) -> 0x14878 fde=[ 25b8]\n+ 0xffffffffc9553d38 (offset: 0x38a50) -> 0x14898 fde=[ 25d8]\n+ 0xffffffffc9553da8 (offset: 0x38ac0) -> 0x148b8 fde=[ 25f8]\n+ 0xffffffffc9553e18 (offset: 0x38b30) -> 0x148d8 fde=[ 2618]\n+ 0xffffffffc9553e88 (offset: 0x38ba0) -> 0x148f8 fde=[ 2638]\n+ 0xffffffffc9553ef8 (offset: 0x38c10) -> 0x14918 fde=[ 2658]\n+ 0xffffffffc9553f68 (offset: 0x38c80) -> 0x14938 fde=[ 2678]\n+ 0xffffffffc9553fd8 (offset: 0x38cf0) -> 0x14958 fde=[ 2698]\n+ 0xffffffffc9554048 (offset: 0x38d60) -> 0x14978 fde=[ 26b8]\n+ 0xffffffffc95540b8 (offset: 0x38dd0) -> 0x14998 fde=[ 26d8]\n+ 0xffffffffc9554128 (offset: 0x38e40) -> 0x149b8 fde=[ 26f8]\n+ 0xffffffffc9554198 (offset: 0x38eb0) -> 0x149d8 fde=[ 2718]\n+ 0xffffffffc9554208 (offset: 0x38f20) -> 0x149f8 fde=[ 2738]\n+ 0xffffffffc9554278 (offset: 0x38f90) -> 0x14a18 fde=[ 2758]\n+ 0xffffffffc95542e8 (offset: 0x39000) -> 0x14a38 fde=[ 2778]\n+ 0xffffffffc9554358 (offset: 0x39070) -> 0x14a58 fde=[ 2798]\n+ 0xffffffffc95543d8 (offset: 0x390f0) -> 0x14a78 fde=[ 27b8]\n+ 0xffffffffc9554458 (offset: 0x39170) -> 0x14a98 fde=[ 27d8]\n+ 0xffffffffc95544d8 (offset: 0x391f0) -> 0x14ab8 fde=[ 27f8]\n+ 0xffffffffc9554558 (offset: 0x39270) -> 0x14ad8 fde=[ 2818]\n+ 0xffffffffc95545d8 (offset: 0x392f0) -> 0x14af8 fde=[ 2838]\n+ 0xffffffffc9554648 (offset: 0x39360) -> 0x14b18 fde=[ 2858]\n+ 0xffffffffc95546b8 (offset: 0x393d0) -> 0x14b38 fde=[ 2878]\n+ 0xffffffffc9554728 (offset: 0x39440) -> 0x14b58 fde=[ 2898]\n+ 0xffffffffc9554798 (offset: 0x394b0) -> 0x14b78 fde=[ 28b8]\n+ 0xffffffffc9554808 (offset: 0x39520) -> 0x14b98 fde=[ 28d8]\n+ 0xffffffffc9554878 (offset: 0x39590) -> 0x14bb8 fde=[ 28f8]\n+ 0xffffffffc95548e8 (offset: 0x39600) -> 0x14bd8 fde=[ 2918]\n+ 0xffffffffc9554958 (offset: 0x39670) -> 0x14bf8 fde=[ 2938]\n+ 0xffffffffc95549c8 (offset: 0x396e0) -> 0x14c18 fde=[ 2958]\n+ 0xffffffffc9554a38 (offset: 0x39750) -> 0x14c38 fde=[ 2978]\n+ 0xffffffffc9554aa8 (offset: 0x397c0) -> 0x14c58 fde=[ 2998]\n+ 0xffffffffc9554b18 (offset: 0x39830) -> 0x14c78 fde=[ 29b8]\n+ 0xffffffffc9554b88 (offset: 0x398a0) -> 0x14c98 fde=[ 29d8]\n+ 0xffffffffc9554bf8 (offset: 0x39910) -> 0x14cb8 fde=[ 29f8]\n+ 0xffffffffc9554cd8 (offset: 0x399f0) -> 0x14cdc fde=[ 2a1c]\n+ 0xffffffffc9554db8 (offset: 0x39ad0) -> 0x14d00 fde=[ 2a40]\n+ 0xffffffffc9554e98 (offset: 0x39bb0) -> 0x14d24 fde=[ 2a64]\n+ 0xffffffffc9554f78 (offset: 0x39c90) -> 0x14d48 fde=[ 2a88]\n+ 0xffffffffc9555058 (offset: 0x39d70) -> 0x14d6c fde=[ 2aac]\n+ 0xffffffffc9555138 (offset: 0x39e50) -> 0x14d90 fde=[ 2ad0]\n+ 0xffffffffc95559b8 (offset: 0x3a6d0) -> 0x14db4 fde=[ 2af4]\n+ 0xffffffffc95559e8 (offset: 0x3a700) -> 0x14dd0 fde=[ 2b10]\n+ 0xffffffffc9555da8 (offset: 0x3aac0) -> 0x14e2c fde=[ 2b6c]\n+ 0xffffffffc9555e58 (offset: 0x3ab70) -> 0x14e50 fde=[ 2b90]\n+ 0xffffffffc9555ec8 (offset: 0x3abe0) -> 0x14e68 fde=[ 2ba8]\n+ 0xffffffffc9555ef8 (offset: 0x3ac10) -> 0x14e80 fde=[ 2bc0]\n+ 0xffffffffc9555f08 (offset: 0x3ac20) -> 0x14e94 fde=[ 2bd4]\n+ 0xffffffffc9558028 (offset: 0x3cd40) -> 0x14fe4 fde=[ 2d24]\n+ 0xffffffffc95582d8 (offset: 0x3cff0) -> 0x15040 fde=[ 2d80]\n+ 0xffffffffc9558588 (offset: 0x3d2a0) -> 0x1509c fde=[ 2ddc]\n+ 0xffffffffc95587f8 (offset: 0x3d510) -> 0x150f4 fde=[ 2e34]\n+ 0xffffffffc9558a78 (offset: 0x3d790) -> 0x1514c fde=[ 2e8c]\n+ 0xffffffffc9558a98 (offset: 0x3d7b0) -> 0x15160 fde=[ 2ea0]\n+ 0xffffffffc9558bf8 (offset: 0x3d910) -> 0x1518c fde=[ 2ecc]\n+ 0xffffffffc9558d78 (offset: 0x3da90) -> 0x151b0 fde=[ 2ef0]\n+ 0xffffffffc9558ef8 (offset: 0x3dc10) -> 0x151d4 fde=[ 2f14]\n+ 0xffffffffc9559078 (offset: 0x3dd90) -> 0x151f8 fde=[ 2f38]\n+ 0xffffffffc95591f8 (offset: 0x3df10) -> 0x1521c fde=[ 2f5c]\n+ 0xffffffffc9559378 (offset: 0x3e090) -> 0x15240 fde=[ 2f80]\n+ 0xffffffffc95594f8 (offset: 0x3e210) -> 0x15264 fde=[ 2fa4]\n+ 0xffffffffc9559678 (offset: 0x3e390) -> 0x15288 fde=[ 2fc8]\n+ 0xffffffffc95597f8 (offset: 0x3e510) -> 0x152ac fde=[ 2fec]\n+ 0xffffffffc9559978 (offset: 0x3e690) -> 0x152d0 fde=[ 3010]\n+ 0xffffffffc9559af8 (offset: 0x3e810) -> 0x152f4 fde=[ 3034]\n+ 0xffffffffc9559c78 (offset: 0x3e990) -> 0x15318 fde=[ 3058]\n+ 0xffffffffc9559df8 (offset: 0x3eb10) -> 0x1533c fde=[ 307c]\n+ 0xffffffffc9559f78 (offset: 0x3ec90) -> 0x15360 fde=[ 30a0]\n+ 0xffffffffc955a0f8 (offset: 0x3ee10) -> 0x15384 fde=[ 30c4]\n+ 0xffffffffc955a278 (offset: 0x3ef90) -> 0x153a8 fde=[ 30e8]\n+ 0xffffffffc955a3f8 (offset: 0x3f110) -> 0x153cc fde=[ 310c]\n+ 0xffffffffc955a718 (offset: 0x3f430) -> 0x153f0 fde=[ 3130]\n+ 0xffffffffc955a748 (offset: 0x3f460) -> 0x15560 fde=[ 32a0]\n+ 0xffffffffc955ac78 (offset: 0x3f990) -> 0x15408 fde=[ 3148]\n+ 0xffffffffc955ad18 (offset: 0x3fa30) -> 0x1542c fde=[ 316c]\n+ 0xffffffffc955adb8 (offset: 0x3fad0) -> 0x15450 fde=[ 3190]\n+ 0xffffffffc955b268 (offset: 0x3ff80) -> 0x154ac fde=[ 31ec]\n+ 0xffffffffc955b318 (offset: 0x40030) -> 0x154d0 fde=[ 3210]\n+ 0xffffffffc955b3c8 (offset: 0x400e0) -> 0x15508 fde=[ 3248]\n+ 0xffffffffc955b4b8 (offset: 0x401d0) -> 0x15528 fde=[ 3268]\n+ 0xffffffffc955b4e8 (offset: 0x40200) -> 0x15630 fde=[ 3370]\n+ 0xffffffffc955b518 (offset: 0x40230) -> 0x154f4 fde=[ 3234]\n+ 0xffffffffc955b528 (offset: 0x40240) -> 0x15650 fde=[ 3390]\n+ 0xffffffffc955b718 (offset: 0x40430) -> 0x156ac fde=[ 33ec]\n+ 0xffffffffc955b7b8 (offset: 0x404d0) -> 0x156d0 fde=[ 3410]\n+ 0xffffffffc955b828 (offset: 0x40540) -> 0x156e8 fde=[ 3428]\n+ 0xffffffffc955b858 (offset: 0x40570) -> 0x15700 fde=[ 3440]\n+ 0xffffffffc955b9d8 (offset: 0x406f0) -> 0x15758 fde=[ 3498]\n+ 0xffffffffc955bca8 (offset: 0x409c0) -> 0x1577c fde=[ 34bc]\n+ 0xffffffffc955bf78 (offset: 0x40c90) -> 0x157a0 fde=[ 34e0]\n+ 0xffffffffc955c018 (offset: 0x40d30) -> 0x157c4 fde=[ 3504]\n+ 0xffffffffc955c0a8 (offset: 0x40dc0) -> 0x157e8 fde=[ 3528]\n+ 0xffffffffc955c148 (offset: 0x40e60) -> 0x1580c fde=[ 354c]\n+ 0xffffffffc955c1d8 (offset: 0x40ef0) -> 0x15830 fde=[ 3570]\n+ 0xffffffffc955c4a8 (offset: 0x411c0) -> 0x15854 fde=[ 3594]\n+ 0xffffffffc955c778 (offset: 0x41490) -> 0x15878 fde=[ 35b8]\n+ 0xffffffffc955ca48 (offset: 0x41760) -> 0x1589c fde=[ 35dc]\n+ 0xffffffffc955cd18 (offset: 0x41a30) -> 0x158c0 fde=[ 3600]\n+ 0xffffffffc955cdb8 (offset: 0x41ad0) -> 0x158e4 fde=[ 3624]\n+ 0xffffffffc955ce58 (offset: 0x41b70) -> 0x15908 fde=[ 3648]\n+ 0xffffffffc955d128 (offset: 0x41e40) -> 0x1592c fde=[ 366c]\n+ 0xffffffffc955d3f8 (offset: 0x42110) -> 0x15950 fde=[ 3690]\n+ 0xffffffffc955d6b8 (offset: 0x423d0) -> 0x15974 fde=[ 36b4]\n+ 0xffffffffc955d6e8 (offset: 0x42400) -> 0x1598c fde=[ 36cc]\n+ 0xffffffffc955e828 (offset: 0x43540) -> 0x15b68 fde=[ 38a8]\n+ 0xffffffffc955f968 (offset: 0x44680) -> 0x15d44 fde=[ 3a84]\n+ 0xffffffffc955f998 (offset: 0x446b0) -> 0x15d64 fde=[ 3aa4]\n+ 0xffffffffc955f9c8 (offset: 0x446e0) -> 0x15d84 fde=[ 3ac4]\n+ 0xffffffffc9560b08 (offset: 0x45820) -> 0x15f60 fde=[ 3ca0]\n+ 0xffffffffc9561c48 (offset: 0x46960) -> 0x16140 fde=[ 3e80]\n+ 0xffffffffc9561da8 (offset: 0x46ac0) -> 0x16198 fde=[ 3ed8]\n+ 0xffffffffc9562078 (offset: 0x46d90) -> 0x161bc fde=[ 3efc]\n+ 0xffffffffc9562348 (offset: 0x47060) -> 0x161e0 fde=[ 3f20]\n+ 0xffffffffc95623e8 (offset: 0x47100) -> 0x16204 fde=[ 3f44]\n+ 0xffffffffc9562478 (offset: 0x47190) -> 0x16228 fde=[ 3f68]\n+ 0xffffffffc9562518 (offset: 0x47230) -> 0x1624c fde=[ 3f8c]\n+ 0xffffffffc95625a8 (offset: 0x472c0) -> 0x16270 fde=[ 3fb0]\n+ 0xffffffffc9562878 (offset: 0x47590) -> 0x16294 fde=[ 3fd4]\n+ 0xffffffffc9562b48 (offset: 0x47860) -> 0x162b8 fde=[ 3ff8]\n+ 0xffffffffc9562e18 (offset: 0x47b30) -> 0x162dc fde=[ 401c]\n+ 0xffffffffc95630e8 (offset: 0x47e00) -> 0x16300 fde=[ 4040]\n+ 0xffffffffc9563188 (offset: 0x47ea0) -> 0x16324 fde=[ 4064]\n+ 0xffffffffc9563228 (offset: 0x47f40) -> 0x16348 fde=[ 4088]\n+ 0xffffffffc95634f8 (offset: 0x48210) -> 0x1636c fde=[ 40ac]\n+ 0xffffffffc95637c8 (offset: 0x484e0) -> 0x16390 fde=[ 40d0]\n+ 0xffffffffc9563a88 (offset: 0x487a0) -> 0x163b4 fde=[ 40f4]\n+ 0xffffffffc9563ab8 (offset: 0x487d0) -> 0x163d0 fde=[ 4110]\n+ 0xffffffffc9564248 (offset: 0x48f60) -> 0x164cc fde=[ 420c]\n+ 0xffffffffc9564518 (offset: 0x49230) -> 0x164f0 fde=[ 4230]\n+ 0xffffffffc95647e8 (offset: 0x49500) -> 0x16514 fde=[ 4254]\n+ 0xffffffffc9564888 (offset: 0x495a0) -> 0x16538 fde=[ 4278]\n+ 0xffffffffc9564918 (offset: 0x49630) -> 0x1655c fde=[ 429c]\n+ 0xffffffffc9564be8 (offset: 0x49900) -> 0x16580 fde=[ 42c0]\n+ 0xffffffffc9564eb8 (offset: 0x49bd0) -> 0x165a4 fde=[ 42e4]\n+ 0xffffffffc9564f58 (offset: 0x49c70) -> 0x165c8 fde=[ 4308]\n+ 0xffffffffc9564fe8 (offset: 0x49d00) -> 0x165ec fde=[ 432c]\n+ 0xffffffffc95652b8 (offset: 0x49fd0) -> 0x16610 fde=[ 4350]\n+ 0xffffffffc9565588 (offset: 0x4a2a0) -> 0x16634 fde=[ 4374]\n+ 0xffffffffc9565628 (offset: 0x4a340) -> 0x16658 fde=[ 4398]\n+ 0xffffffffc95656b8 (offset: 0x4a3d0) -> 0x1667c fde=[ 43bc]\n+ 0xffffffffc9565988 (offset: 0x4a6a0) -> 0x166a0 fde=[ 43e0]\n+ 0xffffffffc9565c58 (offset: 0x4a970) -> 0x166c4 fde=[ 4404]\n+ 0xffffffffc9565cf8 (offset: 0x4aa10) -> 0x166e8 fde=[ 4428]\n+ 0xffffffffc9565d88 (offset: 0x4aaa0) -> 0x1670c fde=[ 444c]\n+ 0xffffffffc9566058 (offset: 0x4ad70) -> 0x16730 fde=[ 4470]\n+ 0xffffffffc9566328 (offset: 0x4b040) -> 0x16754 fde=[ 4494]\n+ 0xffffffffc95663c8 (offset: 0x4b0e0) -> 0x16778 fde=[ 44b8]\n+ 0xffffffffc9566458 (offset: 0x4b170) -> 0x1679c fde=[ 44dc]\n+ 0xffffffffc9566728 (offset: 0x4b440) -> 0x167c0 fde=[ 4500]\n+ 0xffffffffc95669f8 (offset: 0x4b710) -> 0x167e4 fde=[ 4524]\n+ 0xffffffffc9566a98 (offset: 0x4b7b0) -> 0x16808 fde=[ 4548]\n+ 0xffffffffc9566b28 (offset: 0x4b840) -> 0x1682c fde=[ 456c]\n+ 0xffffffffc9566df8 (offset: 0x4bb10) -> 0x16850 fde=[ 4590]\n+ 0xffffffffc95670c8 (offset: 0x4bde0) -> 0x16874 fde=[ 45b4]\n+ 0xffffffffc9567168 (offset: 0x4be80) -> 0x16898 fde=[ 45d8]\n+ 0xffffffffc9567438 (offset: 0x4c150) -> 0x168bc fde=[ 45fc]\n+ 0xffffffffc9567708 (offset: 0x4c420) -> 0x168e0 fde=[ 4620]\n+ 0xffffffffc95677a8 (offset: 0x4c4c0) -> 0x16904 fde=[ 4644]\n+ 0xffffffffc9567a78 (offset: 0x4c790) -> 0x16928 fde=[ 4668]\n+ 0xffffffffc9567d48 (offset: 0x4ca60) -> 0x1694c fde=[ 468c]\n+ 0xffffffffc9567de8 (offset: 0x4cb00) -> 0x16970 fde=[ 46b0]\n+ 0xffffffffc95680b8 (offset: 0x4cdd0) -> 0x16994 fde=[ 46d4]\n+ 0xffffffffc9568388 (offset: 0x4d0a0) -> 0x169b8 fde=[ 46f8]\n+ 0xffffffffc9568428 (offset: 0x4d140) -> 0x169dc fde=[ 471c]\n+ 0xffffffffc95686f8 (offset: 0x4d410) -> 0x16a00 fde=[ 4740]\n+ 0xffffffffc95689c8 (offset: 0x4d6e0) -> 0x16a24 fde=[ 4764]\n+ 0xffffffffc9568a68 (offset: 0x4d780) -> 0x16a48 fde=[ 4788]\n+ 0xffffffffc9568d38 (offset: 0x4da50) -> 0x16a6c fde=[ 47ac]\n+ 0xffffffffc9569008 (offset: 0x4dd20) -> 0x16a90 fde=[ 47d0]\n+ 0xffffffffc95692d8 (offset: 0x4dff0) -> 0x16ab4 fde=[ 47f4]\n+ 0xffffffffc95695a8 (offset: 0x4e2c0) -> 0x16ad8 fde=[ 4818]\n+ 0xffffffffc9569878 (offset: 0x4e590) -> 0x16afc fde=[ 483c]\n+ 0xffffffffc9569b48 (offset: 0x4e860) -> 0x16b20 fde=[ 4860]\n+ 0xffffffffc9569e18 (offset: 0x4eb30) -> 0x16b44 fde=[ 4884]\n+ 0xffffffffc956a0e8 (offset: 0x4ee00) -> 0x16b68 fde=[ 48a8]\n+ 0xffffffffc956a3b8 (offset: 0x4f0d0) -> 0x16b8c fde=[ 48cc]\n+ 0xffffffffc956a688 (offset: 0x4f3a0) -> 0x16bb0 fde=[ 48f0]\n+ 0xffffffffc956a958 (offset: 0x4f670) -> 0x16bd4 fde=[ 4914]\n+ 0xffffffffc956ac28 (offset: 0x4f940) -> 0x16bf8 fde=[ 4938]\n+ 0xffffffffc956aef8 (offset: 0x4fc10) -> 0x16c1c fde=[ 495c]\n+ 0xffffffffc956b1c8 (offset: 0x4fee0) -> 0x16c40 fde=[ 4980]\n+ 0xffffffffc956b498 (offset: 0x501b0) -> 0x16c64 fde=[ 49a4]\n+ 0xffffffffc956b768 (offset: 0x50480) -> 0x16c88 fde=[ 49c8]\n+ 0xffffffffc956ba38 (offset: 0x50750) -> 0x16cac fde=[ 49ec]\n+ 0xffffffffc956bd08 (offset: 0x50a20) -> 0x16cd0 fde=[ 4a10]\n+ 0xffffffffc956bfd8 (offset: 0x50cf0) -> 0x16cf4 fde=[ 4a34]\n+ 0xffffffffc956c2a8 (offset: 0x50fc0) -> 0x16d18 fde=[ 4a58]\n+ 0xffffffffc956c578 (offset: 0x51290) -> 0x16d3c fde=[ 4a7c]\n+ 0xffffffffc956c848 (offset: 0x51560) -> 0x16d60 fde=[ 4aa0]\n+ 0xffffffffc956cb18 (offset: 0x51830) -> 0x16d84 fde=[ 4ac4]\n+ 0xffffffffc956cde8 (offset: 0x51b00) -> 0x16da8 fde=[ 4ae8]\n+ 0xffffffffc956ce88 (offset: 0x51ba0) -> 0x16dcc fde=[ 4b0c]\n+ 0xffffffffc956db58 (offset: 0x52870) -> 0x16df0 fde=[ 4b30]\n+ 0xffffffffc956db88 (offset: 0x528a0) -> 0x16e08 fde=[ 4b48]\n+ 0xffffffffc956ecc8 (offset: 0x539e0) -> 0x16fe4 fde=[ 4d24]\n+ 0xffffffffc956fe08 (offset: 0x54b20) -> 0x171c0 fde=[ 4f00]\n+ 0xffffffffc9570f48 (offset: 0x55c60) -> 0x1739c fde=[ 50dc]\n+ 0xffffffffc9572088 (offset: 0x56da0) -> 0x17578 fde=[ 52b8]\n+ 0xffffffffc95731c8 (offset: 0x57ee0) -> 0x17754 fde=[ 5494]\n+ 0xffffffffc9574308 (offset: 0x59020) -> 0x17930 fde=[ 5670]\n+ 0xffffffffc9575448 (offset: 0x5a160) -> 0x17b0c fde=[ 584c]\n+ 0xffffffffc9576588 (offset: 0x5b2a0) -> 0x17ce8 fde=[ 5a28]\n+ 0xffffffffc9576678 (offset: 0x5b390) -> 0x17d5c fde=[ 5a9c]\n+ 0xffffffffc9576708 (offset: 0x5b420) -> 0x17d74 fde=[ 5ab4]\n+ 0xffffffffc9576798 (offset: 0x5b4b0) -> 0x17d8c fde=[ 5acc]\n+ 0xffffffffc9576918 (offset: 0x5b630) -> 0x17da8 fde=[ 5ae8]\n+ 0xffffffffc957b038 (offset: 0x5fd50) -> 0x17e04 fde=[ 5b44]\n+ 0xffffffffc957b2a8 (offset: 0x5ffc0) -> 0x17e8c fde=[ 5bcc]\n+ 0xffffffffc957b698 (offset: 0x603b0) -> 0x17ee8 fde=[ 5c28]\n+ 0xffffffffc957b748 (offset: 0x60460) -> 0x17f0c fde=[ 5c4c]\n+ 0xffffffffc957b888 (offset: 0x605a0) -> 0x17f30 fde=[ 5c70]\n+ 0xffffffffc957b9c8 (offset: 0x606e0) -> 0x17f54 fde=[ 5c94]\n+ 0xffffffffc957bb08 (offset: 0x60820) -> 0x17f78 fde=[ 5cb8]\n+ 0xffffffffc957bc48 (offset: 0x60960) -> 0x17f9c fde=[ 5cdc]\n+ 0xffffffffc957bd88 (offset: 0x60aa0) -> 0x17fc0 fde=[ 5d00]\n+ 0xffffffffc957bec8 (offset: 0x60be0) -> 0x17fe4 fde=[ 5d24]\n+ 0xffffffffc957c008 (offset: 0x60d20) -> 0x18008 fde=[ 5d48]\n+ 0xffffffffc957c148 (offset: 0x60e60) -> 0x1802c fde=[ 5d6c]\n+ 0xffffffffc957c288 (offset: 0x60fa0) -> 0x18050 fde=[ 5d90]\n+ 0xffffffffc957c3c8 (offset: 0x610e0) -> 0x18074 fde=[ 5db4]\n+ 0xffffffffc957c508 (offset: 0x61220) -> 0x18098 fde=[ 5dd8]\n+ 0xffffffffc957c648 (offset: 0x61360) -> 0x180bc fde=[ 5dfc]\n+ 0xffffffffc957c788 (offset: 0x614a0) -> 0x180e0 fde=[ 5e20]\n+ 0xffffffffc957c8c8 (offset: 0x615e0) -> 0x18104 fde=[ 5e44]\n+ 0xffffffffc957ca08 (offset: 0x61720) -> 0x18128 fde=[ 5e68]\n+ 0xffffffffc957cb48 (offset: 0x61860) -> 0x1814c fde=[ 5e8c]\n+ 0xffffffffc957cc88 (offset: 0x619a0) -> 0x18170 fde=[ 5eb0]\n+ 0xffffffffc957cdc8 (offset: 0x61ae0) -> 0x18194 fde=[ 5ed4]\n+ 0xffffffffc957cf08 (offset: 0x61c20) -> 0x181b8 fde=[ 5ef8]\n+ 0xffffffffc957d048 (offset: 0x61d60) -> 0x181dc fde=[ 5f1c]\n+ 0xffffffffc957d188 (offset: 0x61ea0) -> 0x18200 fde=[ 5f40]\n+ 0xffffffffc957d2c8 (offset: 0x61fe0) -> 0x18224 fde=[ 5f64]\n+ 0xffffffffc957d408 (offset: 0x62120) -> 0x18248 fde=[ 5f88]\n+ 0xffffffffc957d548 (offset: 0x62260) -> 0x1826c fde=[ 5fac]\n+ 0xffffffffc957d688 (offset: 0x623a0) -> 0x18290 fde=[ 5fd0]\n+ 0xffffffffc957d7c8 (offset: 0x624e0) -> 0x182b4 fde=[ 5ff4]\n+ 0xffffffffc957d908 (offset: 0x62620) -> 0x182d8 fde=[ 6018]\n+ 0xffffffffc957da48 (offset: 0x62760) -> 0x182fc fde=[ 603c]\n+ 0xffffffffc957db88 (offset: 0x628a0) -> 0x18320 fde=[ 6060]\n+ 0xffffffffc957dcc8 (offset: 0x629e0) -> 0x18344 fde=[ 6084]\n+ 0xffffffffc957de08 (offset: 0x62b20) -> 0x18368 fde=[ 60a8]\n+ 0xffffffffc957df48 (offset: 0x62c60) -> 0x1838c fde=[ 60cc]\n+ 0xffffffffc957e088 (offset: 0x62da0) -> 0x183b0 fde=[ 60f0]\n+ 0xffffffffc957e1c8 (offset: 0x62ee0) -> 0x183d4 fde=[ 6114]\n+ 0xffffffffc957e308 (offset: 0x63020) -> 0x183f8 fde=[ 6138]\n+ 0xffffffffc957e448 (offset: 0x63160) -> 0x1841c fde=[ 615c]\n+ 0xffffffffc957eb28 (offset: 0x63840) -> 0x18440 fde=[ 6180]\n+ 0xffffffffc957eb58 (offset: 0x63870) -> 0x18458 fde=[ 6198]\n+ 0xffffffffc957ebf8 (offset: 0x63910) -> 0x18488 fde=[ 61c8]\n+ 0xffffffffc957ec78 (offset: 0x63990) -> 0x184ac fde=[ 61ec]\n+ 0xffffffffc957ecb8 (offset: 0x639d0) -> 0x1900c fde=[ 6d4c]\n+ 0xffffffffc957ed08 (offset: 0x63a20) -> 0x1902c fde=[ 6d6c]\n+ 0xffffffffc957f228 (offset: 0x63f40) -> 0x184c8 fde=[ 6208]\n+ 0xffffffffc957f278 (offset: 0x63f90) -> 0x190f0 fde=[ 6e30]\n+ 0xffffffffc957f6b8 (offset: 0x643d0) -> 0x184f4 fde=[ 6234]\n+ 0xffffffffc957f6e8 (offset: 0x64400) -> 0x1912c fde=[ 6e6c]\n+ 0xffffffffc957fa98 (offset: 0x647b0) -> 0x1917c fde=[ 6ebc]\n+ 0xffffffffc957fae8 (offset: 0x64800) -> 0x1919c fde=[ 6edc]\n+ 0xffffffffc95800f8 (offset: 0x64e10) -> 0x191f0 fde=[ 6f30]\n+ 0xffffffffc95808b8 (offset: 0x655d0) -> 0x19264 fde=[ 6fa4]\n+ 0xffffffffc9580988 (offset: 0x656a0) -> 0x18508 fde=[ 6248]\n+ 0xffffffffc9580998 (offset: 0x656b0) -> 0x1851c fde=[ 625c]\n+ 0xffffffffc9580a88 (offset: 0x657a0) -> 0x18590 fde=[ 62d0]\n+ 0xffffffffc9580aa8 (offset: 0x657c0) -> 0x185a4 fde=[ 62e4]\n+ 0xffffffffc9580b18 (offset: 0x65830) -> 0x185d0 fde=[ 6310]\n+ 0xffffffffc9580b68 (offset: 0x65880) -> 0x185fc fde=[ 633c]\n+ 0xffffffffc9580b88 (offset: 0x658a0) -> 0x18614 fde=[ 6354]\n+ 0xffffffffc9580bb8 (offset: 0x658d0) -> 0x19284 fde=[ 6fc4]\n+ 0xffffffffc9580d08 (offset: 0x65a20) -> 0x18634 fde=[ 6374]\n+ 0xffffffffc9580d18 (offset: 0x65a30) -> 0x1864c fde=[ 638c]\n+ 0xffffffffc9580e58 (offset: 0x65b70) -> 0x18740 fde=[ 6480]\n+ 0xffffffffc9580f18 (offset: 0x65c30) -> 0x1877c fde=[ 64bc]\n+ 0xffffffffc9580f28 (offset: 0x65c40) -> 0x19338 fde=[ 7078]\n+ 0xffffffffc9581058 (offset: 0x65d70) -> 0x18790 fde=[ 64d0]\n+ 0xffffffffc9581068 (offset: 0x65d80) -> 0x187a4 fde=[ 64e4]\n+ 0xffffffffc9581108 (offset: 0x65e20) -> 0x193d4 fde=[ 7114]\n+ 0xffffffffc9581178 (offset: 0x65e90) -> 0x187e0 fde=[ 6520]\n+ 0xffffffffc9581188 (offset: 0x65ea0) -> 0x187f4 fde=[ 6534]\n+ 0xffffffffc9581248 (offset: 0x65f60) -> 0x18830 fde=[ 6570]\n+ 0xffffffffc95812f8 (offset: 0x66010) -> 0x1886c fde=[ 65ac]\n+ 0xffffffffc95813a8 (offset: 0x660c0) -> 0x188a8 fde=[ 65e8]\n+ 0xffffffffc9581458 (offset: 0x66170) -> 0x188e4 fde=[ 6624]\n+ 0xffffffffc9581588 (offset: 0x662a0) -> 0x18930 fde=[ 6670]\n+ 0xffffffffc9581628 (offset: 0x66340) -> 0x18988 fde=[ 66c8]\n+ 0xffffffffc9581638 (offset: 0x66350) -> 0x1899c fde=[ 66dc]\n+ 0xffffffffc95816b8 (offset: 0x663d0) -> 0x189c4 fde=[ 6704]\n+ 0xffffffffc95816c8 (offset: 0x663e0) -> 0x193fc fde=[ 713c]\n+ 0xffffffffc9581838 (offset: 0x66550) -> 0x189d8 fde=[ 6718]\n+ 0xffffffffc9581848 (offset: 0x66560) -> 0x189ec fde=[ 672c]\n+ 0xffffffffc9581868 (offset: 0x66580) -> 0x18a0c fde=[ 674c]\n+ 0xffffffffc9581878 (offset: 0x66590) -> 0x1944c fde=[ 718c]\n+ 0xffffffffc9581d18 (offset: 0x66a30) -> 0x194a0 fde=[ 71e0]\n+ 0xffffffffc9581fd8 (offset: 0x66cf0) -> 0x194f4 fde=[ 7234]\n+ 0xffffffffc9582298 (offset: 0x66fb0) -> 0x18a20 fde=[ 6760]\n+ 0xffffffffc95822a8 (offset: 0x66fc0) -> 0x1959c fde=[ 72dc]\n+ 0xffffffffc95823b8 (offset: 0x670d0) -> 0x195ec fde=[ 732c]\n+ 0xffffffffc9582548 (offset: 0x67260) -> 0x18a34 fde=[ 6774]\n+ 0xffffffffc9582588 (offset: 0x672a0) -> 0x18a50 fde=[ 6790]\n+ 0xffffffffc9582598 (offset: 0x672b0) -> 0x18a64 fde=[ 67a4]\n+ 0xffffffffc95825a8 (offset: 0x672c0) -> 0x18a78 fde=[ 67b8]\n+ 0xffffffffc9582608 (offset: 0x67320) -> 0x18aa4 fde=[ 67e4]\n+ 0xffffffffc9582618 (offset: 0x67330) -> 0x18ab8 fde=[ 67f8]\n+ 0xffffffffc95826a8 (offset: 0x673c0) -> 0x18ae8 fde=[ 6828]\n+ 0xffffffffc95826b8 (offset: 0x673d0) -> 0x18afc fde=[ 683c]\n+ 0xffffffffc95826c8 (offset: 0x673e0) -> 0x18b10 fde=[ 6850]\n+ 0xffffffffc95826d8 (offset: 0x673f0) -> 0x18b28 fde=[ 6868]\n+ 0xffffffffc9582f78 (offset: 0x67c90) -> 0x1963c fde=[ 737c]\n+ 0xffffffffc9583038 (offset: 0x67d50) -> 0x18bb0 fde=[ 68f0]\n+ 0xffffffffc9583078 (offset: 0x67d90) -> 0x18bc8 fde=[ 6908]\n+ 0xffffffffc95830e8 (offset: 0x67e00) -> 0x18bec fde=[ 692c]\n+ 0xffffffffc9583138 (offset: 0x67e50) -> 0x18c08 fde=[ 6948]\n+ 0xffffffffc9583178 (offset: 0x67e90) -> 0x18c24 fde=[ 6964]\n+ 0xffffffffc9583188 (offset: 0x67ea0) -> 0x18c38 fde=[ 6978]\n+ 0xffffffffc9583198 (offset: 0x67eb0) -> 0x18c4c fde=[ 698c]\n+ 0xffffffffc95831d8 (offset: 0x67ef0) -> 0x18c60 fde=[ 69a0]\n+ 0xffffffffc9583258 (offset: 0x67f70) -> 0x19670 fde=[ 73b0]\n+ 0xffffffffc95832c8 (offset: 0x67fe0) -> 0x19690 fde=[ 73d0]\n+ 0xffffffffc95833f8 (offset: 0x68110) -> 0x18ca0 fde=[ 69e0]\n+ 0xffffffffc9583408 (offset: 0x68120) -> 0x18cb4 fde=[ 69f4]\n+ 0xffffffffc9583438 (offset: 0x68150) -> 0x18cdc fde=[ 6a1c]\n+ 0xffffffffc9583558 (offset: 0x68270) -> 0x18d28 fde=[ 6a68]\n+ 0xffffffffc9583678 (offset: 0x68390) -> 0x18d74 fde=[ 6ab4]\n+ 0xffffffffc9583968 (offset: 0x68680) -> 0x18dc0 fde=[ 6b00]\n+ 0xffffffffc9583a08 (offset: 0x68720) -> 0x196c0 fde=[ 7400]\n+ 0xffffffffc95854e8 (offset: 0x6a200) -> 0x18de0 fde=[ 6b20]\n+ 0xffffffffc9585598 (offset: 0x6a2b0) -> 0x18e0c fde=[ 6b4c]\n+ 0xffffffffc9585678 (offset: 0x6a390) -> 0x19a24 fde=[ 7764]\n+ 0xffffffffc958af48 (offset: 0x6fc60) -> 0x1a1f0 fde=[ 7f30]\n+ 0xffffffffc958e0e8 (offset: 0x72e00) -> 0x1a73c fde=[ 847c]\n+ 0xffffffffc958f4f8 (offset: 0x74210) -> 0x18e5c fde=[ 6b9c]\n+ 0xffffffffc958f658 (offset: 0x74370) -> 0x18e80 fde=[ 6bc0]\n+ 0xffffffffc958f818 (offset: 0x74530) -> 0x1aa20 fde=[ 8760]\n+ 0xffffffffc958f8a8 (offset: 0x745c0) -> 0x18fdc fde=[ 6d1c]\n+ 0xffffffffc958f918 (offset: 0x74630) -> 0x18ff4 fde=[ 6d34]\n+ 0xffffffffc958f948 (offset: 0x74660) -> 0x1aa94 fde=[ 87d4]\n+ 0xffffffffc9591ad8 (offset: 0x767f0) -> 0x1ad74 fde=[ 8ab4]\n+ 0xffffffffc9593a08 (offset: 0x78720) -> 0x19244 fde=[ 6f84]\n+ 0xffffffffc9593a28 (offset: 0x78740) -> 0x192b8 fde=[ 6ff8]\n+ 0xffffffffc9593c28 (offset: 0x78940) -> 0x18674 fde=[ 63b4]\n+ 0xffffffffc9593d58 (offset: 0x78a70) -> 0x19308 fde=[ 7048]\n+ 0xffffffffc9593e28 (offset: 0x78b40) -> 0x186c0 fde=[ 6400]\n+ 0xffffffffc9593e48 (offset: 0x78b60) -> 0x186dc fde=[ 641c]\n+ 0xffffffffc9593f98 (offset: 0x78cb0) -> 0x18710 fde=[ 6450]\n+ 0xffffffffc9594098 (offset: 0x78db0) -> 0x19384 fde=[ 70c4]\n+ 0xffffffffc9594278 (offset: 0x78f90) -> 0x1895c fde=[ 669c]\n+ 0xffffffffc95942b8 (offset: 0x78fd0) -> 0x19548 fde=[ 7288]\n+ 0xffffffffc9594448 (offset: 0x79160) -> 0x18c8c fde=[ 69cc]\n+ 0xffffffffc9594458 (offset: 0x79170) -> 0x18e38 fde=[ 6b78]\n+ 0xffffffffc95944c8 (offset: 0x791e0) -> 0x1a9c0 fde=[ 8700]\n+ 0xffffffffc95944f8 (offset: 0x79210) -> 0x1a9e0 fde=[ 8720]\n+ 0xffffffffc9594528 (offset: 0x79240) -> 0x1aa00 fde=[ 8740]\n+ 0xffffffffc9594558 (offset: 0x79270) -> 0x18ef8 fde=[ 6c38]\n+ 0xffffffffc95949c8 (offset: 0x796e0) -> 0x18f60 fde=[ 6ca0]\n+ 0xffffffffc9594b48 (offset: 0x79860) -> 0x1aa44 fde=[ 8784]\n+ 0xffffffffc9594c58 (offset: 0x79970) -> 0x18f74 fde=[ 6cb4]\n+ 0xffffffffc9594f38 (offset: 0x79c50) -> 0x1adc8 fde=[ 8b08]\n+ 0xffffffffc95953f8 (offset: 0x7a110) -> 0x1ae24 fde=[ 8b64]\n+ 0xffffffffc9595508 (offset: 0x7a220) -> 0x1ae48 fde=[ 8b88]\n+ 0xffffffffc9595618 (offset: 0x7a330) -> 0x1ae6c fde=[ 8bac]\n+ 0xffffffffc95956b8 (offset: 0x7a3d0) -> 0x1ae8c fde=[ 8bcc]\n+ 0xffffffffc95956e8 (offset: 0x7a400) -> 0x1aea8 fde=[ 8be8]\n+ 0xffffffffc9595d68 (offset: 0x7aa80) -> 0x1af04 fde=[ 8c44]\n+ 0xffffffffc9595ef8 (offset: 0x7ac10) -> 0x1af28 fde=[ 8c68]\n+ 0xffffffffc9596088 (offset: 0x7ada0) -> 0x1af4c fde=[ 8c8c]\n+ 0xffffffffc9596128 (offset: 0x7ae40) -> 0x1af6c fde=[ 8cac]\n+ 0xffffffffc9596158 (offset: 0x7ae70) -> 0x1af88 fde=[ 8cc8]\n+ 0xffffffffc9596328 (offset: 0x7b040) -> 0x1afdc fde=[ 8d1c]\n+ 0xffffffffc95963a8 (offset: 0x7b0c0) -> 0x1affc fde=[ 8d3c]\n+ 0xffffffffc9596418 (offset: 0x7b130) -> 0x1b014 fde=[ 8d54]\n+ 0xffffffffc9596448 (offset: 0x7b160) -> 0x1b0ac fde=[ 8dec]\n+ 0xffffffffc9597b88 (offset: 0x7c8a0) -> 0x1b030 fde=[ 8d70]\n+ 0xffffffffc9597c18 (offset: 0x7c930) -> 0x1b048 fde=[ 8d88]\n+ 0xffffffffc9597dc8 (offset: 0x7cae0) -> 0x1b098 fde=[ 8dd8]\n+ 0xffffffffc9597e38 (offset: 0x7cb50) -> 0x1b2b4 fde=[ 8ff4]\n+ 0xffffffffc9597e68 (offset: 0x7cb80) -> 0x1b2d4 fde=[ 9014]\n+ 0xffffffffc9597e98 (offset: 0x7cbb0) -> 0x1b2f8 fde=[ 9038]\n+ 0xffffffffc95986d8 (offset: 0x7d3f0) -> 0x1b454 fde=[ 9194]\n+ 0xffffffffc9598918 (offset: 0x7d630) -> 0x1b59c fde=[ 92dc]\n+ 0xffffffffc9598a98 (offset: 0x7d7b0) -> 0x1b5b0 fde=[ 92f0]\n+ 0xffffffffc95a2348 (offset: 0x87060) -> 0x1b60c fde=[ 934c]\n+ 0xffffffffc95a24b8 (offset: 0x871d0) -> 0x1b630 fde=[ 9370]\n+ 0xffffffffc95a2628 (offset: 0x87340) -> 0x1b654 fde=[ 9394]\n+ 0xffffffffc95a2798 (offset: 0x874b0) -> 0x1b678 fde=[ 93b8]\n+ 0xffffffffc95a2908 (offset: 0x87620) -> 0x1b69c fde=[ 93dc]\n+ 0xffffffffc95a2a78 (offset: 0x87790) -> 0x1b6c0 fde=[ 9400]\n+ 0xffffffffc95a2be8 (offset: 0x87900) -> 0x1b6e4 fde=[ 9424]\n+ 0xffffffffc95a2d58 (offset: 0x87a70) -> 0x1b708 fde=[ 9448]\n+ 0xffffffffc95a2ec8 (offset: 0x87be0) -> 0x1b72c fde=[ 946c]\n+ 0xffffffffc95a3038 (offset: 0x87d50) -> 0x1b750 fde=[ 9490]\n+ 0xffffffffc95a31a8 (offset: 0x87ec0) -> 0x1b774 fde=[ 94b4]\n+ 0xffffffffc95a3318 (offset: 0x88030) -> 0x1b798 fde=[ 94d8]\n+ 0xffffffffc95a3488 (offset: 0x881a0) -> 0x1b7bc fde=[ 94fc]\n+ 0xffffffffc95a35f8 (offset: 0x88310) -> 0x1b7e0 fde=[ 9520]\n+ 0xffffffffc95a3768 (offset: 0x88480) -> 0x1b804 fde=[ 9544]\n+ 0xffffffffc95a38d8 (offset: 0x885f0) -> 0x1b828 fde=[ 9568]\n+ 0xffffffffc95a3a48 (offset: 0x88760) -> 0x1b84c fde=[ 958c]\n+ 0xffffffffc95a3bb8 (offset: 0x888d0) -> 0x1b870 fde=[ 95b0]\n+ 0xffffffffc95a3d28 (offset: 0x88a40) -> 0x1b894 fde=[ 95d4]\n+ 0xffffffffc95a3e98 (offset: 0x88bb0) -> 0x1b8b8 fde=[ 95f8]\n+ 0xffffffffc95a4008 (offset: 0x88d20) -> 0x1b8dc fde=[ 961c]\n+ 0xffffffffc95a4178 (offset: 0x88e90) -> 0x1b900 fde=[ 9640]\n+ 0xffffffffc95a42e8 (offset: 0x89000) -> 0x1b924 fde=[ 9664]\n+ 0xffffffffc95a4458 (offset: 0x89170) -> 0x1b948 fde=[ 9688]\n+ 0xffffffffc95a45c8 (offset: 0x892e0) -> 0x1b96c fde=[ 96ac]\n+ 0xffffffffc95a4738 (offset: 0x89450) -> 0x1b990 fde=[ 96d0]\n+ 0xffffffffc95a48a8 (offset: 0x895c0) -> 0x1b9b4 fde=[ 96f4]\n+ 0xffffffffc95a4a18 (offset: 0x89730) -> 0x1b9d8 fde=[ 9718]\n+ 0xffffffffc95a4b88 (offset: 0x898a0) -> 0x1b9fc fde=[ 973c]\n+ 0xffffffffc95a4cf8 (offset: 0x89a10) -> 0x1ba20 fde=[ 9760]\n+ 0xffffffffc95a4e68 (offset: 0x89b80) -> 0x1ba44 fde=[ 9784]\n+ 0xffffffffc95a4fd8 (offset: 0x89cf0) -> 0x1ba68 fde=[ 97a8]\n+ 0xffffffffc95a5148 (offset: 0x89e60) -> 0x1ba8c fde=[ 97cc]\n+ 0xffffffffc95a52b8 (offset: 0x89fd0) -> 0x1bab0 fde=[ 97f0]\n+ 0xffffffffc95a5428 (offset: 0x8a140) -> 0x1bad4 fde=[ 9814]\n+ 0xffffffffc95a5598 (offset: 0x8a2b0) -> 0x1baf8 fde=[ 9838]\n+ 0xffffffffc95a5708 (offset: 0x8a420) -> 0x1bb1c fde=[ 985c]\n+ 0xffffffffc95a5878 (offset: 0x8a590) -> 0x1bb40 fde=[ 9880]\n+ 0xffffffffc95a59e8 (offset: 0x8a700) -> 0x1bb64 fde=[ 98a4]\n+ 0xffffffffc95a5b58 (offset: 0x8a870) -> 0x1bb88 fde=[ 98c8]\n+ 0xffffffffc95a5cc8 (offset: 0x8a9e0) -> 0x1bbac fde=[ 98ec]\n+ 0xffffffffc95a5e38 (offset: 0x8ab50) -> 0x1bbd0 fde=[ 9910]\n+ 0xffffffffc95a5fa8 (offset: 0x8acc0) -> 0x1bbf4 fde=[ 9934]\n+ 0xffffffffc95a6118 (offset: 0x8ae30) -> 0x1bc18 fde=[ 9958]\n+ 0xffffffffc95a6288 (offset: 0x8afa0) -> 0x1bc3c fde=[ 997c]\n+ 0xffffffffc95a63f8 (offset: 0x8b110) -> 0x1bc60 fde=[ 99a0]\n+ 0xffffffffc95a6568 (offset: 0x8b280) -> 0x1bc84 fde=[ 99c4]\n+ 0xffffffffc95a66d8 (offset: 0x8b3f0) -> 0x1bca8 fde=[ 99e8]\n+ 0xffffffffc95a6848 (offset: 0x8b560) -> 0x1bccc fde=[ 9a0c]\n+ 0xffffffffc95a69b8 (offset: 0x8b6d0) -> 0x1bcf0 fde=[ 9a30]\n+ 0xffffffffc95a6b28 (offset: 0x8b840) -> 0x1bd14 fde=[ 9a54]\n+ 0xffffffffc95a6c98 (offset: 0x8b9b0) -> 0x1bd38 fde=[ 9a78]\n+ 0xffffffffc95a6e08 (offset: 0x8bb20) -> 0x1bd5c fde=[ 9a9c]\n+ 0xffffffffc95a6f78 (offset: 0x8bc90) -> 0x1bd80 fde=[ 9ac0]\n+ 0xffffffffc95a70e8 (offset: 0x8be00) -> 0x1bda4 fde=[ 9ae4]\n+ 0xffffffffc95a7258 (offset: 0x8bf70) -> 0x1bdc8 fde=[ 9b08]\n+ 0xffffffffc95a73c8 (offset: 0x8c0e0) -> 0x1bdec fde=[ 9b2c]\n+ 0xffffffffc95a7538 (offset: 0x8c250) -> 0x1be10 fde=[ 9b50]\n+ 0xffffffffc95a76a8 (offset: 0x8c3c0) -> 0x1be34 fde=[ 9b74]\n+ 0xffffffffc95a7818 (offset: 0x8c530) -> 0x1be58 fde=[ 9b98]\n+ 0xffffffffc95a7988 (offset: 0x8c6a0) -> 0x1be7c fde=[ 9bbc]\n+ 0xffffffffc95a7af8 (offset: 0x8c810) -> 0x1bea0 fde=[ 9be0]\n+ 0xffffffffc95a7c68 (offset: 0x8c980) -> 0x1bec4 fde=[ 9c04]\n+ 0xffffffffc95a7dd8 (offset: 0x8caf0) -> 0x1bee8 fde=[ 9c28]\n+ 0xffffffffc95a7f48 (offset: 0x8cc60) -> 0x1bf0c fde=[ 9c4c]\n+ 0xffffffffc95b17f8 (offset: 0x96510) -> 0x1bf68 fde=[ 9ca8]\n+ 0xffffffffc95bb0a8 (offset: 0x9fdc0) -> 0x1bfc4 fde=[ 9d04]\n+ 0xffffffffc95bb218 (offset: 0x9ff30) -> 0x1bfe8 fde=[ 9d28]\n+ 0xffffffffc95bb388 (offset: 0xa00a0) -> 0x1c00c fde=[ 9d4c]\n+ 0xffffffffc95bb4f8 (offset: 0xa0210) -> 0x1c030 fde=[ 9d70]\n+ 0xffffffffc95bb668 (offset: 0xa0380) -> 0x1c054 fde=[ 9d94]\n+ 0xffffffffc95bb7d8 (offset: 0xa04f0) -> 0x1c078 fde=[ 9db8]\n+ 0xffffffffc95bb948 (offset: 0xa0660) -> 0x1c09c fde=[ 9ddc]\n+ 0xffffffffc95bbab8 (offset: 0xa07d0) -> 0x1c0c0 fde=[ 9e00]\n+ 0xffffffffc95bbc28 (offset: 0xa0940) -> 0x1c0e4 fde=[ 9e24]\n+ 0xffffffffc95bbd98 (offset: 0xa0ab0) -> 0x1c108 fde=[ 9e48]\n+ 0xffffffffc95bbf08 (offset: 0xa0c20) -> 0x1c12c fde=[ 9e6c]\n+ 0xffffffffc95bc078 (offset: 0xa0d90) -> 0x1c150 fde=[ 9e90]\n+ 0xffffffffc95bc1e8 (offset: 0xa0f00) -> 0x1c174 fde=[ 9eb4]\n+ 0xffffffffc95bc358 (offset: 0xa1070) -> 0x1c198 fde=[ 9ed8]\n+ 0xffffffffc95bc4c8 (offset: 0xa11e0) -> 0x1c1bc fde=[ 9efc]\n+ 0xffffffffc95bc638 (offset: 0xa1350) -> 0x1c1e0 fde=[ 9f20]\n+ 0xffffffffc95bc7a8 (offset: 0xa14c0) -> 0x1c204 fde=[ 9f44]\n+ 0xffffffffc95bc918 (offset: 0xa1630) -> 0x1c228 fde=[ 9f68]\n+ 0xffffffffc95bca88 (offset: 0xa17a0) -> 0x1c24c fde=[ 9f8c]\n+ 0xffffffffc95bcbf8 (offset: 0xa1910) -> 0x1c270 fde=[ 9fb0]\n+ 0xffffffffc95bcd68 (offset: 0xa1a80) -> 0x1c294 fde=[ 9fd4]\n+ 0xffffffffc95bced8 (offset: 0xa1bf0) -> 0x1c2b8 fde=[ 9ff8]\n+ 0xffffffffc95bd048 (offset: 0xa1d60) -> 0x1c2dc fde=[ a01c]\n+ 0xffffffffc95bd1b8 (offset: 0xa1ed0) -> 0x1c300 fde=[ a040]\n+ 0xffffffffc95bd328 (offset: 0xa2040) -> 0x1c324 fde=[ a064]\n+ 0xffffffffc95bd498 (offset: 0xa21b0) -> 0x1c348 fde=[ a088]\n+ 0xffffffffc95bd608 (offset: 0xa2320) -> 0x1c36c fde=[ a0ac]\n+ 0xffffffffc95bd778 (offset: 0xa2490) -> 0x1c390 fde=[ a0d0]\n+ 0xffffffffc95bd8e8 (offset: 0xa2600) -> 0x1c3b4 fde=[ a0f4]\n+ 0xffffffffc95bda58 (offset: 0xa2770) -> 0x1c3d8 fde=[ a118]\n+ 0xffffffffc95bdbc8 (offset: 0xa28e0) -> 0x1c3fc fde=[ a13c]\n+ 0xffffffffc95bdd38 (offset: 0xa2a50) -> 0x1c420 fde=[ a160]\n+ 0xffffffffc95bdea8 (offset: 0xa2bc0) -> 0x1c444 fde=[ a184]\n+ 0xffffffffc95be018 (offset: 0xa2d30) -> 0x1c468 fde=[ a1a8]\n+ 0xffffffffc95be188 (offset: 0xa2ea0) -> 0x1c48c fde=[ a1cc]\n+ 0xffffffffc95be2f8 (offset: 0xa3010) -> 0x1c4b0 fde=[ a1f0]\n+ 0xffffffffc95be468 (offset: 0xa3180) -> 0x1c4d4 fde=[ a214]\n+ 0xffffffffc95be5d8 (offset: 0xa32f0) -> 0x1c4f8 fde=[ a238]\n+ 0xffffffffc95be748 (offset: 0xa3460) -> 0x1c51c fde=[ a25c]\n+ 0xffffffffc95be8b8 (offset: 0xa35d0) -> 0x1c540 fde=[ a280]\n+ 0xffffffffc95bea28 (offset: 0xa3740) -> 0x1c564 fde=[ a2a4]\n+ 0xffffffffc95beb98 (offset: 0xa38b0) -> 0x1c588 fde=[ a2c8]\n+ 0xffffffffc95bed08 (offset: 0xa3a20) -> 0x1c5ac fde=[ a2ec]\n+ 0xffffffffc95bee78 (offset: 0xa3b90) -> 0x1c5d0 fde=[ a310]\n+ 0xffffffffc95befe8 (offset: 0xa3d00) -> 0x1c5f4 fde=[ a334]\n+ 0xffffffffc95bf158 (offset: 0xa3e70) -> 0x1c618 fde=[ a358]\n+ 0xffffffffc95bf2c8 (offset: 0xa3fe0) -> 0x1c63c fde=[ a37c]\n+ 0xffffffffc95bf438 (offset: 0xa4150) -> 0x1c660 fde=[ a3a0]\n+ 0xffffffffc95bf5a8 (offset: 0xa42c0) -> 0x1c684 fde=[ a3c4]\n+ 0xffffffffc95bf718 (offset: 0xa4430) -> 0x1c6a8 fde=[ a3e8]\n+ 0xffffffffc95bf888 (offset: 0xa45a0) -> 0x1c6cc fde=[ a40c]\n+ 0xffffffffc95bf9f8 (offset: 0xa4710) -> 0x1c6f0 fde=[ a430]\n+ 0xffffffffc95bfb68 (offset: 0xa4880) -> 0x1c714 fde=[ a454]\n+ 0xffffffffc95bfcd8 (offset: 0xa49f0) -> 0x1c738 fde=[ a478]\n+ 0xffffffffc95bfe48 (offset: 0xa4b60) -> 0x1c75c fde=[ a49c]\n+ 0xffffffffc95bffb8 (offset: 0xa4cd0) -> 0x1c780 fde=[ a4c0]\n+ 0xffffffffc95c0128 (offset: 0xa4e40) -> 0x1c7a4 fde=[ a4e4]\n+ 0xffffffffc95c0298 (offset: 0xa4fb0) -> 0x1c7c8 fde=[ a508]\n+ 0xffffffffc95c0408 (offset: 0xa5120) -> 0x1c7ec fde=[ a52c]\n+ 0xffffffffc95c0578 (offset: 0xa5290) -> 0x1c810 fde=[ a550]\n+ 0xffffffffc95c06e8 (offset: 0xa5400) -> 0x1c834 fde=[ a574]\n+ 0xffffffffc95c0858 (offset: 0xa5570) -> 0x1c858 fde=[ a598]\n+ 0xffffffffc95c09c8 (offset: 0xa56e0) -> 0x1c87c fde=[ a5bc]\n+ 0xffffffffc95c0b38 (offset: 0xa5850) -> 0x1c8a0 fde=[ a5e0]\n+ 0xffffffffc95c0ca8 (offset: 0xa59c0) -> 0x1c8c4 fde=[ a604]\n+ 0xffffffffc95c0e18 (offset: 0xa5b30) -> 0x1c8e8 fde=[ a628]\n+ 0xffffffffc95c0f88 (offset: 0xa5ca0) -> 0x1c90c fde=[ a64c]\n+ 0xffffffffc95c10f8 (offset: 0xa5e10) -> 0x1c930 fde=[ a670]\n+ 0xffffffffc95c1268 (offset: 0xa5f80) -> 0x1c954 fde=[ a694]\n+ 0xffffffffc95c13d8 (offset: 0xa60f0) -> 0x1c978 fde=[ a6b8]\n+ 0xffffffffc95c1548 (offset: 0xa6260) -> 0x1c99c fde=[ a6dc]\n+ 0xffffffffc95c16b8 (offset: 0xa63d0) -> 0x1c9c0 fde=[ a700]\n+ 0xffffffffc95c1828 (offset: 0xa6540) -> 0x1c9e4 fde=[ a724]\n+ 0xffffffffc95c1998 (offset: 0xa66b0) -> 0x1ca08 fde=[ a748]\n+ 0xffffffffc95c1b08 (offset: 0xa6820) -> 0x1ca2c fde=[ a76c]\n+ 0xffffffffc95c1c78 (offset: 0xa6990) -> 0x1ca50 fde=[ a790]\n+ 0xffffffffc95c1de8 (offset: 0xa6b00) -> 0x1ca74 fde=[ a7b4]\n+ 0xffffffffc95c1f58 (offset: 0xa6c70) -> 0x1ca98 fde=[ a7d8]\n+ 0xffffffffc95c20c8 (offset: 0xa6de0) -> 0x1cabc fde=[ a7fc]\n+ 0xffffffffc95c2238 (offset: 0xa6f50) -> 0x1cae0 fde=[ a820]\n+ 0xffffffffc95c23a8 (offset: 0xa70c0) -> 0x1cb04 fde=[ a844]\n+ 0xffffffffc95c2518 (offset: 0xa7230) -> 0x1cb28 fde=[ a868]\n+ 0xffffffffc95c2688 (offset: 0xa73a0) -> 0x1cb4c fde=[ a88c]\n+ 0xffffffffc95c27f8 (offset: 0xa7510) -> 0x1cb70 fde=[ a8b0]\n+ 0xffffffffc95c2968 (offset: 0xa7680) -> 0x1cb94 fde=[ a8d4]\n+ 0xffffffffc95c2ad8 (offset: 0xa77f0) -> 0x1cbb8 fde=[ a8f8]\n+ 0xffffffffc95c2c48 (offset: 0xa7960) -> 0x1cbdc fde=[ a91c]\n+ 0xffffffffc95c2db8 (offset: 0xa7ad0) -> 0x1cc00 fde=[ a940]\n+ 0xffffffffc95c2f28 (offset: 0xa7c40) -> 0x1cc24 fde=[ a964]\n+ 0xffffffffc95c3098 (offset: 0xa7db0) -> 0x1cc48 fde=[ a988]\n+ 0xffffffffc95c3208 (offset: 0xa7f20) -> 0x1cc6c fde=[ a9ac]\n+ 0xffffffffc95c3378 (offset: 0xa8090) -> 0x1cc90 fde=[ a9d0]\n+ 0xffffffffc95c34e8 (offset: 0xa8200) -> 0x1ccb4 fde=[ a9f4]\n+ 0xffffffffc95c3658 (offset: 0xa8370) -> 0x1ccd8 fde=[ aa18]\n+ 0xffffffffc95c37c8 (offset: 0xa84e0) -> 0x1ccfc fde=[ aa3c]\n+ 0xffffffffc95c3938 (offset: 0xa8650) -> 0x1cd20 fde=[ aa60]\n+ 0xffffffffc95c3aa8 (offset: 0xa87c0) -> 0x1cd44 fde=[ aa84]\n+ 0xffffffffc95c3c18 (offset: 0xa8930) -> 0x1cd68 fde=[ aaa8]\n+ 0xffffffffc95c3d88 (offset: 0xa8aa0) -> 0x1cd8c fde=[ aacc]\n+ 0xffffffffc95c3ef8 (offset: 0xa8c10) -> 0x1cdb0 fde=[ aaf0]\n+ 0xffffffffc95c4068 (offset: 0xa8d80) -> 0x1cdd4 fde=[ ab14]\n+ 0xffffffffc95c41d8 (offset: 0xa8ef0) -> 0x1cdf8 fde=[ ab38]\n+ 0xffffffffc95c4348 (offset: 0xa9060) -> 0x1ce1c fde=[ ab5c]\n+ 0xffffffffc95c44b8 (offset: 0xa91d0) -> 0x1ce40 fde=[ ab80]\n+ 0xffffffffc95c4628 (offset: 0xa9340) -> 0x1ce64 fde=[ aba4]\n+ 0xffffffffc95c4798 (offset: 0xa94b0) -> 0x1ce88 fde=[ abc8]\n+ 0xffffffffc95c4908 (offset: 0xa9620) -> 0x1ceac fde=[ abec]\n+ 0xffffffffc95c4a78 (offset: 0xa9790) -> 0x1ced0 fde=[ ac10]\n+ 0xffffffffc95c4be8 (offset: 0xa9900) -> 0x1cef4 fde=[ ac34]\n+ 0xffffffffc95c4d58 (offset: 0xa9a70) -> 0x1cf18 fde=[ ac58]\n+ 0xffffffffc95c4ec8 (offset: 0xa9be0) -> 0x1cf3c fde=[ ac7c]\n+ 0xffffffffc95c5038 (offset: 0xa9d50) -> 0x1cf60 fde=[ aca0]\n+ 0xffffffffc95c51a8 (offset: 0xa9ec0) -> 0x1cf84 fde=[ acc4]\n+ 0xffffffffc95c5318 (offset: 0xaa030) -> 0x1cfa8 fde=[ ace8]\n+ 0xffffffffc95c5488 (offset: 0xaa1a0) -> 0x1cfcc fde=[ ad0c]\n+ 0xffffffffc95c55f8 (offset: 0xaa310) -> 0x1cff0 fde=[ ad30]\n+ 0xffffffffc95c5768 (offset: 0xaa480) -> 0x1d014 fde=[ ad54]\n+ 0xffffffffc95c58d8 (offset: 0xaa5f0) -> 0x1d038 fde=[ ad78]\n+ 0xffffffffc95c5a48 (offset: 0xaa760) -> 0x1d05c fde=[ ad9c]\n+ 0xffffffffc95c5bb8 (offset: 0xaa8d0) -> 0x1d080 fde=[ adc0]\n+ 0xffffffffc95c5d28 (offset: 0xaaa40) -> 0x1d0a4 fde=[ ade4]\n+ 0xffffffffc95c5e98 (offset: 0xaabb0) -> 0x1d0c8 fde=[ ae08]\n+ 0xffffffffc95c6008 (offset: 0xaad20) -> 0x1d0ec fde=[ ae2c]\n+ 0xffffffffc95c6178 (offset: 0xaae90) -> 0x1d110 fde=[ ae50]\n+ 0xffffffffc95c62e8 (offset: 0xab000) -> 0x1d134 fde=[ ae74]\n+ 0xffffffffc95c6458 (offset: 0xab170) -> 0x1d158 fde=[ ae98]\n+ 0xffffffffc95c65c8 (offset: 0xab2e0) -> 0x1d17c fde=[ aebc]\n+ 0xffffffffc95c6738 (offset: 0xab450) -> 0x1d1a0 fde=[ aee0]\n+ 0xffffffffc95c68a8 (offset: 0xab5c0) -> 0x1d1c4 fde=[ af04]\n+ 0xffffffffc95d0158 (offset: 0xb4e70) -> 0x1d220 fde=[ af60]\n+ 0xffffffffc95d02c8 (offset: 0xb4fe0) -> 0x1d244 fde=[ af84]\n+ 0xffffffffc95d0438 (offset: 0xb5150) -> 0x1d268 fde=[ afa8]\n+ 0xffffffffc95d05a8 (offset: 0xb52c0) -> 0x1d28c fde=[ afcc]\n+ 0xffffffffc95d0718 (offset: 0xb5430) -> 0x1d2b0 fde=[ aff0]\n+ 0xffffffffc95d0888 (offset: 0xb55a0) -> 0x1d2d4 fde=[ b014]\n+ 0xffffffffc95d09f8 (offset: 0xb5710) -> 0x1d2f8 fde=[ b038]\n+ 0xffffffffc95d0b68 (offset: 0xb5880) -> 0x1d31c fde=[ b05c]\n+ 0xffffffffc95d0cd8 (offset: 0xb59f0) -> 0x1d340 fde=[ b080]\n+ 0xffffffffc95d0e48 (offset: 0xb5b60) -> 0x1d364 fde=[ b0a4]\n+ 0xffffffffc95d0fb8 (offset: 0xb5cd0) -> 0x1d388 fde=[ b0c8]\n+ 0xffffffffc95d1128 (offset: 0xb5e40) -> 0x1d3ac fde=[ b0ec]\n+ 0xffffffffc95d1298 (offset: 0xb5fb0) -> 0x1d3d0 fde=[ b110]\n+ 0xffffffffc95d1408 (offset: 0xb6120) -> 0x1d3f4 fde=[ b134]\n+ 0xffffffffc95d1578 (offset: 0xb6290) -> 0x1d418 fde=[ b158]\n+ 0xffffffffc95d16e8 (offset: 0xb6400) -> 0x1d43c fde=[ b17c]\n+ 0xffffffffc95d1858 (offset: 0xb6570) -> 0x1d460 fde=[ b1a0]\n+ 0xffffffffc95d19c8 (offset: 0xb66e0) -> 0x1d484 fde=[ b1c4]\n+ 0xffffffffc95d1b38 (offset: 0xb6850) -> 0x1d4a8 fde=[ b1e8]\n+ 0xffffffffc95d1ca8 (offset: 0xb69c0) -> 0x1d4cc fde=[ b20c]\n+ 0xffffffffc95d1e18 (offset: 0xb6b30) -> 0x1d4f0 fde=[ b230]\n+ 0xffffffffc95d1f88 (offset: 0xb6ca0) -> 0x1d514 fde=[ b254]\n+ 0xffffffffc95d20f8 (offset: 0xb6e10) -> 0x1d538 fde=[ b278]\n+ 0xffffffffc95d2268 (offset: 0xb6f80) -> 0x1d55c fde=[ b29c]\n+ 0xffffffffc95d23d8 (offset: 0xb70f0) -> 0x1d580 fde=[ b2c0]\n+ 0xffffffffc95d2548 (offset: 0xb7260) -> 0x1d5a4 fde=[ b2e4]\n+ 0xffffffffc95d26b8 (offset: 0xb73d0) -> 0x1d5c8 fde=[ b308]\n+ 0xffffffffc95d2828 (offset: 0xb7540) -> 0x1d5ec fde=[ b32c]\n+ 0xffffffffc95d2998 (offset: 0xb76b0) -> 0x1d610 fde=[ b350]\n+ 0xffffffffc95d2b08 (offset: 0xb7820) -> 0x1d634 fde=[ b374]\n+ 0xffffffffc95d2c78 (offset: 0xb7990) -> 0x1d658 fde=[ b398]\n+ 0xffffffffc95d2de8 (offset: 0xb7b00) -> 0x1d67c fde=[ b3bc]\n+ 0xffffffffc95d2f58 (offset: 0xb7c70) -> 0x1d6a0 fde=[ b3e0]\n+ 0xffffffffc95d30c8 (offset: 0xb7de0) -> 0x1d6c4 fde=[ b404]\n+ 0xffffffffc95d3238 (offset: 0xb7f50) -> 0x1d6e8 fde=[ b428]\n+ 0xffffffffc95d33a8 (offset: 0xb80c0) -> 0x1d70c fde=[ b44c]\n+ 0xffffffffc95d3518 (offset: 0xb8230) -> 0x1d730 fde=[ b470]\n+ 0xffffffffc95d3688 (offset: 0xb83a0) -> 0x1d754 fde=[ b494]\n+ 0xffffffffc95d37f8 (offset: 0xb8510) -> 0x1d778 fde=[ b4b8]\n+ 0xffffffffc95d3968 (offset: 0xb8680) -> 0x1d79c fde=[ b4dc]\n+ 0xffffffffc95d3ad8 (offset: 0xb87f0) -> 0x1d7c0 fde=[ b500]\n+ 0xffffffffc95d3c48 (offset: 0xb8960) -> 0x1d7e4 fde=[ b524]\n+ 0xffffffffc95d3db8 (offset: 0xb8ad0) -> 0x1d808 fde=[ b548]\n+ 0xffffffffc95d3f28 (offset: 0xb8c40) -> 0x1d82c fde=[ b56c]\n+ 0xffffffffc95d4098 (offset: 0xb8db0) -> 0x1d850 fde=[ b590]\n+ 0xffffffffc95d4208 (offset: 0xb8f20) -> 0x1d874 fde=[ b5b4]\n+ 0xffffffffc95d4378 (offset: 0xb9090) -> 0x1d898 fde=[ b5d8]\n+ 0xffffffffc95d44e8 (offset: 0xb9200) -> 0x1d8bc fde=[ b5fc]\n+ 0xffffffffc95d4658 (offset: 0xb9370) -> 0x1d8e0 fde=[ b620]\n+ 0xffffffffc95d47c8 (offset: 0xb94e0) -> 0x1d904 fde=[ b644]\n+ 0xffffffffc95d4938 (offset: 0xb9650) -> 0x1d928 fde=[ b668]\n+ 0xffffffffc95d4aa8 (offset: 0xb97c0) -> 0x1d94c fde=[ b68c]\n+ 0xffffffffc95d4c18 (offset: 0xb9930) -> 0x1d970 fde=[ b6b0]\n+ 0xffffffffc95d4d88 (offset: 0xb9aa0) -> 0x1d994 fde=[ b6d4]\n+ 0xffffffffc95d4ef8 (offset: 0xb9c10) -> 0x1d9b8 fde=[ b6f8]\n+ 0xffffffffc95d5068 (offset: 0xb9d80) -> 0x1d9dc fde=[ b71c]\n+ 0xffffffffc95d51d8 (offset: 0xb9ef0) -> 0x1da00 fde=[ b740]\n+ 0xffffffffc95d5348 (offset: 0xba060) -> 0x1da24 fde=[ b764]\n+ 0xffffffffc95d54b8 (offset: 0xba1d0) -> 0x1da48 fde=[ b788]\n+ 0xffffffffc95d5628 (offset: 0xba340) -> 0x1da6c fde=[ b7ac]\n+ 0xffffffffc95d5798 (offset: 0xba4b0) -> 0x1da90 fde=[ b7d0]\n+ 0xffffffffc95d5908 (offset: 0xba620) -> 0x1dab4 fde=[ b7f4]\n+ 0xffffffffc95d5a78 (offset: 0xba790) -> 0x1dad8 fde=[ b818]\n+ 0xffffffffc95d5be8 (offset: 0xba900) -> 0x1dafc fde=[ b83c]\n+ 0xffffffffc95d5d58 (offset: 0xbaa70) -> 0x1db20 fde=[ b860]\n+ 0xffffffffc95d8b68 (offset: 0xbd880) -> 0x1e738 fde=[ c478]\n+ 0xffffffffc95d8ba8 (offset: 0xbd8c0) -> 0x1e750 fde=[ c490]\n+ 0xffffffffc95d8bd8 (offset: 0xbd8f0) -> 0x203c8 fde=[ e108]\n+ 0xffffffffc95d92f8 (offset: 0xbe010) -> 0x1e768 fde=[ c4a8]\n+ 0xffffffffc95ef658 (offset: 0xd4370) -> 0x1e7c4 fde=[ c504]\n+ 0xffffffffc95ef758 (offset: 0xd4470) -> 0x1e850 fde=[ c590]\n+ 0xffffffffc95ef8c8 (offset: 0xd45e0) -> 0x1e874 fde=[ c5b4]\n+ 0xffffffffc95efa38 (offset: 0xd4750) -> 0x1e898 fde=[ c5d8]\n+ 0xffffffffc95efba8 (offset: 0xd48c0) -> 0x1e8bc fde=[ c5fc]\n+ 0xffffffffc95efd18 (offset: 0xd4a30) -> 0x1e8e0 fde=[ c620]\n+ 0xffffffffc95efe88 (offset: 0xd4ba0) -> 0x1e904 fde=[ c644]\n+ 0xffffffffc95efff8 (offset: 0xd4d10) -> 0x1e928 fde=[ c668]\n+ 0xffffffffc95f0168 (offset: 0xd4e80) -> 0x1e94c fde=[ c68c]\n+ 0xffffffffc95f02d8 (offset: 0xd4ff0) -> 0x1e970 fde=[ c6b0]\n+ 0xffffffffc95f0448 (offset: 0xd5160) -> 0x1e994 fde=[ c6d4]\n+ 0xffffffffc95f05b8 (offset: 0xd52d0) -> 0x1e9b8 fde=[ c6f8]\n+ 0xffffffffc95f0728 (offset: 0xd5440) -> 0x1e9dc fde=[ c71c]\n+ 0xffffffffc95f0898 (offset: 0xd55b0) -> 0x1ea00 fde=[ c740]\n+ 0xffffffffc95f0a08 (offset: 0xd5720) -> 0x1ea24 fde=[ c764]\n+ 0xffffffffc95f0b78 (offset: 0xd5890) -> 0x1ea48 fde=[ c788]\n+ 0xffffffffc95f0ce8 (offset: 0xd5a00) -> 0x1ea6c fde=[ c7ac]\n+ 0xffffffffc95f0e58 (offset: 0xd5b70) -> 0x1ea90 fde=[ c7d0]\n+ 0xffffffffc95f0fc8 (offset: 0xd5ce0) -> 0x1eab4 fde=[ c7f4]\n+ 0xffffffffc95f1138 (offset: 0xd5e50) -> 0x1ead8 fde=[ c818]\n+ 0xffffffffc95f12a8 (offset: 0xd5fc0) -> 0x1eafc fde=[ c83c]\n+ 0xffffffffc95f1418 (offset: 0xd6130) -> 0x1eb20 fde=[ c860]\n+ 0xffffffffc95f1588 (offset: 0xd62a0) -> 0x1eb44 fde=[ c884]\n+ 0xffffffffc95f16f8 (offset: 0xd6410) -> 0x1eb68 fde=[ c8a8]\n+ 0xffffffffc95f1868 (offset: 0xd6580) -> 0x1eb8c fde=[ c8cc]\n+ 0xffffffffc95f19d8 (offset: 0xd66f0) -> 0x1ebb0 fde=[ c8f0]\n+ 0xffffffffc95f1b48 (offset: 0xd6860) -> 0x1ebd4 fde=[ c914]\n+ 0xffffffffc95f1cb8 (offset: 0xd69d0) -> 0x1ebf8 fde=[ c938]\n+ 0xffffffffc95f1e28 (offset: 0xd6b40) -> 0x1ec1c fde=[ c95c]\n+ 0xffffffffc95f1f98 (offset: 0xd6cb0) -> 0x1ec40 fde=[ c980]\n+ 0xffffffffc95f2108 (offset: 0xd6e20) -> 0x1ec64 fde=[ c9a4]\n+ 0xffffffffc95f2278 (offset: 0xd6f90) -> 0x1ec88 fde=[ c9c8]\n+ 0xffffffffc95f23e8 (offset: 0xd7100) -> 0x1ecac fde=[ c9ec]\n+ 0xffffffffc95f2558 (offset: 0xd7270) -> 0x1ecd0 fde=[ ca10]\n+ 0xffffffffc95f26c8 (offset: 0xd73e0) -> 0x1ecf4 fde=[ ca34]\n+ 0xffffffffc95f2838 (offset: 0xd7550) -> 0x1ed18 fde=[ ca58]\n+ 0xffffffffc95f29a8 (offset: 0xd76c0) -> 0x1ed3c fde=[ ca7c]\n+ 0xffffffffc95f2b18 (offset: 0xd7830) -> 0x1ed60 fde=[ caa0]\n+ 0xffffffffc95f2c88 (offset: 0xd79a0) -> 0x1ed84 fde=[ cac4]\n+ 0xffffffffc95f2df8 (offset: 0xd7b10) -> 0x1eda8 fde=[ cae8]\n+ 0xffffffffc95f2f68 (offset: 0xd7c80) -> 0x1edcc fde=[ cb0c]\n+ 0xffffffffc95f30d8 (offset: 0xd7df0) -> 0x1edf0 fde=[ cb30]\n+ 0xffffffffc95f3248 (offset: 0xd7f60) -> 0x1ee14 fde=[ cb54]\n+ 0xffffffffc95f33b8 (offset: 0xd80d0) -> 0x1ee38 fde=[ cb78]\n+ 0xffffffffc95f3528 (offset: 0xd8240) -> 0x1ee5c fde=[ cb9c]\n+ 0xffffffffc95f3698 (offset: 0xd83b0) -> 0x1ee80 fde=[ cbc0]\n+ 0xffffffffc95f3808 (offset: 0xd8520) -> 0x1eea4 fde=[ cbe4]\n+ 0xffffffffc95f3978 (offset: 0xd8690) -> 0x1eec8 fde=[ cc08]\n+ 0xffffffffc95f3ae8 (offset: 0xd8800) -> 0x1eeec fde=[ cc2c]\n+ 0xffffffffc95f3c58 (offset: 0xd8970) -> 0x1ef10 fde=[ cc50]\n+ 0xffffffffc95f3dc8 (offset: 0xd8ae0) -> 0x1ef34 fde=[ cc74]\n+ 0xffffffffc95f3f38 (offset: 0xd8c50) -> 0x1ef58 fde=[ cc98]\n+ 0xffffffffc95f40a8 (offset: 0xd8dc0) -> 0x1ef7c fde=[ ccbc]\n+ 0xffffffffc95f4218 (offset: 0xd8f30) -> 0x1efa0 fde=[ cce0]\n+ 0xffffffffc95f4388 (offset: 0xd90a0) -> 0x1efc4 fde=[ cd04]\n+ 0xffffffffc95f44f8 (offset: 0xd9210) -> 0x1efe8 fde=[ cd28]\n+ 0xffffffffc95f4668 (offset: 0xd9380) -> 0x1f00c fde=[ cd4c]\n+ 0xffffffffc95f47d8 (offset: 0xd94f0) -> 0x1f030 fde=[ cd70]\n+ 0xffffffffc95f4948 (offset: 0xd9660) -> 0x1f054 fde=[ cd94]\n+ 0xffffffffc95f4ab8 (offset: 0xd97d0) -> 0x1f078 fde=[ cdb8]\n+ 0xffffffffc95f4c28 (offset: 0xd9940) -> 0x1f09c fde=[ cddc]\n+ 0xffffffffc95f4d98 (offset: 0xd9ab0) -> 0x1f0c0 fde=[ ce00]\n+ 0xffffffffc95f4f08 (offset: 0xd9c20) -> 0x1f0e4 fde=[ ce24]\n+ 0xffffffffc95f5078 (offset: 0xd9d90) -> 0x1f108 fde=[ ce48]\n+ 0xffffffffc95f51e8 (offset: 0xd9f00) -> 0x1f12c fde=[ ce6c]\n+ 0xffffffffc95f5358 (offset: 0xda070) -> 0x1f150 fde=[ ce90]\n+ 0xffffffffc95f54c8 (offset: 0xda1e0) -> 0x1f174 fde=[ ceb4]\n+ 0xffffffffc95f5638 (offset: 0xda350) -> 0x1f198 fde=[ ced8]\n+ 0xffffffffc95f57a8 (offset: 0xda4c0) -> 0x1f1bc fde=[ cefc]\n+ 0xffffffffc95f5918 (offset: 0xda630) -> 0x1f1e0 fde=[ cf20]\n+ 0xffffffffc95f5a88 (offset: 0xda7a0) -> 0x1f204 fde=[ cf44]\n+ 0xffffffffc95f5bf8 (offset: 0xda910) -> 0x1f228 fde=[ cf68]\n+ 0xffffffffc95f5d68 (offset: 0xdaa80) -> 0x1f24c fde=[ cf8c]\n+ 0xffffffffc95f5ed8 (offset: 0xdabf0) -> 0x1f270 fde=[ cfb0]\n+ 0xffffffffc95f6048 (offset: 0xdad60) -> 0x1f294 fde=[ cfd4]\n+ 0xffffffffc95f61b8 (offset: 0xdaed0) -> 0x1f2b8 fde=[ cff8]\n+ 0xffffffffc95f6328 (offset: 0xdb040) -> 0x1f2dc fde=[ d01c]\n+ 0xffffffffc95f6498 (offset: 0xdb1b0) -> 0x1f300 fde=[ d040]\n+ 0xffffffffc95f6608 (offset: 0xdb320) -> 0x1f324 fde=[ d064]\n+ 0xffffffffc95f6778 (offset: 0xdb490) -> 0x1f348 fde=[ d088]\n+ 0xffffffffc95f68e8 (offset: 0xdb600) -> 0x1f36c fde=[ d0ac]\n+ 0xffffffffc95f6a58 (offset: 0xdb770) -> 0x1f390 fde=[ d0d0]\n+ 0xffffffffc95f6bc8 (offset: 0xdb8e0) -> 0x1f3b4 fde=[ d0f4]\n+ 0xffffffffc95f6d38 (offset: 0xdba50) -> 0x1f3d8 fde=[ d118]\n+ 0xffffffffc95f6ea8 (offset: 0xdbbc0) -> 0x1f3fc fde=[ d13c]\n+ 0xffffffffc95f7018 (offset: 0xdbd30) -> 0x1f420 fde=[ d160]\n+ 0xffffffffc95f7188 (offset: 0xdbea0) -> 0x1f444 fde=[ d184]\n+ 0xffffffffc95f72f8 (offset: 0xdc010) -> 0x1f468 fde=[ d1a8]\n+ 0xffffffffc95f7468 (offset: 0xdc180) -> 0x1f48c fde=[ d1cc]\n+ 0xffffffffc95f75d8 (offset: 0xdc2f0) -> 0x1f4b0 fde=[ d1f0]\n+ 0xffffffffc95f7748 (offset: 0xdc460) -> 0x1f4d4 fde=[ d214]\n+ 0xffffffffc95f78b8 (offset: 0xdc5d0) -> 0x1f4f8 fde=[ d238]\n+ 0xffffffffc95f7a28 (offset: 0xdc740) -> 0x1f51c fde=[ d25c]\n+ 0xffffffffc95f7b98 (offset: 0xdc8b0) -> 0x1f540 fde=[ d280]\n+ 0xffffffffc95f7d08 (offset: 0xdca20) -> 0x1f564 fde=[ d2a4]\n+ 0xffffffffc95f7e78 (offset: 0xdcb90) -> 0x1f588 fde=[ d2c8]\n+ 0xffffffffc95f7fe8 (offset: 0xdcd00) -> 0x1f5ac fde=[ d2ec]\n+ 0xffffffffc95f8158 (offset: 0xdce70) -> 0x1f5d0 fde=[ d310]\n+ 0xffffffffc95f82c8 (offset: 0xdcfe0) -> 0x1f5f4 fde=[ d334]\n+ 0xffffffffc95f8438 (offset: 0xdd150) -> 0x1f618 fde=[ d358]\n+ 0xffffffffc95f85a8 (offset: 0xdd2c0) -> 0x1f63c fde=[ d37c]\n+ 0xffffffffc95f8718 (offset: 0xdd430) -> 0x1f660 fde=[ d3a0]\n+ 0xffffffffc95f8888 (offset: 0xdd5a0) -> 0x1f684 fde=[ d3c4]\n+ 0xffffffffc95f89f8 (offset: 0xdd710) -> 0x1f6a8 fde=[ d3e8]\n+ 0xffffffffc95f8b68 (offset: 0xdd880) -> 0x1f6cc fde=[ d40c]\n+ 0xffffffffc95f8cd8 (offset: 0xdd9f0) -> 0x1f6f0 fde=[ d430]\n+ 0xffffffffc95f8e48 (offset: 0xddb60) -> 0x1f714 fde=[ d454]\n+ 0xffffffffc95f8fb8 (offset: 0xddcd0) -> 0x1f738 fde=[ d478]\n+ 0xffffffffc95f9128 (offset: 0xdde40) -> 0x1f75c fde=[ d49c]\n+ 0xffffffffc95f9298 (offset: 0xddfb0) -> 0x1f780 fde=[ d4c0]\n+ 0xffffffffc95f9408 (offset: 0xde120) -> 0x1f7a4 fde=[ d4e4]\n+ 0xffffffffc95f9578 (offset: 0xde290) -> 0x1f7c8 fde=[ d508]\n+ 0xffffffffc95f96e8 (offset: 0xde400) -> 0x1f7ec fde=[ d52c]\n+ 0xffffffffc95f9858 (offset: 0xde570) -> 0x1f810 fde=[ d550]\n+ 0xffffffffc95f99c8 (offset: 0xde6e0) -> 0x1f834 fde=[ d574]\n+ 0xffffffffc95f9b38 (offset: 0xde850) -> 0x1f858 fde=[ d598]\n+ 0xffffffffc95f9ca8 (offset: 0xde9c0) -> 0x1f87c fde=[ d5bc]\n+ 0xffffffffc95f9e18 (offset: 0xdeb30) -> 0x1f8a0 fde=[ d5e0]\n+ 0xffffffffc95f9f88 (offset: 0xdeca0) -> 0x1f8c4 fde=[ d604]\n+ 0xffffffffc95fa0f8 (offset: 0xdee10) -> 0x1f8e8 fde=[ d628]\n+ 0xffffffffc95fa268 (offset: 0xdef80) -> 0x1f90c fde=[ d64c]\n+ 0xffffffffc95fa3d8 (offset: 0xdf0f0) -> 0x1f930 fde=[ d670]\n+ 0xffffffffc95fa548 (offset: 0xdf260) -> 0x1f954 fde=[ d694]\n+ 0xffffffffc95fa6b8 (offset: 0xdf3d0) -> 0x1f978 fde=[ d6b8]\n+ 0xffffffffc95fa828 (offset: 0xdf540) -> 0x1f99c fde=[ d6dc]\n+ 0xffffffffc95fa998 (offset: 0xdf6b0) -> 0x1f9c0 fde=[ d700]\n+ 0xffffffffc95fab08 (offset: 0xdf820) -> 0x1f9e4 fde=[ d724]\n+ 0xffffffffc95fac78 (offset: 0xdf990) -> 0x1fa08 fde=[ d748]\n+ 0xffffffffc95fade8 (offset: 0xdfb00) -> 0x1fa2c fde=[ d76c]\n+ 0xffffffffc95faf58 (offset: 0xdfc70) -> 0x1fa50 fde=[ d790]\n+ 0xffffffffc95fb0c8 (offset: 0xdfde0) -> 0x1fa74 fde=[ d7b4]\n+ 0xffffffffc95fb238 (offset: 0xdff50) -> 0x1fa98 fde=[ d7d8]\n+ 0xffffffffc95fb3a8 (offset: 0xe00c0) -> 0x1fabc fde=[ d7fc]\n+ 0xffffffffc95fb518 (offset: 0xe0230) -> 0x1fae0 fde=[ d820]\n+ 0xffffffffc95fb688 (offset: 0xe03a0) -> 0x1fb04 fde=[ d844]\n+ 0xffffffffc95fb7f8 (offset: 0xe0510) -> 0x1fb28 fde=[ d868]\n+ 0xffffffffc95fb968 (offset: 0xe0680) -> 0x1fb4c fde=[ d88c]\n+ 0xffffffffc95fbad8 (offset: 0xe07f0) -> 0x1fb70 fde=[ d8b0]\n+ 0xffffffffc95fbc48 (offset: 0xe0960) -> 0x1fb94 fde=[ d8d4]\n+ 0xffffffffc95fbdb8 (offset: 0xe0ad0) -> 0x1fbb8 fde=[ d8f8]\n+ 0xffffffffc95fbf28 (offset: 0xe0c40) -> 0x1fbdc fde=[ d91c]\n+ 0xffffffffc95fc098 (offset: 0xe0db0) -> 0x1fc00 fde=[ d940]\n+ 0xffffffffc95fc208 (offset: 0xe0f20) -> 0x1fc24 fde=[ d964]\n+ 0xffffffffc95fc378 (offset: 0xe1090) -> 0x1fc48 fde=[ d988]\n+ 0xffffffffc95fc4e8 (offset: 0xe1200) -> 0x1fc6c fde=[ d9ac]\n+ 0xffffffffc95fc658 (offset: 0xe1370) -> 0x1fc90 fde=[ d9d0]\n+ 0xffffffffc95fc7c8 (offset: 0xe14e0) -> 0x1fcb4 fde=[ d9f4]\n+ 0xffffffffc95fc938 (offset: 0xe1650) -> 0x1fcd8 fde=[ da18]\n+ 0xffffffffc95fcaa8 (offset: 0xe17c0) -> 0x1fcfc fde=[ da3c]\n+ 0xffffffffc95fcc18 (offset: 0xe1930) -> 0x1fd20 fde=[ da60]\n+ 0xffffffffc95fcd88 (offset: 0xe1aa0) -> 0x1fd44 fde=[ da84]\n+ 0xffffffffc95fcef8 (offset: 0xe1c10) -> 0x1fd68 fde=[ daa8]\n+ 0xffffffffc95fd068 (offset: 0xe1d80) -> 0x1fd8c fde=[ dacc]\n+ 0xffffffffc95fd1d8 (offset: 0xe1ef0) -> 0x1fdb0 fde=[ daf0]\n+ 0xffffffffc95fed68 (offset: 0xe3a80) -> 0x203b0 fde=[ e0f0]\n+ 0xffffffffc95fed98 (offset: 0xe3ab0) -> 0x20500 fde=[ e240]\n+ 0xffffffffc95ff1c8 (offset: 0xe3ee0) -> 0x2055c fde=[ e29c]\n+ 0xffffffffc95ff4e8 (offset: 0xe4200) -> 0x205b8 fde=[ e2f8]\n+ 0xffffffffc95ff918 (offset: 0xe4630) -> 0x20614 fde=[ e354]\n+ 0xffffffffc95ffc68 (offset: 0xe4980) -> 0x20670 fde=[ e3b0]\n+ 0xffffffffc9600098 (offset: 0xe4db0) -> 0x206cc fde=[ e40c]\n+ 0xffffffffc9600168 (offset: 0xe4e80) -> 0x206f0 fde=[ e430]\n+ 0xffffffffc9600238 (offset: 0xe4f50) -> 0x20714 fde=[ e454]\n+ 0xffffffffc96002d8 (offset: 0xe4ff0) -> 0x20738 fde=[ e478]\n+ 0xffffffffc9600378 (offset: 0xe5090) -> 0x2075c fde=[ e49c]\n+ 0xffffffffc9600448 (offset: 0xe5160) -> 0x20780 fde=[ e4c0]\n+ 0xffffffffc9600518 (offset: 0xe5230) -> 0x207a4 fde=[ e4e4]\n+ 0xffffffffc96005b8 (offset: 0xe52d0) -> 0x207c8 fde=[ e508]\n+ 0xffffffffc9600658 (offset: 0xe5370) -> 0x207ec fde=[ e52c]\n+ 0xffffffffc9600728 (offset: 0xe5440) -> 0x20810 fde=[ e550]\n+ 0xffffffffc96007f8 (offset: 0xe5510) -> 0x20834 fde=[ e574]\n+ 0xffffffffc9600a08 (offset: 0xe5720) -> 0x20858 fde=[ e598]\n+ 0xffffffffc9600a38 (offset: 0xe5750) -> 0x20870 fde=[ e5b0]\n+ 0xffffffffc9600ec8 (offset: 0xe5be0) -> 0x208cc fde=[ e60c]\n+ 0xffffffffc9600f88 (offset: 0xe5ca0) -> 0x208f0 fde=[ e630]\n+ 0xffffffffc9600ff8 (offset: 0xe5d10) -> 0x20908 fde=[ e648]\n+ 0xffffffffc9601028 (offset: 0xe5d40) -> 0x20920 fde=[ e660]\n+ 0xffffffffc9601658 (offset: 0xe6370) -> 0x20994 fde=[ e6d4]\n+ 0xffffffffc9601688 (offset: 0xe63a0) -> 0x209a8 fde=[ e6e8]\n+ 0xffffffffc96018d8 (offset: 0xe65f0) -> 0x20a04 fde=[ e744]\n+ 0xffffffffc9601998 (offset: 0xe66b0) -> 0x20a28 fde=[ e768]\n+ 0xffffffffc9601a08 (offset: 0xe6720) -> 0x20a40 fde=[ e780]\n+ 0xffffffffc9601a38 (offset: 0xe6750) -> 0x20a58 fde=[ e798]\n+ 0xffffffffc9601d48 (offset: 0xe6a60) -> 0x20ab4 fde=[ e7f4]\n+ 0xffffffffc9601e78 (offset: 0xe6b90) -> 0x20ad8 fde=[ e818]\n+ 0xffffffffc9601ee8 (offset: 0xe6c00) -> 0x20af0 fde=[ e830]\n+ 0xffffffffc9601f18 (offset: 0xe6c30) -> 0x20b08 fde=[ e848]\n+ 0xffffffffc9602108 (offset: 0xe6e20) -> 0x20b64 fde=[ e8a4]\n+ 0xffffffffc96021f8 (offset: 0xe6f10) -> 0x20b88 fde=[ e8c8]\n+ 0xffffffffc96026a8 (offset: 0xe73c0) -> 0x20be4 fde=[ e924]\n+ 0xffffffffc96027a8 (offset: 0xe74c0) -> 0x20c08 fde=[ e948]\n+ 0xffffffffc96028a8 (offset: 0xe75c0) -> 0x20c2c fde=[ e96c]\n+ 0xffffffffc96029a8 (offset: 0xe76c0) -> 0x20c50 fde=[ e990]\n+ 0xffffffffc9602a98 (offset: 0xe77b0) -> 0x20c70 fde=[ e9b0]\n+ 0xffffffffc9602ac8 (offset: 0xe77e0) -> 0x20c88 fde=[ e9c8]\n+ 0xffffffffc9602ad8 (offset: 0xe77f0) -> 0x20d04 fde=[ ea44]\n+ 0xffffffffc9602ae8 (offset: 0xe7800) -> 0x20d80 fde=[ eac0]\n+ 0xffffffffc9602c38 (offset: 0xe7950) -> 0x20da4 fde=[ eae4]\n+ 0xffffffffc9602d88 (offset: 0xe7aa0) -> 0x20dc8 fde=[ eb08]\n+ 0xffffffffc9602ed8 (offset: 0xe7bf0) -> 0x20dec fde=[ eb2c]\n+ 0xffffffffc9603028 (offset: 0xe7d40) -> 0x20e10 fde=[ eb50]\n+ 0xffffffffc9603198 (offset: 0xe7eb0) -> 0x20e34 fde=[ eb74]\n+ 0xffffffffc9603308 (offset: 0xe8020) -> 0x20e58 fde=[ eb98]\n+ 0xffffffffc9603478 (offset: 0xe8190) -> 0x20e7c fde=[ ebbc]\n+ 0xffffffffc96035e8 (offset: 0xe8300) -> 0x20ea0 fde=[ ebe0]\n+ 0xffffffffc9603758 (offset: 0xe8470) -> 0x20ec4 fde=[ ec04]\n+ 0xffffffffc96038c8 (offset: 0xe85e0) -> 0x20ee8 fde=[ ec28]\n+ 0xffffffffc9603a38 (offset: 0xe8750) -> 0x20f0c fde=[ ec4c]\n+ 0xffffffffc9603ba8 (offset: 0xe88c0) -> 0x20f30 fde=[ ec70]\n+ 0xffffffffc9603cf8 (offset: 0xe8a10) -> 0x20f54 fde=[ ec94]\n+ 0xffffffffc9603e48 (offset: 0xe8b60) -> 0x20f78 fde=[ ecb8]\n+ 0xffffffffc9603f98 (offset: 0xe8cb0) -> 0x20f9c fde=[ ecdc]\n+ 0xffffffffc96040e8 (offset: 0xe8e00) -> 0x20fc0 fde=[ ed00]\n+ 0xffffffffc9604238 (offset: 0xe8f50) -> 0x20fe4 fde=[ ed24]\n+ 0xffffffffc9604388 (offset: 0xe90a0) -> 0x21008 fde=[ ed48]\n+ 0xffffffffc96044d8 (offset: 0xe91f0) -> 0x2102c fde=[ ed6c]\n+ 0xffffffffc9604628 (offset: 0xe9340) -> 0x21050 fde=[ ed90]\n+ 0xffffffffc9604798 (offset: 0xe94b0) -> 0x21074 fde=[ edb4]\n+ 0xffffffffc9604908 (offset: 0xe9620) -> 0x21098 fde=[ edd8]\n+ 0xffffffffc9604a78 (offset: 0xe9790) -> 0x210bc fde=[ edfc]\n+ 0xffffffffc9604be8 (offset: 0xe9900) -> 0x210e0 fde=[ ee20]\n+ 0xffffffffc9604d58 (offset: 0xe9a70) -> 0x21104 fde=[ ee44]\n+ 0xffffffffc9604ec8 (offset: 0xe9be0) -> 0x21128 fde=[ ee68]\n+ 0xffffffffc9605038 (offset: 0xe9d50) -> 0x2114c fde=[ ee8c]\n+ 0xffffffffc96051a8 (offset: 0xe9ec0) -> 0x21170 fde=[ eeb0]\n+ 0xffffffffc96052f8 (offset: 0xea010) -> 0x21194 fde=[ eed4]\n+ 0xffffffffc9605448 (offset: 0xea160) -> 0x211b8 fde=[ eef8]\n+ 0xffffffffc9605598 (offset: 0xea2b0) -> 0x211dc fde=[ ef1c]\n+ 0xffffffffc96056e8 (offset: 0xea400) -> 0x21200 fde=[ ef40]\n+ 0xffffffffc9605ce8 (offset: 0xeaa00) -> 0x21224 fde=[ ef64]\n+ 0xffffffffc9605d18 (offset: 0xeaa30) -> 0x20c9c fde=[ e9dc]\n+ 0xffffffffc9608358 (offset: 0xed070) -> 0x20d18 fde=[ ea58]\n+ 0xffffffffc960a998 (offset: 0xef6b0) -> 0x21240 fde=[ ef80]\n+ 0xffffffffc960ab98 (offset: 0xef8b0) -> 0x21294 fde=[ efd4]\n+ 0xffffffffc960ac38 (offset: 0xef950) -> 0x212b8 fde=[ eff8]\n+ 0xffffffffc960aca8 (offset: 0xef9c0) -> 0x212d0 fde=[ f010]\n+ 0xffffffffc960acd8 (offset: 0xef9f0) -> 0x212e8 fde=[ f028]\n+ 0xffffffffc960d338 (offset: 0xf2050) -> 0x21344 fde=[ f084]\n+ 0xffffffffc960d598 (offset: 0xf22b0) -> 0x213a0 fde=[ f0e0]\n+ 0xffffffffc960d638 (offset: 0xf2350) -> 0x213c4 fde=[ f104]\n+ 0xffffffffc960d6c8 (offset: 0xf23e0) -> 0x213e8 fde=[ f128]\n+ 0xffffffffc960d758 (offset: 0xf2470) -> 0x2140c fde=[ f14c]\n+ 0xffffffffc960d7e8 (offset: 0xf2500) -> 0x21430 fde=[ f170]\n+ 0xffffffffc960d878 (offset: 0xf2590) -> 0x21454 fde=[ f194]\n+ 0xffffffffc960d908 (offset: 0xf2620) -> 0x21478 fde=[ f1b8]\n+ 0xffffffffc960d998 (offset: 0xf26b0) -> 0x2149c fde=[ f1dc]\n+ 0xffffffffc960da28 (offset: 0xf2740) -> 0x214c0 fde=[ f200]\n+ 0xffffffffc960dab8 (offset: 0xf27d0) -> 0x214e4 fde=[ f224]\n+ 0xffffffffc960db48 (offset: 0xf2860) -> 0x21508 fde=[ f248]\n+ 0xffffffffc960dbd8 (offset: 0xf28f0) -> 0x2152c fde=[ f26c]\n+ 0xffffffffc960dc68 (offset: 0xf2980) -> 0x21550 fde=[ f290]\n+ 0xffffffffc960dcf8 (offset: 0xf2a10) -> 0x21574 fde=[ f2b4]\n+ 0xffffffffc960dd88 (offset: 0xf2aa0) -> 0x21598 fde=[ f2d8]\n+ 0xffffffffc960de18 (offset: 0xf2b30) -> 0x215bc fde=[ f2fc]\n+ 0xffffffffc960dea8 (offset: 0xf2bc0) -> 0x215e0 fde=[ f320]\n+ 0xffffffffc960df38 (offset: 0xf2c50) -> 0x21604 fde=[ f344]\n+ 0xffffffffc960dfc8 (offset: 0xf2ce0) -> 0x21628 fde=[ f368]\n+ 0xffffffffc960e058 (offset: 0xf2d70) -> 0x2164c fde=[ f38c]\n+ 0xffffffffc960e0e8 (offset: 0xf2e00) -> 0x21670 fde=[ f3b0]\n+ 0xffffffffc960e178 (offset: 0xf2e90) -> 0x21694 fde=[ f3d4]\n+ 0xffffffffc960e578 (offset: 0xf3290) -> 0x216b8 fde=[ f3f8]\n+ 0xffffffffc960e5a8 (offset: 0xf32c0) -> 0x216d0 fde=[ f410]\n+ 0xffffffffc960ee08 (offset: 0xf3b20) -> 0x2172c fde=[ f46c]\n+ 0xffffffffc960ef08 (offset: 0xf3c20) -> 0x21750 fde=[ f490]\n+ 0xffffffffc960f008 (offset: 0xf3d20) -> 0x21774 fde=[ f4b4]\n+ 0xffffffffc960f108 (offset: 0xf3e20) -> 0x21798 fde=[ f4d8]\n+ 0xffffffffc960f208 (offset: 0xf3f20) -> 0x217bc fde=[ f4fc]\n+ 0xffffffffc960f2f8 (offset: 0xf4010) -> 0x217dc fde=[ f51c]\n+ 0xffffffffc960f328 (offset: 0xf4040) -> 0x217f8 fde=[ f538]\n+ 0xffffffffc960faf8 (offset: 0xf4810) -> 0x21998 fde=[ f6d8]\n+ 0xffffffffc960fbc8 (offset: 0xf48e0) -> 0x219b8 fde=[ f6f8]\n+ 0xffffffffc960fbf8 (offset: 0xf4910) -> 0x2192c fde=[ f66c]\n+ 0xffffffffc960fdd8 (offset: 0xf4af0) -> 0x21950 fde=[ f690]\n+ 0xffffffffc960ffb8 (offset: 0xf4cd0) -> 0x21974 fde=[ f6b4]\n+ 0xffffffffc9610178 (offset: 0xf4e90) -> 0x219d0 fde=[ f710]\n+ 0xffffffffc9610198 (offset: 0xf4eb0) -> 0x219e4 fde=[ f724]\n+ 0xffffffffc9610338 (offset: 0xf5050) -> 0x21a28 fde=[ f768]\n+ 0xffffffffc96103f8 (offset: 0xf5110) -> 0x21a68 fde=[ f7a8]\n+ 0xffffffffc9610478 (offset: 0xf5190) -> 0x21a88 fde=[ f7c8]\n+ 0xffffffffc9610648 (offset: 0xf5360) -> 0x21adc fde=[ f81c]\n+ 0xffffffffc96106b8 (offset: 0xf53d0) -> 0x21af4 fde=[ f834]\n+ 0xffffffffc96106e8 (offset: 0xf5400) -> 0x21b10 fde=[ f850]\n+ 0xffffffffc96108c8 (offset: 0xf55e0) -> 0x21b6c fde=[ f8ac]\n+ 0xffffffffc9610968 (offset: 0xf5680) -> 0x21b90 fde=[ f8d0]\n+ 0xffffffffc96109d8 (offset: 0xf56f0) -> 0x21ba8 fde=[ f8e8]\n+ 0xffffffffc9610a08 (offset: 0xf5720) -> 0x21bc0 fde=[ f900]\n+ 0xffffffffc9610c88 (offset: 0xf59a0) -> 0x21c1c fde=[ f95c]\n+ 0xffffffffc9610f08 (offset: 0xf5c20) -> 0x21c78 fde=[ f9b8]\n+ 0xffffffffc9611188 (offset: 0xf5ea0) -> 0x21cd4 fde=[ fa14]\n+ 0xffffffffc9611408 (offset: 0xf6120) -> 0x21d30 fde=[ fa70]\n+ 0xffffffffc9611688 (offset: 0xf63a0) -> 0x21d8c fde=[ facc]\n+ 0xffffffffc9611908 (offset: 0xf6620) -> 0x21de8 fde=[ fb28]\n+ 0xffffffffc9611b88 (offset: 0xf68a0) -> 0x21e44 fde=[ fb84]\n+ 0xffffffffc9611e08 (offset: 0xf6b20) -> 0x21ea0 fde=[ fbe0]\n+ 0xffffffffc9612088 (offset: 0xf6da0) -> 0x21efc fde=[ fc3c]\n+ 0xffffffffc9612308 (offset: 0xf7020) -> 0x21f58 fde=[ fc98]\n+ 0xffffffffc9612588 (offset: 0xf72a0) -> 0x21fb4 fde=[ fcf4]\n+ 0xffffffffc9612808 (offset: 0xf7520) -> 0x22010 fde=[ fd50]\n+ 0xffffffffc9612a88 (offset: 0xf77a0) -> 0x2206c fde=[ fdac]\n+ 0xffffffffc9612d08 (offset: 0xf7a20) -> 0x220c8 fde=[ fe08]\n+ 0xffffffffc9612f88 (offset: 0xf7ca0) -> 0x22124 fde=[ fe64]\n+ 0xffffffffc9613208 (offset: 0xf7f20) -> 0x22180 fde=[ fec0]\n+ 0xffffffffc9613488 (offset: 0xf81a0) -> 0x221dc fde=[ ff1c]\n+ 0xffffffffc9613708 (offset: 0xf8420) -> 0x22238 fde=[ ff78]\n+ 0xffffffffc9613988 (offset: 0xf86a0) -> 0x22294 fde=[ ffd4]\n+ 0xffffffffc9613f58 (offset: 0xf8c70) -> 0x222f0 fde=[ 10030]\n+ 0xffffffffc9614528 (offset: 0xf9240) -> 0x2234c fde=[ 1008c]\n+ 0xffffffffc9614af8 (offset: 0xf9810) -> 0x223a8 fde=[ 100e8]\n+ 0xffffffffc96150c8 (offset: 0xf9de0) -> 0x22404 fde=[ 10144]\n+ 0xffffffffc9615698 (offset: 0xfa3b0) -> 0x22460 fde=[ 101a0]\n+ 0xffffffffc9615968 (offset: 0xfa680) -> 0x224bc fde=[ 101fc]\n+ 0xffffffffc9615c28 (offset: 0xfa940) -> 0x22518 fde=[ 10258]\n+ 0xffffffffc9615ca8 (offset: 0xfa9c0) -> 0x22538 fde=[ 10278]\n+ 0xffffffffc9615d28 (offset: 0xfaa40) -> 0x22558 fde=[ 10298]\n+ 0xffffffffc9615da8 (offset: 0xfaac0) -> 0x22578 fde=[ 102b8]\n+ 0xffffffffc9615e28 (offset: 0xfab40) -> 0x22598 fde=[ 102d8]\n+ 0xffffffffc9615ea8 (offset: 0xfabc0) -> 0x225b8 fde=[ 102f8]\n+ 0xffffffffc9615f28 (offset: 0xfac40) -> 0x225d8 fde=[ 10318]\n+ 0xffffffffc9615fa8 (offset: 0xfacc0) -> 0x225f8 fde=[ 10338]\n+ 0xffffffffc9616028 (offset: 0xfad40) -> 0x22618 fde=[ 10358]\n+ 0xffffffffc96160a8 (offset: 0xfadc0) -> 0x22638 fde=[ 10378]\n+ 0xffffffffc9616128 (offset: 0xfae40) -> 0x22658 fde=[ 10398]\n+ 0xffffffffc96161a8 (offset: 0xfaec0) -> 0x22678 fde=[ 103b8]\n+ 0xffffffffc9616228 (offset: 0xfaf40) -> 0x22698 fde=[ 103d8]\n+ 0xffffffffc96162a8 (offset: 0xfafc0) -> 0x226b8 fde=[ 103f8]\n+ 0xffffffffc9616328 (offset: 0xfb040) -> 0x226d8 fde=[ 10418]\n+ 0xffffffffc96163a8 (offset: 0xfb0c0) -> 0x226f8 fde=[ 10438]\n+ 0xffffffffc9616428 (offset: 0xfb140) -> 0x22718 fde=[ 10458]\n+ 0xffffffffc96164a8 (offset: 0xfb1c0) -> 0x22738 fde=[ 10478]\n+ 0xffffffffc9616528 (offset: 0xfb240) -> 0x22758 fde=[ 10498]\n+ 0xffffffffc96165a8 (offset: 0xfb2c0) -> 0x22778 fde=[ 104b8]\n+ 0xffffffffc9616628 (offset: 0xfb340) -> 0x22798 fde=[ 104d8]\n+ 0xffffffffc96166a8 (offset: 0xfb3c0) -> 0x227b8 fde=[ 104f8]\n+ 0xffffffffc9616728 (offset: 0xfb440) -> 0x227d8 fde=[ 10518]\n+ 0xffffffffc96167a8 (offset: 0xfb4c0) -> 0x227f8 fde=[ 10538]\n+ 0xffffffffc9616828 (offset: 0xfb540) -> 0x22818 fde=[ 10558]\n+ 0xffffffffc96168a8 (offset: 0xfb5c0) -> 0x22838 fde=[ 10578]\n+ 0xffffffffc9616928 (offset: 0xfb640) -> 0x22858 fde=[ 10598]\n+ 0xffffffffc96169a8 (offset: 0xfb6c0) -> 0x22878 fde=[ 105b8]\n+ 0xffffffffc9616a28 (offset: 0xfb740) -> 0x22898 fde=[ 105d8]\n+ 0xffffffffc9616aa8 (offset: 0xfb7c0) -> 0x228b8 fde=[ 105f8]\n+ 0xffffffffc9616b28 (offset: 0xfb840) -> 0x228d8 fde=[ 10618]\n+ 0xffffffffc9616ba8 (offset: 0xfb8c0) -> 0x228f8 fde=[ 10638]\n+ 0xffffffffc9616c28 (offset: 0xfb940) -> 0x22918 fde=[ 10658]\n+ 0xffffffffc9616ca8 (offset: 0xfb9c0) -> 0x22938 fde=[ 10678]\n+ 0xffffffffc9616d28 (offset: 0xfba40) -> 0x22958 fde=[ 10698]\n+ 0xffffffffc9616da8 (offset: 0xfbac0) -> 0x22978 fde=[ 106b8]\n+ 0xffffffffc9616e28 (offset: 0xfbb40) -> 0x22998 fde=[ 106d8]\n+ 0xffffffffc9616ea8 (offset: 0xfbbc0) -> 0x229b8 fde=[ 106f8]\n+ 0xffffffffc9616f28 (offset: 0xfbc40) -> 0x229d8 fde=[ 10718]\n+ 0xffffffffc9616ff8 (offset: 0xfbd10) -> 0x229fc fde=[ 1073c]\n+ 0xffffffffc96170c8 (offset: 0xfbde0) -> 0x22a20 fde=[ 10760]\n+ 0xffffffffc9617198 (offset: 0xfbeb0) -> 0x22a44 fde=[ 10784]\n+ 0xffffffffc9617268 (offset: 0xfbf80) -> 0x22a68 fde=[ 107a8]\n+ 0xffffffffc9617338 (offset: 0xfc050) -> 0x22a8c fde=[ 107cc]\n+ 0xffffffffc9617408 (offset: 0xfc120) -> 0x22ab0 fde=[ 107f0]\n+ 0xffffffffc96174d8 (offset: 0xfc1f0) -> 0x22ad4 fde=[ 10814]\n+ 0xffffffffc96175a8 (offset: 0xfc2c0) -> 0x22af8 fde=[ 10838]\n+ 0xffffffffc9617678 (offset: 0xfc390) -> 0x22b1c fde=[ 1085c]\n+ 0xffffffffc9617748 (offset: 0xfc460) -> 0x22b40 fde=[ 10880]\n+ 0xffffffffc96177d8 (offset: 0xfc4f0) -> 0x22b64 fde=[ 108a4]\n+ 0xffffffffc9617868 (offset: 0xfc580) -> 0x22b88 fde=[ 108c8]\n+ 0xffffffffc96178f8 (offset: 0xfc610) -> 0x22bac fde=[ 108ec]\n+ 0xffffffffc9617988 (offset: 0xfc6a0) -> 0x22bd0 fde=[ 10910]\n+ 0xffffffffc9618318 (offset: 0xfd030) -> 0x22bf4 fde=[ 10934]\n+ 0xffffffffc9618348 (offset: 0xfd060) -> 0x22c10 fde=[ 10950]\n+ 0xffffffffc96189d8 (offset: 0xfd6f0) -> 0x22c6c fde=[ 109ac]\n+ 0xffffffffc9618b18 (offset: 0xfd830) -> 0x22c90 fde=[ 109d0]\n+ 0xffffffffc9618c98 (offset: 0xfd9b0) -> 0x22cb4 fde=[ 109f4]\n+ 0xffffffffc9618d38 (offset: 0xfda50) -> 0x22cd4 fde=[ 10a14]\n+ 0xffffffffc9618d68 (offset: 0xfda80) -> 0x22cf0 fde=[ 10a30]\n+ 0xffffffffc9619238 (offset: 0xfdf50) -> 0x22d4c fde=[ 10a8c]\n+ 0xffffffffc9619338 (offset: 0xfe050) -> 0x22d70 fde=[ 10ab0]\n+ 0xffffffffc9619438 (offset: 0xfe150) -> 0x22d94 fde=[ 10ad4]\n+ 0xffffffffc9619968 (offset: 0xfe680) -> 0x22df0 fde=[ 10b30]\n+ 0xffffffffc9619a78 (offset: 0xfe790) -> 0x22e14 fde=[ 10b54]\n+ 0xffffffffc9619b88 (offset: 0xfe8a0) -> 0x22e38 fde=[ 10b78]\n+ 0xffffffffc9619c78 (offset: 0xfe990) -> 0x22e58 fde=[ 10b98]\n+ 0xffffffffc9619ca8 (offset: 0xfe9c0) -> 0x22eac fde=[ 10bec]\n+ 0xffffffffc9619f78 (offset: 0xfec90) -> 0x22ed0 fde=[ 10c10]\n+ 0xffffffffc961a248 (offset: 0xfef60) -> 0x22ef4 fde=[ 10c34]\n+ 0xffffffffc961a2e8 (offset: 0xff000) -> 0x22f18 fde=[ 10c58]\n+ 0xffffffffc961a378 (offset: 0xff090) -> 0x22f3c fde=[ 10c7c]\n+ 0xffffffffc961a468 (offset: 0xff180) -> 0x22f5c fde=[ 10c9c]\n+ 0xffffffffc961a498 (offset: 0xff1b0) -> 0x22e70 fde=[ 10bb0]\n+ 0xffffffffc961a518 (offset: 0xff230) -> 0x22f74 fde=[ 10cb4]\n+ 0xffffffffc961b638 (offset: 0x100350) -> 0x2318c fde=[ 10ecc]\n+ 0xffffffffc961b908 (offset: 0x100620) -> 0x231b0 fde=[ 10ef0]\n+ 0xffffffffc961bbd8 (offset: 0x1008f0) -> 0x23210 fde=[ 10f50]\n+ 0xffffffffc961bea8 (offset: 0x100bc0) -> 0x23234 fde=[ 10f74]\n+ 0xffffffffc961c178 (offset: 0x100e90) -> 0x23294 fde=[ 10fd4]\n+ 0xffffffffc961c448 (offset: 0x101160) -> 0x232b8 fde=[ 10ff8]\n+ 0xffffffffc961c718 (offset: 0x101430) -> 0x23318 fde=[ 11058]\n+ 0xffffffffc961c9e8 (offset: 0x101700) -> 0x2333c fde=[ 1107c]\n+ 0xffffffffc961ccb8 (offset: 0x1019d0) -> 0x2339c fde=[ 110dc]\n+ 0xffffffffc961cf88 (offset: 0x101ca0) -> 0x233c0 fde=[ 11100]\n+ 0xffffffffc961d258 (offset: 0x101f70) -> 0x23420 fde=[ 11160]\n+ 0xffffffffc961d528 (offset: 0x102240) -> 0x23444 fde=[ 11184]\n+ 0xffffffffc961d7f8 (offset: 0x102510) -> 0x23468 fde=[ 111a8]\n+ 0xffffffffc961d898 (offset: 0x1025b0) -> 0x2348c fde=[ 111cc]\n+ 0xffffffffc961d928 (offset: 0x102640) -> 0x234b0 fde=[ 111f0]\n+ 0xffffffffc961d9c8 (offset: 0x1026e0) -> 0x234d4 fde=[ 11214]\n+ 0xffffffffc961da58 (offset: 0x102770) -> 0x234f8 fde=[ 11238]\n+ 0xffffffffc961daf8 (offset: 0x102810) -> 0x2351c fde=[ 1125c]\n+ 0xffffffffc961db88 (offset: 0x1028a0) -> 0x23540 fde=[ 11280]\n+ 0xffffffffc961dc28 (offset: 0x102940) -> 0x23564 fde=[ 112a4]\n+ 0xffffffffc961dcb8 (offset: 0x1029d0) -> 0x23588 fde=[ 112c8]\n+ 0xffffffffc961dd58 (offset: 0x102a70) -> 0x235ac fde=[ 112ec]\n+ 0xffffffffc961dde8 (offset: 0x102b00) -> 0x235d0 fde=[ 11310]\n+ 0xffffffffc961de88 (offset: 0x102ba0) -> 0x235f4 fde=[ 11334]\n+ 0xffffffffc961df18 (offset: 0x102c30) -> 0x23618 fde=[ 11358]\n+ 0xffffffffc961e3a8 (offset: 0x1030c0) -> 0x2363c fde=[ 1137c]\n+ 0xffffffffc961e3d8 (offset: 0x1030f0) -> 0x23150 fde=[ 10e90]\n+ 0xffffffffc961e458 (offset: 0x103170) -> 0x23654 fde=[ 11394]\n+ 0xffffffffc961f588 (offset: 0x1042a0) -> 0x231d4 fde=[ 10f14]\n+ 0xffffffffc961f608 (offset: 0x104320) -> 0x23830 fde=[ 11570]\n+ 0xffffffffc9620738 (offset: 0x105450) -> 0x23258 fde=[ 10f98]\n+ 0xffffffffc96207b8 (offset: 0x1054d0) -> 0x23a0c fde=[ 1174c]\n+ 0xffffffffc96218e8 (offset: 0x106600) -> 0x232dc fde=[ 1101c]\n+ 0xffffffffc9621968 (offset: 0x106680) -> 0x23be8 fde=[ 11928]\n+ 0xffffffffc9622a98 (offset: 0x1077b0) -> 0x23360 fde=[ 110a0]\n+ 0xffffffffc9622b18 (offset: 0x107830) -> 0x23dc4 fde=[ 11b04]\n+ 0xffffffffc9623c48 (offset: 0x108960) -> 0x233e4 fde=[ 11124]\n+ 0xffffffffc9623cc8 (offset: 0x1089e0) -> 0x23fa0 fde=[ 11ce0]\n+ 0xffffffffc9624df8 (offset: 0x109b10) -> 0x241bc fde=[ 11efc]\n+ 0xffffffffc96250c8 (offset: 0x109de0) -> 0x241e0 fde=[ 11f20]\n+ 0xffffffffc9625398 (offset: 0x10a0b0) -> 0x24240 fde=[ 11f80]\n+ 0xffffffffc9625668 (offset: 0x10a380) -> 0x24264 fde=[ 11fa4]\n+ 0xffffffffc9625938 (offset: 0x10a650) -> 0x242c4 fde=[ 12004]\n+ 0xffffffffc9625c08 (offset: 0x10a920) -> 0x242e8 fde=[ 12028]\n+ 0xffffffffc9625ed8 (offset: 0x10abf0) -> 0x24348 fde=[ 12088]\n+ 0xffffffffc96261a8 (offset: 0x10aec0) -> 0x2436c fde=[ 120ac]\n+ 0xffffffffc9626478 (offset: 0x10b190) -> 0x243cc fde=[ 1210c]\n+ 0xffffffffc9626748 (offset: 0x10b460) -> 0x243f0 fde=[ 12130]\n+ 0xffffffffc9626a18 (offset: 0x10b730) -> 0x24450 fde=[ 12190]\n+ 0xffffffffc9626ce8 (offset: 0x10ba00) -> 0x24474 fde=[ 121b4]\n+ 0xffffffffc9626fb8 (offset: 0x10bcd0) -> 0x24498 fde=[ 121d8]\n+ 0xffffffffc9627058 (offset: 0x10bd70) -> 0x244bc fde=[ 121fc]\n+ 0xffffffffc96270e8 (offset: 0x10be00) -> 0x244e0 fde=[ 12220]\n+ 0xffffffffc9627188 (offset: 0x10bea0) -> 0x24504 fde=[ 12244]\n+ 0xffffffffc9627218 (offset: 0x10bf30) -> 0x24528 fde=[ 12268]\n+ 0xffffffffc96272b8 (offset: 0x10bfd0) -> 0x2454c fde=[ 1228c]\n+ 0xffffffffc9627348 (offset: 0x10c060) -> 0x24570 fde=[ 122b0]\n+ 0xffffffffc96273e8 (offset: 0x10c100) -> 0x24594 fde=[ 122d4]\n+ 0xffffffffc9627478 (offset: 0x10c190) -> 0x245b8 fde=[ 122f8]\n+ 0xffffffffc9627518 (offset: 0x10c230) -> 0x245dc fde=[ 1231c]\n+ 0xffffffffc96275a8 (offset: 0x10c2c0) -> 0x24600 fde=[ 12340]\n+ 0xffffffffc9627648 (offset: 0x10c360) -> 0x24624 fde=[ 12364]\n+ 0xffffffffc96276d8 (offset: 0x10c3f0) -> 0x24648 fde=[ 12388]\n+ 0xffffffffc9627b68 (offset: 0x10c880) -> 0x2466c fde=[ 123ac]\n+ 0xffffffffc9627b98 (offset: 0x10c8b0) -> 0x24180 fde=[ 11ec0]\n+ 0xffffffffc9627c18 (offset: 0x10c930) -> 0x24204 fde=[ 11f44]\n+ 0xffffffffc9627c98 (offset: 0x10c9b0) -> 0x24288 fde=[ 11fc8]\n+ 0xffffffffc9627d18 (offset: 0x10ca30) -> 0x2430c fde=[ 1204c]\n+ 0xffffffffc9627d98 (offset: 0x10cab0) -> 0x24390 fde=[ 120d0]\n+ 0xffffffffc9627e18 (offset: 0x10cb30) -> 0x24414 fde=[ 12154]\n+ 0xffffffffc9627e98 (offset: 0x10cbb0) -> 0x246c4 fde=[ 12404]\n+ 0xffffffffc9628168 (offset: 0x10ce80) -> 0x246e8 fde=[ 12428]\n+ 0xffffffffc9628438 (offset: 0x10d150) -> 0x24748 fde=[ 12488]\n+ 0xffffffffc9628708 (offset: 0x10d420) -> 0x2476c fde=[ 124ac]\n+ 0xffffffffc96289d8 (offset: 0x10d6f0) -> 0x247cc fde=[ 1250c]\n+ 0xffffffffc9628ca8 (offset: 0x10d9c0) -> 0x247f0 fde=[ 12530]\n+ 0xffffffffc9628f78 (offset: 0x10dc90) -> 0x24850 fde=[ 12590]\n+ 0xffffffffc9629248 (offset: 0x10df60) -> 0x24874 fde=[ 125b4]\n+ 0xffffffffc9629518 (offset: 0x10e230) -> 0x248d4 fde=[ 12614]\n+ 0xffffffffc96297e8 (offset: 0x10e500) -> 0x248f8 fde=[ 12638]\n+ 0xffffffffc9629ab8 (offset: 0x10e7d0) -> 0x24958 fde=[ 12698]\n+ 0xffffffffc9629d88 (offset: 0x10eaa0) -> 0x2497c fde=[ 126bc]\n+ 0xffffffffc962a058 (offset: 0x10ed70) -> 0x249a0 fde=[ 126e0]\n+ 0xffffffffc962a0f8 (offset: 0x10ee10) -> 0x249c4 fde=[ 12704]\n+ 0xffffffffc962a188 (offset: 0x10eea0) -> 0x249e8 fde=[ 12728]\n+ 0xffffffffc962a228 (offset: 0x10ef40) -> 0x24a0c fde=[ 1274c]\n+ 0xffffffffc962a2b8 (offset: 0x10efd0) -> 0x24a30 fde=[ 12770]\n+ 0xffffffffc962a358 (offset: 0x10f070) -> 0x24a54 fde=[ 12794]\n+ 0xffffffffc962a3e8 (offset: 0x10f100) -> 0x24a78 fde=[ 127b8]\n+ 0xffffffffc962a488 (offset: 0x10f1a0) -> 0x24a9c fde=[ 127dc]\n+ 0xffffffffc962a518 (offset: 0x10f230) -> 0x24ac0 fde=[ 12800]\n+ 0xffffffffc962a5b8 (offset: 0x10f2d0) -> 0x24ae4 fde=[ 12824]\n+ 0xffffffffc962a648 (offset: 0x10f360) -> 0x24b08 fde=[ 12848]\n+ 0xffffffffc962a6e8 (offset: 0x10f400) -> 0x24b2c fde=[ 1286c]\n+ 0xffffffffc962a778 (offset: 0x10f490) -> 0x24b50 fde=[ 12890]\n+ 0xffffffffc962ac08 (offset: 0x10f920) -> 0x24b74 fde=[ 128b4]\n+ 0xffffffffc962ac38 (offset: 0x10f950) -> 0x24688 fde=[ 123c8]\n+ 0xffffffffc962acb8 (offset: 0x10f9d0) -> 0x24b8c fde=[ 128cc]\n+ 0xffffffffc962bdf8 (offset: 0x110b10) -> 0x2470c fde=[ 1244c]\n+ 0xffffffffc962be78 (offset: 0x110b90) -> 0x24d68 fde=[ 12aa8]\n+ 0xffffffffc962cfb8 (offset: 0x111cd0) -> 0x24790 fde=[ 124d0]\n+ 0xffffffffc962d038 (offset: 0x111d50) -> 0x24f44 fde=[ 12c84]\n+ 0xffffffffc962e178 (offset: 0x112e90) -> 0x24814 fde=[ 12554]\n+ 0xffffffffc962e1f8 (offset: 0x112f10) -> 0x25120 fde=[ 12e60]\n+ 0xffffffffc962f338 (offset: 0x114050) -> 0x24898 fde=[ 125d8]\n+ 0xffffffffc962f3b8 (offset: 0x1140d0) -> 0x252fc fde=[ 1303c]\n+ 0xffffffffc96304f8 (offset: 0x115210) -> 0x2491c fde=[ 1265c]\n+ 0xffffffffc9630578 (offset: 0x115290) -> 0x254d8 fde=[ 13218]\n+ 0xffffffffc96316b8 (offset: 0x1163d0) -> 0x256f4 fde=[ 13434]\n+ 0xffffffffc9631988 (offset: 0x1166a0) -> 0x25718 fde=[ 13458]\n+ 0xffffffffc9631c58 (offset: 0x116970) -> 0x25778 fde=[ 134b8]\n+ 0xffffffffc9631f28 (offset: 0x116c40) -> 0x2579c fde=[ 134dc]\n+ 0xffffffffc96321f8 (offset: 0x116f10) -> 0x257fc fde=[ 1353c]\n+ 0xffffffffc96324c8 (offset: 0x1171e0) -> 0x25820 fde=[ 13560]\n+ 0xffffffffc9632798 (offset: 0x1174b0) -> 0x25880 fde=[ 135c0]\n+ 0xffffffffc9632a68 (offset: 0x117780) -> 0x258a4 fde=[ 135e4]\n+ 0xffffffffc9632d38 (offset: 0x117a50) -> 0x25904 fde=[ 13644]\n+ 0xffffffffc9633008 (offset: 0x117d20) -> 0x25928 fde=[ 13668]\n+ 0xffffffffc96332d8 (offset: 0x117ff0) -> 0x25988 fde=[ 136c8]\n+ 0xffffffffc96335a8 (offset: 0x1182c0) -> 0x259ac fde=[ 136ec]\n+ 0xffffffffc9633878 (offset: 0x118590) -> 0x259d0 fde=[ 13710]\n+ 0xffffffffc9633918 (offset: 0x118630) -> 0x259f4 fde=[ 13734]\n+ 0xffffffffc96339a8 (offset: 0x1186c0) -> 0x25a18 fde=[ 13758]\n+ 0xffffffffc9633a48 (offset: 0x118760) -> 0x25a3c fde=[ 1377c]\n+ 0xffffffffc9633ad8 (offset: 0x1187f0) -> 0x25a60 fde=[ 137a0]\n+ 0xffffffffc9633b78 (offset: 0x118890) -> 0x25a84 fde=[ 137c4]\n+ 0xffffffffc9633c08 (offset: 0x118920) -> 0x25aa8 fde=[ 137e8]\n+ 0xffffffffc9633ca8 (offset: 0x1189c0) -> 0x25acc fde=[ 1380c]\n+ 0xffffffffc9633d38 (offset: 0x118a50) -> 0x25af0 fde=[ 13830]\n+ 0xffffffffc9633dd8 (offset: 0x118af0) -> 0x25b14 fde=[ 13854]\n+ 0xffffffffc9633e68 (offset: 0x118b80) -> 0x25b38 fde=[ 13878]\n+ 0xffffffffc9633f08 (offset: 0x118c20) -> 0x25b5c fde=[ 1389c]\n+ 0xffffffffc9633f98 (offset: 0x118cb0) -> 0x25b80 fde=[ 138c0]\n+ 0xffffffffc9634428 (offset: 0x119140) -> 0x25ba4 fde=[ 138e4]\n+ 0xffffffffc9634458 (offset: 0x119170) -> 0x256b8 fde=[ 133f8]\n+ 0xffffffffc96344d8 (offset: 0x1191f0) -> 0x25bbc fde=[ 138fc]\n+ 0xffffffffc9635628 (offset: 0x11a340) -> 0x2573c fde=[ 1347c]\n+ 0xffffffffc96356a8 (offset: 0x11a3c0) -> 0x25d98 fde=[ 13ad8]\n+ 0xffffffffc96367f8 (offset: 0x11b510) -> 0x257c0 fde=[ 13500]\n+ 0xffffffffc9636878 (offset: 0x11b590) -> 0x25f74 fde=[ 13cb4]\n+ 0xffffffffc96379c8 (offset: 0x11c6e0) -> 0x25844 fde=[ 13584]\n+ 0xffffffffc9637a48 (offset: 0x11c760) -> 0x26150 fde=[ 13e90]\n+ 0xffffffffc9638b98 (offset: 0x11d8b0) -> 0x258c8 fde=[ 13608]\n+ 0xffffffffc9638c18 (offset: 0x11d930) -> 0x2632c fde=[ 1406c]\n+ 0xffffffffc9639d68 (offset: 0x11ea80) -> 0x2594c fde=[ 1368c]\n+ 0xffffffffc9639de8 (offset: 0x11eb00) -> 0x26508 fde=[ 14248]\n+ 0xffffffffc963af38 (offset: 0x11fc50) -> 0x2671c fde=[ 1445c]\n+ 0xffffffffc963b208 (offset: 0x11ff20) -> 0x26740 fde=[ 14480]\n+ 0xffffffffc963b4d8 (offset: 0x1201f0) -> 0x26764 fde=[ 144a4]\n+ 0xffffffffc963b578 (offset: 0x120290) -> 0x26788 fde=[ 144c8]\n+ 0xffffffffc963b608 (offset: 0x120320) -> 0x267ac fde=[ 144ec]\n+ 0xffffffffc963b6f8 (offset: 0x120410) -> 0x267cc fde=[ 1450c]\n+ 0xffffffffc963b728 (offset: 0x120440) -> 0x266e8 fde=[ 14428]\n+ 0xffffffffc963b788 (offset: 0x1204a0) -> 0x267e4 fde=[ 14524]\n+ 0xffffffffc963c8b8 (offset: 0x1215d0) -> 0x269fc fde=[ 1473c]\n+ 0xffffffffc963cb88 (offset: 0x1218a0) -> 0x26a20 fde=[ 14760]\n+ 0xffffffffc963ce58 (offset: 0x121b70) -> 0x26a80 fde=[ 147c0]\n+ 0xffffffffc963d128 (offset: 0x121e40) -> 0x26aa4 fde=[ 147e4]\n+ 0xffffffffc963d3f8 (offset: 0x122110) -> 0x26b04 fde=[ 14844]\n+ 0xffffffffc963d6c8 (offset: 0x1223e0) -> 0x26b28 fde=[ 14868]\n+ 0xffffffffc963d998 (offset: 0x1226b0) -> 0x26b88 fde=[ 148c8]\n+ 0xffffffffc963dc68 (offset: 0x122980) -> 0x26bac fde=[ 148ec]\n+ 0xffffffffc963df38 (offset: 0x122c50) -> 0x26c0c fde=[ 1494c]\n+ 0xffffffffc963e208 (offset: 0x122f20) -> 0x26c30 fde=[ 14970]\n+ 0xffffffffc963e4d8 (offset: 0x1231f0) -> 0x26c90 fde=[ 149d0]\n+ 0xffffffffc963e7a8 (offset: 0x1234c0) -> 0x26cb4 fde=[ 149f4]\n+ 0xffffffffc963ea78 (offset: 0x123790) -> 0x26cd8 fde=[ 14a18]\n+ 0xffffffffc963eb18 (offset: 0x123830) -> 0x26cfc fde=[ 14a3c]\n+ 0xffffffffc963eba8 (offset: 0x1238c0) -> 0x26d20 fde=[ 14a60]\n+ 0xffffffffc963ec48 (offset: 0x123960) -> 0x26d44 fde=[ 14a84]\n+ 0xffffffffc963ecd8 (offset: 0x1239f0) -> 0x26d68 fde=[ 14aa8]\n+ 0xffffffffc963ed78 (offset: 0x123a90) -> 0x26d8c fde=[ 14acc]\n+ 0xffffffffc963ee08 (offset: 0x123b20) -> 0x26db0 fde=[ 14af0]\n+ 0xffffffffc963eea8 (offset: 0x123bc0) -> 0x26dd4 fde=[ 14b14]\n+ 0xffffffffc963ef38 (offset: 0x123c50) -> 0x26df8 fde=[ 14b38]\n+ 0xffffffffc963efd8 (offset: 0x123cf0) -> 0x26e1c fde=[ 14b5c]\n+ 0xffffffffc963f068 (offset: 0x123d80) -> 0x26e40 fde=[ 14b80]\n+ 0xffffffffc963f108 (offset: 0x123e20) -> 0x26e64 fde=[ 14ba4]\n+ 0xffffffffc963f198 (offset: 0x123eb0) -> 0x26e88 fde=[ 14bc8]\n+ 0xffffffffc963f628 (offset: 0x124340) -> 0x26eac fde=[ 14bec]\n+ 0xffffffffc963f658 (offset: 0x124370) -> 0x269c0 fde=[ 14700]\n+ 0xffffffffc963f6d8 (offset: 0x1243f0) -> 0x26ec4 fde=[ 14c04]\n+ 0xffffffffc9640828 (offset: 0x125540) -> 0x26a44 fde=[ 14784]\n+ 0xffffffffc96408a8 (offset: 0x1255c0) -> 0x270a0 fde=[ 14de0]\n+ 0xffffffffc96419f8 (offset: 0x126710) -> 0x26ac8 fde=[ 14808]\n+ 0xffffffffc9641a78 (offset: 0x126790) -> 0x2727c fde=[ 14fbc]\n+ 0xffffffffc9642bc8 (offset: 0x1278e0) -> 0x26b4c fde=[ 1488c]\n+ 0xffffffffc9642c48 (offset: 0x127960) -> 0x27458 fde=[ 15198]\n+ 0xffffffffc9643d98 (offset: 0x128ab0) -> 0x26bd0 fde=[ 14910]\n+ 0xffffffffc9643e18 (offset: 0x128b30) -> 0x27634 fde=[ 15374]\n+ 0xffffffffc9644f68 (offset: 0x129c80) -> 0x26c54 fde=[ 14994]\n+ 0xffffffffc9644fe8 (offset: 0x129d00) -> 0x27810 fde=[ 15550]\n+ 0xffffffffc9646138 (offset: 0x12ae50) -> 0x27a2c fde=[ 1576c]\n+ 0xffffffffc9646408 (offset: 0x12b120) -> 0x27a50 fde=[ 15790]\n+ 0xffffffffc96466d8 (offset: 0x12b3f0) -> 0x27ab0 fde=[ 157f0]\n+ 0xffffffffc96469a8 (offset: 0x12b6c0) -> 0x27ad4 fde=[ 15814]\n+ 0xffffffffc9646c78 (offset: 0x12b990) -> 0x27b34 fde=[ 15874]\n+ 0xffffffffc9646f48 (offset: 0x12bc60) -> 0x27b58 fde=[ 15898]\n+ 0xffffffffc9647218 (offset: 0x12bf30) -> 0x27bb8 fde=[ 158f8]\n+ 0xffffffffc96474e8 (offset: 0x12c200) -> 0x27bdc fde=[ 1591c]\n+ 0xffffffffc96477b8 (offset: 0x12c4d0) -> 0x27c3c fde=[ 1597c]\n+ 0xffffffffc9647a88 (offset: 0x12c7a0) -> 0x27c60 fde=[ 159a0]\n+ 0xffffffffc9647d58 (offset: 0x12ca70) -> 0x27cc0 fde=[ 15a00]\n+ 0xffffffffc9648028 (offset: 0x12cd40) -> 0x27ce4 fde=[ 15a24]\n+ 0xffffffffc96482f8 (offset: 0x12d010) -> 0x27d08 fde=[ 15a48]\n+ 0xffffffffc9648398 (offset: 0x12d0b0) -> 0x27d2c fde=[ 15a6c]\n+ 0xffffffffc9648428 (offset: 0x12d140) -> 0x27d50 fde=[ 15a90]\n+ 0xffffffffc96484c8 (offset: 0x12d1e0) -> 0x27d74 fde=[ 15ab4]\n+ 0xffffffffc9648558 (offset: 0x12d270) -> 0x27d98 fde=[ 15ad8]\n+ 0xffffffffc96485f8 (offset: 0x12d310) -> 0x27dbc fde=[ 15afc]\n+ 0xffffffffc9648688 (offset: 0x12d3a0) -> 0x27de0 fde=[ 15b20]\n+ 0xffffffffc9648728 (offset: 0x12d440) -> 0x27e04 fde=[ 15b44]\n+ 0xffffffffc96487b8 (offset: 0x12d4d0) -> 0x27e28 fde=[ 15b68]\n+ 0xffffffffc9648858 (offset: 0x12d570) -> 0x27e4c fde=[ 15b8c]\n+ 0xffffffffc96488e8 (offset: 0x12d600) -> 0x27e70 fde=[ 15bb0]\n+ 0xffffffffc9648988 (offset: 0x12d6a0) -> 0x27e94 fde=[ 15bd4]\n+ 0xffffffffc9648a18 (offset: 0x12d730) -> 0x27eb8 fde=[ 15bf8]\n+ 0xffffffffc9648ea8 (offset: 0x12dbc0) -> 0x27edc fde=[ 15c1c]\n+ 0xffffffffc9648ed8 (offset: 0x12dbf0) -> 0x279f0 fde=[ 15730]\n+ 0xffffffffc9648f58 (offset: 0x12dc70) -> 0x27ef4 fde=[ 15c34]\n+ 0xffffffffc964a0a8 (offset: 0x12edc0) -> 0x27a74 fde=[ 157b4]\n+ 0xffffffffc964a128 (offset: 0x12ee40) -> 0x280d0 fde=[ 15e10]\n+ 0xffffffffc964b278 (offset: 0x12ff90) -> 0x27af8 fde=[ 15838]\n+ 0xffffffffc964b2f8 (offset: 0x130010) -> 0x282ac fde=[ 15fec]\n+ 0xffffffffc964c448 (offset: 0x131160) -> 0x27b7c fde=[ 158bc]\n+ 0xffffffffc964c4c8 (offset: 0x1311e0) -> 0x28488 fde=[ 161c8]\n+ 0xffffffffc964d618 (offset: 0x132330) -> 0x27c00 fde=[ 15940]\n+ 0xffffffffc964d698 (offset: 0x1323b0) -> 0x28664 fde=[ 163a4]\n+ 0xffffffffc964e7e8 (offset: 0x133500) -> 0x27c84 fde=[ 159c4]\n+ 0xffffffffc964e868 (offset: 0x133580) -> 0x28840 fde=[ 16580]\n+ 0xffffffffc964f9b8 (offset: 0x1346d0) -> 0x28a5c fde=[ 1679c]\n+ 0xffffffffc964fc88 (offset: 0x1349a0) -> 0x28a80 fde=[ 167c0]\n+ 0xffffffffc964ff58 (offset: 0x134c70) -> 0x28ae0 fde=[ 16820]\n+ 0xffffffffc9650228 (offset: 0x134f40) -> 0x28b04 fde=[ 16844]\n+ 0xffffffffc96504f8 (offset: 0x135210) -> 0x28b64 fde=[ 168a4]\n+ 0xffffffffc96507c8 (offset: 0x1354e0) -> 0x28b88 fde=[ 168c8]\n+ 0xffffffffc9650a98 (offset: 0x1357b0) -> 0x28be8 fde=[ 16928]\n+ 0xffffffffc9650d68 (offset: 0x135a80) -> 0x28c0c fde=[ 1694c]\n+ 0xffffffffc9651038 (offset: 0x135d50) -> 0x28c6c fde=[ 169ac]\n+ 0xffffffffc9651308 (offset: 0x136020) -> 0x28c90 fde=[ 169d0]\n+ 0xffffffffc96515d8 (offset: 0x1362f0) -> 0x28cf0 fde=[ 16a30]\n+ 0xffffffffc96518a8 (offset: 0x1365c0) -> 0x28d14 fde=[ 16a54]\n+ 0xffffffffc9651b78 (offset: 0x136890) -> 0x28d38 fde=[ 16a78]\n+ 0xffffffffc9651c18 (offset: 0x136930) -> 0x28d5c fde=[ 16a9c]\n+ 0xffffffffc9651ca8 (offset: 0x1369c0) -> 0x28d80 fde=[ 16ac0]\n+ 0xffffffffc9651d48 (offset: 0x136a60) -> 0x28da4 fde=[ 16ae4]\n+ 0xffffffffc9651dd8 (offset: 0x136af0) -> 0x28dc8 fde=[ 16b08]\n+ 0xffffffffc9651e78 (offset: 0x136b90) -> 0x28dec fde=[ 16b2c]\n+ 0xffffffffc9651f08 (offset: 0x136c20) -> 0x28e10 fde=[ 16b50]\n+ 0xffffffffc9651fa8 (offset: 0x136cc0) -> 0x28e34 fde=[ 16b74]\n+ 0xffffffffc9652038 (offset: 0x136d50) -> 0x28e58 fde=[ 16b98]\n+ 0xffffffffc96520d8 (offset: 0x136df0) -> 0x28e7c fde=[ 16bbc]\n+ 0xffffffffc9652168 (offset: 0x136e80) -> 0x28ea0 fde=[ 16be0]\n+ 0xffffffffc9652208 (offset: 0x136f20) -> 0x28ec4 fde=[ 16c04]\n+ 0xffffffffc9652298 (offset: 0x136fb0) -> 0x28ee8 fde=[ 16c28]\n+ 0xffffffffc9652728 (offset: 0x137440) -> 0x28f0c fde=[ 16c4c]\n+ 0xffffffffc9652758 (offset: 0x137470) -> 0x28a20 fde=[ 16760]\n+ 0xffffffffc96527d8 (offset: 0x1374f0) -> 0x28aa4 fde=[ 167e4]\n+ 0xffffffffc9652858 (offset: 0x137570) -> 0x28b28 fde=[ 16868]\n+ 0xffffffffc96528d8 (offset: 0x1375f0) -> 0x28bac fde=[ 168ec]\n+ 0xffffffffc9652958 (offset: 0x137670) -> 0x28c30 fde=[ 16970]\n+ 0xffffffffc96529d8 (offset: 0x1376f0) -> 0x28cb4 fde=[ 169f4]\n+ 0xffffffffc9652a58 (offset: 0x137770) -> 0x28f64 fde=[ 16ca4]\n+ 0xffffffffc9652d28 (offset: 0x137a40) -> 0x28f88 fde=[ 16cc8]\n+ 0xffffffffc9652ff8 (offset: 0x137d10) -> 0x28fe8 fde=[ 16d28]\n+ 0xffffffffc96532c8 (offset: 0x137fe0) -> 0x2900c fde=[ 16d4c]\n+ 0xffffffffc9653598 (offset: 0x1382b0) -> 0x2906c fde=[ 16dac]\n+ 0xffffffffc9653868 (offset: 0x138580) -> 0x29090 fde=[ 16dd0]\n+ 0xffffffffc9653b38 (offset: 0x138850) -> 0x290f0 fde=[ 16e30]\n+ 0xffffffffc9653e08 (offset: 0x138b20) -> 0x29114 fde=[ 16e54]\n+ 0xffffffffc96540d8 (offset: 0x138df0) -> 0x29174 fde=[ 16eb4]\n+ 0xffffffffc96543a8 (offset: 0x1390c0) -> 0x29198 fde=[ 16ed8]\n+ 0xffffffffc9654678 (offset: 0x139390) -> 0x291f8 fde=[ 16f38]\n+ 0xffffffffc9654948 (offset: 0x139660) -> 0x2921c fde=[ 16f5c]\n+ 0xffffffffc9654c18 (offset: 0x139930) -> 0x29240 fde=[ 16f80]\n+ 0xffffffffc9654cb8 (offset: 0x1399d0) -> 0x29264 fde=[ 16fa4]\n+ 0xffffffffc9654d48 (offset: 0x139a60) -> 0x29288 fde=[ 16fc8]\n+ 0xffffffffc9654de8 (offset: 0x139b00) -> 0x292ac fde=[ 16fec]\n+ 0xffffffffc9654e78 (offset: 0x139b90) -> 0x292d0 fde=[ 17010]\n+ 0xffffffffc9654f18 (offset: 0x139c30) -> 0x292f4 fde=[ 17034]\n+ 0xffffffffc9654fa8 (offset: 0x139cc0) -> 0x29318 fde=[ 17058]\n+ 0xffffffffc9655048 (offset: 0x139d60) -> 0x2933c fde=[ 1707c]\n+ 0xffffffffc96550d8 (offset: 0x139df0) -> 0x29360 fde=[ 170a0]\n+ 0xffffffffc9655178 (offset: 0x139e90) -> 0x29384 fde=[ 170c4]\n+ 0xffffffffc9655208 (offset: 0x139f20) -> 0x293a8 fde=[ 170e8]\n+ 0xffffffffc96552a8 (offset: 0x139fc0) -> 0x293cc fde=[ 1710c]\n+ 0xffffffffc9655338 (offset: 0x13a050) -> 0x293f0 fde=[ 17130]\n+ 0xffffffffc96557c8 (offset: 0x13a4e0) -> 0x29414 fde=[ 17154]\n+ 0xffffffffc96557f8 (offset: 0x13a510) -> 0x28f28 fde=[ 16c68]\n+ 0xffffffffc9655878 (offset: 0x13a590) -> 0x2942c fde=[ 1716c]\n+ 0xffffffffc96569b8 (offset: 0x13b6d0) -> 0x28fac fde=[ 16cec]\n+ 0xffffffffc9656a38 (offset: 0x13b750) -> 0x29608 fde=[ 17348]\n+ 0xffffffffc9657b78 (offset: 0x13c890) -> 0x29030 fde=[ 16d70]\n+ 0xffffffffc9657bf8 (offset: 0x13c910) -> 0x297e4 fde=[ 17524]\n+ 0xffffffffc9658d38 (offset: 0x13da50) -> 0x290b4 fde=[ 16df4]\n+ 0xffffffffc9658db8 (offset: 0x13dad0) -> 0x299c0 fde=[ 17700]\n+ 0xffffffffc9659ef8 (offset: 0x13ec10) -> 0x29138 fde=[ 16e78]\n+ 0xffffffffc9659f78 (offset: 0x13ec90) -> 0x29b9c fde=[ 178dc]\n+ 0xffffffffc965b0b8 (offset: 0x13fdd0) -> 0x291bc fde=[ 16efc]\n+ 0xffffffffc965b138 (offset: 0x13fe50) -> 0x29d78 fde=[ 17ab8]\n+ 0xffffffffc965c278 (offset: 0x140f90) -> 0x29f8c fde=[ 17ccc]\n+ 0xffffffffc965c548 (offset: 0x141260) -> 0x29fb0 fde=[ 17cf0]\n+ 0xffffffffc965c818 (offset: 0x141530) -> 0x29fd4 fde=[ 17d14]\n+ 0xffffffffc965c8b8 (offset: 0x1415d0) -> 0x29ff8 fde=[ 17d38]\n+ 0xffffffffc965c948 (offset: 0x141660) -> 0x2a01c fde=[ 17d5c]\n+ 0xffffffffc965ca38 (offset: 0x141750) -> 0x2a03c fde=[ 17d7c]\n+ 0xffffffffc965ca68 (offset: 0x141780) -> 0x29f58 fde=[ 17c98]\n+ 0xffffffffc965cac8 (offset: 0x1417e0) -> 0x2a054 fde=[ 17d94]\n+ 0xffffffffc965dbf8 (offset: 0x142910) -> 0x2a26c fde=[ 17fac]\n+ 0xffffffffc965dec8 (offset: 0x142be0) -> 0x2a290 fde=[ 17fd0]\n+ 0xffffffffc965e198 (offset: 0x142eb0) -> 0x2a2f0 fde=[ 18030]\n+ 0xffffffffc965e468 (offset: 0x143180) -> 0x2a314 fde=[ 18054]\n+ 0xffffffffc965e738 (offset: 0x143450) -> 0x2a374 fde=[ 180b4]\n+ 0xffffffffc965ea08 (offset: 0x143720) -> 0x2a398 fde=[ 180d8]\n+ 0xffffffffc965ecd8 (offset: 0x1439f0) -> 0x2a3f8 fde=[ 18138]\n+ 0xffffffffc965efa8 (offset: 0x143cc0) -> 0x2a41c fde=[ 1815c]\n+ 0xffffffffc965f278 (offset: 0x143f90) -> 0x2a47c fde=[ 181bc]\n+ 0xffffffffc965f548 (offset: 0x144260) -> 0x2a4a0 fde=[ 181e0]\n+ 0xffffffffc965f818 (offset: 0x144530) -> 0x2a500 fde=[ 18240]\n+ 0xffffffffc965fae8 (offset: 0x144800) -> 0x2a524 fde=[ 18264]\n+ 0xffffffffc965fdb8 (offset: 0x144ad0) -> 0x2a548 fde=[ 18288]\n+ 0xffffffffc965fe58 (offset: 0x144b70) -> 0x2a56c fde=[ 182ac]\n+ 0xffffffffc965fee8 (offset: 0x144c00) -> 0x2a590 fde=[ 182d0]\n+ 0xffffffffc965ff88 (offset: 0x144ca0) -> 0x2a5b4 fde=[ 182f4]\n+ 0xffffffffc9660018 (offset: 0x144d30) -> 0x2a5d8 fde=[ 18318]\n+ 0xffffffffc96600b8 (offset: 0x144dd0) -> 0x2a5fc fde=[ 1833c]\n+ 0xffffffffc9660148 (offset: 0x144e60) -> 0x2a620 fde=[ 18360]\n+ 0xffffffffc96601e8 (offset: 0x144f00) -> 0x2a644 fde=[ 18384]\n+ 0xffffffffc9660278 (offset: 0x144f90) -> 0x2a668 fde=[ 183a8]\n+ 0xffffffffc9660318 (offset: 0x145030) -> 0x2a68c fde=[ 183cc]\n+ 0xffffffffc96603a8 (offset: 0x1450c0) -> 0x2a6b0 fde=[ 183f0]\n+ 0xffffffffc9660448 (offset: 0x145160) -> 0x2a6d4 fde=[ 18414]\n+ 0xffffffffc96604d8 (offset: 0x1451f0) -> 0x2a6f8 fde=[ 18438]\n+ 0xffffffffc9660968 (offset: 0x145680) -> 0x2a71c fde=[ 1845c]\n+ 0xffffffffc9660998 (offset: 0x1456b0) -> 0x2a230 fde=[ 17f70]\n+ 0xffffffffc9660a18 (offset: 0x145730) -> 0x2a734 fde=[ 18474]\n+ 0xffffffffc9661b58 (offset: 0x146870) -> 0x2a2b4 fde=[ 17ff4]\n+ 0xffffffffc9661bd8 (offset: 0x1468f0) -> 0x2a910 fde=[ 18650]\n+ 0xffffffffc9662d18 (offset: 0x147a30) -> 0x2a338 fde=[ 18078]\n+ 0xffffffffc9662d98 (offset: 0x147ab0) -> 0x2aaec fde=[ 1882c]\n+ 0xffffffffc9663ed8 (offset: 0x148bf0) -> 0x2a3bc fde=[ 180fc]\n+ 0xffffffffc9663f58 (offset: 0x148c70) -> 0x2acc8 fde=[ 18a08]\n+ 0xffffffffc9665098 (offset: 0x149db0) -> 0x2a440 fde=[ 18180]\n+ 0xffffffffc9665118 (offset: 0x149e30) -> 0x2aea4 fde=[ 18be4]\n+ 0xffffffffc9666258 (offset: 0x14af70) -> 0x2a4c4 fde=[ 18204]\n+ 0xffffffffc96662d8 (offset: 0x14aff0) -> 0x2b080 fde=[ 18dc0]\n+ 0xffffffffc9667418 (offset: 0x14c130) -> 0x2b29c fde=[ 18fdc]\n+ 0xffffffffc96676e8 (offset: 0x14c400) -> 0x2b2c0 fde=[ 19000]\n+ 0xffffffffc96679b8 (offset: 0x14c6d0) -> 0x2b320 fde=[ 19060]\n+ 0xffffffffc9667c88 (offset: 0x14c9a0) -> 0x2b344 fde=[ 19084]\n+ 0xffffffffc9667f58 (offset: 0x14cc70) -> 0x2b3a4 fde=[ 190e4]\n+ 0xffffffffc9668228 (offset: 0x14cf40) -> 0x2b3c8 fde=[ 19108]\n+ 0xffffffffc96684f8 (offset: 0x14d210) -> 0x2b428 fde=[ 19168]\n+ 0xffffffffc96687c8 (offset: 0x14d4e0) -> 0x2b44c fde=[ 1918c]\n+ 0xffffffffc9668a98 (offset: 0x14d7b0) -> 0x2b4ac fde=[ 191ec]\n+ 0xffffffffc9668d68 (offset: 0x14da80) -> 0x2b4d0 fde=[ 19210]\n+ 0xffffffffc9669038 (offset: 0x14dd50) -> 0x2b530 fde=[ 19270]\n+ 0xffffffffc9669308 (offset: 0x14e020) -> 0x2b554 fde=[ 19294]\n+ 0xffffffffc96695d8 (offset: 0x14e2f0) -> 0x2b578 fde=[ 192b8]\n+ 0xffffffffc9669678 (offset: 0x14e390) -> 0x2b59c fde=[ 192dc]\n+ 0xffffffffc9669708 (offset: 0x14e420) -> 0x2b5c0 fde=[ 19300]\n+ 0xffffffffc96697a8 (offset: 0x14e4c0) -> 0x2b5e4 fde=[ 19324]\n+ 0xffffffffc9669838 (offset: 0x14e550) -> 0x2b608 fde=[ 19348]\n+ 0xffffffffc96698d8 (offset: 0x14e5f0) -> 0x2b62c fde=[ 1936c]\n+ 0xffffffffc9669968 (offset: 0x14e680) -> 0x2b650 fde=[ 19390]\n+ 0xffffffffc9669a08 (offset: 0x14e720) -> 0x2b674 fde=[ 193b4]\n+ 0xffffffffc9669a98 (offset: 0x14e7b0) -> 0x2b698 fde=[ 193d8]\n+ 0xffffffffc9669b38 (offset: 0x14e850) -> 0x2b6bc fde=[ 193fc]\n+ 0xffffffffc9669bc8 (offset: 0x14e8e0) -> 0x2b6e0 fde=[ 19420]\n+ 0xffffffffc9669c68 (offset: 0x14e980) -> 0x2b704 fde=[ 19444]\n+ 0xffffffffc9669cf8 (offset: 0x14ea10) -> 0x2b728 fde=[ 19468]\n+ 0xffffffffc966a188 (offset: 0x14eea0) -> 0x2b74c fde=[ 1948c]\n+ 0xffffffffc966a1b8 (offset: 0x14eed0) -> 0x2b260 fde=[ 18fa0]\n+ 0xffffffffc966a238 (offset: 0x14ef50) -> 0x2b764 fde=[ 194a4]\n+ 0xffffffffc966b388 (offset: 0x1500a0) -> 0x2b2e4 fde=[ 19024]\n+ 0xffffffffc966b408 (offset: 0x150120) -> 0x2b940 fde=[ 19680]\n+ 0xffffffffc966c558 (offset: 0x151270) -> 0x2b368 fde=[ 190a8]\n+ 0xffffffffc966c5d8 (offset: 0x1512f0) -> 0x2bb1c fde=[ 1985c]\n+ 0xffffffffc966d728 (offset: 0x152440) -> 0x2b3ec fde=[ 1912c]\n+ 0xffffffffc966d7a8 (offset: 0x1524c0) -> 0x2bcf8 fde=[ 19a38]\n+ 0xffffffffc966e8f8 (offset: 0x153610) -> 0x2b470 fde=[ 191b0]\n+ 0xffffffffc966e978 (offset: 0x153690) -> 0x2bed4 fde=[ 19c14]\n+ 0xffffffffc966fac8 (offset: 0x1547e0) -> 0x2b4f4 fde=[ 19234]\n+ 0xffffffffc966fb48 (offset: 0x154860) -> 0x2c0b0 fde=[ 19df0]\n+ 0xffffffffc9670c98 (offset: 0x1559b0) -> 0x2c2cc fde=[ 1a00c]\n+ 0xffffffffc9670f68 (offset: 0x155c80) -> 0x2c2f0 fde=[ 1a030]\n+ 0xffffffffc9671238 (offset: 0x155f50) -> 0x2c350 fde=[ 1a090]\n+ 0xffffffffc9671508 (offset: 0x156220) -> 0x2c374 fde=[ 1a0b4]\n+ 0xffffffffc96717d8 (offset: 0x1564f0) -> 0x2c3d4 fde=[ 1a114]\n+ 0xffffffffc9671aa8 (offset: 0x1567c0) -> 0x2c3f8 fde=[ 1a138]\n+ 0xffffffffc9671d78 (offset: 0x156a90) -> 0x2c458 fde=[ 1a198]\n+ 0xffffffffc9672048 (offset: 0x156d60) -> 0x2c47c fde=[ 1a1bc]\n+ 0xffffffffc9672318 (offset: 0x157030) -> 0x2c4dc fde=[ 1a21c]\n+ 0xffffffffc96725e8 (offset: 0x157300) -> 0x2c500 fde=[ 1a240]\n+ 0xffffffffc96728b8 (offset: 0x1575d0) -> 0x2c560 fde=[ 1a2a0]\n+ 0xffffffffc9672b88 (offset: 0x1578a0) -> 0x2c584 fde=[ 1a2c4]\n+ 0xffffffffc9672e58 (offset: 0x157b70) -> 0x2c5a8 fde=[ 1a2e8]\n+ 0xffffffffc9672ef8 (offset: 0x157c10) -> 0x2c5cc fde=[ 1a30c]\n+ 0xffffffffc9672f88 (offset: 0x157ca0) -> 0x2c5f0 fde=[ 1a330]\n+ 0xffffffffc9673028 (offset: 0x157d40) -> 0x2c614 fde=[ 1a354]\n+ 0xffffffffc96730b8 (offset: 0x157dd0) -> 0x2c638 fde=[ 1a378]\n+ 0xffffffffc9673158 (offset: 0x157e70) -> 0x2c65c fde=[ 1a39c]\n+ 0xffffffffc96731e8 (offset: 0x157f00) -> 0x2c680 fde=[ 1a3c0]\n+ 0xffffffffc9673288 (offset: 0x157fa0) -> 0x2c6a4 fde=[ 1a3e4]\n+ 0xffffffffc9673318 (offset: 0x158030) -> 0x2c6c8 fde=[ 1a408]\n+ 0xffffffffc96733b8 (offset: 0x1580d0) -> 0x2c6ec fde=[ 1a42c]\n+ 0xffffffffc9673448 (offset: 0x158160) -> 0x2c710 fde=[ 1a450]\n+ 0xffffffffc96734e8 (offset: 0x158200) -> 0x2c734 fde=[ 1a474]\n+ 0xffffffffc9673578 (offset: 0x158290) -> 0x2c758 fde=[ 1a498]\n+ 0xffffffffc9673a08 (offset: 0x158720) -> 0x2c77c fde=[ 1a4bc]\n+ 0xffffffffc9673a38 (offset: 0x158750) -> 0x2c290 fde=[ 19fd0]\n+ 0xffffffffc9673ab8 (offset: 0x1587d0) -> 0x2c794 fde=[ 1a4d4]\n+ 0xffffffffc9674c08 (offset: 0x159920) -> 0x2c314 fde=[ 1a054]\n+ 0xffffffffc9674c88 (offset: 0x1599a0) -> 0x2c970 fde=[ 1a6b0]\n+ 0xffffffffc9675dd8 (offset: 0x15aaf0) -> 0x2c398 fde=[ 1a0d8]\n+ 0xffffffffc9675e58 (offset: 0x15ab70) -> 0x2cb4c fde=[ 1a88c]\n+ 0xffffffffc9676fa8 (offset: 0x15bcc0) -> 0x2c41c fde=[ 1a15c]\n+ 0xffffffffc9677028 (offset: 0x15bd40) -> 0x2cd28 fde=[ 1aa68]\n+ 0xffffffffc9678178 (offset: 0x15ce90) -> 0x2c4a0 fde=[ 1a1e0]\n+ 0xffffffffc96781f8 (offset: 0x15cf10) -> 0x2cf04 fde=[ 1ac44]\n+ 0xffffffffc9679348 (offset: 0x15e060) -> 0x2c524 fde=[ 1a264]\n+ 0xffffffffc96793c8 (offset: 0x15e0e0) -> 0x2d0e0 fde=[ 1ae20]\n+ 0xffffffffc967a518 (offset: 0x15f230) -> 0x2d2fc fde=[ 1b03c]\n+ 0xffffffffc967a7e8 (offset: 0x15f500) -> 0x2d320 fde=[ 1b060]\n+ 0xffffffffc967aab8 (offset: 0x15f7d0) -> 0x2d380 fde=[ 1b0c0]\n+ 0xffffffffc967ad88 (offset: 0x15faa0) -> 0x2d3a4 fde=[ 1b0e4]\n+ 0xffffffffc967b058 (offset: 0x15fd70) -> 0x2d404 fde=[ 1b144]\n+ 0xffffffffc967b328 (offset: 0x160040) -> 0x2d428 fde=[ 1b168]\n+ 0xffffffffc967b5f8 (offset: 0x160310) -> 0x2d488 fde=[ 1b1c8]\n+ 0xffffffffc967b8c8 (offset: 0x1605e0) -> 0x2d4ac fde=[ 1b1ec]\n+ 0xffffffffc967bb98 (offset: 0x1608b0) -> 0x2d50c fde=[ 1b24c]\n+ 0xffffffffc967be68 (offset: 0x160b80) -> 0x2d530 fde=[ 1b270]\n+ 0xffffffffc967c138 (offset: 0x160e50) -> 0x2d590 fde=[ 1b2d0]\n+ 0xffffffffc967c408 (offset: 0x161120) -> 0x2d5b4 fde=[ 1b2f4]\n+ 0xffffffffc967c6d8 (offset: 0x1613f0) -> 0x2d5d8 fde=[ 1b318]\n+ 0xffffffffc967c778 (offset: 0x161490) -> 0x2d5fc fde=[ 1b33c]\n+ 0xffffffffc967c808 (offset: 0x161520) -> 0x2d620 fde=[ 1b360]\n+ 0xffffffffc967c8a8 (offset: 0x1615c0) -> 0x2d644 fde=[ 1b384]\n+ 0xffffffffc967c938 (offset: 0x161650) -> 0x2d668 fde=[ 1b3a8]\n+ 0xffffffffc967c9d8 (offset: 0x1616f0) -> 0x2d68c fde=[ 1b3cc]\n+ 0xffffffffc967ca68 (offset: 0x161780) -> 0x2d6b0 fde=[ 1b3f0]\n+ 0xffffffffc967cb08 (offset: 0x161820) -> 0x2d6d4 fde=[ 1b414]\n+ 0xffffffffc967cb98 (offset: 0x1618b0) -> 0x2d6f8 fde=[ 1b438]\n+ 0xffffffffc967cc38 (offset: 0x161950) -> 0x2d71c fde=[ 1b45c]\n+ 0xffffffffc967ccc8 (offset: 0x1619e0) -> 0x2d740 fde=[ 1b480]\n+ 0xffffffffc967cd68 (offset: 0x161a80) -> 0x2d764 fde=[ 1b4a4]\n+ 0xffffffffc967cdf8 (offset: 0x161b10) -> 0x2d788 fde=[ 1b4c8]\n+ 0xffffffffc967d288 (offset: 0x161fa0) -> 0x2d7ac fde=[ 1b4ec]\n+ 0xffffffffc967d2b8 (offset: 0x161fd0) -> 0x2d2c0 fde=[ 1b000]\n+ 0xffffffffc967d338 (offset: 0x162050) -> 0x2d7c4 fde=[ 1b504]\n+ 0xffffffffc967e478 (offset: 0x163190) -> 0x2d344 fde=[ 1b084]\n+ 0xffffffffc967e4f8 (offset: 0x163210) -> 0x2d9a0 fde=[ 1b6e0]\n+ 0xffffffffc967f638 (offset: 0x164350) -> 0x2d3c8 fde=[ 1b108]\n+ 0xffffffffc967f6b8 (offset: 0x1643d0) -> 0x2db7c fde=[ 1b8bc]\n+ 0xffffffffc96807f8 (offset: 0x165510) -> 0x2d44c fde=[ 1b18c]\n+ 0xffffffffc9680878 (offset: 0x165590) -> 0x2dd58 fde=[ 1ba98]\n+ 0xffffffffc96819b8 (offset: 0x1666d0) -> 0x2d4d0 fde=[ 1b210]\n+ 0xffffffffc9681a38 (offset: 0x166750) -> 0x2df34 fde=[ 1bc74]\n+ 0xffffffffc9682b78 (offset: 0x167890) -> 0x2d554 fde=[ 1b294]\n+ 0xffffffffc9682bf8 (offset: 0x167910) -> 0x2e110 fde=[ 1be50]\n+ 0xffffffffc9683d38 (offset: 0x168a50) -> 0x2e32c fde=[ 1c06c]\n+ 0xffffffffc9684008 (offset: 0x168d20) -> 0x2e350 fde=[ 1c090]\n+ 0xffffffffc96842d8 (offset: 0x168ff0) -> 0x2e3b0 fde=[ 1c0f0]\n+ 0xffffffffc96845a8 (offset: 0x1692c0) -> 0x2e3d4 fde=[ 1c114]\n+ 0xffffffffc9684878 (offset: 0x169590) -> 0x2e434 fde=[ 1c174]\n+ 0xffffffffc9684b48 (offset: 0x169860) -> 0x2e458 fde=[ 1c198]\n+ 0xffffffffc9684e18 (offset: 0x169b30) -> 0x2e4b8 fde=[ 1c1f8]\n+ 0xffffffffc96850e8 (offset: 0x169e00) -> 0x2e4dc fde=[ 1c21c]\n+ 0xffffffffc96853b8 (offset: 0x16a0d0) -> 0x2e53c fde=[ 1c27c]\n+ 0xffffffffc9685688 (offset: 0x16a3a0) -> 0x2e560 fde=[ 1c2a0]\n+ 0xffffffffc9685958 (offset: 0x16a670) -> 0x2e5c0 fde=[ 1c300]\n+ 0xffffffffc9685c28 (offset: 0x16a940) -> 0x2e5e4 fde=[ 1c324]\n+ 0xffffffffc9685ef8 (offset: 0x16ac10) -> 0x2e608 fde=[ 1c348]\n+ 0xffffffffc9685f98 (offset: 0x16acb0) -> 0x2e62c fde=[ 1c36c]\n+ 0xffffffffc9686028 (offset: 0x16ad40) -> 0x2e650 fde=[ 1c390]\n+ 0xffffffffc96860c8 (offset: 0x16ade0) -> 0x2e674 fde=[ 1c3b4]\n+ 0xffffffffc9686158 (offset: 0x16ae70) -> 0x2e698 fde=[ 1c3d8]\n+ 0xffffffffc96861f8 (offset: 0x16af10) -> 0x2e6bc fde=[ 1c3fc]\n+ 0xffffffffc9686288 (offset: 0x16afa0) -> 0x2e6e0 fde=[ 1c420]\n+ 0xffffffffc9686328 (offset: 0x16b040) -> 0x2e704 fde=[ 1c444]\n+ 0xffffffffc96863b8 (offset: 0x16b0d0) -> 0x2e728 fde=[ 1c468]\n+ 0xffffffffc9686458 (offset: 0x16b170) -> 0x2e74c fde=[ 1c48c]\n+ 0xffffffffc96864e8 (offset: 0x16b200) -> 0x2e770 fde=[ 1c4b0]\n+ 0xffffffffc9686588 (offset: 0x16b2a0) -> 0x2e794 fde=[ 1c4d4]\n+ 0xffffffffc9686618 (offset: 0x16b330) -> 0x2e7b8 fde=[ 1c4f8]\n+ 0xffffffffc9686aa8 (offset: 0x16b7c0) -> 0x2e7dc fde=[ 1c51c]\n+ 0xffffffffc9686ad8 (offset: 0x16b7f0) -> 0x2e2f0 fde=[ 1c030]\n+ 0xffffffffc9686b58 (offset: 0x16b870) -> 0x2e7f4 fde=[ 1c534]\n+ 0xffffffffc9687c98 (offset: 0x16c9b0) -> 0x2e374 fde=[ 1c0b4]\n+ 0xffffffffc9687d18 (offset: 0x16ca30) -> 0x2e9d0 fde=[ 1c710]\n+ 0xffffffffc9688e58 (offset: 0x16db70) -> 0x2e3f8 fde=[ 1c138]\n+ 0xffffffffc9688ed8 (offset: 0x16dbf0) -> 0x2ebac fde=[ 1c8ec]\n+ 0xffffffffc968a018 (offset: 0x16ed30) -> 0x2e47c fde=[ 1c1bc]\n+ 0xffffffffc968a098 (offset: 0x16edb0) -> 0x2ed88 fde=[ 1cac8]\n+ 0xffffffffc968b1d8 (offset: 0x16fef0) -> 0x2e500 fde=[ 1c240]\n+ 0xffffffffc968b258 (offset: 0x16ff70) -> 0x2ef64 fde=[ 1cca4]\n+ 0xffffffffc968c398 (offset: 0x1710b0) -> 0x2e584 fde=[ 1c2c4]\n+ 0xffffffffc968c418 (offset: 0x171130) -> 0x2f140 fde=[ 1ce80]\n+ 0xffffffffc968d558 (offset: 0x172270) -> 0x2f35c fde=[ 1d09c]\n+ 0xffffffffc968d828 (offset: 0x172540) -> 0x2f380 fde=[ 1d0c0]\n+ 0xffffffffc968daf8 (offset: 0x172810) -> 0x2f3e0 fde=[ 1d120]\n+ 0xffffffffc968ddc8 (offset: 0x172ae0) -> 0x2f404 fde=[ 1d144]\n+ 0xffffffffc968e098 (offset: 0x172db0) -> 0x2f464 fde=[ 1d1a4]\n+ 0xffffffffc968e368 (offset: 0x173080) -> 0x2f488 fde=[ 1d1c8]\n+ 0xffffffffc968e638 (offset: 0x173350) -> 0x2f4e8 fde=[ 1d228]\n+ 0xffffffffc968e908 (offset: 0x173620) -> 0x2f50c fde=[ 1d24c]\n+ 0xffffffffc968ebd8 (offset: 0x1738f0) -> 0x2f56c fde=[ 1d2ac]\n+ 0xffffffffc968eea8 (offset: 0x173bc0) -> 0x2f590 fde=[ 1d2d0]\n+ 0xffffffffc968f178 (offset: 0x173e90) -> 0x2f5f0 fde=[ 1d330]\n+ 0xffffffffc968f448 (offset: 0x174160) -> 0x2f614 fde=[ 1d354]\n+ 0xffffffffc968f718 (offset: 0x174430) -> 0x2f638 fde=[ 1d378]\n+ 0xffffffffc968f7b8 (offset: 0x1744d0) -> 0x2f65c fde=[ 1d39c]\n+ 0xffffffffc968f848 (offset: 0x174560) -> 0x2f680 fde=[ 1d3c0]\n+ 0xffffffffc968f8e8 (offset: 0x174600) -> 0x2f6a4 fde=[ 1d3e4]\n+ 0xffffffffc968f978 (offset: 0x174690) -> 0x2f6c8 fde=[ 1d408]\n+ 0xffffffffc968fa18 (offset: 0x174730) -> 0x2f6ec fde=[ 1d42c]\n+ 0xffffffffc968faa8 (offset: 0x1747c0) -> 0x2f710 fde=[ 1d450]\n+ 0xffffffffc968fb48 (offset: 0x174860) -> 0x2f734 fde=[ 1d474]\n+ 0xffffffffc968fbd8 (offset: 0x1748f0) -> 0x2f758 fde=[ 1d498]\n+ 0xffffffffc968fc78 (offset: 0x174990) -> 0x2f77c fde=[ 1d4bc]\n+ 0xffffffffc968fd08 (offset: 0x174a20) -> 0x2f7a0 fde=[ 1d4e0]\n+ 0xffffffffc968fda8 (offset: 0x174ac0) -> 0x2f7c4 fde=[ 1d504]\n+ 0xffffffffc968fe38 (offset: 0x174b50) -> 0x2f7e8 fde=[ 1d528]\n+ 0xffffffffc96902c8 (offset: 0x174fe0) -> 0x2f80c fde=[ 1d54c]\n+ 0xffffffffc96902f8 (offset: 0x175010) -> 0x2f320 fde=[ 1d060]\n+ 0xffffffffc9690378 (offset: 0x175090) -> 0x2f824 fde=[ 1d564]\n+ 0xffffffffc96914b8 (offset: 0x1761d0) -> 0x2f3a4 fde=[ 1d0e4]\n+ 0xffffffffc9691538 (offset: 0x176250) -> 0x2fa00 fde=[ 1d740]\n+ 0xffffffffc9692678 (offset: 0x177390) -> 0x2f428 fde=[ 1d168]\n+ 0xffffffffc96926f8 (offset: 0x177410) -> 0x2fbdc fde=[ 1d91c]\n+ 0xffffffffc9693838 (offset: 0x178550) -> 0x2f4ac fde=[ 1d1ec]\n+ 0xffffffffc96938b8 (offset: 0x1785d0) -> 0x2fdb8 fde=[ 1daf8]\n+ 0xffffffffc96949f8 (offset: 0x179710) -> 0x2f530 fde=[ 1d270]\n+ 0xffffffffc9694a78 (offset: 0x179790) -> 0x2ff94 fde=[ 1dcd4]\n+ 0xffffffffc9695bb8 (offset: 0x17a8d0) -> 0x2f5b4 fde=[ 1d2f4]\n+ 0xffffffffc9695c38 (offset: 0x17a950) -> 0x30170 fde=[ 1deb0]\n+ 0xffffffffc9696d78 (offset: 0x17ba90) -> 0x3038c fde=[ 1e0cc]\n+ 0xffffffffc9697048 (offset: 0x17bd60) -> 0x303b0 fde=[ 1e0f0]\n+ 0xffffffffc9697318 (offset: 0x17c030) -> 0x30410 fde=[ 1e150]\n+ 0xffffffffc96975e8 (offset: 0x17c300) -> 0x30434 fde=[ 1e174]\n+ 0xffffffffc96978b8 (offset: 0x17c5d0) -> 0x30494 fde=[ 1e1d4]\n+ 0xffffffffc9697b88 (offset: 0x17c8a0) -> 0x304b8 fde=[ 1e1f8]\n+ 0xffffffffc9697e58 (offset: 0x17cb70) -> 0x30518 fde=[ 1e258]\n+ 0xffffffffc9698128 (offset: 0x17ce40) -> 0x3053c fde=[ 1e27c]\n+ 0xffffffffc96983f8 (offset: 0x17d110) -> 0x3059c fde=[ 1e2dc]\n+ 0xffffffffc96986c8 (offset: 0x17d3e0) -> 0x305c0 fde=[ 1e300]\n+ 0xffffffffc9698998 (offset: 0x17d6b0) -> 0x30620 fde=[ 1e360]\n+ 0xffffffffc9698c68 (offset: 0x17d980) -> 0x30644 fde=[ 1e384]\n+ 0xffffffffc9698f38 (offset: 0x17dc50) -> 0x30668 fde=[ 1e3a8]\n+ 0xffffffffc9698fd8 (offset: 0x17dcf0) -> 0x3068c fde=[ 1e3cc]\n+ 0xffffffffc9699068 (offset: 0x17dd80) -> 0x306b0 fde=[ 1e3f0]\n+ 0xffffffffc9699108 (offset: 0x17de20) -> 0x306d4 fde=[ 1e414]\n+ 0xffffffffc9699198 (offset: 0x17deb0) -> 0x306f8 fde=[ 1e438]\n+ 0xffffffffc9699238 (offset: 0x17df50) -> 0x3071c fde=[ 1e45c]\n+ 0xffffffffc96992c8 (offset: 0x17dfe0) -> 0x30740 fde=[ 1e480]\n+ 0xffffffffc9699368 (offset: 0x17e080) -> 0x30764 fde=[ 1e4a4]\n+ 0xffffffffc96993f8 (offset: 0x17e110) -> 0x30788 fde=[ 1e4c8]\n+ 0xffffffffc9699498 (offset: 0x17e1b0) -> 0x307ac fde=[ 1e4ec]\n+ 0xffffffffc9699528 (offset: 0x17e240) -> 0x307d0 fde=[ 1e510]\n+ 0xffffffffc96995c8 (offset: 0x17e2e0) -> 0x307f4 fde=[ 1e534]\n+ 0xffffffffc9699658 (offset: 0x17e370) -> 0x30818 fde=[ 1e558]\n+ 0xffffffffc9699ae8 (offset: 0x17e800) -> 0x3083c fde=[ 1e57c]\n+ 0xffffffffc9699b18 (offset: 0x17e830) -> 0x30350 fde=[ 1e090]\n+ 0xffffffffc9699b98 (offset: 0x17e8b0) -> 0x30854 fde=[ 1e594]\n+ 0xffffffffc969ace8 (offset: 0x17fa00) -> 0x303d4 fde=[ 1e114]\n+ 0xffffffffc969ad68 (offset: 0x17fa80) -> 0x30a30 fde=[ 1e770]\n+ 0xffffffffc969beb8 (offset: 0x180bd0) -> 0x30458 fde=[ 1e198]\n+ 0xffffffffc969bf38 (offset: 0x180c50) -> 0x30c0c fde=[ 1e94c]\n+ 0xffffffffc969d088 (offset: 0x181da0) -> 0x304dc fde=[ 1e21c]\n+ 0xffffffffc969d108 (offset: 0x181e20) -> 0x30de8 fde=[ 1eb28]\n+ 0xffffffffc969e258 (offset: 0x182f70) -> 0x30560 fde=[ 1e2a0]\n+ 0xffffffffc969e2d8 (offset: 0x182ff0) -> 0x30fc4 fde=[ 1ed04]\n+ 0xffffffffc969f428 (offset: 0x184140) -> 0x305e4 fde=[ 1e324]\n+ 0xffffffffc969f4a8 (offset: 0x1841c0) -> 0x311a0 fde=[ 1eee0]\n+ 0xffffffffc96a05f8 (offset: 0x185310) -> 0x313bc fde=[ 1f0fc]\n+ 0xffffffffc96a08c8 (offset: 0x1855e0) -> 0x313e0 fde=[ 1f120]\n+ 0xffffffffc96a0b98 (offset: 0x1858b0) -> 0x31440 fde=[ 1f180]\n+ 0xffffffffc96a0e68 (offset: 0x185b80) -> 0x31464 fde=[ 1f1a4]\n+ 0xffffffffc96a1138 (offset: 0x185e50) -> 0x314c4 fde=[ 1f204]\n+ 0xffffffffc96a1408 (offset: 0x186120) -> 0x314e8 fde=[ 1f228]\n+ 0xffffffffc96a16d8 (offset: 0x1863f0) -> 0x31548 fde=[ 1f288]\n+ 0xffffffffc96a19a8 (offset: 0x1866c0) -> 0x3156c fde=[ 1f2ac]\n+ 0xffffffffc96a1c78 (offset: 0x186990) -> 0x315cc fde=[ 1f30c]\n+ 0xffffffffc96a1f48 (offset: 0x186c60) -> 0x315f0 fde=[ 1f330]\n+ 0xffffffffc96a2218 (offset: 0x186f30) -> 0x31650 fde=[ 1f390]\n+ 0xffffffffc96a24e8 (offset: 0x187200) -> 0x31674 fde=[ 1f3b4]\n+ 0xffffffffc96a27b8 (offset: 0x1874d0) -> 0x31698 fde=[ 1f3d8]\n+ 0xffffffffc96a2858 (offset: 0x187570) -> 0x316bc fde=[ 1f3fc]\n+ 0xffffffffc96a28e8 (offset: 0x187600) -> 0x316e0 fde=[ 1f420]\n+ 0xffffffffc96a2988 (offset: 0x1876a0) -> 0x31704 fde=[ 1f444]\n+ 0xffffffffc96a2a18 (offset: 0x187730) -> 0x31728 fde=[ 1f468]\n+ 0xffffffffc96a2ab8 (offset: 0x1877d0) -> 0x3174c fde=[ 1f48c]\n+ 0xffffffffc96a2b48 (offset: 0x187860) -> 0x31770 fde=[ 1f4b0]\n+ 0xffffffffc96a2be8 (offset: 0x187900) -> 0x31794 fde=[ 1f4d4]\n+ 0xffffffffc96a2c78 (offset: 0x187990) -> 0x317b8 fde=[ 1f4f8]\n+ 0xffffffffc96a2d18 (offset: 0x187a30) -> 0x317dc fde=[ 1f51c]\n+ 0xffffffffc96a2da8 (offset: 0x187ac0) -> 0x31800 fde=[ 1f540]\n+ 0xffffffffc96a2e48 (offset: 0x187b60) -> 0x31824 fde=[ 1f564]\n+ 0xffffffffc96a2ed8 (offset: 0x187bf0) -> 0x31848 fde=[ 1f588]\n+ 0xffffffffc96a3368 (offset: 0x188080) -> 0x3186c fde=[ 1f5ac]\n+ 0xffffffffc96a3398 (offset: 0x1880b0) -> 0x31380 fde=[ 1f0c0]\n+ 0xffffffffc96a3418 (offset: 0x188130) -> 0x31884 fde=[ 1f5c4]\n+ 0xffffffffc96a4568 (offset: 0x189280) -> 0x31404 fde=[ 1f144]\n+ 0xffffffffc96a45e8 (offset: 0x189300) -> 0x31a60 fde=[ 1f7a0]\n+ 0xffffffffc96a5738 (offset: 0x18a450) -> 0x31488 fde=[ 1f1c8]\n+ 0xffffffffc96a57b8 (offset: 0x18a4d0) -> 0x31c3c fde=[ 1f97c]\n+ 0xffffffffc96a6908 (offset: 0x18b620) -> 0x3150c fde=[ 1f24c]\n+ 0xffffffffc96a6988 (offset: 0x18b6a0) -> 0x31e18 fde=[ 1fb58]\n+ 0xffffffffc96a7ad8 (offset: 0x18c7f0) -> 0x31590 fde=[ 1f2d0]\n+ 0xffffffffc96a7b58 (offset: 0x18c870) -> 0x31ff4 fde=[ 1fd34]\n+ 0xffffffffc96a8ca8 (offset: 0x18d9c0) -> 0x31614 fde=[ 1f354]\n+ 0xffffffffc96a8d28 (offset: 0x18da40) -> 0x321d0 fde=[ 1ff10]\n+ 0xffffffffc96a9e78 (offset: 0x18eb90) -> 0x323b0 fde=[ 200f0]\n+ 0xffffffffc96aa038 (offset: 0x18ed50) -> 0x323d4 fde=[ 20114]\n+ 0xffffffffc96aa1f8 (offset: 0x18ef10) -> 0x323f8 fde=[ 20138]\n+ 0xffffffffc96aa318 (offset: 0x18f030) -> 0x3241c fde=[ 2015c]\n+ 0xffffffffc96aa438 (offset: 0x18f150) -> 0x32440 fde=[ 20180]\n+ 0xffffffffc96aa5f8 (offset: 0x18f310) -> 0x32464 fde=[ 201a4]\n+ 0xffffffffc96aa7b8 (offset: 0x18f4d0) -> 0x32488 fde=[ 201c8]\n+ 0xffffffffc96aa8d8 (offset: 0x18f5f0) -> 0x324ac fde=[ 201ec]\n+ 0xffffffffc96aa9f8 (offset: 0x18f710) -> 0x324d0 fde=[ 20210]\n+ 0xffffffffc96aabb8 (offset: 0x18f8d0) -> 0x324f4 fde=[ 20234]\n+ 0xffffffffc96aad78 (offset: 0x18fa90) -> 0x32518 fde=[ 20258]\n+ 0xffffffffc96aae98 (offset: 0x18fbb0) -> 0x3253c fde=[ 2027c]\n+ 0xffffffffc96aafb8 (offset: 0x18fcd0) -> 0x32560 fde=[ 202a0]\n+ 0xffffffffc96ab178 (offset: 0x18fe90) -> 0x32584 fde=[ 202c4]\n+ 0xffffffffc96ab338 (offset: 0x190050) -> 0x325a8 fde=[ 202e8]\n+ 0xffffffffc96ab458 (offset: 0x190170) -> 0x325cc fde=[ 2030c]\n+ 0xffffffffc96ab578 (offset: 0x190290) -> 0x325f0 fde=[ 20330]\n+ 0xffffffffc96ab738 (offset: 0x190450) -> 0x32614 fde=[ 20354]\n+ 0xffffffffc96ab8f8 (offset: 0x190610) -> 0x32638 fde=[ 20378]\n+ 0xffffffffc96aba18 (offset: 0x190730) -> 0x3265c fde=[ 2039c]\n+ 0xffffffffc96abb38 (offset: 0x190850) -> 0x32680 fde=[ 203c0]\n+ 0xffffffffc96abcf8 (offset: 0x190a10) -> 0x326a4 fde=[ 203e4]\n+ 0xffffffffc96abeb8 (offset: 0x190bd0) -> 0x326c8 fde=[ 20408]\n+ 0xffffffffc96abfd8 (offset: 0x190cf0) -> 0x326ec fde=[ 2042c]\n+ 0xffffffffc96ac0f8 (offset: 0x190e10) -> 0x32710 fde=[ 20450]\n+ 0xffffffffc96ac2b8 (offset: 0x190fd0) -> 0x32734 fde=[ 20474]\n+ 0xffffffffc96ac478 (offset: 0x191190) -> 0x32758 fde=[ 20498]\n+ 0xffffffffc96ac598 (offset: 0x1912b0) -> 0x3277c fde=[ 204bc]\n+ 0xffffffffc96ac6b8 (offset: 0x1913d0) -> 0x327a0 fde=[ 204e0]\n+ 0xffffffffc96ac878 (offset: 0x191590) -> 0x327c4 fde=[ 20504]\n+ 0xffffffffc96aca38 (offset: 0x191750) -> 0x327e8 fde=[ 20528]\n+ 0xffffffffc96acb58 (offset: 0x191870) -> 0x3280c fde=[ 2054c]\n+ 0xffffffffc96acc78 (offset: 0x191990) -> 0x32830 fde=[ 20570]\n+ 0xffffffffc96ace38 (offset: 0x191b50) -> 0x32854 fde=[ 20594]\n+ 0xffffffffc96acff8 (offset: 0x191d10) -> 0x32878 fde=[ 205b8]\n+ 0xffffffffc96ad118 (offset: 0x191e30) -> 0x3289c fde=[ 205dc]\n+ 0xffffffffc96ad238 (offset: 0x191f50) -> 0x328c0 fde=[ 20600]\n+ 0xffffffffc96ad3f8 (offset: 0x192110) -> 0x328e4 fde=[ 20624]\n+ 0xffffffffc96ad5b8 (offset: 0x1922d0) -> 0x32908 fde=[ 20648]\n+ 0xffffffffc96ad6d8 (offset: 0x1923f0) -> 0x3292c fde=[ 2066c]\n+ 0xffffffffc96ad7f8 (offset: 0x192510) -> 0x32950 fde=[ 20690]\n+ 0xffffffffc96ad9b8 (offset: 0x1926d0) -> 0x32974 fde=[ 206b4]\n+ 0xffffffffc96adb78 (offset: 0x192890) -> 0x32998 fde=[ 206d8]\n+ 0xffffffffc96adc98 (offset: 0x1929b0) -> 0x329bc fde=[ 206fc]\n+ 0xffffffffc96addb8 (offset: 0x192ad0) -> 0x329e0 fde=[ 20720]\n+ 0xffffffffc96adf78 (offset: 0x192c90) -> 0x32a04 fde=[ 20744]\n+ 0xffffffffc96ae138 (offset: 0x192e50) -> 0x32a28 fde=[ 20768]\n+ 0xffffffffc96ae258 (offset: 0x192f70) -> 0x32a4c fde=[ 2078c]\n+ 0xffffffffc96ae378 (offset: 0x193090) -> 0x32a70 fde=[ 207b0]\n+ 0xffffffffc96ae538 (offset: 0x193250) -> 0x32a94 fde=[ 207d4]\n+ 0xffffffffc96ae6f8 (offset: 0x193410) -> 0x32ab8 fde=[ 207f8]\n+ 0xffffffffc96ae818 (offset: 0x193530) -> 0x32adc fde=[ 2081c]\n+ 0xffffffffc96ae938 (offset: 0x193650) -> 0x32b00 fde=[ 20840]\n+ 0xffffffffc96aeaf8 (offset: 0x193810) -> 0x32b24 fde=[ 20864]\n+ 0xffffffffc96aecb8 (offset: 0x1939d0) -> 0x32b48 fde=[ 20888]\n+ 0xffffffffc96aedd8 (offset: 0x193af0) -> 0x32b6c fde=[ 208ac]\n+ 0xffffffffc96aeef8 (offset: 0x193c10) -> 0x32b90 fde=[ 208d0]\n+ 0xffffffffc96af0b8 (offset: 0x193dd0) -> 0x32bb4 fde=[ 208f4]\n+ 0xffffffffc96af278 (offset: 0x193f90) -> 0x32bd8 fde=[ 20918]\n+ 0xffffffffc96af398 (offset: 0x1940b0) -> 0x32bfc fde=[ 2093c]\n+ 0xffffffffc96af4b8 (offset: 0x1941d0) -> 0x32c20 fde=[ 20960]\n+ 0xffffffffc96af678 (offset: 0x194390) -> 0x32c44 fde=[ 20984]\n+ 0xffffffffc96af838 (offset: 0x194550) -> 0x32c68 fde=[ 209a8]\n+ 0xffffffffc96af958 (offset: 0x194670) -> 0x32c8c fde=[ 209cc]\n+ 0xffffffffc96afa78 (offset: 0x194790) -> 0x32cb0 fde=[ 209f0]\n+ 0xffffffffc96b0748 (offset: 0x195460) -> 0x32cd4 fde=[ 20a14]\n+ 0xffffffffc96b0778 (offset: 0x195490) -> 0x32cec fde=[ 20a2c]\n+ 0xffffffffc96bab68 (offset: 0x19f880) -> 0x34590 fde=[ 222d0]\n+ 0xffffffffc96bad28 (offset: 0x19fa40) -> 0x345b4 fde=[ 222f4]\n+ 0xffffffffc96baee8 (offset: 0x19fc00) -> 0x345d8 fde=[ 22318]\n+ 0xffffffffc96bb008 (offset: 0x19fd20) -> 0x345fc fde=[ 2233c]\n+ 0xffffffffc96bb128 (offset: 0x19fe40) -> 0x34620 fde=[ 22360]\n+ 0xffffffffc96bb2e8 (offset: 0x1a0000) -> 0x34644 fde=[ 22384]\n+ 0xffffffffc96bb4a8 (offset: 0x1a01c0) -> 0x34668 fde=[ 223a8]\n+ 0xffffffffc96bb5c8 (offset: 0x1a02e0) -> 0x3468c fde=[ 223cc]\n+ 0xffffffffc96bb6e8 (offset: 0x1a0400) -> 0x346b0 fde=[ 223f0]\n+ 0xffffffffc96bb8a8 (offset: 0x1a05c0) -> 0x346d4 fde=[ 22414]\n+ 0xffffffffc96bba68 (offset: 0x1a0780) -> 0x346f8 fde=[ 22438]\n+ 0xffffffffc96bbb88 (offset: 0x1a08a0) -> 0x3471c fde=[ 2245c]\n+ 0xffffffffc96bbca8 (offset: 0x1a09c0) -> 0x34740 fde=[ 22480]\n+ 0xffffffffc96bbe68 (offset: 0x1a0b80) -> 0x34764 fde=[ 224a4]\n+ 0xffffffffc96bc028 (offset: 0x1a0d40) -> 0x34788 fde=[ 224c8]\n+ 0xffffffffc96bc148 (offset: 0x1a0e60) -> 0x347ac fde=[ 224ec]\n+ 0xffffffffc96bc268 (offset: 0x1a0f80) -> 0x347d0 fde=[ 22510]\n+ 0xffffffffc96bc428 (offset: 0x1a1140) -> 0x347f4 fde=[ 22534]\n+ 0xffffffffc96bc5e8 (offset: 0x1a1300) -> 0x34818 fde=[ 22558]\n+ 0xffffffffc96bc708 (offset: 0x1a1420) -> 0x3483c fde=[ 2257c]\n+ 0xffffffffc96bc828 (offset: 0x1a1540) -> 0x34860 fde=[ 225a0]\n+ 0xffffffffc96bc9e8 (offset: 0x1a1700) -> 0x34884 fde=[ 225c4]\n+ 0xffffffffc96bcba8 (offset: 0x1a18c0) -> 0x348a8 fde=[ 225e8]\n+ 0xffffffffc96bccc8 (offset: 0x1a19e0) -> 0x348cc fde=[ 2260c]\n+ 0xffffffffc96bcde8 (offset: 0x1a1b00) -> 0x348f0 fde=[ 22630]\n+ 0xffffffffc96bcfa8 (offset: 0x1a1cc0) -> 0x34914 fde=[ 22654]\n+ 0xffffffffc96bd168 (offset: 0x1a1e80) -> 0x34938 fde=[ 22678]\n+ 0xffffffffc96bd288 (offset: 0x1a1fa0) -> 0x3495c fde=[ 2269c]\n+ 0xffffffffc96bd3a8 (offset: 0x1a20c0) -> 0x34980 fde=[ 226c0]\n+ 0xffffffffc96bd568 (offset: 0x1a2280) -> 0x349a4 fde=[ 226e4]\n+ 0xffffffffc96bd728 (offset: 0x1a2440) -> 0x349c8 fde=[ 22708]\n+ 0xffffffffc96bd848 (offset: 0x1a2560) -> 0x349ec fde=[ 2272c]\n+ 0xffffffffc96bd968 (offset: 0x1a2680) -> 0x34a10 fde=[ 22750]\n+ 0xffffffffc96bdb28 (offset: 0x1a2840) -> 0x34a34 fde=[ 22774]\n+ 0xffffffffc96bdce8 (offset: 0x1a2a00) -> 0x34a58 fde=[ 22798]\n+ 0xffffffffc96bde08 (offset: 0x1a2b20) -> 0x34a7c fde=[ 227bc]\n+ 0xffffffffc96bdf28 (offset: 0x1a2c40) -> 0x34aa0 fde=[ 227e0]\n+ 0xffffffffc96be0e8 (offset: 0x1a2e00) -> 0x34ac4 fde=[ 22804]\n+ 0xffffffffc96be2a8 (offset: 0x1a2fc0) -> 0x34ae8 fde=[ 22828]\n+ 0xffffffffc96be3c8 (offset: 0x1a30e0) -> 0x34b0c fde=[ 2284c]\n+ 0xffffffffc96be4e8 (offset: 0x1a3200) -> 0x34b30 fde=[ 22870]\n+ 0xffffffffc96be6a8 (offset: 0x1a33c0) -> 0x34b54 fde=[ 22894]\n+ 0xffffffffc96be868 (offset: 0x1a3580) -> 0x34b78 fde=[ 228b8]\n+ 0xffffffffc96be988 (offset: 0x1a36a0) -> 0x34b9c fde=[ 228dc]\n+ 0xffffffffc96beaa8 (offset: 0x1a37c0) -> 0x34bc0 fde=[ 22900]\n+ 0xffffffffc96bec68 (offset: 0x1a3980) -> 0x34be4 fde=[ 22924]\n+ 0xffffffffc96bee28 (offset: 0x1a3b40) -> 0x34c08 fde=[ 22948]\n+ 0xffffffffc96bef48 (offset: 0x1a3c60) -> 0x34c2c fde=[ 2296c]\n+ 0xffffffffc96bf068 (offset: 0x1a3d80) -> 0x34c50 fde=[ 22990]\n+ 0xffffffffc96bf228 (offset: 0x1a3f40) -> 0x34c74 fde=[ 229b4]\n+ 0xffffffffc96bf3e8 (offset: 0x1a4100) -> 0x34c98 fde=[ 229d8]\n+ 0xffffffffc96bf508 (offset: 0x1a4220) -> 0x34cbc fde=[ 229fc]\n+ 0xffffffffc96bf628 (offset: 0x1a4340) -> 0x34ce0 fde=[ 22a20]\n+ 0xffffffffc96bf7e8 (offset: 0x1a4500) -> 0x34d04 fde=[ 22a44]\n+ 0xffffffffc96bf9a8 (offset: 0x1a46c0) -> 0x34d28 fde=[ 22a68]\n+ 0xffffffffc96bfac8 (offset: 0x1a47e0) -> 0x34d4c fde=[ 22a8c]\n+ 0xffffffffc96bfbe8 (offset: 0x1a4900) -> 0x34d70 fde=[ 22ab0]\n+ 0xffffffffc96bfda8 (offset: 0x1a4ac0) -> 0x34d94 fde=[ 22ad4]\n+ 0xffffffffc96bff68 (offset: 0x1a4c80) -> 0x34db8 fde=[ 22af8]\n+ 0xffffffffc96c0088 (offset: 0x1a4da0) -> 0x34ddc fde=[ 22b1c]\n+ 0xffffffffc96c01a8 (offset: 0x1a4ec0) -> 0x34e00 fde=[ 22b40]\n+ 0xffffffffc96c0368 (offset: 0x1a5080) -> 0x34e24 fde=[ 22b64]\n+ 0xffffffffc96c0528 (offset: 0x1a5240) -> 0x34e48 fde=[ 22b88]\n+ 0xffffffffc96c0648 (offset: 0x1a5360) -> 0x34e6c fde=[ 22bac]\n+ 0xffffffffc96c0768 (offset: 0x1a5480) -> 0x34e90 fde=[ 22bd0]\n+ 0xffffffffc96c1438 (offset: 0x1a6150) -> 0x34eb4 fde=[ 22bf4]\n+ 0xffffffffc96c1468 (offset: 0x1a6180) -> 0x34ecc fde=[ 22c0c]\n+ 0xffffffffc96cb858 (offset: 0x1b0570) -> 0x36770 fde=[ 244b0]\n+ 0xffffffffc96cba18 (offset: 0x1b0730) -> 0x36794 fde=[ 244d4]\n+ 0xffffffffc96cbbd8 (offset: 0x1b08f0) -> 0x367b8 fde=[ 244f8]\n+ 0xffffffffc96cbcf8 (offset: 0x1b0a10) -> 0x367dc fde=[ 2451c]\n+ 0xffffffffc96cbe18 (offset: 0x1b0b30) -> 0x36800 fde=[ 24540]\n+ 0xffffffffc96cbfd8 (offset: 0x1b0cf0) -> 0x36824 fde=[ 24564]\n+ 0xffffffffc96cc198 (offset: 0x1b0eb0) -> 0x36848 fde=[ 24588]\n+ 0xffffffffc96cc2b8 (offset: 0x1b0fd0) -> 0x3686c fde=[ 245ac]\n+ 0xffffffffc96cc3d8 (offset: 0x1b10f0) -> 0x36890 fde=[ 245d0]\n+ 0xffffffffc96cc598 (offset: 0x1b12b0) -> 0x368b4 fde=[ 245f4]\n+ 0xffffffffc96cc758 (offset: 0x1b1470) -> 0x368d8 fde=[ 24618]\n+ 0xffffffffc96cc878 (offset: 0x1b1590) -> 0x368fc fde=[ 2463c]\n+ 0xffffffffc96cc998 (offset: 0x1b16b0) -> 0x36920 fde=[ 24660]\n+ 0xffffffffc96ccb58 (offset: 0x1b1870) -> 0x36944 fde=[ 24684]\n+ 0xffffffffc96ccd18 (offset: 0x1b1a30) -> 0x36968 fde=[ 246a8]\n+ 0xffffffffc96cce38 (offset: 0x1b1b50) -> 0x3698c fde=[ 246cc]\n+ 0xffffffffc96ccf58 (offset: 0x1b1c70) -> 0x369b0 fde=[ 246f0]\n+ 0xffffffffc96cd118 (offset: 0x1b1e30) -> 0x369d4 fde=[ 24714]\n+ 0xffffffffc96cd2d8 (offset: 0x1b1ff0) -> 0x369f8 fde=[ 24738]\n+ 0xffffffffc96cd3f8 (offset: 0x1b2110) -> 0x36a1c fde=[ 2475c]\n+ 0xffffffffc96cd518 (offset: 0x1b2230) -> 0x36a40 fde=[ 24780]\n+ 0xffffffffc96cd6d8 (offset: 0x1b23f0) -> 0x36a64 fde=[ 247a4]\n+ 0xffffffffc96cd898 (offset: 0x1b25b0) -> 0x36a88 fde=[ 247c8]\n+ 0xffffffffc96cd9b8 (offset: 0x1b26d0) -> 0x36aac fde=[ 247ec]\n+ 0xffffffffc96cdad8 (offset: 0x1b27f0) -> 0x36ad0 fde=[ 24810]\n+ 0xffffffffc96cdc98 (offset: 0x1b29b0) -> 0x36af4 fde=[ 24834]\n+ 0xffffffffc96cde58 (offset: 0x1b2b70) -> 0x36b18 fde=[ 24858]\n+ 0xffffffffc96cdf78 (offset: 0x1b2c90) -> 0x36b3c fde=[ 2487c]\n+ 0xffffffffc96ce098 (offset: 0x1b2db0) -> 0x36b60 fde=[ 248a0]\n+ 0xffffffffc96ce258 (offset: 0x1b2f70) -> 0x36b84 fde=[ 248c4]\n+ 0xffffffffc96ce418 (offset: 0x1b3130) -> 0x36ba8 fde=[ 248e8]\n+ 0xffffffffc96ce538 (offset: 0x1b3250) -> 0x36bcc fde=[ 2490c]\n+ 0xffffffffc96ce658 (offset: 0x1b3370) -> 0x36bf0 fde=[ 24930]\n+ 0xffffffffc96ce818 (offset: 0x1b3530) -> 0x36c14 fde=[ 24954]\n+ 0xffffffffc96ce9d8 (offset: 0x1b36f0) -> 0x36c38 fde=[ 24978]\n+ 0xffffffffc96ceaf8 (offset: 0x1b3810) -> 0x36c5c fde=[ 2499c]\n+ 0xffffffffc96cec18 (offset: 0x1b3930) -> 0x36c80 fde=[ 249c0]\n+ 0xffffffffc96cedd8 (offset: 0x1b3af0) -> 0x36ca4 fde=[ 249e4]\n+ 0xffffffffc96cef98 (offset: 0x1b3cb0) -> 0x36cc8 fde=[ 24a08]\n+ 0xffffffffc96cf0b8 (offset: 0x1b3dd0) -> 0x36cec fde=[ 24a2c]\n+ 0xffffffffc96cf1d8 (offset: 0x1b3ef0) -> 0x36d10 fde=[ 24a50]\n+ 0xffffffffc96cf398 (offset: 0x1b40b0) -> 0x36d34 fde=[ 24a74]\n+ 0xffffffffc96cf558 (offset: 0x1b4270) -> 0x36d58 fde=[ 24a98]\n+ 0xffffffffc96cf678 (offset: 0x1b4390) -> 0x36d7c fde=[ 24abc]\n+ 0xffffffffc96cf798 (offset: 0x1b44b0) -> 0x36da0 fde=[ 24ae0]\n+ 0xffffffffc96cf958 (offset: 0x1b4670) -> 0x36dc4 fde=[ 24b04]\n+ 0xffffffffc96cfb18 (offset: 0x1b4830) -> 0x36de8 fde=[ 24b28]\n+ 0xffffffffc96cfc38 (offset: 0x1b4950) -> 0x36e0c fde=[ 24b4c]\n+ 0xffffffffc96cfd58 (offset: 0x1b4a70) -> 0x36e30 fde=[ 24b70]\n+ 0xffffffffc96cff18 (offset: 0x1b4c30) -> 0x36e54 fde=[ 24b94]\n+ 0xffffffffc96d00d8 (offset: 0x1b4df0) -> 0x36e78 fde=[ 24bb8]\n+ 0xffffffffc96d01f8 (offset: 0x1b4f10) -> 0x36e9c fde=[ 24bdc]\n+ 0xffffffffc96d0318 (offset: 0x1b5030) -> 0x36ec0 fde=[ 24c00]\n+ 0xffffffffc96d04d8 (offset: 0x1b51f0) -> 0x36ee4 fde=[ 24c24]\n+ 0xffffffffc96d0698 (offset: 0x1b53b0) -> 0x36f08 fde=[ 24c48]\n+ 0xffffffffc96d07b8 (offset: 0x1b54d0) -> 0x36f2c fde=[ 24c6c]\n+ 0xffffffffc96d08d8 (offset: 0x1b55f0) -> 0x36f50 fde=[ 24c90]\n+ 0xffffffffc96d0a98 (offset: 0x1b57b0) -> 0x36f74 fde=[ 24cb4]\n+ 0xffffffffc96d0c58 (offset: 0x1b5970) -> 0x36f98 fde=[ 24cd8]\n+ 0xffffffffc96d0d78 (offset: 0x1b5a90) -> 0x36fbc fde=[ 24cfc]\n+ 0xffffffffc96d0e98 (offset: 0x1b5bb0) -> 0x36fe0 fde=[ 24d20]\n+ 0xffffffffc96d1058 (offset: 0x1b5d70) -> 0x37004 fde=[ 24d44]\n+ 0xffffffffc96d1218 (offset: 0x1b5f30) -> 0x37028 fde=[ 24d68]\n+ 0xffffffffc96d1338 (offset: 0x1b6050) -> 0x3704c fde=[ 24d8c]\n+ 0xffffffffc96d1458 (offset: 0x1b6170) -> 0x37070 fde=[ 24db0]\n+ 0xffffffffc96d2128 (offset: 0x1b6e40) -> 0x37094 fde=[ 24dd4]\n+ 0xffffffffc96d2158 (offset: 0x1b6e70) -> 0x370ac fde=[ 24dec]\n+ 0xffffffffc96dc548 (offset: 0x1c1260) -> 0x38950 fde=[ 26690]\n+ 0xffffffffc96dc708 (offset: 0x1c1420) -> 0x38974 fde=[ 266b4]\n+ 0xffffffffc96dc8c8 (offset: 0x1c15e0) -> 0x38998 fde=[ 266d8]\n+ 0xffffffffc96dc9e8 (offset: 0x1c1700) -> 0x389bc fde=[ 266fc]\n+ 0xffffffffc96dcb08 (offset: 0x1c1820) -> 0x389e0 fde=[ 26720]\n+ 0xffffffffc96dccc8 (offset: 0x1c19e0) -> 0x38a04 fde=[ 26744]\n+ 0xffffffffc96dce88 (offset: 0x1c1ba0) -> 0x38a28 fde=[ 26768]\n+ 0xffffffffc96dcfa8 (offset: 0x1c1cc0) -> 0x38a4c fde=[ 2678c]\n+ 0xffffffffc96dd0c8 (offset: 0x1c1de0) -> 0x38a70 fde=[ 267b0]\n+ 0xffffffffc96dd288 (offset: 0x1c1fa0) -> 0x38a94 fde=[ 267d4]\n+ 0xffffffffc96dd448 (offset: 0x1c2160) -> 0x38ab8 fde=[ 267f8]\n+ 0xffffffffc96dd568 (offset: 0x1c2280) -> 0x38adc fde=[ 2681c]\n+ 0xffffffffc96dd688 (offset: 0x1c23a0) -> 0x38b00 fde=[ 26840]\n+ 0xffffffffc96dd848 (offset: 0x1c2560) -> 0x38b24 fde=[ 26864]\n+ 0xffffffffc96dda08 (offset: 0x1c2720) -> 0x38b48 fde=[ 26888]\n+ 0xffffffffc96ddb28 (offset: 0x1c2840) -> 0x38b6c fde=[ 268ac]\n+ 0xffffffffc96ddc48 (offset: 0x1c2960) -> 0x38b90 fde=[ 268d0]\n+ 0xffffffffc96dde08 (offset: 0x1c2b20) -> 0x38bb4 fde=[ 268f4]\n+ 0xffffffffc96ddfc8 (offset: 0x1c2ce0) -> 0x38bd8 fde=[ 26918]\n+ 0xffffffffc96de0e8 (offset: 0x1c2e00) -> 0x38bfc fde=[ 2693c]\n+ 0xffffffffc96de208 (offset: 0x1c2f20) -> 0x38c20 fde=[ 26960]\n+ 0xffffffffc96de3c8 (offset: 0x1c30e0) -> 0x38c44 fde=[ 26984]\n+ 0xffffffffc96de588 (offset: 0x1c32a0) -> 0x38c68 fde=[ 269a8]\n+ 0xffffffffc96de6a8 (offset: 0x1c33c0) -> 0x38c8c fde=[ 269cc]\n+ 0xffffffffc96de7c8 (offset: 0x1c34e0) -> 0x38cb0 fde=[ 269f0]\n+ 0xffffffffc96de988 (offset: 0x1c36a0) -> 0x38cd4 fde=[ 26a14]\n+ 0xffffffffc96deb48 (offset: 0x1c3860) -> 0x38cf8 fde=[ 26a38]\n+ 0xffffffffc96dec68 (offset: 0x1c3980) -> 0x38d1c fde=[ 26a5c]\n+ 0xffffffffc96ded88 (offset: 0x1c3aa0) -> 0x38d40 fde=[ 26a80]\n+ 0xffffffffc96def48 (offset: 0x1c3c60) -> 0x38d64 fde=[ 26aa4]\n+ 0xffffffffc96df108 (offset: 0x1c3e20) -> 0x38d88 fde=[ 26ac8]\n+ 0xffffffffc96df228 (offset: 0x1c3f40) -> 0x38dac fde=[ 26aec]\n+ 0xffffffffc96df348 (offset: 0x1c4060) -> 0x38dd0 fde=[ 26b10]\n+ 0xffffffffc96df508 (offset: 0x1c4220) -> 0x38df4 fde=[ 26b34]\n+ 0xffffffffc96df6c8 (offset: 0x1c43e0) -> 0x38e18 fde=[ 26b58]\n+ 0xffffffffc96df7e8 (offset: 0x1c4500) -> 0x38e3c fde=[ 26b7c]\n+ 0xffffffffc96df908 (offset: 0x1c4620) -> 0x38e60 fde=[ 26ba0]\n+ 0xffffffffc96dfac8 (offset: 0x1c47e0) -> 0x38e84 fde=[ 26bc4]\n+ 0xffffffffc96dfc88 (offset: 0x1c49a0) -> 0x38ea8 fde=[ 26be8]\n+ 0xffffffffc96dfda8 (offset: 0x1c4ac0) -> 0x38ecc fde=[ 26c0c]\n+ 0xffffffffc96dfec8 (offset: 0x1c4be0) -> 0x38ef0 fde=[ 26c30]\n+ 0xffffffffc96e0088 (offset: 0x1c4da0) -> 0x38f14 fde=[ 26c54]\n+ 0xffffffffc96e0248 (offset: 0x1c4f60) -> 0x38f38 fde=[ 26c78]\n+ 0xffffffffc96e0368 (offset: 0x1c5080) -> 0x38f5c fde=[ 26c9c]\n+ 0xffffffffc96e0488 (offset: 0x1c51a0) -> 0x38f80 fde=[ 26cc0]\n+ 0xffffffffc96e0648 (offset: 0x1c5360) -> 0x38fa4 fde=[ 26ce4]\n+ 0xffffffffc96e0808 (offset: 0x1c5520) -> 0x38fc8 fde=[ 26d08]\n+ 0xffffffffc96e0928 (offset: 0x1c5640) -> 0x38fec fde=[ 26d2c]\n+ 0xffffffffc96e0a48 (offset: 0x1c5760) -> 0x39010 fde=[ 26d50]\n+ 0xffffffffc96e0c08 (offset: 0x1c5920) -> 0x39034 fde=[ 26d74]\n+ 0xffffffffc96e0dc8 (offset: 0x1c5ae0) -> 0x39058 fde=[ 26d98]\n+ 0xffffffffc96e0ee8 (offset: 0x1c5c00) -> 0x3907c fde=[ 26dbc]\n+ 0xffffffffc96e1008 (offset: 0x1c5d20) -> 0x390a0 fde=[ 26de0]\n+ 0xffffffffc96e11c8 (offset: 0x1c5ee0) -> 0x390c4 fde=[ 26e04]\n+ 0xffffffffc96e1388 (offset: 0x1c60a0) -> 0x390e8 fde=[ 26e28]\n+ 0xffffffffc96e14a8 (offset: 0x1c61c0) -> 0x3910c fde=[ 26e4c]\n+ 0xffffffffc96e15c8 (offset: 0x1c62e0) -> 0x39130 fde=[ 26e70]\n+ 0xffffffffc96e1788 (offset: 0x1c64a0) -> 0x39154 fde=[ 26e94]\n+ 0xffffffffc96e1948 (offset: 0x1c6660) -> 0x39178 fde=[ 26eb8]\n+ 0xffffffffc96e1a68 (offset: 0x1c6780) -> 0x3919c fde=[ 26edc]\n+ 0xffffffffc96e1b88 (offset: 0x1c68a0) -> 0x391c0 fde=[ 26f00]\n+ 0xffffffffc96e1d48 (offset: 0x1c6a60) -> 0x391e4 fde=[ 26f24]\n+ 0xffffffffc96e1f08 (offset: 0x1c6c20) -> 0x39208 fde=[ 26f48]\n+ 0xffffffffc96e2028 (offset: 0x1c6d40) -> 0x3922c fde=[ 26f6c]\n+ 0xffffffffc96e2148 (offset: 0x1c6e60) -> 0x39250 fde=[ 26f90]\n+ 0xffffffffc96e2e18 (offset: 0x1c7b30) -> 0x39274 fde=[ 26fb4]\n+ 0xffffffffc96e2e48 (offset: 0x1c7b60) -> 0x3928c fde=[ 26fcc]\n+ 0xffffffffc96ed238 (offset: 0x1d1f50) -> 0x3ab30 fde=[ 28870]\n+ 0xffffffffc96ed3f8 (offset: 0x1d2110) -> 0x3ab54 fde=[ 28894]\n+ 0xffffffffc96ed5b8 (offset: 0x1d22d0) -> 0x3ab78 fde=[ 288b8]\n+ 0xffffffffc96ed6d8 (offset: 0x1d23f0) -> 0x3ab9c fde=[ 288dc]\n+ 0xffffffffc96ed7f8 (offset: 0x1d2510) -> 0x3abc0 fde=[ 28900]\n+ 0xffffffffc96ed9b8 (offset: 0x1d26d0) -> 0x3abe4 fde=[ 28924]\n+ 0xffffffffc96edb78 (offset: 0x1d2890) -> 0x3ac08 fde=[ 28948]\n+ 0xffffffffc96edc98 (offset: 0x1d29b0) -> 0x3ac2c fde=[ 2896c]\n+ 0xffffffffc96eddb8 (offset: 0x1d2ad0) -> 0x3ac50 fde=[ 28990]\n+ 0xffffffffc96edf78 (offset: 0x1d2c90) -> 0x3ac74 fde=[ 289b4]\n+ 0xffffffffc96ee138 (offset: 0x1d2e50) -> 0x3ac98 fde=[ 289d8]\n+ 0xffffffffc96ee258 (offset: 0x1d2f70) -> 0x3acbc fde=[ 289fc]\n+ 0xffffffffc96ee378 (offset: 0x1d3090) -> 0x3ace0 fde=[ 28a20]\n+ 0xffffffffc96ee538 (offset: 0x1d3250) -> 0x3ad04 fde=[ 28a44]\n+ 0xffffffffc96ee6f8 (offset: 0x1d3410) -> 0x3ad28 fde=[ 28a68]\n+ 0xffffffffc96ee818 (offset: 0x1d3530) -> 0x3ad4c fde=[ 28a8c]\n+ 0xffffffffc96ee938 (offset: 0x1d3650) -> 0x3ad70 fde=[ 28ab0]\n+ 0xffffffffc96eeaf8 (offset: 0x1d3810) -> 0x3ad94 fde=[ 28ad4]\n+ 0xffffffffc96eecb8 (offset: 0x1d39d0) -> 0x3adb8 fde=[ 28af8]\n+ 0xffffffffc96eedd8 (offset: 0x1d3af0) -> 0x3addc fde=[ 28b1c]\n+ 0xffffffffc96eeef8 (offset: 0x1d3c10) -> 0x3ae00 fde=[ 28b40]\n+ 0xffffffffc96ef0b8 (offset: 0x1d3dd0) -> 0x3ae24 fde=[ 28b64]\n+ 0xffffffffc96ef278 (offset: 0x1d3f90) -> 0x3ae48 fde=[ 28b88]\n+ 0xffffffffc96ef398 (offset: 0x1d40b0) -> 0x3ae6c fde=[ 28bac]\n+ 0xffffffffc96ef4b8 (offset: 0x1d41d0) -> 0x3ae90 fde=[ 28bd0]\n+ 0xffffffffc96ef678 (offset: 0x1d4390) -> 0x3aeb4 fde=[ 28bf4]\n+ 0xffffffffc96ef838 (offset: 0x1d4550) -> 0x3aed8 fde=[ 28c18]\n+ 0xffffffffc96ef958 (offset: 0x1d4670) -> 0x3aefc fde=[ 28c3c]\n+ 0xffffffffc96efa78 (offset: 0x1d4790) -> 0x3af20 fde=[ 28c60]\n+ 0xffffffffc96efc38 (offset: 0x1d4950) -> 0x3af44 fde=[ 28c84]\n+ 0xffffffffc96efdf8 (offset: 0x1d4b10) -> 0x3af68 fde=[ 28ca8]\n+ 0xffffffffc96eff18 (offset: 0x1d4c30) -> 0x3af8c fde=[ 28ccc]\n+ 0xffffffffc96f0038 (offset: 0x1d4d50) -> 0x3afb0 fde=[ 28cf0]\n+ 0xffffffffc96f01f8 (offset: 0x1d4f10) -> 0x3afd4 fde=[ 28d14]\n+ 0xffffffffc96f03b8 (offset: 0x1d50d0) -> 0x3aff8 fde=[ 28d38]\n+ 0xffffffffc96f04d8 (offset: 0x1d51f0) -> 0x3b01c fde=[ 28d5c]\n+ 0xffffffffc96f05f8 (offset: 0x1d5310) -> 0x3b040 fde=[ 28d80]\n+ 0xffffffffc96f07b8 (offset: 0x1d54d0) -> 0x3b064 fde=[ 28da4]\n+ 0xffffffffc96f0978 (offset: 0x1d5690) -> 0x3b088 fde=[ 28dc8]\n+ 0xffffffffc96f0a98 (offset: 0x1d57b0) -> 0x3b0ac fde=[ 28dec]\n+ 0xffffffffc96f0bb8 (offset: 0x1d58d0) -> 0x3b0d0 fde=[ 28e10]\n+ 0xffffffffc96f0d78 (offset: 0x1d5a90) -> 0x3b0f4 fde=[ 28e34]\n+ 0xffffffffc96f0f38 (offset: 0x1d5c50) -> 0x3b118 fde=[ 28e58]\n+ 0xffffffffc96f1058 (offset: 0x1d5d70) -> 0x3b13c fde=[ 28e7c]\n+ 0xffffffffc96f1178 (offset: 0x1d5e90) -> 0x3b160 fde=[ 28ea0]\n+ 0xffffffffc96f1338 (offset: 0x1d6050) -> 0x3b184 fde=[ 28ec4]\n+ 0xffffffffc96f14f8 (offset: 0x1d6210) -> 0x3b1a8 fde=[ 28ee8]\n+ 0xffffffffc96f1618 (offset: 0x1d6330) -> 0x3b1cc fde=[ 28f0c]\n+ 0xffffffffc96f1738 (offset: 0x1d6450) -> 0x3b1f0 fde=[ 28f30]\n+ 0xffffffffc96f18f8 (offset: 0x1d6610) -> 0x3b214 fde=[ 28f54]\n+ 0xffffffffc96f1ab8 (offset: 0x1d67d0) -> 0x3b238 fde=[ 28f78]\n+ 0xffffffffc96f1bd8 (offset: 0x1d68f0) -> 0x3b25c fde=[ 28f9c]\n+ 0xffffffffc96f1cf8 (offset: 0x1d6a10) -> 0x3b280 fde=[ 28fc0]\n+ 0xffffffffc96f1eb8 (offset: 0x1d6bd0) -> 0x3b2a4 fde=[ 28fe4]\n+ 0xffffffffc96f2078 (offset: 0x1d6d90) -> 0x3b2c8 fde=[ 29008]\n+ 0xffffffffc96f2198 (offset: 0x1d6eb0) -> 0x3b2ec fde=[ 2902c]\n+ 0xffffffffc96f22b8 (offset: 0x1d6fd0) -> 0x3b310 fde=[ 29050]\n+ 0xffffffffc96f2478 (offset: 0x1d7190) -> 0x3b334 fde=[ 29074]\n+ 0xffffffffc96f2638 (offset: 0x1d7350) -> 0x3b358 fde=[ 29098]\n+ 0xffffffffc96f2758 (offset: 0x1d7470) -> 0x3b37c fde=[ 290bc]\n+ 0xffffffffc96f2878 (offset: 0x1d7590) -> 0x3b3a0 fde=[ 290e0]\n+ 0xffffffffc96f2a38 (offset: 0x1d7750) -> 0x3b3c4 fde=[ 29104]\n+ 0xffffffffc96f2bf8 (offset: 0x1d7910) -> 0x3b3e8 fde=[ 29128]\n+ 0xffffffffc96f2d18 (offset: 0x1d7a30) -> 0x3b40c fde=[ 2914c]\n+ 0xffffffffc96f2e38 (offset: 0x1d7b50) -> 0x3b430 fde=[ 29170]\n+ 0xffffffffc96f3b08 (offset: 0x1d8820) -> 0x3b454 fde=[ 29194]\n+ 0xffffffffc96f3b38 (offset: 0x1d8850) -> 0x3b46c fde=[ 291ac]\n+ 0xffffffffc96fdf28 (offset: 0x1e2c40) -> 0x3cd10 fde=[ 2aa50]\n+ 0xffffffffc96fe0e8 (offset: 0x1e2e00) -> 0x3cd34 fde=[ 2aa74]\n+ 0xffffffffc96fe2a8 (offset: 0x1e2fc0) -> 0x3cd58 fde=[ 2aa98]\n+ 0xffffffffc96fe3c8 (offset: 0x1e30e0) -> 0x3cd7c fde=[ 2aabc]\n+ 0xffffffffc96fe4e8 (offset: 0x1e3200) -> 0x3cda0 fde=[ 2aae0]\n+ 0xffffffffc96fe6a8 (offset: 0x1e33c0) -> 0x3cdc4 fde=[ 2ab04]\n+ 0xffffffffc96fe868 (offset: 0x1e3580) -> 0x3cde8 fde=[ 2ab28]\n+ 0xffffffffc96fe988 (offset: 0x1e36a0) -> 0x3ce0c fde=[ 2ab4c]\n+ 0xffffffffc96feaa8 (offset: 0x1e37c0) -> 0x3ce30 fde=[ 2ab70]\n+ 0xffffffffc96fec68 (offset: 0x1e3980) -> 0x3ce54 fde=[ 2ab94]\n+ 0xffffffffc96fee28 (offset: 0x1e3b40) -> 0x3ce78 fde=[ 2abb8]\n+ 0xffffffffc96fef48 (offset: 0x1e3c60) -> 0x3ce9c fde=[ 2abdc]\n+ 0xffffffffc96ff068 (offset: 0x1e3d80) -> 0x3cec0 fde=[ 2ac00]\n+ 0xffffffffc96ff228 (offset: 0x1e3f40) -> 0x3cee4 fde=[ 2ac24]\n+ 0xffffffffc96ff3e8 (offset: 0x1e4100) -> 0x3cf08 fde=[ 2ac48]\n+ 0xffffffffc96ff508 (offset: 0x1e4220) -> 0x3cf2c fde=[ 2ac6c]\n+ 0xffffffffc96ff628 (offset: 0x1e4340) -> 0x3cf50 fde=[ 2ac90]\n+ 0xffffffffc96ff7e8 (offset: 0x1e4500) -> 0x3cf74 fde=[ 2acb4]\n+ 0xffffffffc96ff9a8 (offset: 0x1e46c0) -> 0x3cf98 fde=[ 2acd8]\n+ 0xffffffffc96ffac8 (offset: 0x1e47e0) -> 0x3cfbc fde=[ 2acfc]\n+ 0xffffffffc96ffbe8 (offset: 0x1e4900) -> 0x3cfe0 fde=[ 2ad20]\n+ 0xffffffffc96ffda8 (offset: 0x1e4ac0) -> 0x3d004 fde=[ 2ad44]\n+ 0xffffffffc96fff68 (offset: 0x1e4c80) -> 0x3d028 fde=[ 2ad68]\n+ 0xffffffffc9700088 (offset: 0x1e4da0) -> 0x3d04c fde=[ 2ad8c]\n+ 0xffffffffc97001a8 (offset: 0x1e4ec0) -> 0x3d070 fde=[ 2adb0]\n+ 0xffffffffc9700368 (offset: 0x1e5080) -> 0x3d094 fde=[ 2add4]\n+ 0xffffffffc9700528 (offset: 0x1e5240) -> 0x3d0b8 fde=[ 2adf8]\n+ 0xffffffffc9700648 (offset: 0x1e5360) -> 0x3d0dc fde=[ 2ae1c]\n+ 0xffffffffc9700768 (offset: 0x1e5480) -> 0x3d100 fde=[ 2ae40]\n+ 0xffffffffc9700928 (offset: 0x1e5640) -> 0x3d124 fde=[ 2ae64]\n+ 0xffffffffc9700ae8 (offset: 0x1e5800) -> 0x3d148 fde=[ 2ae88]\n+ 0xffffffffc9700c08 (offset: 0x1e5920) -> 0x3d16c fde=[ 2aeac]\n+ 0xffffffffc9700d28 (offset: 0x1e5a40) -> 0x3d190 fde=[ 2aed0]\n+ 0xffffffffc9700ee8 (offset: 0x1e5c00) -> 0x3d1b4 fde=[ 2aef4]\n+ 0xffffffffc97010a8 (offset: 0x1e5dc0) -> 0x3d1d8 fde=[ 2af18]\n+ 0xffffffffc97011c8 (offset: 0x1e5ee0) -> 0x3d1fc fde=[ 2af3c]\n+ 0xffffffffc97012e8 (offset: 0x1e6000) -> 0x3d220 fde=[ 2af60]\n+ 0xffffffffc97014a8 (offset: 0x1e61c0) -> 0x3d244 fde=[ 2af84]\n+ 0xffffffffc9701668 (offset: 0x1e6380) -> 0x3d268 fde=[ 2afa8]\n+ 0xffffffffc9701788 (offset: 0x1e64a0) -> 0x3d28c fde=[ 2afcc]\n+ 0xffffffffc97018a8 (offset: 0x1e65c0) -> 0x3d2b0 fde=[ 2aff0]\n+ 0xffffffffc9701a68 (offset: 0x1e6780) -> 0x3d2d4 fde=[ 2b014]\n+ 0xffffffffc9701c28 (offset: 0x1e6940) -> 0x3d2f8 fde=[ 2b038]\n+ 0xffffffffc9701d48 (offset: 0x1e6a60) -> 0x3d31c fde=[ 2b05c]\n+ 0xffffffffc9701e68 (offset: 0x1e6b80) -> 0x3d340 fde=[ 2b080]\n+ 0xffffffffc9702028 (offset: 0x1e6d40) -> 0x3d364 fde=[ 2b0a4]\n+ 0xffffffffc97021e8 (offset: 0x1e6f00) -> 0x3d388 fde=[ 2b0c8]\n+ 0xffffffffc9702308 (offset: 0x1e7020) -> 0x3d3ac fde=[ 2b0ec]\n+ 0xffffffffc9702428 (offset: 0x1e7140) -> 0x3d3d0 fde=[ 2b110]\n+ 0xffffffffc97025e8 (offset: 0x1e7300) -> 0x3d3f4 fde=[ 2b134]\n+ 0xffffffffc97027a8 (offset: 0x1e74c0) -> 0x3d418 fde=[ 2b158]\n+ 0xffffffffc97028c8 (offset: 0x1e75e0) -> 0x3d43c fde=[ 2b17c]\n+ 0xffffffffc97029e8 (offset: 0x1e7700) -> 0x3d460 fde=[ 2b1a0]\n+ 0xffffffffc9702ba8 (offset: 0x1e78c0) -> 0x3d484 fde=[ 2b1c4]\n+ 0xffffffffc9702d68 (offset: 0x1e7a80) -> 0x3d4a8 fde=[ 2b1e8]\n+ 0xffffffffc9702e88 (offset: 0x1e7ba0) -> 0x3d4cc fde=[ 2b20c]\n+ 0xffffffffc9702fa8 (offset: 0x1e7cc0) -> 0x3d4f0 fde=[ 2b230]\n+ 0xffffffffc9703168 (offset: 0x1e7e80) -> 0x3d514 fde=[ 2b254]\n+ 0xffffffffc9703328 (offset: 0x1e8040) -> 0x3d538 fde=[ 2b278]\n+ 0xffffffffc9703448 (offset: 0x1e8160) -> 0x3d55c fde=[ 2b29c]\n+ 0xffffffffc9703568 (offset: 0x1e8280) -> 0x3d580 fde=[ 2b2c0]\n+ 0xffffffffc9703728 (offset: 0x1e8440) -> 0x3d5a4 fde=[ 2b2e4]\n+ 0xffffffffc97038e8 (offset: 0x1e8600) -> 0x3d5c8 fde=[ 2b308]\n+ 0xffffffffc9703a08 (offset: 0x1e8720) -> 0x3d5ec fde=[ 2b32c]\n+ 0xffffffffc9703b28 (offset: 0x1e8840) -> 0x3d610 fde=[ 2b350]\n+ 0xffffffffc97047f8 (offset: 0x1e9510) -> 0x3d634 fde=[ 2b374]\n+ 0xffffffffc9704828 (offset: 0x1e9540) -> 0x3d64c fde=[ 2b38c]\n+ 0xffffffffc970ec18 (offset: 0x1f3930) -> 0x3eef0 fde=[ 2cc30]\n+ 0xffffffffc970edd8 (offset: 0x1f3af0) -> 0x3ef14 fde=[ 2cc54]\n+ 0xffffffffc970ef98 (offset: 0x1f3cb0) -> 0x3ef38 fde=[ 2cc78]\n+ 0xffffffffc970f0b8 (offset: 0x1f3dd0) -> 0x3ef5c fde=[ 2cc9c]\n+ 0xffffffffc970f1d8 (offset: 0x1f3ef0) -> 0x3ef80 fde=[ 2ccc0]\n+ 0xffffffffc970f398 (offset: 0x1f40b0) -> 0x3efa4 fde=[ 2cce4]\n+ 0xffffffffc970f558 (offset: 0x1f4270) -> 0x3efc8 fde=[ 2cd08]\n+ 0xffffffffc970f678 (offset: 0x1f4390) -> 0x3efec fde=[ 2cd2c]\n+ 0xffffffffc970f798 (offset: 0x1f44b0) -> 0x3f010 fde=[ 2cd50]\n+ 0xffffffffc970f958 (offset: 0x1f4670) -> 0x3f034 fde=[ 2cd74]\n+ 0xffffffffc970fb18 (offset: 0x1f4830) -> 0x3f058 fde=[ 2cd98]\n+ 0xffffffffc970fc38 (offset: 0x1f4950) -> 0x3f07c fde=[ 2cdbc]\n+ 0xffffffffc970fd58 (offset: 0x1f4a70) -> 0x3f0a0 fde=[ 2cde0]\n+ 0xffffffffc970ff18 (offset: 0x1f4c30) -> 0x3f0c4 fde=[ 2ce04]\n+ 0xffffffffc97100d8 (offset: 0x1f4df0) -> 0x3f0e8 fde=[ 2ce28]\n+ 0xffffffffc97101f8 (offset: 0x1f4f10) -> 0x3f10c fde=[ 2ce4c]\n+ 0xffffffffc9710318 (offset: 0x1f5030) -> 0x3f130 fde=[ 2ce70]\n+ 0xffffffffc97104d8 (offset: 0x1f51f0) -> 0x3f154 fde=[ 2ce94]\n+ 0xffffffffc9710698 (offset: 0x1f53b0) -> 0x3f178 fde=[ 2ceb8]\n+ 0xffffffffc97107b8 (offset: 0x1f54d0) -> 0x3f19c fde=[ 2cedc]\n+ 0xffffffffc97108d8 (offset: 0x1f55f0) -> 0x3f1c0 fde=[ 2cf00]\n+ 0xffffffffc9710a98 (offset: 0x1f57b0) -> 0x3f1e4 fde=[ 2cf24]\n+ 0xffffffffc9710c58 (offset: 0x1f5970) -> 0x3f208 fde=[ 2cf48]\n+ 0xffffffffc9710d78 (offset: 0x1f5a90) -> 0x3f22c fde=[ 2cf6c]\n+ 0xffffffffc9710e98 (offset: 0x1f5bb0) -> 0x3f250 fde=[ 2cf90]\n+ 0xffffffffc9711058 (offset: 0x1f5d70) -> 0x3f274 fde=[ 2cfb4]\n+ 0xffffffffc9711218 (offset: 0x1f5f30) -> 0x3f298 fde=[ 2cfd8]\n+ 0xffffffffc9711338 (offset: 0x1f6050) -> 0x3f2bc fde=[ 2cffc]\n+ 0xffffffffc9711458 (offset: 0x1f6170) -> 0x3f2e0 fde=[ 2d020]\n+ 0xffffffffc9711618 (offset: 0x1f6330) -> 0x3f304 fde=[ 2d044]\n+ 0xffffffffc97117d8 (offset: 0x1f64f0) -> 0x3f328 fde=[ 2d068]\n+ 0xffffffffc97118f8 (offset: 0x1f6610) -> 0x3f34c fde=[ 2d08c]\n+ 0xffffffffc9711a18 (offset: 0x1f6730) -> 0x3f370 fde=[ 2d0b0]\n+ 0xffffffffc9711bd8 (offset: 0x1f68f0) -> 0x3f394 fde=[ 2d0d4]\n+ 0xffffffffc9711d98 (offset: 0x1f6ab0) -> 0x3f3b8 fde=[ 2d0f8]\n+ 0xffffffffc9711eb8 (offset: 0x1f6bd0) -> 0x3f3dc fde=[ 2d11c]\n+ 0xffffffffc9711fd8 (offset: 0x1f6cf0) -> 0x3f400 fde=[ 2d140]\n+ 0xffffffffc9712198 (offset: 0x1f6eb0) -> 0x3f424 fde=[ 2d164]\n+ 0xffffffffc9712358 (offset: 0x1f7070) -> 0x3f448 fde=[ 2d188]\n+ 0xffffffffc9712478 (offset: 0x1f7190) -> 0x3f46c fde=[ 2d1ac]\n+ 0xffffffffc9712598 (offset: 0x1f72b0) -> 0x3f490 fde=[ 2d1d0]\n+ 0xffffffffc9712758 (offset: 0x1f7470) -> 0x3f4b4 fde=[ 2d1f4]\n+ 0xffffffffc9712918 (offset: 0x1f7630) -> 0x3f4d8 fde=[ 2d218]\n+ 0xffffffffc9712a38 (offset: 0x1f7750) -> 0x3f4fc fde=[ 2d23c]\n+ 0xffffffffc9712b58 (offset: 0x1f7870) -> 0x3f520 fde=[ 2d260]\n+ 0xffffffffc9712d18 (offset: 0x1f7a30) -> 0x3f544 fde=[ 2d284]\n+ 0xffffffffc9712ed8 (offset: 0x1f7bf0) -> 0x3f568 fde=[ 2d2a8]\n+ 0xffffffffc9712ff8 (offset: 0x1f7d10) -> 0x3f58c fde=[ 2d2cc]\n+ 0xffffffffc9713118 (offset: 0x1f7e30) -> 0x3f5b0 fde=[ 2d2f0]\n+ 0xffffffffc97132d8 (offset: 0x1f7ff0) -> 0x3f5d4 fde=[ 2d314]\n+ 0xffffffffc9713498 (offset: 0x1f81b0) -> 0x3f5f8 fde=[ 2d338]\n+ 0xffffffffc97135b8 (offset: 0x1f82d0) -> 0x3f61c fde=[ 2d35c]\n+ 0xffffffffc97136d8 (offset: 0x1f83f0) -> 0x3f640 fde=[ 2d380]\n+ 0xffffffffc9713898 (offset: 0x1f85b0) -> 0x3f664 fde=[ 2d3a4]\n+ 0xffffffffc9713a58 (offset: 0x1f8770) -> 0x3f688 fde=[ 2d3c8]\n+ 0xffffffffc9713b78 (offset: 0x1f8890) -> 0x3f6ac fde=[ 2d3ec]\n+ 0xffffffffc9713c98 (offset: 0x1f89b0) -> 0x3f6d0 fde=[ 2d410]\n+ 0xffffffffc9713e58 (offset: 0x1f8b70) -> 0x3f6f4 fde=[ 2d434]\n+ 0xffffffffc9714018 (offset: 0x1f8d30) -> 0x3f718 fde=[ 2d458]\n+ 0xffffffffc9714138 (offset: 0x1f8e50) -> 0x3f73c fde=[ 2d47c]\n+ 0xffffffffc9714258 (offset: 0x1f8f70) -> 0x3f760 fde=[ 2d4a0]\n+ 0xffffffffc9714418 (offset: 0x1f9130) -> 0x3f784 fde=[ 2d4c4]\n+ 0xffffffffc97145d8 (offset: 0x1f92f0) -> 0x3f7a8 fde=[ 2d4e8]\n+ 0xffffffffc97146f8 (offset: 0x1f9410) -> 0x3f7cc fde=[ 2d50c]\n+ 0xffffffffc9714818 (offset: 0x1f9530) -> 0x3f7f0 fde=[ 2d530]\n+ 0xffffffffc97154e8 (offset: 0x1fa200) -> 0x3f814 fde=[ 2d554]\n+ 0xffffffffc9715518 (offset: 0x1fa230) -> 0x3f82c fde=[ 2d56c]\n+ 0xffffffffc971f908 (offset: 0x204620) -> 0x410d0 fde=[ 2ee10]\n+ 0xffffffffc971fac8 (offset: 0x2047e0) -> 0x410f4 fde=[ 2ee34]\n+ 0xffffffffc971fc88 (offset: 0x2049a0) -> 0x41118 fde=[ 2ee58]\n+ 0xffffffffc971fda8 (offset: 0x204ac0) -> 0x4113c fde=[ 2ee7c]\n+ 0xffffffffc971fec8 (offset: 0x204be0) -> 0x41160 fde=[ 2eea0]\n+ 0xffffffffc9720088 (offset: 0x204da0) -> 0x41184 fde=[ 2eec4]\n+ 0xffffffffc9720248 (offset: 0x204f60) -> 0x411a8 fde=[ 2eee8]\n+ 0xffffffffc9720368 (offset: 0x205080) -> 0x411cc fde=[ 2ef0c]\n+ 0xffffffffc9720488 (offset: 0x2051a0) -> 0x411f0 fde=[ 2ef30]\n+ 0xffffffffc9720648 (offset: 0x205360) -> 0x41214 fde=[ 2ef54]\n+ 0xffffffffc9720808 (offset: 0x205520) -> 0x41238 fde=[ 2ef78]\n+ 0xffffffffc9720928 (offset: 0x205640) -> 0x4125c fde=[ 2ef9c]\n+ 0xffffffffc9720a48 (offset: 0x205760) -> 0x41280 fde=[ 2efc0]\n+ 0xffffffffc9720c08 (offset: 0x205920) -> 0x412a4 fde=[ 2efe4]\n+ 0xffffffffc9720dc8 (offset: 0x205ae0) -> 0x412c8 fde=[ 2f008]\n+ 0xffffffffc9720ee8 (offset: 0x205c00) -> 0x412ec fde=[ 2f02c]\n+ 0xffffffffc9721008 (offset: 0x205d20) -> 0x41310 fde=[ 2f050]\n+ 0xffffffffc97211c8 (offset: 0x205ee0) -> 0x41334 fde=[ 2f074]\n+ 0xffffffffc9721388 (offset: 0x2060a0) -> 0x41358 fde=[ 2f098]\n+ 0xffffffffc97214a8 (offset: 0x2061c0) -> 0x4137c fde=[ 2f0bc]\n+ 0xffffffffc97215c8 (offset: 0x2062e0) -> 0x413a0 fde=[ 2f0e0]\n+ 0xffffffffc9721788 (offset: 0x2064a0) -> 0x413c4 fde=[ 2f104]\n+ 0xffffffffc9721948 (offset: 0x206660) -> 0x413e8 fde=[ 2f128]\n+ 0xffffffffc9721a68 (offset: 0x206780) -> 0x4140c fde=[ 2f14c]\n+ 0xffffffffc9721b88 (offset: 0x2068a0) -> 0x41430 fde=[ 2f170]\n+ 0xffffffffc9721d48 (offset: 0x206a60) -> 0x41454 fde=[ 2f194]\n+ 0xffffffffc9721f08 (offset: 0x206c20) -> 0x41478 fde=[ 2f1b8]\n+ 0xffffffffc9722028 (offset: 0x206d40) -> 0x4149c fde=[ 2f1dc]\n+ 0xffffffffc9722148 (offset: 0x206e60) -> 0x414c0 fde=[ 2f200]\n+ 0xffffffffc9722308 (offset: 0x207020) -> 0x414e4 fde=[ 2f224]\n+ 0xffffffffc97224c8 (offset: 0x2071e0) -> 0x41508 fde=[ 2f248]\n+ 0xffffffffc97225e8 (offset: 0x207300) -> 0x4152c fde=[ 2f26c]\n+ 0xffffffffc9722708 (offset: 0x207420) -> 0x41550 fde=[ 2f290]\n+ 0xffffffffc97228c8 (offset: 0x2075e0) -> 0x41574 fde=[ 2f2b4]\n+ 0xffffffffc9722a88 (offset: 0x2077a0) -> 0x41598 fde=[ 2f2d8]\n+ 0xffffffffc9722ba8 (offset: 0x2078c0) -> 0x415bc fde=[ 2f2fc]\n+ 0xffffffffc9722cc8 (offset: 0x2079e0) -> 0x415e0 fde=[ 2f320]\n+ 0xffffffffc9722e88 (offset: 0x207ba0) -> 0x41604 fde=[ 2f344]\n+ 0xffffffffc9723048 (offset: 0x207d60) -> 0x41628 fde=[ 2f368]\n+ 0xffffffffc9723168 (offset: 0x207e80) -> 0x4164c fde=[ 2f38c]\n+ 0xffffffffc9723288 (offset: 0x207fa0) -> 0x41670 fde=[ 2f3b0]\n+ 0xffffffffc9723448 (offset: 0x208160) -> 0x41694 fde=[ 2f3d4]\n+ 0xffffffffc9723608 (offset: 0x208320) -> 0x416b8 fde=[ 2f3f8]\n+ 0xffffffffc9723728 (offset: 0x208440) -> 0x416dc fde=[ 2f41c]\n+ 0xffffffffc9723848 (offset: 0x208560) -> 0x41700 fde=[ 2f440]\n+ 0xffffffffc9723a08 (offset: 0x208720) -> 0x41724 fde=[ 2f464]\n+ 0xffffffffc9723bc8 (offset: 0x2088e0) -> 0x41748 fde=[ 2f488]\n+ 0xffffffffc9723ce8 (offset: 0x208a00) -> 0x4176c fde=[ 2f4ac]\n+ 0xffffffffc9723e08 (offset: 0x208b20) -> 0x41790 fde=[ 2f4d0]\n+ 0xffffffffc9723fc8 (offset: 0x208ce0) -> 0x417b4 fde=[ 2f4f4]\n+ 0xffffffffc9724188 (offset: 0x208ea0) -> 0x417d8 fde=[ 2f518]\n+ 0xffffffffc97242a8 (offset: 0x208fc0) -> 0x417fc fde=[ 2f53c]\n+ 0xffffffffc97243c8 (offset: 0x2090e0) -> 0x41820 fde=[ 2f560]\n+ 0xffffffffc9724588 (offset: 0x2092a0) -> 0x41844 fde=[ 2f584]\n+ 0xffffffffc9724748 (offset: 0x209460) -> 0x41868 fde=[ 2f5a8]\n+ 0xffffffffc9724868 (offset: 0x209580) -> 0x4188c fde=[ 2f5cc]\n+ 0xffffffffc9724988 (offset: 0x2096a0) -> 0x418b0 fde=[ 2f5f0]\n+ 0xffffffffc9724b48 (offset: 0x209860) -> 0x418d4 fde=[ 2f614]\n+ 0xffffffffc9724d08 (offset: 0x209a20) -> 0x418f8 fde=[ 2f638]\n+ 0xffffffffc9724e28 (offset: 0x209b40) -> 0x4191c fde=[ 2f65c]\n+ 0xffffffffc9724f48 (offset: 0x209c60) -> 0x41940 fde=[ 2f680]\n+ 0xffffffffc9725108 (offset: 0x209e20) -> 0x41964 fde=[ 2f6a4]\n+ 0xffffffffc97252c8 (offset: 0x209fe0) -> 0x41988 fde=[ 2f6c8]\n+ 0xffffffffc97253e8 (offset: 0x20a100) -> 0x419ac fde=[ 2f6ec]\n+ 0xffffffffc9725508 (offset: 0x20a220) -> 0x419d0 fde=[ 2f710]\n+ 0xffffffffc97261d8 (offset: 0x20aef0) -> 0x419f4 fde=[ 2f734]\n+ 0xffffffffc9726208 (offset: 0x20af20) -> 0x41a0c fde=[ 2f74c]\n+ 0xffffffffc97305f8 (offset: 0x215310) -> 0x432b0 fde=[ 30ff0]\n+ 0xffffffffc97307b8 (offset: 0x2154d0) -> 0x432d4 fde=[ 31014]\n+ 0xffffffffc9730978 (offset: 0x215690) -> 0x432f8 fde=[ 31038]\n+ 0xffffffffc9730a98 (offset: 0x2157b0) -> 0x4331c fde=[ 3105c]\n+ 0xffffffffc9730bb8 (offset: 0x2158d0) -> 0x43340 fde=[ 31080]\n+ 0xffffffffc9730d78 (offset: 0x215a90) -> 0x43364 fde=[ 310a4]\n+ 0xffffffffc9730f38 (offset: 0x215c50) -> 0x43388 fde=[ 310c8]\n+ 0xffffffffc9731058 (offset: 0x215d70) -> 0x433ac fde=[ 310ec]\n+ 0xffffffffc9731178 (offset: 0x215e90) -> 0x433d0 fde=[ 31110]\n+ 0xffffffffc9731338 (offset: 0x216050) -> 0x433f4 fde=[ 31134]\n+ 0xffffffffc97314f8 (offset: 0x216210) -> 0x43418 fde=[ 31158]\n+ 0xffffffffc9731618 (offset: 0x216330) -> 0x4343c fde=[ 3117c]\n+ 0xffffffffc9731738 (offset: 0x216450) -> 0x43460 fde=[ 311a0]\n+ 0xffffffffc97318f8 (offset: 0x216610) -> 0x43484 fde=[ 311c4]\n+ 0xffffffffc9731ab8 (offset: 0x2167d0) -> 0x434a8 fde=[ 311e8]\n+ 0xffffffffc9731bd8 (offset: 0x2168f0) -> 0x434cc fde=[ 3120c]\n+ 0xffffffffc9731cf8 (offset: 0x216a10) -> 0x434f0 fde=[ 31230]\n+ 0xffffffffc9731eb8 (offset: 0x216bd0) -> 0x43514 fde=[ 31254]\n+ 0xffffffffc9732078 (offset: 0x216d90) -> 0x43538 fde=[ 31278]\n+ 0xffffffffc9732198 (offset: 0x216eb0) -> 0x4355c fde=[ 3129c]\n+ 0xffffffffc97322b8 (offset: 0x216fd0) -> 0x43580 fde=[ 312c0]\n+ 0xffffffffc9732478 (offset: 0x217190) -> 0x435a4 fde=[ 312e4]\n+ 0xffffffffc9732638 (offset: 0x217350) -> 0x435c8 fde=[ 31308]\n+ 0xffffffffc9732758 (offset: 0x217470) -> 0x435ec fde=[ 3132c]\n+ 0xffffffffc9732878 (offset: 0x217590) -> 0x43610 fde=[ 31350]\n+ 0xffffffffc9732a38 (offset: 0x217750) -> 0x43634 fde=[ 31374]\n+ 0xffffffffc9732bf8 (offset: 0x217910) -> 0x43658 fde=[ 31398]\n+ 0xffffffffc9732d18 (offset: 0x217a30) -> 0x4367c fde=[ 313bc]\n+ 0xffffffffc9732e38 (offset: 0x217b50) -> 0x436a0 fde=[ 313e0]\n+ 0xffffffffc9732ff8 (offset: 0x217d10) -> 0x436c4 fde=[ 31404]\n+ 0xffffffffc97331b8 (offset: 0x217ed0) -> 0x436e8 fde=[ 31428]\n+ 0xffffffffc97332d8 (offset: 0x217ff0) -> 0x4370c fde=[ 3144c]\n+ 0xffffffffc97333f8 (offset: 0x218110) -> 0x43730 fde=[ 31470]\n+ 0xffffffffc97335b8 (offset: 0x2182d0) -> 0x43754 fde=[ 31494]\n+ 0xffffffffc9733778 (offset: 0x218490) -> 0x43778 fde=[ 314b8]\n+ 0xffffffffc9733898 (offset: 0x2185b0) -> 0x4379c fde=[ 314dc]\n+ 0xffffffffc97339b8 (offset: 0x2186d0) -> 0x437c0 fde=[ 31500]\n+ 0xffffffffc9733b78 (offset: 0x218890) -> 0x437e4 fde=[ 31524]\n+ 0xffffffffc9733d38 (offset: 0x218a50) -> 0x43808 fde=[ 31548]\n+ 0xffffffffc9733e58 (offset: 0x218b70) -> 0x4382c fde=[ 3156c]\n+ 0xffffffffc9733f78 (offset: 0x218c90) -> 0x43850 fde=[ 31590]\n+ 0xffffffffc9734138 (offset: 0x218e50) -> 0x43874 fde=[ 315b4]\n+ 0xffffffffc97342f8 (offset: 0x219010) -> 0x43898 fde=[ 315d8]\n+ 0xffffffffc9734418 (offset: 0x219130) -> 0x438bc fde=[ 315fc]\n+ 0xffffffffc9734538 (offset: 0x219250) -> 0x438e0 fde=[ 31620]\n+ 0xffffffffc97346f8 (offset: 0x219410) -> 0x43904 fde=[ 31644]\n+ 0xffffffffc97348b8 (offset: 0x2195d0) -> 0x43928 fde=[ 31668]\n+ 0xffffffffc97349d8 (offset: 0x2196f0) -> 0x4394c fde=[ 3168c]\n+ 0xffffffffc9734af8 (offset: 0x219810) -> 0x43970 fde=[ 316b0]\n+ 0xffffffffc9734cb8 (offset: 0x2199d0) -> 0x43994 fde=[ 316d4]\n+ 0xffffffffc9734e78 (offset: 0x219b90) -> 0x439b8 fde=[ 316f8]\n+ 0xffffffffc9734f98 (offset: 0x219cb0) -> 0x439dc fde=[ 3171c]\n+ 0xffffffffc97350b8 (offset: 0x219dd0) -> 0x43a00 fde=[ 31740]\n+ 0xffffffffc9735278 (offset: 0x219f90) -> 0x43a24 fde=[ 31764]\n+ 0xffffffffc9735438 (offset: 0x21a150) -> 0x43a48 fde=[ 31788]\n+ 0xffffffffc9735558 (offset: 0x21a270) -> 0x43a6c fde=[ 317ac]\n+ 0xffffffffc9735678 (offset: 0x21a390) -> 0x43a90 fde=[ 317d0]\n+ 0xffffffffc9735838 (offset: 0x21a550) -> 0x43ab4 fde=[ 317f4]\n+ 0xffffffffc97359f8 (offset: 0x21a710) -> 0x43ad8 fde=[ 31818]\n+ 0xffffffffc9735b18 (offset: 0x21a830) -> 0x43afc fde=[ 3183c]\n+ 0xffffffffc9735c38 (offset: 0x21a950) -> 0x43b20 fde=[ 31860]\n+ 0xffffffffc9735df8 (offset: 0x21ab10) -> 0x43b44 fde=[ 31884]\n+ 0xffffffffc9735fb8 (offset: 0x21acd0) -> 0x43b68 fde=[ 318a8]\n+ 0xffffffffc97360d8 (offset: 0x21adf0) -> 0x43b8c fde=[ 318cc]\n+ 0xffffffffc97361f8 (offset: 0x21af10) -> 0x43bb0 fde=[ 318f0]\n+ 0xffffffffc9736ec8 (offset: 0x21bbe0) -> 0x43bd4 fde=[ 31914]\n+ 0xffffffffc9736ef8 (offset: 0x21bc10) -> 0x43bec fde=[ 3192c]\n+ 0xffffffffc97412e8 (offset: 0x226000) -> 0x45490 fde=[ 331d0]\n+ 0xffffffffc97414a8 (offset: 0x2261c0) -> 0x454b4 fde=[ 331f4]\n+ 0xffffffffc9741668 (offset: 0x226380) -> 0x454d8 fde=[ 33218]\n+ 0xffffffffc9741788 (offset: 0x2264a0) -> 0x454fc fde=[ 3323c]\n+ 0xffffffffc97418a8 (offset: 0x2265c0) -> 0x45520 fde=[ 33260]\n+ 0xffffffffc9741a68 (offset: 0x226780) -> 0x45544 fde=[ 33284]\n+ 0xffffffffc9741c28 (offset: 0x226940) -> 0x45568 fde=[ 332a8]\n+ 0xffffffffc9741d48 (offset: 0x226a60) -> 0x4558c fde=[ 332cc]\n+ 0xffffffffc9741e68 (offset: 0x226b80) -> 0x455b0 fde=[ 332f0]\n+ 0xffffffffc9742028 (offset: 0x226d40) -> 0x455d4 fde=[ 33314]\n+ 0xffffffffc97421e8 (offset: 0x226f00) -> 0x455f8 fde=[ 33338]\n+ 0xffffffffc9742308 (offset: 0x227020) -> 0x4561c fde=[ 3335c]\n+ 0xffffffffc9742428 (offset: 0x227140) -> 0x45640 fde=[ 33380]\n+ 0xffffffffc97425e8 (offset: 0x227300) -> 0x45664 fde=[ 333a4]\n+ 0xffffffffc97427a8 (offset: 0x2274c0) -> 0x45688 fde=[ 333c8]\n+ 0xffffffffc97428c8 (offset: 0x2275e0) -> 0x456ac fde=[ 333ec]\n+ 0xffffffffc97429e8 (offset: 0x227700) -> 0x456d0 fde=[ 33410]\n+ 0xffffffffc9742ba8 (offset: 0x2278c0) -> 0x456f4 fde=[ 33434]\n+ 0xffffffffc9742d68 (offset: 0x227a80) -> 0x45718 fde=[ 33458]\n+ 0xffffffffc9742e88 (offset: 0x227ba0) -> 0x4573c fde=[ 3347c]\n+ 0xffffffffc9742fa8 (offset: 0x227cc0) -> 0x45760 fde=[ 334a0]\n+ 0xffffffffc9743168 (offset: 0x227e80) -> 0x45784 fde=[ 334c4]\n+ 0xffffffffc9743328 (offset: 0x228040) -> 0x457a8 fde=[ 334e8]\n+ 0xffffffffc9743448 (offset: 0x228160) -> 0x457cc fde=[ 3350c]\n+ 0xffffffffc9743568 (offset: 0x228280) -> 0x457f0 fde=[ 33530]\n+ 0xffffffffc9743728 (offset: 0x228440) -> 0x45814 fde=[ 33554]\n+ 0xffffffffc97438e8 (offset: 0x228600) -> 0x45838 fde=[ 33578]\n+ 0xffffffffc9743a08 (offset: 0x228720) -> 0x4585c fde=[ 3359c]\n+ 0xffffffffc9743b28 (offset: 0x228840) -> 0x45880 fde=[ 335c0]\n+ 0xffffffffc9743ce8 (offset: 0x228a00) -> 0x458a4 fde=[ 335e4]\n+ 0xffffffffc9743ea8 (offset: 0x228bc0) -> 0x458c8 fde=[ 33608]\n+ 0xffffffffc9743fc8 (offset: 0x228ce0) -> 0x458ec fde=[ 3362c]\n+ 0xffffffffc97440e8 (offset: 0x228e00) -> 0x45910 fde=[ 33650]\n+ 0xffffffffc97442a8 (offset: 0x228fc0) -> 0x45934 fde=[ 33674]\n+ 0xffffffffc9744468 (offset: 0x229180) -> 0x45958 fde=[ 33698]\n+ 0xffffffffc9744588 (offset: 0x2292a0) -> 0x4597c fde=[ 336bc]\n+ 0xffffffffc97446a8 (offset: 0x2293c0) -> 0x459a0 fde=[ 336e0]\n+ 0xffffffffc9744868 (offset: 0x229580) -> 0x459c4 fde=[ 33704]\n+ 0xffffffffc9744a28 (offset: 0x229740) -> 0x459e8 fde=[ 33728]\n+ 0xffffffffc9744b48 (offset: 0x229860) -> 0x45a0c fde=[ 3374c]\n+ 0xffffffffc9744c68 (offset: 0x229980) -> 0x45a30 fde=[ 33770]\n+ 0xffffffffc9744e28 (offset: 0x229b40) -> 0x45a54 fde=[ 33794]\n+ 0xffffffffc9744fe8 (offset: 0x229d00) -> 0x45a78 fde=[ 337b8]\n+ 0xffffffffc9745108 (offset: 0x229e20) -> 0x45a9c fde=[ 337dc]\n+ 0xffffffffc9745228 (offset: 0x229f40) -> 0x45ac0 fde=[ 33800]\n+ 0xffffffffc97453e8 (offset: 0x22a100) -> 0x45ae4 fde=[ 33824]\n+ 0xffffffffc97455a8 (offset: 0x22a2c0) -> 0x45b08 fde=[ 33848]\n+ 0xffffffffc97456c8 (offset: 0x22a3e0) -> 0x45b2c fde=[ 3386c]\n+ 0xffffffffc97457e8 (offset: 0x22a500) -> 0x45b50 fde=[ 33890]\n+ 0xffffffffc97459a8 (offset: 0x22a6c0) -> 0x45b74 fde=[ 338b4]\n+ 0xffffffffc9745b68 (offset: 0x22a880) -> 0x45b98 fde=[ 338d8]\n+ 0xffffffffc9745c88 (offset: 0x22a9a0) -> 0x45bbc fde=[ 338fc]\n+ 0xffffffffc9745da8 (offset: 0x22aac0) -> 0x45be0 fde=[ 33920]\n+ 0xffffffffc9745f68 (offset: 0x22ac80) -> 0x45c04 fde=[ 33944]\n+ 0xffffffffc9746128 (offset: 0x22ae40) -> 0x45c28 fde=[ 33968]\n+ 0xffffffffc9746248 (offset: 0x22af60) -> 0x45c4c fde=[ 3398c]\n+ 0xffffffffc9746368 (offset: 0x22b080) -> 0x45c70 fde=[ 339b0]\n+ 0xffffffffc9746528 (offset: 0x22b240) -> 0x45c94 fde=[ 339d4]\n+ 0xffffffffc97466e8 (offset: 0x22b400) -> 0x45cb8 fde=[ 339f8]\n+ 0xffffffffc9746808 (offset: 0x22b520) -> 0x45cdc fde=[ 33a1c]\n+ 0xffffffffc9746928 (offset: 0x22b640) -> 0x45d00 fde=[ 33a40]\n+ 0xffffffffc9746ae8 (offset: 0x22b800) -> 0x45d24 fde=[ 33a64]\n+ 0xffffffffc9746ca8 (offset: 0x22b9c0) -> 0x45d48 fde=[ 33a88]\n+ 0xffffffffc9746dc8 (offset: 0x22bae0) -> 0x45d6c fde=[ 33aac]\n+ 0xffffffffc9746ee8 (offset: 0x22bc00) -> 0x45d90 fde=[ 33ad0]\n+ 0xffffffffc9747bb8 (offset: 0x22c8d0) -> 0x45db4 fde=[ 33af4]\n+ 0xffffffffc9747be8 (offset: 0x22c900) -> 0x45dcc fde=[ 33b0c]\n+ 0xffffffffc9752138 (offset: 0x236e50) -> 0x47670 fde=[ 353b0]\n+ 0xffffffffc97522f8 (offset: 0x237010) -> 0x47694 fde=[ 353d4]\n+ 0xffffffffc97524b8 (offset: 0x2371d0) -> 0x476b8 fde=[ 353f8]\n+ 0xffffffffc97525d8 (offset: 0x2372f0) -> 0x476dc fde=[ 3541c]\n+ 0xffffffffc97526f8 (offset: 0x237410) -> 0x47700 fde=[ 35440]\n+ 0xffffffffc97528b8 (offset: 0x2375d0) -> 0x47724 fde=[ 35464]\n+ 0xffffffffc9752a78 (offset: 0x237790) -> 0x47748 fde=[ 35488]\n+ 0xffffffffc9752b98 (offset: 0x2378b0) -> 0x4776c fde=[ 354ac]\n+ 0xffffffffc9752cb8 (offset: 0x2379d0) -> 0x47790 fde=[ 354d0]\n+ 0xffffffffc9752e78 (offset: 0x237b90) -> 0x477b4 fde=[ 354f4]\n+ 0xffffffffc9753038 (offset: 0x237d50) -> 0x477d8 fde=[ 35518]\n+ 0xffffffffc9753158 (offset: 0x237e70) -> 0x477fc fde=[ 3553c]\n+ 0xffffffffc9753278 (offset: 0x237f90) -> 0x47820 fde=[ 35560]\n+ 0xffffffffc9753438 (offset: 0x238150) -> 0x47844 fde=[ 35584]\n+ 0xffffffffc97535f8 (offset: 0x238310) -> 0x47868 fde=[ 355a8]\n+ 0xffffffffc9753718 (offset: 0x238430) -> 0x4788c fde=[ 355cc]\n+ 0xffffffffc9753838 (offset: 0x238550) -> 0x478b0 fde=[ 355f0]\n+ 0xffffffffc97539f8 (offset: 0x238710) -> 0x478d4 fde=[ 35614]\n+ 0xffffffffc9753bb8 (offset: 0x2388d0) -> 0x478f8 fde=[ 35638]\n+ 0xffffffffc9753cd8 (offset: 0x2389f0) -> 0x4791c fde=[ 3565c]\n+ 0xffffffffc9753df8 (offset: 0x238b10) -> 0x47940 fde=[ 35680]\n+ 0xffffffffc9753fb8 (offset: 0x238cd0) -> 0x47964 fde=[ 356a4]\n+ 0xffffffffc9754178 (offset: 0x238e90) -> 0x47988 fde=[ 356c8]\n+ 0xffffffffc9754298 (offset: 0x238fb0) -> 0x479ac fde=[ 356ec]\n+ 0xffffffffc97543b8 (offset: 0x2390d0) -> 0x479d0 fde=[ 35710]\n+ 0xffffffffc9754578 (offset: 0x239290) -> 0x479f4 fde=[ 35734]\n+ 0xffffffffc9754738 (offset: 0x239450) -> 0x47a18 fde=[ 35758]\n+ 0xffffffffc9754858 (offset: 0x239570) -> 0x47a3c fde=[ 3577c]\n+ 0xffffffffc9754978 (offset: 0x239690) -> 0x47a60 fde=[ 357a0]\n+ 0xffffffffc9754b38 (offset: 0x239850) -> 0x47a84 fde=[ 357c4]\n+ 0xffffffffc9754cf8 (offset: 0x239a10) -> 0x47aa8 fde=[ 357e8]\n+ 0xffffffffc9754e18 (offset: 0x239b30) -> 0x47acc fde=[ 3580c]\n+ 0xffffffffc9754f38 (offset: 0x239c50) -> 0x47af0 fde=[ 35830]\n+ 0xffffffffc97550f8 (offset: 0x239e10) -> 0x47b14 fde=[ 35854]\n+ 0xffffffffc97552b8 (offset: 0x239fd0) -> 0x47b38 fde=[ 35878]\n+ 0xffffffffc97553d8 (offset: 0x23a0f0) -> 0x47b5c fde=[ 3589c]\n+ 0xffffffffc97554f8 (offset: 0x23a210) -> 0x47b80 fde=[ 358c0]\n+ 0xffffffffc97556b8 (offset: 0x23a3d0) -> 0x47ba4 fde=[ 358e4]\n+ 0xffffffffc9755878 (offset: 0x23a590) -> 0x47bc8 fde=[ 35908]\n+ 0xffffffffc9755998 (offset: 0x23a6b0) -> 0x47bec fde=[ 3592c]\n+ 0xffffffffc9755ab8 (offset: 0x23a7d0) -> 0x47c10 fde=[ 35950]\n+ 0xffffffffc9755c78 (offset: 0x23a990) -> 0x47c34 fde=[ 35974]\n+ 0xffffffffc9755e38 (offset: 0x23ab50) -> 0x47c58 fde=[ 35998]\n+ 0xffffffffc9755f58 (offset: 0x23ac70) -> 0x47c7c fde=[ 359bc]\n+ 0xffffffffc9756078 (offset: 0x23ad90) -> 0x47ca0 fde=[ 359e0]\n+ 0xffffffffc9756238 (offset: 0x23af50) -> 0x47cc4 fde=[ 35a04]\n+ 0xffffffffc97563f8 (offset: 0x23b110) -> 0x47ce8 fde=[ 35a28]\n+ 0xffffffffc9756518 (offset: 0x23b230) -> 0x47d0c fde=[ 35a4c]\n+ 0xffffffffc9756638 (offset: 0x23b350) -> 0x47d30 fde=[ 35a70]\n+ 0xffffffffc97567f8 (offset: 0x23b510) -> 0x47d54 fde=[ 35a94]\n+ 0xffffffffc97569b8 (offset: 0x23b6d0) -> 0x47d78 fde=[ 35ab8]\n+ 0xffffffffc9756ad8 (offset: 0x23b7f0) -> 0x47d9c fde=[ 35adc]\n+ 0xffffffffc9756bf8 (offset: 0x23b910) -> 0x47dc0 fde=[ 35b00]\n+ 0xffffffffc9756db8 (offset: 0x23bad0) -> 0x47de4 fde=[ 35b24]\n+ 0xffffffffc9756f78 (offset: 0x23bc90) -> 0x47e08 fde=[ 35b48]\n+ 0xffffffffc9757098 (offset: 0x23bdb0) -> 0x47e2c fde=[ 35b6c]\n+ 0xffffffffc97571b8 (offset: 0x23bed0) -> 0x47e50 fde=[ 35b90]\n+ 0xffffffffc9757378 (offset: 0x23c090) -> 0x47e74 fde=[ 35bb4]\n+ 0xffffffffc9757538 (offset: 0x23c250) -> 0x47e98 fde=[ 35bd8]\n+ 0xffffffffc9757658 (offset: 0x23c370) -> 0x47ebc fde=[ 35bfc]\n+ 0xffffffffc9757778 (offset: 0x23c490) -> 0x47ee0 fde=[ 35c20]\n+ 0xffffffffc9757938 (offset: 0x23c650) -> 0x47f04 fde=[ 35c44]\n+ 0xffffffffc9757af8 (offset: 0x23c810) -> 0x47f28 fde=[ 35c68]\n+ 0xffffffffc9757c18 (offset: 0x23c930) -> 0x47f4c fde=[ 35c8c]\n+ 0xffffffffc9757d38 (offset: 0x23ca50) -> 0x47f70 fde=[ 35cb0]\n+ 0xffffffffc9758a08 (offset: 0x23d720) -> 0x47f94 fde=[ 35cd4]\n+ 0xffffffffc9758a38 (offset: 0x23d750) -> 0x47fac fde=[ 35cec]\n+ 0xffffffffc9762e28 (offset: 0x247b40) -> 0x49850 fde=[ 37590]\n+ 0xffffffffc9762fe8 (offset: 0x247d00) -> 0x49874 fde=[ 375b4]\n+ 0xffffffffc97631a8 (offset: 0x247ec0) -> 0x49898 fde=[ 375d8]\n+ 0xffffffffc97632c8 (offset: 0x247fe0) -> 0x498bc fde=[ 375fc]\n+ 0xffffffffc97633e8 (offset: 0x248100) -> 0x498e0 fde=[ 37620]\n+ 0xffffffffc97635a8 (offset: 0x2482c0) -> 0x49904 fde=[ 37644]\n+ 0xffffffffc9763768 (offset: 0x248480) -> 0x49928 fde=[ 37668]\n+ 0xffffffffc9763888 (offset: 0x2485a0) -> 0x4994c fde=[ 3768c]\n+ 0xffffffffc97639a8 (offset: 0x2486c0) -> 0x49970 fde=[ 376b0]\n+ 0xffffffffc9763b68 (offset: 0x248880) -> 0x49994 fde=[ 376d4]\n+ 0xffffffffc9763d28 (offset: 0x248a40) -> 0x499b8 fde=[ 376f8]\n+ 0xffffffffc9763e48 (offset: 0x248b60) -> 0x499dc fde=[ 3771c]\n+ 0xffffffffc9763f68 (offset: 0x248c80) -> 0x49a00 fde=[ 37740]\n+ 0xffffffffc9764128 (offset: 0x248e40) -> 0x49a24 fde=[ 37764]\n+ 0xffffffffc97642e8 (offset: 0x249000) -> 0x49a48 fde=[ 37788]\n+ 0xffffffffc9764408 (offset: 0x249120) -> 0x49a6c fde=[ 377ac]\n+ 0xffffffffc9764528 (offset: 0x249240) -> 0x49a90 fde=[ 377d0]\n+ 0xffffffffc97646e8 (offset: 0x249400) -> 0x49ab4 fde=[ 377f4]\n+ 0xffffffffc97648a8 (offset: 0x2495c0) -> 0x49ad8 fde=[ 37818]\n+ 0xffffffffc97649c8 (offset: 0x2496e0) -> 0x49afc fde=[ 3783c]\n+ 0xffffffffc9764ae8 (offset: 0x249800) -> 0x49b20 fde=[ 37860]\n+ 0xffffffffc9764ca8 (offset: 0x2499c0) -> 0x49b44 fde=[ 37884]\n+ 0xffffffffc9764e68 (offset: 0x249b80) -> 0x49b68 fde=[ 378a8]\n+ 0xffffffffc9764f88 (offset: 0x249ca0) -> 0x49b8c fde=[ 378cc]\n+ 0xffffffffc97650a8 (offset: 0x249dc0) -> 0x49bb0 fde=[ 378f0]\n+ 0xffffffffc9765268 (offset: 0x249f80) -> 0x49bd4 fde=[ 37914]\n+ 0xffffffffc9765428 (offset: 0x24a140) -> 0x49bf8 fde=[ 37938]\n+ 0xffffffffc9765548 (offset: 0x24a260) -> 0x49c1c fde=[ 3795c]\n+ 0xffffffffc9765668 (offset: 0x24a380) -> 0x49c40 fde=[ 37980]\n+ 0xffffffffc9765828 (offset: 0x24a540) -> 0x49c64 fde=[ 379a4]\n+ 0xffffffffc97659e8 (offset: 0x24a700) -> 0x49c88 fde=[ 379c8]\n+ 0xffffffffc9765b08 (offset: 0x24a820) -> 0x49cac fde=[ 379ec]\n+ 0xffffffffc9765c28 (offset: 0x24a940) -> 0x49cd0 fde=[ 37a10]\n+ 0xffffffffc9765de8 (offset: 0x24ab00) -> 0x49cf4 fde=[ 37a34]\n+ 0xffffffffc9765fa8 (offset: 0x24acc0) -> 0x49d18 fde=[ 37a58]\n+ 0xffffffffc97660c8 (offset: 0x24ade0) -> 0x49d3c fde=[ 37a7c]\n+ 0xffffffffc97661e8 (offset: 0x24af00) -> 0x49d60 fde=[ 37aa0]\n+ 0xffffffffc97663a8 (offset: 0x24b0c0) -> 0x49d84 fde=[ 37ac4]\n+ 0xffffffffc9766568 (offset: 0x24b280) -> 0x49da8 fde=[ 37ae8]\n+ 0xffffffffc9766688 (offset: 0x24b3a0) -> 0x49dcc fde=[ 37b0c]\n+ 0xffffffffc97667a8 (offset: 0x24b4c0) -> 0x49df0 fde=[ 37b30]\n+ 0xffffffffc9766968 (offset: 0x24b680) -> 0x49e14 fde=[ 37b54]\n+ 0xffffffffc9766b28 (offset: 0x24b840) -> 0x49e38 fde=[ 37b78]\n+ 0xffffffffc9766c48 (offset: 0x24b960) -> 0x49e5c fde=[ 37b9c]\n+ 0xffffffffc9766d68 (offset: 0x24ba80) -> 0x49e80 fde=[ 37bc0]\n+ 0xffffffffc9766f28 (offset: 0x24bc40) -> 0x49ea4 fde=[ 37be4]\n+ 0xffffffffc97670e8 (offset: 0x24be00) -> 0x49ec8 fde=[ 37c08]\n+ 0xffffffffc9767208 (offset: 0x24bf20) -> 0x49eec fde=[ 37c2c]\n+ 0xffffffffc9767328 (offset: 0x24c040) -> 0x49f10 fde=[ 37c50]\n+ 0xffffffffc97674e8 (offset: 0x24c200) -> 0x49f34 fde=[ 37c74]\n+ 0xffffffffc97676a8 (offset: 0x24c3c0) -> 0x49f58 fde=[ 37c98]\n+ 0xffffffffc97677c8 (offset: 0x24c4e0) -> 0x49f7c fde=[ 37cbc]\n+ 0xffffffffc97678e8 (offset: 0x24c600) -> 0x49fa0 fde=[ 37ce0]\n+ 0xffffffffc9767aa8 (offset: 0x24c7c0) -> 0x49fc4 fde=[ 37d04]\n+ 0xffffffffc9767c68 (offset: 0x24c980) -> 0x49fe8 fde=[ 37d28]\n+ 0xffffffffc9767d88 (offset: 0x24caa0) -> 0x4a00c fde=[ 37d4c]\n+ 0xffffffffc9767ea8 (offset: 0x24cbc0) -> 0x4a030 fde=[ 37d70]\n+ 0xffffffffc9768068 (offset: 0x24cd80) -> 0x4a054 fde=[ 37d94]\n+ 0xffffffffc9768228 (offset: 0x24cf40) -> 0x4a078 fde=[ 37db8]\n+ 0xffffffffc9768348 (offset: 0x24d060) -> 0x4a09c fde=[ 37ddc]\n+ 0xffffffffc9768468 (offset: 0x24d180) -> 0x4a0c0 fde=[ 37e00]\n+ 0xffffffffc9768628 (offset: 0x24d340) -> 0x4a0e4 fde=[ 37e24]\n+ 0xffffffffc97687e8 (offset: 0x24d500) -> 0x4a108 fde=[ 37e48]\n+ 0xffffffffc9768908 (offset: 0x24d620) -> 0x4a12c fde=[ 37e6c]\n+ 0xffffffffc9768a28 (offset: 0x24d740) -> 0x4a150 fde=[ 37e90]\n+ 0xffffffffc97696f8 (offset: 0x24e410) -> 0x4a174 fde=[ 37eb4]\n+ 0xffffffffc9769728 (offset: 0x24e440) -> 0x4a18c fde=[ 37ecc]\n+ 0xffffffffc9773b18 (offset: 0x258830) -> 0x4ba30 fde=[ 39770]\n+ 0xffffffffc9773cd8 (offset: 0x2589f0) -> 0x4ba54 fde=[ 39794]\n+ 0xffffffffc9773e98 (offset: 0x258bb0) -> 0x4ba78 fde=[ 397b8]\n+ 0xffffffffc9773fb8 (offset: 0x258cd0) -> 0x4ba9c fde=[ 397dc]\n+ 0xffffffffc97740d8 (offset: 0x258df0) -> 0x4bac0 fde=[ 39800]\n+ 0xffffffffc9774298 (offset: 0x258fb0) -> 0x4bae4 fde=[ 39824]\n+ 0xffffffffc9774458 (offset: 0x259170) -> 0x4bb08 fde=[ 39848]\n+ 0xffffffffc9774578 (offset: 0x259290) -> 0x4bb2c fde=[ 3986c]\n+ 0xffffffffc9774698 (offset: 0x2593b0) -> 0x4bb50 fde=[ 39890]\n+ 0xffffffffc9774858 (offset: 0x259570) -> 0x4bb74 fde=[ 398b4]\n+ 0xffffffffc9774a18 (offset: 0x259730) -> 0x4bb98 fde=[ 398d8]\n+ 0xffffffffc9774b38 (offset: 0x259850) -> 0x4bbbc fde=[ 398fc]\n+ 0xffffffffc9774c58 (offset: 0x259970) -> 0x4bbe0 fde=[ 39920]\n+ 0xffffffffc9774e18 (offset: 0x259b30) -> 0x4bc04 fde=[ 39944]\n+ 0xffffffffc9774fd8 (offset: 0x259cf0) -> 0x4bc28 fde=[ 39968]\n+ 0xffffffffc97750f8 (offset: 0x259e10) -> 0x4bc4c fde=[ 3998c]\n+ 0xffffffffc9775218 (offset: 0x259f30) -> 0x4bc70 fde=[ 399b0]\n+ 0xffffffffc97753d8 (offset: 0x25a0f0) -> 0x4bc94 fde=[ 399d4]\n+ 0xffffffffc9775598 (offset: 0x25a2b0) -> 0x4bcb8 fde=[ 399f8]\n+ 0xffffffffc97756b8 (offset: 0x25a3d0) -> 0x4bcdc fde=[ 39a1c]\n+ 0xffffffffc97757d8 (offset: 0x25a4f0) -> 0x4bd00 fde=[ 39a40]\n+ 0xffffffffc9775998 (offset: 0x25a6b0) -> 0x4bd24 fde=[ 39a64]\n+ 0xffffffffc9775b58 (offset: 0x25a870) -> 0x4bd48 fde=[ 39a88]\n+ 0xffffffffc9775c78 (offset: 0x25a990) -> 0x4bd6c fde=[ 39aac]\n+ 0xffffffffc9775d98 (offset: 0x25aab0) -> 0x4bd90 fde=[ 39ad0]\n+ 0xffffffffc9775f58 (offset: 0x25ac70) -> 0x4bdb4 fde=[ 39af4]\n+ 0xffffffffc9776118 (offset: 0x25ae30) -> 0x4bdd8 fde=[ 39b18]\n+ 0xffffffffc9776238 (offset: 0x25af50) -> 0x4bdfc fde=[ 39b3c]\n+ 0xffffffffc9776358 (offset: 0x25b070) -> 0x4be20 fde=[ 39b60]\n+ 0xffffffffc9776518 (offset: 0x25b230) -> 0x4be44 fde=[ 39b84]\n+ 0xffffffffc97766d8 (offset: 0x25b3f0) -> 0x4be68 fde=[ 39ba8]\n+ 0xffffffffc97767f8 (offset: 0x25b510) -> 0x4be8c fde=[ 39bcc]\n+ 0xffffffffc9776918 (offset: 0x25b630) -> 0x4beb0 fde=[ 39bf0]\n+ 0xffffffffc9776ad8 (offset: 0x25b7f0) -> 0x4bed4 fde=[ 39c14]\n+ 0xffffffffc9776c98 (offset: 0x25b9b0) -> 0x4bef8 fde=[ 39c38]\n+ 0xffffffffc9776db8 (offset: 0x25bad0) -> 0x4bf1c fde=[ 39c5c]\n+ 0xffffffffc9776ed8 (offset: 0x25bbf0) -> 0x4bf40 fde=[ 39c80]\n+ 0xffffffffc9777098 (offset: 0x25bdb0) -> 0x4bf64 fde=[ 39ca4]\n+ 0xffffffffc9777258 (offset: 0x25bf70) -> 0x4bf88 fde=[ 39cc8]\n+ 0xffffffffc9777378 (offset: 0x25c090) -> 0x4bfac fde=[ 39cec]\n+ 0xffffffffc9777498 (offset: 0x25c1b0) -> 0x4bfd0 fde=[ 39d10]\n+ 0xffffffffc9777658 (offset: 0x25c370) -> 0x4bff4 fde=[ 39d34]\n+ 0xffffffffc9777818 (offset: 0x25c530) -> 0x4c018 fde=[ 39d58]\n+ 0xffffffffc9777938 (offset: 0x25c650) -> 0x4c03c fde=[ 39d7c]\n+ 0xffffffffc9777a58 (offset: 0x25c770) -> 0x4c060 fde=[ 39da0]\n+ 0xffffffffc9777c18 (offset: 0x25c930) -> 0x4c084 fde=[ 39dc4]\n+ 0xffffffffc9777dd8 (offset: 0x25caf0) -> 0x4c0a8 fde=[ 39de8]\n+ 0xffffffffc9777ef8 (offset: 0x25cc10) -> 0x4c0cc fde=[ 39e0c]\n+ 0xffffffffc9778018 (offset: 0x25cd30) -> 0x4c0f0 fde=[ 39e30]\n+ 0xffffffffc97781d8 (offset: 0x25cef0) -> 0x4c114 fde=[ 39e54]\n+ 0xffffffffc9778398 (offset: 0x25d0b0) -> 0x4c138 fde=[ 39e78]\n+ 0xffffffffc97784b8 (offset: 0x25d1d0) -> 0x4c15c fde=[ 39e9c]\n+ 0xffffffffc97785d8 (offset: 0x25d2f0) -> 0x4c180 fde=[ 39ec0]\n+ 0xffffffffc9778798 (offset: 0x25d4b0) -> 0x4c1a4 fde=[ 39ee4]\n+ 0xffffffffc9778958 (offset: 0x25d670) -> 0x4c1c8 fde=[ 39f08]\n+ 0xffffffffc9778a78 (offset: 0x25d790) -> 0x4c1ec fde=[ 39f2c]\n+ 0xffffffffc9778b98 (offset: 0x25d8b0) -> 0x4c210 fde=[ 39f50]\n+ 0xffffffffc9778d58 (offset: 0x25da70) -> 0x4c234 fde=[ 39f74]\n+ 0xffffffffc9778f18 (offset: 0x25dc30) -> 0x4c258 fde=[ 39f98]\n+ 0xffffffffc9779038 (offset: 0x25dd50) -> 0x4c27c fde=[ 39fbc]\n+ 0xffffffffc9779158 (offset: 0x25de70) -> 0x4c2a0 fde=[ 39fe0]\n+ 0xffffffffc9779318 (offset: 0x25e030) -> 0x4c2c4 fde=[ 3a004]\n+ 0xffffffffc97794d8 (offset: 0x25e1f0) -> 0x4c2e8 fde=[ 3a028]\n+ 0xffffffffc97795f8 (offset: 0x25e310) -> 0x4c30c fde=[ 3a04c]\n+ 0xffffffffc9779718 (offset: 0x25e430) -> 0x4c330 fde=[ 3a070]\n+ 0xffffffffc977a3e8 (offset: 0x25f100) -> 0x4c354 fde=[ 3a094]\n+ 0xffffffffc977a418 (offset: 0x25f130) -> 0x4c36c fde=[ 3a0ac]\n+ 0xffffffffc9784968 (offset: 0x269680) -> 0x4dc10 fde=[ 3b950]\n+ 0xffffffffc9784b28 (offset: 0x269840) -> 0x4dc34 fde=[ 3b974]\n+ 0xffffffffc9784ce8 (offset: 0x269a00) -> 0x4dc58 fde=[ 3b998]\n+ 0xffffffffc9784e08 (offset: 0x269b20) -> 0x4dc7c fde=[ 3b9bc]\n+ 0xffffffffc9784f28 (offset: 0x269c40) -> 0x4dca0 fde=[ 3b9e0]\n+ 0xffffffffc97850e8 (offset: 0x269e00) -> 0x4dcc4 fde=[ 3ba04]\n+ 0xffffffffc97852a8 (offset: 0x269fc0) -> 0x4dce8 fde=[ 3ba28]\n+ 0xffffffffc97853c8 (offset: 0x26a0e0) -> 0x4dd0c fde=[ 3ba4c]\n+ 0xffffffffc97854e8 (offset: 0x26a200) -> 0x4dd30 fde=[ 3ba70]\n+ 0xffffffffc97856a8 (offset: 0x26a3c0) -> 0x4dd54 fde=[ 3ba94]\n+ 0xffffffffc9785868 (offset: 0x26a580) -> 0x4dd78 fde=[ 3bab8]\n+ 0xffffffffc9785988 (offset: 0x26a6a0) -> 0x4dd9c fde=[ 3badc]\n+ 0xffffffffc9785aa8 (offset: 0x26a7c0) -> 0x4ddc0 fde=[ 3bb00]\n+ 0xffffffffc9785c68 (offset: 0x26a980) -> 0x4dde4 fde=[ 3bb24]\n+ 0xffffffffc9785e28 (offset: 0x26ab40) -> 0x4de08 fde=[ 3bb48]\n+ 0xffffffffc9785f48 (offset: 0x26ac60) -> 0x4de2c fde=[ 3bb6c]\n+ 0xffffffffc9786068 (offset: 0x26ad80) -> 0x4de50 fde=[ 3bb90]\n+ 0xffffffffc9786228 (offset: 0x26af40) -> 0x4de74 fde=[ 3bbb4]\n+ 0xffffffffc97863e8 (offset: 0x26b100) -> 0x4de98 fde=[ 3bbd8]\n+ 0xffffffffc9786508 (offset: 0x26b220) -> 0x4debc fde=[ 3bbfc]\n+ 0xffffffffc9786628 (offset: 0x26b340) -> 0x4dee0 fde=[ 3bc20]\n+ 0xffffffffc97867e8 (offset: 0x26b500) -> 0x4df04 fde=[ 3bc44]\n+ 0xffffffffc97869a8 (offset: 0x26b6c0) -> 0x4df28 fde=[ 3bc68]\n+ 0xffffffffc9786ac8 (offset: 0x26b7e0) -> 0x4df4c fde=[ 3bc8c]\n+ 0xffffffffc9786be8 (offset: 0x26b900) -> 0x4df70 fde=[ 3bcb0]\n+ 0xffffffffc9786da8 (offset: 0x26bac0) -> 0x4df94 fde=[ 3bcd4]\n+ 0xffffffffc9786f68 (offset: 0x26bc80) -> 0x4dfb8 fde=[ 3bcf8]\n+ 0xffffffffc9787088 (offset: 0x26bda0) -> 0x4dfdc fde=[ 3bd1c]\n+ 0xffffffffc97871a8 (offset: 0x26bec0) -> 0x4e000 fde=[ 3bd40]\n+ 0xffffffffc9787368 (offset: 0x26c080) -> 0x4e024 fde=[ 3bd64]\n+ 0xffffffffc9787528 (offset: 0x26c240) -> 0x4e048 fde=[ 3bd88]\n+ 0xffffffffc9787648 (offset: 0x26c360) -> 0x4e06c fde=[ 3bdac]\n+ 0xffffffffc9787768 (offset: 0x26c480) -> 0x4e090 fde=[ 3bdd0]\n+ 0xffffffffc9787928 (offset: 0x26c640) -> 0x4e0b4 fde=[ 3bdf4]\n+ 0xffffffffc9787ae8 (offset: 0x26c800) -> 0x4e0d8 fde=[ 3be18]\n+ 0xffffffffc9787c08 (offset: 0x26c920) -> 0x4e0fc fde=[ 3be3c]\n+ 0xffffffffc9787d28 (offset: 0x26ca40) -> 0x4e120 fde=[ 3be60]\n+ 0xffffffffc9787ee8 (offset: 0x26cc00) -> 0x4e144 fde=[ 3be84]\n+ 0xffffffffc97880a8 (offset: 0x26cdc0) -> 0x4e168 fde=[ 3bea8]\n+ 0xffffffffc97881c8 (offset: 0x26cee0) -> 0x4e18c fde=[ 3becc]\n+ 0xffffffffc97882e8 (offset: 0x26d000) -> 0x4e1b0 fde=[ 3bef0]\n+ 0xffffffffc97884a8 (offset: 0x26d1c0) -> 0x4e1d4 fde=[ 3bf14]\n+ 0xffffffffc9788668 (offset: 0x26d380) -> 0x4e1f8 fde=[ 3bf38]\n+ 0xffffffffc9788788 (offset: 0x26d4a0) -> 0x4e21c fde=[ 3bf5c]\n+ 0xffffffffc97888a8 (offset: 0x26d5c0) -> 0x4e240 fde=[ 3bf80]\n+ 0xffffffffc9788a68 (offset: 0x26d780) -> 0x4e264 fde=[ 3bfa4]\n+ 0xffffffffc9788c28 (offset: 0x26d940) -> 0x4e288 fde=[ 3bfc8]\n+ 0xffffffffc9788d48 (offset: 0x26da60) -> 0x4e2ac fde=[ 3bfec]\n+ 0xffffffffc9788e68 (offset: 0x26db80) -> 0x4e2d0 fde=[ 3c010]\n+ 0xffffffffc9789028 (offset: 0x26dd40) -> 0x4e2f4 fde=[ 3c034]\n+ 0xffffffffc97891e8 (offset: 0x26df00) -> 0x4e318 fde=[ 3c058]\n+ 0xffffffffc9789308 (offset: 0x26e020) -> 0x4e33c fde=[ 3c07c]\n+ 0xffffffffc9789428 (offset: 0x26e140) -> 0x4e360 fde=[ 3c0a0]\n+ 0xffffffffc97895e8 (offset: 0x26e300) -> 0x4e384 fde=[ 3c0c4]\n+ 0xffffffffc97897a8 (offset: 0x26e4c0) -> 0x4e3a8 fde=[ 3c0e8]\n+ 0xffffffffc97898c8 (offset: 0x26e5e0) -> 0x4e3cc fde=[ 3c10c]\n+ 0xffffffffc97899e8 (offset: 0x26e700) -> 0x4e3f0 fde=[ 3c130]\n+ 0xffffffffc9789ba8 (offset: 0x26e8c0) -> 0x4e414 fde=[ 3c154]\n+ 0xffffffffc9789d68 (offset: 0x26ea80) -> 0x4e438 fde=[ 3c178]\n+ 0xffffffffc9789e88 (offset: 0x26eba0) -> 0x4e45c fde=[ 3c19c]\n+ 0xffffffffc9789fa8 (offset: 0x26ecc0) -> 0x4e480 fde=[ 3c1c0]\n+ 0xffffffffc978a168 (offset: 0x26ee80) -> 0x4e4a4 fde=[ 3c1e4]\n+ 0xffffffffc978a328 (offset: 0x26f040) -> 0x4e4c8 fde=[ 3c208]\n+ 0xffffffffc978a448 (offset: 0x26f160) -> 0x4e4ec fde=[ 3c22c]\n+ 0xffffffffc978a568 (offset: 0x26f280) -> 0x4e510 fde=[ 3c250]\n+ 0xffffffffc978b238 (offset: 0x26ff50) -> 0x4e534 fde=[ 3c274]\n+ 0xffffffffc978b268 (offset: 0x26ff80) -> 0x4e54c fde=[ 3c28c]\n+ 0xffffffffc9795658 (offset: 0x27a370) -> 0x4fdf0 fde=[ 3db30]\n+ 0xffffffffc9795818 (offset: 0x27a530) -> 0x4fe14 fde=[ 3db54]\n+ 0xffffffffc97959d8 (offset: 0x27a6f0) -> 0x4fe38 fde=[ 3db78]\n+ 0xffffffffc9795af8 (offset: 0x27a810) -> 0x4fe5c fde=[ 3db9c]\n+ 0xffffffffc9795c18 (offset: 0x27a930) -> 0x4fe80 fde=[ 3dbc0]\n+ 0xffffffffc9795dd8 (offset: 0x27aaf0) -> 0x4fea4 fde=[ 3dbe4]\n+ 0xffffffffc9795f98 (offset: 0x27acb0) -> 0x4fec8 fde=[ 3dc08]\n+ 0xffffffffc97960b8 (offset: 0x27add0) -> 0x4feec fde=[ 3dc2c]\n+ 0xffffffffc97961d8 (offset: 0x27aef0) -> 0x4ff10 fde=[ 3dc50]\n+ 0xffffffffc9796398 (offset: 0x27b0b0) -> 0x4ff34 fde=[ 3dc74]\n+ 0xffffffffc9796558 (offset: 0x27b270) -> 0x4ff58 fde=[ 3dc98]\n+ 0xffffffffc9796678 (offset: 0x27b390) -> 0x4ff7c fde=[ 3dcbc]\n+ 0xffffffffc9796798 (offset: 0x27b4b0) -> 0x4ffa0 fde=[ 3dce0]\n+ 0xffffffffc9796958 (offset: 0x27b670) -> 0x4ffc4 fde=[ 3dd04]\n+ 0xffffffffc9796b18 (offset: 0x27b830) -> 0x4ffe8 fde=[ 3dd28]\n+ 0xffffffffc9796c38 (offset: 0x27b950) -> 0x5000c fde=[ 3dd4c]\n+ 0xffffffffc9796d58 (offset: 0x27ba70) -> 0x50030 fde=[ 3dd70]\n+ 0xffffffffc9796f18 (offset: 0x27bc30) -> 0x50054 fde=[ 3dd94]\n+ 0xffffffffc97970d8 (offset: 0x27bdf0) -> 0x50078 fde=[ 3ddb8]\n+ 0xffffffffc97971f8 (offset: 0x27bf10) -> 0x5009c fde=[ 3dddc]\n+ 0xffffffffc9797318 (offset: 0x27c030) -> 0x500c0 fde=[ 3de00]\n+ 0xffffffffc97974d8 (offset: 0x27c1f0) -> 0x500e4 fde=[ 3de24]\n+ 0xffffffffc9797698 (offset: 0x27c3b0) -> 0x50108 fde=[ 3de48]\n+ 0xffffffffc97977b8 (offset: 0x27c4d0) -> 0x5012c fde=[ 3de6c]\n+ 0xffffffffc97978d8 (offset: 0x27c5f0) -> 0x50150 fde=[ 3de90]\n+ 0xffffffffc9797a98 (offset: 0x27c7b0) -> 0x50174 fde=[ 3deb4]\n+ 0xffffffffc9797c58 (offset: 0x27c970) -> 0x50198 fde=[ 3ded8]\n+ 0xffffffffc9797d78 (offset: 0x27ca90) -> 0x501bc fde=[ 3defc]\n+ 0xffffffffc9797e98 (offset: 0x27cbb0) -> 0x501e0 fde=[ 3df20]\n+ 0xffffffffc9798058 (offset: 0x27cd70) -> 0x50204 fde=[ 3df44]\n+ 0xffffffffc9798218 (offset: 0x27cf30) -> 0x50228 fde=[ 3df68]\n+ 0xffffffffc9798338 (offset: 0x27d050) -> 0x5024c fde=[ 3df8c]\n+ 0xffffffffc9798458 (offset: 0x27d170) -> 0x50270 fde=[ 3dfb0]\n+ 0xffffffffc9798618 (offset: 0x27d330) -> 0x50294 fde=[ 3dfd4]\n+ 0xffffffffc97987d8 (offset: 0x27d4f0) -> 0x502b8 fde=[ 3dff8]\n+ 0xffffffffc97988f8 (offset: 0x27d610) -> 0x502dc fde=[ 3e01c]\n+ 0xffffffffc9798a18 (offset: 0x27d730) -> 0x50300 fde=[ 3e040]\n+ 0xffffffffc9798bd8 (offset: 0x27d8f0) -> 0x50324 fde=[ 3e064]\n+ 0xffffffffc9798d98 (offset: 0x27dab0) -> 0x50348 fde=[ 3e088]\n+ 0xffffffffc9798eb8 (offset: 0x27dbd0) -> 0x5036c fde=[ 3e0ac]\n+ 0xffffffffc9798fd8 (offset: 0x27dcf0) -> 0x50390 fde=[ 3e0d0]\n+ 0xffffffffc9799198 (offset: 0x27deb0) -> 0x503b4 fde=[ 3e0f4]\n+ 0xffffffffc9799358 (offset: 0x27e070) -> 0x503d8 fde=[ 3e118]\n+ 0xffffffffc9799478 (offset: 0x27e190) -> 0x503fc fde=[ 3e13c]\n+ 0xffffffffc9799598 (offset: 0x27e2b0) -> 0x50420 fde=[ 3e160]\n+ 0xffffffffc9799758 (offset: 0x27e470) -> 0x50444 fde=[ 3e184]\n+ 0xffffffffc9799918 (offset: 0x27e630) -> 0x50468 fde=[ 3e1a8]\n+ 0xffffffffc9799a38 (offset: 0x27e750) -> 0x5048c fde=[ 3e1cc]\n+ 0xffffffffc9799b58 (offset: 0x27e870) -> 0x504b0 fde=[ 3e1f0]\n+ 0xffffffffc9799d18 (offset: 0x27ea30) -> 0x504d4 fde=[ 3e214]\n+ 0xffffffffc9799ed8 (offset: 0x27ebf0) -> 0x504f8 fde=[ 3e238]\n+ 0xffffffffc9799ff8 (offset: 0x27ed10) -> 0x5051c fde=[ 3e25c]\n+ 0xffffffffc979a118 (offset: 0x27ee30) -> 0x50540 fde=[ 3e280]\n+ 0xffffffffc979a2d8 (offset: 0x27eff0) -> 0x50564 fde=[ 3e2a4]\n+ 0xffffffffc979a498 (offset: 0x27f1b0) -> 0x50588 fde=[ 3e2c8]\n+ 0xffffffffc979a5b8 (offset: 0x27f2d0) -> 0x505ac fde=[ 3e2ec]\n+ 0xffffffffc979a6d8 (offset: 0x27f3f0) -> 0x505d0 fde=[ 3e310]\n+ 0xffffffffc979a898 (offset: 0x27f5b0) -> 0x505f4 fde=[ 3e334]\n+ 0xffffffffc979aa58 (offset: 0x27f770) -> 0x50618 fde=[ 3e358]\n+ 0xffffffffc979ab78 (offset: 0x27f890) -> 0x5063c fde=[ 3e37c]\n+ 0xffffffffc979ac98 (offset: 0x27f9b0) -> 0x50660 fde=[ 3e3a0]\n+ 0xffffffffc979ae58 (offset: 0x27fb70) -> 0x50684 fde=[ 3e3c4]\n+ 0xffffffffc979b018 (offset: 0x27fd30) -> 0x506a8 fde=[ 3e3e8]\n+ 0xffffffffc979b138 (offset: 0x27fe50) -> 0x506cc fde=[ 3e40c]\n+ 0xffffffffc979b258 (offset: 0x27ff70) -> 0x506f0 fde=[ 3e430]\n+ 0xffffffffc979bf28 (offset: 0x280c40) -> 0x50714 fde=[ 3e454]\n+ 0xffffffffc979bf58 (offset: 0x280c70) -> 0x5072c fde=[ 3e46c]\n+ 0xffffffffc97a6348 (offset: 0x28b060) -> 0x51fd0 fde=[ 3fd10]\n+ 0xffffffffc97a6508 (offset: 0x28b220) -> 0x51ff4 fde=[ 3fd34]\n+ 0xffffffffc97a66c8 (offset: 0x28b3e0) -> 0x52018 fde=[ 3fd58]\n+ 0xffffffffc97a67e8 (offset: 0x28b500) -> 0x5203c fde=[ 3fd7c]\n+ 0xffffffffc97a6908 (offset: 0x28b620) -> 0x52060 fde=[ 3fda0]\n+ 0xffffffffc97a6ac8 (offset: 0x28b7e0) -> 0x52084 fde=[ 3fdc4]\n+ 0xffffffffc97a6c88 (offset: 0x28b9a0) -> 0x520a8 fde=[ 3fde8]\n+ 0xffffffffc97a6da8 (offset: 0x28bac0) -> 0x520cc fde=[ 3fe0c]\n+ 0xffffffffc97a6ec8 (offset: 0x28bbe0) -> 0x520f0 fde=[ 3fe30]\n+ 0xffffffffc97a7088 (offset: 0x28bda0) -> 0x52114 fde=[ 3fe54]\n+ 0xffffffffc97a7248 (offset: 0x28bf60) -> 0x52138 fde=[ 3fe78]\n+ 0xffffffffc97a7368 (offset: 0x28c080) -> 0x5215c fde=[ 3fe9c]\n+ 0xffffffffc97a7488 (offset: 0x28c1a0) -> 0x52180 fde=[ 3fec0]\n+ 0xffffffffc97a7648 (offset: 0x28c360) -> 0x521a4 fde=[ 3fee4]\n+ 0xffffffffc97a7808 (offset: 0x28c520) -> 0x521c8 fde=[ 3ff08]\n+ 0xffffffffc97a7928 (offset: 0x28c640) -> 0x521ec fde=[ 3ff2c]\n+ 0xffffffffc97a7a48 (offset: 0x28c760) -> 0x52210 fde=[ 3ff50]\n+ 0xffffffffc97a7c08 (offset: 0x28c920) -> 0x52234 fde=[ 3ff74]\n+ 0xffffffffc97a7dc8 (offset: 0x28cae0) -> 0x52258 fde=[ 3ff98]\n+ 0xffffffffc97a7ee8 (offset: 0x28cc00) -> 0x5227c fde=[ 3ffbc]\n+ 0xffffffffc97a8008 (offset: 0x28cd20) -> 0x522a0 fde=[ 3ffe0]\n+ 0xffffffffc97a81c8 (offset: 0x28cee0) -> 0x522c4 fde=[ 40004]\n+ 0xffffffffc97a8388 (offset: 0x28d0a0) -> 0x522e8 fde=[ 40028]\n+ 0xffffffffc97a84a8 (offset: 0x28d1c0) -> 0x5230c fde=[ 4004c]\n+ 0xffffffffc97a85c8 (offset: 0x28d2e0) -> 0x52330 fde=[ 40070]\n+ 0xffffffffc97a8788 (offset: 0x28d4a0) -> 0x52354 fde=[ 40094]\n+ 0xffffffffc97a8948 (offset: 0x28d660) -> 0x52378 fde=[ 400b8]\n+ 0xffffffffc97a8a68 (offset: 0x28d780) -> 0x5239c fde=[ 400dc]\n+ 0xffffffffc97a8b88 (offset: 0x28d8a0) -> 0x523c0 fde=[ 40100]\n+ 0xffffffffc97a8d48 (offset: 0x28da60) -> 0x523e4 fde=[ 40124]\n+ 0xffffffffc97a8f08 (offset: 0x28dc20) -> 0x52408 fde=[ 40148]\n+ 0xffffffffc97a9028 (offset: 0x28dd40) -> 0x5242c fde=[ 4016c]\n+ 0xffffffffc97a9148 (offset: 0x28de60) -> 0x52450 fde=[ 40190]\n+ 0xffffffffc97a9308 (offset: 0x28e020) -> 0x52474 fde=[ 401b4]\n+ 0xffffffffc97a94c8 (offset: 0x28e1e0) -> 0x52498 fde=[ 401d8]\n+ 0xffffffffc97a95e8 (offset: 0x28e300) -> 0x524bc fde=[ 401fc]\n+ 0xffffffffc97a9708 (offset: 0x28e420) -> 0x524e0 fde=[ 40220]\n+ 0xffffffffc97a98c8 (offset: 0x28e5e0) -> 0x52504 fde=[ 40244]\n+ 0xffffffffc97a9a88 (offset: 0x28e7a0) -> 0x52528 fde=[ 40268]\n+ 0xffffffffc97a9ba8 (offset: 0x28e8c0) -> 0x5254c fde=[ 4028c]\n+ 0xffffffffc97a9cc8 (offset: 0x28e9e0) -> 0x52570 fde=[ 402b0]\n+ 0xffffffffc97a9e88 (offset: 0x28eba0) -> 0x52594 fde=[ 402d4]\n+ 0xffffffffc97aa048 (offset: 0x28ed60) -> 0x525b8 fde=[ 402f8]\n+ 0xffffffffc97aa168 (offset: 0x28ee80) -> 0x525dc fde=[ 4031c]\n+ 0xffffffffc97aa288 (offset: 0x28efa0) -> 0x52600 fde=[ 40340]\n+ 0xffffffffc97aa448 (offset: 0x28f160) -> 0x52624 fde=[ 40364]\n+ 0xffffffffc97aa608 (offset: 0x28f320) -> 0x52648 fde=[ 40388]\n+ 0xffffffffc97aa728 (offset: 0x28f440) -> 0x5266c fde=[ 403ac]\n+ 0xffffffffc97aa848 (offset: 0x28f560) -> 0x52690 fde=[ 403d0]\n+ 0xffffffffc97aaa08 (offset: 0x28f720) -> 0x526b4 fde=[ 403f4]\n+ 0xffffffffc97aabc8 (offset: 0x28f8e0) -> 0x526d8 fde=[ 40418]\n+ 0xffffffffc97aace8 (offset: 0x28fa00) -> 0x526fc fde=[ 4043c]\n+ 0xffffffffc97aae08 (offset: 0x28fb20) -> 0x52720 fde=[ 40460]\n+ 0xffffffffc97aafc8 (offset: 0x28fce0) -> 0x52744 fde=[ 40484]\n+ 0xffffffffc97ab188 (offset: 0x28fea0) -> 0x52768 fde=[ 404a8]\n+ 0xffffffffc97ab2a8 (offset: 0x28ffc0) -> 0x5278c fde=[ 404cc]\n+ 0xffffffffc97ab3c8 (offset: 0x2900e0) -> 0x527b0 fde=[ 404f0]\n+ 0xffffffffc97ab588 (offset: 0x2902a0) -> 0x527d4 fde=[ 40514]\n+ 0xffffffffc97ab748 (offset: 0x290460) -> 0x527f8 fde=[ 40538]\n+ 0xffffffffc97ab868 (offset: 0x290580) -> 0x5281c fde=[ 4055c]\n+ 0xffffffffc97ab988 (offset: 0x2906a0) -> 0x52840 fde=[ 40580]\n+ 0xffffffffc97abb48 (offset: 0x290860) -> 0x52864 fde=[ 405a4]\n+ 0xffffffffc97abd08 (offset: 0x290a20) -> 0x52888 fde=[ 405c8]\n+ 0xffffffffc97abe28 (offset: 0x290b40) -> 0x528ac fde=[ 405ec]\n+ 0xffffffffc97abf48 (offset: 0x290c60) -> 0x528d0 fde=[ 40610]\n+ 0xffffffffc97acc18 (offset: 0x291930) -> 0x528f4 fde=[ 40634]\n+ 0xffffffffc97acc48 (offset: 0x291960) -> 0x5290c fde=[ 4064c]\n+ 0xffffffffc97b7218 (offset: 0x29bf30) -> 0x541b0 fde=[ 41ef0]\n+ 0xffffffffc97b73d8 (offset: 0x29c0f0) -> 0x541d4 fde=[ 41f14]\n+ 0xffffffffc97b7598 (offset: 0x29c2b0) -> 0x541f8 fde=[ 41f38]\n+ 0xffffffffc97b76b8 (offset: 0x29c3d0) -> 0x5421c fde=[ 41f5c]\n+ 0xffffffffc97b77d8 (offset: 0x29c4f0) -> 0x54240 fde=[ 41f80]\n+ 0xffffffffc97b7998 (offset: 0x29c6b0) -> 0x54264 fde=[ 41fa4]\n+ 0xffffffffc97b7b58 (offset: 0x29c870) -> 0x54288 fde=[ 41fc8]\n+ 0xffffffffc97b7c78 (offset: 0x29c990) -> 0x542ac fde=[ 41fec]\n+ 0xffffffffc97b7d98 (offset: 0x29cab0) -> 0x542d0 fde=[ 42010]\n+ 0xffffffffc97b7f58 (offset: 0x29cc70) -> 0x542f4 fde=[ 42034]\n+ 0xffffffffc97b8118 (offset: 0x29ce30) -> 0x54318 fde=[ 42058]\n+ 0xffffffffc97b8238 (offset: 0x29cf50) -> 0x5433c fde=[ 4207c]\n+ 0xffffffffc97b8358 (offset: 0x29d070) -> 0x54360 fde=[ 420a0]\n+ 0xffffffffc97b8518 (offset: 0x29d230) -> 0x54384 fde=[ 420c4]\n+ 0xffffffffc97b86d8 (offset: 0x29d3f0) -> 0x543a8 fde=[ 420e8]\n+ 0xffffffffc97b87f8 (offset: 0x29d510) -> 0x543cc fde=[ 4210c]\n+ 0xffffffffc97b8918 (offset: 0x29d630) -> 0x543f0 fde=[ 42130]\n+ 0xffffffffc97b8ad8 (offset: 0x29d7f0) -> 0x54414 fde=[ 42154]\n+ 0xffffffffc97b8c98 (offset: 0x29d9b0) -> 0x54438 fde=[ 42178]\n+ 0xffffffffc97b8db8 (offset: 0x29dad0) -> 0x5445c fde=[ 4219c]\n+ 0xffffffffc97b8ed8 (offset: 0x29dbf0) -> 0x54480 fde=[ 421c0]\n+ 0xffffffffc97b9098 (offset: 0x29ddb0) -> 0x544a4 fde=[ 421e4]\n+ 0xffffffffc97b9258 (offset: 0x29df70) -> 0x544c8 fde=[ 42208]\n+ 0xffffffffc97b9378 (offset: 0x29e090) -> 0x544ec fde=[ 4222c]\n+ 0xffffffffc97b9498 (offset: 0x29e1b0) -> 0x54510 fde=[ 42250]\n+ 0xffffffffc97b9658 (offset: 0x29e370) -> 0x54534 fde=[ 42274]\n+ 0xffffffffc97b9818 (offset: 0x29e530) -> 0x54558 fde=[ 42298]\n+ 0xffffffffc97b9938 (offset: 0x29e650) -> 0x5457c fde=[ 422bc]\n+ 0xffffffffc97b9a58 (offset: 0x29e770) -> 0x545a0 fde=[ 422e0]\n+ 0xffffffffc97b9c18 (offset: 0x29e930) -> 0x545c4 fde=[ 42304]\n+ 0xffffffffc97b9dd8 (offset: 0x29eaf0) -> 0x545e8 fde=[ 42328]\n+ 0xffffffffc97b9ef8 (offset: 0x29ec10) -> 0x5460c fde=[ 4234c]\n+ 0xffffffffc97ba018 (offset: 0x29ed30) -> 0x54630 fde=[ 42370]\n+ 0xffffffffc97ba1d8 (offset: 0x29eef0) -> 0x54654 fde=[ 42394]\n+ 0xffffffffc97ba398 (offset: 0x29f0b0) -> 0x54678 fde=[ 423b8]\n+ 0xffffffffc97ba4b8 (offset: 0x29f1d0) -> 0x5469c fde=[ 423dc]\n+ 0xffffffffc97ba5d8 (offset: 0x29f2f0) -> 0x546c0 fde=[ 42400]\n+ 0xffffffffc97ba798 (offset: 0x29f4b0) -> 0x546e4 fde=[ 42424]\n+ 0xffffffffc97ba958 (offset: 0x29f670) -> 0x54708 fde=[ 42448]\n+ 0xffffffffc97baa78 (offset: 0x29f790) -> 0x5472c fde=[ 4246c]\n+ 0xffffffffc97bab98 (offset: 0x29f8b0) -> 0x54750 fde=[ 42490]\n+ 0xffffffffc97bad58 (offset: 0x29fa70) -> 0x54774 fde=[ 424b4]\n+ 0xffffffffc97baf18 (offset: 0x29fc30) -> 0x54798 fde=[ 424d8]\n+ 0xffffffffc97bb038 (offset: 0x29fd50) -> 0x547bc fde=[ 424fc]\n+ 0xffffffffc97bb158 (offset: 0x29fe70) -> 0x547e0 fde=[ 42520]\n+ 0xffffffffc97bb318 (offset: 0x2a0030) -> 0x54804 fde=[ 42544]\n+ 0xffffffffc97bb4d8 (offset: 0x2a01f0) -> 0x54828 fde=[ 42568]\n+ 0xffffffffc97bb5f8 (offset: 0x2a0310) -> 0x5484c fde=[ 4258c]\n+ 0xffffffffc97bb718 (offset: 0x2a0430) -> 0x54870 fde=[ 425b0]\n+ 0xffffffffc97bb8d8 (offset: 0x2a05f0) -> 0x54894 fde=[ 425d4]\n+ 0xffffffffc97bba98 (offset: 0x2a07b0) -> 0x548b8 fde=[ 425f8]\n+ 0xffffffffc97bbbb8 (offset: 0x2a08d0) -> 0x548dc fde=[ 4261c]\n+ 0xffffffffc97bbcd8 (offset: 0x2a09f0) -> 0x54900 fde=[ 42640]\n+ 0xffffffffc97bbe98 (offset: 0x2a0bb0) -> 0x54924 fde=[ 42664]\n+ 0xffffffffc97bc058 (offset: 0x2a0d70) -> 0x54948 fde=[ 42688]\n+ 0xffffffffc97bc178 (offset: 0x2a0e90) -> 0x5496c fde=[ 426ac]\n+ 0xffffffffc97bc298 (offset: 0x2a0fb0) -> 0x54990 fde=[ 426d0]\n+ 0xffffffffc97bc458 (offset: 0x2a1170) -> 0x549b4 fde=[ 426f4]\n+ 0xffffffffc97bc618 (offset: 0x2a1330) -> 0x549d8 fde=[ 42718]\n+ 0xffffffffc97bc738 (offset: 0x2a1450) -> 0x549fc fde=[ 4273c]\n+ 0xffffffffc97bc858 (offset: 0x2a1570) -> 0x54a20 fde=[ 42760]\n+ 0xffffffffc97bca18 (offset: 0x2a1730) -> 0x54a44 fde=[ 42784]\n+ 0xffffffffc97bcbd8 (offset: 0x2a18f0) -> 0x54a68 fde=[ 427a8]\n+ 0xffffffffc97bccf8 (offset: 0x2a1a10) -> 0x54a8c fde=[ 427cc]\n+ 0xffffffffc97bce18 (offset: 0x2a1b30) -> 0x54ab0 fde=[ 427f0]\n+ 0xffffffffc97bdae8 (offset: 0x2a2800) -> 0x54ad4 fde=[ 42814]\n+ 0xffffffffc97bdb18 (offset: 0x2a2830) -> 0x54aec fde=[ 4282c]\n+ 0xffffffffc97c80e8 (offset: 0x2ace00) -> 0x56390 fde=[ 440d0]\n+ 0xffffffffc97c82a8 (offset: 0x2acfc0) -> 0x563b4 fde=[ 440f4]\n+ 0xffffffffc97c8468 (offset: 0x2ad180) -> 0x563d8 fde=[ 44118]\n+ 0xffffffffc97c8588 (offset: 0x2ad2a0) -> 0x563fc fde=[ 4413c]\n+ 0xffffffffc97c86a8 (offset: 0x2ad3c0) -> 0x56420 fde=[ 44160]\n+ 0xffffffffc97c8868 (offset: 0x2ad580) -> 0x56444 fde=[ 44184]\n+ 0xffffffffc97c8a28 (offset: 0x2ad740) -> 0x56468 fde=[ 441a8]\n+ 0xffffffffc97c8b48 (offset: 0x2ad860) -> 0x5648c fde=[ 441cc]\n+ 0xffffffffc97c8c68 (offset: 0x2ad980) -> 0x564b0 fde=[ 441f0]\n+ 0xffffffffc97c8e28 (offset: 0x2adb40) -> 0x564d4 fde=[ 44214]\n+ 0xffffffffc97c8fe8 (offset: 0x2add00) -> 0x564f8 fde=[ 44238]\n+ 0xffffffffc97c9108 (offset: 0x2ade20) -> 0x5651c fde=[ 4425c]\n+ 0xffffffffc97c9228 (offset: 0x2adf40) -> 0x56540 fde=[ 44280]\n+ 0xffffffffc97c93e8 (offset: 0x2ae100) -> 0x56564 fde=[ 442a4]\n+ 0xffffffffc97c95a8 (offset: 0x2ae2c0) -> 0x56588 fde=[ 442c8]\n+ 0xffffffffc97c96c8 (offset: 0x2ae3e0) -> 0x565ac fde=[ 442ec]\n+ 0xffffffffc97c97e8 (offset: 0x2ae500) -> 0x565d0 fde=[ 44310]\n+ 0xffffffffc97c99a8 (offset: 0x2ae6c0) -> 0x565f4 fde=[ 44334]\n+ 0xffffffffc97c9b68 (offset: 0x2ae880) -> 0x56618 fde=[ 44358]\n+ 0xffffffffc97c9c88 (offset: 0x2ae9a0) -> 0x5663c fde=[ 4437c]\n+ 0xffffffffc97c9da8 (offset: 0x2aeac0) -> 0x56660 fde=[ 443a0]\n+ 0xffffffffc97c9f68 (offset: 0x2aec80) -> 0x56684 fde=[ 443c4]\n+ 0xffffffffc97ca128 (offset: 0x2aee40) -> 0x566a8 fde=[ 443e8]\n+ 0xffffffffc97ca248 (offset: 0x2aef60) -> 0x566cc fde=[ 4440c]\n+ 0xffffffffc97ca368 (offset: 0x2af080) -> 0x566f0 fde=[ 44430]\n+ 0xffffffffc97ca528 (offset: 0x2af240) -> 0x56714 fde=[ 44454]\n+ 0xffffffffc97ca6e8 (offset: 0x2af400) -> 0x56738 fde=[ 44478]\n+ 0xffffffffc97ca808 (offset: 0x2af520) -> 0x5675c fde=[ 4449c]\n+ 0xffffffffc97ca928 (offset: 0x2af640) -> 0x56780 fde=[ 444c0]\n+ 0xffffffffc97caae8 (offset: 0x2af800) -> 0x567a4 fde=[ 444e4]\n+ 0xffffffffc97caca8 (offset: 0x2af9c0) -> 0x567c8 fde=[ 44508]\n+ 0xffffffffc97cadc8 (offset: 0x2afae0) -> 0x567ec fde=[ 4452c]\n+ 0xffffffffc97caee8 (offset: 0x2afc00) -> 0x56810 fde=[ 44550]\n+ 0xffffffffc97cb0a8 (offset: 0x2afdc0) -> 0x56834 fde=[ 44574]\n+ 0xffffffffc97cb268 (offset: 0x2aff80) -> 0x56858 fde=[ 44598]\n+ 0xffffffffc97cb388 (offset: 0x2b00a0) -> 0x5687c fde=[ 445bc]\n+ 0xffffffffc97cb4a8 (offset: 0x2b01c0) -> 0x568a0 fde=[ 445e0]\n+ 0xffffffffc97cb668 (offset: 0x2b0380) -> 0x568c4 fde=[ 44604]\n+ 0xffffffffc97cb828 (offset: 0x2b0540) -> 0x568e8 fde=[ 44628]\n+ 0xffffffffc97cb948 (offset: 0x2b0660) -> 0x5690c fde=[ 4464c]\n+ 0xffffffffc97cba68 (offset: 0x2b0780) -> 0x56930 fde=[ 44670]\n+ 0xffffffffc97cbc28 (offset: 0x2b0940) -> 0x56954 fde=[ 44694]\n+ 0xffffffffc97cbde8 (offset: 0x2b0b00) -> 0x56978 fde=[ 446b8]\n+ 0xffffffffc97cbf08 (offset: 0x2b0c20) -> 0x5699c fde=[ 446dc]\n+ 0xffffffffc97cc028 (offset: 0x2b0d40) -> 0x569c0 fde=[ 44700]\n+ 0xffffffffc97cc1e8 (offset: 0x2b0f00) -> 0x569e4 fde=[ 44724]\n+ 0xffffffffc97cc3a8 (offset: 0x2b10c0) -> 0x56a08 fde=[ 44748]\n+ 0xffffffffc97cc4c8 (offset: 0x2b11e0) -> 0x56a2c fde=[ 4476c]\n+ 0xffffffffc97cc5e8 (offset: 0x2b1300) -> 0x56a50 fde=[ 44790]\n+ 0xffffffffc97cc7a8 (offset: 0x2b14c0) -> 0x56a74 fde=[ 447b4]\n+ 0xffffffffc97cc968 (offset: 0x2b1680) -> 0x56a98 fde=[ 447d8]\n+ 0xffffffffc97cca88 (offset: 0x2b17a0) -> 0x56abc fde=[ 447fc]\n+ 0xffffffffc97ccba8 (offset: 0x2b18c0) -> 0x56ae0 fde=[ 44820]\n+ 0xffffffffc97ccd68 (offset: 0x2b1a80) -> 0x56b04 fde=[ 44844]\n+ 0xffffffffc97ccf28 (offset: 0x2b1c40) -> 0x56b28 fde=[ 44868]\n+ 0xffffffffc97cd048 (offset: 0x2b1d60) -> 0x56b4c fde=[ 4488c]\n+ 0xffffffffc97cd168 (offset: 0x2b1e80) -> 0x56b70 fde=[ 448b0]\n+ 0xffffffffc97cd328 (offset: 0x2b2040) -> 0x56b94 fde=[ 448d4]\n+ 0xffffffffc97cd4e8 (offset: 0x2b2200) -> 0x56bb8 fde=[ 448f8]\n+ 0xffffffffc97cd608 (offset: 0x2b2320) -> 0x56bdc fde=[ 4491c]\n+ 0xffffffffc97cd728 (offset: 0x2b2440) -> 0x56c00 fde=[ 44940]\n+ 0xffffffffc97cd8e8 (offset: 0x2b2600) -> 0x56c24 fde=[ 44964]\n+ 0xffffffffc97cdaa8 (offset: 0x2b27c0) -> 0x56c48 fde=[ 44988]\n+ 0xffffffffc97cdbc8 (offset: 0x2b28e0) -> 0x56c6c fde=[ 449ac]\n+ 0xffffffffc97cdce8 (offset: 0x2b2a00) -> 0x56c90 fde=[ 449d0]\n+ 0xffffffffc97ce9b8 (offset: 0x2b36d0) -> 0x56cb4 fde=[ 449f4]\n+ 0xffffffffc97ce9e8 (offset: 0x2b3700) -> 0x56ccc fde=[ 44a0c]\n+ 0xffffffffc97d8dd8 (offset: 0x2bdaf0) -> 0x585e4 fde=[ 46324]\n+ 0xffffffffc97d90a8 (offset: 0x2bddc0) -> 0x58608 fde=[ 46348]\n+ 0xffffffffc97d9148 (offset: 0x2bde60) -> 0x5862c fde=[ 4636c]\n+ 0xffffffffc97d91d8 (offset: 0x2bdef0) -> 0x58650 fde=[ 46390]\n+ 0xffffffffc97d94a8 (offset: 0x2be1c0) -> 0x58674 fde=[ 463b4]\n+ 0xffffffffc97d9778 (offset: 0x2be490) -> 0x58698 fde=[ 463d8]\n+ 0xffffffffc97d9818 (offset: 0x2be530) -> 0x586bc fde=[ 463fc]\n+ 0xffffffffc97d9ae8 (offset: 0x2be800) -> 0x586e0 fde=[ 46420]\n+ 0xffffffffc97d9db8 (offset: 0x2bead0) -> 0x58704 fde=[ 46444]\n+ 0xffffffffc97d9e58 (offset: 0x2beb70) -> 0x58728 fde=[ 46468]\n+ 0xffffffffc97da128 (offset: 0x2bee40) -> 0x5874c fde=[ 4648c]\n+ 0xffffffffc97da3f8 (offset: 0x2bf110) -> 0x58770 fde=[ 464b0]\n+ 0xffffffffc97da498 (offset: 0x2bf1b0) -> 0x58794 fde=[ 464d4]\n+ 0xffffffffc97da768 (offset: 0x2bf480) -> 0x587b8 fde=[ 464f8]\n+ 0xffffffffc97da9f8 (offset: 0x2bf710) -> 0x587dc fde=[ 4651c]\n+ 0xffffffffc97daa28 (offset: 0x2bf740) -> 0x58570 fde=[ 462b0]\n+ 0xffffffffc97dac28 (offset: 0x2bf940) -> 0x587f4 fde=[ 46534]\n+ 0xffffffffc97dbd48 (offset: 0x2c0a60) -> 0x589d0 fde=[ 46710]\n+ 0xffffffffc97dce88 (offset: 0x2c1ba0) -> 0x58bac fde=[ 468ec]\n+ 0xffffffffc97ddfc8 (offset: 0x2c2ce0) -> 0x58dfc fde=[ 46b3c]\n+ 0xffffffffc97de298 (offset: 0x2c2fb0) -> 0x58e20 fde=[ 46b60]\n+ 0xffffffffc97de338 (offset: 0x2c3050) -> 0x58e44 fde=[ 46b84]\n+ 0xffffffffc97de3c8 (offset: 0x2c30e0) -> 0x58e68 fde=[ 46ba8]\n+ 0xffffffffc97de698 (offset: 0x2c33b0) -> 0x58e8c fde=[ 46bcc]\n+ 0xffffffffc97de968 (offset: 0x2c3680) -> 0x58eb0 fde=[ 46bf0]\n+ 0xffffffffc97dea08 (offset: 0x2c3720) -> 0x58ed4 fde=[ 46c14]\n+ 0xffffffffc97decd8 (offset: 0x2c39f0) -> 0x58ef8 fde=[ 46c38]\n+ 0xffffffffc97defa8 (offset: 0x2c3cc0) -> 0x58f1c fde=[ 46c5c]\n+ 0xffffffffc97df048 (offset: 0x2c3d60) -> 0x58f40 fde=[ 46c80]\n+ 0xffffffffc97df318 (offset: 0x2c4030) -> 0x58f64 fde=[ 46ca4]\n+ 0xffffffffc97df5e8 (offset: 0x2c4300) -> 0x58f88 fde=[ 46cc8]\n+ 0xffffffffc97df688 (offset: 0x2c43a0) -> 0x58fac fde=[ 46cec]\n+ 0xffffffffc97df958 (offset: 0x2c4670) -> 0x58fd0 fde=[ 46d10]\n+ 0xffffffffc97dfbe8 (offset: 0x2c4900) -> 0x58ff4 fde=[ 46d34]\n+ 0xffffffffc97dfc18 (offset: 0x2c4930) -> 0x58d88 fde=[ 46ac8]\n+ 0xffffffffc97dfdf8 (offset: 0x2c4b10) -> 0x59084 fde=[ 46dc4]\n+ 0xffffffffc97e00c8 (offset: 0x2c4de0) -> 0x590a8 fde=[ 46de8]\n+ 0xffffffffc97e0168 (offset: 0x2c4e80) -> 0x590cc fde=[ 46e0c]\n+ 0xffffffffc97e01f8 (offset: 0x2c4f10) -> 0x590f0 fde=[ 46e30]\n+ 0xffffffffc97e04c8 (offset: 0x2c51e0) -> 0x59114 fde=[ 46e54]\n+ 0xffffffffc97e0798 (offset: 0x2c54b0) -> 0x59138 fde=[ 46e78]\n+ 0xffffffffc97e0838 (offset: 0x2c5550) -> 0x5915c fde=[ 46e9c]\n+ 0xffffffffc97e0b08 (offset: 0x2c5820) -> 0x59180 fde=[ 46ec0]\n+ 0xffffffffc97e0dd8 (offset: 0x2c5af0) -> 0x591a4 fde=[ 46ee4]\n+ 0xffffffffc97e0e78 (offset: 0x2c5b90) -> 0x591c8 fde=[ 46f08]\n+ 0xffffffffc97e1148 (offset: 0x2c5e60) -> 0x591ec fde=[ 46f2c]\n+ 0xffffffffc97e1418 (offset: 0x2c6130) -> 0x59210 fde=[ 46f50]\n+ 0xffffffffc97e14b8 (offset: 0x2c61d0) -> 0x59234 fde=[ 46f74]\n+ 0xffffffffc97e1788 (offset: 0x2c64a0) -> 0x59258 fde=[ 46f98]\n+ 0xffffffffc97e1a18 (offset: 0x2c6730) -> 0x5927c fde=[ 46fbc]\n+ 0xffffffffc97e1a48 (offset: 0x2c6760) -> 0x59010 fde=[ 46d50]\n+ 0xffffffffc97e1c48 (offset: 0x2c6960) -> 0x5930c fde=[ 4704c]\n+ 0xffffffffc97e1f18 (offset: 0x2c6c30) -> 0x59330 fde=[ 47070]\n+ 0xffffffffc97e1fb8 (offset: 0x2c6cd0) -> 0x59354 fde=[ 47094]\n+ 0xffffffffc97e2048 (offset: 0x2c6d60) -> 0x59378 fde=[ 470b8]\n+ 0xffffffffc97e2318 (offset: 0x2c7030) -> 0x5939c fde=[ 470dc]\n+ 0xffffffffc97e25e8 (offset: 0x2c7300) -> 0x593c0 fde=[ 47100]\n+ 0xffffffffc97e2688 (offset: 0x2c73a0) -> 0x593e4 fde=[ 47124]\n+ 0xffffffffc97e2958 (offset: 0x2c7670) -> 0x59408 fde=[ 47148]\n+ 0xffffffffc97e2c28 (offset: 0x2c7940) -> 0x5942c fde=[ 4716c]\n+ 0xffffffffc97e2cc8 (offset: 0x2c79e0) -> 0x59450 fde=[ 47190]\n+ 0xffffffffc97e2f98 (offset: 0x2c7cb0) -> 0x59474 fde=[ 471b4]\n+ 0xffffffffc97e3268 (offset: 0x2c7f80) -> 0x59498 fde=[ 471d8]\n+ 0xffffffffc97e3308 (offset: 0x2c8020) -> 0x594bc fde=[ 471fc]\n+ 0xffffffffc97e35d8 (offset: 0x2c82f0) -> 0x594e0 fde=[ 47220]\n+ 0xffffffffc97e3868 (offset: 0x2c8580) -> 0x59504 fde=[ 47244]\n+ 0xffffffffc97e3898 (offset: 0x2c85b0) -> 0x59298 fde=[ 46fd8]\n+ 0xffffffffc97e3a78 (offset: 0x2c8790) -> 0x59594 fde=[ 472d4]\n+ 0xffffffffc97e3d48 (offset: 0x2c8a60) -> 0x595b8 fde=[ 472f8]\n+ 0xffffffffc97e3de8 (offset: 0x2c8b00) -> 0x595dc fde=[ 4731c]\n+ 0xffffffffc97e3e78 (offset: 0x2c8b90) -> 0x59600 fde=[ 47340]\n+ 0xffffffffc97e4148 (offset: 0x2c8e60) -> 0x59624 fde=[ 47364]\n+ 0xffffffffc97e4418 (offset: 0x2c9130) -> 0x59648 fde=[ 47388]\n+ 0xffffffffc97e44b8 (offset: 0x2c91d0) -> 0x5966c fde=[ 473ac]\n+ 0xffffffffc97e4788 (offset: 0x2c94a0) -> 0x59690 fde=[ 473d0]\n+ 0xffffffffc97e4a58 (offset: 0x2c9770) -> 0x596b4 fde=[ 473f4]\n+ 0xffffffffc97e4af8 (offset: 0x2c9810) -> 0x596d8 fde=[ 47418]\n+ 0xffffffffc97e4dc8 (offset: 0x2c9ae0) -> 0x596fc fde=[ 4743c]\n+ 0xffffffffc97e5098 (offset: 0x2c9db0) -> 0x59720 fde=[ 47460]\n+ 0xffffffffc97e5138 (offset: 0x2c9e50) -> 0x59744 fde=[ 47484]\n+ 0xffffffffc97e5408 (offset: 0x2ca120) -> 0x59768 fde=[ 474a8]\n+ 0xffffffffc97e5698 (offset: 0x2ca3b0) -> 0x5978c fde=[ 474cc]\n+ 0xffffffffc97e56c8 (offset: 0x2ca3e0) -> 0x59520 fde=[ 47260]\n+ 0xffffffffc97e58c8 (offset: 0x2ca5e0) -> 0x5981c fde=[ 4755c]\n+ 0xffffffffc97e5b98 (offset: 0x2ca8b0) -> 0x59840 fde=[ 47580]\n+ 0xffffffffc97e5c38 (offset: 0x2ca950) -> 0x59864 fde=[ 475a4]\n+ 0xffffffffc97e5cc8 (offset: 0x2ca9e0) -> 0x59888 fde=[ 475c8]\n+ 0xffffffffc97e5f98 (offset: 0x2cacb0) -> 0x598ac fde=[ 475ec]\n+ 0xffffffffc97e6268 (offset: 0x2caf80) -> 0x598d0 fde=[ 47610]\n+ 0xffffffffc97e6308 (offset: 0x2cb020) -> 0x598f4 fde=[ 47634]\n+ 0xffffffffc97e65d8 (offset: 0x2cb2f0) -> 0x59918 fde=[ 47658]\n+ 0xffffffffc97e68a8 (offset: 0x2cb5c0) -> 0x5993c fde=[ 4767c]\n+ 0xffffffffc97e6948 (offset: 0x2cb660) -> 0x59960 fde=[ 476a0]\n+ 0xffffffffc97e6c18 (offset: 0x2cb930) -> 0x59984 fde=[ 476c4]\n+ 0xffffffffc97e6ee8 (offset: 0x2cbc00) -> 0x599a8 fde=[ 476e8]\n+ 0xffffffffc97e6f88 (offset: 0x2cbca0) -> 0x599cc fde=[ 4770c]\n+ 0xffffffffc97e7258 (offset: 0x2cbf70) -> 0x599f0 fde=[ 47730]\n+ 0xffffffffc97e74e8 (offset: 0x2cc200) -> 0x59a14 fde=[ 47754]\n+ 0xffffffffc97e7518 (offset: 0x2cc230) -> 0x597a8 fde=[ 474e8]\n+ 0xffffffffc97e7718 (offset: 0x2cc430) -> 0x59a2c fde=[ 4776c]\n+ 0xffffffffc97e8838 (offset: 0x2cd550) -> 0x59c08 fde=[ 47948]\n+ 0xffffffffc97e9978 (offset: 0x2ce690) -> 0x59de4 fde=[ 47b24]\n+ 0xffffffffc97eaab8 (offset: 0x2cf7d0) -> 0x5a034 fde=[ 47d74]\n+ 0xffffffffc97ead88 (offset: 0x2cfaa0) -> 0x5a058 fde=[ 47d98]\n+ 0xffffffffc97eae28 (offset: 0x2cfb40) -> 0x5a07c fde=[ 47dbc]\n+ 0xffffffffc97eaeb8 (offset: 0x2cfbd0) -> 0x5a0a0 fde=[ 47de0]\n+ 0xffffffffc97eb188 (offset: 0x2cfea0) -> 0x5a0c4 fde=[ 47e04]\n+ 0xffffffffc97eb458 (offset: 0x2d0170) -> 0x5a0e8 fde=[ 47e28]\n+ 0xffffffffc97eb4f8 (offset: 0x2d0210) -> 0x5a10c fde=[ 47e4c]\n+ 0xffffffffc97eb7c8 (offset: 0x2d04e0) -> 0x5a130 fde=[ 47e70]\n+ 0xffffffffc97eba98 (offset: 0x2d07b0) -> 0x5a154 fde=[ 47e94]\n+ 0xffffffffc97ebb38 (offset: 0x2d0850) -> 0x5a178 fde=[ 47eb8]\n+ 0xffffffffc97ebe08 (offset: 0x2d0b20) -> 0x5a19c fde=[ 47edc]\n+ 0xffffffffc97ec0d8 (offset: 0x2d0df0) -> 0x5a1c0 fde=[ 47f00]\n+ 0xffffffffc97ec178 (offset: 0x2d0e90) -> 0x5a1e4 fde=[ 47f24]\n+ 0xffffffffc97ec448 (offset: 0x2d1160) -> 0x5a208 fde=[ 47f48]\n+ 0xffffffffc97ec6d8 (offset: 0x2d13f0) -> 0x5a22c fde=[ 47f6c]\n+ 0xffffffffc97ec708 (offset: 0x2d1420) -> 0x59fc0 fde=[ 47d00]\n+ 0xffffffffc97ec908 (offset: 0x2d1620) -> 0x5a244 fde=[ 47f84]\n+ 0xffffffffc97eda28 (offset: 0x2d2740) -> 0x5a420 fde=[ 48160]\n+ 0xffffffffc97eeb68 (offset: 0x2d3880) -> 0x5a5fc fde=[ 4833c]\n+ 0xffffffffc97efca8 (offset: 0x2d49c0) -> 0x5a84c fde=[ 4858c]\n+ 0xffffffffc97eff78 (offset: 0x2d4c90) -> 0x5a870 fde=[ 485b0]\n+ 0xffffffffc97f0018 (offset: 0x2d4d30) -> 0x5a894 fde=[ 485d4]\n+ 0xffffffffc97f00a8 (offset: 0x2d4dc0) -> 0x5a8b8 fde=[ 485f8]\n+ 0xffffffffc97f0378 (offset: 0x2d5090) -> 0x5a8dc fde=[ 4861c]\n+ 0xffffffffc97f0648 (offset: 0x2d5360) -> 0x5a900 fde=[ 48640]\n+ 0xffffffffc97f06e8 (offset: 0x2d5400) -> 0x5a924 fde=[ 48664]\n+ 0xffffffffc97f09b8 (offset: 0x2d56d0) -> 0x5a948 fde=[ 48688]\n+ 0xffffffffc97f0c88 (offset: 0x2d59a0) -> 0x5a96c fde=[ 486ac]\n+ 0xffffffffc97f0d28 (offset: 0x2d5a40) -> 0x5a990 fde=[ 486d0]\n+ 0xffffffffc97f0ff8 (offset: 0x2d5d10) -> 0x5a9b4 fde=[ 486f4]\n+ 0xffffffffc97f12c8 (offset: 0x2d5fe0) -> 0x5a9d8 fde=[ 48718]\n+ 0xffffffffc97f1368 (offset: 0x2d6080) -> 0x5a9fc fde=[ 4873c]\n+ 0xffffffffc97f1638 (offset: 0x2d6350) -> 0x5aa20 fde=[ 48760]\n+ 0xffffffffc97f18c8 (offset: 0x2d65e0) -> 0x5aa44 fde=[ 48784]\n+ 0xffffffffc97f18f8 (offset: 0x2d6610) -> 0x5a7d8 fde=[ 48518]\n+ 0xffffffffc97f1ad8 (offset: 0x2d67f0) -> 0x5aad4 fde=[ 48814]\n+ 0xffffffffc97f1da8 (offset: 0x2d6ac0) -> 0x5aaf8 fde=[ 48838]\n+ 0xffffffffc97f1e48 (offset: 0x2d6b60) -> 0x5ab1c fde=[ 4885c]\n+ 0xffffffffc97f1ed8 (offset: 0x2d6bf0) -> 0x5ab40 fde=[ 48880]\n+ 0xffffffffc97f21a8 (offset: 0x2d6ec0) -> 0x5ab64 fde=[ 488a4]\n+ 0xffffffffc97f2478 (offset: 0x2d7190) -> 0x5ab88 fde=[ 488c8]\n+ 0xffffffffc97f2518 (offset: 0x2d7230) -> 0x5abac fde=[ 488ec]\n+ 0xffffffffc97f27e8 (offset: 0x2d7500) -> 0x5abd0 fde=[ 48910]\n+ 0xffffffffc97f2ab8 (offset: 0x2d77d0) -> 0x5abf4 fde=[ 48934]\n+ 0xffffffffc97f2b58 (offset: 0x2d7870) -> 0x5ac18 fde=[ 48958]\n+ 0xffffffffc97f2e28 (offset: 0x2d7b40) -> 0x5ac3c fde=[ 4897c]\n+ 0xffffffffc97f30f8 (offset: 0x2d7e10) -> 0x5ac60 fde=[ 489a0]\n+ 0xffffffffc97f3198 (offset: 0x2d7eb0) -> 0x5ac84 fde=[ 489c4]\n+ 0xffffffffc97f3468 (offset: 0x2d8180) -> 0x5aca8 fde=[ 489e8]\n+ 0xffffffffc97f36f8 (offset: 0x2d8410) -> 0x5accc fde=[ 48a0c]\n+ 0xffffffffc97f3728 (offset: 0x2d8440) -> 0x5aa60 fde=[ 487a0]\n+ 0xffffffffc97f3908 (offset: 0x2d8620) -> 0x5ad5c fde=[ 48a9c]\n+ 0xffffffffc97f3bd8 (offset: 0x2d88f0) -> 0x5ad80 fde=[ 48ac0]\n+ 0xffffffffc97f3c78 (offset: 0x2d8990) -> 0x5ada4 fde=[ 48ae4]\n+ 0xffffffffc97f3d08 (offset: 0x2d8a20) -> 0x5adc8 fde=[ 48b08]\n+ 0xffffffffc97f3fd8 (offset: 0x2d8cf0) -> 0x5adec fde=[ 48b2c]\n+ 0xffffffffc97f42a8 (offset: 0x2d8fc0) -> 0x5ae10 fde=[ 48b50]\n+ 0xffffffffc97f4348 (offset: 0x2d9060) -> 0x5ae34 fde=[ 48b74]\n+ 0xffffffffc97f4618 (offset: 0x2d9330) -> 0x5ae58 fde=[ 48b98]\n+ 0xffffffffc97f48e8 (offset: 0x2d9600) -> 0x5ae7c fde=[ 48bbc]\n+ 0xffffffffc97f4988 (offset: 0x2d96a0) -> 0x5aea0 fde=[ 48be0]\n+ 0xffffffffc97f4c58 (offset: 0x2d9970) -> 0x5aec4 fde=[ 48c04]\n+ 0xffffffffc97f4f28 (offset: 0x2d9c40) -> 0x5aee8 fde=[ 48c28]\n+ 0xffffffffc97f4fc8 (offset: 0x2d9ce0) -> 0x5af0c fde=[ 48c4c]\n+ 0xffffffffc97f5298 (offset: 0x2d9fb0) -> 0x5af30 fde=[ 48c70]\n+ 0xffffffffc97f5528 (offset: 0x2da240) -> 0x5af54 fde=[ 48c94]\n+ 0xffffffffc97f5558 (offset: 0x2da270) -> 0x5ace8 fde=[ 48a28]\n+ 0xffffffffc97f5738 (offset: 0x2da450) -> 0x5af70 fde=[ 48cb0]\n+ 0xffffffffc97f5838 (offset: 0x2da550) -> 0x5af84 fde=[ 48cc4]\n+ 0xffffffffc97f5848 (offset: 0x2da560) -> 0x5af98 fde=[ 48cd8]\n \n Contents of the .eh_frame section:\n \n \n 00000000 0000000000000014 00000000 CIE\n Version: 1\n Augmentation: \"zR\"\n"}, {"source1": "strings --all --bytes=8 {}", "source2": "strings --all --bytes=8 {}", "unified_diff": "@@ -1274571,15 +1274571,15 @@\n .max_flat_workgroup_size\n N_ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n .private_segment_fixed_size\n .sgpr_count*\n .sgpr_spill_count\n Q_ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii.kd\n .vgpr_count@\n-.vgpr_spill_countL\n+.vgpr_spill_countN\n .wavefront_size@\n .address_space\n .value_kind\n global_buffer\n .address_space\n .value_kind\n global_buffer\n@@ -1275131,15 +1275131,15 @@\n .max_flat_workgroup_size\n N_ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n .private_segment_fixed_size\n .sgpr_count*\n .sgpr_spill_count\n Q_ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii.kd\n .vgpr_count@\n-.vgpr_spill_counto\n+.vgpr_spill_countu\n .wavefront_size@\n .address_space\n .value_kind\n global_buffer\n .address_space\n .value_kind\n global_buffer\n@@ -1277112,14 +1277112,16 @@\n rr88SR29UR8\n \"'&2#)&8\n ((8\"'*2#),8\n '&2!)&8\n )(2!)(2\n !)(2\"+(8\n **8!),2\"+.8\n+\"%$2#'$8\n+&&8!%*2\"',8\n dh2>gj8)KT2\n dl2>gn8*9d2\n dp2>gr8*7d2\n dt2>gv8*5d2\n RR2>UT8:9h2\n hh2>kj8:7l2\n lp2>or8:5l2\n@@ -1277168,30 +1277170,27 @@\n RR8(ML2)OL8\n LZ8+/.2)-,4\n dd81_^22a^8\n l801022/.4\n TT2/WV80[Z2\n bb80]\\21_\\8\n l821021/.4\n-vv8:102;308\n ~8=322<104\n rr88{p29}p8\n >l89542>324\n \"\"21%$8=C@2\n >3227528\n |z87A@2=C@8\n @r8>5427324\n rr25ut86\n 65423748\n lj84oh25qh8\n db867627544\n nl85qj26sj8\n f877628544\n-vt89yr2:{r8\n-n8;982<764\n =762:968\n zx8;}v2<\n rp8=982>764\n >>2\"A@8;\n <<2\"?>8;\n &8=;:2>984\n ~|8!cB2>eB8\n@@ -1337883,30 +1337882,30 @@\n rr88SR29UR8\n \"'&2#)&8\n ((8\"'*2#),8\n '&2!)&8\n )(2!)(2\n !)(2\"+(8\n **8!),2\"+.8\n-\"%$2#'$8\n-&&8!%*2\"',8\n dh2>gj8)KT2\n dl2>gn8*9d2\n dp2>gr8*7d2\n dt2>gv8*5d2\n RR2>UT8:9h2\n hh2>kj8:7l2\n lp2>or8:5l2\n rr88SR29UR8\n \"'&2#)&8\n ((8\"'*2#),8\n '&2!)&8\n )(2!)(2\n \"#\"2#%\"8\n $$8!#*2\"%,8\n+\"%$2#'$8\n+&&8!%*2\"',8\n 8P#>2Q%@8\n 2r74,G58,\n p30,!16,\n u96,J7:,\n 4~s52,\"38,\n & 26#\"87Md2\n &dd26gf8\n@@ -1337963,16 +1337962,17 @@\n F~%GD, E\n >>2'GD, EH,q\n L~*MJ, KN,\n rr25ut86\n 65423748\n lj84oh25qh8\n db867627544\n-nl85qj26sj8\n-f877628544\n+LL25ON86qz2\n+ll85oj26qj8\n+f867628544\n N~)OL, M\n )KH,mIL,v\n P~*QN, O\n ,QN, OR,\n ;7628968\n vt89yr2:{r8\n n8;982<764\n@@ -1399211,14 +1399211,15 @@\n \"\"21%$8=C@2\n >3227528\n |z87A@2=C@8\n @r8>5427324\n H~&IF, G\n D~$EB, C\n &EB, CF,\n+rr25ut86\n 65423748\n lj84oh25qh8\n db867627544\n 75425748\n nl85qj26sj8\n Lf877628544\n L~(MJ, K\n@@ -1399232,17 +1399233,15 @@\n =762:968\n zx8;}v2<\n r(8=982>764\n L~(MJ, K\n P~*QN, O\n L~(MJ, K\n *MJ, KN,\n->>2\"A@8;\n-<<2\"?>8;\n-&8=;:2>984\n+$8=;:2>984\n ~|8!cB2>eB8\n \"89;:2>984\n >>2,QN,sOR,\n IH2 C@2\n T~,UR, S\n P~*QN,QO\n P~,QN,QOR,p\n@@ -1457324,15 +1457323,15 @@\n .max_flat_workgroup_size\n N_ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n .private_segment_fixed_size\n .sgpr_count.\n .sgpr_spill_count\n Q_ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii.kd\n .vgpr_count@\n-.vgpr_spill_countD\n+.vgpr_spill_countA\n .wavefront_size@\n read_only\n .address_space\n .value_kind\n global_buffer\n read_only\n .address_space\n@@ -1459848,18 +1459847,17 @@\n bb80]\\21_\\8\n l821021/.4\n vv8:102;308\n ~8=322<104\n 222#Cr,p\n rr88{p29}p8\n >l89542>324\n-\"\"21%$8=C@2\n->3227528\n-|z87A@2=C@8\n-@~8>5427324\n+>3228528\n+|z88A@2=C@8\n+@~8>5428324\n rr25ut86\n 65423748\n lj84oh25qh8\n db867627544\n nl85qj26sj8\n f877628544\n vt89yr2:{r8\n@@ -1517717,15 +1517715,15 @@\n .max_flat_workgroup_size\n N_ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n .private_segment_fixed_size\n .sgpr_count.\n .sgpr_spill_count\n Q_ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii.kd\n .vgpr_count@\n-.vgpr_spill_countD\n+.vgpr_spill_countA\n .wavefront_size@\n read_only\n .address_space\n .value_kind\n global_buffer\n read_only\n .address_space\n@@ -1518225,15 +1518223,15 @@\n .max_flat_workgroup_size\n N_ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n .private_segment_fixed_size\n .sgpr_count*\n .sgpr_spill_count\n Q_ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii.kd\n .vgpr_count@\n-.vgpr_spill_countu\n+.vgpr_spill_counto\n .wavefront_size@\n .address_space\n .value_kind\n global_buffer\n .address_space\n .value_kind\n global_buffer\n@@ -1520184,14 +1520182,16 @@\n rr88SR29UR8\n \"'&2#)&8\n ((8\"'*2#),8\n '&2!)&8\n )(2!)(2\n !)(2\"+(8\n **8!),2\"+.8\n+\"%$2#'$8\n+&&8!%*2\"',8\n dh2>gj8)KT2\n dl2>gn8*9d2\n dp2>gr8*7d2\n dt2>gv8*5d2\n RR2>UT8:9h2\n hh2>kj8:7l2\n lp2>or8:5l2\n@@ -1520243,24 +1520243,25 @@\n RR2/UT8.eX2\n bb80]\\21_\\8\n l821021/.4\n vv8:102;308\n ~8=322<104\n rr88{p29}p8\n >l89542>324\n-\"\"21%$8=C@2\n->3227528\n-|z87A@2=C@8\n-@~8>5427324\n+>3228528\n+|z88A@2=C@8\n+@~8>5428324\n rr25ut86\n 65423748\n lj84oh25qh8\n db867627544\n nl85qj26sj8\n f877628544\n+vt89yr2:{r8\n+n8;982<764\n =762:968\n zx8;}v2<\n rp8=982>764\n >>2\"A@8;\n <<2\"?>8;\n t8=;:2>984\n ~|8!cB2>eB8\n@@ -1697218,15 +1697219,15 @@\n .max_flat_workgroup_size\n N_ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n .private_segment_fixed_size\n .sgpr_count.\n .sgpr_spill_count\n Q_ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii.kd\n .vgpr_count@\n-.vgpr_spill_count2\n+.vgpr_spill_count4\n .wavefront_size@\n read_only\n .address_space\n .value_kind\n global_buffer\n read_only\n .address_space\n@@ -1700026,15 +1700027,17 @@\n LZ8+/.2)-,4\n dd81_^22a^8\n l801022/.4\n RR2/UT8.eX2\n bb80]\\21_\\8\n l821021/.4\n vv8:102;308\n-8=322<104\n+vv8:102;308\n+ #\"2!%\"8\n+$$8 #&2!%(8#\n rr88{p29}p8\n >l89542>324\n \"\"21%$8=C@2\n >3227528\n |z87A@2=C@8\n @~8>5427324\n \"\"2'GF2<\n@@ -2001974,14 +2001977,16 @@\n &dd26gf8\n &dd26gf8\n &dd26gf8\n nn86ed27gd8\n -02 /28!%,2\n !102\"308\n 228!142\"368\n+\"-,2#/,8\n+..8!-22\"/48\n & 26#\"87Id2\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n@@ -2240944,28 +2240949,28 @@\n &dd26gf8\n &dd26gf8\n &dd26gf8\n nn86ed27gd8\n -02 /28!%,2\n !102\"308\n 228!142\"368\n+\"-,2#/,8\n+..8!-22\"/48\n & 26#\"87Id2\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n &dd26gf8\n nn86ed27gd8\n -02 /28%%,2\n %+*2&-*8\n ,,8!+22%-48\n-%-,2&/,8\n-..8!-22%/48\n )-,2+/,8\n RR8(ML2)OL8\n LZ8+/.2)-,4\n )-,2+/,8\n RR8(ML2)OL8\n LZ8+/.2)-,4\n dd81_^22a^8\n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.init {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.init {}", "unified_diff": "@@ -2,13 +2,13 @@\n \n \n Disassembly of section .init:\n \n 0000000000022000 <.init>:\n _init():\n \tsub $0x8,%rsp\n-\tmov 0x36b22f15(%rip),%rax \n+\tmov 0x36b23f15(%rip),%rax \n \ttest %rax,%rax\n \tje 22012 \n \tcall *%rax\n \tadd $0x8,%rsp\n \tret\n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt {}", "unified_diff": "@@ -1,1954 +1,1954 @@\n \n \n \n Disassembly of section .plt:\n \n 0000000000022020 :\n-\tpush 0x36b222b2(%rip) # 36b442d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38a0>\n-\tjmp *0x36b222b4(%rip) # 36b442e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38a8>\n+\tpush 0x36b232b2(%rip) # 36b452d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38a0>\n+\tjmp *0x36b232b4(%rip) # 36b452e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38a8>\n \tnopl 0x0(%rax)\n \n 0000000000022030 :\n-\tjmp *0x36b222b2(%rip) \n+\tjmp *0x36b232b2(%rip) \n \tpush $0x0\n \tjmp 22020 \n \n 0000000000022040 :\n-\tjmp *0x36b222aa(%rip) \n+\tjmp *0x36b232aa(%rip) \n \tpush $0x1\n \tjmp 22020 \n \n 0000000000022050 :\n-\tjmp *0x36b222a2(%rip) \n+\tjmp *0x36b232a2(%rip) \n \tpush $0x2\n \tjmp 22020 \n \n 0000000000022060 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b2229a(%rip) # 36b44300 ::~ggml_cuda_pool_alloc()@@Base+0x36ac77b0>\n+\tjmp *0x36b2329a(%rip) # 36b45300 ::~ggml_cuda_pool_alloc()@@Base+0x36ac87b0>\n \tpush $0x3\n \tjmp 22020 \n \n 0000000000022070 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b22292(%rip) # 36b44308 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36906bb8>\n+\tjmp *0x36b23292(%rip) # 36b45308 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36907bb8>\n \tpush $0x4\n \tjmp 22020 \n \n 0000000000022080 :\n-\tjmp *0x36b2228a(%rip) \n+\tjmp *0x36b2328a(%rip) \n \tpush $0x5\n \tjmp 22020 \n \n 0000000000022090 :\n-\tjmp *0x36b22282(%rip) \n+\tjmp *0x36b23282(%rip) \n \tpush $0x6\n \tjmp 22020 \n \n 00000000000220a0 , std::allocator >::_M_replace(unsigned long, unsigned long, char const*, unsigned long)@plt>:\n-\tjmp *0x36b2227a(%rip) # 36b44320 , std::allocator >::_M_replace(unsigned long, unsigned long, char const*, unsigned long)@Base>\n+\tjmp *0x36b2327a(%rip) # 36b45320 , std::allocator >::_M_replace(unsigned long, unsigned long, char const*, unsigned long)@Base>\n \tpush $0x7\n \tjmp 22020 \n \n 00000000000220b0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22272(%rip) # 36b44328 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3ee58>\n+\tjmp *0x36b23272(%rip) # 36b45328 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3fe58>\n \tpush $0x8\n \tjmp 22020 \n \n 00000000000220c0 :\n-\tjmp *0x36b2226a(%rip) \n+\tjmp *0x36b2326a(%rip) \n \tpush $0x9\n \tjmp 22020 \n \n 00000000000220d0 :\n-\tjmp *0x36b22262(%rip) \n+\tjmp *0x36b23262(%rip) \n \tpush $0xa\n \tjmp 22020 \n \n 00000000000220e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2225a(%rip) # 36b44340 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d5590>\n+\tjmp *0x36b2325a(%rip) # 36b45340 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d6590>\n \tpush $0xb\n \tjmp 22020 \n \n 00000000000220f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22252(%rip) # 36b44348 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36affc68>\n+\tjmp *0x36b23252(%rip) # 36b45348 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36b00c68>\n \tpush $0xc\n \tjmp 22020 \n \n 0000000000022100 :\n-\tjmp *0x36b2224a(%rip) \n+\tjmp *0x36b2324a(%rip) \n \tpush $0xd\n \tjmp 22020 \n \n 0000000000022110 :\n-\tjmp *0x36b22242(%rip) \n+\tjmp *0x36b23242(%rip) \n \tpush $0xe\n \tjmp 22020 \n \n 0000000000022120 :\n-\tjmp *0x36b2223a(%rip) \n+\tjmp *0x36b2323a(%rip) \n \tpush $0xf\n \tjmp 22020 \n \n 0000000000022130 :\n-\tjmp *0x36b22232(%rip) \n+\tjmp *0x36b23232(%rip) \n \tpush $0x10\n \tjmp 22020 \n \n 0000000000022140 :\n-\tjmp *0x36b2222a(%rip) \n+\tjmp *0x36b2322a(%rip) \n \tpush $0x11\n \tjmp 22020 \n \n 0000000000022150 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22222(%rip) # 36b44378 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ddc28>\n+\tjmp *0x36b23222(%rip) # 36b45378 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369dec28>\n \tpush $0x12\n \tjmp 22020 \n \n 0000000000022160 :\n-\tjmp *0x36b2221a(%rip) \n+\tjmp *0x36b2321a(%rip) \n \tpush $0x13\n \tjmp 22020 \n \n 0000000000022170 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22212(%rip) # 36b44388 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a02ba8>\n+\tjmp *0x36b23212(%rip) # 36b45388 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a03ba8>\n \tpush $0x14\n \tjmp 22020 \n \n 0000000000022180 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2220a(%rip) # 36b44390 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a09e00>\n+\tjmp *0x36b2320a(%rip) # 36b45390 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a0ae00>\n \tpush $0x15\n \tjmp 22020 \n \n 0000000000022190 :\n-\tjmp *0x36b22202(%rip) \n+\tjmp *0x36b23202(%rip) \n \tpush $0x16\n \tjmp 22020 \n \n 00000000000221a0 <__cxa_begin_catch@plt>:\n-\tjmp *0x36b221fa(%rip) \n+\tjmp *0x36b231fa(%rip) \n \tpush $0x17\n \tjmp 22020 \n \n 00000000000221b0 :\n-\tjmp *0x36b221f2(%rip) \n+\tjmp *0x36b231f2(%rip) \n \tpush $0x18\n \tjmp 22020 \n \n 00000000000221c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b221ea(%rip) # 36b443b0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a258b0>\n+\tjmp *0x36b231ea(%rip) # 36b453b0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a268b0>\n \tpush $0x19\n \tjmp 22020 \n \n 00000000000221d0 :\n-\tjmp *0x36b221e2(%rip) \n+\tjmp *0x36b231e2(%rip) \n \tpush $0x1a\n \tjmp 22020 \n \n 00000000000221e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b221da(%rip) # 36b443c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36af1b20>\n+\tjmp *0x36b231da(%rip) # 36b453c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36af2b20>\n \tpush $0x1b\n \tjmp 22020 \n \n 00000000000221f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b221d2(%rip) # 36b443c8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36870b48>\n+\tjmp *0x36b231d2(%rip) # 36b453c8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36871b48>\n \tpush $0x1c\n \tjmp 22020 \n \n 0000000000022200 :\n-\tjmp *0x36b221ca(%rip) \n+\tjmp *0x36b231ca(%rip) \n \tpush $0x1d\n \tjmp 22020 \n \n 0000000000022210 :\n-\tjmp *0x36b221c2(%rip) \n+\tjmp *0x36b231c2(%rip) \n \tpush $0x1e\n \tjmp 22020 \n \n 0000000000022220 :\n-\tjmp *0x36b221ba(%rip) \n+\tjmp *0x36b231ba(%rip) \n \tpush $0x1f\n \tjmp 22020 \n \n 0000000000022230 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b221b2(%rip) # 36b443e8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36917ae8>\n+\tjmp *0x36b231b2(%rip) # 36b453e8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36918ae8>\n \tpush $0x20\n \tjmp 22020 \n \n 0000000000022240 :\n-\tjmp *0x36b221aa(%rip) \n+\tjmp *0x36b231aa(%rip) \n \tpush $0x21\n \tjmp 22020 \n \n 0000000000022250 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b221a2(%rip) # 36b443f8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369b7b88>\n+\tjmp *0x36b231a2(%rip) # 36b453f8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369b8b88>\n \tpush $0x22\n \tjmp 22020 \n \n 0000000000022260 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2219a(%rip) # 36b44400 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d6810>\n+\tjmp *0x36b2319a(%rip) # 36b45400 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d7810>\n \tpush $0x23\n \tjmp 22020 \n \n 0000000000022270 <__hipPushCallConfiguration@plt>:\n-\tjmp *0x36b22192(%rip) \n+\tjmp *0x36b23192(%rip) \n \tpush $0x24\n \tjmp 22020 \n \n 0000000000022280 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2218a(%rip) # 36b44410 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fa5e0>\n+\tjmp *0x36b2318a(%rip) # 36b45410 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fb5e0>\n \tpush $0x25\n \tjmp 22020 \n \n 0000000000022290 :\n-\tjmp *0x36b22182(%rip) \n+\tjmp *0x36b23182(%rip) \n \tpush $0x26\n \tjmp 22020 \n \n 00000000000222a0 :\n-\tjmp *0x36b2217a(%rip) \n+\tjmp *0x36b2317a(%rip) \n \tpush $0x27\n \tjmp 22020 \n \n 00000000000222b0 :\n-\tjmp *0x36b22172(%rip) \n+\tjmp *0x36b23172(%rip) \n \tpush $0x28\n \tjmp 22020 \n \n 00000000000222c0 :\n-\tjmp *0x36b2216a(%rip) \n+\tjmp *0x36b2316a(%rip) \n \tpush $0x29\n \tjmp 22020 \n \n 00000000000222d0 <__hipRegisterFatBinary@plt>:\n-\tjmp *0x36b22162(%rip) \n+\tjmp *0x36b23162(%rip) \n \tpush $0x2a\n \tjmp 22020 \n \n 00000000000222e0 :\n-\tjmp *0x36b2215a(%rip) \n+\tjmp *0x36b2315a(%rip) \n \tpush $0x2b\n \tjmp 22020 \n \n 00000000000222f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22152(%rip) # 36b44448 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36878018>\n+\tjmp *0x36b23152(%rip) # 36b45448 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36879018>\n \tpush $0x2c\n \tjmp 22020 \n \n 0000000000022300 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2214a(%rip) # 36b44450 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a34a80>\n+\tjmp *0x36b2314a(%rip) # 36b45450 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a35a80>\n \tpush $0x2d\n \tjmp 22020 \n \n 0000000000022310 :\n-\tjmp *0x36b22142(%rip) \n+\tjmp *0x36b23142(%rip) \n \tpush $0x2e\n \tjmp 22020 \n \n 0000000000022320 :\n-\tjmp *0x36b2213a(%rip) \n+\tjmp *0x36b2313a(%rip) \n \tpush $0x2f\n \tjmp 22020 \n \n 0000000000022330 :\n-\tjmp *0x36b22132(%rip) \n+\tjmp *0x36b23132(%rip) \n \tpush $0x30\n \tjmp 22020 \n \n 0000000000022340 <__hipPopCallConfiguration@plt>:\n-\tjmp *0x36b2212a(%rip) \n+\tjmp *0x36b2312a(%rip) \n \tpush $0x31\n \tjmp 22020 \n \n 0000000000022350 :\n-\tjmp *0x36b22122(%rip) \n+\tjmp *0x36b23122(%rip) \n \tpush $0x32\n \tjmp 22020 \n \n 0000000000022360 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2211a(%rip) # 36b44480 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aec5a0>\n+\tjmp *0x36b2311a(%rip) # 36b45480 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aed5a0>\n \tpush $0x33\n \tjmp 22020 \n \n 0000000000022370 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22112(%rip) # 36b44488 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c3838>\n+\tjmp *0x36b23112(%rip) # 36b45488 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c4838>\n \tpush $0x34\n \tjmp 22020 \n \n 0000000000022380 :\n-\tjmp *0x36b2210a(%rip) \n+\tjmp *0x36b2310a(%rip) \n \tpush $0x35\n \tjmp 22020 \n \n 0000000000022390 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b22102(%rip) # 36b44498 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3687dd38>\n+\tjmp *0x36b23102(%rip) # 36b45498 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3687ed38>\n \tpush $0x36\n \tjmp 22020 \n \n 00000000000223a0 :\n-\tjmp *0x36b220fa(%rip) \n+\tjmp *0x36b230fa(%rip) \n \tpush $0x37\n \tjmp 22020 \n \n 00000000000223b0 :\n-\tjmp *0x36b220f2(%rip) \n+\tjmp *0x36b230f2(%rip) \n \tpush $0x38\n \tjmp 22020 \n \n 00000000000223c0 :\n-\tjmp *0x36b220ea(%rip) \n+\tjmp *0x36b230ea(%rip) \n \tpush $0x39\n \tjmp 22020 \n \n 00000000000223d0 :\n-\tjmp *0x36b220e2(%rip) \n+\tjmp *0x36b230e2(%rip) \n \tpush $0x3a\n \tjmp 22020 \n \n 00000000000223e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b220da(%rip) # 36b444c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1cb60>\n+\tjmp *0x36b230da(%rip) # 36b454c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1db60>\n \tpush $0x3b\n \tjmp 22020 \n \n 00000000000223f0 :\n-\tjmp *0x36b220d2(%rip) \n+\tjmp *0x36b230d2(%rip) \n \tpush $0x3c\n \tjmp 22020 \n \n 0000000000022400 :\n-\tjmp *0x36b220ca(%rip) \n+\tjmp *0x36b230ca(%rip) \n \tpush $0x3d\n \tjmp 22020 \n \n 0000000000022410 :\n-\tjmp *0x36b220c2(%rip) \n+\tjmp *0x36b230c2(%rip) \n \tpush $0x3e\n \tjmp 22020 \n \n 0000000000022420 :\n-\tjmp *0x36b220ba(%rip) \n+\tjmp *0x36b230ba(%rip) \n \tpush $0x3f\n \tjmp 22020 \n \n 0000000000022430 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b220b2(%rip) # 36b444e8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a13308>\n+\tjmp *0x36b230b2(%rip) # 36b454e8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a14308>\n \tpush $0x40\n \tjmp 22020 \n \n 0000000000022440 :\n-\tjmp *0x36b220aa(%rip) \n+\tjmp *0x36b230aa(%rip) \n \tpush $0x41\n \tjmp 22020 \n \n 0000000000022450 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b220a2(%rip) # 36b444f8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x369288e8>\n+\tjmp *0x36b230a2(%rip) # 36b454f8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x369298e8>\n \tpush $0x42\n \tjmp 22020 \n \n 0000000000022460 :\n-\tjmp *0x36b2209a(%rip) \n+\tjmp *0x36b2309a(%rip) \n \tpush $0x43\n \tjmp 22020 \n \n 0000000000022470 :\n-\tjmp *0x36b22092(%rip) \n+\tjmp *0x36b23092(%rip) \n \tpush $0x44\n \tjmp 22020 \n \n 0000000000022480 :\n-\tjmp *0x36b2208a(%rip) \n+\tjmp *0x36b2308a(%rip) \n \tpush $0x45\n \tjmp 22020 \n \n 0000000000022490 <__cxa_guard_release@plt>:\n-\tjmp *0x36b22082(%rip) \n+\tjmp *0x36b23082(%rip) \n \tpush $0x46\n \tjmp 22020 \n \n 00000000000224a0 :\n-\tjmp *0x36b2207a(%rip) \n+\tjmp *0x36b2307a(%rip) \n \tpush $0x47\n \tjmp 22020 \n \n 00000000000224b0 :\n-\tjmp *0x36b22072(%rip) \n+\tjmp *0x36b23072(%rip) \n \tpush $0x48\n \tjmp 22020 \n \n 00000000000224c0 :\n-\tjmp *0x36b2206a(%rip) \n+\tjmp *0x36b2306a(%rip) \n \tpush $0x49\n \tjmp 22020 \n \n 00000000000224d0 :\n-\tjmp *0x36b22062(%rip) \n+\tjmp *0x36b23062(%rip) \n \tpush $0x4a\n \tjmp 22020 \n \n 00000000000224e0 :\n-\tjmp *0x36b2205a(%rip) \n+\tjmp *0x36b2305a(%rip) \n \tpush $0x4b\n \tjmp 22020 \n \n 00000000000224f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b22052(%rip) # 36b44548 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d7b18>\n+\tjmp *0x36b23052(%rip) # 36b45548 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d8b18>\n \tpush $0x4c\n \tjmp 22020 \n \n 0000000000022500 :\n-\tjmp *0x36b2204a(%rip) \n+\tjmp *0x36b2304a(%rip) \n \tpush $0x4d\n \tjmp 22020 \n \n 0000000000022510 :\n-\tjmp *0x36b22042(%rip) \n+\tjmp *0x36b23042(%rip) \n \tpush $0x4e\n \tjmp 22020 \n \n 0000000000022520 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2203a(%rip) # 36b44560 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a20170>\n+\tjmp *0x36b2303a(%rip) # 36b45560 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a21170>\n \tpush $0x4f\n \tjmp 22020 \n \n 0000000000022530 :\n-\tjmp *0x36b22032(%rip) \n+\tjmp *0x36b23032(%rip) \n \tpush $0x50\n \tjmp 22020 \n \n 0000000000022540 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b2202a(%rip) # 36b44570 ::~ggml_cuda_pool_alloc()@@Base+0x36acb360>\n+\tjmp *0x36b2302a(%rip) # 36b45570 ::~ggml_cuda_pool_alloc()@@Base+0x36acc360>\n \tpush $0x51\n \tjmp 22020 \n \n 0000000000022550 :\n-\tjmp *0x36b22022(%rip) \n+\tjmp *0x36b23022(%rip) \n \tpush $0x52\n \tjmp 22020 \n \n 0000000000022560 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2201a(%rip) # 36b44580 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fdc90>\n+\tjmp *0x36b2301a(%rip) # 36b45580 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fec90>\n \tpush $0x53\n \tjmp 22020 \n \n 0000000000022570 :\n-\tjmp *0x36b22012(%rip) \n+\tjmp *0x36b23012(%rip) \n \tpush $0x54\n \tjmp 22020 \n \n 0000000000022580 <__cxa_atexit@plt>:\n-\tjmp *0x36b2200a(%rip) \n+\tjmp *0x36b2300a(%rip) \n \tpush $0x55\n \tjmp 22020 \n \n 0000000000022590 <__hipUnregisterFatBinary@plt>:\n-\tjmp *0x36b22002(%rip) \n+\tjmp *0x36b23002(%rip) \n \tpush $0x56\n \tjmp 22020 \n \n 00000000000225a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21ffa(%rip) # 36b445a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36884c60>\n+\tjmp *0x36b22ffa(%rip) # 36b455a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36885c60>\n \tpush $0x57\n \tjmp 22020 \n \n 00000000000225b0 :\n-\tjmp *0x36b21ff2(%rip) \n+\tjmp *0x36b22ff2(%rip) \n \tpush $0x58\n \tjmp 22020 \n \n 00000000000225c0 :\n-\tjmp *0x36b21fea(%rip) \n+\tjmp *0x36b22fea(%rip) \n \tpush $0x59\n \tjmp 22020 \n \n 00000000000225d0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21fe2(%rip) # 36b445b8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cf528>\n+\tjmp *0x36b22fe2(%rip) # 36b455b8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d0528>\n \tpush $0x5a\n \tjmp 22020 \n \n 00000000000225e0 :\n-\tjmp *0x36b21fda(%rip) \n+\tjmp *0x36b22fda(%rip) \n \tpush $0x5b\n \tjmp 22020 \n \n 00000000000225f0 :\n-\tjmp *0x36b21fd2(%rip) \n+\tjmp *0x36b22fd2(%rip) \n \tpush $0x5c\n \tjmp 22020 \n \n 0000000000022600 :\n-\tjmp *0x36b21fca(%rip) \n+\tjmp *0x36b22fca(%rip) \n \tpush $0x5d\n \tjmp 22020 \n \n 0000000000022610 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21fc2(%rip) # 36b445d8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a12228>\n+\tjmp *0x36b22fc2(%rip) # 36b455d8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a13228>\n \tpush $0x5e\n \tjmp 22020 \n \n 0000000000022620 :\n-\tjmp *0x36b21fba(%rip) \n+\tjmp *0x36b22fba(%rip) \n \tpush $0x5f\n \tjmp 22020 \n \n 0000000000022630 :\n-\tjmp *0x36b21fb2(%rip) \n+\tjmp *0x36b22fb2(%rip) \n \tpush $0x60\n \tjmp 22020 \n \n 0000000000022640 :\n-\tjmp *0x36b21faa(%rip) \n+\tjmp *0x36b22faa(%rip) \n \tpush $0x61\n \tjmp 22020 \n \n 0000000000022650 :\n-\tjmp *0x36b21fa2(%rip) \n+\tjmp *0x36b22fa2(%rip) \n \tpush $0x62\n \tjmp 22020 \n \n 0000000000022660 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21f9a(%rip) # 36b44600 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a2f370>\n+\tjmp *0x36b22f9a(%rip) # 36b45600 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a30370>\n \tpush $0x63\n \tjmp 22020 \n \n 0000000000022670 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21f92(%rip) # 36b44608 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36af0c28>\n+\tjmp *0x36b22f92(%rip) # 36b45608 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36af1c28>\n \tpush $0x64\n \tjmp 22020 \n \n 0000000000022680 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21f8a(%rip) # 36b44610 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a06b40>\n+\tjmp *0x36b22f8a(%rip) # 36b45610 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a07b40>\n \tpush $0x65\n \tjmp 22020 \n \n 0000000000022690 :\n-\tjmp *0x36b21f82(%rip) \n+\tjmp *0x36b22f82(%rip) \n \tpush $0x66\n \tjmp 22020 \n \n 00000000000226a0 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b21f7a(%rip) # 36b44620 ::~ggml_cuda_pool_alloc()@@Base+0x36acb440>\n+\tjmp *0x36b22f7a(%rip) # 36b45620 ::~ggml_cuda_pool_alloc()@@Base+0x36acc440>\n \tpush $0x67\n \tjmp 22020 \n \n 00000000000226b0 :\n-\tjmp *0x36b21f72(%rip) \n+\tjmp *0x36b22f72(%rip) \n \tpush $0x68\n \tjmp 22020 \n \n 00000000000226c0 :\n-\tjmp *0x36b21f6a(%rip) \n+\tjmp *0x36b22f6a(%rip) \n \tpush $0x69\n \tjmp 22020 \n \n 00000000000226d0 :\n-\tjmp *0x36b21f62(%rip) \n+\tjmp *0x36b22f62(%rip) \n \tpush $0x6a\n \tjmp 22020 \n \n 00000000000226e0 :\n-\tjmp *0x36b21f5a(%rip) \n+\tjmp *0x36b22f5a(%rip) \n \tpush $0x6b\n \tjmp 22020 \n \n 00000000000226f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@plt>:\n-\tjmp *0x36b21f52(%rip) # 36b44648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x36a4fd38>\n+\tjmp *0x36b22f52(%rip) # 36b45648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x36a50d38>\n \tpush $0x6c\n \tjmp 22020 \n \n 0000000000022700 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b21f4a(%rip) # 36b44650 ::~ggml_cuda_pool_alloc()@@Base+0x36ac7ad0>\n+\tjmp *0x36b22f4a(%rip) # 36b45650 ::~ggml_cuda_pool_alloc()@@Base+0x36ac8ad0>\n \tpush $0x6d\n \tjmp 22020 \n \n 0000000000022710 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21f42(%rip) # 36b44658 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36873038>\n+\tjmp *0x36b22f42(%rip) # 36b45658 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36874038>\n \tpush $0x6e\n \tjmp 22020 \n \n 0000000000022720 :\n-\tjmp *0x36b21f3a(%rip) \n+\tjmp *0x36b22f3a(%rip) \n \tpush $0x6f\n \tjmp 22020 \n \n 0000000000022730 :\n-\tjmp *0x36b21f32(%rip) \n+\tjmp *0x36b22f32(%rip) \n \tpush $0x70\n \tjmp 22020 \n \n 0000000000022740 :\n-\tjmp *0x36b21f2a(%rip) \n+\tjmp *0x36b22f2a(%rip) \n \tpush $0x71\n \tjmp 22020 \n \n 0000000000022750 :\n-\tjmp *0x36b21f22(%rip) \n+\tjmp *0x36b22f22(%rip) \n \tpush $0x72\n \tjmp 22020 \n \n 0000000000022760 :\n-\tjmp *0x36b21f1a(%rip) \n+\tjmp *0x36b22f1a(%rip) \n \tpush $0x73\n \tjmp 22020 \n \n 0000000000022770 :\n-\tjmp *0x36b21f12(%rip) \n+\tjmp *0x36b22f12(%rip) \n \tpush $0x74\n \tjmp 22020 \n \n 0000000000022780 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21f0a(%rip) # 36b44690 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ce440>\n+\tjmp *0x36b22f0a(%rip) # 36b45690 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cf440>\n \tpush $0x75\n \tjmp 22020 \n \n 0000000000022790 :\n-\tjmp *0x36b21f02(%rip) \n+\tjmp *0x36b22f02(%rip) \n \tpush $0x76\n \tjmp 22020 \n \n 00000000000227a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21efa(%rip) # 36b446a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a32950>\n+\tjmp *0x36b22efa(%rip) # 36b456a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a33950>\n \tpush $0x77\n \tjmp 22020 \n \n 00000000000227b0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21ef2(%rip) # 36b446a8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a05a18>\n+\tjmp *0x36b22ef2(%rip) # 36b456a8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a06a18>\n \tpush $0x78\n \tjmp 22020 \n \n 00000000000227c0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21eea(%rip) # 36b446b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36878480>\n+\tjmp *0x36b22eea(%rip) # 36b456b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36879480>\n \tpush $0x79\n \tjmp 22020 \n \n 00000000000227d0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21ee2(%rip) # 36b446b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36a59c88>\n+\tjmp *0x36b22ee2(%rip) # 36b456b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36a5ac88>\n \tpush $0x7a\n \tjmp 22020 \n \n 00000000000227e0 :\n-\tjmp *0x36b21eda(%rip) \n+\tjmp *0x36b22eda(%rip) \n \tpush $0x7b\n \tjmp 22020 \n \n 00000000000227f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21ed2(%rip) # 36b446c8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aeea68>\n+\tjmp *0x36b22ed2(%rip) # 36b456c8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aefa68>\n \tpush $0x7c\n \tjmp 22020 \n \n 0000000000022800 :\n-\tjmp *0x36b21eca(%rip) \n+\tjmp *0x36b22eca(%rip) \n \tpush $0x7d\n \tjmp 22020 \n \n 0000000000022810 (std::array const&, std::array const&)@plt>:\n-\tjmp *0x36b21ec2(%rip) # 36b446d8 (std::array const&, std::array const&)@@Base+0x36acaff8>\n+\tjmp *0x36b22ec2(%rip) # 36b456d8 (std::array const&, std::array const&)@@Base+0x36acbff8>\n \tpush $0x7e\n \tjmp 22020 \n \n 0000000000022820 :\n-\tjmp *0x36b21eba(%rip) \n+\tjmp *0x36b22eba(%rip) \n \tpush $0x7f\n \tjmp 22020 \n \n 0000000000022830 :\n-\tjmp *0x36b21eb2(%rip) \n+\tjmp *0x36b22eb2(%rip) \n \tpush $0x80\n \tjmp 22020 \n \n 0000000000022840 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21eaa(%rip) # 36b446f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3e070>\n+\tjmp *0x36b22eaa(%rip) # 36b456f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3f070>\n \tpush $0x81\n \tjmp 22020 \n \n 0000000000022850 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21ea2(%rip) # 36b446f8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36b022f8>\n+\tjmp *0x36b22ea2(%rip) # 36b456f8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36b032f8>\n \tpush $0x82\n \tjmp 22020 \n \n 0000000000022860 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21e9a(%rip) # 36b44700 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aeb6e0>\n+\tjmp *0x36b22e9a(%rip) # 36b45700 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aec6e0>\n \tpush $0x83\n \tjmp 22020 \n \n 0000000000022870 :\n-\tjmp *0x36b21e92(%rip) \n+\tjmp *0x36b22e92(%rip) \n \tpush $0x84\n \tjmp 22020 \n \n 0000000000022880 :\n-\tjmp *0x36b21e8a(%rip) \n+\tjmp *0x36b22e8a(%rip) \n \tpush $0x85\n \tjmp 22020 \n \n 0000000000022890 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21e82(%rip) # 36b44718 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368b2db8>\n+\tjmp *0x36b22e82(%rip) # 36b45718 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368b3db8>\n \tpush $0x86\n \tjmp 22020 \n \n 00000000000228a0 :\n-\tjmp *0x36b21e7a(%rip) \n+\tjmp *0x36b22e7a(%rip) \n \tpush $0x87\n \tjmp 22020 \n \n 00000000000228b0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21e72(%rip) # 36b44728 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36873308>\n+\tjmp *0x36b22e72(%rip) # 36b45728 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36874308>\n \tpush $0x88\n \tjmp 22020 \n \n 00000000000228c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@plt>:\n-\tjmp *0x36b21e6a(%rip) # 36b44730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x36a4fc40>\n+\tjmp *0x36b22e6a(%rip) # 36b45730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x36a50c40>\n \tpush $0x89\n \tjmp 22020 \n \n 00000000000228d0 :\n-\tjmp *0x36b21e62(%rip) \n+\tjmp *0x36b22e62(%rip) \n \tpush $0x8a\n \tjmp 22020 \n \n 00000000000228e0 > const, ggml_backend_buffer_type> > std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_emplace_hint_unique >, ggml_backend_buffer_type&>(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair >&&, ggml_backend_buffer_type&)@plt>:\n-\tjmp *0x36b21e5a(%rip) # 36b44740 > const, ggml_backend_buffer_type> > std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_emplace_hint_unique >, ggml_backend_buffer_type&>(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair >&&, ggml_backend_buffer_type&)@@Base+0x36acaee0>\n+\tjmp *0x36b22e5a(%rip) # 36b45740 > const, ggml_backend_buffer_type> > std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_emplace_hint_unique >, ggml_backend_buffer_type&>(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair >&&, ggml_backend_buffer_type&)@@Base+0x36acbee0>\n \tpush $0x8b\n \tjmp 22020 \n \n 00000000000228f0 :\n-\tjmp *0x36b21e52(%rip) \n+\tjmp *0x36b22e52(%rip) \n \tpush $0x8c\n \tjmp 22020 \n \n 0000000000022900 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21e4a(%rip) # 36b44750 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e0380>\n+\tjmp *0x36b22e4a(%rip) # 36b45750 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e1380>\n \tpush $0x8d\n \tjmp 22020 \n \n 0000000000022910 :\n-\tjmp *0x36b21e42(%rip) \n+\tjmp *0x36b22e42(%rip) \n \tpush $0x8e\n \tjmp 22020 \n \n 0000000000022920 :\n-\tjmp *0x36b21e3a(%rip) \n+\tjmp *0x36b22e3a(%rip) \n \tpush $0x8f\n \tjmp 22020 \n \n 0000000000022930 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21e32(%rip) # 36b44768 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3686c328>\n+\tjmp *0x36b22e32(%rip) # 36b45768 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3686d328>\n \tpush $0x90\n \tjmp 22020 \n \n 0000000000022940 :\n-\tjmp *0x36b21e2a(%rip) \n+\tjmp *0x36b22e2a(%rip) \n \tpush $0x91\n \tjmp 22020 \n \n 0000000000022950 :\n-\tjmp *0x36b21e22(%rip) \n+\tjmp *0x36b22e22(%rip) \n \tpush $0x92\n \tjmp 22020 \n \n 0000000000022960 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21e1a(%rip) # 36b44780 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aefc60>\n+\tjmp *0x36b22e1a(%rip) # 36b45780 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36af0c60>\n \tpush $0x93\n \tjmp 22020 \n \n 0000000000022970 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21e12(%rip) # 36b44788 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x369af2f8>\n+\tjmp *0x36b22e12(%rip) # 36b45788 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x369b02f8>\n \tpush $0x94\n \tjmp 22020 \n \n 0000000000022980 >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_erase(std::_Rb_tree_node > const, ggml_backend_buffer_type> >*)@plt>:\n-\tjmp *0x36b21e0a(%rip) # 36b44790 >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_erase(std::_Rb_tree_node > const, ggml_backend_buffer_type> >*)@@Base+0x36acb800>\n+\tjmp *0x36b22e0a(%rip) # 36b45790 >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_erase(std::_Rb_tree_node > const, ggml_backend_buffer_type> >*)@@Base+0x36acc800>\n \tpush $0x95\n \tjmp 22020 \n \n 0000000000022990 :\n-\tjmp *0x36b21e02(%rip) \n+\tjmp *0x36b22e02(%rip) \n \tpush $0x96\n \tjmp 22020 \n \n 00000000000229a0 :\n-\tjmp *0x36b21dfa(%rip) \n+\tjmp *0x36b22dfa(%rip) \n \tpush $0x97\n \tjmp 22020 \n \n 00000000000229b0 :\n-\tjmp *0x36b21df2(%rip) \n+\tjmp *0x36b22df2(%rip) \n \tpush $0x98\n \tjmp 22020 \n \n 00000000000229c0 :\n-\tjmp *0x36b21dea(%rip) \n+\tjmp *0x36b22dea(%rip) \n \tpush $0x99\n \tjmp 22020 \n \n 00000000000229d0 :\n-\tjmp *0x36b21de2(%rip) \n+\tjmp *0x36b22de2(%rip) \n \tpush $0x9a\n \tjmp 22020 \n \n 00000000000229e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21dda(%rip) # 36b447c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369df230>\n+\tjmp *0x36b22dda(%rip) # 36b457c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e0230>\n \tpush $0x9b\n \tjmp 22020 \n \n 00000000000229f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21dd2(%rip) # 36b447c8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c4d48>\n+\tjmp *0x36b22dd2(%rip) # 36b457c8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c5d48>\n \tpush $0x9c\n \tjmp 22020 \n \n 0000000000022a00 :\n-\tjmp *0x36b21dca(%rip) \n+\tjmp *0x36b22dca(%rip) \n \tpush $0x9d\n \tjmp 22020 \n \n 0000000000022a10 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21dc2(%rip) # 36b447d8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a2a418>\n+\tjmp *0x36b22dc2(%rip) # 36b457d8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a2b418>\n \tpush $0x9e\n \tjmp 22020 \n \n 0000000000022a20 :\n-\tjmp *0x36b21dba(%rip) \n+\tjmp *0x36b22dba(%rip) \n \tpush $0x9f\n \tjmp 22020 \n \n 0000000000022a30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21db2(%rip) # 36b447e8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d8f78>\n+\tjmp *0x36b22db2(%rip) # 36b457e8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d9f78>\n \tpush $0xa0\n \tjmp 22020 \n \n 0000000000022a40 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21daa(%rip) # 36b447f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a30720>\n+\tjmp *0x36b22daa(%rip) # 36b457f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a31720>\n \tpush $0xa1\n \tjmp 22020 \n \n 0000000000022a50 :\n-\tjmp *0x36b21da2(%rip) \n+\tjmp *0x36b22da2(%rip) \n \tpush $0xa2\n \tjmp 22020 \n \n 0000000000022a60 :\n-\tjmp *0x36b21d9a(%rip) \n+\tjmp *0x36b22d9a(%rip) \n \tpush $0xa3\n \tjmp 22020 \n \n 0000000000022a70 :\n-\tjmp *0x36b21d92(%rip) \n+\tjmp *0x36b22d92(%rip) \n \tpush $0xa4\n \tjmp 22020 \n \n 0000000000022a80 :\n-\tjmp *0x36b21d8a(%rip) \n+\tjmp *0x36b22d8a(%rip) \n \tpush $0xa5\n \tjmp 22020 \n \n 0000000000022a90 :\n-\tjmp *0x36b21d82(%rip) \n+\tjmp *0x36b22d82(%rip) \n \tpush $0xa6\n \tjmp 22020 \n \n 0000000000022aa0 :\n-\tjmp *0x36b21d7a(%rip) \n+\tjmp *0x36b22d7a(%rip) \n \tpush $0xa7\n \tjmp 22020 \n \n 0000000000022ab0 :\n-\tjmp *0x36b21d72(%rip) \n+\tjmp *0x36b22d72(%rip) \n \tpush $0xa8\n \tjmp 22020 \n \n 0000000000022ac0 :\n-\tjmp *0x36b21d6a(%rip) \n+\tjmp *0x36b22d6a(%rip) \n \tpush $0xa9\n \tjmp 22020 \n \n 0000000000022ad0 :\n-\tjmp *0x36b21d62(%rip) \n+\tjmp *0x36b22d62(%rip) \n \tpush $0xaa\n \tjmp 22020 \n \n 0000000000022ae0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21d5a(%rip) # 36b44840 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368e5710>\n+\tjmp *0x36b22d5a(%rip) # 36b45840 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368e6710>\n \tpush $0xab\n \tjmp 22020 \n \n 0000000000022af0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21d52(%rip) # 36b44848 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3696bff8>\n+\tjmp *0x36b22d52(%rip) # 36b45848 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3696cff8>\n \tpush $0xac\n \tjmp 22020 \n \n 0000000000022b00 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21d4a(%rip) # 36b44850 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f11c0>\n+\tjmp *0x36b22d4a(%rip) # 36b45850 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f21c0>\n \tpush $0xad\n \tjmp 22020 \n \n 0000000000022b10 :\n-\tjmp *0x36b21d42(%rip) \n+\tjmp *0x36b22d42(%rip) \n \tpush $0xae\n \tjmp 22020 \n \n 0000000000022b20 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21d3a(%rip) # 36b44860 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f4740>\n+\tjmp *0x36b22d3a(%rip) # 36b45860 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f5740>\n \tpush $0xaf\n \tjmp 22020 \n \n 0000000000022b30 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21d32(%rip) # 36b44868 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36885128>\n+\tjmp *0x36b22d32(%rip) # 36b45868 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36886128>\n \tpush $0xb0\n \tjmp 22020 \n \n 0000000000022b40 :\n-\tjmp *0x36b21d2a(%rip) \n+\tjmp *0x36b22d2a(%rip) \n \tpush $0xb1\n \tjmp 22020 \n \n 0000000000022b50 :\n-\tjmp *0x36b21d22(%rip) \n+\tjmp *0x36b22d22(%rip) \n \tpush $0xb2\n \tjmp 22020 \n \n 0000000000022b60 :\n-\tjmp *0x36b21d1a(%rip) \n+\tjmp *0x36b22d1a(%rip) \n \tpush $0xb3\n \tjmp 22020 \n \n 0000000000022b70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21d12(%rip) # 36b44888 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3d058>\n+\tjmp *0x36b22d12(%rip) # 36b45888 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3e058>\n \tpush $0xb4\n \tjmp 22020 \n \n 0000000000022b80 :\n-\tjmp *0x36b21d0a(%rip) \n+\tjmp *0x36b22d0a(%rip) \n \tpush $0xb5\n \tjmp 22020 \n \n 0000000000022b90 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21d02(%rip) # 36b44898 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3697cd38>\n+\tjmp *0x36b22d02(%rip) # 36b45898 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3697dd38>\n \tpush $0xb6\n \tjmp 22020 \n \n 0000000000022ba0 :\n-\tjmp *0x36b21cfa(%rip) \n+\tjmp *0x36b22cfa(%rip) \n \tpush $0xb7\n \tjmp 22020 \n \n 0000000000022bb0 :\n-\tjmp *0x36b21cf2(%rip) \n+\tjmp *0x36b22cf2(%rip) \n \tpush $0xb8\n \tjmp 22020 \n \n 0000000000022bc0 :\n-\tjmp *0x36b21cea(%rip) \n+\tjmp *0x36b22cea(%rip) \n \tpush $0xb9\n \tjmp 22020 \n \n 0000000000022bd0 :\n-\tjmp *0x36b21ce2(%rip) \n+\tjmp *0x36b22ce2(%rip) \n \tpush $0xba\n \tjmp 22020 \n \n 0000000000022be0 :\n-\tjmp *0x36b21cda(%rip) \n+\tjmp *0x36b22cda(%rip) \n \tpush $0xbb\n \tjmp 22020 \n \n 0000000000022bf0 :\n-\tjmp *0x36b21cd2(%rip) \n+\tjmp *0x36b22cd2(%rip) \n \tpush $0xbc\n \tjmp 22020 \n \n 0000000000022c00 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21cca(%rip) # 36b448d0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cd4c0>\n+\tjmp *0x36b22cca(%rip) # 36b458d0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ce4c0>\n \tpush $0xbd\n \tjmp 22020 \n \n 0000000000022c10 <__cxa_guard_abort@plt>:\n-\tjmp *0x36b21cc2(%rip) \n+\tjmp *0x36b22cc2(%rip) \n \tpush $0xbe\n \tjmp 22020 \n \n 0000000000022c20 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21cba(%rip) # 36b448e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369eaf40>\n+\tjmp *0x36b22cba(%rip) # 36b458e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ebf40>\n \tpush $0xbf\n \tjmp 22020 \n \n 0000000000022c30 :\n-\tjmp *0x36b21cb2(%rip) \n+\tjmp *0x36b22cb2(%rip) \n \tpush $0xc0\n \tjmp 22020 \n \n 0000000000022c40 :\n-\tjmp *0x36b21caa(%rip) \n+\tjmp *0x36b22caa(%rip) \n \tpush $0xc1\n \tjmp 22020 \n \n 0000000000022c50 :\n-\tjmp *0x36b21ca2(%rip) \n+\tjmp *0x36b22ca2(%rip) \n \tpush $0xc2\n \tjmp 22020 \n \n 0000000000022c60 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21c9a(%rip) # 36b44900 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3687a520>\n+\tjmp *0x36b22c9a(%rip) # 36b45900 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3687b520>\n \tpush $0xc3\n \tjmp 22020 \n \n 0000000000022c70 >::_M_default_append(unsigned long)@plt>:\n-\tjmp *0x36b21c92(%rip) # 36b44908 >::_M_default_append(unsigned long)@@Base+0x36acbfc8>\n+\tjmp *0x36b22c92(%rip) # 36b45908 >::_M_default_append(unsigned long)@@Base+0x36accfc8>\n \tpush $0xc4\n \tjmp 22020 \n \n 0000000000022c80 :\n-\tjmp *0x36b21c8a(%rip) \n+\tjmp *0x36b22c8a(%rip) \n \tpush $0xc5\n \tjmp 22020 \n \n 0000000000022c90 :\n-\tjmp *0x36b21c82(%rip) \n+\tjmp *0x36b22c82(%rip) \n \tpush $0xc6\n \tjmp 22020 \n \n 0000000000022ca0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21c7a(%rip) # 36b44920 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36a578b0>\n+\tjmp *0x36b22c7a(%rip) # 36b45920 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36a588b0>\n \tpush $0xc7\n \tjmp 22020 \n \n 0000000000022cb0 :\n-\tjmp *0x36b21c72(%rip) \n+\tjmp *0x36b22c72(%rip) \n \tpush $0xc8\n \tjmp 22020 \n \n 0000000000022cc0 :\n-\tjmp *0x36b21c6a(%rip) \n+\tjmp *0x36b22c6a(%rip) \n \tpush $0xc9\n \tjmp 22020 \n \n 0000000000022cd0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21c62(%rip) # 36b44938 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c9fe8>\n+\tjmp *0x36b22c62(%rip) # 36b45938 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cafe8>\n \tpush $0xca\n \tjmp 22020 \n \n 0000000000022ce0 :\n-\tjmp *0x36b21c5a(%rip) \n+\tjmp *0x36b22c5a(%rip) \n \tpush $0xcb\n \tjmp 22020 \n \n 0000000000022cf0 :\n-\tjmp *0x36b21c52(%rip) \n+\tjmp *0x36b22c52(%rip) \n \tpush $0xcc\n \tjmp 22020 \n \n 0000000000022d00 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21c4a(%rip) # 36b44950 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a15b10>\n+\tjmp *0x36b22c4a(%rip) # 36b45950 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a16b10>\n \tpush $0xcd\n \tjmp 22020 \n \n 0000000000022d10 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21c42(%rip) # 36b44958 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369dd048>\n+\tjmp *0x36b22c42(%rip) # 36b45958 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369de048>\n \tpush $0xce\n \tjmp 22020 \n \n 0000000000022d20 :\n-\tjmp *0x36b21c3a(%rip) \n+\tjmp *0x36b22c3a(%rip) \n \tpush $0xcf\n \tjmp 22020 \n \n 0000000000022d30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21c32(%rip) # 36b44968 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3bf88>\n+\tjmp *0x36b22c32(%rip) # 36b45968 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a3cf88>\n \tpush $0xd0\n \tjmp 22020 \n \n 0000000000022d40 , std::allocator >::_M_append(char const*, unsigned long)@plt>:\n-\tjmp *0x36b21c2a(%rip) # 36b44970 , std::allocator >::_M_append(char const*, unsigned long)@Base>\n+\tjmp *0x36b22c2a(%rip) # 36b45970 , std::allocator >::_M_append(char const*, unsigned long)@Base>\n \tpush $0xd1\n \tjmp 22020 \n \n 0000000000022d50 >::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b21c22(%rip) # 36b44978 >::~ggml_cuda_pool_alloc()@@Base+0x36b002f8>\n+\tjmp *0x36b22c22(%rip) # 36b45978 >::~ggml_cuda_pool_alloc()@@Base+0x36b012f8>\n \tpush $0xd2\n \tjmp 22020 \n \n 0000000000022d60 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21c1a(%rip) # 36b44980 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d4a10>\n+\tjmp *0x36b22c1a(%rip) # 36b45980 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d5a10>\n \tpush $0xd3\n \tjmp 22020 \n \n 0000000000022d70 :\n-\tjmp *0x36b21c12(%rip) \n+\tjmp *0x36b22c12(%rip) \n \tpush $0xd4\n \tjmp 22020 \n \n 0000000000022d80 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21c0a(%rip) # 36b44990 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3699e810>\n+\tjmp *0x36b22c0a(%rip) # 36b45990 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3699f810>\n \tpush $0xd5\n \tjmp 22020 \n \n 0000000000022d90 :\n-\tjmp *0x36b21c02(%rip) \n+\tjmp *0x36b22c02(%rip) \n \tpush $0xd6\n \tjmp 22020 \n \n 0000000000022da0 :\n-\tjmp *0x36b21bfa(%rip) \n+\tjmp *0x36b22bfa(%rip) \n \tpush $0xd7\n \tjmp 22020 \n \n 0000000000022db0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21bf2(%rip) # 36b449a8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3698db38>\n+\tjmp *0x36b22bf2(%rip) # 36b459a8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3698eb38>\n \tpush $0xd8\n \tjmp 22020 \n \n 0000000000022dc0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21bea(%rip) # 36b449b0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368c3d40>\n+\tjmp *0x36b22bea(%rip) # 36b459b0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368c4d40>\n \tpush $0xd9\n \tjmp 22020 \n \n 0000000000022dd0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21be2(%rip) # 36b449b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3686e3a8>\n+\tjmp *0x36b22be2(%rip) # 36b459b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3686f3a8>\n \tpush $0xda\n \tjmp 22020 \n \n 0000000000022de0 :\n-\tjmp *0x36b21bda(%rip) \n+\tjmp *0x36b22bda(%rip) \n \tpush $0xdb\n \tjmp 22020 \n \n 0000000000022df0 :\n-\tjmp *0x36b21bd2(%rip) \n+\tjmp *0x36b22bd2(%rip) \n \tpush $0xdc\n \tjmp 22020 \n \n 0000000000022e00 :\n-\tjmp *0x36b21bca(%rip) \n+\tjmp *0x36b22bca(%rip) \n \tpush $0xdd\n \tjmp 22020 \n \n 0000000000022e10 :\n-\tjmp *0x36b21bc2(%rip) \n+\tjmp *0x36b22bc2(%rip) \n \tpush $0xde\n \tjmp 22020 \n \n 0000000000022e20 :\n-\tjmp *0x36b21bba(%rip) \n+\tjmp *0x36b22bba(%rip) \n \tpush $0xdf\n \tjmp 22020 \n \n 0000000000022e30 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21bb2(%rip) # 36b449e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3686a778>\n+\tjmp *0x36b22bb2(%rip) # 36b459e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3686b778>\n \tpush $0xe0\n \tjmp 22020 \n \n 0000000000022e40 :\n-\tjmp *0x36b21baa(%rip) \n+\tjmp *0x36b22baa(%rip) \n \tpush $0xe1\n \tjmp 22020 \n \n 0000000000022e50 :\n-\tjmp *0x36b21ba2(%rip) \n+\tjmp *0x36b22ba2(%rip) \n \tpush $0xe2\n \tjmp 22020 \n \n 0000000000022e60 :\n-\tjmp *0x36b21b9a(%rip) \n+\tjmp *0x36b22b9a(%rip) \n \tpush $0xe3\n \tjmp 22020 \n \n 0000000000022e70 :\n-\tjmp *0x36b21b92(%rip) \n+\tjmp *0x36b22b92(%rip) \n \tpush $0xe4\n \tjmp 22020 \n \n 0000000000022e80 :\n-\tjmp *0x36b21b8a(%rip) \n+\tjmp *0x36b22b8a(%rip) \n \tpush $0xe5\n \tjmp 22020 \n \n 0000000000022e90 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b82(%rip) # 36b44a18 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a16da8>\n+\tjmp *0x36b22b82(%rip) # 36b45a18 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a17da8>\n \tpush $0xe6\n \tjmp 22020 \n \n 0000000000022ea0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b7a(%rip) # 36b44a20 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a40700>\n+\tjmp *0x36b22b7a(%rip) # 36b45a20 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a41700>\n \tpush $0xe7\n \tjmp 22020 \n \n 0000000000022eb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b72(%rip) # 36b44a28 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e29d8>\n+\tjmp *0x36b22b72(%rip) # 36b45a28 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e39d8>\n \tpush $0xe8\n \tjmp 22020 \n \n 0000000000022ec0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b6a(%rip) # 36b44a30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cb2a0>\n+\tjmp *0x36b22b6a(%rip) # 36b45a30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cc2a0>\n \tpush $0xe9\n \tjmp 22020 \n \n 0000000000022ed0 :\n-\tjmp *0x36b21b62(%rip) \n+\tjmp *0x36b22b62(%rip) \n \tpush $0xea\n \tjmp 22020 \n \n 0000000000022ee0 :\n-\tjmp *0x36b21b5a(%rip) \n+\tjmp *0x36b22b5a(%rip) \n \tpush $0xeb\n \tjmp 22020 \n \n 0000000000022ef0 :\n-\tjmp *0x36b21b52(%rip) \n+\tjmp *0x36b22b52(%rip) \n \tpush $0xec\n \tjmp 22020 \n \n 0000000000022f00 :\n-\tjmp *0x36b21b4a(%rip) \n+\tjmp *0x36b22b4a(%rip) \n \tpush $0xed\n \tjmp 22020 \n \n 0000000000022f10 >::_M_range_insert<__gnu_cxx::__normal_iterator > > >(__gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > >, std::forward_iterator_tag)@plt>:\n-\tjmp *0x36b21b42(%rip) # 36b44a58 >::_M_range_insert<__gnu_cxx::__normal_iterator > > >(__gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > >, std::forward_iterator_tag)@@Base+0x36acb7e8>\n+\tjmp *0x36b22b42(%rip) # 36b45a58 >::_M_range_insert<__gnu_cxx::__normal_iterator > > >(__gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > >, std::forward_iterator_tag)@@Base+0x36acc7e8>\n \tpush $0xee\n \tjmp 22020 \n \n 0000000000022f20 :\n-\tjmp *0x36b21b3a(%rip) \n+\tjmp *0x36b22b3a(%rip) \n \tpush $0xef\n \tjmp 22020 \n \n 0000000000022f30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b32(%rip) # 36b44a68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e9ef8>\n+\tjmp *0x36b22b32(%rip) # 36b45a68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369eaef8>\n \tpush $0xf0\n \tjmp 22020 \n \n 0000000000022f40 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b2a(%rip) # 36b44a70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f9a80>\n+\tjmp *0x36b22b2a(%rip) # 36b45a70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369faa80>\n \tpush $0xf1\n \tjmp 22020 \n \n 0000000000022f50 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b22(%rip) # 36b44a78 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e7b68>\n+\tjmp *0x36b22b22(%rip) # 36b45a78 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e8b68>\n \tpush $0xf2\n \tjmp 22020 \n \n 0000000000022f60 <__cxa_guard_acquire@plt>:\n-\tjmp *0x36b21b1a(%rip) \n+\tjmp *0x36b22b1a(%rip) \n \tpush $0xf3\n \tjmp 22020 \n \n 0000000000022f70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b12(%rip) # 36b44a88 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36b01548>\n+\tjmp *0x36b22b12(%rip) # 36b45a88 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36b02548>\n \tpush $0xf4\n \tjmp 22020 \n \n 0000000000022f80 :\n-\tjmp *0x36b21b0a(%rip) \n+\tjmp *0x36b22b0a(%rip) \n \tpush $0xf5\n \tjmp 22020 \n \n 0000000000022f90 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21b02(%rip) # 36b44a98 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1bf68>\n+\tjmp *0x36b22b02(%rip) # 36b45a98 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1cf68>\n \tpush $0xf6\n \tjmp 22020 \n \n 0000000000022fa0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21afa(%rip) # 36b44aa0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368a2270>\n+\tjmp *0x36b22afa(%rip) # 36b45aa0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368a3270>\n \tpush $0xf7\n \tjmp 22020 \n \n 0000000000022fb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21af2(%rip) # 36b44aa8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36877558>\n+\tjmp *0x36b22af2(%rip) # 36b45aa8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36878558>\n \tpush $0xf8\n \tjmp 22020 \n \n 0000000000022fc0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21aea(%rip) # 36b44ab0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1e320>\n+\tjmp *0x36b22aea(%rip) # 36b45ab0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1f320>\n \tpush $0xf9\n \tjmp 22020 \n \n 0000000000022fd0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b21ae2(%rip) # 36b44ab8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36939b98>\n+\tjmp *0x36b22ae2(%rip) # 36b45ab8 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3693ab98>\n \tpush $0xfa\n \tjmp 22020 \n \n 0000000000022fe0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b21ada(%rip) # 36b44ac0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3687c510>\n+\tjmp *0x36b22ada(%rip) # 36b45ac0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3687d510>\n \tpush $0xfb\n \tjmp 22020 \n \n 0000000000022ff0 :\n-\tjmp *0x36b21ad2(%rip) \n+\tjmp *0x36b22ad2(%rip) \n \tpush $0xfc\n \tjmp 22020 \n \n 0000000000023000 :\n-\tjmp *0x36b21aca(%rip) \n+\tjmp *0x36b22aca(%rip) \n \tpush $0xfd\n \tjmp 22020 \n \n 0000000000023010 :\n-\tjmp *0x36b21ac2(%rip) \n+\tjmp *0x36b22ac2(%rip) \n \tpush $0xfe\n \tjmp 22020 \n \n 0000000000023020 :\n-\tjmp *0x36b21aba(%rip) \n+\tjmp *0x36b22aba(%rip) \n \tpush $0xff\n \tjmp 22020 \n \n 0000000000023030 :\n-\tjmp *0x36b21ab2(%rip) \n+\tjmp *0x36b22ab2(%rip) \n \tpush $0x100\n \tjmp 22020 \n \n 0000000000023040 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21aaa(%rip) # 36b44af0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a41980>\n+\tjmp *0x36b22aaa(%rip) # 36b45af0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a42980>\n \tpush $0x101\n \tjmp 22020 \n \n 0000000000023050 :\n-\tjmp *0x36b21aa2(%rip) \n+\tjmp *0x36b22aa2(%rip) \n \tpush $0x102\n \tjmp 22020 \n \n 0000000000023060 :\n-\tjmp *0x36b21a9a(%rip) \n+\tjmp *0x36b22a9a(%rip) \n \tpush $0x103\n \tjmp 22020 \n \n 0000000000023070 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21a92(%rip) # 36b44b08 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e18f8>\n+\tjmp *0x36b22a92(%rip) # 36b45b08 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e28f8>\n \tpush $0x104\n \tjmp 22020 \n \n 0000000000023080 :\n-\tjmp *0x36b21a8a(%rip) \n+\tjmp *0x36b22a8a(%rip) \n \tpush $0x105\n \tjmp 22020 \n \n 0000000000023090 :\n-\tjmp *0x36b21a82(%rip) \n+\tjmp *0x36b22a82(%rip) \n \tpush $0x106\n \tjmp 22020 \n \n 00000000000230a0 :\n-\tjmp *0x36b21a7a(%rip) \n+\tjmp *0x36b22a7a(%rip) \n \tpush $0x107\n \tjmp 22020 \n \n 00000000000230b0 :\n-\tjmp *0x36b21a72(%rip) \n+\tjmp *0x36b22a72(%rip) \n \tpush $0x108\n \tjmp 22020 \n \n 00000000000230c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21a6a(%rip) # 36b44b30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a283d0>\n+\tjmp *0x36b22a6a(%rip) # 36b45b30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a293d0>\n \tpush $0x109\n \tjmp 22020 \n \n 00000000000230d0 :\n-\tjmp *0x36b21a62(%rip) \n+\tjmp *0x36b22a62(%rip) \n \tpush $0x10a\n \tjmp 22020 \n \n 00000000000230e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21a5a(%rip) # 36b44b40 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c0980>\n+\tjmp *0x36b22a5a(%rip) # 36b45b40 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c1980>\n \tpush $0x10b\n \tjmp 22020 \n \n 00000000000230f0 :\n-\tjmp *0x36b21a52(%rip) \n+\tjmp *0x36b22a52(%rip) \n \tpush $0x10c\n \tjmp 22020 \n \n 0000000000023100 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21a4a(%rip) # 36b44b50 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ec380>\n+\tjmp *0x36b22a4a(%rip) # 36b45b50 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ed380>\n \tpush $0x10d\n \tjmp 22020 \n \n 0000000000023110 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21a42(%rip) # 36b44b58 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ba688>\n+\tjmp *0x36b22a42(%rip) # 36b45b58 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369bb688>\n \tpush $0x10e\n \tjmp 22020 \n \n 0000000000023120 :\n-\tjmp *0x36b21a3a(%rip) \n+\tjmp *0x36b22a3a(%rip) \n \tpush $0x10f\n \tjmp 22020 \n \n 0000000000023130 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21a32(%rip) # 36b44b68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a08258>\n+\tjmp *0x36b22a32(%rip) # 36b45b68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a09258>\n \tpush $0x110\n \tjmp 22020 \n \n 0000000000023140 :\n-\tjmp *0x36b21a2a(%rip) \n+\tjmp *0x36b22a2a(%rip) \n \tpush $0x111\n \tjmp 22020 \n \n 0000000000023150 :\n-\tjmp *0x36b21a22(%rip) \n+\tjmp *0x36b22a22(%rip) \n \tpush $0x112\n \tjmp 22020 \n \n 0000000000023160 :\n-\tjmp *0x36b21a1a(%rip) \n+\tjmp *0x36b22a1a(%rip) \n \tpush $0x113\n \tjmp 22020 \n \n 0000000000023170 :\n-\tjmp *0x36b21a12(%rip) \n+\tjmp *0x36b22a12(%rip) \n \tpush $0x114\n \tjmp 22020 \n \n 0000000000023180 :\n-\tjmp *0x36b21a0a(%rip) \n+\tjmp *0x36b22a0a(%rip) \n \tpush $0x115\n \tjmp 22020 \n \n 0000000000023190 :\n-\tjmp *0x36b21a02(%rip) \n+\tjmp *0x36b22a02(%rip) \n \tpush $0x116\n \tjmp 22020 \n \n 00000000000231a0 :\n-\tjmp *0x36b219fa(%rip) \n+\tjmp *0x36b229fa(%rip) \n \tpush $0x117\n \tjmp 22020 \n \n 00000000000231b0 :\n-\tjmp *0x36b219f2(%rip) \n+\tjmp *0x36b229f2(%rip) \n \tpush $0x118\n \tjmp 22020 \n \n 00000000000231c0 :\n-\tjmp *0x36b219ea(%rip) \n+\tjmp *0x36b229ea(%rip) \n \tpush $0x119\n \tjmp 22020 \n \n 00000000000231d0 :\n-\tjmp *0x36b219e2(%rip) \n+\tjmp *0x36b229e2(%rip) \n \tpush $0x11a\n \tjmp 22020 \n \n 00000000000231e0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b219da(%rip) # 36b44bc0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368f6780>\n+\tjmp *0x36b229da(%rip) # 36b45bc0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368f7780>\n \tpush $0x11b\n \tjmp 22020 \n \n 00000000000231f0 :\n-\tjmp *0x36b219d2(%rip) \n+\tjmp *0x36b229d2(%rip) \n \tpush $0x11c\n \tjmp 22020 \n \n 0000000000023200 :\n-\tjmp *0x36b219ca(%rip) \n+\tjmp *0x36b229ca(%rip) \n \tpush $0x11d\n \tjmp 22020 \n \n 0000000000023210 :\n-\tjmp *0x36b219c2(%rip) \n+\tjmp *0x36b229c2(%rip) \n \tpush $0x11e\n \tjmp 22020 \n \n 0000000000023220 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b219ba(%rip) # 36b44be0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368724a0>\n+\tjmp *0x36b229ba(%rip) # 36b45be0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368734a0>\n \tpush $0x11f\n \tjmp 22020 \n \n 0000000000023230 :\n-\tjmp *0x36b219b2(%rip) \n+\tjmp *0x36b229b2(%rip) \n \tpush $0x120\n \tjmp 22020 \n \n 0000000000023240 :\n-\tjmp *0x36b219aa(%rip) \n+\tjmp *0x36b229aa(%rip) \n \tpush $0x121\n \tjmp 22020 \n \n 0000000000023250 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b219a2(%rip) # 36b44bf8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a272c8>\n+\tjmp *0x36b229a2(%rip) # 36b45bf8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a282c8>\n \tpush $0x122\n \tjmp 22020 \n \n 0000000000023260 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b2199a(%rip) # 36b44c00 ::~ggml_cuda_pool_alloc()@@Base+0x36acb9c0>\n+\tjmp *0x36b2299a(%rip) # 36b45c00 ::~ggml_cuda_pool_alloc()@@Base+0x36acc9c0>\n \tpush $0x123\n \tjmp 22020 \n \n 0000000000023270 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21992(%rip) # 36b44c08 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aff3e8>\n+\tjmp *0x36b22992(%rip) # 36b45c08 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36b003e8>\n \tpush $0x124\n \tjmp 22020 \n \n 0000000000023280 :\n-\tjmp *0x36b2198a(%rip) \n+\tjmp *0x36b2298a(%rip) \n \tpush $0x125\n \tjmp 22020 \n \n 0000000000023290 :\n-\tjmp *0x36b21982(%rip) \n+\tjmp *0x36b22982(%rip) \n \tpush $0x126\n \tjmp 22020 \n \n 00000000000232a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2197a(%rip) # 36b44c20 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369b9580>\n+\tjmp *0x36b2297a(%rip) # 36b45c20 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ba580>\n \tpush $0x127\n \tjmp 22020 \n \n 00000000000232b0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21972(%rip) # 36b44c28 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e6b48>\n+\tjmp *0x36b22972(%rip) # 36b45c28 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e7b48>\n \tpush $0x128\n \tjmp 22020 \n \n 00000000000232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2196a(%rip) # 36b44c30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368841d0>\n+\tjmp *0x36b2296a(%rip) # 36b45c30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368851d0>\n \tpush $0x129\n \tjmp 22020 \n \n 00000000000232d0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21962(%rip) # 36b44c38 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fd188>\n+\tjmp *0x36b22962(%rip) # 36b45c38 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fe188>\n \tpush $0x12a\n \tjmp 22020 \n \n 00000000000232e0 :\n-\tjmp *0x36b2195a(%rip) \n+\tjmp *0x36b2295a(%rip) \n \tpush $0x12b\n \tjmp 22020 \n \n 00000000000232f0 :\n-\tjmp *0x36b21952(%rip) \n+\tjmp *0x36b22952(%rip) \n \tpush $0x12c\n \tjmp 22020 \n \n 0000000000023300 >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_get_insert_hint_unique_pos(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair > const&)@plt>:\n-\tjmp *0x36b2194a(%rip) # 36b44c50 >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_get_insert_hint_unique_pos(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair > const&)@@Base+0x36acb2e0>\n+\tjmp *0x36b2294a(%rip) # 36b45c50 >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_get_insert_hint_unique_pos(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair > const&)@@Base+0x36acc2e0>\n \tpush $0x12d\n \tjmp 22020 \n \n 0000000000023310 :\n-\tjmp *0x36b21942(%rip) \n+\tjmp *0x36b22942(%rip) \n \tpush $0x12e\n \tjmp 22020 \n \n 0000000000023320 :\n-\tjmp *0x36b2193a(%rip) \n+\tjmp *0x36b2293a(%rip) \n \tpush $0x12f\n \tjmp 22020 \n \n 0000000000023330 :\n-\tjmp *0x36b21932(%rip) \n+\tjmp *0x36b22932(%rip) \n \tpush $0x130\n \tjmp 22020 \n \n 0000000000023340 :\n-\tjmp *0x36b2192a(%rip) \n+\tjmp *0x36b2292a(%rip) \n \tpush $0x131\n \tjmp 22020 \n \n 0000000000023350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21922(%rip) # 36b44c78 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368830d8>\n+\tjmp *0x36b22922(%rip) # 36b45c78 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368840d8>\n \tpush $0x132\n \tjmp 22020 \n \n 0000000000023360 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2191a(%rip) # 36b44c80 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368765f0>\n+\tjmp *0x36b2291a(%rip) # 36b45c80 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x368775f0>\n \tpush $0x133\n \tjmp 22020 \n \n 0000000000023370 :\n-\tjmp *0x36b21912(%rip) \n+\tjmp *0x36b22912(%rip) \n \tpush $0x134\n \tjmp 22020 \n \n 0000000000023380 :\n-\tjmp *0x36b2190a(%rip) \n+\tjmp *0x36b2290a(%rip) \n \tpush $0x135\n \tjmp 22020 \n \n 0000000000023390 :\n-\tjmp *0x36b21902(%rip) \n+\tjmp *0x36b22902(%rip) \n \tpush $0x136\n \tjmp 22020 \n \n 00000000000233a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b218fa(%rip) # 36b44ca0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e8f60>\n+\tjmp *0x36b228fa(%rip) # 36b45ca0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369e9f60>\n \tpush $0x137\n \tjmp 22020 \n \n 00000000000233b0 :\n-\tjmp *0x36b218f2(%rip) \n+\tjmp *0x36b228f2(%rip) \n \tpush $0x138\n \tjmp 22020 \n \n 00000000000233c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b218ea(%rip) # 36b44cb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a34120>\n+\tjmp *0x36b228ea(%rip) # 36b45cb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a35120>\n \tpush $0x139\n \tjmp 22020 \n \n 00000000000233d0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b218e2(%rip) # 36b44cb8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a31da8>\n+\tjmp *0x36b228e2(%rip) # 36b45cb8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a32da8>\n \tpush $0x13a\n \tjmp 22020 \n \n 00000000000233e0 :\n-\tjmp *0x36b218da(%rip) \n+\tjmp *0x36b228da(%rip) \n \tpush $0x13b\n \tjmp 22020 \n \n 00000000000233f0 :\n-\tjmp *0x36b218d2(%rip) \n+\tjmp *0x36b228d2(%rip) \n \tpush $0x13c\n \tjmp 22020 \n \n 0000000000023400 :\n-\tjmp *0x36b218ca(%rip) \n+\tjmp *0x36b228ca(%rip) \n \tpush $0x13d\n \tjmp 22020 \n \n 0000000000023410 :\n-\tjmp *0x36b218c2(%rip) \n+\tjmp *0x36b228c2(%rip) \n \tpush $0x13e\n \tjmp 22020 \n \n 0000000000023420 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b218ba(%rip) # 36b44ce0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3695b7a0>\n+\tjmp *0x36b228ba(%rip) # 36b45ce0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3695c7a0>\n \tpush $0x13f\n \tjmp 22020 \n \n 0000000000023430 , std::allocator >::reserve(unsigned long)@plt>:\n-\tjmp *0x36b218b2(%rip) # 36b44ce8 , std::allocator >::reserve(unsigned long)@Base>\n+\tjmp *0x36b228b2(%rip) # 36b45ce8 , std::allocator >::reserve(unsigned long)@Base>\n \tpush $0x140\n \tjmp 22020 \n \n 0000000000023440 :\n-\tjmp *0x36b218aa(%rip) \n+\tjmp *0x36b228aa(%rip) \n \tpush $0x141\n \tjmp 22020 \n \n 0000000000023450 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b218a2(%rip) # 36b44cf8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f3a08>\n+\tjmp *0x36b228a2(%rip) # 36b45cf8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f4a08>\n \tpush $0x142\n \tjmp 22020 \n \n 0000000000023460 <__hipRegisterFunction@plt>:\n-\tjmp *0x36b2189a(%rip) \n+\tjmp *0x36b2289a(%rip) \n \tpush $0x143\n \tjmp 22020 \n \n 0000000000023470 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21892(%rip) # 36b44d08 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cc738>\n+\tjmp *0x36b22892(%rip) # 36b45d08 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369cd738>\n \tpush $0x144\n \tjmp 22020 \n \n 0000000000023480 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2188a(%rip) # 36b44d10 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369bba10>\n+\tjmp *0x36b2288a(%rip) # 36b45d10 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369bca10>\n \tpush $0x145\n \tjmp 22020 \n \n 0000000000023490 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21882(%rip) # 36b44d18 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369ff5e8>\n+\tjmp *0x36b22882(%rip) # 36b45d18 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a005e8>\n \tpush $0x146\n \tjmp 22020 \n \n 00000000000234a0 :\n-\tjmp *0x36b2187a(%rip) \n+\tjmp *0x36b2287a(%rip) \n \tpush $0x147\n \tjmp 22020 \n \n 00000000000234b0 :\n-\tjmp *0x36b21872(%rip) \n+\tjmp *0x36b22872(%rip) \n \tpush $0x148\n \tjmp 22020 \n \n 00000000000234c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2186a(%rip) # 36b44d30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c2f10>\n+\tjmp *0x36b2286a(%rip) # 36b45d30 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c3f10>\n \tpush $0x149\n \tjmp 22020 \n \n 00000000000234d0 :\n-\tjmp *0x36b21862(%rip) \n+\tjmp *0x36b22862(%rip) \n \tpush $0x14a\n \tjmp 22020 \n \n 00000000000234e0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b2185a(%rip) # 36b44d40 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36891640>\n+\tjmp *0x36b2285a(%rip) # 36b45d40 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36892640>\n \tpush $0x14b\n \tjmp 22020 \n \n 00000000000234f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21852(%rip) # 36b44d48 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1f788>\n+\tjmp *0x36b22852(%rip) # 36b45d48 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a20788>\n \tpush $0x14c\n \tjmp 22020 \n \n 0000000000023500 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b2184a(%rip) # 36b44d50 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3694ab20>\n+\tjmp *0x36b2284a(%rip) # 36b45d50 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3694bb20>\n \tpush $0x14d\n \tjmp 22020 \n \n 0000000000023510 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21842(%rip) # 36b44d58 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369bcc28>\n+\tjmp *0x36b22842(%rip) # 36b45d58 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369bdc28>\n \tpush $0x14e\n \tjmp 22020 \n \n 0000000000023520 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b2183a(%rip) # 36b44d60 ::~ggml_cuda_pool_alloc()@@Base+0x36b006b0>\n+\tjmp *0x36b2283a(%rip) # 36b45d60 ::~ggml_cuda_pool_alloc()@@Base+0x36b016b0>\n \tpush $0x14f\n \tjmp 22020 \n \n 0000000000023530 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21832(%rip) # 36b44d68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c1d78>\n+\tjmp *0x36b22832(%rip) # 36b45d68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c2d78>\n \tpush $0x150\n \tjmp 22020 \n \n 0000000000023540 :\n-\tjmp *0x36b2182a(%rip) \n+\tjmp *0x36b2282a(%rip) \n \tpush $0x151\n \tjmp 22020 \n \n 0000000000023550 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21822(%rip) # 36b44d78 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a297e8>\n+\tjmp *0x36b22822(%rip) # 36b45d78 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a2a7e8>\n \tpush $0x152\n \tjmp 22020 \n \n 0000000000023560 :\n-\tjmp *0x36b2181a(%rip) \n+\tjmp *0x36b2281a(%rip) \n \tpush $0x153\n \tjmp 22020 \n \n 0000000000023570 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21812(%rip) # 36b44d88 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d3c58>\n+\tjmp *0x36b22812(%rip) # 36b45d88 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369d4c58>\n \tpush $0x154\n \tjmp 22020 \n \n 0000000000023580 :\n-\tjmp *0x36b2180a(%rip) \n+\tjmp *0x36b2280a(%rip) \n \tpush $0x155\n \tjmp 22020 \n \n 0000000000023590 :\n-\tjmp *0x36b21802(%rip) \n+\tjmp *0x36b22802(%rip) \n \tpush $0x156\n \tjmp 22020 \n \n 00000000000235a0 :\n-\tjmp *0x36b217fa(%rip) \n+\tjmp *0x36b227fa(%rip) \n \tpush $0x157\n \tjmp 22020 \n \n 00000000000235b0 :\n-\tjmp *0x36b217f2(%rip) \n+\tjmp *0x36b227f2(%rip) \n \tpush $0x158\n \tjmp 22020 \n \n 00000000000235c0 :\n-\tjmp *0x36b217ea(%rip) \n+\tjmp *0x36b227ea(%rip) \n \tpush $0x159\n \tjmp 22020 \n \n 00000000000235d0 :\n-\tjmp *0x36b217e2(%rip) \n+\tjmp *0x36b227e2(%rip) \n \tpush $0x15a\n \tjmp 22020 \n \n 00000000000235e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b217da(%rip) # 36b44dc0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a11840>\n+\tjmp *0x36b227da(%rip) # 36b45dc0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a12840>\n \tpush $0x15b\n \tjmp 22020 \n \n 00000000000235f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b217d2(%rip) # 36b44dc8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a04f78>\n+\tjmp *0x36b227d2(%rip) # 36b45dc8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a05f78>\n \tpush $0x15c\n \tjmp 22020 \n \n 0000000000023600 :\n-\tjmp *0x36b217ca(%rip) \n+\tjmp *0x36b227ca(%rip) \n \tpush $0x15d\n \tjmp 22020 \n \n 0000000000023610 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b217c2(%rip) # 36b44dd8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f0578>\n+\tjmp *0x36b227c2(%rip) # 36b45dd8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f1578>\n \tpush $0x15e\n \tjmp 22020 \n \n 0000000000023620 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@plt>:\n-\tjmp *0x36b217ba(%rip) # 36b44de0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368d4e60>\n+\tjmp *0x36b227ba(%rip) # 36b45de0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x368d5e60>\n \tpush $0x15f\n \tjmp 22020 \n \n 0000000000023630 :\n-\tjmp *0x36b217b2(%rip) \n+\tjmp *0x36b227b2(%rip) \n \tpush $0x160\n \tjmp 22020 \n \n 0000000000023640 <__isoc23_strtoul@plt>:\n-\tjmp *0x36b217aa(%rip) \n+\tjmp *0x36b227aa(%rip) \n \tpush $0x161\n \tjmp 22020 \n \n 0000000000023650 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b217a2(%rip) # 36b44df8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a096a8>\n+\tjmp *0x36b227a2(%rip) # 36b45df8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a0a6a8>\n \tpush $0x162\n \tjmp 22020 \n \n 0000000000023660 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2179a(%rip) # 36b44e00 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a2bc10>\n+\tjmp *0x36b2279a(%rip) # 36b45e00 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a2cc10>\n \tpush $0x163\n \tjmp 22020 \n \n 0000000000023670 :\n-\tjmp *0x36b21792(%rip) \n+\tjmp *0x36b22792(%rip) \n \tpush $0x164\n \tjmp 22020 \n \n 0000000000023680 :\n-\tjmp *0x36b2178a(%rip) \n+\tjmp *0x36b2278a(%rip) \n \tpush $0x165\n \tjmp 22020 \n \n 0000000000023690 :\n-\tjmp *0x36b21782(%rip) \n+\tjmp *0x36b22782(%rip) \n \tpush $0x166\n \tjmp 22020 \n \n 00000000000236a0 <_Unwind_Resume@plt>:\n-\tjmp *0x36b2177a(%rip) \n+\tjmp *0x36b2277a(%rip) \n \tpush $0x167\n \tjmp 22020 \n \n 00000000000236b0 :\n-\tjmp *0x36b21772(%rip) \n+\tjmp *0x36b22772(%rip) \n \tpush $0x168\n \tjmp 22020 \n \n 00000000000236c0 ::~ggml_cuda_pool_alloc()@plt>:\n-\tjmp *0x36b2176a(%rip) # 36b44e30 ::~ggml_cuda_pool_alloc()@@Base+0x36b04c30>\n+\tjmp *0x36b2276a(%rip) # 36b45e30 ::~ggml_cuda_pool_alloc()@@Base+0x36b05c30>\n \tpush $0x169\n \tjmp 22020 \n \n 00000000000236d0 :\n-\tjmp *0x36b21762(%rip) \n+\tjmp *0x36b22762(%rip) \n \tpush $0x16a\n \tjmp 22020 \n \n 00000000000236e0 :\n-\tjmp *0x36b2175a(%rip) \n+\tjmp *0x36b2275a(%rip) \n \tpush $0x16b\n \tjmp 22020 \n \n 00000000000236f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21752(%rip) # 36b44e48 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fc1d8>\n+\tjmp *0x36b22752(%rip) # 36b45e48 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369fd1d8>\n \tpush $0x16c\n \tjmp 22020 \n \n 0000000000023700 :\n-\tjmp *0x36b2174a(%rip) \n+\tjmp *0x36b2274a(%rip) \n \tpush $0x16d\n \tjmp 22020 \n \n 0000000000023710 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21742(%rip) # 36b44e58 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a45c28>\n+\tjmp *0x36b22742(%rip) # 36b45e58 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a46c28>\n \tpush $0x16e\n \tjmp 22020 \n \n 0000000000023720 :\n-\tjmp *0x36b2173a(%rip) \n+\tjmp *0x36b2273a(%rip) \n \tpush $0x16f\n \tjmp 22020 \n \n 0000000000023730 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21732(%rip) # 36b44e68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aee0c8>\n+\tjmp *0x36b22732(%rip) # 36b45e68 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aef0c8>\n \tpush $0x170\n \tjmp 22020 \n \n 0000000000023740 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b2172a(%rip) # 36b44e70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c65c0>\n+\tjmp *0x36b2272a(%rip) # 36b45e70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369c75c0>\n \tpush $0x171\n \tjmp 22020 \n \n 0000000000023750 :\n-\tjmp *0x36b21722(%rip) \n+\tjmp *0x36b22722(%rip) \n \tpush $0x172\n \tjmp 22020 \n \n 0000000000023760 :\n-\tjmp *0x36b2171a(%rip) \n+\tjmp *0x36b2271a(%rip) \n \tpush $0x173\n \tjmp 22020 \n \n 0000000000023770 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21712(%rip) # 36b44e88 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f5f38>\n+\tjmp *0x36b22712(%rip) # 36b45e88 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f6f38>\n \tpush $0x174\n \tjmp 22020 \n \n 0000000000023780 :\n-\tjmp *0x36b2170a(%rip) \n+\tjmp *0x36b2270a(%rip) \n \tpush $0x175\n \tjmp 22020 \n \n 0000000000023790 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b21702(%rip) # 36b44e98 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1b198>\n+\tjmp *0x36b22702(%rip) # 36b45e98 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a1c198>\n \tpush $0x176\n \tjmp 22020 \n \n 00000000000237a0 :\n-\tjmp *0x36b216fa(%rip) \n+\tjmp *0x36b226fa(%rip) \n \tpush $0x177\n \tjmp 22020 \n \n 00000000000237b0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b216f2(%rip) # 36b44ea8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a24a08>\n+\tjmp *0x36b226f2(%rip) # 36b45ea8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a25a08>\n \tpush $0x178\n \tjmp 22020 \n \n 00000000000237c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b216ea(%rip) # 36b44eb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a14ea0>\n+\tjmp *0x36b226ea(%rip) # 36b45eb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36a15ea0>\n \tpush $0x179\n \tjmp 22020 \n \n 00000000000237d0 :\n-\tjmp *0x36b216e2(%rip) \n+\tjmp *0x36b226e2(%rip) \n \tpush $0x17a\n \tjmp 22020 \n \n 00000000000237e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b216da(%rip) # 36b44ec0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aead60>\n+\tjmp *0x36b226da(%rip) # 36b45ec0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x36aebd60>\n \tpush $0x17b\n \tjmp 22020 \n \n 00000000000237f0 (ggml_backend_cuda_context&, ggml_tensor*)@plt>:\n-\tjmp *0x36b216d2(%rip) # 36b44ec8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36880598>\n+\tjmp *0x36b226d2(%rip) # 36b45ec8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36881598>\n \tpush $0x17c\n \tjmp 22020 \n \n 0000000000023800 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b216ca(%rip) # 36b44ed0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f2a10>\n+\tjmp *0x36b226ca(%rip) # 36b45ed0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369f3a10>\n \tpush $0x17d\n \tjmp 22020 \n \n 0000000000023810 :\n-\tjmp *0x36b216c2(%rip) \n+\tjmp *0x36b226c2(%rip) \n \tpush $0x17e\n \tjmp 22020 \n \n 0000000000023820 :\n-\tjmp *0x36b216ba(%rip) \n+\tjmp *0x36b226ba(%rip) \n \tpush $0x17f\n \tjmp 22020 \n \n 0000000000023830 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>:\n-\tjmp *0x36b216b2(%rip) # 36b44ee8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369b74a8>\n+\tjmp *0x36b226b2(%rip) # 36b45ee8 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x369b84a8>\n \tpush $0x180\n \tjmp 22020 \n \n 0000000000023840 :\n-\tjmp *0x36b216aa(%rip) \n+\tjmp *0x36b226aa(%rip) \n \tpush $0x181\n \tjmp 22020 \n \n 0000000000023850 :\n-\tjmp *0x36b216a2(%rip) \n+\tjmp *0x36b226a2(%rip) \n \tpush $0x182\n \tjmp 22020 \n \n 0000000000023860 :\n-\tjmp *0x36b2169a(%rip) \n+\tjmp *0x36b2269a(%rip) \n \tpush $0x183\n \tjmp 22020 \n \n 0000000000023870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@plt>:\n-\tjmp *0x36b21692(%rip) # 36b44f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x36a50238>\n+\tjmp *0x36b22692(%rip) # 36b45f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x36a51238>\n \tpush $0x184\n \tjmp 22020 \n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt.got {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.plt.got {}", "unified_diff": "@@ -1,16 +1,16 @@\n \n \n \n Disassembly of section .plt.got:\n \n 0000000000023880 <__cxa_finalize@plt>:\n-\tjmp *0x36b216ea(%rip) \n+\tjmp *0x36b226ea(%rip) \n \txchg %ax,%ax\n \n 0000000000023888 <__register_frame_info@plt>:\n-\tjmp *0x36b2170a(%rip) \n+\tjmp *0x36b2270a(%rip) \n \txchg %ax,%ax\n \n 0000000000023890 <__deregister_frame_info@plt>:\n-\tjmp *0x36b2173a(%rip) \n+\tjmp *0x36b2273a(%rip) \n \txchg %ax,%ax\n"}, {"source1": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {}", "source2": "objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {}", "unified_diff": "@@ -2,110 +2,110 @@\n \n \n Disassembly of section .text:\n \n 00000000000238a0 :\n __cxx_global_var_init.13():\n \tpush %rax\n-\tmov 0x36b21680(%rip),%rax # 36b44f28 ::alpha@@Base-0x13c0>\n+\tmov 0x36b22680(%rip),%rax # 36b45f28 ::alpha@@Base-0x13c0>\n \tmovzbl (%rax),%eax\n \ttest %al,%al\n \tje 238b1 <__deregister_frame_info@plt+0x21>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1811\n \tpop %rax\n \tret\n-\tmov 0x36b21670(%rip),%rdi # 36b44f28 ::alpha@@Base-0x13c0>\n+\tmov 0x36b22670(%rip),%rdi # 36b45f28 ::alpha@@Base-0x13c0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 238af <__deregister_frame_info@plt+0x1f>\n \tpinsrw $0x0,0x2eb272(%rip),%xmm0 # 30eb3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x348cc>\n __half::__half(double):\n /usr/include/hip/amd_detail/amd_hip_fp16.h:117\n \tpextrw $0x0,%xmm0,%eax\n-\tmov 0x36b2171a(%rip),%rcx # 36b44ff0 ::alpha@@Base-0x12f0>\n+\tmov 0x36b2271a(%rip),%rcx # 36b45ff0 ::alpha@@Base-0x12f0>\n \tmov %ax,(%rcx)\n __cxx_global_var_init.13():\n-\tmov 0x36b21648(%rip),%rdi # 36b44f28 ::alpha@@Base-0x13c0>\n+\tmov 0x36b22648(%rip),%rdi # 36b45f28 ::alpha@@Base-0x13c0>\n \tpop %rax\n \tjmp 22490 <__cxa_guard_release@plt>\n \tcs nopw 0x0(%rax,%rax,1)\n __cxx_global_var_init.14():\n \tpush %rax\n-\tmov 0x36b21690(%rip),%rax # 36b44f88 ::beta@@Base-0x1370>\n+\tmov 0x36b22690(%rip),%rax # 36b45f88 ::beta@@Base-0x1370>\n \tmovzbl (%rax),%eax\n \ttest %al,%al\n \tje 23901 <__deregister_frame_info@plt+0x71>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1812\n \tpop %rax\n \tret\n-\tmov 0x36b21680(%rip),%rdi # 36b44f88 ::beta@@Base-0x1370>\n+\tmov 0x36b22680(%rip),%rdi # 36b45f88 ::beta@@Base-0x1370>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 238ff <__deregister_frame_info@plt+0x6f>\n \tpxor %xmm0,%xmm0\n __half::__half(double):\n /usr/include/hip/amd_detail/amd_hip_fp16.h:117\n \tpextrw $0x0,%xmm0,%eax\n-\tmov 0x36b2167f(%rip),%rcx # 36b44fa0 ::beta@@Base-0x1350>\n+\tmov 0x36b2267f(%rip),%rcx # 36b45fa0 ::beta@@Base-0x1350>\n \tmov %ax,(%rcx)\n __cxx_global_var_init.14():\n-\tmov 0x36b2165d(%rip),%rdi # 36b44f88 ::beta@@Base-0x1370>\n+\tmov 0x36b2265d(%rip),%rdi # 36b45f88 ::beta@@Base-0x1370>\n \tpop %rax\n \tjmp 22490 <__cxa_guard_release@plt>\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax,%rax,1)\n _GLOBAL__sub_I_ggml_cuda.cu():\n \tpush %rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:521\n-\tlea 0x36b223c8(%rip),%rbx # 36b45d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d8>\n+\tlea 0x36b233c8(%rip),%rbx # 36b46d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d8>\n \tmov %rbx,%rdi\n \tcall 233f0 \n-\tmov 0x36b215d9(%rip),%rdi \n-\tlea 0x36b216a2(%rip),%rdx # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n+\tmov 0x36b225d9(%rip),%rdi \n+\tlea 0x36b226a2(%rip),%rdx # 36b46000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n \tmov %rbx,%rsi\n \tpop %rbx\n \tjmp 22580 <__cxa_atexit@plt>\n \tnopw 0x0(%rax,%rax,1)\n __do_init():\n \tendbr64\n \tpush %rbp\n \tmov %rsp,%rbp\n-\ttestb $0x1,0x36b21ed1(%rip) # 36b45850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e18>\n+\ttestb $0x1,0x36b22ed1(%rip) # 36b46850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e18>\n \tje 2398a <__deregister_frame_info@plt+0xfa>\n \tjmp 239b9 <__deregister_frame_info@plt+0x129>\n-\tmovb $0x1,0x36b21ebf(%rip) # 36b45850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e18>\n-\tmov 0x36b21600(%rip),%rax \n+\tmovb $0x1,0x36b22ebf(%rip) # 36b46850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e18>\n+\tmov 0x36b22600(%rip),%rax \n \ttest %rax,%rax\n \tje 239b9 <__deregister_frame_info@plt+0x129>\n \tjmp 239a6 <__deregister_frame_info@plt+0x116>\n-\tlea 0x36ad2683(%rip),%rdi # 36af6030 ::get_beta()::val@@Base+0x367e6d18>\n-\tlea 0x36b21ea4(%rip),%rsi # 36b45858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e20>\n+\tlea 0x36ad3683(%rip),%rdi # 36af7030 ::get_beta()::val@@Base+0x367e7d18>\n+\tlea 0x36b22ea4(%rip),%rsi # 36b46858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e20>\n \tcall 23888 <__register_frame_info@plt>\n \tpop %rbp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n __do_fini():\n \tendbr64\n \tpush %rbp\n \tmov %rsp,%rbp\n-\ttestb $0x1,0x36b21ec9(%rip) # 36b45898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e60>\n+\ttestb $0x1,0x36b22ec9(%rip) # 36b46898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e60>\n \tje 239da <__deregister_frame_info@plt+0x14a>\n \tjmp 23a23 <__deregister_frame_info@plt+0x193>\n-\tmovb $0x1,0x36b21eb7(%rip) # 36b45898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e60>\n-\tmov 0x36b21588(%rip),%rax \n+\tmovb $0x1,0x36b22eb7(%rip) # 36b46898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e60>\n+\tmov 0x36b22588(%rip),%rax \n \ttest %rax,%rax\n \tje 23a02 <__deregister_frame_info@plt+0x172>\n \tjmp 239f6 <__deregister_frame_info@plt+0x166>\n-\tmov 0x36b21603(%rip),%rdi # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n+\tmov 0x36b22603(%rip),%rdi # 36b46000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n \tcall 23880 <__cxa_finalize@plt>\n-\tmov 0x36b215c7(%rip),%rax \n+\tmov 0x36b225c7(%rip),%rax \n \ttest %rax,%rax\n \tje 23a23 <__deregister_frame_info@plt+0x193>\n \tjmp 23a17 <__deregister_frame_info@plt+0x187>\n-\tlea 0x36ad2612(%rip),%rdi # 36af6030 ::get_beta()::val@@Base+0x367e6d18>\n+\tlea 0x36ad3612(%rip),%rdi # 36af7030 ::get_beta()::val@@Base+0x367e7d18>\n \tcall 23890 <__deregister_frame_info@plt>\n \tpop %rbp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnop\n \n 0000000000023a30 :\n@@ -273,15 +273,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36b1b29e(%rip),%rdi # 36b3efa8 ::get_beta()::val@@Base+0x3682fc90>\n+\tlea 0x36b1c29e(%rip),%rdi # 36b3ffa8 ::get_beta()::val@@Base+0x36830c90>\n \tlea 0xd0(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/acc.cu:61\n \tadd $0x138,%rsp\n@@ -381,51 +381,51 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b1b080(%rip),%rdi # 36b3efa8 ::get_beta()::val@@Base+0x3682fc90>\n+\tlea 0x36b1c080(%rip),%rdi # 36b3ffa8 ::get_beta()::val@@Base+0x36830c90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b21945(%rip),%rdi # 36b458a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n+\tmov 0x36b22945(%rip),%rdi # 36b468a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n \ttest %rdi,%rdi\n \tjne 23f76 \n-\tlea 0x36b210b9(%rip),%rdi # 36b45020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45e8>\n+\tlea 0x36b220b9(%rip),%rdi # 36b46020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45e8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b2192a(%rip) # 36b458a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n+\tmov %rax,0x36b2292a(%rip) # 36b468a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b1b01f(%rip),%rsi # 36b3efa8 ::get_beta()::val@@Base+0x3682fc90>\n+\tlea 0x36b1c01f(%rip),%rsi # 36b3ffa8 ::get_beta()::val@@Base+0x36830c90>\n \tlea 0x2b71c3(%rip),%rcx # 2db153 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xee3>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b218d9(%rip),%rdi # 36b458a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n+\tmov 0x36b228d9(%rip),%rdi # 36b468a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n \ttest %rdi,%rdi\n \tje 23fe1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b218c3(%rip) # 36b458a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n+\tmovq $0x0,0x36b228c3(%rip) # 36b468a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e68>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000023ff0 :\n ggml_cuda_op_arange(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -523,15 +523,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b1ae5d(%rip),%rdi # 36b3efb0 ::get_beta()::val@@Base+0x3682fc98>\n+\tlea 0x36b1be5d(%rip),%rdi # 36b3ffb0 ::get_beta()::val@@Base+0x36830c98>\n \tlea 0x50(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_arange(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/arange.cu:34\n@@ -583,51 +583,51 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b1ad5c(%rip),%rdi # 36b3efb0 ::get_beta()::val@@Base+0x3682fc98>\n+\tlea 0x36b1bd5c(%rip),%rdi # 36b3ffb0 ::get_beta()::val@@Base+0x36830c98>\n \tlea 0x50(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \txchg %ax,%ax\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b2162d(%rip),%rdi # 36b458a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n+\tmov 0x36b2262d(%rip),%rdi # 36b468a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n \ttest %rdi,%rdi\n \tjne 24296 \n-\tlea 0x36b20db1(%rip),%rdi # 36b45038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4600>\n+\tlea 0x36b21db1(%rip),%rdi # 36b46038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4600>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b21612(%rip) # 36b458a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n+\tmov %rax,0x36b22612(%rip) # 36b468a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b1ad07(%rip),%rsi # 36b3efb0 ::get_beta()::val@@Base+0x3682fc98>\n+\tlea 0x36b1bd07(%rip),%rsi # 36b3ffb0 ::get_beta()::val@@Base+0x36830c98>\n \tlea 0x2b6f2b(%rip),%rcx # 2db1db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf6b>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b215c1(%rip),%rdi # 36b458a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n+\tmov 0x36b225c1(%rip),%rdi # 36b468a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n \ttest %rdi,%rdi\n \tje 24301 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b215ab(%rip) # 36b458a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n+\tmovq $0x0,0x36b225ab(%rip) # 36b468a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e70>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000024310 :\n ggml_cuda_argmax(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -721,15 +721,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b1ab66(%rip),%rdi # 36b3efb8 ::get_beta()::val@@Base+0x3682fca0>\n+\tlea 0x36b1bb66(%rip),%rdi # 36b3ffb8 ::get_beta()::val@@Base+0x36830ca0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/argmax.cu:91\n \tadd $0x70,%rsp\n@@ -786,51 +786,51 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b1aa44(%rip),%rdi # 36b3efb8 ::get_beta()::val@@Base+0x3682fca0>\n+\tlea 0x36b1ba44(%rip),%rdi # 36b3ffb8 ::get_beta()::val@@Base+0x36830ca0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b21315(%rip),%rdi # 36b458b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n+\tmov 0x36b22315(%rip),%rdi # 36b468b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n \ttest %rdi,%rdi\n \tjne 245b6 \n-\tlea 0x36b20aa9(%rip),%rdi # 36b45050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4618>\n+\tlea 0x36b21aa9(%rip),%rdi # 36b46050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4618>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b212fa(%rip) # 36b458b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n+\tmov %rax,0x36b222fa(%rip) # 36b468b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b1a9ef(%rip),%rsi # 36b3efb8 ::get_beta()::val@@Base+0x3682fca0>\n+\tlea 0x36b1b9ef(%rip),%rsi # 36b3ffb8 ::get_beta()::val@@Base+0x36830ca0>\n \tlea 0x2b6ca2(%rip),%rcx # 2db272 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1002>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b212a9(%rip),%rdi # 36b458b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n+\tmov 0x36b222a9(%rip),%rdi # 36b468b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n \ttest %rdi,%rdi\n \tje 24621 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b21293(%rip) # 36b458b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n+\tmovq $0x0,0x36b22293(%rip) # 36b468b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e78>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000024630 :\n ggml_cuda_op_argsort(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -951,15 +951,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b1a7ee(%rip),%rdi # 36b3efc0 ::get_beta()::val@@Base+0x3682fca8>\n+\tlea 0x36b1b7ee(%rip),%rdi # 36b3ffc0 ::get_beta()::val@@Base+0x36830ca8>\n \tjmp 2486e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/argsort.cu:82\n \tmov %r15,%rdi\n \tmov $0x1,%esi\n \tmov $0x1,%ecx\n \tmov %r14,%r8\n \tmov 0x58(%rsp),%r9\n@@ -985,15 +985,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b1a75a(%rip),%rdi # 36b3efc8 ::get_beta()::val@@Base+0x3682fcb0>\n+\tlea 0x36b1b75a(%rip),%rdi # 36b3ffc8 ::get_beta()::val@@Base+0x36830cb0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/argsort.cu:104\n \tadd $0x88,%rsp\n@@ -1067,15 +1067,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b1a5ef(%rip),%rdi # 36b3efc0 ::get_beta()::val@@Base+0x3682fca8>\n+\tlea 0x36b1b5ef(%rip),%rdi # 36b3ffc0 ::get_beta()::val@@Base+0x36830ca8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -1098,64 +1098,64 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b1a567(%rip),%rdi # 36b3efc8 ::get_beta()::val@@Base+0x3682fcb0>\n+\tlea 0x36b1b567(%rip),%rdi # 36b3ffc8 ::get_beta()::val@@Base+0x36830cb0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b20e2c(%rip),%rbx # 36b458b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n+\tmov 0x36b21e2c(%rip),%rbx # 36b468b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n \ttest %rbx,%rbx\n \tjne 24aa7 \n-\tlea 0x36b205d0(%rip),%rdi # 36b45068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4630>\n+\tlea 0x36b215d0(%rip),%rdi # 36b46068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4630>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b20e11(%rip) # 36b458b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n+\tmov %rax,0x36b21e11(%rip) # 36b468b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b1a506(%rip),%rsi # 36b3efc0 ::get_beta()::val@@Base+0x3682fca8>\n+\tlea 0x36b1b506(%rip),%rsi # 36b3ffc0 ::get_beta()::val@@Base+0x36830ca8>\n \tlea 0x2b6866(%rip),%rcx # 2db327 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10b7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b1a4e0(%rip),%rsi # 36b3efc8 ::get_beta()::val@@Base+0x3682fcb0>\n+\tlea 0x36b1b4e0(%rip),%rsi # 36b3ffc8 ::get_beta()::val@@Base+0x36830cb0>\n \tlea 0x2b686d(%rip),%rcx # 2db35c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b20d91(%rip),%rdi # 36b458b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n+\tmov 0x36b21d91(%rip),%rdi # 36b468b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n \ttest %rdi,%rdi\n \tje 24b41 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b20d7b(%rip) # 36b458b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n+\tmovq $0x0,0x36b21d7b(%rip) # 36b468b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e80>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000024b50 :\n ggml_cuda_op_repeat(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -2424,15 +2424,15 @@\n \tlea 0x2b5684(%rip),%rdi # 2db391 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1121>\n \tlea 0x2b5337(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x2b58ff(%rip),%rcx # 2db61a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13aa>\n \tmov $0xf0,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:308\n-\tmov 0x36b1f2aa(%rip),%rax \n+\tmov 0x36b202aa(%rip),%rax \n \tmov (%rax),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tcall 23590 \n \tmov %rax,%r15\n \tmov (%r14),%edi\n \tcall 23590 \n \tmov %rax,%r14\n@@ -4566,15 +4566,15 @@\n \tlea 0x2b3926(%rip),%rcx # 2db61a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13aa>\n \tmov $0xf0,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tmov (%r12),%edi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:308\n-\tmov 0x36b1d2cd(%rip),%rax \n+\tmov 0x36b1e2cd(%rip),%rax \n \tmov (%rax),%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tcall 23590 \n \tmov %rax,%r12\n \tmov (%rbx),%edi\n \tcall 23590 \n \tmov %rax,%rbx\n@@ -6708,15 +6708,15 @@\n \tlea 0x2b1956(%rip),%rcx # 2db61a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13aa>\n \tmov $0xf0,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tmov (%r12),%edi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:308\n-\tmov 0x36b1b2fd(%rip),%rax \n+\tmov 0x36b1c2fd(%rip),%rax \n \tmov (%rax),%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tcall 23590 \n \tmov %rax,%r12\n \tmov (%rbx),%edi\n \tcall 23590 \n \tmov %rax,%rbx\n@@ -8850,15 +8850,15 @@\n \tlea 0x2af986(%rip),%rcx # 2db61a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13aa>\n \tmov $0xf0,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tmov (%r12),%edi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:308\n-\tmov 0x36b1932d(%rip),%rax \n+\tmov 0x36b1a32d(%rip),%rax \n \tmov (%rax),%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tcall 23590 \n \tmov %rax,%r12\n \tmov (%rbx),%edi\n \tcall 23590 \n \tmov %rax,%rbx\n@@ -10992,15 +10992,15 @@\n \tlea 0x2ad9b6(%rip),%rcx # 2db61a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13aa>\n \tmov $0xf0,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tmov (%r12),%edi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:308\n-\tmov 0x36b1735d(%rip),%rax \n+\tmov 0x36b1835d(%rip),%rax \n \tmov (%rax),%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:309\n \tcall 23590 \n \tmov %rax,%r12\n \tmov (%rbx),%edi\n \tcall 23590 \n \tmov %rax,%rbx\n@@ -11251,15 +11251,15 @@\n \tlea 0x68(%rsp),%rdx\n \tlea 0x60(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x80(%rsp),%rsi\n \tmov 0x88(%rsp),%edx\n \tmov 0x70(%rsp),%rcx\n \tmov 0x78(%rsp),%r8d\n-\tlea 0x36b11071(%rip),%rdi # 36b3f110 ::get_beta()::val@@Base+0x3682fdf8>\n+\tlea 0x36b12071(%rip),%rdi # 36b40110 ::get_beta()::val@@Base+0x36830df8>\n \tlea 0x100(%rsp),%r9\n \tpush 0x60(%rsp)\n \tpush 0x70(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/binbcast.cu:363\n \tadd $0x178,%rsp\n@@ -11368,15 +11368,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b10cb7(%rip),%rdi # 36b3efd0 ::get_beta()::val@@Base+0x3682fcb8>\n+\tlea 0x36b11cb7(%rip),%rdi # 36b3ffd0 ::get_beta()::val@@Base+0x36830cb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11433,15 +11433,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b10b1f(%rip),%rdi # 36b3efd8 ::get_beta()::val@@Base+0x3682fcc0>\n+\tlea 0x36b11b1f(%rip),%rdi # 36b3ffd8 ::get_beta()::val@@Base+0x36830cc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11498,15 +11498,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b10987(%rip),%rdi # 36b3efe0 ::get_beta()::val@@Base+0x3682fcc8>\n+\tlea 0x36b11987(%rip),%rdi # 36b3ffe0 ::get_beta()::val@@Base+0x36830cc8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11563,15 +11563,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b107ef(%rip),%rdi # 36b3efe8 ::get_beta()::val@@Base+0x3682fcd0>\n+\tlea 0x36b117ef(%rip),%rdi # 36b3ffe8 ::get_beta()::val@@Base+0x36830cd0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11628,15 +11628,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b10657(%rip),%rdi # 36b3eff0 ::get_beta()::val@@Base+0x3682fcd8>\n+\tlea 0x36b11657(%rip),%rdi # 36b3fff0 ::get_beta()::val@@Base+0x36830cd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11693,15 +11693,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b104bf(%rip),%rdi # 36b3eff8 ::get_beta()::val@@Base+0x3682fce0>\n+\tlea 0x36b114bf(%rip),%rdi # 36b3fff8 ::get_beta()::val@@Base+0x36830ce0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11758,15 +11758,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b10327(%rip),%rdi # 36b3f000 ::get_beta()::val@@Base+0x3682fce8>\n+\tlea 0x36b11327(%rip),%rdi # 36b40000 ::get_beta()::val@@Base+0x36830ce8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11823,15 +11823,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b1018f(%rip),%rdi # 36b3f008 ::get_beta()::val@@Base+0x3682fcf0>\n+\tlea 0x36b1118f(%rip),%rdi # 36b40008 ::get_beta()::val@@Base+0x36830cf0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11888,15 +11888,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0fff7(%rip),%rdi # 36b3f010 ::get_beta()::val@@Base+0x3682fcf8>\n+\tlea 0x36b10ff7(%rip),%rdi # 36b40010 ::get_beta()::val@@Base+0x36830cf8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -11953,15 +11953,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0fe5f(%rip),%rdi # 36b3f018 ::get_beta()::val@@Base+0x3682fd00>\n+\tlea 0x36b10e5f(%rip),%rdi # 36b40018 ::get_beta()::val@@Base+0x36830d00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12018,15 +12018,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0fcc7(%rip),%rdi # 36b3f020 ::get_beta()::val@@Base+0x3682fd08>\n+\tlea 0x36b10cc7(%rip),%rdi # 36b40020 ::get_beta()::val@@Base+0x36830d08>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12083,15 +12083,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0fb2f(%rip),%rdi # 36b3f028 ::get_beta()::val@@Base+0x3682fd10>\n+\tlea 0x36b10b2f(%rip),%rdi # 36b40028 ::get_beta()::val@@Base+0x36830d10>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12148,15 +12148,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f997(%rip),%rdi # 36b3f030 ::get_beta()::val@@Base+0x3682fd18>\n+\tlea 0x36b10997(%rip),%rdi # 36b40030 ::get_beta()::val@@Base+0x36830d18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12213,15 +12213,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f7ff(%rip),%rdi # 36b3f038 ::get_beta()::val@@Base+0x3682fd20>\n+\tlea 0x36b107ff(%rip),%rdi # 36b40038 ::get_beta()::val@@Base+0x36830d20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12278,15 +12278,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f667(%rip),%rdi # 36b3f040 ::get_beta()::val@@Base+0x3682fd28>\n+\tlea 0x36b10667(%rip),%rdi # 36b40040 ::get_beta()::val@@Base+0x36830d28>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12343,15 +12343,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f4cf(%rip),%rdi # 36b3f048 ::get_beta()::val@@Base+0x3682fd30>\n+\tlea 0x36b104cf(%rip),%rdi # 36b40048 ::get_beta()::val@@Base+0x36830d30>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12408,15 +12408,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f337(%rip),%rdi # 36b3f050 ::get_beta()::val@@Base+0x3682fd38>\n+\tlea 0x36b10337(%rip),%rdi # 36b40050 ::get_beta()::val@@Base+0x36830d38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12473,15 +12473,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f19f(%rip),%rdi # 36b3f058 ::get_beta()::val@@Base+0x3682fd40>\n+\tlea 0x36b1019f(%rip),%rdi # 36b40058 ::get_beta()::val@@Base+0x36830d40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12538,15 +12538,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0f007(%rip),%rdi # 36b3f060 ::get_beta()::val@@Base+0x3682fd48>\n+\tlea 0x36b10007(%rip),%rdi # 36b40060 ::get_beta()::val@@Base+0x36830d48>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12603,15 +12603,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0ee6f(%rip),%rdi # 36b3f068 ::get_beta()::val@@Base+0x3682fd50>\n+\tlea 0x36b0fe6f(%rip),%rdi # 36b40068 ::get_beta()::val@@Base+0x36830d50>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12668,15 +12668,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0ecd7(%rip),%rdi # 36b3f070 ::get_beta()::val@@Base+0x3682fd58>\n+\tlea 0x36b0fcd7(%rip),%rdi # 36b40070 ::get_beta()::val@@Base+0x36830d58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12733,15 +12733,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0eb3f(%rip),%rdi # 36b3f078 ::get_beta()::val@@Base+0x3682fd60>\n+\tlea 0x36b0fb3f(%rip),%rdi # 36b40078 ::get_beta()::val@@Base+0x36830d60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12798,15 +12798,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e9a7(%rip),%rdi # 36b3f080 ::get_beta()::val@@Base+0x3682fd68>\n+\tlea 0x36b0f9a7(%rip),%rdi # 36b40080 ::get_beta()::val@@Base+0x36830d68>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12863,15 +12863,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e80f(%rip),%rdi # 36b3f088 ::get_beta()::val@@Base+0x3682fd70>\n+\tlea 0x36b0f80f(%rip),%rdi # 36b40088 ::get_beta()::val@@Base+0x36830d70>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12928,15 +12928,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e677(%rip),%rdi # 36b3f090 ::get_beta()::val@@Base+0x3682fd78>\n+\tlea 0x36b0f677(%rip),%rdi # 36b40090 ::get_beta()::val@@Base+0x36830d78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -12993,15 +12993,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e4df(%rip),%rdi # 36b3f098 ::get_beta()::val@@Base+0x3682fd80>\n+\tlea 0x36b0f4df(%rip),%rdi # 36b40098 ::get_beta()::val@@Base+0x36830d80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13058,15 +13058,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e347(%rip),%rdi # 36b3f0a0 ::get_beta()::val@@Base+0x3682fd88>\n+\tlea 0x36b0f347(%rip),%rdi # 36b400a0 ::get_beta()::val@@Base+0x36830d88>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13123,15 +13123,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e1af(%rip),%rdi # 36b3f0a8 ::get_beta()::val@@Base+0x3682fd90>\n+\tlea 0x36b0f1af(%rip),%rdi # 36b400a8 ::get_beta()::val@@Base+0x36830d90>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13188,15 +13188,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0e017(%rip),%rdi # 36b3f0b0 ::get_beta()::val@@Base+0x3682fd98>\n+\tlea 0x36b0f017(%rip),%rdi # 36b400b0 ::get_beta()::val@@Base+0x36830d98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13253,15 +13253,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0de7f(%rip),%rdi # 36b3f0b8 ::get_beta()::val@@Base+0x3682fda0>\n+\tlea 0x36b0ee7f(%rip),%rdi # 36b400b8 ::get_beta()::val@@Base+0x36830da0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13318,15 +13318,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0dce7(%rip),%rdi # 36b3f0c0 ::get_beta()::val@@Base+0x3682fda8>\n+\tlea 0x36b0ece7(%rip),%rdi # 36b400c0 ::get_beta()::val@@Base+0x36830da8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13383,15 +13383,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0db4f(%rip),%rdi # 36b3f0c8 ::get_beta()::val@@Base+0x3682fdb0>\n+\tlea 0x36b0eb4f(%rip),%rdi # 36b400c8 ::get_beta()::val@@Base+0x36830db0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13448,15 +13448,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d9b7(%rip),%rdi # 36b3f0d0 ::get_beta()::val@@Base+0x3682fdb8>\n+\tlea 0x36b0e9b7(%rip),%rdi # 36b400d0 ::get_beta()::val@@Base+0x36830db8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13513,15 +13513,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d81f(%rip),%rdi # 36b3f0d8 ::get_beta()::val@@Base+0x3682fdc0>\n+\tlea 0x36b0e81f(%rip),%rdi # 36b400d8 ::get_beta()::val@@Base+0x36830dc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13578,15 +13578,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d687(%rip),%rdi # 36b3f0e0 ::get_beta()::val@@Base+0x3682fdc8>\n+\tlea 0x36b0e687(%rip),%rdi # 36b400e0 ::get_beta()::val@@Base+0x36830dc8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13643,15 +13643,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d4ef(%rip),%rdi # 36b3f0e8 ::get_beta()::val@@Base+0x3682fdd0>\n+\tlea 0x36b0e4ef(%rip),%rdi # 36b400e8 ::get_beta()::val@@Base+0x36830dd0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13708,15 +13708,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d357(%rip),%rdi # 36b3f0f0 ::get_beta()::val@@Base+0x3682fdd8>\n+\tlea 0x36b0e357(%rip),%rdi # 36b400f0 ::get_beta()::val@@Base+0x36830dd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13773,15 +13773,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d1bf(%rip),%rdi # 36b3f0f8 ::get_beta()::val@@Base+0x3682fde0>\n+\tlea 0x36b0e1bf(%rip),%rdi # 36b400f8 ::get_beta()::val@@Base+0x36830de0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13838,15 +13838,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0d027(%rip),%rdi # 36b3f100 ::get_beta()::val@@Base+0x3682fde8>\n+\tlea 0x36b0e027(%rip),%rdi # 36b40100 ::get_beta()::val@@Base+0x36830de8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13903,15 +13903,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b0ce8f(%rip),%rdi # 36b3f108 ::get_beta()::val@@Base+0x3682fdf0>\n+\tlea 0x36b0de8f(%rip),%rdi # 36b40108 ::get_beta()::val@@Base+0x36830df0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x118,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -13956,454 +13956,454 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0cd58(%rip),%rdi # 36b3f110 ::get_beta()::val@@Base+0x3682fdf8>\n+\tlea 0x36b0dd58(%rip),%rdi # 36b40110 ::get_beta()::val@@Base+0x36830df8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b134d4(%rip),%rbx # 36b458c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n+\tmov 0x36b144d4(%rip),%rbx # 36b468c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n \ttest %rbx,%rbx\n \tjne 32407 \n-\tlea 0x36b12c88(%rip),%rdi # 36b45080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4648>\n+\tlea 0x36b13c88(%rip),%rdi # 36b46080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4648>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b134b9(%rip) # 36b458c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n+\tmov %rax,0x36b144b9(%rip) # 36b468c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0cbb6(%rip),%rsi # 36b3efd0 ::get_beta()::val@@Base+0x3682fcb8>\n+\tlea 0x36b0dbb6(%rip),%rsi # 36b3ffd0 ::get_beta()::val@@Base+0x36830cb8>\n \tlea 0x2a9202(%rip),%rcx # 2db623 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13b3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0cb90(%rip),%rsi # 36b3efd8 ::get_beta()::val@@Base+0x3682fcc0>\n+\tlea 0x36b0db90(%rip),%rsi # 36b3ffd8 ::get_beta()::val@@Base+0x36830cc0>\n \tlea 0x2a9227(%rip),%rcx # 2db676 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1406>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0cb6a(%rip),%rsi # 36b3efe0 ::get_beta()::val@@Base+0x3682fcc8>\n+\tlea 0x36b0db6a(%rip),%rsi # 36b3ffe0 ::get_beta()::val@@Base+0x36830cc8>\n \tlea 0x2a9244(%rip),%rcx # 2db6c1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1451>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0cb44(%rip),%rsi # 36b3efe8 ::get_beta()::val@@Base+0x3682fcd0>\n+\tlea 0x36b0db44(%rip),%rsi # 36b3ffe8 ::get_beta()::val@@Base+0x36830cd0>\n \tlea 0x2a9273(%rip),%rcx # 2db71e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14ae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0cb1e(%rip),%rsi # 36b3eff0 ::get_beta()::val@@Base+0x3682fcd8>\n+\tlea 0x36b0db1e(%rip),%rsi # 36b3fff0 ::get_beta()::val@@Base+0x36830cd8>\n \tlea 0x2a929a(%rip),%rcx # 2db773 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1503>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0caf8(%rip),%rsi # 36b3eff8 ::get_beta()::val@@Base+0x3682fce0>\n+\tlea 0x36b0daf8(%rip),%rsi # 36b3fff8 ::get_beta()::val@@Base+0x36830ce0>\n \tlea 0x2a92c7(%rip),%rcx # 2db7ce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x155e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0cad2(%rip),%rsi # 36b3f000 ::get_beta()::val@@Base+0x3682fce8>\n+\tlea 0x36b0dad2(%rip),%rsi # 36b40000 ::get_beta()::val@@Base+0x36830ce8>\n \tlea 0x2a92ec(%rip),%rcx # 2db821 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0caac(%rip),%rsi # 36b3f008 ::get_beta()::val@@Base+0x3682fcf0>\n+\tlea 0x36b0daac(%rip),%rsi # 36b40008 ::get_beta()::val@@Base+0x36830cf0>\n \tlea 0x2a9317(%rip),%rcx # 2db87a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x160a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ca86(%rip),%rsi # 36b3f010 ::get_beta()::val@@Base+0x3682fcf8>\n+\tlea 0x36b0da86(%rip),%rsi # 36b40010 ::get_beta()::val@@Base+0x36830cf8>\n \tlea 0x2a933a(%rip),%rcx # 2db8cb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x165b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ca60(%rip),%rsi # 36b3f018 ::get_beta()::val@@Base+0x3682fd00>\n+\tlea 0x36b0da60(%rip),%rsi # 36b40018 ::get_beta()::val@@Base+0x36830d00>\n \tlea 0x2a935c(%rip),%rcx # 2db91b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16ab>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ca3a(%rip),%rsi # 36b3f020 ::get_beta()::val@@Base+0x3682fd08>\n+\tlea 0x36b0da3a(%rip),%rsi # 36b40020 ::get_beta()::val@@Base+0x36830d08>\n \tlea 0x2a9376(%rip),%rcx # 2db963 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16f3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ca14(%rip),%rsi # 36b3f028 ::get_beta()::val@@Base+0x3682fd10>\n+\tlea 0x36b0da14(%rip),%rsi # 36b40028 ::get_beta()::val@@Base+0x36830d10>\n \tlea 0x2a93a2(%rip),%rcx # 2db9bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x174d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c9ee(%rip),%rsi # 36b3f030 ::get_beta()::val@@Base+0x3682fd18>\n+\tlea 0x36b0d9ee(%rip),%rsi # 36b40030 ::get_beta()::val@@Base+0x36830d18>\n \tlea 0x2a93c6(%rip),%rcx # 2dba0f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x179f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c9c8(%rip),%rsi # 36b3f038 ::get_beta()::val@@Base+0x3682fd20>\n+\tlea 0x36b0d9c8(%rip),%rsi # 36b40038 ::get_beta()::val@@Base+0x36830d20>\n \tlea 0x2a93f0(%rip),%rcx # 2dba67 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c9a2(%rip),%rsi # 36b3f040 ::get_beta()::val@@Base+0x3682fd28>\n+\tlea 0x36b0d9a2(%rip),%rsi # 36b40040 ::get_beta()::val@@Base+0x36830d28>\n \tlea 0x2a9412(%rip),%rcx # 2dbab7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1847>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c97c(%rip),%rsi # 36b3f048 ::get_beta()::val@@Base+0x3682fd30>\n+\tlea 0x36b0d97c(%rip),%rsi # 36b40048 ::get_beta()::val@@Base+0x36830d30>\n \tlea 0x2a943a(%rip),%rcx # 2dbb0d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x189d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c956(%rip),%rsi # 36b3f050 ::get_beta()::val@@Base+0x3682fd38>\n+\tlea 0x36b0d956(%rip),%rsi # 36b40050 ::get_beta()::val@@Base+0x36830d38>\n \tlea 0x2a945a(%rip),%rcx # 2dbb5b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18eb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c930(%rip),%rsi # 36b3f058 ::get_beta()::val@@Base+0x3682fd40>\n+\tlea 0x36b0d930(%rip),%rsi # 36b40058 ::get_beta()::val@@Base+0x36830d40>\n \tlea 0x2a947c(%rip),%rcx # 2dbbab (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x193b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c90a(%rip),%rsi # 36b3f060 ::get_beta()::val@@Base+0x3682fd48>\n+\tlea 0x36b0d90a(%rip),%rsi # 36b40060 ::get_beta()::val@@Base+0x36830d48>\n \tlea 0x2a9496(%rip),%rcx # 2dbbf3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1983>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c8e4(%rip),%rsi # 36b3f068 ::get_beta()::val@@Base+0x3682fd50>\n+\tlea 0x36b0d8e4(%rip),%rsi # 36b40068 ::get_beta()::val@@Base+0x36830d50>\n \tlea 0x2a94c2(%rip),%rcx # 2dbc4d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19dd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c8be(%rip),%rsi # 36b3f070 ::get_beta()::val@@Base+0x3682fd58>\n+\tlea 0x36b0d8be(%rip),%rsi # 36b40070 ::get_beta()::val@@Base+0x36830d58>\n \tlea 0x2a94e6(%rip),%rcx # 2dbc9f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a2f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c898(%rip),%rsi # 36b3f078 ::get_beta()::val@@Base+0x3682fd60>\n+\tlea 0x36b0d898(%rip),%rsi # 36b40078 ::get_beta()::val@@Base+0x36830d60>\n \tlea 0x2a9510(%rip),%rcx # 2dbcf7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a87>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c872(%rip),%rsi # 36b3f080 ::get_beta()::val@@Base+0x3682fd68>\n+\tlea 0x36b0d872(%rip),%rsi # 36b40080 ::get_beta()::val@@Base+0x36830d68>\n \tlea 0x2a9532(%rip),%rcx # 2dbd47 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ad7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c84c(%rip),%rsi # 36b3f088 ::get_beta()::val@@Base+0x3682fd70>\n+\tlea 0x36b0d84c(%rip),%rsi # 36b40088 ::get_beta()::val@@Base+0x36830d70>\n \tlea 0x2a955a(%rip),%rcx # 2dbd9d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b2d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c826(%rip),%rsi # 36b3f090 ::get_beta()::val@@Base+0x3682fd78>\n+\tlea 0x36b0d826(%rip),%rsi # 36b40090 ::get_beta()::val@@Base+0x36830d78>\n \tlea 0x2a957a(%rip),%rcx # 2dbdeb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b7b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c800(%rip),%rsi # 36b3f098 ::get_beta()::val@@Base+0x3682fd80>\n+\tlea 0x36b0d800(%rip),%rsi # 36b40098 ::get_beta()::val@@Base+0x36830d80>\n \tlea 0x2a959c(%rip),%rcx # 2dbe3b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bcb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c7da(%rip),%rsi # 36b3f0a0 ::get_beta()::val@@Base+0x3682fd88>\n+\tlea 0x36b0d7da(%rip),%rsi # 36b400a0 ::get_beta()::val@@Base+0x36830d88>\n \tlea 0x2a95b6(%rip),%rcx # 2dbe83 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c13>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c7b4(%rip),%rsi # 36b3f0a8 ::get_beta()::val@@Base+0x3682fd90>\n+\tlea 0x36b0d7b4(%rip),%rsi # 36b400a8 ::get_beta()::val@@Base+0x36830d90>\n \tlea 0x2a95e2(%rip),%rcx # 2dbedd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c6d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c78e(%rip),%rsi # 36b3f0b0 ::get_beta()::val@@Base+0x3682fd98>\n+\tlea 0x36b0d78e(%rip),%rsi # 36b400b0 ::get_beta()::val@@Base+0x36830d98>\n \tlea 0x2a9606(%rip),%rcx # 2dbf2f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cbf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c768(%rip),%rsi # 36b3f0b8 ::get_beta()::val@@Base+0x3682fda0>\n+\tlea 0x36b0d768(%rip),%rsi # 36b400b8 ::get_beta()::val@@Base+0x36830da0>\n \tlea 0x2a9630(%rip),%rcx # 2dbf87 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d17>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c742(%rip),%rsi # 36b3f0c0 ::get_beta()::val@@Base+0x3682fda8>\n+\tlea 0x36b0d742(%rip),%rsi # 36b400c0 ::get_beta()::val@@Base+0x36830da8>\n \tlea 0x2a9652(%rip),%rcx # 2dbfd7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d67>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c71c(%rip),%rsi # 36b3f0c8 ::get_beta()::val@@Base+0x3682fdb0>\n+\tlea 0x36b0d71c(%rip),%rsi # 36b400c8 ::get_beta()::val@@Base+0x36830db0>\n \tlea 0x2a967a(%rip),%rcx # 2dc02d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dbd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c6f6(%rip),%rsi # 36b3f0d0 ::get_beta()::val@@Base+0x3682fdb8>\n+\tlea 0x36b0d6f6(%rip),%rsi # 36b400d0 ::get_beta()::val@@Base+0x36830db8>\n \tlea 0x2a969a(%rip),%rcx # 2dc07b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e0b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c6d0(%rip),%rsi # 36b3f0d8 ::get_beta()::val@@Base+0x3682fdc0>\n+\tlea 0x36b0d6d0(%rip),%rsi # 36b400d8 ::get_beta()::val@@Base+0x36830dc0>\n \tlea 0x2a96bc(%rip),%rcx # 2dc0cb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e5b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c6aa(%rip),%rsi # 36b3f0e0 ::get_beta()::val@@Base+0x3682fdc8>\n+\tlea 0x36b0d6aa(%rip),%rsi # 36b400e0 ::get_beta()::val@@Base+0x36830dc8>\n \tlea 0x2a96d6(%rip),%rcx # 2dc113 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ea3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c684(%rip),%rsi # 36b3f0e8 ::get_beta()::val@@Base+0x3682fdd0>\n+\tlea 0x36b0d684(%rip),%rsi # 36b400e8 ::get_beta()::val@@Base+0x36830dd0>\n \tlea 0x2a9702(%rip),%rcx # 2dc16d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1efd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c65e(%rip),%rsi # 36b3f0f0 ::get_beta()::val@@Base+0x3682fdd8>\n+\tlea 0x36b0d65e(%rip),%rsi # 36b400f0 ::get_beta()::val@@Base+0x36830dd8>\n \tlea 0x2a9726(%rip),%rcx # 2dc1bf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f4f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c638(%rip),%rsi # 36b3f0f8 ::get_beta()::val@@Base+0x3682fde0>\n+\tlea 0x36b0d638(%rip),%rsi # 36b400f8 ::get_beta()::val@@Base+0x36830de0>\n \tlea 0x2a9750(%rip),%rcx # 2dc217 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fa7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c612(%rip),%rsi # 36b3f100 ::get_beta()::val@@Base+0x3682fde8>\n+\tlea 0x36b0d612(%rip),%rsi # 36b40100 ::get_beta()::val@@Base+0x36830de8>\n \tlea 0x2a9772(%rip),%rcx # 2dc267 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ff7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c5ec(%rip),%rsi # 36b3f108 ::get_beta()::val@@Base+0x3682fdf0>\n+\tlea 0x36b0d5ec(%rip),%rsi # 36b40108 ::get_beta()::val@@Base+0x36830df0>\n \tlea 0x2a979a(%rip),%rcx # 2dc2bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x204d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c5c6(%rip),%rsi # 36b3f110 ::get_beta()::val@@Base+0x3682fdf8>\n+\tlea 0x36b0d5c6(%rip),%rsi # 36b40110 ::get_beta()::val@@Base+0x36830df8>\n \tlea 0x2a97ba(%rip),%rcx # 2dc30b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x209b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x14(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tcs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b12d39(%rip),%rdi # 36b458c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n+\tmov 0x36b13d39(%rip),%rdi # 36b468c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n \ttest %rdi,%rdi\n \tje 32ba1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b12d23(%rip) # 36b458c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n+\tmovq $0x0,0x36b13d23(%rip) # 36b468c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e88>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000032bb0 :\n ggml_cuda_op_clamp(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -14514,15 +14514,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b0c3cd(%rip),%rdi # 36b3f118 ::get_beta()::val@@Base+0x3682fe00>\n+\tlea 0x36b0d3cd(%rip),%rdi # 36b40118 ::get_beta()::val@@Base+0x36830e00>\n \tjmp 32de3 \n \ttest %eax,%eax\n void clamp_cuda(float const*, float*, float, float, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/clamp.cu:21\n \tjne 32df9 \n \tmov %r13,0x48(%rsp)\n \tmov %r12,0x40(%rsp)\n@@ -14546,15 +14546,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b0c33d(%rip),%rdi # 36b3f120 ::get_beta()::val@@Base+0x3682fe08>\n+\tlea 0x36b0d33d(%rip),%rdi # 36b40120 ::get_beta()::val@@Base+0x36830e08>\n ggml_cuda_op_clamp(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/clamp.cu:45\n@@ -14619,15 +14619,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b0c1f6(%rip),%rdi # 36b3f118 ::get_beta()::val@@Base+0x3682fe00>\n+\tlea 0x36b0d1f6(%rip),%rdi # 36b40118 ::get_beta()::val@@Base+0x36830e00>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -14653,64 +14653,64 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b0c15d(%rip),%rdi # 36b3f120 ::get_beta()::val@@Base+0x3682fe08>\n+\tlea 0x36b0d15d(%rip),%rdi # 36b40120 ::get_beta()::val@@Base+0x36830e08>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl (%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b128dc(%rip),%rbx # 36b458c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n+\tmov 0x36b138dc(%rip),%rbx # 36b468c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n \ttest %rbx,%rbx\n \tjne 33007 \n-\tlea 0x36b120a0(%rip),%rdi # 36b45098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4660>\n+\tlea 0x36b130a0(%rip),%rdi # 36b46098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4660>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b128c1(%rip) # 36b458c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n+\tmov %rax,0x36b138c1(%rip) # 36b468c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c0fe(%rip),%rsi # 36b3f118 ::get_beta()::val@@Base+0x3682fe00>\n+\tlea 0x36b0d0fe(%rip),%rsi # 36b40118 ::get_beta()::val@@Base+0x36830e00>\n \tlea 0x2a93d6(%rip),%rcx # 2dc3f7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2187>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0c0d8(%rip),%rsi # 36b3f120 ::get_beta()::val@@Base+0x3682fe08>\n+\tlea 0x36b0d0d8(%rip),%rsi # 36b40120 ::get_beta()::val@@Base+0x36830e08>\n \tlea 0x2a93d6(%rip),%rcx # 2dc425 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21b5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b12841(%rip),%rdi # 36b458c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n+\tmov 0x36b13841(%rip),%rdi # 36b468c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n \ttest %rdi,%rdi\n \tje 330a1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b1282b(%rip) # 36b458c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n+\tmovq $0x0,0x36b1382b(%rip) # 36b468c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e90>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000330b0 :\n ggml_cuda_op_concat(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -15063,15 +15063,15 @@\n \tmov 0xd0(%rsp),%rdi\n \tmov 0xf0(%rsp),%rsi\n \tmov 0xf8(%rsp),%edx\n \tmov 0xe0(%rsp),%rcx\n \tmov 0xe8(%rsp),%r8d\n \tmov %rdi,0x8(%rsp)\n \tmov %rax,(%rsp)\n-\tlea 0x36b0bac2(%rip),%rdi # 36b3f130 ::get_beta()::val@@Base+0x3682fe18>\n+\tlea 0x36b0cac2(%rip),%rdi # 36b40130 ::get_beta()::val@@Base+0x36830e18>\n \tlea 0x120(%rsp),%r9\n \tcall 22100 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/concat.cu:176\n \tinc %r13\n \tcmp %r13,0x28(%rbx)\n \tmov 0x150(%rsp),%rbp\n \tmov 0xc0(%rsp),%rdx\n@@ -15153,15 +15153,15 @@\n \tmov 0xd0(%rsp),%rdi\n \tmov 0xf0(%rsp),%rsi\n \tmov 0xf8(%rsp),%edx\n \tmov 0xe0(%rsp),%rcx\n \tmov 0xe8(%rsp),%r8d\n \tmov %rdi,0x8(%rsp)\n \tmov %rax,(%rsp)\n-\tlea 0x36b0b8f2(%rip),%rdi # 36b3f128 ::get_beta()::val@@Base+0x3682fe10>\n+\tlea 0x36b0c8f2(%rip),%rdi # 36b40128 ::get_beta()::val@@Base+0x36830e10>\n \tjmp 3366e \n \tnopl 0x0(%rax,%rax,1)\n \tmov 0x18(%rdx),%eax\n \tmov %eax,0xb4(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/concat.cu:90\n \tmovabs $0x100000100,%rdx\n \tmov $0x1,%ecx\n@@ -15207,15 +15207,15 @@\n \tmov 0xd0(%rsp),%rdi\n \tmov 0xf0(%rsp),%rsi\n \tmov 0xf8(%rsp),%edx\n \tmov 0xe0(%rsp),%rcx\n \tmov 0xe8(%rsp),%r8d\n \tmov %rdi,0x8(%rsp)\n \tmov %rax,(%rsp)\n-\tlea 0x36b0b7a5(%rip),%rdi # 36b3f138 ::get_beta()::val@@Base+0x3682fe20>\n+\tlea 0x36b0c7a5(%rip),%rdi # 36b40138 ::get_beta()::val@@Base+0x36830e20>\n \tjmp 3366e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/concat.cu:221\n \tadd $0x168,%rsp\n \tpop %rbx\n \tpop %r12\n \tpop %r13\n \tpop %r14\n@@ -15290,15 +15290,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0b62a(%rip),%rdi # 36b3f128 ::get_beta()::val@@Base+0x3682fe10>\n+\tlea 0x36b0c62a(%rip),%rdi # 36b40128 ::get_beta()::val@@Base+0x36830e10>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -15324,15 +15324,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0b592(%rip),%rdi # 36b3f130 ::get_beta()::val@@Base+0x3682fe18>\n+\tlea 0x36b0c592(%rip),%rdi # 36b40130 ::get_beta()::val@@Base+0x36830e18>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -15358,15 +15358,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0b4fa(%rip),%rdi # 36b3f138 ::get_beta()::val@@Base+0x3682fe20>\n+\tlea 0x36b0c4fa(%rip),%rdi # 36b40138 ::get_beta()::val@@Base+0x36830e20>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -15437,15 +15437,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0b2f8(%rip),%rdi # 36b3f140 ::get_beta()::val@@Base+0x3682fe28>\n+\tlea 0x36b0c2f8(%rip),%rdi # 36b40140 ::get_beta()::val@@Base+0x36830e28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x148,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -15516,15 +15516,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0b0f0(%rip),%rdi # 36b3f148 ::get_beta()::val@@Base+0x3682fe30>\n+\tlea 0x36b0c0f0(%rip),%rdi # 36b40148 ::get_beta()::val@@Base+0x36830e30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x148,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -15595,15 +15595,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0aee8(%rip),%rdi # 36b3f150 ::get_beta()::val@@Base+0x3682fe38>\n+\tlea 0x36b0bee8(%rip),%rdi # 36b40150 ::get_beta()::val@@Base+0x36830e38>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x148,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -15674,114 +15674,114 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0ace0(%rip),%rdi # 36b3f158 ::get_beta()::val@@Base+0x3682fe40>\n+\tlea 0x36b0bce0(%rip),%rdi # 36b40158 ::get_beta()::val@@Base+0x36830e40>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x148,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b11424(%rip),%rbx # 36b458d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n+\tmov 0x36b12424(%rip),%rbx # 36b468d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n \ttest %rbx,%rbx\n \tjne 344c7 \n-\tlea 0x36b10bf8(%rip),%rdi # 36b450b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4678>\n+\tlea 0x36b11bf8(%rip),%rdi # 36b460b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4678>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b11409(%rip) # 36b458d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n+\tmov %rax,0x36b12409(%rip) # 36b468d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ac4e(%rip),%rsi # 36b3f128 ::get_beta()::val@@Base+0x3682fe10>\n+\tlea 0x36b0bc4e(%rip),%rsi # 36b40128 ::get_beta()::val@@Base+0x36830e10>\n \tlea 0x2a8074(%rip),%rcx # 2dc555 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ac28(%rip),%rsi # 36b3f130 ::get_beta()::val@@Base+0x3682fe18>\n+\tlea 0x36b0bc28(%rip),%rsi # 36b40130 ::get_beta()::val@@Base+0x36830e18>\n \tlea 0x2a8065(%rip),%rcx # 2dc574 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2304>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ac02(%rip),%rsi # 36b3f138 ::get_beta()::val@@Base+0x3682fe20>\n+\tlea 0x36b0bc02(%rip),%rsi # 36b40138 ::get_beta()::val@@Base+0x36830e20>\n \tlea 0x2a8056(%rip),%rcx # 2dc593 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2323>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0abdc(%rip),%rsi # 36b3f140 ::get_beta()::val@@Base+0x3682fe28>\n+\tlea 0x36b0bbdc(%rip),%rsi # 36b40140 ::get_beta()::val@@Base+0x36830e28>\n \tlea 0x2a8047(%rip),%rcx # 2dc5b2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2342>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0abb6(%rip),%rsi # 36b3f148 ::get_beta()::val@@Base+0x3682fe30>\n+\tlea 0x36b0bbb6(%rip),%rsi # 36b40148 ::get_beta()::val@@Base+0x36830e30>\n \tlea 0x2a8059(%rip),%rcx # 2dc5f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2382>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ab90(%rip),%rsi # 36b3f150 ::get_beta()::val@@Base+0x3682fe38>\n+\tlea 0x36b0bb90(%rip),%rsi # 36b40150 ::get_beta()::val@@Base+0x36830e38>\n \tlea 0x2a806b(%rip),%rcx # 2dc632 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0ab6a(%rip),%rsi # 36b3f158 ::get_beta()::val@@Base+0x3682fe40>\n+\tlea 0x36b0bb6a(%rip),%rsi # 36b40158 ::get_beta()::val@@Base+0x36830e40>\n \tlea 0x2a807d(%rip),%rcx # 2dc672 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2402>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x10(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b112a9(%rip),%rdi # 36b458d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n+\tmov 0x36b122a9(%rip),%rdi # 36b468d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n \ttest %rdi,%rdi\n \tje 34641 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b11293(%rip) # 36b458d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n+\tmovq $0x0,0x36b12293(%rip) # 36b468d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e98>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000034650 :\n ggml_cuda_op_conv_transpose_1d(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -15966,15 +15966,15 @@\n \tlea 0xb0(%rsp),%rdx\n \tlea 0xa8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xc8(%rsp),%rsi\n \tmov 0xd0(%rsp),%edx\n \tmov 0xb8(%rsp),%rcx\n \tmov 0xc0(%rsp),%r8d\n-\tlea 0x36b0a79e(%rip),%rdi # 36b3f160 ::get_beta()::val@@Base+0x3682fe48>\n+\tlea 0x36b0b79e(%rip),%rdi # 36b40160 ::get_beta()::val@@Base+0x36830e48>\n \tlea 0xf0(%rsp),%r9\n \tpush 0xa8(%rsp)\n \tpush 0xb8(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_conv_transpose_1d(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/conv-transpose-1d.cu:89\n@@ -16074,51 +16074,51 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36b0a560(%rip),%rdi # 36b3f160 ::get_beta()::val@@Base+0x3682fe48>\n+\tlea 0x36b0b560(%rip),%rdi # 36b40160 ::get_beta()::val@@Base+0x36830e48>\n \tlea 0x50(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b10cad(%rip),%rdi # 36b458d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n+\tmov 0x36b11cad(%rip),%rdi # 36b468d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n \ttest %rdi,%rdi\n \tjne 34c46 \n-\tlea 0x36b10491(%rip),%rdi # 36b450c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4690>\n+\tlea 0x36b11491(%rip),%rdi # 36b460c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4690>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b10c92(%rip) # 36b458d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n+\tmov %rax,0x36b11c92(%rip) # 36b468d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0a507(%rip),%rsi # 36b3f160 ::get_beta()::val@@Base+0x3682fe48>\n+\tlea 0x36b0b507(%rip),%rsi # 36b40160 ::get_beta()::val@@Base+0x36830e48>\n \tlea 0x2a7aab(%rip),%rcx # 2dc70b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x249b>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b10c41(%rip),%rdi # 36b458d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n+\tmov 0x36b11c41(%rip),%rdi # 36b468d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n \ttest %rdi,%rdi\n \tje 34cb1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b10c2b(%rip) # 36b458d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n+\tmovq $0x0,0x36b11c2b(%rip) # 36b468d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000034cc0 :\n ggml_cuda_op_conv2d_dw(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -16316,15 +16316,15 @@\n \tlea 0x78(%rsp),%rdx\n \tlea 0x70(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x90(%rsp),%rsi\n \tmov 0x98(%rsp),%edx\n \tmov 0x80(%rsp),%rcx\n \tmov 0x88(%rsp),%r8d\n-\tmov 0x36b0ffde(%rip),%rdi # 36b44fe0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e78>\n+\tmov 0x36b10fde(%rip),%rdi # 36b45fe0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e78>\n \tjmp 35215 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/conv2d-dw.cu:154\n \tmov %rbx,%rdi\n \tcall 226b0 \n \ttest %al,%al\n \tje 35264 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/conv2d-dw.cu:155\n@@ -16412,15 +16412,15 @@\n \tlea 0x78(%rsp),%rdx\n \tlea 0x70(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x90(%rsp),%rsi\n \tmov 0x98(%rsp),%edx\n \tmov 0x80(%rsp),%rcx\n \tmov 0x88(%rsp),%r8d\n-\tmov 0x36b0fdab(%rip),%rdi # 36b44fc0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e50>\n+\tmov 0x36b10dab(%rip),%rdi # 36b45fc0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e50>\n \tlea 0xd0(%rsp),%r9\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/conv2d-dw.cu:161\n \tadd $0x158,%rsp\n@@ -16453,53 +16453,53 @@\n \tmov $0x33f,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b10624(%rip),%rbx # 36b458e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n+\tmov 0x36b11624(%rip),%rbx # 36b468e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n \ttest %rbx,%rbx\n \tjne 352d7 \n-\tlea 0x36b0fe18(%rip),%rdi # 36b450e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46a8>\n+\tlea 0x36b10e18(%rip),%rdi # 36b460e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46a8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b10609(%rip) # 36b458e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n+\tmov %rax,0x36b11609(%rip) # 36b468e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tmov 0x36b0fcf6(%rip),%rsi # 36b44fe0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e78>\n+\tmov 0x36b10cf6(%rip),%rsi # 36b45fe0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e78>\n \tlea 0x2a7526(%rip),%rcx # 2dc817 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25a7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tmov 0x36b0fca8(%rip),%rsi # 36b44fc0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e50>\n+\tmov 0x36b10ca8(%rip),%rsi # 36b45fc0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e50>\n \tlea 0x2a7537(%rip),%rcx # 2dc856 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25e6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b10589(%rip),%rdi # 36b458e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n+\tmov 0x36b11589(%rip),%rdi # 36b468e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n \ttest %rdi,%rdi\n \tje 35371 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b10573(%rip) # 36b458e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n+\tmovq $0x0,0x36b11573(%rip) # 36b468e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ea8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000035380 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base>:\n void __device_stub__conv2d_dw_kernel(float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int):\n@@ -16549,15 +16549,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tmov 0x36b0fb17(%rip),%rdi # 36b44fe0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e78>\n+\tmov 0x36b10b17(%rip),%rdi # 36b45fe0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -16611,15 +16611,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tmov 0x36b0f987(%rip),%rdi # 36b44fc0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e50>\n+\tmov 0x36b10987(%rip),%rdi # 36b45fc0 (float const*, float const*, float*, int, int, int, int, int, int, int, int, int, int, int, int, int, int)@@Base+0x5e50>\n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -16665,15 +16665,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tmov 0x36b0f7d7(%rip),%rdi \n+\tmov 0x36b107d7(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -16845,15 +16845,15 @@\n \tlea 0x70(%rsp),%rdx\n \tlea 0x68(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x88(%rsp),%rsi\n \tmov 0x90(%rsp),%edx\n \tmov 0x78(%rsp),%rcx\n \tmov 0x80(%rsp),%r8d\n-\tmov 0x36b0f4ca(%rip),%rdi \n+\tmov 0x36b104ca(%rip),%rdi \n \tlea 0xb0(%rsp),%r9\n \tpush 0x68(%rsp)\n \tpush 0x78(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/conv2d-transpose.cu:91\n \tadd $0x118,%rsp\n@@ -16913,41 +16913,41 @@\n \tlea 0x2a5581(%rip),%rsi # 2db0fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe8d>\n \tlea 0x2a5581(%rip),%rdx # 2db104 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe94>\n \tmov $0x33f,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b0fd4d(%rip),%rdi # 36b458e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n+\tmov 0x36b10d4d(%rip),%rdi # 36b468e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n \ttest %rdi,%rdi\n \tjne 35bb6 \n-\tlea 0x36b0f551(%rip),%rdi # 36b450f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46c0>\n+\tlea 0x36b10551(%rip),%rdi # 36b460f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46c0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b0fd32(%rip) # 36b458e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n+\tmov %rax,0x36b10d32(%rip) # 36b468e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tmov 0x36b0f377(%rip),%rsi \n+\tmov 0x36b10377(%rip),%rsi \n \tlea 0x2a6dd6(%rip),%rcx # 2dc9a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2736>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b0fce1(%rip),%rdi # 36b458e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n+\tmov 0x36b10ce1(%rip),%rdi # 36b468e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n \ttest %rdi,%rdi\n \tje 35c21 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b0fccb(%rip) # 36b458e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n+\tmovq $0x0,0x36b10ccb(%rip) # 36b468e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000035c30 :\n ggml_get_to_bf16_cuda(ggml_type):\n@@ -17118,15 +17118,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b09327(%rip),%rdi \n+\tlea 0x36b0a327(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:493\n \tadd $0x70,%rsp\n@@ -17182,15 +17182,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b0923f(%rip),%rdi \n+\tlea 0x36b0a23f(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:500\n \tadd $0x70,%rsp\n@@ -17240,15 +17240,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b09166(%rip),%rdi \n+\tlea 0x36b0a166(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:463\n \tadd $0x70,%rsp\n@@ -17298,15 +17298,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0908e(%rip),%rdi \n+\tlea 0x36b0a08e(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:463\n \tadd $0x70,%rsp\n@@ -17359,15 +17359,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b08f85(%rip),%rdi \n+\tlea 0x36b09f85(%rip),%rdi \n \tjmp 36269 \n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:469\n \tjne 3627f \n \tmov %r15,0x48(%rsp)\n \tmov %r14,0x40(%rsp)\n \tmov %rbx,0x38(%rsp)\n@@ -17382,15 +17382,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b08f17(%rip),%rdi \n+\tlea 0x36b09f17(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:474\n \tadd $0x70,%rsp\n@@ -17440,15 +17440,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b08e66(%rip),%rdi \n+\tlea 0x36b09e66(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:463\n \tadd $0x70,%rsp\n@@ -17492,15 +17492,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08dae(%rip),%rdi \n+\tlea 0x36b09dae(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:480\n \tadd $0x58,%rsp\n@@ -17543,15 +17543,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08cf6(%rip),%rdi \n+\tlea 0x36b09cf6(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:486\n \tadd $0x58,%rsp\n@@ -17594,15 +17594,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08c3e(%rip),%rdi \n+\tlea 0x36b09c3e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:506\n \tadd $0x58,%rsp\n@@ -17645,15 +17645,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08b86(%rip),%rdi \n+\tlea 0x36b09b86(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:512\n \tadd $0x58,%rsp\n@@ -17696,15 +17696,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08ace(%rip),%rdi \n+\tlea 0x36b09ace(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:518\n \tadd $0x58,%rsp\n@@ -17747,15 +17747,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08a16(%rip),%rdi \n+\tlea 0x36b09a16(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:524\n \tadd $0x58,%rsp\n@@ -17798,15 +17798,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0895e(%rip),%rdi \n+\tlea 0x36b0995e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:530\n \tadd $0x58,%rsp\n@@ -17849,15 +17849,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b088a6(%rip),%rdi \n+\tlea 0x36b098a6(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:536\n \tadd $0x58,%rsp\n@@ -17900,15 +17900,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b087ee(%rip),%rdi \n+\tlea 0x36b097ee(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:542\n \tadd $0x58,%rsp\n@@ -17951,15 +17951,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08736(%rip),%rdi \n+\tlea 0x36b09736(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:554\n \tadd $0x58,%rsp\n@@ -18002,15 +18002,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0867e(%rip),%rdi \n+\tlea 0x36b0967e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:566\n \tadd $0x58,%rsp\n@@ -18054,15 +18054,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b085bf(%rip),%rdi \n+\tlea 0x36b095bf(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:560\n \tadd $0x58,%rsp\n@@ -18106,15 +18106,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08507(%rip),%rdi \n+\tlea 0x36b09507(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:572\n \tadd $0x58,%rsp\n@@ -18157,15 +18157,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b08456(%rip),%rdi \n+\tlea 0x36b09456(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:548\n \tadd $0x58,%rsp\n@@ -18213,15 +18213,15 @@\n 0000000000036e50 :\n ggml_get_to_fp32_cuda(ggml_type):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:673\n \tdec %edi\n \tcmp $0x1d,%edi\n \tja 36e66 \n \tmovslq %edi,%rax\n-\tlea 0x36b0848f(%rip),%rcx \n+\tlea 0x36b0948f(%rip),%rcx \n \tmov (%rcx,%rax,8),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:719\n \tret\n \txor %eax,%eax\n \tret\n \tnopl 0x0(%rax)\n void dequantize_row_q4_0_cuda(void const*, float*, long, ihipStream_t*):\n@@ -18271,15 +18271,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b082ef(%rip),%rdi \n+\tlea 0x36b092ef(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:493\n \tadd $0x70,%rsp\n@@ -18335,15 +18335,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b08207(%rip),%rdi \n+\tlea 0x36b09207(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:500\n \tadd $0x70,%rsp\n@@ -18393,15 +18393,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0812e(%rip),%rdi \n+\tlea 0x36b0912e(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:463\n \tadd $0x70,%rsp\n@@ -18451,15 +18451,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b08056(%rip),%rdi \n+\tlea 0x36b09056(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:463\n \tadd $0x70,%rsp\n@@ -18509,15 +18509,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b07f7e(%rip),%rdi \n+\tlea 0x36b08f7e(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:463\n \tadd $0x70,%rsp\n@@ -18561,15 +18561,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07ec6(%rip),%rdi \n+\tlea 0x36b08ec6(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:480\n \tadd $0x58,%rsp\n@@ -18612,15 +18612,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07e0e(%rip),%rdi \n+\tlea 0x36b08e0e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:486\n \tadd $0x58,%rsp\n@@ -18663,15 +18663,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07d56(%rip),%rdi \n+\tlea 0x36b08d56(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:506\n \tadd $0x58,%rsp\n@@ -18714,15 +18714,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07c9e(%rip),%rdi \n+\tlea 0x36b08c9e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:512\n \tadd $0x58,%rsp\n@@ -18765,15 +18765,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07be6(%rip),%rdi \n+\tlea 0x36b08be6(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:518\n \tadd $0x58,%rsp\n@@ -18816,15 +18816,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07b2e(%rip),%rdi \n+\tlea 0x36b08b2e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:524\n \tadd $0x58,%rsp\n@@ -18867,15 +18867,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07a76(%rip),%rdi \n+\tlea 0x36b08a76(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:530\n \tadd $0x58,%rsp\n@@ -18918,15 +18918,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b079be(%rip),%rdi \n+\tlea 0x36b089be(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:536\n \tadd $0x58,%rsp\n@@ -18969,15 +18969,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07906(%rip),%rdi \n+\tlea 0x36b08906(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:542\n \tadd $0x58,%rsp\n@@ -19020,15 +19020,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0784e(%rip),%rdi \n+\tlea 0x36b0884e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:554\n \tadd $0x58,%rsp\n@@ -19071,15 +19071,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07796(%rip),%rdi \n+\tlea 0x36b08796(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:566\n \tadd $0x58,%rsp\n@@ -19123,15 +19123,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b076d7(%rip),%rdi \n+\tlea 0x36b086d7(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:560\n \tadd $0x58,%rsp\n@@ -19175,15 +19175,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0761f(%rip),%rdi \n+\tlea 0x36b0861f(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:572\n \tadd $0x58,%rsp\n@@ -19226,15 +19226,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0756e(%rip),%rdi \n+\tlea 0x36b0856e(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:548\n \tadd $0x58,%rsp\n@@ -19362,15 +19362,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07389(%rip),%rdi \n+\tlea 0x36b08389(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:602\n \tadd $0xb0,%rsp\n@@ -19450,15 +19450,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07221(%rip),%rdi \n+\tlea 0x36b08221(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:602\n \tadd $0xb0,%rsp\n@@ -19553,15 +19553,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b07099(%rip),%rdi \n+\tlea 0x36b08099(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:602\n \tadd $0xb0,%rsp\n@@ -19641,15 +19641,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06f31(%rip),%rdi \n+\tlea 0x36b07f31(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:602\n \tadd $0xb0,%rsp\n@@ -19744,15 +19744,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06da9(%rip),%rdi \n+\tlea 0x36b07da9(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:602\n \tadd $0xb0,%rsp\n@@ -19832,15 +19832,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06c41(%rip),%rdi \n+\tlea 0x36b07c41(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/convert.cu:602\n \tadd $0xb0,%rsp\n@@ -19867,15 +19867,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b06a4c(%rip),%rdi \n+\tlea 0x36b07a4c(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -19895,15 +19895,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b069d4(%rip),%rdi \n+\tlea 0x36b079d4(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -19923,15 +19923,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b0695d(%rip),%rdi \n+\tlea 0x36b0795d(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -19951,15 +19951,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b068e5(%rip),%rdi \n+\tlea 0x36b078e5(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -19979,15 +19979,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0686c(%rip),%rdi \n+\tlea 0x36b0786c(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -20007,15 +20007,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b067f4(%rip),%rdi \n+\tlea 0x36b077f4(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -20035,15 +20035,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b0677c(%rip),%rdi \n+\tlea 0x36b0777c(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -20060,15 +20060,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06715(%rip),%rdi \n+\tlea 0x36b07715(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20085,15 +20085,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b066ad(%rip),%rdi \n+\tlea 0x36b076ad(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20110,15 +20110,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06645(%rip),%rdi \n+\tlea 0x36b07645(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20135,15 +20135,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b065dd(%rip),%rdi \n+\tlea 0x36b075dd(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20160,15 +20160,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06575(%rip),%rdi \n+\tlea 0x36b07575(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20185,15 +20185,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0650d(%rip),%rdi \n+\tlea 0x36b0750d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20210,15 +20210,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b064a5(%rip),%rdi \n+\tlea 0x36b074a5(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20235,15 +20235,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0643d(%rip),%rdi \n+\tlea 0x36b0743d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20260,15 +20260,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b063d5(%rip),%rdi \n+\tlea 0x36b073d5(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20285,15 +20285,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0636d(%rip),%rdi \n+\tlea 0x36b0736d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20310,15 +20310,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06305(%rip),%rdi \n+\tlea 0x36b07305(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20335,15 +20335,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b0629d(%rip),%rdi \n+\tlea 0x36b0729d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20360,15 +20360,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b06235(%rip),%rdi \n+\tlea 0x36b07235(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20385,15 +20385,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b061cd(%rip),%rdi \n+\tlea 0x36b071cd(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20413,15 +20413,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b06155(%rip),%rdi \n+\tlea 0x36b07155(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -20441,15 +20441,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b060dd(%rip),%rdi \n+\tlea 0x36b070dd(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -20469,15 +20469,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b06064(%rip),%rdi \n+\tlea 0x36b07064(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -20497,15 +20497,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b05fec(%rip),%rdi \n+\tlea 0x36b06fec(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -20525,15 +20525,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b05f74(%rip),%rdi \n+\tlea 0x36b06f74(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -20550,15 +20550,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05f0d(%rip),%rdi \n+\tlea 0x36b06f0d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20575,15 +20575,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05ea5(%rip),%rdi \n+\tlea 0x36b06ea5(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20600,15 +20600,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05e3d(%rip),%rdi \n+\tlea 0x36b06e3d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20625,15 +20625,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05dd5(%rip),%rdi \n+\tlea 0x36b06dd5(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20650,15 +20650,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05d6d(%rip),%rdi \n+\tlea 0x36b06d6d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20675,15 +20675,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05d05(%rip),%rdi \n+\tlea 0x36b06d05(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20700,15 +20700,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05c9d(%rip),%rdi \n+\tlea 0x36b06c9d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20725,15 +20725,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05c35(%rip),%rdi \n+\tlea 0x36b06c35(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20750,15 +20750,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05bcd(%rip),%rdi \n+\tlea 0x36b06bcd(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20775,15 +20775,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05b65(%rip),%rdi \n+\tlea 0x36b06b65(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20800,15 +20800,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05afd(%rip),%rdi \n+\tlea 0x36b06afd(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20825,15 +20825,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05a95(%rip),%rdi \n+\tlea 0x36b06a95(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20850,15 +20850,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05a2d(%rip),%rdi \n+\tlea 0x36b06a2d(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20875,15 +20875,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b059c5(%rip),%rdi \n+\tlea 0x36b069c5(%rip),%rdi \n \tlea 0x40(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x68,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -20916,15 +20916,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b058f8(%rip),%rdi \n+\tlea 0x36b068f8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -20957,15 +20957,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05820(%rip),%rdi \n+\tlea 0x36b06820(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -20998,15 +20998,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05748(%rip),%rdi \n+\tlea 0x36b06748(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -21039,15 +21039,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05670(%rip),%rdi \n+\tlea 0x36b06670(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -21080,15 +21080,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b05598(%rip),%rdi \n+\tlea 0x36b06598(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -21121,504 +21121,504 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36b054c0(%rip),%rdi \n+\tlea 0x36b064c0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b0ba94(%rip),%rbx # 36b458f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n+\tmov 0x36b0ca94(%rip),%rbx # 36b468f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n \ttest %rbx,%rbx\n \tjne 39e77 \n-\tlea 0x36b0b2a8(%rip),%rdi # 36b45110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46d8>\n+\tlea 0x36b0c2a8(%rip),%rdi # 36b46110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46d8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b0ba79(%rip) # 36b458f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n+\tmov %rax,0x36b0ca79(%rip) # 36b468f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b052f6(%rip),%rsi \n+\tlea 0x36b062f6(%rip),%rsi \n \tlea 0x2a2b49(%rip),%rcx # 2dc9da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x276a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b052d0(%rip),%rsi \n+\tlea 0x36b062d0(%rip),%rsi \n \tlea 0x2a2b4d(%rip),%rcx # 2dca0c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x279c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b052aa(%rip),%rsi \n+\tlea 0x36b062aa(%rip),%rsi \n \tlea 0x2a2b51(%rip),%rcx # 2dca3e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27ce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05284(%rip),%rsi \n+\tlea 0x36b06284(%rip),%rsi \n \tlea 0x2a2b4f(%rip),%rcx # 2dca6a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0525e(%rip),%rsi \n+\tlea 0x36b0625e(%rip),%rsi \n \tlea 0x2a2b4d(%rip),%rcx # 2dca96 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2826>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05238(%rip),%rsi \n+\tlea 0x36b06238(%rip),%rsi \n \tlea 0x2a2b88(%rip),%rcx # 2dcaff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x288f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05212(%rip),%rsi \n+\tlea 0x36b06212(%rip),%rsi \n \tlea 0x2a2bc3(%rip),%rcx # 2dcb68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b051ec(%rip),%rsi \n+\tlea 0x36b061ec(%rip),%rsi \n \tlea 0x2a2bfe(%rip),%rcx # 2dcbd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2961>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b051c6(%rip),%rsi \n+\tlea 0x36b061c6(%rip),%rsi \n \tlea 0x2a2bfb(%rip),%rcx # 2dcbfc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x298c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b051a0(%rip),%rsi \n+\tlea 0x36b061a0(%rip),%rsi \n \tlea 0x2a2bf8(%rip),%rcx # 2dcc27 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29b7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0517a(%rip),%rsi \n+\tlea 0x36b0617a(%rip),%rsi \n \tlea 0x2a2bf5(%rip),%rcx # 2dcc52 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05154(%rip),%rsi \n+\tlea 0x36b06154(%rip),%rsi \n \tlea 0x2a2bf2(%rip),%rcx # 2dcc7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a0d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0512e(%rip),%rsi \n+\tlea 0x36b0612e(%rip),%rsi \n \tlea 0x2a2bef(%rip),%rcx # 2dcca8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a38>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05108(%rip),%rsi \n+\tlea 0x36b06108(%rip),%rsi \n \tlea 0x2a2bef(%rip),%rcx # 2dccd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b050e2(%rip),%rsi \n+\tlea 0x36b060e2(%rip),%rsi \n \tlea 0x2a2bee(%rip),%rcx # 2dcd03 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a93>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b050bc(%rip),%rsi \n+\tlea 0x36b060bc(%rip),%rsi \n \tlea 0x2a2bec(%rip),%rcx # 2dcd2f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2abf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05096(%rip),%rsi \n+\tlea 0x36b06096(%rip),%rsi \n \tlea 0x2a2bec(%rip),%rcx # 2dcd5d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2aed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05070(%rip),%rsi \n+\tlea 0x36b06070(%rip),%rsi \n \tlea 0x2a2bea(%rip),%rcx # 2dcd89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b19>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0504a(%rip),%rsi \n+\tlea 0x36b0604a(%rip),%rsi \n \tlea 0x2a2be8(%rip),%rcx # 2dcdb5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b45>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b05024(%rip),%rsi \n+\tlea 0x36b06024(%rip),%rsi \n \tlea 0x2a2be7(%rip),%rcx # 2dcde2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b72>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04ffe(%rip),%rsi \n+\tlea 0x36b05ffe(%rip),%rsi \n \tlea 0x2a2be6(%rip),%rcx # 2dce0f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b9f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04fd8(%rip),%rsi \n+\tlea 0x36b05fd8(%rip),%rsi \n \tlea 0x2a2be4(%rip),%rcx # 2dce3b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bcb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04fb2(%rip),%rsi \n+\tlea 0x36b05fb2(%rip),%rsi \n \tlea 0x2a2bdc(%rip),%rcx # 2dce61 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bf1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04f8c(%rip),%rsi \n+\tlea 0x36b05f8c(%rip),%rsi \n \tlea 0x2a2bd4(%rip),%rcx # 2dce87 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c17>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04f66(%rip),%rsi \n+\tlea 0x36b05f66(%rip),%rsi \n \tlea 0x2a2c09(%rip),%rcx # 2dceea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c7a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04f40(%rip),%rsi \n+\tlea 0x36b05f40(%rip),%rsi \n \tlea 0x2a2c3e(%rip),%rcx # 2dcf4d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cdd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04f1a(%rip),%rsi \n+\tlea 0x36b05f1a(%rip),%rsi \n \tlea 0x2a2c73(%rip),%rcx # 2dcfb0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04ef4(%rip),%rsi \n+\tlea 0x36b05ef4(%rip),%rsi \n \tlea 0x2a2c6a(%rip),%rcx # 2dcfd5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d65>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04ece(%rip),%rsi \n+\tlea 0x36b05ece(%rip),%rsi \n \tlea 0x2a2c61(%rip),%rcx # 2dcffa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d8a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04ea8(%rip),%rsi \n+\tlea 0x36b05ea8(%rip),%rsi \n \tlea 0x2a2c58(%rip),%rcx # 2dd01f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2daf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04e82(%rip),%rsi \n+\tlea 0x36b05e82(%rip),%rsi \n \tlea 0x2a2c4f(%rip),%rcx # 2dd044 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dd4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04e5c(%rip),%rsi \n+\tlea 0x36b05e5c(%rip),%rsi \n \tlea 0x2a2c46(%rip),%rcx # 2dd069 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2df9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04e36(%rip),%rsi \n+\tlea 0x36b05e36(%rip),%rsi \n \tlea 0x2a2c40(%rip),%rcx # 2dd091 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e21>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04e10(%rip),%rsi \n+\tlea 0x36b05e10(%rip),%rsi \n \tlea 0x2a2c39(%rip),%rcx # 2dd0b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e48>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04dea(%rip),%rsi \n+\tlea 0x36b05dea(%rip),%rsi \n \tlea 0x2a2c31(%rip),%rcx # 2dd0de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e6e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04dc4(%rip),%rsi \n+\tlea 0x36b05dc4(%rip),%rsi \n \tlea 0x2a2c2b(%rip),%rcx # 2dd106 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e96>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04d9e(%rip),%rsi \n+\tlea 0x36b05d9e(%rip),%rsi \n \tlea 0x2a2c23(%rip),%rcx # 2dd12c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ebc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04d78(%rip),%rsi \n+\tlea 0x36b05d78(%rip),%rsi \n \tlea 0x2a2c1b(%rip),%rcx # 2dd152 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ee2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04d52(%rip),%rsi \n+\tlea 0x36b05d52(%rip),%rsi \n \tlea 0x2a2c14(%rip),%rcx # 2dd179 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f09>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04d2c(%rip),%rsi \n+\tlea 0x36b05d2c(%rip),%rsi \n \tlea 0x2a2c0d(%rip),%rcx # 2dd1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04d06(%rip),%rsi \n+\tlea 0x36b05d06(%rip),%rsi \n \tlea 0x2a2c05(%rip),%rcx # 2dd1c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f56>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04ce0(%rip),%rsi \n+\tlea 0x36b05ce0(%rip),%rsi \n \tlea 0x2a2c02(%rip),%rcx # 2dd1f1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f81>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04cba(%rip),%rsi \n+\tlea 0x36b05cba(%rip),%rsi \n \tlea 0x2a2c0c(%rip),%rcx # 2dd229 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fb9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04c94(%rip),%rsi \n+\tlea 0x36b05c94(%rip),%rsi \n \tlea 0x2a2c10(%rip),%rcx # 2dd25b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2feb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04c6e(%rip),%rsi \n+\tlea 0x36b05c6e(%rip),%rsi \n \tlea 0x2a2c1a(%rip),%rcx # 2dd293 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3023>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04c48(%rip),%rsi \n+\tlea 0x36b05c48(%rip),%rsi \n \tlea 0x2a2c17(%rip),%rcx # 2dd2be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x304e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36b0b219(%rip),%rdi # 36b458f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n+\tmov 0x36b0c219(%rip),%rdi # 36b468f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n \ttest %rdi,%rdi\n \tje 3a6f1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b0b203(%rip) # 36b458f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n+\tmovq $0x0,0x36b0c203(%rip) # 36b468f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4eb8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000003a700 :\n ggml_cuda_count_equal(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -21781,15 +21781,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36b04aa5(%rip),%rdi \n+\tlea 0x36b05aa5(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/count-equal.cu:64\n \tadd $0x98,%rsp\n@@ -21897,51 +21897,51 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36b04898(%rip),%rdi \n+\tlea 0x36b05898(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x98,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b0ad7d(%rip),%rdi # 36b458f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n+\tmov 0x36b0bd7d(%rip),%rdi # 36b468f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n \ttest %rdi,%rdi\n \tjne 3ab96 \n-\tlea 0x36b0a5a1(%rip),%rdi # 36b45128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46f0>\n+\tlea 0x36b0b5a1(%rip),%rdi # 36b46128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x46f0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b0ad62(%rip) # 36b458f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n+\tmov %rax,0x36b0bd62(%rip) # 36b468f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b04837(%rip),%rsi \n+\tlea 0x36b05837(%rip),%rsi \n \tlea 0x2a286f(%rip),%rcx # 2dd41f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31af>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b0ad11(%rip),%rdi # 36b458f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n+\tmov 0x36b0bd11(%rip),%rdi # 36b468f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n \ttest %rdi,%rdi\n \tje 3ac01 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b0acfb(%rip) # 36b458f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n+\tmovq $0x0,0x36b0bcfb(%rip) # 36b468f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000003ac10 :\n ggml_cuda_cpy_dest_ptrs_copy(ggml_cuda_graph*, char**, int, ihipStream_t*):\n@@ -22200,15 +22200,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b0435f(%rip),%rdi \n+\tlea 0x36b0535f(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:642\n \tmov (%r14),%eax\n \ttest %eax,%eax\n \tje 3bab4 \n \tcmp $0x1,%eax\n@@ -22329,15 +22329,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b040b7(%rip),%rdi \n+\tlea 0x36b050b7(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:628\n \tcmpl $0x0,(%r14)\n \tjne 3cc2c \n ggml_cpy_q4_1_f32_cuda(char const*, char*, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, ihipStream_t*, char**, int&):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:483\n@@ -22428,15 +22428,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b03e89(%rip),%rdi \n+\tlea 0x36b04e89(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:633\n \tcmpl $0x0,(%r14)\n \tjne 3cc2c \n ggml_cpy_q5_0_f32_cuda(char const*, char*, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, ihipStream_t*, char**, int&):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:507\n@@ -22527,15 +22527,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b03c5b(%rip),%rdi \n+\tlea 0x36b04c5b(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:640\n \tcmpl $0x0,(%r14)\n \tjne 3cc2c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:641\n \tsub $0x8,%rsp\n@@ -22654,15 +22654,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b03959(%rip),%rdi \n+\tlea 0x36b04959(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cpy_f16_f32_cuda(char const*, char*, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, ihipStream_t*, char**, int&):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:384\n \tlea 0x3f(%r15),%eax\n \tlea 0x7e(%r15),%edi\n \ttest %eax,%eax\n \tcmovns %eax,%edi\n@@ -22754,15 +22754,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b03768(%rip),%rdi \n+\tlea 0x36b04768(%rip),%rdi \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n \tlea 0x100(%rsp),%r9\n \tpush 0x48(%rsp)\n \tpush 0x58(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:658\n@@ -22868,15 +22868,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b034a5(%rip),%rdi \n+\tlea 0x36b044a5(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:445\n \ttest $0x1f,%r15b\n \tjne 3ccad \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:446\n \tlea 0x1f(%r15),%edi\n@@ -22970,15 +22970,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b03274(%rip),%rdi \n+\tlea 0x36b04274(%rip),%rdi \n \tjmp 3bcf0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:469\n \ttest $0x1f,%r15b\n \tjne 3ccce \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:470\n \tlea 0x1f(%r15),%edi\n \ttest %r15d,%r15d\n@@ -23071,15 +23071,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b0303b(%rip),%rdi \n+\tlea 0x36b0403b(%rip),%rdi \n \tjmp 3bcf0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:493\n \ttest $0x1f,%r15b\n \tjne 3ccef \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:494\n \tlea 0x1f(%r15),%edi\n \ttest %r15d,%r15d\n@@ -23172,15 +23172,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b02e02(%rip),%rdi \n+\tlea 0x36b03e02(%rip),%rdi \n \tjmp 3bcf0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:639\n \tsub $0x8,%rsp\n \tlea 0x1ac(%rsp),%rax\n \tmov %rbp,%rdi\n \tmov %r13,%rsi\n \tmov %r15d,%edx\n@@ -23320,15 +23320,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b02a75(%rip),%rdi \n+\tlea 0x36b03a75(%rip),%rdi \n \tjmp 3bcf0 \n ggml_cuda_cpy(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor*, bool):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:424\n \ttest $0x1f,%r15b\n \tjne 3cd10 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:425\n \tlea 0x1f(%r15),%edi\n@@ -23422,15 +23422,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b0283c(%rip),%rdi \n+\tlea 0x36b0383c(%rip),%rdi \n \tjmp 3bcf0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:559\n \tlea 0x2a086f(%rip),%rdi # 2dd43f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31cf>\n \tlea 0x29e474(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x2a08ac(%rip),%rcx # 2dd48a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x321a>\n \tmov $0x22f,%esi\n \txor %eax,%eax\n@@ -23620,15 +23620,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b024ab(%rip),%rdi \n+\tlea 0x36b034ab(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x48(%rsp)\n \tpush 0x58(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:545\n \tadd $0x128,%rsp\n@@ -23760,15 +23760,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b02203(%rip),%rdi \n+\tlea 0x36b03203(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x48(%rsp)\n \tpush 0x58(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:521\n \tadd $0x128,%rsp\n@@ -23893,15 +23893,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b01f71(%rip),%rdi \n+\tlea 0x36b02f71(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x48(%rsp)\n \tpush 0x58(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:534\n \tadd $0x128,%rsp\n@@ -24024,15 +24024,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36b01d03(%rip),%rdi \n+\tlea 0x36b02d03(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x48(%rsp)\n \tpush 0x58(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:555\n \tadd $0x128,%rsp\n@@ -24090,68 +24090,68 @@\n \tmov (%rbx),%eax\n \tcmp $0x1e,%rax\n \tja 3d8d6 \n \tlea 0x2d0f0c(%rip),%rcx # 30e71c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x344ac>\n \tmovslq (%rcx,%rax,4),%rax\n \tadd %rcx,%rax\n \tjmp *%rax\n-\tlea 0x36b01bc8(%rip),%rax \n+\tlea 0x36b02bc8(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:697\n \tmov (%rbx),%eax\n \ttest %eax,%eax\n \tje 3d888 \n \tcmp $0x1,%eax\n \tjne 3d8d6 \n-\tlea 0x36b01bc0(%rip),%rax \n+\tlea 0x36b02bc0(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:681\n \tcmpl $0x0,(%rbx)\n \tjne 3d8d6 \n-\tlea 0x36b01bce(%rip),%rax \n+\tlea 0x36b02bce(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:685\n \tcmpl $0x0,(%rbx)\n \tjne 3d8d6 \n-\tlea 0x36b01bcc(%rip),%rax \n+\tlea 0x36b02bcc(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:689\n \tcmpl $0x0,(%rbx)\n \tjne 3d8d6 \n-\tlea 0x36b01bce(%rip),%rax \n+\tlea 0x36b02bce(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:695\n \tcmpl $0x0,(%rbx)\n \tjne 3d8d6 \n-\tlea 0x36b01bd8(%rip),%rax \n+\tlea 0x36b02bd8(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:677\n \tcmpl $0x0,(%rbx)\n \tjne 3d8d6 \n-\tlea 0x36b01b82(%rip),%rax \n+\tlea 0x36b02b82(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01bc9(%rip),%rax \n+\tlea 0x36b02bc9(%rip),%rax \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:705\n \tadd $0x8,%rsp\n \tpop %rbx\n \tpop %r14\n \tret\n-\tlea 0x36b01b72(%rip),%rax \n+\tlea 0x36b02b72(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01b79(%rip),%rax \n+\tlea 0x36b02b79(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01b80(%rip),%rax \n+\tlea 0x36b02b80(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01b8f(%rip),%rax \n+\tlea 0x36b02b8f(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01b3e(%rip),%rax \n+\tlea 0x36b02b3e(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01b75(%rip),%rax \n+\tlea 0x36b02b75(%rip),%rax \n \tjmp 3d88f \n-\tlea 0x36b01b1c(%rip),%rax \n+\tlea 0x36b02b1c(%rip),%rax \n \tjmp 3d88f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cpy.cu:702\n \tcall 23590 \n \tmov %rax,%r14\n \tmov (%rbx),%edi\n \tcall 23590 \n \tlea 0x29fb53(%rip),%rdi # 2dd43f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31cf>\n@@ -24214,15 +24214,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b01979(%rip),%rdi \n+\tlea 0x36b02979(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24277,15 +24277,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b01801(%rip),%rdi \n+\tlea 0x36b02801(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24340,15 +24340,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b01689(%rip),%rdi \n+\tlea 0x36b02689(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24403,15 +24403,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b01511(%rip),%rdi \n+\tlea 0x36b02511(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24466,15 +24466,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b01399(%rip),%rdi \n+\tlea 0x36b02399(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24529,15 +24529,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b01221(%rip),%rdi \n+\tlea 0x36b02221(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24592,15 +24592,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b010a9(%rip),%rdi \n+\tlea 0x36b020a9(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24655,15 +24655,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00f31(%rip),%rdi \n+\tlea 0x36b01f31(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24718,15 +24718,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00db9(%rip),%rdi \n+\tlea 0x36b01db9(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24781,15 +24781,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00c41(%rip),%rdi \n+\tlea 0x36b01c41(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24844,15 +24844,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00ac9(%rip),%rdi \n+\tlea 0x36b01ac9(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24907,15 +24907,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00951(%rip),%rdi \n+\tlea 0x36b01951(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -24970,15 +24970,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b007d9(%rip),%rdi \n+\tlea 0x36b017d9(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -25033,15 +25033,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00661(%rip),%rdi \n+\tlea 0x36b01661(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -25096,15 +25096,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b004e9(%rip),%rdi \n+\tlea 0x36b014e9(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -25159,204 +25159,204 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36b00371(%rip),%rdi \n+\tlea 0x36b01371(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b067e4(%rip),%rbx # 36b45900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n+\tmov 0x36b077e4(%rip),%rbx # 36b46900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n \ttest %rbx,%rbx\n \tjne 3f137 \n-\tlea 0x36b06018(%rip),%rdi # 36b45140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4708>\n+\tlea 0x36b07018(%rip),%rdi # 36b46140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4708>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b067c9(%rip) # 36b45900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n+\tmov %rax,0x36b077c9(%rip) # 36b46900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00316(%rip),%rsi \n+\tlea 0x36b01316(%rip),%rsi \n \tlea 0x29e4be(%rip),%rcx # 2dd60f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x339f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b002e0(%rip),%rsi \n+\tlea 0x36b012e0(%rip),%rsi \n \tlea 0x29e4db(%rip),%rcx # 2dd65a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33ea>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00242(%rip),%rsi \n+\tlea 0x36b01242(%rip),%rsi \n \tlea 0x29e4f8(%rip),%rcx # 2dd6a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3435>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0021c(%rip),%rsi \n+\tlea 0x36b0121c(%rip),%rsi \n \tlea 0x29e515(%rip),%rcx # 2dd6f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3480>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b001f6(%rip),%rsi \n+\tlea 0x36b011f6(%rip),%rsi \n \tlea 0x29e533(%rip),%rcx # 2dd73c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x34cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b001d0(%rip),%rsi \n+\tlea 0x36b011d0(%rip),%rsi \n \tlea 0x29e550(%rip),%rcx # 2dd787 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3517>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b001aa(%rip),%rsi \n+\tlea 0x36b011aa(%rip),%rsi \n \tlea 0x29e573(%rip),%rcx # 2dd7d8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3568>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00184(%rip),%rsi \n+\tlea 0x36b01184(%rip),%rsi \n \tlea 0x29e596(%rip),%rcx # 2dd829 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x35b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b0015e(%rip),%rsi \n+\tlea 0x36b0115e(%rip),%rsi \n \tlea 0x29e5b9(%rip),%rcx # 2dd87a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x360a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00138(%rip),%rsi \n+\tlea 0x36b01138(%rip),%rsi \n \tlea 0x29e619(%rip),%rcx # 2dd908 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3698>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00112(%rip),%rsi \n+\tlea 0x36b01112(%rip),%rsi \n \tlea 0x29e63c(%rip),%rcx # 2dd959 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x36e9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b000ec(%rip),%rsi \n+\tlea 0x36b010ec(%rip),%rsi \n \tlea 0x29e69c(%rip),%rcx # 2dd9e7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3777>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b000c6(%rip),%rsi \n+\tlea 0x36b010c6(%rip),%rsi \n \tlea 0x29e6bf(%rip),%rcx # 2dda38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x37c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b000a8(%rip),%rsi \n+\tlea 0x36b010a8(%rip),%rsi \n \tlea 0x29e71f(%rip),%rcx # 2ddac6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3856>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00082(%rip),%rsi \n+\tlea 0x36b01082(%rip),%rsi \n \tlea 0x29e742(%rip),%rcx # 2ddb17 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x38a7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36b00044(%rip),%rsi \n+\tlea 0x36b01044(%rip),%rsi \n \tlea 0x29e7a2(%rip),%rcx # 2ddba5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3935>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b064c9(%rip),%rdi # 36b45900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n+\tmov 0x36b074c9(%rip),%rdi # 36b46900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n \ttest %rdi,%rdi\n \tje 3f451 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b064b3(%rip) # 36b45900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n+\tmovq $0x0,0x36b074b3(%rip) # 36b46900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ec8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000003f460 :\n ggml_cuda_cross_entropy_loss(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -25556,15 +25556,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36affd7c(%rip),%rdi \n+\tlea 0x36b00d7c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 3f7f7 \n \tmovabs $0x100000020,%rdx\n@@ -25603,15 +25603,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36affc87(%rip),%rdi \n+\tlea 0x36b00c87(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cross-entropy-loss.cu:131\n \tcall 227e0 \n@@ -25735,15 +25735,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36affa5a(%rip),%rdi \n+\tlea 0x36b00a5a(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -25769,15 +25769,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36aff9c2(%rip),%rdi \n+\tlea 0x36b009c2(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -25936,15 +25936,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36aff76f(%rip),%rdi \n+\tlea 0x36b0076f(%rip),%rdi \n \tjmp 3fdde \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cross-entropy-loss.cu:173\n \tmov %r15,%rdi\n \tmov $0x1,%esi\n \tmov %rbx,%rdx\n \tmov $0x1,%ecx\n \tmov %r12,%r8\n@@ -25977,15 +25977,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36aff69a(%rip),%rdi \n+\tlea 0x36b0069a(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/cross-entropy-loss.cu:177\n \tadd $0xa8,%rsp\n@@ -26098,15 +26098,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36aff470(%rip),%rdi \n+\tlea 0x36b00470(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x98,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -26132,83 +26132,83 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36aff3c8(%rip),%rdi \n+\tlea 0x36b003c8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x98,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b0581c(%rip),%rbx # 36b45908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n+\tmov 0x36b0681c(%rip),%rbx # 36b46908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n \ttest %rbx,%rbx\n \tjne 40107 \n-\tlea 0x36b05060(%rip),%rdi # 36b45158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4720>\n+\tlea 0x36b06060(%rip),%rdi # 36b46158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4720>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b05801(%rip) # 36b45908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n+\tmov %rax,0x36b06801(%rip) # 36b46908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aff34e(%rip),%rsi \n+\tlea 0x36b0034e(%rip),%rsi \n \tlea 0x29dc25(%rip),%rcx # 2ddd46 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3ad6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aff328(%rip),%rsi \n+\tlea 0x36b00328(%rip),%rsi \n \tlea 0x29dc24(%rip),%rcx # 2ddd73 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3b03>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aff302(%rip),%rsi \n+\tlea 0x36b00302(%rip),%rsi \n \tlea 0x29dc23(%rip),%rcx # 2ddda0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3b30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aff2dc(%rip),%rsi \n+\tlea 0x36b002dc(%rip),%rsi \n \tlea 0x29dc29(%rip),%rcx # 2dddd4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3b64>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36b05731(%rip),%rdi # 36b45908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n+\tmov 0x36b06731(%rip),%rdi # 36b46908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n \ttest %rdi,%rdi\n \tje 401f1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b0571b(%rip) # 36b45908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n+\tmovq $0x0,0x36b0671b(%rip) # 36b46908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000040200 ::~ggml_cuda_pool_alloc()@@Base>:\n ggml_cuda_pool_alloc::~ggml_cuda_pool_alloc():\n@@ -26335,15 +26335,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aff0f0(%rip),%rdi \n+\tlea 0x36b000f0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_diag_mask_inf(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/diagmask.cu:40\n@@ -26401,51 +26401,51 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36afefd8(%rip),%rdi \n+\tlea 0x36afffd8(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36b05435(%rip),%rdi # 36b45910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n+\tmov 0x36b06435(%rip),%rdi # 36b46910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n \ttest %rdi,%rdi\n \tjne 404f6 \n-\tlea 0x36b04c89(%rip),%rdi # 36b45170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4738>\n+\tlea 0x36b05c89(%rip),%rdi # 36b46170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4738>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36b0541a(%rip) # 36b45910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n+\tmov %rax,0x36b0641a(%rip) # 36b46910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afef7f(%rip),%rsi \n+\tlea 0x36afff7f(%rip),%rsi \n \tlea 0x29d948(%rip),%rcx # 2dde58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3be8>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36b053c9(%rip),%rdi # 36b45910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n+\tmov 0x36b063c9(%rip),%rdi # 36b46910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n \ttest %rdi,%rdi\n \tje 40561 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b053b3(%rip) # 36b45910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n+\tmovq $0x0,0x36b063b3(%rip) # 36b46910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ed8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000040570 :\n ggml_cuda_flash_attn_ext_tile_f16(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -26469,36 +26469,36 @@\n \tjp 405e4 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:306\n \tcmp $0x80,%rax\n \tje 40653 \n \tcmp $0x40,%rax\n \tjne 406d2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:312\n-\tlea 0x36afeed7(%rip),%rdx \n+\tlea 0x36affed7(%rip),%rdx \n \tjmp 405fd \n \txorps %xmm1,%xmm1\n \tucomiss %xmm1,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:352\n \tjne 4061d \n \tjp 4061d \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:306\n \tcmp $0x80,%rax\n \tje 4065c \n \tcmp $0x40,%rax\n \tjne 406d2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:312\n-\tlea 0x36afeeee(%rip),%rdx \n+\tlea 0x36affeee(%rip),%rdx \n \tjmp 40636 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:306\n \tcmp $0x80,%rax\n \tje 40665 \n \tcmp $0x40,%rax\n \tjne 406d2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:312\n-\tlea 0x36afeec3(%rip),%rdx \n+\tlea 0x36affec3(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n@@ -26506,40 +26506,40 @@\n \tjmp 406ab \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:306\n \tcmp $0x80,%rax\n \tje 40689 \n \tcmp $0x40,%rax\n \tjne 406d2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:312\n-\tlea 0x36afeeba(%rip),%rdx \n+\tlea 0x36affeba(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 220f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 406ab \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f16.cu:320\n-\tlea 0x36afee3e(%rip),%rdx \n+\tlea 0x36affe3e(%rip),%rdx \n \tjmp 4066c \n-\tlea 0x36afee75(%rip),%rdx \n+\tlea 0x36affe75(%rip),%rdx \n \tjmp 40690 \n-\tlea 0x36afee5c(%rip),%rdx \n+\tlea 0x36affe5c(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 22f70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 406ab \n-\tlea 0x36afee68(%rip),%rdx \n+\tlea 0x36affe68(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n@@ -26653,15 +26653,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afeafb(%rip),%rdi \n+\tlea 0x36affafb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -26757,15 +26757,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afe833(%rip),%rdi \n+\tlea 0x36aff833(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -26791,15 +26791,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36afe790(%rip),%rdi \n+\tlea 0x36aff790(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -26822,15 +26822,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36afe706(%rip),%rdi \n+\tlea 0x36aff706(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -26856,15 +26856,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36afe670(%rip),%rdi \n+\tlea 0x36aff670(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -26887,15 +26887,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36afe5e6(%rip),%rdi \n+\tlea 0x36aff5e6(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -26991,15 +26991,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afe32b(%rip),%rdi \n+\tlea 0x36aff32b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -27095,15 +27095,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afe063(%rip),%rdi \n+\tlea 0x36aff063(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -27199,15 +27199,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afdd9b(%rip),%rdi \n+\tlea 0x36afed9b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -27303,15 +27303,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afdad3(%rip),%rdi \n+\tlea 0x36afead3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -27337,15 +27337,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36afda30(%rip),%rdi \n+\tlea 0x36afea30(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -27371,15 +27371,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36afd998(%rip),%rdi \n+\tlea 0x36afe998(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -27475,15 +27475,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afd6db(%rip),%rdi \n+\tlea 0x36afe6db(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -27579,184 +27579,184 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36afd413(%rip),%rdi \n+\tlea 0x36afe413(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36b037fc(%rip),%rbx # 36b45918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n+\tmov 0x36b047fc(%rip),%rbx # 36b46918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n \ttest %rbx,%rbx\n \tjne 42137 \n-\tlea 0x36b03060(%rip),%rdi # 36b45188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4750>\n+\tlea 0x36b04060(%rip),%rdi # 36b46188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4750>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36b037e1(%rip) # 36b45918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n+\tmov %rax,0x36b047e1(%rip) # 36b46918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd346(%rip),%rsi \n+\tlea 0x36afe346(%rip),%rsi \n \tlea 0x29c104(%rip),%rcx # 2de255 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3fe5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd328(%rip),%rsi \n+\tlea 0x36afe328(%rip),%rsi \n \tlea 0x29c14e(%rip),%rcx # 2de2cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x405d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd302(%rip),%rsi \n+\tlea 0x36afe302(%rip),%rsi \n \tlea 0x29c16f(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd2c4(%rip),%rsi \n+\tlea 0x36afe2c4(%rip),%rsi \n \tlea 0x29c189(%rip),%rcx # 2de364 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd2ae(%rip),%rsi \n+\tlea 0x36afe2ae(%rip),%rsi \n \tlea 0x29c1d4(%rip),%rcx # 2de3dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x416d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd288(%rip),%rsi \n+\tlea 0x36afe288(%rip),%rsi \n \tlea 0x29c1f6(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd262(%rip),%rsi \n+\tlea 0x36afe262(%rip),%rsi \n \tlea 0x29c211(%rip),%rcx # 2de476 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4206>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd23c(%rip),%rsi \n+\tlea 0x36afe23c(%rip),%rsi \n \tlea 0x29c25b(%rip),%rcx # 2de4ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x427e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd216(%rip),%rsi \n+\tlea 0x36afe216(%rip),%rsi \n \tlea 0x29c2a6(%rip),%rcx # 2de567 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x42f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd1f8(%rip),%rsi \n+\tlea 0x36afe1f8(%rip),%rsi \n \tlea 0x29c2f0(%rip),%rcx # 2de5df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x436f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd1c2(%rip),%rsi \n+\tlea 0x36afe1c2(%rip),%rsi \n \tlea 0x29c311(%rip),%rcx # 2de62e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x43be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd1a4(%rip),%rsi \n+\tlea 0x36afe1a4(%rip),%rsi \n \tlea 0x29c35c(%rip),%rcx # 2de6a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4437>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd17e(%rip),%rsi \n+\tlea 0x36afe17e(%rip),%rsi \n \tlea 0x29c37e(%rip),%rcx # 2de6f7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4487>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36afd158(%rip),%rsi \n+\tlea 0x36afe158(%rip),%rsi \n \tlea 0x29c3c8(%rip),%rcx # 2de76f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x44ff>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36b03541(%rip),%rdi # 36b45918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n+\tmov 0x36b04541(%rip),%rdi # 36b46918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n \ttest %rdi,%rdi\n \tje 423f1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36b0352b(%rip) # 36b45918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n+\tmovq $0x0,0x36b0452b(%rip) # 36b46918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000042400 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base>:\n void launch_fattn<64, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int):\n@@ -28595,15 +28595,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36afc48b(%rip),%rdi \n+\tlea 0x36afd48b(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 4315a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -28651,15 +28651,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36afc36d(%rip),%rdi \n+\tlea 0x36afd36d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -29730,15 +29730,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36afb35b(%rip),%rdi \n+\tlea 0x36afc35b(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 4429a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -29786,15 +29786,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36afb23d(%rip),%rdi \n+\tlea 0x36afc23d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -30911,15 +30911,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36afa1eb(%rip),%rdi \n+\tlea 0x36afb1eb(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 4543a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -30967,15 +30967,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36afa08d(%rip),%rdi \n+\tlea 0x36afb08d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -32046,15 +32046,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36af90b3(%rip),%rdi \n+\tlea 0x36afa0b3(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 4657a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -32102,15 +32102,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36af8f5d(%rip),%rdi \n+\tlea 0x36af9f5d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -32363,36 +32363,36 @@\n \tjp 469ca \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:317\n \tcmp $0x80,%rax\n \tje 46a39 \n \tcmp $0x40,%rax\n \tjne 46a97 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:323\n-\tlea 0x36af8b61(%rip),%rdx \n+\tlea 0x36af9b61(%rip),%rdx \n \tjmp 469e3 \n \txorps %xmm1,%xmm1\n \tucomiss %xmm1,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:360\n \tjne 46a03 \n \tjp 46a03 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:317\n \tcmp $0x80,%rax\n \tje 46a42 \n \tcmp $0x40,%rax\n \tjne 46a97 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:323\n-\tlea 0x36af8b78(%rip),%rdx \n+\tlea 0x36af9b78(%rip),%rdx \n \tjmp 46a1c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:317\n \tcmp $0x80,%rax\n \tje 46a4b \n \tcmp $0x40,%rax\n \tjne 46a97 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:323\n-\tlea 0x36af8b4d(%rip),%rdx \n+\tlea 0x36af9b4d(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x20,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n@@ -32400,40 +32400,40 @@\n \tjmp 46a91 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:317\n \tcmp $0x80,%rax\n \tje 46a6f \n \tcmp $0x40,%rax\n \tjne 46a97 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:323\n-\tlea 0x36af8b44(%rip),%rdx \n+\tlea 0x36af9b44(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x20,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 220f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 46a91 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-tile-f32.cu:331\n-\tlea 0x36af8ac8(%rip),%rdx \n+\tlea 0x36af9ac8(%rip),%rdx \n \tjmp 46a52 \n-\tlea 0x36af8aff(%rip),%rdx \n+\tlea 0x36af9aff(%rip),%rdx \n \tjmp 46a76 \n-\tlea 0x36af8ae6(%rip),%rdx \n+\tlea 0x36af9ae6(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x20,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 22f70 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 46a91 \n-\tlea 0x36af8af2(%rip),%rdx \n+\tlea 0x36af9af2(%rip),%rdx \n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x20,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n@@ -32540,15 +32540,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af879b(%rip),%rdi \n+\tlea 0x36af979b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -32644,15 +32644,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af84d3(%rip),%rdi \n+\tlea 0x36af94d3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -32678,15 +32678,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af8430(%rip),%rdi \n+\tlea 0x36af9430(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -32709,15 +32709,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af83a6(%rip),%rdi \n+\tlea 0x36af93a6(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -32743,15 +32743,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af8310(%rip),%rdi \n+\tlea 0x36af9310(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -32774,15 +32774,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af8286(%rip),%rdi \n+\tlea 0x36af9286(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -32878,15 +32878,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af7fcb(%rip),%rdi \n+\tlea 0x36af8fcb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -32982,15 +32982,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af7d03(%rip),%rdi \n+\tlea 0x36af8d03(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -33086,15 +33086,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af7a3b(%rip),%rdi \n+\tlea 0x36af8a3b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -33190,15 +33190,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af7773(%rip),%rdi \n+\tlea 0x36af8773(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -33224,15 +33224,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af76d0(%rip),%rdi \n+\tlea 0x36af86d0(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -33258,15 +33258,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af7638(%rip),%rdi \n+\tlea 0x36af8638(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -33362,15 +33362,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af737b(%rip),%rdi \n+\tlea 0x36af837b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -33466,184 +33466,184 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af70b3(%rip),%rdi \n+\tlea 0x36af80b3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36afd434(%rip),%rbx # 36b45920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n+\tmov 0x36afe434(%rip),%rbx # 36b46920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n \ttest %rbx,%rbx\n \tjne 48507 \n-\tlea 0x36afcca8(%rip),%rdi # 36b451a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4768>\n+\tlea 0x36afdca8(%rip),%rdi # 36b461a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4768>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36afd419(%rip) # 36b45920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n+\tmov %rax,0x36afe419(%rip) # 36b46920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6fe6(%rip),%rsi \n+\tlea 0x36af7fe6(%rip),%rsi \n \tlea 0x29631d(%rip),%rcx # 2de83e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x45ce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6fc8(%rip),%rsi \n+\tlea 0x36af7fc8(%rip),%rsi \n \tlea 0x295d7e(%rip),%rcx # 2de2cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x405d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6fa2(%rip),%rsi \n+\tlea 0x36af7fa2(%rip),%rsi \n \tlea 0x295d9f(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6f64(%rip),%rsi \n+\tlea 0x36af7f64(%rip),%rsi \n \tlea 0x29630b(%rip),%rcx # 2de8b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4646>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6f4e(%rip),%rsi \n+\tlea 0x36af7f4e(%rip),%rsi \n \tlea 0x295e04(%rip),%rcx # 2de3dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x416d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6f28(%rip),%rsi \n+\tlea 0x36af7f28(%rip),%rsi \n \tlea 0x295e26(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6f02(%rip),%rsi \n+\tlea 0x36af7f02(%rip),%rsi \n \tlea 0x2962fa(%rip),%rcx # 2de92f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x46bf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6edc(%rip),%rsi \n+\tlea 0x36af7edc(%rip),%rsi \n \tlea 0x296344(%rip),%rcx # 2de9a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4737>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6eb6(%rip),%rsi \n+\tlea 0x36af7eb6(%rip),%rsi \n \tlea 0x29638f(%rip),%rcx # 2dea20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x47b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6e98(%rip),%rsi \n+\tlea 0x36af7e98(%rip),%rsi \n \tlea 0x295f20(%rip),%rcx # 2de5df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x436f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6e62(%rip),%rsi \n+\tlea 0x36af7e62(%rip),%rsi \n \tlea 0x2963ab(%rip),%rcx # 2dea98 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4828>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6e44(%rip),%rsi \n+\tlea 0x36af7e44(%rip),%rsi \n \tlea 0x295f8c(%rip),%rcx # 2de6a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4437>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6e1e(%rip),%rsi \n+\tlea 0x36af7e1e(%rip),%rsi \n \tlea 0x2963c8(%rip),%rcx # 2deb11 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x48a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36af6df8(%rip),%rsi \n+\tlea 0x36af7df8(%rip),%rsi \n \tlea 0x296412(%rip),%rcx # 2deb89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4919>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36afd179(%rip),%rdi # 36b45920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n+\tmov 0x36afe179(%rip),%rdi # 36b46920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n \ttest %rdi,%rdi\n \tje 487c1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36afd163(%rip) # 36b45920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n+\tmovq $0x0,0x36afe163(%rip) # 36b46920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ee8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000487d0 :\n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -33690,16 +33690,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6dd9(%rip),%rcx \n-\tlea 0x36af6dca(%rip),%rdx \n+\tlea 0x36af7dd9(%rip),%rcx \n+\tlea 0x36af7dca(%rip),%rdx \n \tjmp 4897e \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tshrd $0x4,%rcx,%rax\n \tcmp $0x20,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:588\n \tjg 48937 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:590\n@@ -33717,16 +33717,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6df6(%rip),%rcx \n-\tlea 0x36af6de7(%rip),%rdx \n+\tlea 0x36af7df6(%rip),%rcx \n+\tlea 0x36af7de7(%rip),%rdx \n \tjmp 4890a \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:512\n \tcmp $0xc,%rax\n \tja 48f0e \n \tlea 0x2c5f40(%rip),%rcx # 30e814 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x345a4>\n \tmovslq (%rcx,%rax,4),%rax\n@@ -33740,16 +33740,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6c75(%rip),%rcx \n-\tlea 0x36af6c66(%rip),%rdx \n+\tlea 0x36af7c75(%rip),%rcx \n+\tlea 0x36af7c66(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -33775,16 +33775,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6d99(%rip),%rcx \n-\tlea 0x36af6d8a(%rip),%rdx \n+\tlea 0x36af7d99(%rip),%rcx \n+\tlea 0x36af7d8a(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -33803,151 +33803,151 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6c7f(%rip),%rcx \n-\tlea 0x36af6c70(%rip),%rdx \n+\tlea 0x36af7c7f(%rip),%rcx \n+\tlea 0x36af7c70(%rip),%rdx \n \tjmp 48d5c \n void ggml_cuda_flash_attn_ext_wmma_f16_case<96, 32, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6c65(%rip),%rcx \n-\tlea 0x36af6c56(%rip),%rdx \n+\tlea 0x36af7c65(%rip),%rcx \n+\tlea 0x36af7c56(%rip),%rdx \n \tjmp 48db6 \n void ggml_cuda_flash_attn_ext_wmma_f16_case<112, 32, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6c4b(%rip),%rcx \n-\tlea 0x36af6c3c(%rip),%rdx \n+\tlea 0x36af7c4b(%rip),%rcx \n+\tlea 0x36af7c3c(%rip),%rdx \n \tjmp 48e10 \n void ggml_cuda_flash_attn_ext_wmma_f16_case<128, 32, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6c31(%rip),%rcx \n-\tlea 0x36af6c22(%rip),%rdx \n+\tlea 0x36af7c31(%rip),%rcx \n+\tlea 0x36af7c22(%rip),%rdx \n \tjmp 48e6a \n void ggml_cuda_flash_attn_ext_wmma_f16_case<80, 16, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6aff(%rip),%rcx \n-\tlea 0x36af6af0(%rip),%rdx \n+\tlea 0x36af7aff(%rip),%rcx \n+\tlea 0x36af7af0(%rip),%rdx \n \tjmp 48b9a \n void ggml_cuda_flash_attn_ext_wmma_f16_case<96, 16, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6aed(%rip),%rcx \n-\tlea 0x36af6ade(%rip),%rdx \n+\tlea 0x36af7aed(%rip),%rcx \n+\tlea 0x36af7ade(%rip),%rdx \n \tjmp 48bf4 \n void ggml_cuda_flash_attn_ext_wmma_f16_case<112, 16, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6adb(%rip),%rcx \n-\tlea 0x36af6acc(%rip),%rdx \n+\tlea 0x36af7adb(%rip),%rcx \n+\tlea 0x36af7acc(%rip),%rdx \n \tjmp 48c4e \n void ggml_cuda_flash_attn_ext_wmma_f16_case<128, 16, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6ac9(%rip),%rcx \n-\tlea 0x36af6aba(%rip),%rdx \n+\tlea 0x36af7ac9(%rip),%rcx \n+\tlea 0x36af7aba(%rip),%rdx \n \tjmp 48ca8 \n void ggml_cuda_flash_attn_ext_wmma_f16_case<256, 16, float>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6ab7(%rip),%rcx \n-\tlea 0x36af6aa8(%rip),%rdx \n+\tlea 0x36af7ab7(%rip),%rcx \n+\tlea 0x36af7aa8(%rip),%rdx \n \tjmp 48d02 \n void ggml_cuda_flash_attn_ext_wmma_f16_case<80, 16, __half>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tcall 22bc0 \n \tmov %rax,%r15\n \tcall 22ce0 \n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6b2d(%rip),%rcx \n-\tlea 0x36af6b1e(%rip),%rdx \n+\tlea 0x36af7b2d(%rip),%rcx \n+\tlea 0x36af7b1e(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -33966,16 +33966,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6ae3(%rip),%rcx \n-\tlea 0x36af6ad4(%rip),%rdx \n+\tlea 0x36af7ae3(%rip),%rcx \n+\tlea 0x36af7ad4(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -33994,16 +33994,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6a99(%rip),%rcx \n-\tlea 0x36af6a8a(%rip),%rdx \n+\tlea 0x36af7a99(%rip),%rcx \n+\tlea 0x36af7a8a(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34022,16 +34022,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6a4f(%rip),%rcx \n-\tlea 0x36af6a40(%rip),%rdx \n+\tlea 0x36af7a4f(%rip),%rcx \n+\tlea 0x36af7a40(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34050,16 +34050,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6a05(%rip),%rcx \n-\tlea 0x36af69f6(%rip),%rdx \n+\tlea 0x36af7a05(%rip),%rcx \n+\tlea 0x36af79f6(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34078,16 +34078,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af69cb(%rip),%rcx \n-\tlea 0x36af69bc(%rip),%rdx \n+\tlea 0x36af79cb(%rip),%rcx \n+\tlea 0x36af79bc(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34106,16 +34106,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6981(%rip),%rcx \n-\tlea 0x36af6972(%rip),%rdx \n+\tlea 0x36af7981(%rip),%rcx \n+\tlea 0x36af7972(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34134,16 +34134,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af6937(%rip),%rcx \n-\tlea 0x36af6928(%rip),%rdx \n+\tlea 0x36af7937(%rip),%rcx \n+\tlea 0x36af7928(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34162,16 +34162,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af68ed(%rip),%rcx \n-\tlea 0x36af68de(%rip),%rdx \n+\tlea 0x36af78ed(%rip),%rcx \n+\tlea 0x36af78de(%rip),%rdx \n ggml_cuda_flash_attn_ext_wmma_f16(ggml_backend_cuda_context&, ggml_tensor*):\n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34190,16 +34190,16 @@\n \tcltq\n \timul $0x38,%rax,%rax\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:490\n \tucomiss 0x5c(%rbx),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:484\n \tmov 0x38(%r15,%rax,1),%eax\n-\tlea 0x36af68a6(%rip),%rcx \n-\tlea 0x36af6897(%rip),%rdx \n+\tlea 0x36af78a6(%rip),%rcx \n+\tlea 0x36af7897(%rip),%rdx \n \tcmovne %rcx,%rdx\n \tcmovp %rcx,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-wmma-f16.cu:499\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n@@ -34334,15 +34334,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af636b(%rip),%rdi \n+\tlea 0x36af736b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -34438,15 +34438,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af60a3(%rip),%rdi \n+\tlea 0x36af70a3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -34472,15 +34472,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af6000(%rip),%rdi \n+\tlea 0x36af7000(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -34503,15 +34503,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af5f76(%rip),%rdi \n+\tlea 0x36af6f76(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -34607,15 +34607,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af5cbb(%rip),%rdi \n+\tlea 0x36af6cbb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -34711,15 +34711,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af59f3(%rip),%rdi \n+\tlea 0x36af69f3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -34745,15 +34745,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af5950(%rip),%rdi \n+\tlea 0x36af6950(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -34776,15 +34776,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af58c6(%rip),%rdi \n+\tlea 0x36af68c6(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -34880,15 +34880,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af560b(%rip),%rdi \n+\tlea 0x36af660b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -34984,15 +34984,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af5343(%rip),%rdi \n+\tlea 0x36af6343(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35018,15 +35018,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af52a0(%rip),%rdi \n+\tlea 0x36af62a0(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -35049,15 +35049,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af5216(%rip),%rdi \n+\tlea 0x36af6216(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -35153,15 +35153,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af4f5b(%rip),%rdi \n+\tlea 0x36af5f5b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35257,15 +35257,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af4c93(%rip),%rdi \n+\tlea 0x36af5c93(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35291,15 +35291,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af4bf0(%rip),%rdi \n+\tlea 0x36af5bf0(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -35322,15 +35322,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af4b66(%rip),%rdi \n+\tlea 0x36af5b66(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -35426,15 +35426,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af48ab(%rip),%rdi \n+\tlea 0x36af58ab(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35530,15 +35530,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af45e3(%rip),%rdi \n+\tlea 0x36af55e3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35564,15 +35564,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af4540(%rip),%rdi \n+\tlea 0x36af5540(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -35595,15 +35595,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af44b6(%rip),%rdi \n+\tlea 0x36af54b6(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -35699,15 +35699,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af41fb(%rip),%rdi \n+\tlea 0x36af51fb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35803,15 +35803,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af3f33(%rip),%rdi \n+\tlea 0x36af4f33(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -35837,15 +35837,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af3e90(%rip),%rdi \n+\tlea 0x36af4e90(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -35868,15 +35868,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36af3e06(%rip),%rdi \n+\tlea 0x36af4e06(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -35972,15 +35972,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af3b4b(%rip),%rdi \n+\tlea 0x36af4b4b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36076,15 +36076,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af3883(%rip),%rdi \n+\tlea 0x36af4883(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36110,15 +36110,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af37e0(%rip),%rdi \n+\tlea 0x36af47e0(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -36214,15 +36214,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af3523(%rip),%rdi \n+\tlea 0x36af4523(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36318,15 +36318,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af325b(%rip),%rdi \n+\tlea 0x36af425b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36352,15 +36352,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af31b8(%rip),%rdi \n+\tlea 0x36af41b8(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -36456,15 +36456,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af2efb(%rip),%rdi \n+\tlea 0x36af3efb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36560,15 +36560,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af2c33(%rip),%rdi \n+\tlea 0x36af3c33(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36594,15 +36594,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af2b90(%rip),%rdi \n+\tlea 0x36af3b90(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -36698,15 +36698,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af28d3(%rip),%rdi \n+\tlea 0x36af38d3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36802,15 +36802,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af260b(%rip),%rdi \n+\tlea 0x36af360b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -36836,15 +36836,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af2568(%rip),%rdi \n+\tlea 0x36af3568(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -36940,15 +36940,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af22ab(%rip),%rdi \n+\tlea 0x36af32ab(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37044,15 +37044,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af1fe3(%rip),%rdi \n+\tlea 0x36af2fe3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37078,15 +37078,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36af1f40(%rip),%rdi \n+\tlea 0x36af2f40(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -37182,15 +37182,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af1c83(%rip),%rdi \n+\tlea 0x36af2c83(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37286,15 +37286,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af19bb(%rip),%rdi \n+\tlea 0x36af29bb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37390,15 +37390,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af16f3(%rip),%rdi \n+\tlea 0x36af26f3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37494,15 +37494,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af142b(%rip),%rdi \n+\tlea 0x36af242b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37598,15 +37598,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af1163(%rip),%rdi \n+\tlea 0x36af2163(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37702,15 +37702,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af0e9b(%rip),%rdi \n+\tlea 0x36af1e9b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37806,15 +37806,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af0bd3(%rip),%rdi \n+\tlea 0x36af1bd3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -37910,15 +37910,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af090b(%rip),%rdi \n+\tlea 0x36af190b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38014,15 +38014,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af0643(%rip),%rdi \n+\tlea 0x36af1643(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38118,15 +38118,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af037b(%rip),%rdi \n+\tlea 0x36af137b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38222,15 +38222,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36af00b3(%rip),%rdi \n+\tlea 0x36af10b3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38326,15 +38326,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aefdeb(%rip),%rdi \n+\tlea 0x36af0deb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38430,15 +38430,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aefb23(%rip),%rdi \n+\tlea 0x36af0b23(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38534,15 +38534,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aef85b(%rip),%rdi \n+\tlea 0x36af085b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38638,15 +38638,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aef593(%rip),%rdi \n+\tlea 0x36af0593(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38742,15 +38742,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aef2cb(%rip),%rdi \n+\tlea 0x36af02cb(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38846,15 +38846,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aef003(%rip),%rdi \n+\tlea 0x36af0003(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -38950,15 +38950,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aeed3b(%rip),%rdi \n+\tlea 0x36aefd3b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39054,15 +39054,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aeea73(%rip),%rdi \n+\tlea 0x36aefa73(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39158,15 +39158,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aee7ab(%rip),%rdi \n+\tlea 0x36aef7ab(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39262,15 +39262,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aee4e3(%rip),%rdi \n+\tlea 0x36aef4e3(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39366,15 +39366,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aee21b(%rip),%rdi \n+\tlea 0x36aef21b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39470,15 +39470,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aedf53(%rip),%rdi \n+\tlea 0x36aeef53(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39574,15 +39574,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36aedc8b(%rip),%rdi \n+\tlea 0x36aeec8b(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -39608,696 +39608,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36aedbe8(%rip),%rdi \n+\tlea 0x36aeebe8(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36af3d7c(%rip),%rbx # 36b45928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n+\tmov 0x36af4d7c(%rip),%rbx # 36b46928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n \ttest %rbx,%rbx\n \tjne 51bc7 \n-\tlea 0x36af3600(%rip),%rdi # 36b451b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4780>\n+\tlea 0x36af4600(%rip),%rdi # 36b461b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4780>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36af3d61(%rip) # 36b45928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n+\tmov %rax,0x36af4d61(%rip) # 36b46928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed996(%rip),%rsi \n+\tlea 0x36aee996(%rip),%rsi \n \tlea 0x28d077(%rip),%rcx # 2dec58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x49e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed970(%rip),%rsi \n+\tlea 0x36aee970(%rip),%rsi \n \tlea 0x28d0c2(%rip),%rcx # 2decd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4a61>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed94a(%rip),%rsi \n+\tlea 0x36aee94a(%rip),%rsi \n \tlea 0x28c690(%rip),%rcx # 2de2cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x405d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed924(%rip),%rsi \n+\tlea 0x36aee924(%rip),%rsi \n \tlea 0x28c6b1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed8fe(%rip),%rsi \n+\tlea 0x36aee8fe(%rip),%rsi \n \tlea 0x28d0b1(%rip),%rcx # 2ded4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4ada>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed8d8(%rip),%rsi \n+\tlea 0x36aee8d8(%rip),%rsi \n \tlea 0x28d0fc(%rip),%rcx # 2dedc3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4b53>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed8b2(%rip),%rsi \n+\tlea 0x36aee8b2(%rip),%rsi \n \tlea 0x28d147(%rip),%rcx # 2dee3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4bcc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed88c(%rip),%rsi \n+\tlea 0x36aee88c(%rip),%rsi \n \tlea 0x28d168(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed866(%rip),%rsi \n+\tlea 0x36aee866(%rip),%rsi \n \tlea 0x28d182(%rip),%rcx # 2deed3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c63>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed840(%rip),%rsi \n+\tlea 0x36aee840(%rip),%rsi \n \tlea 0x28d1cd(%rip),%rcx # 2def4c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4cdc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed81a(%rip),%rsi \n+\tlea 0x36aee81a(%rip),%rsi \n \tlea 0x28d218(%rip),%rcx # 2defc5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4d55>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed7f4(%rip),%rsi \n+\tlea 0x36aee7f4(%rip),%rsi \n \tlea 0x28d239(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed7ce(%rip),%rsi \n+\tlea 0x36aee7ce(%rip),%rsi \n \tlea 0x28d253(%rip),%rcx # 2df05c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4dec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed7a8(%rip),%rsi \n+\tlea 0x36aee7a8(%rip),%rsi \n \tlea 0x28d29f(%rip),%rcx # 2df0d6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4e66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed782(%rip),%rsi \n+\tlea 0x36aee782(%rip),%rsi \n \tlea 0x28d2eb(%rip),%rcx # 2df150 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4ee0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed75c(%rip),%rsi \n+\tlea 0x36aee75c(%rip),%rsi \n \tlea 0x28d30d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed736(%rip),%rsi \n+\tlea 0x36aee736(%rip),%rsi \n \tlea 0x28d328(%rip),%rcx # 2df1e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f79>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed710(%rip),%rsi \n+\tlea 0x36aee710(%rip),%rsi \n \tlea 0x28d374(%rip),%rcx # 2df263 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4ff3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed6ea(%rip),%rsi \n+\tlea 0x36aee6ea(%rip),%rsi \n \tlea 0x28c4c0(%rip),%rcx # 2de3dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x416d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed6c4(%rip),%rsi \n+\tlea 0x36aee6c4(%rip),%rsi \n \tlea 0x28c4e2(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed69e(%rip),%rsi \n+\tlea 0x36aee69e(%rip),%rsi \n \tlea 0x28d364(%rip),%rcx # 2df2dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x506d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed678(%rip),%rsi \n+\tlea 0x36aee678(%rip),%rsi \n \tlea 0x28d3b0(%rip),%rcx # 2df357 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x50e7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed652(%rip),%rsi \n+\tlea 0x36aee652(%rip),%rsi \n \tlea 0x28d3fc(%rip),%rcx # 2df3d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5161>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed62c(%rip),%rsi \n+\tlea 0x36aee62c(%rip),%rsi \n \tlea 0x28d41e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed606(%rip),%rsi \n+\tlea 0x36aee606(%rip),%rsi \n \tlea 0x28d439(%rip),%rcx # 2df46a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed5e0(%rip),%rsi \n+\tlea 0x36aee5e0(%rip),%rsi \n \tlea 0x28d484(%rip),%rcx # 2df4e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5273>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed5ba(%rip),%rsi \n+\tlea 0x36aee5ba(%rip),%rsi \n \tlea 0x28c552(%rip),%rcx # 2de5df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x436f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed594(%rip),%rsi \n+\tlea 0x36aee594(%rip),%rsi \n \tlea 0x28d4a1(%rip),%rcx # 2df55c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x52ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed56e(%rip),%rsi \n+\tlea 0x36aee56e(%rip),%rsi \n \tlea 0x28d4ec(%rip),%rcx # 2df5d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5365>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed548(%rip),%rsi \n+\tlea 0x36aee548(%rip),%rsi \n \tlea 0x28d537(%rip),%rcx # 2df64e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x53de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed522(%rip),%rsi \n+\tlea 0x36aee522(%rip),%rsi \n \tlea 0x28d558(%rip),%rcx # 2df69d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x542d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed4fc(%rip),%rsi \n+\tlea 0x36aee4fc(%rip),%rsi \n \tlea 0x28d5a3(%rip),%rcx # 2df716 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x54a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed4d6(%rip),%rsi \n+\tlea 0x36aee4d6(%rip),%rsi \n \tlea 0x28d5ee(%rip),%rcx # 2df78f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x551f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed4b0(%rip),%rsi \n+\tlea 0x36aee4b0(%rip),%rsi \n \tlea 0x28d60f(%rip),%rcx # 2df7de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x556e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed48a(%rip),%rsi \n+\tlea 0x36aee48a(%rip),%rsi \n \tlea 0x28d65b(%rip),%rcx # 2df858 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x55e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed464(%rip),%rsi \n+\tlea 0x36aee464(%rip),%rsi \n \tlea 0x28d6a7(%rip),%rcx # 2df8d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5662>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed43e(%rip),%rsi \n+\tlea 0x36aee43e(%rip),%rsi \n \tlea 0x28d6c9(%rip),%rcx # 2df922 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x56b2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed418(%rip),%rsi \n+\tlea 0x36aee418(%rip),%rsi \n \tlea 0x28d715(%rip),%rcx # 2df99c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x572c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed3f2(%rip),%rsi \n+\tlea 0x36aee3f2(%rip),%rsi \n \tlea 0x28c3f2(%rip),%rcx # 2de6a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4437>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed3cc(%rip),%rsi \n+\tlea 0x36aee3cc(%rip),%rsi \n \tlea 0x28d733(%rip),%rcx # 2dfa16 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x57a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed3a6(%rip),%rsi \n+\tlea 0x36aee3a6(%rip),%rsi \n \tlea 0x28d784(%rip),%rcx # 2dfa95 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5825>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed380(%rip),%rsi \n+\tlea 0x36aee380(%rip),%rsi \n \tlea 0x28d7d5(%rip),%rcx # 2dfb14 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x58a4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed35a(%rip),%rsi \n+\tlea 0x36aee35a(%rip),%rsi \n \tlea 0x28d826(%rip),%rcx # 2dfb93 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5923>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed334(%rip),%rsi \n+\tlea 0x36aee334(%rip),%rsi \n \tlea 0x28d877(%rip),%rcx # 2dfc12 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x59a2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed30e(%rip),%rsi \n+\tlea 0x36aee30e(%rip),%rsi \n \tlea 0x28d8c8(%rip),%rcx # 2dfc91 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5a21>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed2e8(%rip),%rsi \n+\tlea 0x36aee2e8(%rip),%rsi \n \tlea 0x28d919(%rip),%rcx # 2dfd10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5aa0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed2c2(%rip),%rsi \n+\tlea 0x36aee2c2(%rip),%rsi \n \tlea 0x28d96b(%rip),%rcx # 2dfd90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5b20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed29c(%rip),%rsi \n+\tlea 0x36aee29c(%rip),%rsi \n \tlea 0x28d9bd(%rip),%rcx # 2dfe10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5ba0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed276(%rip),%rsi \n+\tlea 0x36aee276(%rip),%rsi \n \tlea 0x28da0f(%rip),%rcx # 2dfe90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5c20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed250(%rip),%rsi \n+\tlea 0x36aee250(%rip),%rsi \n \tlea 0x28da61(%rip),%rcx # 2dff10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5ca0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed22a(%rip),%rsi \n+\tlea 0x36aee22a(%rip),%rsi \n \tlea 0x28dab3(%rip),%rcx # 2dff90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5d20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36aed204(%rip),%rsi \n+\tlea 0x36aee204(%rip),%rsi \n \tlea 0x28db05(%rip),%rcx # 2e0010 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5da0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed1c7(%rip),%rsi \n+\tlea 0x36aee1c7(%rip),%rsi \n \tlea 0x28db3f(%rip),%rcx # 2e008f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5e1f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed18a(%rip),%rsi \n+\tlea 0x36aee18a(%rip),%rsi \n \tlea 0x28db79(%rip),%rcx # 2e010e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5e9e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed14d(%rip),%rsi \n+\tlea 0x36aee14d(%rip),%rsi \n \tlea 0x28dbb3(%rip),%rcx # 2e018d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5f1d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed110(%rip),%rsi \n+\tlea 0x36aee110(%rip),%rsi \n \tlea 0x28dbed(%rip),%rcx # 2e020c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5f9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed0d3(%rip),%rsi \n+\tlea 0x36aee0d3(%rip),%rsi \n \tlea 0x28dc27(%rip),%rcx # 2e028b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x601b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed096(%rip),%rsi \n+\tlea 0x36aee096(%rip),%rsi \n \tlea 0x28dc61(%rip),%rcx # 2e030a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x609a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed059(%rip),%rsi \n+\tlea 0x36aee059(%rip),%rsi \n \tlea 0x28dc9c(%rip),%rcx # 2e038a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x611a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aed01c(%rip),%rsi \n+\tlea 0x36aee01c(%rip),%rsi \n \tlea 0x28dcd7(%rip),%rcx # 2e040a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x619a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aecfdf(%rip),%rsi \n+\tlea 0x36aedfdf(%rip),%rsi \n \tlea 0x28dd12(%rip),%rcx # 2e048a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x621a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aecfa2(%rip),%rsi \n+\tlea 0x36aedfa2(%rip),%rsi \n \tlea 0x28dd4d(%rip),%rcx # 2e050a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x629a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aecf65(%rip),%rsi \n+\tlea 0x36aedf65(%rip),%rsi \n \tlea 0x28dd88(%rip),%rcx # 2e058a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x631a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36aecf28(%rip),%rsi \n+\tlea 0x36aedf28(%rip),%rsi \n \tlea 0x28ddc3(%rip),%rcx # 2e060a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x639a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36af30b1(%rip),%rdi # 36b45928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n+\tmov 0x36af40b1(%rip),%rdi # 36b46928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n \ttest %rdi,%rdi\n \tje 52891 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36af309b(%rip) # 36b45928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n+\tmovq $0x0,0x36af409b(%rip) # 36b46928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000528a0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base>:\n void launch_fattn<80, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int):\n@@ -41136,15 +41136,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36aec0eb(%rip),%rdi \n+\tlea 0x36aed0eb(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 535fa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -41192,15 +41192,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36aebfcd(%rip),%rdi \n+\tlea 0x36aecfcd(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -42271,15 +42271,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36aeafcb(%rip),%rdi \n+\tlea 0x36aebfcb(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 5473a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -42327,15 +42327,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36aeaead(%rip),%rdi \n+\tlea 0x36aebead(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -43406,15 +43406,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae9eab(%rip),%rdi \n+\tlea 0x36aeaeab(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 5587a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -43462,15 +43462,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae9d8d(%rip),%rdi \n+\tlea 0x36aead8d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -44541,15 +44541,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae8dab(%rip),%rdi \n+\tlea 0x36ae9dab(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 569ba (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -44597,15 +44597,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae8c8d(%rip),%rdi \n+\tlea 0x36ae9c8d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -45676,15 +45676,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae7ca3(%rip),%rdi \n+\tlea 0x36ae8ca3(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 57afa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -45732,15 +45732,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae7acd(%rip),%rdi \n+\tlea 0x36ae8acd(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -46811,15 +46811,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae6b7b(%rip),%rdi \n+\tlea 0x36ae7b7b(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 58c3a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -46867,15 +46867,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae69ad(%rip),%rdi \n+\tlea 0x36ae79ad(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -47946,15 +47946,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae5a53(%rip),%rdi \n+\tlea 0x36ae6a53(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 59d7a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -48002,15 +48002,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae588d(%rip),%rdi \n+\tlea 0x36ae688d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -49081,15 +49081,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae49f3(%rip),%rdi \n+\tlea 0x36ae59f3(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 5aeba (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:874\n@@ -49137,15 +49137,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36ae478d(%rip),%rdi \n+\tlea 0x36ae578d(%rip),%rdi \n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:883\n \tcall 227e0 \n@@ -49582,15 +49582,15 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:655\n \tpush %rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:656\n \tcmp $0x80,%edi\n \tje 5b530 \n \tmov %edi,%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:670\n-\tmov 0x36ae9b16(%rip),%rbx \n+\tmov 0x36aeab16(%rip),%rbx \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:656\n \tcmp $0x40,%edi\n \tjne 5b5e7 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:657\n \tmov (%rbx),%rcx\n \tlea 0x285185(%rip),%rdi # 2e065a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x63ea>\n \tmov $0x32,%esi\n@@ -49611,15 +49611,15 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:660\n \tlea 0x282a18(%rip),%rdi # 2ddf35 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3cc5>\n \tlea 0x27fdf7(%rip),%rdx # 2db31b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10ab>\n \tmov $0x294,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:662\n-\tmov 0x36ae9aa1(%rip),%rbx \n+\tmov 0x36aeaaa1(%rip),%rbx \n \tmov (%rbx),%rcx\n \tlea 0x2851c0(%rip),%rdi # 2e0701 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6491>\n \tmov $0x33,%esi\n \tmov $0x1,%edx\n \tcall 234a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/fattn-common.cuh:663\n \tmov (%rbx),%rcx\n@@ -49806,15 +49806,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae3ebc(%rip),%rdi \n+\tlea 0x36ae4ebc(%rip),%rdi \n \tjmp 5fcb4 \n get_rows_cuda(void const*, ggml_type, int const*, void*, ggml_type, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:162\n \tcmp $0x1e,%eax\n \tja 5fd23 \n \tmov %eax,%edx\n \tlea 0x2b30cd(%rip),%rdi # 30e9a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x34738>\n@@ -49911,15 +49911,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae3d49(%rip),%rdi \n+\tlea 0x36ae4d49(%rip),%rdi \n \tjmp 5fcb4 \n get_rows_cuda(void const*, ggml_type, int const*, void*, ggml_type, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:162\n \tcmp $0x1e,%eax\n \tja 5fd23 \n \tmov %eax,%edx\n \tlea 0x2b2f46(%rip),%rdi # 30ea24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x347b4>\n@@ -50016,15 +50016,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae3afb(%rip),%rdi \n+\tlea 0x36ae4afb(%rip),%rdi \n \tjmp 5fcb4 \n get_rows_cuda(void const*, ggml_type, int const*, void*, ggml_type, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:162\n \tcmp $0x1e,%eax\n \tja 5fd23 \n \tmov %eax,%edx\n \tlea 0x2b2c48(%rip),%rdi # 30e92c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x346bc>\n@@ -50121,15 +50121,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae3988(%rip),%rdi \n+\tlea 0x36ae4988(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float<__half, float>(__half const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -50217,15 +50217,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae36bd(%rip),%rdi \n+\tlea 0x36ae46bd(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_0(void const*, long, int, HIP_vector_type&)), float>(void const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -50308,15 +50308,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae34e9(%rip),%rdi \n+\tlea 0x36ae44e9(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_1(void const*, long, int, HIP_vector_type&)), float>(void const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -50399,15 +50399,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae32fd(%rip),%rdi \n+\tlea 0x36ae42fd(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_0(void const*, long, int, HIP_vector_type&)), float>(void const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -50490,15 +50490,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae3111(%rip),%rdi \n+\tlea 0x36ae4111(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_1(void const*, long, int, HIP_vector_type&)), float>(void const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -50581,15 +50581,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae2f25(%rip),%rdi \n+\tlea 0x36ae3f25(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 1, &(dequantize_q8_0(void const*, long, int, HIP_vector_type&)), float>(void const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -50672,15 +50672,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae2d39(%rip),%rdi \n+\tlea 0x36ae3d39(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(int const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -50768,15 +50768,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae2b1e(%rip),%rdi \n+\tlea 0x36ae3b1e(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(hip_bfloat16 const*, int const*, float*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -50864,15 +50864,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae293b(%rip),%rdi \n+\tlea 0x36ae393b(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float<__half, __half>(__half const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -50960,15 +50960,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae27cb(%rip),%rdi \n+\tlea 0x36ae37cb(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_0(void const*, long, int, HIP_vector_type&)), __half>(void const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51051,15 +51051,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae25fa(%rip),%rdi \n+\tlea 0x36ae35fa(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_1(void const*, long, int, HIP_vector_type&)), __half>(void const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51142,15 +51142,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae2411(%rip),%rdi \n+\tlea 0x36ae3411(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_0(void const*, long, int, HIP_vector_type&)), __half>(void const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51233,15 +51233,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae2228(%rip),%rdi \n+\tlea 0x36ae3228(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_1(void const*, long, int, HIP_vector_type&)), __half>(void const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51324,15 +51324,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae203f(%rip),%rdi \n+\tlea 0x36ae303f(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 1, &(dequantize_q8_0(void const*, long, int, HIP_vector_type&)), __half>(void const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51415,15 +51415,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae1e56(%rip),%rdi \n+\tlea 0x36ae2e56(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(int const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -51511,15 +51511,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae1c3e(%rip),%rdi \n+\tlea 0x36ae2c3e(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(hip_bfloat16 const*, int const*, __half*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -51607,15 +51607,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae1a5e(%rip),%rdi \n+\tlea 0x36ae2a5e(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float<__half, int>(__half const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -51703,15 +51703,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae1813(%rip),%rdi \n+\tlea 0x36ae2813(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_0(void const*, long, int, HIP_vector_type&)), int>(void const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51794,15 +51794,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae163f(%rip),%rdi \n+\tlea 0x36ae263f(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_1(void const*, long, int, HIP_vector_type&)), int>(void const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51885,15 +51885,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae1453(%rip),%rdi \n+\tlea 0x36ae2453(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_0(void const*, long, int, HIP_vector_type&)), int>(void const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -51976,15 +51976,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae1267(%rip),%rdi \n+\tlea 0x36ae2267(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_1(void const*, long, int, HIP_vector_type&)), int>(void const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52067,15 +52067,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae107b(%rip),%rdi \n+\tlea 0x36ae207b(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 1, &(dequantize_q8_0(void const*, long, int, HIP_vector_type&)), int>(void const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52158,15 +52158,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0e8f(%rip),%rdi \n+\tlea 0x36ae1e8f(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(int const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -52254,15 +52254,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0c74(%rip),%rdi \n+\tlea 0x36ae1c74(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(hip_bfloat16 const*, int const*, int*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -52350,15 +52350,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0a91(%rip),%rdi \n+\tlea 0x36ae1a91(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float<__half, hip_bfloat16>(__half const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -52446,15 +52446,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0921(%rip),%rdi \n+\tlea 0x36ae1921(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_0(void const*, long, int, HIP_vector_type&)), hip_bfloat16>(void const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52537,15 +52537,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0750(%rip),%rdi \n+\tlea 0x36ae1750(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q4_1(void const*, long, int, HIP_vector_type&)), hip_bfloat16>(void const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52628,15 +52628,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0567(%rip),%rdi \n+\tlea 0x36ae1567(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_0(void const*, long, int, HIP_vector_type&)), hip_bfloat16>(void const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52719,15 +52719,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae037e(%rip),%rdi \n+\tlea 0x36ae137e(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 2, &(dequantize_q5_1(void const*, long, int, HIP_vector_type&)), hip_bfloat16>(void const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52810,15 +52810,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ae0195(%rip),%rdi \n+\tlea 0x36ae1195(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_q<32, 1, &(dequantize_q8_0(void const*, long, int, HIP_vector_type&)), hip_bfloat16>(void const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:113\n \ttest $0x1,%bl\n \tjne 5fcde \n /usr/include/hip/hip_runtime_api.h:953\n \tmov %r11d,%eax\n@@ -52901,15 +52901,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adffac(%rip),%rdi \n+\tlea 0x36ae0fac(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(int const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -52997,15 +52997,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adfd94(%rip),%rdi \n+\tlea 0x36ae0d94(%rip),%rdi \n \tjmp 5fcb4 \n void get_rows_cuda_float(hip_bfloat16 const*, int const*, hip_bfloat16*, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:132\n \tlea 0xff(%rbx),%rax\n \tlea 0x1fe(%rbx),%rdi\n \ttest %rax,%rax\n \tcmovns %rax,%rdi\n@@ -53093,15 +53093,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adfbb4(%rip),%rdi \n+\tlea 0x36ae0bb4(%rip),%rdi \n get_rows_cuda(void const*, ggml_type, int const*, void*, ggml_type, long, unsigned long, unsigned long, unsigned long, long, long, long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long, ihipStream_t*):\n \tlea 0xa0(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:233\n@@ -53449,15 +53449,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x78(%rsp),%rsi\n \tmov 0x80(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36adf53f(%rip),%rdi \n+\tlea 0x36ae053f(%rip),%rdi \n \tlea 0xb0(%rsp),%r9\n \tpush 0x58(%rsp)\n \tpush 0x68(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/getrows.cu:283\n \tadd $0xd8,%rsp\n@@ -53563,15 +53563,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36adf338(%rip),%rdi \n+\tlea 0x36ae0338(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x98,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53616,15 +53616,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adf200(%rip),%rdi \n+\tlea 0x36ae0200(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53669,15 +53669,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adf0c8(%rip),%rdi \n+\tlea 0x36ae00c8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53722,15 +53722,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adef90(%rip),%rdi \n+\tlea 0x36adff90(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53775,15 +53775,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adee58(%rip),%rdi \n+\tlea 0x36adfe58(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53828,15 +53828,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36aded20(%rip),%rdi \n+\tlea 0x36adfd20(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53881,15 +53881,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adebe8(%rip),%rdi \n+\tlea 0x36adfbe8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53934,15 +53934,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adeab0(%rip),%rdi \n+\tlea 0x36adfab0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -53987,15 +53987,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade978(%rip),%rdi \n+\tlea 0x36adf978(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54040,15 +54040,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade840(%rip),%rdi \n+\tlea 0x36adf840(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54093,15 +54093,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade708(%rip),%rdi \n+\tlea 0x36adf708(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54146,15 +54146,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade5d0(%rip),%rdi \n+\tlea 0x36adf5d0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54199,15 +54199,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade498(%rip),%rdi \n+\tlea 0x36adf498(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54252,15 +54252,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade360(%rip),%rdi \n+\tlea 0x36adf360(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54305,15 +54305,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade228(%rip),%rdi \n+\tlea 0x36adf228(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54358,15 +54358,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ade0f0(%rip),%rdi \n+\tlea 0x36adf0f0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54411,15 +54411,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36addfb8(%rip),%rdi \n+\tlea 0x36adefb8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54464,15 +54464,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adde80(%rip),%rdi \n+\tlea 0x36adee80(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54517,15 +54517,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36addd48(%rip),%rdi \n+\tlea 0x36aded48(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54570,15 +54570,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36addc10(%rip),%rdi \n+\tlea 0x36adec10(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54623,15 +54623,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36addad8(%rip),%rdi \n+\tlea 0x36adead8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54676,15 +54676,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add9a0(%rip),%rdi \n+\tlea 0x36ade9a0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54729,15 +54729,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add868(%rip),%rdi \n+\tlea 0x36ade868(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54782,15 +54782,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add730(%rip),%rdi \n+\tlea 0x36ade730(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54835,15 +54835,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add5f8(%rip),%rdi \n+\tlea 0x36ade5f8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54888,15 +54888,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add4c0(%rip),%rdi \n+\tlea 0x36ade4c0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54941,15 +54941,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add388(%rip),%rdi \n+\tlea 0x36ade388(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -54994,15 +54994,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add250(%rip),%rdi \n+\tlea 0x36ade250(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55047,15 +55047,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36add118(%rip),%rdi \n+\tlea 0x36ade118(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55100,15 +55100,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adcfe0(%rip),%rdi \n+\tlea 0x36addfe0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55153,15 +55153,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adcea8(%rip),%rdi \n+\tlea 0x36addea8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55206,15 +55206,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adcd70(%rip),%rdi \n+\tlea 0x36addd70(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55259,15 +55259,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adcc38(%rip),%rdi \n+\tlea 0x36addc38(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55312,15 +55312,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adcb00(%rip),%rdi \n+\tlea 0x36addb00(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55365,15 +55365,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adc9c8(%rip),%rdi \n+\tlea 0x36add9c8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55418,15 +55418,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adc890(%rip),%rdi \n+\tlea 0x36add890(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -55471,414 +55471,414 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36adc758(%rip),%rdi \n+\tlea 0x36add758(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36ae27c4(%rip),%rbx # 36b45930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n+\tmov 0x36ae37c4(%rip),%rbx # 36b46930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n \ttest %rbx,%rbx\n \tjne 63187 \n-\tlea 0x36ae2058(%rip),%rdi # 36b451d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4798>\n+\tlea 0x36ae3058(%rip),%rdi # 36b461d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4798>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36ae27a9(%rip) # 36b45930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n+\tmov %rax,0x36ae37a9(%rip) # 36b46930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc5de(%rip),%rsi \n+\tlea 0x36add5de(%rip),%rsi \n \tlea 0x27d85b(%rip),%rcx # 2e09fc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x678c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc5b8(%rip),%rsi \n+\tlea 0x36add5b8(%rip),%rsi \n \tlea 0x27d864(%rip),%rcx # 2e0a33 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x67c3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc592(%rip),%rsi \n+\tlea 0x36add592(%rip),%rsi \n \tlea 0x27d867(%rip),%rcx # 2e0a64 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x67f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc56c(%rip),%rsi \n+\tlea 0x36add56c(%rip),%rsi \n \tlea 0x27d86a(%rip),%rcx # 2e0a95 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6825>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc546(%rip),%rsi \n+\tlea 0x36add546(%rip),%rsi \n \tlea 0x27d87a(%rip),%rcx # 2e0ad3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6863>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc520(%rip),%rsi \n+\tlea 0x36add520(%rip),%rsi \n \tlea 0x27d8b6(%rip),%rcx # 2e0b3d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x68cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc4fa(%rip),%rsi \n+\tlea 0x36add4fa(%rip),%rsi \n \tlea 0x27d8f2(%rip),%rcx # 2e0ba7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6937>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc4d4(%rip),%rsi \n+\tlea 0x36add4d4(%rip),%rsi \n \tlea 0x27d92e(%rip),%rcx # 2e0c11 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x69a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc4ae(%rip),%rsi \n+\tlea 0x36add4ae(%rip),%rsi \n \tlea 0x27d96a(%rip),%rcx # 2e0c7b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6a0b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc488(%rip),%rsi \n+\tlea 0x36add488(%rip),%rsi \n \tlea 0x27d9a6(%rip),%rcx # 2e0ce5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6a75>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc462(%rip),%rsi \n+\tlea 0x36add462(%rip),%rsi \n \tlea 0x27d9af(%rip),%rcx # 2e0d1c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6aac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc43c(%rip),%rsi \n+\tlea 0x36add43c(%rip),%rsi \n \tlea 0x27d9b2(%rip),%rcx # 2e0d4d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6add>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc416(%rip),%rsi \n+\tlea 0x36add416(%rip),%rsi \n \tlea 0x27d9b5(%rip),%rcx # 2e0d7e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6b0e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc3f0(%rip),%rsi \n+\tlea 0x36add3f0(%rip),%rsi \n \tlea 0x27d9c5(%rip),%rcx # 2e0dbc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6b4c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc3ca(%rip),%rsi \n+\tlea 0x36add3ca(%rip),%rsi \n \tlea 0x27da01(%rip),%rcx # 2e0e26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6bb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc3a4(%rip),%rsi \n+\tlea 0x36add3a4(%rip),%rsi \n \tlea 0x27da3d(%rip),%rcx # 2e0e90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6c20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc37e(%rip),%rsi \n+\tlea 0x36add37e(%rip),%rsi \n \tlea 0x27da79(%rip),%rcx # 2e0efa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6c8a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc358(%rip),%rsi \n+\tlea 0x36add358(%rip),%rsi \n \tlea 0x27dab5(%rip),%rcx # 2e0f64 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6cf4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc332(%rip),%rsi \n+\tlea 0x36add332(%rip),%rsi \n \tlea 0x27daf1(%rip),%rcx # 2e0fce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6d5e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc30c(%rip),%rsi \n+\tlea 0x36add30c(%rip),%rsi \n \tlea 0x27dafc(%rip),%rcx # 2e1007 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6d97>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc2e6(%rip),%rsi \n+\tlea 0x36add2e6(%rip),%rsi \n \tlea 0x27db05(%rip),%rcx # 2e103e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6dce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc2c0(%rip),%rsi \n+\tlea 0x36add2c0(%rip),%rsi \n \tlea 0x27db0e(%rip),%rcx # 2e1075 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6e05>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc29a(%rip),%rsi \n+\tlea 0x36add29a(%rip),%rsi \n \tlea 0x27db24(%rip),%rcx # 2e10b9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6e49>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc274(%rip),%rsi \n+\tlea 0x36add274(%rip),%rsi \n \tlea 0x27db66(%rip),%rcx # 2e1129 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6eb9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc24e(%rip),%rsi \n+\tlea 0x36add24e(%rip),%rsi \n \tlea 0x27dba8(%rip),%rcx # 2e1199 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6f29>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc228(%rip),%rsi \n+\tlea 0x36add228(%rip),%rsi \n \tlea 0x27dbea(%rip),%rcx # 2e1209 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x6f99>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc202(%rip),%rsi \n+\tlea 0x36add202(%rip),%rsi \n \tlea 0x27dc2c(%rip),%rcx # 2e1279 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7009>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc1dc(%rip),%rsi \n+\tlea 0x36add1dc(%rip),%rsi \n \tlea 0x27dc6e(%rip),%rcx # 2e12e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7079>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc1b6(%rip),%rsi \n+\tlea 0x36add1b6(%rip),%rsi \n \tlea 0x27dc84(%rip),%rcx # 2e132d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x70bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc190(%rip),%rsi \n+\tlea 0x36add190(%rip),%rsi \n \tlea 0x27dc94(%rip),%rcx # 2e136b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x70fb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc16a(%rip),%rsi \n+\tlea 0x36add16a(%rip),%rsi \n \tlea 0x27dca4(%rip),%rcx # 2e13a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7139>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc144(%rip),%rsi \n+\tlea 0x36add144(%rip),%rsi \n \tlea 0x27dcb6(%rip),%rcx # 2e13e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7179>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc11e(%rip),%rsi \n+\tlea 0x36add11e(%rip),%rsi \n \tlea 0x27dcff(%rip),%rcx # 2e1460 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x71f0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc0f8(%rip),%rsi \n+\tlea 0x36add0f8(%rip),%rsi \n \tlea 0x27dd48(%rip),%rcx # 2e14d7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7267>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc0d2(%rip),%rsi \n+\tlea 0x36add0d2(%rip),%rsi \n \tlea 0x27dd91(%rip),%rcx # 2e154e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x72de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adc0ac(%rip),%rsi \n+\tlea 0x36add0ac(%rip),%rsi \n \tlea 0x27ddda(%rip),%rcx # 2e15c5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7355>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36adbf5e(%rip),%rsi \n+\tlea 0x36adcf5e(%rip),%rsi \n \tlea 0x27de23(%rip),%rcx # 2e163c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x73cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x36ae20e9(%rip),%rdi # 36b45930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n+\tmov 0x36ae30e9(%rip),%rdi # 36b46930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n \ttest %rdi,%rdi\n \tje 63861 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36ae20d3(%rip) # 36b45930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n+\tmovq $0x0,0x36ae30d3(%rip) # 36b46930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ef8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000063870 :\n ggml_cuda_error(char const*, char const*, char const*, int, char const*):\n@@ -55996,32 +55996,32 @@\n \txchg %ax,%ax\n \n 00000000000639d0 :\n ggml_cuda_info():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:293\n \tpush %rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae2330(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae3330(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 639e5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:295\n-\tlea 0x36ae1f5d(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36ae2f5d(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tpop %rbx\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae231c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae331c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 639dc \n \tcall 63a20 \n-\tlea 0x36ae2307(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae3307(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 639dc \n \tmov %rax,%rbx\n-\tlea 0x36ae22f6(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae32f6(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tnop\n ggml_cuda_init():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:176\n \tpush %rbp\n@@ -56109,18 +56109,18 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:195\n \tcall 22380 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:196\n \tcall 235c0 \n \ttest %eax,%eax\n \tjne 63ec9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:201\n-\tmovl $0x0,0x36ae1e3e(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n-\tlea 0x36ae1e37(%rip),%rbx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovl $0x0,0x36ae2e3e(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36ae2e37(%rip),%rbx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:698\n-\tlea 0x36ae1e38(%rip),%r14 # 36b45948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n+\tlea 0x36ae2e38(%rip),%r14 # 36b46948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n \tmov $0x3c0,%edx\n \tmov %r14,%rdi\n \txor %esi,%esi\n \tcall 22140 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:203\n \tmov %rbx,%rdi\n \tcall 22080 \n@@ -56142,15 +56142,15 @@\n \tpop %r12\n \tpop %r13\n \tpop %r14\n \tpop %r15\n \tpop %rbp\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:209\n-\tcmpl $0x11,0x36ae1dd8(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmpl $0x11,0x36ae2dd8(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 63efe \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:215\n \tlea 0x27de4b(%rip),%rsi # 2e19c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7750>\n \tlea 0x27dde7(%rip),%r15 # 2e1963 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x76f3>\n \tmov $0x2,%edi\n \tmov %r15,%rdx\n \txor %eax,%eax\n@@ -56158,22 +56158,22 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:220\n \tlea 0x27de4e(%rip),%rsi # 2e19e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7770>\n \tmov $0x2,%edi\n \tmov %r15,%rdx\n \txor %eax,%eax\n \tcall 22e80 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:222\n-\tmov 0x36ae1d99(%rip),%ecx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36ae2d99(%rip),%ecx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tlea 0x27de52(%rip),%rsi # 2e1a00 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7790>\n \tmov $0x2,%edi\n \tmov %r15,%rdx\n \txor %eax,%eax\n \tcall 22e80 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:223\n-\tcmpl $0x0,0x36ae1d7c(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmpl $0x0,0x36ae2d7c(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjle 63b4f \n \tlea 0x19c(%rsp),%r15\n \tlea 0x10(%rsp),%r12\n \txor %r13d,%r13d\n \txor %ebp,%ebp\n \tjmp 63c2e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:264\n@@ -56190,15 +56190,15 @@\n \tpush %r10\n \tlea 0x27dea7(%rip),%r10 # 2e1ab3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7843>\n \tpush %r10\n \tcall 22e80 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:223\n \tinc %r13\n-\tmovslq 0x36ae1d1f(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ae2d1f(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tadd $0x38,%r14\n \tcmp %rax,%r13\n \tjge 63d0a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:239\n \tmovb $0x0,0x19(%r14)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:242\n \tmov %r12,%rdi\n@@ -56470,15 +56470,15 @@\n \tmov %rdi,%r14\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ae0fea(%rip),%rax \n+\tmov 0x36ae1fea(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov %ebx,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r15),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n \tmov $0x1008,%edx\n@@ -56501,15 +56501,15 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:524\n \tpush %r14\n \tpush %rbx\n \tpush %rax\n \tmov %rdi,%rbx\n __gthread_mutex_lock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:795\n-\tlea 0x36ae22ea(%rip),%rdi # 36b46288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5850>\n+\tlea 0x36ae32ea(%rip),%rdi # 36b47288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5850>\n \tcall 234d0 \n ggml_backend_cuda_context::~ggml_backend_cuda_context():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:118\n \ttest %eax,%eax\n \tjne 64392 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:528\n \tmov 0x28(%rbx),%rdi\n@@ -56604,15 +56604,15 @@\n \tmovslq (%rcx,%rax,4),%rax\n \tadd %rcx,%rax\n \tjmp *%rax\n \tlea 0x27db7b(%rip),%r8 # 2e1c65 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x79f5>\n \tjmp 64373 \n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae2192(%rip),%rdi # 36b46288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5850>\n+\tlea 0x36ae3192(%rip),%rdi # 36b47288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5850>\n \tcall 23780 \n std::unique_ptr >::~unique_ptr():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/unique_ptr.h:398\n \tmov 0x530(%rbx),%rdi\n \ttest %rdi,%rdi\n \tje 6410d \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/unique_ptr.h:93\n@@ -56858,53 +56858,53 @@\n \tpush %r13\n \tpush %r12\n \tpush %rbx\n \tsub $0x38,%rsp\n \tmov %edi,0xc(%rsp)\n __gthread_mutex_lock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:795\n-\tlea 0x36ae1927(%rip),%rdi # 36b45d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5308>\n+\tlea 0x36ae2927(%rip),%rdi # 36b46d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5308>\n \tcall 234d0 \n ggml_backend_cuda_buffer_type():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:118\n \ttest %eax,%eax\n \tjne 64726 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae18db(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae28db(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6472d \n \tmov 0xc(%rsp),%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:731\n-\tcmp %eax,0x36ae1501(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp %eax,0x36ae2501(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjle 646ea \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:739\n-\tcmpb $0x0,0x36ae1d24(%rip) # 36b46170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5738>\n+\tcmpb $0x0,0x36ae2d24(%rip) # 36b47170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5738>\n \tjne 646f5 \n \tlea 0x20(%rsp),%r12\n \txor %r14d,%r14d\n \tlea 0x10(%rsp),%r13\n \tlea 0x2aadda(%rip),%rbp \n \tjmp 64476 \n \tnopl 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:740\n \tinc %r14\n \tmov %rbx,%r13\n \tmov $0xd1b71759,%ebx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae1886(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae2886(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 646b6 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ae14af(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ae24af(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:740\n \tcmp %rax,%r14\n \tjge 646ee \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:743\n \tcall 23540 \n-\tlea 0x36ae1d7a(%rip),%rdi # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae2d7a(%rip),%rdi # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tmov %r14,%rsi\n \tcall 22650 \n \tmov %rax,0x30(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:744\n \tmov $0x28,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n@@ -57090,20 +57090,20 @@\n std::char_traits::assign(char&, char const&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/char_traits.h:352\n \tmovb $0x0,0x10(%r12)\n ggml_backend_cuda_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:741\n \tmov %r14,%rax\n \tshl $0x6,%rax\n-\tmovups 0x36adb251(%rip),%xmm0 \n-\tlea 0x36ae1702(%rip),%rcx # 36b45d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5338>\n+\tmovups 0x36adc251(%rip),%xmm0 \n+\tlea 0x36ae2702(%rip),%rcx # 36b46d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5338>\n \tmovups %xmm0,0x20(%rax,%rcx,1)\n-\tmovups 0x36adb22e(%rip),%xmm0 \n+\tmovups 0x36adc22e(%rip),%xmm0 \n \tmovups %xmm0,0x10(%rax,%rcx,1)\n-\tmovups 0x36adb212(%rip),%xmm0 \n+\tmovups 0x36adc212(%rip),%xmm0 \n \tmovups %xmm0,(%rax,%rcx,1)\n \tmov 0x30(%rsp),%rdx\n \tmov %rdx,0x30(%rax,%rcx,1)\n \tmov %r15,0x38(%rax,%rcx,1)\n std::__cxx11::basic_string, std::allocator >::_M_data() const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:239\n \tmov 0x10(%rsp),%rdi\n@@ -57114,36 +57114,36 @@\n \tje 64470 \n std::__new_allocator::deallocate(char*, unsigned long):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/new_allocator.h:172\n \tcall 224d0 \n \tjmp 64470 \n ggml_backend_cuda_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae164b(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae264b(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6448a \n \tcall 63a20 \n-\tlea 0x36ae1632(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae2632(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tlea 0x20(%rsp),%r12\n \tmov $0xd1b71759,%ebx\n \tjmp 6448a \n \txor %ebx,%ebx\n \tjmp 64708 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:747\n-\tmovb $0x1,0x36ae1a7b(%rip) # 36b46170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5738>\n+\tmovb $0x1,0x36ae2a7b(%rip) # 36b47170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5738>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:750\n \tmovslq 0xc(%rsp),%rax\n \tshl $0x6,%rax\n-\tlea 0x36ae166b(%rip),%rbx # 36b45d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5338>\n+\tlea 0x36ae266b(%rip),%rbx # 36b46d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5338>\n \tadd %rax,%rbx\n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae1631(%rip),%rdi # 36b45d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5308>\n+\tlea 0x36ae2631(%rip),%rdi # 36b46d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5308>\n \tcall 23780 \n ggml_backend_cuda_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:751\n \tmov %rbx,%rax\n \tadd $0x38,%rsp\n \tpop %rbx\n \tpop %r12\n@@ -57152,27 +57152,27 @@\n \tpop %r15\n \tpop %rbp\n \tret\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:119\n \tmov %eax,%edi\n \tcall 23750 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae15d4(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae25d4(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 64435 \n \tcall 63a20 \n-\tlea 0x36ae15bb(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae25bb(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 64435 \n \tjmp 64759 \n \tmov %rax,%rbx\n ggml_cuda_info():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae15a5(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae25a5(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 64796 \n ggml_backend_cuda_buffer_type():\n \tmov %rax,%rbx\n std::__cxx11::basic_string, std::allocator >::_M_data() const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:239\n \tmov 0x10(%rsp),%rdi\n@@ -57191,44 +57191,44 @@\n \tjmp 64796 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:4539\n \tmov %rax,%rdi\n \tcall 40230 ::~ggml_cuda_pool_alloc()@@Base+0x30>\n \tmov %rax,%rbx\n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae15a3(%rip),%rdi # 36b45d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5308>\n+\tlea 0x36ae25a3(%rip),%rdi # 36b46d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5308>\n \tcall 23780 \n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n ggml_backend_cuda_buffer_type():\n \tnopw 0x0(%rax,%rax,1)\n \n 00000000000647b0 :\n ggml_backend_cuda_get_device_count():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2957\n \tpush %rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae1550(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae2550(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 647c4 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmov 0x36ae117e(%rip),%eax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36ae217e(%rip),%eax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tpop %rbx\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae153d(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae253d(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 647bc \n \tcall 63a20 \n-\tlea 0x36ae1528(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae2528(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 647bc \n \tmov %rax,%rbx\n-\tlea 0x36ae1517(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae2517(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \txchg %ax,%ax\n \n 0000000000064800 :\n __gthread_mutex_lock(pthread_mutex_t*):\n@@ -57237,22 +57237,22 @@\n \tpush %r15\n \tpush %r14\n \tpush %r13\n \tpush %r12\n \tpush %rbx\n \tsub $0x358,%rsp\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:795\n-\tlea 0x36ae1a40(%rip),%rdi # 36b46258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5820>\n+\tlea 0x36ae2a40(%rip),%rdi # 36b47258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5820>\n \tcall 234d0 \n ggml_backend_cuda_reg():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:118\n \ttest %eax,%eax\n \tjne 64db2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3617\n-\tcmpb $0x0,0x36ae1a24(%rip) # 36b46250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5818>\n+\tcmpb $0x0,0x36ae2a24(%rip) # 36b47250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5818>\n \tjne 64d51 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3618\n \tmov $0x18,%edi\n \tcall 222c0 \n \tmov %rax,%rbx\n \tmovabs $0x7fffffffffffffff,%rax\n std::_Vector_base >::_Vector_impl_data::_Vector_impl_data():\n@@ -57274,20 +57274,20 @@\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:1423\n \taddq $0x8,0x8(%rbx)\n \tmov (%rsp),%r12\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3620\n \tinc %r12d\n \tlea 0x20(%rsp),%r14\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae147c(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae247c(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tmov %r12,(%rsp)\n \tje 64cce \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3620\n-\tcmp 0x36ae10a1(%rip),%r12d # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36ae20a1(%rip),%r12d # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 64d06 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3621\n \tmov $0x48,%edi\n \tcall 222c0 \n \tmov %rax,%rbp\n std::__cxx11::basic_string, std::allocator >::_M_local_data():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:246\n@@ -57645,32 +57645,32 @@\n \tcall 220a0 , std::allocator >::_M_replace(unsigned long, unsigned long, char const*, unsigned long)@plt>\n ggml_backend_cuda_reg():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3630\n \tmov $0x88,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3631\n-\tmov 0x36adadac(%rip),%rax \n+\tmov 0x36adbdac(%rip),%rax \n \tmov %rax,0x70(%r13)\n-\tmovups 0x36adad91(%rip),%xmm0 \n+\tmovups 0x36adbd91(%rip),%xmm0 \n \tmovups %xmm0,0x60(%r13)\n-\tmovups 0x36adad75(%rip),%xmm0 \n+\tmovups 0x36adbd75(%rip),%xmm0 \n \tmovups %xmm0,0x50(%r13)\n-\tmovups 0x36adad59(%rip),%xmm0 \n+\tmovups 0x36adbd59(%rip),%xmm0 \n \tmovups %xmm0,0x40(%r13)\n-\tmovups 0x36adad3d(%rip),%xmm0 \n+\tmovups 0x36adbd3d(%rip),%xmm0 \n \tmovups %xmm0,0x30(%r13)\n-\tmovups 0x36adad21(%rip),%xmm0 \n+\tmovups 0x36adbd21(%rip),%xmm0 \n \tmovups %xmm0,0x20(%r13)\n-\tmovups 0x36adad05(%rip),%xmm0 \n+\tmovups 0x36adbd05(%rip),%xmm0 \n \tmovups %xmm0,0x10(%r13)\n-\tmovups 0x36adace9(%rip),%xmm0 \n+\tmovups 0x36adbce9(%rip),%xmm0 \n \tmovups %xmm0,0x0(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3630\n-\tlea 0x36ae1605(%rip),%rax # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae2605(%rip),%rax # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tmov %rax,0x78(%r13)\n \tmov %rbp,0x80(%r13)\n \tmov 0x8(%rsp),%rbx\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:1418\n \tmov 0x8(%rbx),%rbp\n \tcmp 0x10(%rbx),%rbp\n \tjne 64870 \n@@ -57730,48 +57730,48 @@\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:645\n \tmov %rax,0x8(%rbx)\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:646\n \tlea (%r15,%r14,8),%rax\n \tmov %rax,0x10(%rbx)\n \tjmp 64879 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae1033(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae2033(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 64898 \n \tcall 63a20 \n-\tlea 0x36ae101a(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae201a(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tmov 0x8(%rsp),%rbx\n \tlea 0x20(%rsp),%r14\n \tmov (%rsp),%r12\n \tjmp 64898 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3640\n-\tmovups 0x36adac63(%rip),%xmm0 \n+\tmovups 0x36adbc63(%rip),%xmm0 \n \tmovups %xmm0,0x44(%rsp)\n-\tmovups 0x36adac67(%rip),%xmm0 \n+\tmovups 0x36adbc67(%rip),%xmm0 \n \tmovups %xmm0,0x54(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3638\n-\tmovl $0x1,0x36ae14f8(%rip) # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tmovl $0x1,0x36ae24f8(%rip) # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tmovups 0x40(%rsp),%xmm0\n-\tmovups %xmm0,0x36ae14f0(%rip) # 36b46224 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57ec>\n+\tmovups %xmm0,0x36ae24f0(%rip) # 36b47224 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57ec>\n \tmovups 0x50(%rsp),%xmm0\n-\tmovups %xmm0,0x36ae14f4(%rip) # 36b46234 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57fc>\n+\tmovups %xmm0,0x36ae24f4(%rip) # 36b47234 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57fc>\n \tmov 0x60(%rsp),%eax\n-\tmov %eax,0x36ae14fa(%rip) # 36b46244 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580c>\n-\tmov %rbx,0x36ae14f7(%rip) # 36b46248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5810>\n+\tmov %eax,0x36ae24fa(%rip) # 36b47244 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580c>\n+\tmov %rbx,0x36ae24f7(%rip) # 36b47248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5810>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3645\n-\tmovb $0x1,0x36ae14f8(%rip) # 36b46250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5818>\n+\tmovb $0x1,0x36ae24f8(%rip) # 36b47250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5818>\n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae14f9(%rip),%rdi # 36b46258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5820>\n+\tlea 0x36ae24f9(%rip),%rdi # 36b47258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5820>\n \tcall 23780 \n ggml_backend_cuda_reg():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3648\n-\tlea 0x36ae14b5(%rip),%rax # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae24b5(%rip),%rax # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tadd $0x358,%rsp\n \tpop %rbx\n \tpop %r12\n \tpop %r13\n \tpop %r14\n \tpop %r15\n \tpop %rbp\n@@ -57789,15 +57789,15 @@\n \tlea 0x27d594(%rip),%rdi # 2e2341 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x80d1>\n \tcall 22480 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:119\n \tmov %eax,%edi\n \tcall 23750 \n \tmov %rax,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae0f45(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae1f45(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 64df5 \n \tjmp 64df2 \n \tjmp 64df2 \n \tmov %rax,%rbx\n std::__cxx11::basic_string, std::allocator >::_M_data() const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:239\n@@ -57817,15 +57817,15 @@\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:4539\n \tmov %rax,%rdi\n \tcall 40230 ::~ggml_cuda_pool_alloc()@@Base+0x30>\n \tjmp 64df2 \n \tmov %rax,%rbx\n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae145c(%rip),%rdi # 36b46258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5820>\n+\tlea 0x36ae245c(%rip),%rdi # 36b47258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5820>\n \tcall 23780 \n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n ggml_backend_cuda_reg():\n \tnopl 0x0(%rax)\n \n 0000000000064e10 :\n@@ -57838,22 +57838,22 @@\n \tpush %r12\n \tpush %rbx\n \tsub $0xd8,%rsp\n \tmov %rsi,%r14\n \tmov %edi,%ebx\n __gthread_mutex_lock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:795\n-\tlea 0x36ae134b(%rip),%rdi # 36b46178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5740>\n+\tlea 0x36ae234b(%rip),%rdi # 36b47178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5740>\n \tcall 234d0 \n ggml_backend_cuda_split_buffer_type():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:118\n \ttest %eax,%eax\n \tjne 654a2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1048\n-\tmovzbl 0x36ae138f(%rip),%eax # 36b461d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5798>\n+\tmovzbl 0x36ae238f(%rip),%eax # 36b471d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5798>\n \ttest %al,%al\n \tje 654a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1050\n \txorps %xmm0,%xmm0\n \tmovaps %xmm0,0x80(%rsp)\n \tmovaps %xmm0,0x70(%rsp)\n \tmovaps %xmm0,0x60(%rsp)\n@@ -57902,46 +57902,46 @@\n bool std::all_of(float const*, float const*, ggml_backend_cuda_split_buffer_type::{lambda(float)#1}):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_algo.h:413\n \tcmp $0x10,%rax\n ggml_backend_cuda_split_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1053\n \tjne 65062 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae0e2c(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae1e2c(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 65529 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1054\n-\tmovups 0x36ae0e0d(%rip),%xmm0 # 36b45cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52c0>\n+\tmovups 0x36ae1e0d(%rip),%xmm0 # 36b46cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52c0>\n \tmovaps %xmm0,0x80(%rsp)\n-\tmovups 0x36ae0dee(%rip),%xmm0 # 36b45ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52b0>\n+\tmovups 0x36ae1dee(%rip),%xmm0 # 36b46ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52b0>\n \tmovaps %xmm0,0x70(%rsp)\n-\tmovups 0x36ae0dd2(%rip),%xmm0 # 36b45cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52a0>\n+\tmovups 0x36ae1dd2(%rip),%xmm0 # 36b46cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52a0>\n \tmovaps %xmm0,0x60(%rsp)\n-\tmovups 0x36ae0db6(%rip),%xmm0 # 36b45cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5290>\n+\tmovups 0x36ae1db6(%rip),%xmm0 # 36b46cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5290>\n \tmovaps %xmm0,0x50(%rsp)\n std::pair >::pair&, true>(int&, std::array&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_pair.h:902\n \tmov %ebx,0x8(%rsp)\n \tmovaps 0x50(%rsp),%xmm0\n \tmovaps 0x60(%rsp),%xmm1\n \tmovaps 0x70(%rsp),%xmm2\n \tmovaps 0x80(%rsp),%xmm3\n \tmovups %xmm0,0xc(%rsp)\n \tmovups %xmm1,0x1c(%rsp)\n \tmovups %xmm2,0x2c(%rsp)\n \tmovups %xmm3,0x3c(%rsp)\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_begin() const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:1378\n-\tmov 0x36ae1263(%rip),%r12 # 36b461b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5778>\n+\tmov 0x36ae2263(%rip),%r12 # 36b471b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5778>\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_lower_bound(std::_Rb_tree_node_base*, std::_Rb_tree_node_base*, std::pair > const&) const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:2603\n \ttest %r12,%r12\n \tje 64fb5 \n \tlea 0xc(%rsp),%r15\n-\tlea 0x36ae124a(%rip),%r14 # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tlea 0x36ae224a(%rip),%r14 # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n \tjmp 64f6f \n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_S_right(std::_Rb_tree_node_base*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:1437\n \tadd $0x18,%r12\n \tmov %r12,%rax\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_lower_bound(std::_Rb_tree_node_base*, std::_Rb_tree_node_base*, std::pair > const&) const:\n \tmov (%rax),%r12\n@@ -57966,15 +57966,15 @@\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_S_left(std::_Rb_tree_node_base*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:1425\n \tlea 0x10(%r12),%rax\n \tmov %r12,%r14\n \tjmp 64f67 \n std::operator==(std::_Rb_tree_iterator > const, ggml_backend_buffer_type> > const&, std::_Rb_tree_iterator > const, ggml_backend_buffer_type> > const&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:432\n-\tlea 0x36ae1208(%rip),%rax # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tlea 0x36ae2208(%rip),%rax # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n \tcmp %rax,%r14\n ggml_backend_cuda_split_buffer_type():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:3154\n \tje 64fb5 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_pair.h:1074\n \tmov 0x8(%rsp),%eax\n \tmov 0x20(%r14),%ecx\n@@ -58030,22 +58030,22 @@\n \tja 65020 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:246\n \tadd $0xfffffffd,%r13d\n \tjmp 65157 \n \txorps %xmm0,%xmm0\n \tmovss %xmm0,0x4(%rsp)\n \txor %r12d,%r12d\n-\tlea 0x36ae0c93(%rip),%r15 # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae1c93(%rip),%r15 # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tdata16 cs nopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae0c81(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae1c81(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 650b5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ae08ae(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ae18ae(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1057\n \tcmp %rax,%r12\n \tjge 650d0 \n \tmovss 0x4(%rsp),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1058\n \tmovss %xmm0,0x50(%rsp,%r12,4)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1059\n@@ -58060,21 +58060,21 @@\n \ttest %eax,%eax\n \tje 6508b \n \tcall 63a20 \n \tmov %r15,%rdi\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6508b \n \txor %r15d,%r15d\n-\tlea 0x36ae0c2e(%rip),%r14 # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae1c2e(%rip),%r14 # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tnopw 0x0(%rax,%rax,1)\n-\tmovzbl 0x36ae0c21(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae1c21(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 65114 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ae084e(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ae184e(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1061\n \tcmp %rax,%r15\n \tjge 64f17 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1062\n \tmovss 0x50(%rsp,%r15,4),%xmm0\n \tdivss 0x4(%rsp),%xmm0\n \tmovss %xmm0,0x50(%rsp,%r15,4)\n@@ -58335,24 +58335,24 @@\n \tcmp %rax,%rdi\n \tje 65353 \n std::__new_allocator::deallocate(char*, unsigned long):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/new_allocator.h:172\n \tcall 224d0 \n ggml_backend_cuda_split_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1077\n-\tmovups 0x36ada58e(%rip),%xmm0 \n+\tmovups 0x36adb58e(%rip),%xmm0 \n \tmovaps %xmm0,0xb0(%rsp)\n-\tmovups 0x36ada56f(%rip),%xmm0 \n+\tmovups 0x36adb56f(%rip),%xmm0 \n \tmovaps %xmm0,0xa0(%rsp)\n-\tmovups 0x36ada550(%rip),%xmm0 \n+\tmovups 0x36adb550(%rip),%xmm0 \n \tmovaps %xmm0,0x90(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1078\n \tcall 23540 \n \tmovslq %ebx,%rsi\n-\tlea 0x36ae0e91(%rip),%rdi # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae1e91(%rip),%rdi # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tcall 22650 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1076\n \tmov %rax,0xc0(%rsp)\n \tmov %r14,0xc8(%rsp)\n std::pair >::pair&, true>(int&, std::array&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_pair.h:902\n \tmov %ebx,0x8(%rsp)\n@@ -58362,21 +58362,21 @@\n \tmovaps 0x80(%rsp),%xmm3\n \tmovups %xmm0,0xc(%rsp)\n \tmovups %xmm1,0x1c(%rsp)\n \tmovups %xmm2,0x2c(%rsp)\n \tmovups %xmm3,0x3c(%rsp)\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_begin() const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:1378\n-\tmov 0x36ae0dd6(%rip),%r15 # 36b461b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5778>\n+\tmov 0x36ae1dd6(%rip),%r15 # 36b471b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5778>\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_lower_bound(std::_Rb_tree_node_base*, std::_Rb_tree_node_base*, std::pair > const&) const:\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:2603\n \ttest %r15,%r15\n \tje 65443 \n \tlea 0xc(%rsp),%rbx\n-\tlea 0x36ae0dbd(%rip),%r14 # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tlea 0x36ae1dbd(%rip),%r14 # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n \tjmp 653ff \n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_S_right(std::_Rb_tree_node_base*):\n \tnopl (%rax)\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:1437\n \tadd $0x18,%r15\n \tmov %r15,%rax\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_lower_bound(std::_Rb_tree_node_base*, std::_Rb_tree_node_base*, std::pair > const&) const:\n@@ -58402,40 +58402,40 @@\n std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_S_left(std::_Rb_tree_node_base*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:1425\n \tlea 0x10(%r15),%rax\n \tmov %r15,%r14\n \tjmp 653f7 \n std::operator==(std::_Rb_tree_iterator > const, ggml_backend_buffer_type> > const&, std::_Rb_tree_iterator > const, ggml_backend_buffer_type> > const&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:432\n-\tlea 0x36ae0d7b(%rip),%rsi # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tlea 0x36ae1d7b(%rip),%rsi # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n \tcmp %rsi,%r14\n ggml_backend_cuda_split_buffer_type():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_map.h:622\n \tje 6544a \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_pair.h:1074\n \tmov 0x8(%rsp),%eax\n \tmov 0x20(%r14),%ecx\n \tcmp %ecx,%eax\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_pair.h:1075\n \tjge 6548b \n \tmov %r14,%rsi\n \tjmp 6544a \n-\tlea 0x36ae0d5e(%rip),%rsi # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tlea 0x36ae1d5e(%rip),%rsi # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n std::_Rb_tree_iterator > const, ggml_backend_buffer_type> > std::map >, ggml_backend_buffer_type, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::emplace_hint >, ggml_backend_buffer_type&>(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair >&&, ggml_backend_buffer_type&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_map.h:663\n-\tlea 0x36ae0d4f(%rip),%rdi # 36b461a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5768>\n+\tlea 0x36ae1d4f(%rip),%rdi # 36b471a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5768>\n \tlea 0x8(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 228e0 > const, ggml_backend_buffer_type> > std::_Rb_tree >, std::pair > const, ggml_backend_buffer_type>, std::_Select1st > const, ggml_backend_buffer_type> >, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::_M_emplace_hint_unique >, ggml_backend_buffer_type&>(std::_Rb_tree_const_iterator > const, ggml_backend_buffer_type> >, std::pair >&&, ggml_backend_buffer_type&)@plt>\n ggml_backend_cuda_split_buffer_type():\n \tmov %rax,%r14\n \tadd $0x68,%r14\n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae0d07(%rip),%rdi # 36b46178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5740>\n+\tlea 0x36ae1d07(%rip),%rdi # 36b47178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5740>\n \tcall 23780 \n ggml_backend_cuda_split_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1084\n \tmov %r14,%rax\n \tadd $0xd8,%rsp\n \tpop %rbx\n \tpop %r12\n@@ -58454,56 +58454,56 @@\n \ttest %al,%al\n \tjne 6544a \n \tjmp 65466 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/std_mutex.h:119\n \tmov %eax,%edi\n \tcall 23750 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1048\n-\tlea 0x36ae0d20(%rip),%rdi # 36b461d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5798>\n+\tlea 0x36ae1d20(%rip),%rdi # 36b471d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5798>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 64e49 \n std::_Rb_tree_header::_Rb_tree_header():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:173\n-\tmovl $0x0,0x36ae0ce1(%rip) # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n-\tlea 0x36ae0cd2(%rip),%rsi # 36b461a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5768>\n-\tlea 0x36ae0cd3(%rip),%rax # 36b461a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tmovl $0x0,0x36ae1ce1(%rip) # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n+\tlea 0x36ae1cd2(%rip),%rsi # 36b471a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5768>\n+\tlea 0x36ae1cd3(%rip),%rax # 36b471a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5770>\n std::_Rb_tree_header::_M_reset():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:206\n-\tmovq $0x0,0x36ae0cd0(%rip) # 36b461b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5778>\n+\tmovq $0x0,0x36ae1cd0(%rip) # 36b471b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5778>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:207\n-\tmov %rax,0x36ae0cd1(%rip) # 36b461b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5780>\n+\tmov %rax,0x36ae1cd1(%rip) # 36b471b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5780>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:208\n-\tmov %rax,0x36ae0cd2(%rip) # 36b461c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5788>\n+\tmov %rax,0x36ae1cd2(%rip) # 36b471c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5788>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_tree.h:209\n-\tmovq $0x0,0x36ae0ccf(%rip) # 36b461c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5790>\n+\tmovq $0x0,0x36ae1ccf(%rip) # 36b471c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5790>\n ggml_backend_cuda_split_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1048\n-\tmov 0x36adfa10(%rip),%rdi # 36b44f10 >, ggml_backend_buffer_type, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::~map()@@Base+0x36acc7f0>\n-\tlea 0x36adfaf9(%rip),%rdx # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n+\tmov 0x36ae0a10(%rip),%rdi # 36b45f10 >, ggml_backend_buffer_type, std::less > >, std::allocator > const, ggml_backend_buffer_type> > >::~map()@@Base+0x36acd7f0>\n+\tlea 0x36ae0af9(%rip),%rdx # 36b46000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n \tcall 22580 <__cxa_atexit@plt>\n-\tlea 0x36ae0cbd(%rip),%rdi # 36b461d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5798>\n+\tlea 0x36ae1cbd(%rip),%rdi # 36b471d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5798>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 64e49 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:423\n \tlea 0x27e76a(%rip),%rdi # 2e3c8e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9a1e>\n \tcall 22480 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae07d8(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae17d8(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 64ee4 \n \tcall 63a20 \n-\tlea 0x36ae07bf(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae17bf(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 64ee4 \n \tjmp 65557 \n \tjmp 65557 \n \tmov %rax,%rbx\n-\tlea 0x36ae07a7(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae17a7(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 655b8 \n \tjmp 655b5 \n \tjmp 655b5 \n \tmov %rax,%rbx\n \tjmp 6558f \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/basic_string.h:4539\n@@ -58538,72 +58538,72 @@\n \tmov %r14,%rdi\n \tcall 224d0 \n \tjmp 655b8 \n \tjmp 655b5 \n \tmov %rax,%rbx\n __gthread_mutex_unlock(pthread_mutex_t*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/x86_64-linux-gnu/c++/15/bits/gthr-default.h:825\n-\tlea 0x36ae0bb9(%rip),%rdi # 36b46178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5740>\n+\tlea 0x36ae1bb9(%rip),%rdi # 36b47178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5740>\n \tcall 23780 \n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n ggml_backend_cuda_split_buffer_type():\n \tnopl 0x0(%rax)\n \n 00000000000655d0 :\n ggml_backend_cuda_host_buffer_type():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1135\n \tpush %rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1136\n-\tmovzbl 0x36ae0c40(%rip),%eax # 36b46218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n+\tmovzbl 0x36ae1c40(%rip),%eax # 36b47218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n \ttest %al,%al\n \tje 655e5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1149\n-\tlea 0x36ae0bf5(%rip),%rax # 36b461d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a0>\n+\tlea 0x36ae1bf5(%rip),%rax # 36b471d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a0>\n \tpop %rbx\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1136\n-\tlea 0x36ae0c2c(%rip),%rdi # 36b46218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n+\tlea 0x36ae1c2c(%rip),%rdi # 36b47218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 655dc \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1137\n \tlea 0xa4(%rip),%rax \n-\tmov %rax,0x36ae0bd5(%rip) # 36b461d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a0>\n+\tmov %rax,0x36ae1bd5(%rip) # 36b471d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a0>\n \tlea 0xa6(%rip),%rax \n-\tmov %rax,0x36ae0bcf(%rip) # 36b461e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a8>\n+\tmov %rax,0x36ae1bcf(%rip) # 36b471e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a8>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1140\n \tcall 22820 \n \tmov 0x10(%rax),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1137\n-\tmov %rax,0x36ae0bc7(%rip) # 36b461e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57b0>\n-\tmovq $0x0,0x36ae0bc4(%rip) # 36b461f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57b8>\n+\tmov %rax,0x36ae1bc7(%rip) # 36b471e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57b0>\n+\tmovq $0x0,0x36ae1bc4(%rip) # 36b471f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57b8>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1142\n \tcall 22820 \n \tmov 0x20(%rax),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1137\n-\tmov %rax,0x36ae0bbc(%rip) # 36b461f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57c0>\n+\tmov %rax,0x36ae1bbc(%rip) # 36b471f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57c0>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1143\n \tcall 22820 \n \tmov 0x28(%rax),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1137\n-\tmov %rax,0x36ae0bb4(%rip) # 36b46200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57c8>\n+\tmov %rax,0x36ae1bb4(%rip) # 36b47200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57c8>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1145\n \tcall 23540 \n-\tlea 0x36ae0bc8(%rip),%rdi # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae1bc8(%rip),%rdi # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \txor %esi,%esi\n \tcall 22650 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1136\n-\tmov %rax,0x36ae0ba2(%rip) # 36b46208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57d0>\n-\tmovq $0x0,0x36ae0b9f(%rip) # 36b46210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57d8>\n-\tlea 0x36ae0ba0(%rip),%rdi # 36b46218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n+\tmov %rax,0x36ae1ba2(%rip) # 36b47208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57d0>\n+\tmovq $0x0,0x36ae1b9f(%rip) # 36b47210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57d8>\n+\tlea 0x36ae1ba0(%rip),%rdi # 36b47218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 655dc \n \tmov %rax,%rbx\n-\tlea 0x36ae0b8c(%rip),%rdi # 36b46218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n+\tlea 0x36ae1b8c(%rip),%rdi # 36b47218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tnopl 0x0(%rax)\n ggml_backend_cuda_host_buffer_type_name(ggml_backend_buffer_type*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1089\n \tlea 0x27ce02(%rip),%rax # 2e24a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8239>\n@@ -58684,15 +58684,15 @@\n \n 00000000000657a0 :\n ggml_backend_is_cuda():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2954\n \ttest %rdi,%rdi\n \tje 657b4 \n \tmov (%rdi),%rdi\n-\tlea 0x36adf861(%rip),%rsi # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n+\tlea 0x36ae0861(%rip),%rsi # 36b46010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n \tjmp 228a0 \n \txor %eax,%eax\n \tret\n \tnopw 0x0(%rax,%rax,1)\n \n 00000000000657c0 :\n ggml_backend_cuda_get_device_description():\n@@ -58807,52 +58807,52 @@\n \tpush %r14\n \tpush %rbx\n \tmov %edi,%ebx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3652\n \ttest %edi,%edi\n \tjs 65998 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ae0422(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae1422(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 659c0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3652\n-\tcmp %ebx,0x36ae004c(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp %ebx,0x36ae104c(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjle 65998 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3657\n \tmov $0x538,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n \tmov %rax,%rdi\n \tmov %ebx,%esi\n \tcall 22bb0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3663\n \tmov $0x80,%edi\n \tcall 222c0 \n \tmov %rax,%r14\n-\tlea 0x36adf6eb(%rip),%rax # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n+\tlea 0x36ae06eb(%rip),%rax # 36b46010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n \tmov %rax,(%r14)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3665\n-\tmovups 0x36ada061(%rip),%xmm0 \n+\tmovups 0x36adb061(%rip),%xmm0 \n \tmovups %xmm0,0x8(%r14)\n-\tmovups 0x36ada065(%rip),%xmm0 \n+\tmovups 0x36adb065(%rip),%xmm0 \n \tmovups %xmm0,0x18(%r14)\n-\tmovups 0x36ada069(%rip),%xmm0 \n+\tmovups 0x36adb069(%rip),%xmm0 \n \tmovups %xmm0,0x28(%r14)\n-\tmovups 0x36ada06d(%rip),%xmm0 \n+\tmovups 0x36adb06d(%rip),%xmm0 \n \tmovups %xmm0,0x38(%r14)\n-\tmovups 0x36ada071(%rip),%xmm0 \n+\tmovups 0x36adb071(%rip),%xmm0 \n \tmovups %xmm0,0x48(%r14)\n-\tmovups 0x36ada075(%rip),%xmm0 \n+\tmovups 0x36adb075(%rip),%xmm0 \n \tmovups %xmm0,0x58(%r14)\n-\tmov 0x36ada079(%rip),%rax \n+\tmov 0x36adb079(%rip),%rax \n \tmov %rax,0x68(%r14)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3666\n \tcall 23540 \n \tmov %ebx,%esi\n-\tlea 0x36ae0897(%rip),%rdi # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae1897(%rip),%rdi # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tcall 22650 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3663\n \tmov %rax,0x70(%r14)\n \tmov %r15,0x78(%r14)\n \tjmp 659b7 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3653\n \tlea 0x27bf3c(%rip),%rsi # 2e18db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x766b>\n@@ -58865,24 +58865,24 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3671\n \tmov %r14,%rax\n \tpop %rbx\n \tpop %r14\n \tpop %r15\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ae0341(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae1341(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 658ee \n \tcall 63a20 \n-\tlea 0x36ae0328(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae1328(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 658ee \n \tmov %rax,%rbx\n-\tlea 0x36ae0314(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae1314(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tmov %rax,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3657\n \tmov %r15,%rdi\n \tjmp 65a0f \n@@ -58895,15 +58895,15 @@\n \tnopl 0x0(%rax)\n \n 0000000000065a20 :\n ggml_backend_init():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3673\n \tpush %rax\n \tcall 23540 \n-\tlea 0x36ae07f3(%rip),%rax # 36b46220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n+\tlea 0x36ae17f3(%rip),%rax # 36b47220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57e8>\n \tpop %rcx\n \tret\n \tnop\n ggml_cuda_parse_id(char*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:128\n \tpush %rbp\n \tmov %rsp,%rbp\n@@ -59053,23 +59053,23 @@\n \tjne 65c00 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:124\n \tpop %rbx\n \tpop %r14\n \tpop %rbp\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:113\n-\tcmpb $0x0,0x36ae06ab(%rip) # 36b46280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5848>\n+\tcmpb $0x0,0x36ae16ab(%rip) # 36b47280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5848>\n \tjne 65bf1 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:114\n \tlea 0x27c00e(%rip),%rsi # 2e1bec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x797c>\n \tmov $0x3,%edi\n \txor %eax,%eax\n \tcall 22e80 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:115\n-\tmovb $0x1,0x36ae068f(%rip) # 36b46280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5848>\n+\tmovb $0x1,0x36ae168f(%rip) # 36b47280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5848>\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tpop %rbx\n \tpop %r14\n \tpop %rbp\n \tjmp 22040 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:107\n@@ -59146,23 +59146,23 @@\n \tcall 222c0 \n \tmov %rax,%r15\n \tmov (%r12),%esi\n \tmov 0x48(%rsp),%rdx\n \tmov %rax,%rdi\n \tcall 23010 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:693\n-\tmov 0x36ad9d2e(%rip),%rax \n+\tmov 0x36adad2e(%rip),%rax \n \tmov %rax,0x40(%rsp)\n-\tmovups 0x36ad9d12(%rip),%xmm0 \n+\tmovups 0x36adad12(%rip),%xmm0 \n \tmovups %xmm0,0x30(%rsp)\n-\tmovups 0x36ad9cf6(%rip),%xmm0 \n+\tmovups 0x36adacf6(%rip),%xmm0 \n \tmovups %xmm0,0x20(%rsp)\n-\tmovups 0x36ad9cda(%rip),%xmm0 \n+\tmovups 0x36adacda(%rip),%xmm0 \n \tmovups %xmm0,0x10(%rsp)\n-\tmovups 0x36ad9cbe(%rip),%xmm0 \n+\tmovups 0x36adacbe(%rip),%xmm0 \n \tmovups %xmm0,(%rsp)\n \tmov %r14,%rdi\n \tmov %r15,%rsi\n \tmov %rbx,%rdx\n \tcall 22600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:694\n \tadd $0x60,%rsp\n@@ -59690,23 +59690,23 @@\n std::_Vector_base >::_Vector_impl_data::_Vector_impl_data():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:106\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,(%rax)\n \tmovq $0x0,0x10(%rax)\n ggml_backend_cuda_split_buffer_type_alloc_buffer(ggml_backend_buffer_type*, unsigned long):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:992\n-\tmov 0x36ad9704(%rip),%rcx \n+\tmov 0x36ada704(%rip),%rcx \n \tmov %rcx,0x40(%rsp)\n-\tmovups 0x36ad96e8(%rip),%xmm0 \n+\tmovups 0x36ada6e8(%rip),%xmm0 \n \tmovups %xmm0,0x30(%rsp)\n-\tmovups 0x36ad96cc(%rip),%xmm0 \n+\tmovups 0x36ada6cc(%rip),%xmm0 \n \tmovups %xmm0,0x20(%rsp)\n-\tmovups 0x36ad96b0(%rip),%xmm0 \n+\tmovups 0x36ada6b0(%rip),%xmm0 \n \tmovups %xmm0,0x10(%rsp)\n-\tmovups 0x36ad9694(%rip),%xmm0 \n+\tmovups 0x36ada694(%rip),%xmm0 \n \tmovups %xmm0,(%rsp)\n \tmov %r14,%rdi\n \tmov %rax,%rsi\n \tmov %rbx,%rdx\n \tcall 22600 \n \tadd $0x48,%rsp\n \tpop %rbx\n@@ -59756,19 +59756,19 @@\n \tnopl 0x0(%rax,%rax,1)\n \tmov %r13,(%rsp)\n \tmov %rbp,%r13\n \tmov %r14,%rbp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1009\n \tinc %r12d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adf8a4(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae08a4(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 664d5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1009\n-\tcmp 0x36adf4d1(%rip),%r12d # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36ae04d1(%rip),%r12d # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 664fb \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1011\n \tmov %r13,%rdi\n \tmov %rbp,%rsi\n \tmov %rbx,%rdx\n \tmov %r15,%rcx\n \tmov %r12d,%r8d\n@@ -59800,20 +59800,20 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1022\n \tmov (%rbx),%edi\n \tmov 0x8(%rsp),%rsi\n \tcall 23850 \n \tadd %rax,%r13\n \tjmp 66450 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adf82c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae082c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 66468 \n \tcall 63a20 \n-\tlea 0x36adf817(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae0817(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 66468 \n \tmov (%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1026\n \tadd $0x28,%rsp\n \tpop %rbx\n \tpop %r12\n@@ -59827,15 +59827,15 @@\n \tlea 0x274b2f(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x27bd02(%rip),%rcx # 2e2225 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7fb5>\n \tmov $0x3eb,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n \tmov %rax,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adf7cf(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae07cf(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tcs nopw 0x0(%rax,%rax,1)\n ggml_backend_cuda_split_buffer_type_is_host(ggml_backend_buffer_type*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1030\n \txor %eax,%eax\n@@ -60009,19 +60009,19 @@\n \taddq $0x40,0x38(%rsp)\n \taddq $0x40,0x30(%rsp)\n \taddq $0x40,0x28(%rsp)\n \taddq $0x40,0x20(%rsp)\n \tadd $0x40,%r14\n \tadd $0x40,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adf593(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae0593(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 66907 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36adf1bc(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ae01bc(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:840\n \tcmp %rax,%r13\n \tjge 66936 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:842\n \tlea 0x60(%rsp),%rdi\n \tlea 0x58(%rsp),%rsi\n \tmov %r12,%rdx\n@@ -60127,20 +60127,20 @@\n \tlea (%r15,%rbx,1),%rdi\n \tmov $0x2,%esi\n \tcall 22510 \n \ttest %eax,%eax\n \tje 66740 \n \tjmp 6694f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adf3fa(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae03fa(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6677d \n \tcall 63a20 \n-\tlea 0x36adf3e1(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae03e1(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tmov 0x8(%rsp),%r12\n \tjmp 6677d \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:874\n \tmov %r15,0x140(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:875\n \txor %eax,%eax\n@@ -60194,15 +60194,15 @@\n \txor %eax,%eax\n \tcall 22ac0 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:2200\n \tlea 0x27b92e(%rip),%rdi # 2e2341 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x80d1>\n \tcall 22480 \n \tmov %rax,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adf2e6(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae02e6(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tnop\n ggml_backend_cuda_split_buffer_set_tensor(ggml_backend_buffer*, ggml_tensor*, void const*, unsigned long, unsigned long):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:878\n \tpush %rbp\n@@ -60272,19 +60272,19 @@\n \ttest %eax,%eax\n \tmov %r15,%rbp\n \tmov 0x10(%rsp),%r15\n \tjne 66c48 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:890\n \tinc %r13\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adf1da(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae01da(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 66b93 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36adee07(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adfe07(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:890\n \tcmp %rax,%r13\n \tjge 66bb9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:892\n \tmov %rbp,%rdi\n \tlea 0x38(%rsp),%rsi\n \tmov %r14,%rdx\n@@ -60310,31 +60310,31 @@\n \tje 66ae0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:905\n \tmov (%r14),%edi\n \tmov 0x8(%rsp),%rsi\n \tcall 23850 \n \tjmp 66ae0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adf16e(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae016e(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 66b32 \n \tcall 63a20 \n-\tlea 0x36adf159(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae0159(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 66b32 \n \tmov $0xffffffff,%ebp\n-\tlea 0x36adf143(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae0143(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tdata16 cs nopw 0x0(%rax,%rax,1)\n-\tmovzbl 0x36adf131(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ae0131(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 66bf5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:912\n \tinc %ebp\n-\tcmp 0x36aded5d(%rip),%ebp # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36adfd5d(%rip),%ebp # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 66c10 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:913\n \tmov $0x2,%edi\n \tcall 22050 \n \ttest %eax,%eax\n \tje 66bd0 \n \tjmp 66c1f \n@@ -60395,15 +60395,15 @@\n \tmov $0x372,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n \tjmp 66cd6 \n \tmov %rax,%rbx\n ggml_cuda_info():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adf028(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ae0028(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n ggml_backend_cuda_split_buffer_set_tensor(ggml_backend_buffer*, ggml_tensor*, void const*, unsigned long, unsigned long):\n \tnopl (%rax)\n ggml_backend_cuda_split_buffer_get_tensor(ggml_backend_buffer*, ggml_tensor const*, void*, unsigned long, unsigned long):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:917\n@@ -60474,19 +60474,19 @@\n \ttest %eax,%eax\n \tmov %r15,%rbp\n \tmov 0x10(%rsp),%r15\n \tjne 66f08 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:929\n \tinc %r13\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adef1a(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adff1a(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 66e53 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36adeb47(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adfb47(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:929\n \tcmp %rax,%r13\n \tjge 66e79 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:931\n \tmov %rbp,%rdi\n \tlea 0x38(%rsp),%rsi\n \tmov %r14,%rdx\n@@ -60512,31 +60512,31 @@\n \tje 66da0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:944\n \tmov (%r14),%edi\n \tmov 0x8(%rsp),%rsi\n \tcall 23850 \n \tjmp 66da0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adeeae(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfeae(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 66df2 \n \tcall 63a20 \n-\tlea 0x36adee99(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfe99(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 66df2 \n \tmov $0xffffffff,%ebp\n-\tlea 0x36adee83(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfe83(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tdata16 cs nopw 0x0(%rax,%rax,1)\n-\tmovzbl 0x36adee71(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adfe71(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 66eb5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:951\n \tinc %ebp\n-\tcmp 0x36adea9d(%rip),%ebp # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36adfa9d(%rip),%ebp # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 66ed0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:952\n \tmov $0x2,%edi\n \tcall 22050 \n \ttest %eax,%eax\n \tje 66e90 \n \tjmp 66edf \n@@ -60597,15 +60597,15 @@\n \tmov $0x399,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n \tjmp 66f96 \n \tmov %rax,%rbx\n ggml_cuda_info():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36aded68(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfd68(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n ggml_backend_cuda_split_buffer_get_tensor(ggml_backend_buffer*, ggml_tensor const*, void*, unsigned long, unsigned long):\n \tnopl (%rax)\n ggml_backend_cuda_split_buffer_clear(ggml_backend_buffer*, unsigned char):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:959\n@@ -60652,19 +60652,19 @@\n \tjmp 67026 \n \tmov %ecx,%eax\n \txor %edx,%edx\n \tdiv %r15d\n \tsub %rdx,%rcx\n \tmov %rcx,0x0(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adecd4(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adfcd4(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6708f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmov 0x36ade902(%rip),%eax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36adf902(%rip),%eax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:775\n \tdec %eax\n \tcmp %ebp,%eax\n \tje 67079 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:778\n \txorps %xmm0,%xmm0\n \tcvtsi2ss %r14,%xmm0\n@@ -60691,24 +60691,24 @@\n \tpop %r12\n \tpop %r13\n \tpop %r14\n \tpop %r15\n \tpop %rbp\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adec72(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfc72(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 67038 \n \tcall 63a20 \n-\tlea 0x36adec5d(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfc5d(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 67038 \n \tmov %rax,%rbx\n-\tlea 0x36adec4c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfc4c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tnopl 0x0(%rax)\n get_row_rounding(std::array const&):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:755\n \tpush %rbp\n@@ -60716,16 +60716,16 @@\n \tpush %r14\n \tpush %r13\n \tpush %r12\n \tpush %rbx\n \tpush %rax\n \tmov %rdi,%rbx\n \txor %r12d,%r12d\n-\tlea 0x36ade858(%rip),%r13 # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n-\tlea 0x36adec19(%rip),%r14 # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adf858(%rip),%r13 # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adfc19(%rip),%r14 # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \txor %r15d,%r15d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:757\n \timul $0x38,%r12,%rax\n \tlea (%rax,%r13,1),%rbp\n \tadd $0xffffffffffffffd0,%rbp\n \tinc %r12\n \tjmp 67126 \n@@ -60733,33 +60733,33 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:758\n \tadd $0x38,%rbp\n \tinc %r12\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n \tjb 671b0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adebdb(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adfbdb(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 67177 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n \tlea -0x1(%r12),%rax\n-\tmovslq 0x36ade803(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adf803(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:757\n \tcmp %rcx,%rax\n \tjge 6722a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:758\n \tmovss -0x4(%rbx,%r12,4),%xmm0\n \tmovss %xmm0,0x4(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adebae(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adfbae(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 67192 \n \tmovss 0x2a7632(%rip),%xmm0 # 30e798 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x34528>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:758\n-\tcmp %r12d,0x36ade7d3(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp %r12d,0x36adf7d3(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjle 67110 \n \tmovss (%rbx,%r12,4),%xmm0\n \tjmp 67110 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n \tmov %r14,%rdi\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n@@ -60773,15 +60773,15 @@\n \ttest %eax,%eax\n \tje 6715e \n \tcall 63a20 \n \tmov %r14,%rdi\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6715e \n \tnopl (%rax)\n-\tmovzbl 0x36adeb51(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adfb51(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6720f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:762\n \tmov 0x0(%rbp),%ecx\n get_mmq_y_host(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/mmq.cuh:127\n \tcmp $0x1000000,%ecx\n@@ -60825,15 +60825,15 @@\n \tpop %r14\n \tpop %r15\n \tpop %rbp\n \tret\n \tjmp 67240 \n \tjmp 67240 \n \tmov %rax,%rbx\n-\tlea 0x36adeabe(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adfabe(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tnopw 0x0(%rax,%rax,1)\n ggml_backend_cuda_host_buffer_free_buffer(ggml_backend_buffer*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1098\n \tpush %rax\n@@ -60986,15 +60986,15 @@\n \tjmp 22a20 \n \txchg %ax,%ax\n ggml_backend_cuda_device_get_host_buffer_type(ggml_backend_device*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3070\n \tpush %rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3072\n \tcall 22910 \n-\tlea 0x36adedeb(%rip),%rax # 36b461d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a0>\n+\tlea 0x36adfdeb(%rip),%rax # 36b471d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x57a0>\n \tpop %rcx\n \tret\n \tnop\n ggml_backend_cuda_device_supports_op(ggml_backend_device*, ggml_tensor const*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3076\n \tpush %rbp\n \tpush %r15\n@@ -61608,15 +61608,15 @@\n \tbt %eax,%ecx\n \tsetb %bpl\n \tjmp 677d8 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3391\n \tcall 22bc0 \n \tmovslq (%r15),%rax\n \timul $0x38,%rax,%rax\n-\tlea 0x36addda2(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adeda2(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov $0xfffffd12,%edx\n new_mma_available(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:293\n \tadd 0x8(%rax,%rcx,1),%edx\n \tcmp $0xffd11,%edx\n ggml_backend_cuda_device_supports_op(ggml_backend_device*, ggml_tensor const*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3392\n@@ -61681,21 +61681,21 @@\n \tpush %r14\n \tpush %rbx\n \tmov %rsi,%r14\n \tmov %rdi,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3432\n \tmov 0x80(%rdi),%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ade05f(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adf05f(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 67d09 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3433\n \tmovslq (%r15),%rax\n \timul $0x38,%rax,%rax\n-\tlea 0x36addc85(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adec85(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmovzbl 0x20(%rax,%rcx,1),%edx\n ggml_backend_buft_is_cuda(ggml_backend_buffer_type*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:674\n \tmov (%r14),%rcx\n \tlea -0x209a(%rip),%rax \n \tcmp %rax,%rcx\n ggml_backend_cuda_device_supports_buft(ggml_backend_device*, ggml_backend_buffer_type*):\n@@ -61727,24 +61727,24 @@\n ggml_backend_cuda_device_supports_buft(ggml_backend_device*, ggml_backend_buffer_type*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3434\n \tpop %rbx\n \tpop %r14\n \tpop %r15\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36addff8(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adeff8(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 67cad \n \tcall 63a20 \n-\tlea 0x36addfe3(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adefe3(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 67cad \n \tmov %rax,%rbx\n-\tlea 0x36addfd2(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adefd2(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n get_op_batch_size(ggml_tensor const*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3438\n \tmov 0x50(%rsi),%eax\n@@ -61925,66 +61925,66 @@\n \txor %eax,%eax\n \ttest %ecx,%ecx\n \tlea 0x27(%rip),%rcx \n \tcmove %rcx,%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3600\n \tpop %rbx\n \tret\n-\tmov 0x36add0a2(%rip),%rax \n+\tmov 0x36ade0a2(%rip),%rax \n \tpop %rbx\n \tret\n-\tmov 0x36add009(%rip),%rax \n+\tmov 0x36ade009(%rip),%rax \n \tpop %rbx\n \tret\n-\tmov 0x36add010(%rip),%rax \n+\tmov 0x36ade010(%rip),%rax \n \tpop %rbx\n \tret\n \tnopw 0x0(%rax,%rax,1)\n ggml_backend_cuda_get_features(ggml_backend_reg*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3530\n \tpush %rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3531\n-\tmovzbl 0x36ade350(%rip),%eax # 36b462c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n+\tmovzbl 0x36adf350(%rip),%eax # 36b472c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n \ttest %al,%al\n \tje 67f85 \n std::vector >::data():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:1396\n-\tmov 0x36ade32d(%rip),%rax # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tmov 0x36adf32d(%rip),%rax # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n ggml_backend_cuda_get_features(ggml_backend_reg*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3580\n \tpop %rbx\n \tret\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3531\n-\tlea 0x36ade33c(%rip),%rdi # 36b462c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n+\tlea 0x36adf33c(%rip),%rdi # 36b472c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 67f7c \n \tcall 67fe0 \n-\tmov 0x36add00f(%rip),%rdi # 36b44fb0 >::~vector()@@Base+0x36acbe50>\n-\tlea 0x36ade308(%rip),%rsi # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n-\tlea 0x36add051(%rip),%rdx # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n+\tmov 0x36ade00f(%rip),%rdi # 36b45fb0 >::~vector()@@Base+0x36acce50>\n+\tlea 0x36adf308(%rip),%rsi # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tlea 0x36ade051(%rip),%rdx # 36b46000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n \tcall 22580 <__cxa_atexit@plt>\n-\tlea 0x36ade30d(%rip),%rdi # 36b462c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n+\tlea 0x36adf30d(%rip),%rdi # 36b472c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 67f7c \n \tmov %rax,%rbx\n-\tlea 0x36ade2fc(%rip),%rdi # 36b462c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n+\tlea 0x36adf2fc(%rip),%rdi # 36b472c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5890>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tnopl 0x0(%rax)\n std::_Vector_base >::_Vector_impl_data::_Vector_impl_data():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3531\n \tpush %r14\n \tpush %rbx\n \tpush %rax\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:106\n \txorps %xmm0,%xmm0\n-\tmovups %xmm0,0x36ade2c2(%rip) # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n-\tmovq $0x0,0x36ade2c7(%rip) # 36b462c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n+\tmovups %xmm0,0x36adf2c2(%rip) # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tmovq $0x0,0x36adf2c7(%rip) # 36b472c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n std::__new_allocator::allocate(unsigned long, void const*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/new_allocator.h:151\n \tmov $0x10,%edi\n \tcall 222c0 \n void std::vector >::_M_realloc_append(ggml_backend_feature&&):\n \tmov %rax,%rbx\n void std::__new_allocator::construct(ggml_backend_feature*, ggml_backend_feature&&):\n@@ -61994,19 +61994,19 @@\n \tlea 0x273601(%rip),%rax # 2db618 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13a8>\n \tmov %rax,0x8(%rbx)\n void std::vector >::_M_realloc_append(ggml_backend_feature&&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:601\n \tmov %rbx,%rax\n \tadd $0x10,%rax\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:644\n-\tmov %rbx,0x36ade287(%rip) # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tmov %rbx,0x36adf287(%rip) # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:645\n-\tmov %rax,0x36ade288(%rip) # 36b462b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5880>\n+\tmov %rax,0x36adf288(%rip) # 36b472b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5880>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:646\n-\tmov %rax,0x36ade289(%rip) # 36b462c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n+\tmov %rax,0x36adf289(%rip) # 36b472c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n std::__new_allocator::allocate(unsigned long, void const*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/new_allocator.h:151\n \tmov $0x20,%edi\n \tcall 222c0 \n void std::vector >::_M_realloc_append(ggml_backend_feature&&):\n \tmov %rax,%r14\n void std::__new_allocator::construct(ggml_backend_feature*, ggml_backend_feature&&):\n@@ -62024,19 +62024,19 @@\n \tmov %rbx,%rdi\n \tcall 224d0 \n void std::vector >::_M_realloc_append(ggml_backend_feature&&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:601\n \tmov %r14,%rax\n \tadd $0x20,%rax\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:644\n-\tmov %r14,0x36ade239(%rip) # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tmov %r14,0x36adf239(%rip) # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:645\n-\tmov %rax,0x36ade23a(%rip) # 36b462b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5880>\n+\tmov %rax,0x36adf23a(%rip) # 36b472b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5880>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:646\n-\tmov %rax,0x36ade23b(%rip) # 36b462c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n+\tmov %rax,0x36adf23b(%rip) # 36b472c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n std::__new_allocator::allocate(unsigned long, void const*):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/new_allocator.h:151\n \tmov $0x40,%edi\n \tcall 222c0 \n void std::vector >::_M_realloc_append(ggml_backend_feature&&):\n \tmov %rax,%rbx\n void std::__new_allocator::construct(ggml_backend_feature*, ggml_backend_feature&&):\n@@ -62053,30 +62053,30 @@\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/new_allocator.h:172\n \tmov %r14,%rdi\n \tcall 224d0 \n void std::vector >::_M_realloc_append(ggml_backend_feature&&):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:601\n \tlea 0x30(%rbx),%rax\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:644\n-\tmov %rbx,0x36ade1f4(%rip) # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tmov %rbx,0x36adf1f4(%rip) # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:645\n-\tmov %rax,0x36ade1f5(%rip) # 36b462b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5880>\n+\tmov %rax,0x36adf1f5(%rip) # 36b472b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5880>\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/vector.tcc:646\n \tadd $0x40,%rbx\n-\tmov %rbx,0x36ade1f2(%rip) # 36b462c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n+\tmov %rbx,0x36adf1f2(%rip) # 36b472c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5888>\n ggml_backend_cuda_get_features(ggml_backend_reg*)::{lambda()#1}::operator()() const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:3578\n \tadd $0x8,%rsp\n \tpop %rbx\n \tpop %r14\n \tret\n \tmov %rax,%r14\n std::_Vector_base >::~_Vector_base():\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:375\n-\tmov 0x36ade1d0(%rip),%rbx # 36b462b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n+\tmov 0x36adf1d0(%rip),%rbx # 36b472b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5878>\n \tjmp 680ec \n \tmov %rax,%r14\n \tjmp 680f1 \n \tmov %rax,%r14\n \txor %ebx,%ebx\n std::_Vector_base >::_M_deallocate(ggml_backend_feature*, unsigned long):\n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:395\n@@ -62329,28 +62329,28 @@\n \tje 684db \n \tmov %rdx,%r12\n \tmov %rsi,%r13\n \tmov %rdi,%rbp\n \tmov 0x8(%rax),%r14\n \tmov 0x8(%rcx),%rbx\n \tmov (%rdi),%rdi\n-\tlea 0x36adcc32(%rip),%rsi # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n+\tlea 0x36addc32(%rip),%rsi # 36b46010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n \tcall 228a0 \n \tmov %eax,%ecx\n \txor %eax,%eax\n \ttest %r13,%r13\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2520\n \tje 684dd \n \ttest %cl,%cl\n \tje 684dd \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2954\n \tmov 0x0(%r13),%rdi\n ggml_backend_is_cuda():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2954\n-\tlea 0x36adcc0d(%rip),%rsi # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n+\tlea 0x36addc0d(%rip),%rsi # 36b46010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n \tcall 228a0 \n ggml_backend_cuda_cpy_tensor_async(ggml_backend*, ggml_backend*, ggml_tensor const*, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2520\n \ttest %al,%al\n \tje 684db \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2524\n \tmov 0x8(%r12),%rcx\n@@ -62594,15 +62594,15 @@\n \tmov %rsi,%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2827\n \tmov 0x78(%rdi),%r14\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2829\n \tmov (%r14),%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36add5c1(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ade5c1(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 69dc2 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2764\n \tcmpl $0x0,0x4(%r15)\n \tjle 69caf \n \tlea 0x80(%rsp),%r13\n \txor %ecx,%ecx\n@@ -62654,74 +62654,74 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2211\n \tmov 0xa0(%rbx),%rcx\n \tmov 0x18(%rcx),%r12d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1356\n \tcmp $0x81,%r12d\n \tsetl %bl\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1358\n-\tcmp %bl,0x36addac2(%rip) # 36b462d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5898>\n+\tcmp %bl,0x36adeac2(%rip) # 36b472d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5898>\n \tje 689d5 \n \tmov %r14,0x8(%rsp)\n \tmov (%r14),%ebp\n \txor %r14d,%r14d\n \tnop\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36add4e1(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ade4e1(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6884d \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1363\n-\tcmp 0x36add10e(%rip),%r14d # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36ade10e(%rip),%r14d # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 68870 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1364\n \tmov %r14d,%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1365\n \tcall 235c0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1363\n \tinc %r14d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1365\n \ttest %eax,%eax\n \tje 68820 \n \tjmp 69d3e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36add4b4(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ade4b4(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6882b \n \tcall 63a20 \n-\tlea 0x36add49f(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ade49f(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6882b \n \txor %r14d,%r14d\n \tjmp 68883 \n \tdata16 cs nopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1368\n \tinc %r14d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36add47e(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ade47e(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 68986 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1368\n-\tcmp 0x36add0a7(%rip),%r14d # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36ade0a7(%rip),%r14d # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 689b0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1369\n \tmov %r14d,%edi\n \tcall 22090 \n \txor %r13d,%r13d\n \tjmp 688c3 \n \tcall 227e0 \n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1371\n \tinc %r13d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36add43e(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ade43e(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6895c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1371\n-\tcmp 0x36add067(%rip),%r13d # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp 0x36ade067(%rip),%r13d # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjge 68880 \n \tcmp %ebp,%r14d\n \tsete %al\n \tcmp %r13d,%ebp\n \tsete %cl\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1372\n \tcmp %r13d,%r14d\n@@ -62758,35 +62758,35 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1392\n \ttest %eax,%eax\n \tje 688c0 \n \tcmp $0x2c1,%eax\n \tje 688ac \n \tjmp 69cec \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36add3a5(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ade3a5(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 688d2 \n \tcall 63a20 \n-\tlea 0x36add38c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ade38c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 688d2 \n-\tlea 0x36add37b(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ade37b(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 68892 \n \tcall 63a20 \n-\tlea 0x36add362(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ade362(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 68892 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1403\n \tmov %ebp,%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1406\n-\tmov %bl,0x36add913(%rip) # 36b462d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5898>\n+\tmov %bl,0x36ade913(%rip) # 36b472d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5898>\n \tmov 0xb0(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2214\n \tmov 0x50(%rax),%eax\n \tmov 0x8(%rsp),%r14\n \tlea 0x80(%rsp),%r13\n \tcmp $0x55,%eax\n \tmov 0xb0(%rsp),%rbp\n@@ -62968,27 +62968,27 @@\n \tmov 0x38(%rbp),%rax\n \tmov %rax,0x108(%rsp)\n \tmov 0x40(%rbp),%rax\n \tmov %rax,0x110(%rsp)\n \tmov 0x48(%rbp),%rax\n \tmov %rax,0x148(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36add081(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ade081(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 69c73 \n \tlea 0x428(%rsp),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tcall 23140 \n \ttest %eax,%eax\n \tjne 69ea7 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:97\n \tmovslq 0x428(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2076\n \timul $0x38,%rax,%rax\n-\tlea 0x36adcc89(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36addc89(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rax,%rcx,1),%r13d\n \tmov 0x30(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2078\n \tcmpl $0x0,(%rax)\n \tjne 68cd0 \n \tcmpl $0x0,0x0(%rbp)\n \tje 69b0a \n@@ -63362,15 +63362,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r14\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36adbdea(%rip),%rax \n+\tmov 0x36adcdea(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r14)\n \tmov %ebx,0x8(%r14)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r14,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -63454,15 +63454,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r14\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36adbcfb(%rip),%rax \n+\tmov 0x36adccfb(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r14)\n \tmov %ebx,0x8(%r14)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r14,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -63514,15 +63514,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r14\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36adbc4c(%rip),%rax \n+\tmov 0x36adcc4c(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r14)\n \tmov %ebx,0x8(%r14)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r14,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -64200,23 +64200,23 @@\n \tmov %r12,%rsi\n \tmov 0x30(%rsp),%rdx\n \tmov 0x10(%rsp),%rcx\n \tmov %rbp,%r8\n \tcall 223f0 \n \tjmp 68771 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adc08e(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36add08e(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 68c8f \n \tmov %r14,%rax\n \tmov %rbp,%r14\n \tmov %rax,%rbp\n \tcall 63a20 \n-\tlea 0x36adc06c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36add06c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tmov %rbp,%rax\n \tmov %r14,%rbp\n \tmov %rax,%r14\n \tjmp 68c8f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2904\n \txor %eax,%eax\n@@ -64284,20 +64284,20 @@\n \tmov $0x9ab,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /usr/bin/../lib/gcc/x86_64-linux-gnu/15/../../../../include/c++/15/bits/stl_vector.h:2200\n \tlea 0x278584(%rip),%rdi # 2e2341 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x80d1>\n \tcall 22480 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adbf3f(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adcf3f(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6874f \n \tcall 63a20 \n-\tlea 0x36adbf26(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adcf26(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6874f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2196\n \tmov %eax,%edi\n \tcall 22720 \n \tlea 0x273e58(%rip),%rdi # 2ddc52 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x39e2>\n \tlea 0x279cc8(%rip),%rsi # 2e3ac9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9859>\n@@ -64440,15 +64440,15 @@\n \tmov %rax,%r8\n \tcall 229a0 \n \tjmp 6a082 \n \tjmp 6a082 \n \tjmp 6a082 \n \tjmp 6a082 \n \tmov %rax,%rbx\n-\tlea 0x36adbc7c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adcc7c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:732\n \tmov %rax,%rdi\n \tcall 40230 ::~ggml_cuda_pool_alloc()@@Base+0x30>\n \tmov %rax,%rdi\n@@ -64638,15 +64638,15 @@\n \tpush %rax\n \tmov %rsi,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2954\n \tmov (%rdi),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2914\n \tmov 0x78(%rdi),%r14\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2954\n-\tlea 0x36adad4b(%rip),%rsi # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n+\tlea 0x36adbd4b(%rip),%rsi # 36b46010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45d8>\n \tmov %rax,%rdi\n \tcall 228a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2916\n \ttest %al,%al\n \tje 6a31e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:837\n \tmovslq (%r14),%rax\n@@ -64787,22 +64787,22 @@\n \txor %ebp,%ebp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x413a(%rip),%rax \n \tcmp %rax,%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2007\n \tje 6a4d7 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adb882(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adc882(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6f19c \n \tmov (%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2022\n \tmovslq (%rax),%rax\n \timul $0x38,%rax,%rax\n-\tlea 0x36adb4a0(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adc4a0(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rax,%rcx,1),%r14d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2023\n \ttest %bpl,%bpl\n \tje 6a6a9 \n \tmov 0x8(%rsp),%rax\n \tmov (%rax),%edi\n \tmov 0x18(%rsp),%rax\n@@ -64821,70 +64821,70 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2008\n \tmov 0x8(%rcx),%rax\n \tmov 0x48(%rax),%rax\n \tmov 0x38(%rax),%r15\n \tlea 0x10(%rcx),%rax\n \tmov %rax,0x80(%rsp)\n \txor %r13d,%r13d\n-\tlea 0x36adb438(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adc438(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \txor %r14d,%r14d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2010\n \timul $0x38,%r13,%rax\n \tlea (%rax,%rcx,1),%r12\n \tadd $0xffffffffffffffd0,%r12\n \tjmp 6a536 \n \tnopl 0x0(%rax)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2012\n \tadd $0x38,%r12\n \tinc %r13\n \tmovss 0x10(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n \tjb 6a5d0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adb7cb(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adc7cb(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6a586 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36adb3f8(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adc3f8(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2010\n \tcmp %rax,%r13\n \tjge 6a69d \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2012\n \tmovss 0x4(%r15,%r13,4),%xmm0\n \tmovss %xmm0,0x10(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adb7a3(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adc7a3(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6a5a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2012\n \tlea 0x1(%r13),%eax\n \tmovss 0x2a4223(%rip),%xmm0 # 30e798 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x34528>\n-\tcmp %eax,0x36adb3c5(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmp %eax,0x36adc3c5(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjle 6a520 \n \tmovss 0x8(%r15,%r13,4),%xmm0\n \tjmp 6a520 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adb77b(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adc77b(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6a541 \n \tcall 63a20 \n-\tlea 0x36adb766(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adc766(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6a541 \n-\tlea 0x36adb758(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adc758(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6a569 \n \tcall 63a20 \n-\tlea 0x36adb743(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adc743(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6a569 \n \tnopl 0x0(%rax)\n-\tmovzbl 0x36adb731(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adc731(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6a673 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2016\n \tmov (%r12),%r12d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2017\n \ttest $0x1,%bpl\n \tje 6a60c \n@@ -64925,23 +64925,23 @@\n \tor %al,%cl\n \tcmp $0x100220,%r12d\n \tsetl %al\n ggml_cuda_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2019\n \tand %cl,%al\n \tmov %eax,%r14d\n-\tlea 0x36adb2d2(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adc2d2(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjmp 6a50b \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36adb68e(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adc68e(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6a5df \n \tcall 63a20 \n-\tlea 0x36adb675(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adc675(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6a5df \n \tmov 0x20(%rsp),%r15\n \tmov 0x28(%rsp),%r12d\n \tjmp 6a6fa \n \txor %ebp,%ebp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2024\n@@ -64965,15 +64965,15 @@\n \tor %al,%cl\n \tcmp $0x100220,%r14d\n \tsetl %r14b\n ggml_cuda_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2025\n \tand %cl,%r14b\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adb607(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adc607(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6f0f7 \n \tlea 0x1f0(%rsp),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tcall 23140 \n \ttest %eax,%eax\n \tjne 6f121 \n@@ -64990,15 +64990,15 @@\n \ttest $0x1,%r14b\n \tsete %cl\n \tor %dl,%cl\n \tjmp 6a790 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2037\n \tmovslq 0x1f0(%rsp),%rcx\n \timul $0x38,%rcx,%rcx\n-\tlea 0x36adb1e8(%rip),%rdx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36adc1e8(%rip),%rdx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rcx,%rdx,1),%ecx\n bf16_mma_hardware_available(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:284\n \tlea -0x320(%rcx),%edx\n \tcmp $0xffce0,%edx\n \tsetb %dl\n \tlea -0x1000908(%rcx),%esi\n@@ -65494,44 +65494,44 @@\n \tmovaps %xmm0,0xb10(%rsp)\n \tmovaps %xmm0,0xb00(%rsp)\n \tmovaps %xmm0,0xaf0(%rsp)\n \tmovaps %xmm0,0xae0(%rsp)\n \tmov %r15,0x60(%rsp)\n \tcvtsi2ss %r15,%xmm0\n \tmovss %xmm0,0x10(%rsp)\n-\tlea 0x36ada88d(%rip),%r12 # 36b45948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n+\tlea 0x36adb88d(%rip),%r12 # 36b46948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n ggml_cuda_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tlea 0x280(%rsp),%r13\n \txor %ebp,%ebp\n-\tlea 0x36adac3c(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adbc3c(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tlea 0xb80(%rsp),%r14\n \tjmp 6b0fe \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1537\n \tmov %rcx,%rax\n \tcqto\n \tidiv %r15\n \tsub %rdx,%rcx\n \tmov %rcx,0x0(%r13)\n \tdata16 cs nopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tinc %rbp\n \tadd $0x98,%r13\n \tadd $0x38,%r12\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adac03(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adbc03(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6b208 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ada82c(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adb82c(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tcmp %rax,%rbp\n \tjge 6b26e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adabe4(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adbbe4(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6b22a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1516\n \tmov (%r12),%eax\n \tmov %eax,-0x90(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1519\n \tmovq $0x0,-0x8(%r13)\n@@ -65569,19 +65569,19 @@\n \tjmp 6b1a2 \n \tmov %ecx,%eax\n \txor %edx,%edx\n \tdiv %r15d\n \tsub %rdx,%rcx\n \tmov %rcx,-0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36adab58(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adbb58(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6b24c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmov 0x36ada782(%rip),%eax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36adb782(%rip),%eax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1534\n \tdec %eax\n \tcmp %rax,%rbp\n \tje 6b0f0 \n \tmovss 0xb84(%rsp,%rbp,4),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1535\n \tmulss 0x10(%rsp),%xmm0\n@@ -65638,15 +65638,15 @@\n \tadd $0xf8,%rax\n \tmov %rax,0xc8(%rsp)\n \txor %r12d,%r12d\n \tmov $0x4b8,%eax\n \tmov %rax,0x10(%rsp)\n \tmov $0x30,%eax\n \tmov %rax,0x20(%rsp)\n-\tmov 0x36ad9c7a(%rip),%rax \n+\tmov 0x36adac7a(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x50(%rsp)\n \tlea 0x277dfd(%rip),%rax # 2e30db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e6b>\n \tmov %rax,0x70(%rsp)\n \tlea 0x2763c4(%rip),%rax # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov %rax,0xe0(%rsp)\n \tmov 0xb8(%rsp),%rax\n@@ -65662,19 +65662,19 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tinc %rbp\n \tadd $0x98,%r12\n \taddq $0x8,0x28(%rsp)\n \taddq $0x8,0x10(%rsp)\n \taddq $0x40,0x20(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ada9bc(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adb9bc(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6b757 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ada5e5(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adb5e5(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tcmp %rax,%rbp\n \tjge 6b781 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x502b(%rip),%rax \n \tcmp %rax,0x30(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1544\n@@ -65979,20 +65979,20 @@\n \tmov (%rbx),%rax\n \tmov %rbx,%rdi\n \tmov %r15,%rsi\n \tcall *0x10(%rax)\n \tmov %rax,0x248(%rsp,%r12,1)\n \tjmp 6b31a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ada5aa(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adb5aa(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6b354 \n \tcall 63a20 \n-\tlea 0x36ada591(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adb591(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6b354 \n \tmov 0xb0(%rsp),%rcx\n \tmov %rcx,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x5453(%rip),%rax \n \tcmp %rax,0x30(%rsp)\n@@ -66151,19 +66151,19 @@\n \tmov %rax,0x20(%rsp)\n \tjmp 6ba9d \n \tnopl 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tincq 0x20(%rsp)\n \tmov 0x1b8(%rsp),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ada264(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adb264(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6c0e9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad9e8d(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36adae8d(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tcmp %rax,0x20(%rsp)\n \tjge 6b950 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x5785(%rip),%rax \n \tcmp %rax,0x30(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1619\n@@ -66537,33 +66537,33 @@\n \tmov (%rax),%rdi\n \tmov 0x38(%rsp),%rsi\n \tcall 23290 \n \ttest %eax,%eax\n \tje 6bcd2 \n \tjmp 6eefb \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad9c18(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adac18(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6baac \n \tcall 63a20 \n-\tlea 0x36ad9bff(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adabff(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6baac \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x5dda(%rip),%rax \n \tcmp %rax,0x30(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n \tjne 6c26c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad9bdc(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adabdc(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6f51c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n-\tcmpl $0x2,0x36ad9805(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmpl $0x2,0x36ada805(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjl 6c26c \n \tmov $0x8,%r15d\n \tmov 0xb0(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1737\n \tcmp $0x400,%rax\n \tjg 6c16a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1736\n@@ -66575,25 +66575,25 @@\n \tmov (%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1739\n \tmov (%rax),%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tsubq $0xffffffffffffff80,0xb8(%rsp)\n \txor %r12d,%r12d\n-\tlea 0x36ad9b80(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36adab80(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tjmp 6c19c \n \tnopw 0x0(%rax,%rax,1)\n \tinc %r12\n \taddq $0x40,0xb8(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad9b65(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36adab65(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6c24a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad978e(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ada78e(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tcmp %rax,%r12\n \tjge 6c26c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1741\n \timul $0x98,%r12,%rax\n \tmov 0x278(%rsp,%rax,1),%rcx\n \tcmp 0x280(%rsp,%rax,1),%rcx\n@@ -67459,44 +67459,44 @@\n \tmovaps %xmm0,0xb20(%rsp)\n \tmovaps %xmm0,0xb10(%rsp)\n \tmovaps %xmm0,0xb00(%rsp)\n \tmovaps %xmm0,0xaf0(%rsp)\n \tmovaps %xmm0,0xae0(%rsp)\n \tcvtsi2ssq 0x98(%rsp),%xmm0\n \tmovss %xmm0,0x10(%rsp)\n-\tlea 0x36ad884b(%rip),%r15 # 36b45948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n+\tlea 0x36ad984b(%rip),%r15 # 36b46948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n ggml_cuda_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tlea 0x280(%rsp),%r13\n \txor %ebp,%ebp\n-\tlea 0x36ad8bfa(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad9bfa(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tlea 0xb80(%rsp),%r14\n \tjmp 6d13e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1537\n \tmov %rcx,%rax\n \tcqto\n \tidiv %r12\n \tsub %rdx,%rcx\n \tmov %rcx,0x0(%r13)\n \tnopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tinc %rbp\n \tadd $0x98,%r13\n \tadd $0x38,%r15\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad8bc3(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad9bc3(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6d250 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad87ec(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad97ec(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tcmp %rax,%rbp\n \tjge 6d2b6 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad8ba4(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad9ba4(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6d272 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1516\n \tmov (%r15),%eax\n \tmov %eax,-0x90(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1519\n \tmovq $0x0,-0x8(%r13)\n@@ -67534,19 +67534,19 @@\n \tjmp 6d1e7 \n \tmov %ecx,%eax\n \txor %edx,%edx\n \tdiv %r12d\n \tsub %rdx,%rcx\n \tmov %rcx,-0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad8b13(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad9b13(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6d294 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmov 0x36ad873d(%rip),%eax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36ad973d(%rip),%eax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1534\n \tdec %eax\n \tcmp %rax,%rbp\n \tje 6d130 \n \tmovss 0xb84(%rsp,%rbp,4),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1535\n \tmulss 0x10(%rsp),%xmm0\n@@ -67614,15 +67614,15 @@\n \tshrq $0x2,0xc8(%rsp)\n \tshrq $0x2,0x78(%rsp)\n \tmov (%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tadd $0x30,%rax\n \tmov %rax,0x10(%rsp)\n \txor %ebx,%ebx\n-\tmov 0x36ad7bf2(%rip),%rax \n+\tmov 0x36ad8bf2(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x50(%rsp)\n \tlea 0x275d75(%rip),%rax # 2e30db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e6b>\n \tmov %rax,0x110(%rsp)\n \tlea 0x274339(%rip),%rax # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov %rax,0x138(%rsp)\n \tmov 0x60(%rsp),%rax\n@@ -67637,19 +67637,19 @@\n \tmov %rax,0x270(%rsp,%rbx,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tinc %r12\n \tadd $0x98,%rbx\n \taddq $0x8,0x20(%rsp)\n \taddq $0x40,0x10(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad893f(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad993f(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6d8b1 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad8568(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad9568(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tcmp %rax,%r12\n \tjge 6d8db \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x70a8(%rip),%rax \n \tcmp %rax,0x40(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1544\n@@ -68015,20 +68015,20 @@\n \tmov (%r14),%rax\n \tmov %r14,%rdi\n \tmov %r13,%rsi\n \tcall *0x10(%rax)\n \tmov %rax,0x248(%rsp,%rbx,1)\n \tjmp 6d3a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad8450(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad9450(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6d3d1 \n \tcall 63a20 \n-\tlea 0x36ad8437(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad9437(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6d3d1 \n \tmov 0xf0(%rsp),%rcx\n \tmov %rcx,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x75ad(%rip),%rax \n \tcmp %rax,0x40(%rsp)\n@@ -68189,19 +68189,19 @@\n \tjmp 6dbe5 \n \tdata16 cs nopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tincq 0x10(%rsp)\n \tmov 0x180(%rsp),%rbx\n \tmov 0x130(%rsp),%r14\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad811c(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad911c(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6e2a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad7d45(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad8d45(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tcmp %rax,0x10(%rsp)\n \tjge 6da90 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x78cd(%rip),%rax \n \tcmp %rax,0x40(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1619\n@@ -68598,34 +68598,34 @@\n \tmov (%rax),%rdi\n \tmov 0x28(%rsp),%rsi\n \tcall 23290 \n \ttest %eax,%eax\n \tje 6de17 \n \tjmp 6efe1 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad7a61(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad8a61(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6dbf4 \n \tcall 63a20 \n-\tlea 0x36ad7a48(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad8a48(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tmov 0x130(%rsp),%r14\n \tjmp 6dbf4 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x7f99(%rip),%rax \n \tcmp %rax,0x40(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n \tjne 6e419 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad7a1d(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad8a1d(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6f5d9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n-\tcmpl $0x2,0x36ad7646(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmpl $0x2,0x36ad8646(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tjl 6e419 \n \tmov $0x8,%r15d\n \tmov 0xf0(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1737\n \tcmp $0x400,%rax\n \tjg 6e329 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1736\n@@ -68637,24 +68637,24 @@\n \tmov (%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1739\n \tmov (%rax),%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tsubq $0xffffffffffffff80,0x60(%rsp)\n \txor %r12d,%r12d\n-\tlea 0x36ad79c4(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad89c4(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tjmp 6e34f \n \tinc %r12\n \taddq $0x40,0x60(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad79b2(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad89b2(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 6e3f7 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad75db(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad85db(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tcmp %rax,%r12\n \tjge 6e419 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1741\n \timul $0x98,%r12,%rax\n \tmov 0x278(%rsp,%rax,1),%rcx\n \tcmp 0x280(%rsp,%rax,1),%rcx\n@@ -69517,20 +69517,20 @@\n \tlea 0x26bfe8(%rip),%rdi # 2db0c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe54>\n \tlea 0x26c01a(%rip),%rsi # 2db0fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe8d>\n \tlea 0x27371f(%rip),%rdx # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n \tmov $0x33f,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad6c0a(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad7c0a(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6a709 \n \tcall 63a20 \n-\tlea 0x36ad6bf1(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad7bf1(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6a709 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tmov %eax,%edi\n \tcall 22720 \n \tlea 0x272623(%rip),%rdi # 2e1752 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74e2>\n \tlea 0x27262e(%rip),%rsi # 2e1764 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74f4>\n@@ -69554,20 +69554,20 @@\n \tlea 0x274018(%rip),%rdi # 2e3199 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8f29>\n \tlea 0x273f3e(%rip),%rsi # 2e30c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e56>\n \tlea 0x27251f(%rip),%rdx # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov $0x660,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad6b65(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad7b65(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6a48e \n \tcall 63a20 \n-\tlea 0x36ad6b4c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad7b4c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6a48e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:739\n \tlea 0x27363c(%rip),%rdi # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n \tlea 0x26be77(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x26f06b(%rip),%rcx # 2de246 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3fd6>\n \tmov $0x2e3,%esi\n@@ -69733,20 +69733,20 @@\n \tlea 0x273c0f(%rip),%rdi # 2e3110 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8ea0>\n \tlea 0x273bbe(%rip),%rsi # 2e30c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e56>\n \tlea 0x27219f(%rip),%rdx # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov $0x625,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad67e5(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad77e5(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6c134 \n \tcall 63a20 \n-\tlea 0x36ad67cc(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad77cc(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6c134 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1610\n \tmov %eax,%edi\n \tcall 22720 \n \tmov $0x64a,%ecx\n \tlea 0x272155(%rip),%rdx # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n@@ -69774,20 +69774,20 @@\n \tlea 0x273246(%rip),%rdx # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n \tlea 0x26bb33(%rip),%rsi # 2db0fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe8d>\n \tlea 0x26baf3(%rip),%rdi # 2db0c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe54>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1610\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad6728(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad7728(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 6e2f3 \n \tcall 63a20 \n-\tlea 0x36ad670f(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad770f(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 6e2f3 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:831\n \tmov %eax,%edi\n \tcall 22720 \n \tmov $0x33f,%ecx\n \tlea 0x2731f3(%rip),%rdx # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n@@ -69809,21 +69809,21 @@\n \tjmp 6f665 \n \tjmp 6f665 \n \tjmp 6f665 \n \tjmp 6f665 \n \tjmp 6f64c \n \tjmp 6f64c \n \tmov %rax,%rbx\n-\tlea 0x36ad66b2(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad76b2(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n \tjmp 6f665 \n \tmov %rax,%rbx\n-\tlea 0x36ad6699(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad7699(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 6fb83 \n \tjmp 6fb80 \n \tjmp 6fb80 \n \tjmp 6fb80 \n \tjmp 6fb80 \n \tjmp 6fb80 \n@@ -70687,15 +70687,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad4c6c(%rip),%rax \n+\tmov 0x36ad5c6c(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x0(%r13)\n \tmov %ebx,0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n \tmov $0x1008,%edx\n@@ -70798,15 +70798,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad4b22(%rip),%rax \n+\tmov 0x36ad5b22(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x0(%r13)\n \tmov %ebx,0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r13,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -70830,20 +70830,20 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1874\n \tmov 0x40(%rax),%rcx\n \tmov %rcx,0x120(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1875\n \tmov 0x48(%rax),%rax\n \tmov %rax,0x128(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1813\n-\tmov 0x36ad4b5a(%rip),%rax # 36b44fe8 ::get_alpha()::val@@Base-0x1320>\n+\tmov 0x36ad5b5a(%rip),%rax # 36b45fe8 ::get_alpha()::val@@Base-0x1320>\n \tmovzbl (%rax),%eax\n \ttest %al,%al\n \tje 72629 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1814\n-\tmov 0x36ad4ae0(%rip),%rax # 36b44f80 ::get_beta()::val@@Base-0x1398>\n+\tmov 0x36ad5ae0(%rip),%rax # 36b45f80 ::get_beta()::val@@Base-0x1398>\n \tmovzbl (%rax),%eax\n \ttest %al,%al\n \tmov 0x20(%rsp),%r13\n \tje 72662 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1883\n \tmovl $0x3f800000,0x54(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1884\n@@ -70912,15 +70912,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad49c1(%rip),%rax \n+\tmov 0x36ad59c1(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x0(%r13)\n \tmov %ebx,0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n \tmov $0x1008,%edx\n@@ -71018,15 +71018,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad4888(%rip),%rax \n+\tmov 0x36ad5888(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x0(%r13)\n \tmov %ebx,0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r13,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -71059,35 +71059,35 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1883\n \tmovl $0x3f800000,0x54(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1884\n \tmovl $0x0,0x50(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1886\n \tcmpl $0x0,0x54(%rax)\n \tlea 0x50(%rsp),%rbx\n-\tmov 0x36ad480b(%rip),%rax # 36b44f58 ::get_beta()::val@@Base+0x36835c48>\n+\tmov 0x36ad580b(%rip),%rax # 36b45f58 ::get_beta()::val@@Base+0x36836c48>\n \tcmovne %rbx,%rax\n \tmov %rax,0x30(%rsp)\n \tlea 0x54(%rsp),%r13\n-\tmov 0x36ad4856(%rip),%rbp # 36b44fb8 ::get_alpha()::val@@Base+0x36835cac>\n+\tmov 0x36ad5856(%rip),%rbp # 36b45fb8 ::get_alpha()::val@@Base+0x36836cac>\n \tcmovne %r13,%rbp\n \tlea 0x230(%rsp),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tcall 23140 \n \tmov %rbp,0x48(%rsp)\n \ttest %eax,%eax\n \tjne 726c4 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:97\n \tmovslq 0x230(%rsp),%rbp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad5579(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad6579(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 72766 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1903\n \timul $0x38,%rbp,%rax\n-\tlea 0x36ad519e(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36ad619e(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rax,%rcx,1),%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1904\n \tlea -0x1000908(%rax),%ecx\n \tcmp $0x708,%ecx\n \tsetb %cl\n \tcmp $0x1001200,%eax\n \tsetge %al\n@@ -71158,15 +71158,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad46cc(%rip),%rax \n+\tmov 0x36ad56cc(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x0(%r13)\n \tmov %ebx,0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n \tmov $0x1008,%edx\n@@ -71269,15 +71269,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r13\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad4582(%rip),%rax \n+\tmov 0x36ad5582(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x0(%r13)\n \tmov %ebx,0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r13,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -71339,32 +71339,32 @@\n \tmov %rax,0x108(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1891\n \tshrq $1,0x120(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1892\n \tshrq $1,0x128(%rsp)\n \tmov $0x96,%eax\n \tmov %rax,0x38(%rsp)\n-\tmov 0x36ad442e(%rip),%rax # 36b44f18 ::get_alpha()::val@@Base-0x13e8>\n+\tmov 0x36ad542e(%rip),%rax # 36b45f18 ::get_alpha()::val@@Base-0x13e8>\n \tmov %rax,0x10(%rsp)\n-\tmov 0x36ad44b2(%rip),%rax # 36b44fa8 ::get_beta()::val@@Base-0x1368>\n+\tmov 0x36ad54b2(%rip),%rax # 36b45fa8 ::get_beta()::val@@Base-0x1368>\n \tmov %rax,0x40(%rsp)\n \tlea 0x230(%rsp),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tcall 23140 \n \ttest %eax,%eax\n \tjne 726ed \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:97\n \tmovslq 0x230(%rsp),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad51e9(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad61e9(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 7279e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1903\n \timul $0x38,%rbx,%rax\n-\tlea 0x36ad4e0e(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36ad5e0e(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rax,%rcx,1),%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1904\n \tlea -0x1000908(%rax),%ecx\n \tcmp $0x708,%ecx\n \tsetb %cl\n \tcmp $0x1001200,%eax\n \tsetge %al\n@@ -71403,33 +71403,33 @@\n ggml_cuda_mul_mat_batched_cublas(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1891\n \tshrq $1,0x128(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1892\n \tshrq $1,0x130(%rsp)\n \tmov $0xa8,%eax\n \tmov %rax,0x90(%rsp)\n-\tmov 0x36ad4363(%rip),%rax # 36b44f60 ::get_alpha()::val@@Base+0x36835c4c>\n+\tmov 0x36ad5363(%rip),%rax # 36b45f60 ::get_alpha()::val@@Base+0x36836c4c>\n \tmov %rax,0x10(%rsp)\n-\tmov 0x36ad4347(%rip),%rax # 36b44f50 ::get_beta()::val@@Base+0x36835c38>\n+\tmov 0x36ad5347(%rip),%rax # 36b45f50 ::get_beta()::val@@Base+0x36836c38>\n \tmov %rax,0x40(%rsp)\n \tmov 0x20(%rsp),%r13\n \tlea 0x230(%rsp),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tcall 23140 \n \ttest %eax,%eax\n \tjne 7269b \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:97\n \tmovslq 0x230(%rsp),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad50d1(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad60d1(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 72716 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1903\n \timul $0x38,%rbx,%rax\n-\tlea 0x36ad4cf6(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36ad5cf6(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rax,%rcx,1),%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1904\n \tlea -0x1000908(%rax),%ecx\n \tcmp $0x708,%ecx\n \tsetb %cl\n \tcmp $0x1001200,%eax\n \tsetge %al\n@@ -71533,15 +71533,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r12\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad41a5(%rip),%rax \n+\tmov 0x36ad51a5(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r12)\n \tmov %ebx,0x8(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r12,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -71588,15 +71588,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r12\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad4117(%rip),%rax \n+\tmov 0x36ad5117(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r12)\n \tmov %ebx,0x8(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r12,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -71722,15 +71722,15 @@\n \tlea 0x178(%rsp),%rdx\n \tlea 0x170(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x190(%rsp),%rsi\n \tmov 0x198(%rsp),%edx\n \tmov 0x180(%rsp),%rcx\n \tmov 0x188(%rsp),%r8d\n-\tlea 0x36ace979(%rip),%rdi \n+\tlea 0x36acf979(%rip),%rdi \n \tlea 0x230(%rsp),%r9\n \tpush 0x170(%rsp)\n \tpush 0x180(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1950\n \tcall 227e0 \n@@ -71870,15 +71870,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r12\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad3c66(%rip),%rax \n+\tmov 0x36ad4c66(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r12)\n \tmov %ebx,0x8(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r12,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -71925,15 +71925,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r12\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad3bd8(%rip),%rax \n+\tmov 0x36ad4bd8(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r12)\n \tmov %ebx,0x8(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r12,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -72059,15 +72059,15 @@\n \tlea 0x178(%rsp),%rdx\n \tlea 0x170(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x190(%rsp),%rsi\n \tmov 0x198(%rsp),%edx\n \tmov 0x180(%rsp),%rcx\n \tmov 0x188(%rsp),%r8d\n-\tlea 0x36ace43a(%rip),%rdi \n+\tlea 0x36acf43a(%rip),%rdi \n \tlea 0x230(%rsp),%r9\n \tpush 0x170(%rsp)\n \tpush 0x180(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1950\n \tcall 227e0 \n@@ -72183,15 +72183,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r12\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad378b(%rip),%rax \n+\tmov 0x36ad478b(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r12)\n \tmov %r13d,0x8(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r12,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -72238,15 +72238,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r12\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad36fd(%rip),%rax \n+\tmov 0x36ad46fd(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r12)\n \tmov %ebx,0x8(%r12)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r12,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -72373,15 +72373,15 @@\n \tlea 0x178(%rsp),%rdx\n \tlea 0x170(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x190(%rsp),%rsi\n \tmov 0x198(%rsp),%edx\n \tmov 0x180(%rsp),%rcx\n \tmov 0x188(%rsp),%r8d\n-\tlea 0x36acdf5b(%rip),%rdi \n+\tlea 0x36acef5b(%rip),%rdi \n \tlea 0x230(%rsp),%r9\n \tpush 0x170(%rsp)\n \tpush 0x180(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1950\n \tcall 227e0 \n@@ -73043,35 +73043,35 @@\n \tlea 0x26f09f(%rip),%rdi # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tlea 0x268a35(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x2706db(%rip),%rcx # 2e2cf8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8a88>\n \tmov $0x730,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1813\n-\tmov 0x36ad29b8(%rip),%rdi # 36b44fe8 ::get_alpha()::val@@Base-0x1320>\n+\tmov 0x36ad39b8(%rip),%rdi # 36b45fe8 ::get_alpha()::val@@Base-0x1320>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 70499 \n-\tmov 0x36ad29ac(%rip),%rax # 36b44ff0 ::alpha@@Base-0x12f0>\n+\tmov 0x36ad39ac(%rip),%rax # 36b45ff0 ::alpha@@Base-0x12f0>\n \tmovzwl (%rax),%eax\n-\tmov 0x36ad28ca(%rip),%rcx # 36b44f18 ::get_alpha()::val@@Base-0x13e8>\n+\tmov 0x36ad38ca(%rip),%rcx # 36b45f18 ::get_alpha()::val@@Base-0x13e8>\n \tmov %ax,(%rcx)\n-\tmov 0x36ad2990(%rip),%rdi # 36b44fe8 ::get_alpha()::val@@Base-0x1320>\n+\tmov 0x36ad3990(%rip),%rdi # 36b45fe8 ::get_alpha()::val@@Base-0x1320>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 70499 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1814\n-\tmov 0x36ad2917(%rip),%rdi # 36b44f80 ::get_beta()::val@@Base-0x1398>\n+\tmov 0x36ad3917(%rip),%rdi # 36b45f80 ::get_beta()::val@@Base-0x1398>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 704b0 \n-\tmov 0x36ad2923(%rip),%rax # 36b44fa0 ::beta@@Base-0x1350>\n+\tmov 0x36ad3923(%rip),%rax # 36b45fa0 ::beta@@Base-0x1350>\n \tmovzwl (%rax),%eax\n-\tmov 0x36ad2921(%rip),%rcx # 36b44fa8 ::get_beta()::val@@Base-0x1368>\n+\tmov 0x36ad3921(%rip),%rcx # 36b45fa8 ::get_beta()::val@@Base-0x1368>\n \tmov %ax,(%rcx)\n-\tmov 0x36ad28ef(%rip),%rdi # 36b44f80 ::get_beta()::val@@Base-0x1398>\n+\tmov 0x36ad38ef(%rip),%rdi # 36b45f80 ::get_beta()::val@@Base-0x1398>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 704b0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:96\n \tmov %eax,%edi\n \tcall 22720 \n \tlea 0x26f0a9(%rip),%rdi # 2e1752 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74e2>\n \tlea 0x26f0b4(%rip),%rsi # 2e1764 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74f4>\n@@ -73092,46 +73092,46 @@\n \tlea 0x26f057(%rip),%rdi # 2e1752 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74e2>\n \tlea 0x26f062(%rip),%rsi # 2e1764 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74f4>\n \tlea 0x26efa5(%rip),%rdx # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov $0x60,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad35eb(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad45eb(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 70c3f \n \tcall 63a20 \n-\tlea 0x36ad35d2(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad45d2(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tmov 0x20(%rsp),%r13\n \tjmp 70c3f \n \tlea 0x2705d4(%rip),%rcx # 2e2d20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8ab0>\n \tmov $0x776,%esi\n \tlea 0x26ef56(%rip),%rdi # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tlea 0x2688ec(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \txor %eax,%eax\n \tcall 22ac0 \n-\tlea 0x36ad359b(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad459b(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 70797 \n \tcall 63a20 \n-\tlea 0x36ad3582(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad4582(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 70797 \n \tlea 0x270589(%rip),%rcx # 2e2d20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8ab0>\n \tmov $0x776,%esi\n \tjmp 727fa \n-\tlea 0x36ad3563(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad4563(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 70b27 \n \tcall 63a20 \n-\tlea 0x36ad354a(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad454a(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tmov 0x20(%rsp),%r13\n \tjmp 70b27 \n \tlea 0x27054c(%rip),%rcx # 2e2d20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8ab0>\n \tmov $0x776,%esi\n \tlea 0x26eece(%rip),%rdi # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tlea 0x268864(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n@@ -73329,23 +73329,23 @@\n \tjmp 72ba2 \n \tlea 0x26f195(%rip),%r8 # 2e1d2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7abe>\n \tjmp 72ba2 \n \tlea 0x26f1a8(%rip),%r8 # 2e1d4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x7ada>\n \tcall 229a0 \n \tmov %rax,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad3157(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad4157(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 72d34 \n \tmov %rax,%rbx\n-\tlea 0x36ad3143(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad4143(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 72d7d \n \tmov %rax,%rbx\n-\tlea 0x36ad312f(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad412f(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 72dc6 \n \tmov %rax,%rbx\n \tjmp 72dd3 \n \tmov %rax,%rbx\n \tjmp 72d41 \n \tjmp 72d12 \n@@ -73521,24 +73521,24 @@\n \tmov 0x10(%rsp),%rcx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1226\n \tcmp (%rcx),%ebx\n \tmov %rax,0x30(%rsp)\n \tcmovne %rax,%r12\n \tmov %r12,0x88(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad2e5a(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad3e5a(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 73c0a \n \tmov %ebx,(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1228\n \tmovslq %ebx,%rcx\n \tmov %rcx,%rax\n \tmov %rcx,0x8(%rsp)\n \timul $0x38,%rcx,%rax\n-\tlea 0x36ad2a71(%rip),%rcx # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tlea 0x36ad3a71(%rip),%rcx # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x8(%rax,%rcx,1),%r12d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1230\n \tlea -0x100220(%r12),%ebp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1233\n \tmov (%r14),%edi\n \tcmp $0x1,%edi\n \tje 72eed \n@@ -73589,15 +73589,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad1fc7(%rip),%rax \n+\tmov 0x36ad2fc7(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov %ebp,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r15),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n \tmov $0x1008,%edx\n@@ -73667,15 +73667,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad1ed8(%rip),%rax \n+\tmov 0x36ad2ed8(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov %ebp,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r15,%rdi\n \tadd $0x10,%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -73842,15 +73842,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad1cbd(%rip),%rax \n+\tmov 0x36ad2cbd(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov (%rsp),%eax\n \tmov %eax,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r15),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -73917,15 +73917,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad1be3(%rip),%rax \n+\tmov 0x36ad2be3(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov (%rsp),%eax\n \tmov %eax,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r15,%rdi\n \tadd $0x10,%rdi\n@@ -74025,15 +74025,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad1a91(%rip),%rax \n+\tmov 0x36ad2a91(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov (%rsp),%eax\n \tmov %eax,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tmov %r15,%rdi\n \tadd $0x10,%rdi\n@@ -74156,15 +74156,15 @@\n ggml_backend_cuda_context::new_pool_for_device(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:514\n \tmov $0x1018,%edi\n \tcall 222c0 \n \tmov %rax,%r15\n ggml_cuda_pool_leg::ggml_cuda_pool_leg(int):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:314\n-\tmov 0x36ad18ff(%rip),%rax \n+\tmov 0x36ad28ff(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%r15)\n \tmov (%rsp),%eax\n \tmov %eax,0x8(%r15)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:310\n \tlea 0x10(%r15),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:311\n@@ -74552,20 +74552,20 @@\n \tlea 0x26db63(%rip),%rdi # 2e1752 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74e2>\n \tlea 0x26db6e(%rip),%rsi # 2e1764 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x74f4>\n \tlea 0x26dab1(%rip),%rdx # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov $0x60,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad20f7(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad30f7(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 72eb6 \n \tcall 63a20 \n-\tlea 0x36ad20de(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad30de(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 72eb6 \n \tmov $0x34b,%ecx\n \tlea 0x26ebc9(%rip),%rdx # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n \tlea 0x26f388(%rip),%rsi # 2e2fcf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8d5f>\n \tlea 0x26f35a(%rip),%rdi # 2e2fa8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8d38>\n \tdec %eax\n@@ -74827,15 +74827,15 @@\n \tmov $0x2e3,%esi\n \tlea 0x26e6fe(%rip),%rdi # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n \tlea 0x266f39(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \txor %eax,%eax\n \tcall 22ac0 \n \tmov %rax,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad1be5(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad2be5(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tmov %rbx,%rdi\n \tcall 236a0 <_Unwind_Resume@plt>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:732\n \tmov %rax,%rdi\n \tcall 40230 ::~ggml_cuda_pool_alloc()@@Base+0x30>\n \tmov %rax,%rdi\n@@ -74947,15 +74947,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36acb740(%rip),%rdi \n+\tlea 0x36acc740(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -75165,41 +75165,41 @@\n \tmov %rax,%rdi\n \tcall 40230 ::~ggml_cuda_pool_alloc()@@Base+0x30>\n \tmov %rax,%rdi\n \tcall 40230 ::~ggml_cuda_pool_alloc()@@Base+0x30>\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36ad1d0d(%rip),%rdi # 36b462d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n+\tmov 0x36ad2d0d(%rip),%rdi # 36b472d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n \ttest %rdi,%rdi\n \tjne 745e6 \n-\tlea 0x36ad0c11(%rip),%rdi # 36b451e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47b0>\n+\tlea 0x36ad1c11(%rip),%rdi # 36b461e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47b0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36ad1cf2(%rip) # 36b462d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n+\tmov %rax,0x36ad2cf2(%rip) # 36b472d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36acb48f(%rip),%rsi \n+\tlea 0x36acc48f(%rip),%rsi \n \tlea 0x26f6a3(%rip),%rcx # 2e3ca3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9a33>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36ad1ca1(%rip),%rdi # 36b462d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n+\tmov 0x36ad2ca1(%rip),%rdi # 36b472d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n \ttest %rdi,%rdi\n \tje 74651 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36ad1c8b(%rip) # 36b462d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n+\tmovq $0x0,0x36ad2c8b(%rip) # 36b472d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58a0>\n \tadd $0x8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n ggml_cuda_op_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*, void (*)(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*, char const*, float const*, char const*, float*, long, long, long, long, ihipStream_t*), void (*)(float const*, int const*, void*, ggml_type, long, long, long, long, long, long, long, long, ihipStream_t*)):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1434\n \tpush %rbp\n \tpush %r15\n@@ -75517,15 +75517,15 @@\n \tmovaps %xmm0,0xb70(%rsp)\n \tmovaps %xmm0,0xb60(%rsp)\n \tmovaps %xmm0,0xb50(%rsp)\n \tmovaps %xmm0,0xb40(%rsp)\n \tmovaps %xmm0,0xb30(%rsp)\n \tcvtsi2ssq 0x58(%rsp),%xmm0\n \tmovss %xmm0,0x28(%rsp)\n-\tlea 0x36ad0c0b(%rip),%r13 # 36b45948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n+\tlea 0x36ad1c0b(%rip),%r13 # 36b46948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n ggml_cuda_op_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*, void (*)(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*, char const*, float const*, char const*, float*, long, long, long, long, ihipStream_t*), void (*)(float const*, int const*, void*, ggml_type, long, long, long, long, long, long, long, long, ihipStream_t*)):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tlea 0x2d0(%rsp),%rbp\n \txor %ebx,%ebx\n \tlea 0x200(%rsp),%r14\n \tjmp 74d6e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1537\n@@ -75535,24 +75535,24 @@\n \tsub %rdx,%rcx\n \tmov %rcx,0x0(%rbp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tinc %rbx\n \tadd $0x98,%rbp\n \tadd $0x38,%r13\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad0f93(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad1f93(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 74e77 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad0bbc(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad1bbc(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tcmp %rax,%rbx\n \tjge 74ef5 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad0f74(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad1f74(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 74ea1 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1516\n \tmov 0x0(%r13),%eax\n \tmov %eax,-0x90(%rbp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1519\n \tmovq $0x0,-0x8(%rbp)\n@@ -75590,19 +75590,19 @@\n \tjmp 74e11 \n \tmov %ecx,%eax\n \txor %edx,%edx\n \tdiv %r15d\n \tsub %rdx,%rcx\n \tmov %rcx,-0x8(%rbp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad0ee9(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad1ee9(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 74ecb \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmov 0x36ad0b13(%rip),%eax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36ad1b13(%rip),%eax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1534\n \tdec %eax\n \tcmp %rax,%rbx\n \tje 74d60 \n \tmovss 0x204(%rsp,%rbx,4),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1535\n \tmulss 0x28(%rsp),%xmm0\n@@ -75617,36 +75617,36 @@\n \tshr $0x20,%rax\n \tjne 74d51 \n \tmov %ecx,%eax\n \txor %edx,%edx\n \tdiv %r15d\n \tjmp 74d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad0e8a(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad1e8a(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 74d7d \n \tcall 63a20 \n-\tlea 0x36ad0e71(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad1e71(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 74d7d \n-\tlea 0x36ad0e60(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad1e60(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 74d9c \n \tcall 63a20 \n-\tlea 0x36ad0e47(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad1e47(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 74d9c \n-\tlea 0x36ad0e36(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad1e36(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 74e27 \n \tcall 63a20 \n-\tlea 0x36ad0e1d(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad1e1d(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 74e27 \n \tmov 0x80(%rsp),%rcx\n \tlea 0x1ff(%rcx),%rax\n \ttest %rcx,%rcx\n \tcmovns %rcx,%rax\n \tand $0xfffffffffffffe00,%rax\n@@ -75667,15 +75667,15 @@\n \tshrq $0x2,0xc0(%rsp)\n \tshrq $0x2,0x88(%rsp)\n \tmov 0x8(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tadd $0x30,%rax\n \tmov %rax,0x28(%rsp)\n \txor %r12d,%r12d\n-\tmov 0x36acffbc(%rip),%rax \n+\tmov 0x36ad0fbc(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0x50(%rsp)\n \tlea 0x26e13f(%rip),%rax # 2e30db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e6b>\n \tmov %rax,0xa0(%rsp)\n \tlea 0x26c703(%rip),%rax # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov %rax,0xf0(%rsp)\n \tmov 0x48(%rsp),%rax\n@@ -75690,19 +75690,19 @@\n \tmov %rax,0x2c0(%rsp,%r12,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tinc %r13\n \tadd $0x98,%r12\n \taddq $0x40,0x28(%rsp)\n \taddq $0x8,0x38(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad0d00(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad1d00(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 7551f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad0929(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad1929(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tcmp %rax,%r13\n \tjge 75549 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0xece7(%rip),%rax \n \tcmp %rax,0x18(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1544\n@@ -76079,20 +76079,20 @@\n \tmov (%r14),%rax\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tcall *0x10(%rax)\n \tmov %rax,0x298(%rsp,%r12,1)\n \tjmp 74fdc \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ad07e2(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad17e2(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 75010 \n \tcall 63a20 \n-\tlea 0x36ad07c9(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad17c9(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 75010 \n \tmov 0x40(%rsp),%rcx\n \tmov %rcx,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0xf218(%rip),%rax \n \tcmp %rax,0x18(%rsp)\n@@ -76263,19 +76263,19 @@\n \tmov %rax,0x10(%rsp)\n \tjmp 7586d \n \tnop\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tincq 0x10(%rsp)\n \tmov 0x198(%rsp),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ad0494(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad1494(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 75f2f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ad00bd(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad10bd(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tcmp %rax,0x10(%rsp)\n \tjge 75720 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0xf555(%rip),%rax \n \tcmp %rax,0x18(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1619\n@@ -76682,33 +76682,33 @@\n \tmov (%rax),%rdi\n \tmov 0x38(%rsp),%rsi\n \tcall 23290 \n \ttest %eax,%eax\n \tje 75a92 \n \tjmp 76308 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36acfdd2(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad0dd2(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 7587c \n \tcall 63a20 \n-\tlea 0x36acfdb9(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad0db9(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 7587c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0xfc20(%rip),%rax \n \tcmp %rax,0x18(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n \tjne 760ab \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acfd96(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad0d96(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 7663f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n-\tcmpl $0x2,0x36acf9bf(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmpl $0x2,0x36ad09bf(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0x40(%rsp),%rax\n \tjl 760ab \n \tmov $0x8,%r15d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1737\n \tcmp $0x400,%rax\n \tjg 75fad \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1736\n@@ -76720,25 +76720,25 @@\n \tmov 0x8(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1739\n \tmov (%rax),%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tsubq $0xffffffffffffff80,0x48(%rsp)\n \txor %r12d,%r12d\n-\tlea 0x36acfd3f(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad0d3f(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tjmp 75fd9 \n \tnopl 0x0(%rax,%rax,1)\n \tinc %r12\n \taddq $0x40,0x48(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acfd28(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36ad0d28(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 76089 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36acf951(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ad0951(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tcmp %rax,%r12\n \tjge 760ab \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1741\n \timul $0x98,%r12,%rax\n \tmov 0x2c8(%rsp,%rax,1),%rcx\n \tcmp 0x2d0(%rsp,%rax,1),%rcx\n@@ -77084,20 +77084,20 @@\n \tcall 229a0 \n \tmov $0x622,%esi\n \tlea 0x26cad0(%rip),%rax # 2e3100 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e90>\n \tjmp 7647e \n \tmov $0x621,%esi\n \tjmp 76486 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36acf6c2(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad06c2(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 75f7a \n \tcall 63a20 \n-\tlea 0x36acf6a9(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad06a9(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 75f7a \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:831\n \tmov %eax,%edi\n \tcall 22720 \n \tmov $0x33f,%ecx\n \tlea 0x26c18d(%rip),%rdx # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n@@ -77109,15 +77109,15 @@\n \tjmp 7669e \n \tjmp 7669e \n \tjmp 7669e \n \tjmp 7669e \n \tjmp 7669e \n \tjmp 7669e \n \tmov %rax,%rbx\n-\tlea 0x36acf660(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ad0660(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 76712 \n \tjmp 7670f \n \tjmp 7670f \n \tjmp 7670f \n \tjmp 7670f \n \tjmp 7670f \n@@ -77503,44 +77503,44 @@\n \tmovaps %xmm0,0xb50(%rsp)\n \tmovaps %xmm0,0xb40(%rsp)\n \tmovaps %xmm0,0xb30(%rsp)\n \tmovaps %xmm0,0xb20(%rsp)\n \tmov %r12,0xa0(%rsp)\n \tcvtsi2ss %r12,%xmm0\n \tmovss %xmm0,0x50(%rsp)\n-\tlea 0x36aceab4(%rip),%r12 # 36b45948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n+\tlea 0x36acfab4(%rip),%r12 # 36b46948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f10>\n ggml_cuda_op_mul_mat(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*, void (*)(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor*, char const*, float const*, char const*, float*, long, long, long, long, ihipStream_t*), void (*)(float const*, int const*, void*, ggml_type, long, long, long, long, long, long, long, long, ihipStream_t*)):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tlea 0x2c0(%rsp),%r13\n \txor %ebp,%ebp\n-\tlea 0x36acee63(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36acfe63(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tlea 0x1f0(%rsp),%r14\n \tjmp 76ece \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1537\n \tmov %rcx,%rax\n \tcqto\n \tidiv %r15\n \tsub %rdx,%rcx\n \tmov %rcx,0x0(%r13)\n \txchg %ax,%ax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tinc %rbp\n \tadd $0x98,%r13\n \tadd $0x38,%r12\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acee33(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36acfe33(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 76fe1 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36acea5c(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36acfa5c(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1515\n \tcmp %rax,%rbp\n \tjge 77047 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acee14(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36acfe14(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 77003 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1516\n \tmov (%r12),%eax\n \tmov %eax,-0x90(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1519\n \tmovq $0x0,-0x8(%r13)\n@@ -77578,19 +77578,19 @@\n \tjmp 76f78 \n \tmov %ecx,%eax\n \txor %edx,%edx\n \tdiv %r15d\n \tsub %rdx,%rcx\n \tmov %rcx,-0x8(%r13)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36aced82(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36acfd82(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 77025 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmov 0x36ace9ac(%rip),%eax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmov 0x36acf9ac(%rip),%eax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1534\n \tdec %eax\n \tcmp %rax,%rbp\n \tje 76ec0 \n \tmovss 0x1f4(%rsp,%rbp,4),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1535\n \tmulss 0x50(%rsp),%xmm0\n@@ -77646,15 +77646,15 @@\n \tmov 0x78(%rsp),%rax\n \tadd $0xf8,%rax\n \tmov %rax,0x110(%rsp)\n \txor %r13d,%r13d\n \tmov $0x97,%ebx\n \tmov $0x30,%eax\n \tmov %rax,0x58(%rsp)\n-\tmov 0x36acdea3(%rip),%rax \n+\tmov 0x36aceea3(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,0xc0(%rsp)\n \tlea 0x26c023(%rip),%rax # 2e30db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e6b>\n \tmov %rax,0xd8(%rsp)\n \tlea 0x26a5e7(%rip),%rax # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov %rax,0x88(%rsp)\n \tmov 0x80(%rsp),%rax\n@@ -77669,22 +77669,22 @@\n \tmov 0x50(%rsp),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tadd $0x98,%r13\n \tinc %rbx\n \taddq $0x40,0x58(%rsp)\n \taddq $0x8,0x70(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acebdf(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36acfbdf(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 7756c \n \tmov %rbx,%rax\n \tmov %rbx,0x50(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n \tadd $0xffffffffffffff69,%rbx\n-\tmovslq 0x36ace7f9(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36acf7f9(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1543\n \tcmp %rax,%rbx\n \tjge 77596 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x10e17(%rip),%rax \n \tcmp %rax,0x60(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1544\n@@ -77989,20 +77989,20 @@\n \tmov (%r14),%rax\n \tmov %r14,%rdi\n \tmov %r12,%rsi\n \tcall *0x10(%rax)\n \tmov %rax,0x288(%rsp,%r13,1)\n \tjmp 770f8 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36ace795(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36acf795(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 77131 \n \tcall 63a20 \n-\tlea 0x36ace77c(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36acf77c(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 77131 \n \tmov 0xd0(%rsp),%rcx\n \tmov %rcx,%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x11268(%rip),%rax \n \tcmp %rax,0x60(%rsp)\n@@ -78150,19 +78150,19 @@\n \tmov %rax,0x58(%rsp)\n \tjmp 7787d \n \tcs nopw 0x0(%rax,%rax,1)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tincq 0x58(%rsp)\n \tmov 0x1b8(%rsp),%rbx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36ace484(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36acf484(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 77ed4 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36ace0ad(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36acf0ad(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1618\n \tcmp %rax,0x58(%rsp)\n \tjge 77730 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x11565(%rip),%rax \n \tcmp %rax,0x60(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1619\n@@ -78522,33 +78522,33 @@\n \tmov (%rax),%rdi\n \tmov 0x70(%rsp),%rsi\n \tcall 23290 \n \ttest %eax,%eax\n \tje 77aa2 \n \tjmp 78292 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36acde2d(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36acee2d(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 7788c \n \tcall 63a20 \n-\tlea 0x36acde14(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36acee14(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 7788c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:982\n \tlea -0x11bc5(%rip),%rax \n \tcmp %rax,0x60(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n \tjne 7805e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acddf1(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36acedf1(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 7857f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1735\n-\tcmpl $0x2,0x36acda1a(%rip) # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tcmpl $0x2,0x36acea1a(%rip) # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n \tmov 0xd0(%rsp),%rax\n \tjl 7805e \n \tmov $0x8,%r15d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1737\n \tcmp $0x400,%rax\n \tjg 77f55 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1736\n@@ -78560,25 +78560,25 @@\n \tmov 0x48(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1739\n \tmov (%rax),%edi\n \tcall 22090 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tsubq $0xffffffffffffff80,0x80(%rsp)\n \txor %r12d,%r12d\n-\tlea 0x36acdd94(%rip),%rbx # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36aced94(%rip),%rbx # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tjmp 77f8c \n \tcs nopw 0x0(%rax,%rax,1)\n \tinc %r12\n \taddq $0x40,0x80(%rsp)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tmovzbl 0x36acdd75(%rip),%eax # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tmovzbl 0x36aced75(%rip),%eax # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \ttest %al,%al\n \tje 7803c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:2958\n-\tmovslq 0x36acd99e(%rip),%rax # 36b45940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n+\tmovslq 0x36ace99e(%rip),%rax # 36b46940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f08>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1740\n \tcmp %rax,%r12\n \tjge 7805e \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:1741\n \timul $0x98,%r12,%rax\n \tmov 0x2b8(%rsp,%rax,1),%rcx\n \tcmp 0x2c0(%rsp,%rax,1),%rcx\n@@ -78900,20 +78900,20 @@\n \tlea 0x26abac(%rip),%rdi # 2e3110 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8ea0>\n \tlea 0x26ab5b(%rip),%rsi # 2e30c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8e56>\n \tlea 0x26913c(%rip),%rdx # 2e16ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x743e>\n \tmov $0x625,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:294\n-\tlea 0x36acd782(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ace782(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22f60 <__cxa_guard_acquire@plt>\n \ttest %eax,%eax\n \tje 77f1f \n \tcall 63a20 \n-\tlea 0x36acd769(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ace769(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22490 <__cxa_guard_release@plt>\n \tjmp 77f1f \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-hip/../ggml-cuda/common.cuh:831\n \tmov %eax,%edi\n \tcall 22720 \n \tmov $0x33f,%ecx\n \tlea 0x26a24d(%rip),%rdx # 2e2809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8599>\n@@ -78925,15 +78925,15 @@\n \tjmp 785de \n \tjmp 785de \n \tjmp 785de \n \tjmp 785de \n \tjmp 785de \n \tjmp 785de \n \tmov %rax,%rbx\n-\tlea 0x36acd720(%rip),%rdi # 36b45d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n+\tlea 0x36ace720(%rip),%rdi # 36b46d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x52d0>\n \tcall 22c10 <__cxa_guard_abort@plt>\n \tjmp 78646 \n \tjmp 78643 \n \tjmp 78643 \n \tjmp 78643 \n \tjmp 78643 \n \tjmp 78643 \n@@ -79428,15 +79428,15 @@\n 0000000000078a70 :\n ggml_cuda_pool_leg::~ggml_cuda_pool_leg():\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:317\n \tpush %r14\n \tpush %rbx\n \tpush %rax\n \tmov %rdi,%rbx\n-\tmov 0x36acc4ca(%rip),%rax \n+\tmov 0x36acd4ca(%rip),%rax \n \tadd $0x10,%rax\n \tmov %rax,(%rdi)\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ggml-cuda.cu:318\n \tmov 0x8(%rdi),%edi\n \tcall 22090 \n \txor %r14d,%r14d\n \tjmp 78aad \n@@ -81430,15 +81430,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36ac5c0a(%rip),%rdi \n+\tlea 0x36ac6c0a(%rip),%rdi \n \tjmp 7a03b \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/gla.cu:89\n \tmov %ebp,%edi\n \timul %r12d,%edi\n \tmovabs $0x100000000,%rdx\n \tor %rdx,%rdi\n \tor $0x40,%rdx\n@@ -81492,15 +81492,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36ac5aad(%rip),%rdi \n+\tlea 0x36ac6aad(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/gla.cu:93\n \tadd $0x108,%rsp\n@@ -81583,15 +81583,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36ac58ef(%rip),%rdi \n+\tlea 0x36ac68ef(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -81631,64 +81631,64 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36ac57e7(%rip),%rdi \n+\tlea 0x36ac67e7(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36acbfe4(%rip),%rbx # 36b46320 ::get_beta()::val@@Base+0x8>\n+\tmov 0x36accfe4(%rip),%rbx # 36b47320 ::get_beta()::val@@Base+0x8>\n \ttest %rbx,%rbx\n \tjne 7a357 \n-\tlea 0x36acaeb8(%rip),%rdi # 36b45200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47c8>\n+\tlea 0x36acbeb8(%rip),%rdi # 36b46200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47c8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36acbfc9(%rip) # 36b46320 ::get_beta()::val@@Base+0x8>\n+\tmov %rax,0x36accfc9(%rip) # 36b47320 ::get_beta()::val@@Base+0x8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36ac577e(%rip),%rsi \n+\tlea 0x36ac677e(%rip),%rsi \n \tlea 0x2699fd(%rip),%rcx # 2e3d6e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9afe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36ac5758(%rip),%rsi \n+\tlea 0x36ac6758(%rip),%rsi \n \tlea 0x269a08(%rip),%rcx # 2e3da7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9b37>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36acbf49(%rip),%rdi # 36b46320 ::get_beta()::val@@Base+0x8>\n+\tmov 0x36accf49(%rip),%rdi # 36b47320 ::get_beta()::val@@Base+0x8>\n \ttest %rdi,%rdi\n \tje 7a3f1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36acbf33(%rip) # 36b46320 ::get_beta()::val@@Base+0x8>\n+\tmovq $0x0,0x36accf33(%rip) # 36b47320 ::get_beta()::val@@Base+0x8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000007a400 :\n ggml_cuda_op_im2col(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -81894,15 +81894,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac5334(%rip),%rdi \n+\tlea 0x36ac6334(%rip),%rdi \n \tjmp 7a9ea \n ggml_cuda_op_im2col(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void im2col_cuda(float const*, float*, long, long, long, long, long, long, long, long, long, long, int, int, int, int, int, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/im2col.cu:46\n \tjne 7aa03 \n \tmov 0x100(%rsp),%rax\n@@ -81982,15 +81982,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac5116(%rip),%rdi \n+\tlea 0x36ac6116(%rip),%rdi \n ggml_cuda_op_im2col(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x110(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/im2col.cu:103\n@@ -82076,15 +82076,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ac4f10(%rip),%rdi \n+\tlea 0x36ac5f10(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -82139,64 +82139,64 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36ac4d88(%rip),%rdi \n+\tlea 0x36ac5d88(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36acb57c(%rip),%rbx # 36b46328 ::get_beta()::val@@Base+0x10>\n+\tmov 0x36acc57c(%rip),%rbx # 36b47328 ::get_beta()::val@@Base+0x10>\n \ttest %rbx,%rbx\n \tjne 7adc7 \n-\tlea 0x36aca460(%rip),%rdi # 36b45218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47e0>\n+\tlea 0x36acb460(%rip),%rdi # 36b46218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47e0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36acb561(%rip) # 36b46328 ::get_beta()::val@@Base+0x10>\n+\tmov %rax,0x36acc561(%rip) # 36b47328 ::get_beta()::val@@Base+0x10>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36ac4d1e(%rip),%rsi \n+\tlea 0x36ac5d1e(%rip),%rsi \n \tlea 0x269087(%rip),%rcx # 2e3e68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9bf8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36ac4cf8(%rip),%rsi \n+\tlea 0x36ac5cf8(%rip),%rsi \n \tlea 0x26908d(%rip),%rcx # 2e3e9c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9c2c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36acb4e1(%rip),%rdi # 36b46328 ::get_beta()::val@@Base+0x10>\n+\tmov 0x36acc4e1(%rip),%rdi # 36b47328 ::get_beta()::val@@Base+0x10>\n \ttest %rdi,%rdi\n \tje 7ae61 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36acb4cb(%rip) # 36b46328 ::get_beta()::val@@Base+0x10>\n+\tmovq $0x0,0x36acc4cb(%rip) # 36b47328 ::get_beta()::val@@Base+0x10>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000007ae70 :\n ggml_cuda_op_mean(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -82280,15 +82280,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ac4b7d(%rip),%rdi \n+\tlea 0x36ac5b7d(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mean.cu:19\n \tadd $0x70,%rsp\n@@ -82345,51 +82345,51 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ac4a65(%rip),%rdi \n+\tlea 0x36ac5a65(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36acb265(%rip),%rdi # 36b46330 ::get_beta()::val@@Base+0x18>\n+\tmov 0x36acc265(%rip),%rdi # 36b47330 ::get_beta()::val@@Base+0x18>\n \ttest %rdi,%rdi\n \tjne 7b0e6 \n-\tlea 0x36aca159(%rip),%rdi # 36b45230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47f8>\n+\tlea 0x36acb159(%rip),%rdi # 36b46230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x47f8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36acb24a(%rip) # 36b46330 ::get_beta()::val@@Base+0x18>\n+\tmov %rax,0x36acc24a(%rip) # 36b47330 ::get_beta()::val@@Base+0x18>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36ac4a0f(%rip),%rsi \n+\tlea 0x36ac5a0f(%rip),%rsi \n \tlea 0x268e16(%rip),%rcx # 2e3f16 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9ca6>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36acb1f9(%rip),%rdi # 36b46330 ::get_beta()::val@@Base+0x18>\n+\tmov 0x36acc1f9(%rip),%rdi # 36b47330 ::get_beta()::val@@Base+0x18>\n \ttest %rdi,%rdi\n \tje 7b151 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36acb1e3(%rip) # 36b46330 ::get_beta()::val@@Base+0x18>\n+\tmovq $0x0,0x36acc1e3(%rip) # 36b47330 ::get_beta()::val@@Base+0x18>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000007b160 :\n ggml_cuda_mul_mat_q(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n@@ -85709,15 +85709,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac1d25(%rip),%rdi \n+\tlea 0x36ac2d25(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7de1f \n@@ -85944,15 +85944,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac19c6(%rip),%rdi \n+\tlea 0x36ac29c6(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7e1ff \n@@ -86180,15 +86180,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac1626(%rip),%rdi \n+\tlea 0x36ac2626(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7e5df \n@@ -86416,15 +86416,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac1286(%rip),%rdi \n+\tlea 0x36ac2286(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7e9bf \n@@ -86642,15 +86642,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac0f7c(%rip),%rdi \n+\tlea 0x36ac1f7c(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7ed8f \n@@ -86878,15 +86878,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac0a16(%rip),%rdi \n+\tlea 0x36ac1a16(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7f16f \n@@ -87114,15 +87114,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac0736(%rip),%rdi \n+\tlea 0x36ac1736(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7f54f \n@@ -87357,15 +87357,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ac037e(%rip),%rdi \n+\tlea 0x36ac137e(%rip),%rdi \n \tjmp 86f49 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 7f94f \n@@ -87484,15 +87484,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abff9c(%rip),%rdi \n+\tlea 0x36ac0f9c(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -87583,15 +87583,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abfd89(%rip),%rdi \n+\tlea 0x36ac0d89(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -87682,15 +87682,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abfb76(%rip),%rdi \n+\tlea 0x36ac0b76(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -87781,15 +87781,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abf963(%rip),%rdi \n+\tlea 0x36ac0963(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -87880,15 +87880,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abf750(%rip),%rdi \n+\tlea 0x36ac0750(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -87979,15 +87979,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abf53d(%rip),%rdi \n+\tlea 0x36ac053d(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88078,15 +88078,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abf32a(%rip),%rdi \n+\tlea 0x36ac032a(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88177,15 +88177,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abf15f(%rip),%rdi \n+\tlea 0x36ac015f(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88276,15 +88276,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abef4c(%rip),%rdi \n+\tlea 0x36abff4c(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88375,15 +88375,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abed39(%rip),%rdi \n+\tlea 0x36abfd39(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88474,15 +88474,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abeb26(%rip),%rdi \n+\tlea 0x36abfb26(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88573,15 +88573,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abe913(%rip),%rdi \n+\tlea 0x36abf913(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88672,15 +88672,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abe700(%rip),%rdi \n+\tlea 0x36abf700(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88771,15 +88771,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abe4ed(%rip),%rdi \n+\tlea 0x36abf4ed(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88870,15 +88870,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abe2e2(%rip),%rdi \n+\tlea 0x36abf2e2(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -88969,15 +88969,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abe0cf(%rip),%rdi \n+\tlea 0x36abf0cf(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89068,15 +89068,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abdebc(%rip),%rdi \n+\tlea 0x36abeebc(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89167,15 +89167,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abdca9(%rip),%rdi \n+\tlea 0x36abeca9(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89266,15 +89266,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abda96(%rip),%rdi \n+\tlea 0x36abea96(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89365,15 +89365,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abd883(%rip),%rdi \n+\tlea 0x36abe883(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89464,15 +89464,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abd670(%rip),%rdi \n+\tlea 0x36abe670(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89563,15 +89563,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abd465(%rip),%rdi \n+\tlea 0x36abe465(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89662,15 +89662,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abd252(%rip),%rdi \n+\tlea 0x36abe252(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89761,15 +89761,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abd03f(%rip),%rdi \n+\tlea 0x36abe03f(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89860,15 +89860,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abce2c(%rip),%rdi \n+\tlea 0x36abde2c(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -89959,15 +89959,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abcc19(%rip),%rdi \n+\tlea 0x36abdc19(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90058,15 +90058,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abca06(%rip),%rdi \n+\tlea 0x36abda06(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90157,15 +90157,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abc7f3(%rip),%rdi \n+\tlea 0x36abd7f3(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90256,15 +90256,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abc668(%rip),%rdi \n+\tlea 0x36abd668(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90355,15 +90355,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abc455(%rip),%rdi \n+\tlea 0x36abd455(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90454,15 +90454,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abc242(%rip),%rdi \n+\tlea 0x36abd242(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90553,15 +90553,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abc02f(%rip),%rdi \n+\tlea 0x36abd02f(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90652,15 +90652,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abbe1c(%rip),%rdi \n+\tlea 0x36abce1c(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90751,15 +90751,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abbc09(%rip),%rdi \n+\tlea 0x36abcc09(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90850,15 +90850,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abb9f6(%rip),%rdi \n+\tlea 0x36abc9f6(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -90949,15 +90949,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abb62b(%rip),%rdi \n+\tlea 0x36abc62b(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91048,15 +91048,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abb418(%rip),%rdi \n+\tlea 0x36abc418(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91147,15 +91147,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abb205(%rip),%rdi \n+\tlea 0x36abc205(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91246,15 +91246,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abaff2(%rip),%rdi \n+\tlea 0x36abbff2(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91345,15 +91345,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36abaddf(%rip),%rdi \n+\tlea 0x36abbddf(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91444,15 +91444,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ababcc(%rip),%rdi \n+\tlea 0x36abbbcc(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91543,15 +91543,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aba9b9(%rip),%rdi \n+\tlea 0x36abb9b9(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91642,15 +91642,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aba86e(%rip),%rdi \n+\tlea 0x36abb86e(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91741,15 +91741,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aba65b(%rip),%rdi \n+\tlea 0x36abb65b(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91840,15 +91840,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aba448(%rip),%rdi \n+\tlea 0x36abb448(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -91939,15 +91939,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aba235(%rip),%rdi \n+\tlea 0x36abb235(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92038,15 +92038,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aba022(%rip),%rdi \n+\tlea 0x36abb022(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92137,15 +92137,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab9e0f(%rip),%rdi \n+\tlea 0x36abae0f(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92236,15 +92236,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab9bfc(%rip),%rdi \n+\tlea 0x36ababfc(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92335,15 +92335,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab99f1(%rip),%rdi \n+\tlea 0x36aba9f1(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92434,15 +92434,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab97de(%rip),%rdi \n+\tlea 0x36aba7de(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92533,15 +92533,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab95cb(%rip),%rdi \n+\tlea 0x36aba5cb(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92632,15 +92632,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab93b8(%rip),%rdi \n+\tlea 0x36aba3b8(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92731,15 +92731,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab91a5(%rip),%rdi \n+\tlea 0x36aba1a5(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92830,15 +92830,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab8f92(%rip),%rdi \n+\tlea 0x36ab9f92(%rip),%rdi \n \tjmp 86f49 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -92929,15 +92929,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab8d7f(%rip),%rdi \n+\tlea 0x36ab9d7f(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:284\n \tadd $0x158,%rsp\n@@ -93039,15 +93039,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab8966(%rip),%rdi \n+\tlea 0x36ab9966(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93098,15 +93098,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab87fe(%rip),%rdi \n+\tlea 0x36ab97fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93157,15 +93157,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab8696(%rip),%rdi \n+\tlea 0x36ab9696(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93216,15 +93216,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab852e(%rip),%rdi \n+\tlea 0x36ab952e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93275,15 +93275,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab83c6(%rip),%rdi \n+\tlea 0x36ab93c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93334,15 +93334,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab825e(%rip),%rdi \n+\tlea 0x36ab925e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93393,15 +93393,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab80f6(%rip),%rdi \n+\tlea 0x36ab90f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93452,15 +93452,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab7f8e(%rip),%rdi \n+\tlea 0x36ab8f8e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93511,15 +93511,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab7e26(%rip),%rdi \n+\tlea 0x36ab8e26(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93570,15 +93570,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab7cbe(%rip),%rdi \n+\tlea 0x36ab8cbe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93629,15 +93629,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab7b56(%rip),%rdi \n+\tlea 0x36ab8b56(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93688,15 +93688,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab79ee(%rip),%rdi \n+\tlea 0x36ab89ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93747,15 +93747,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab7886(%rip),%rdi \n+\tlea 0x36ab8886(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93806,15 +93806,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab771e(%rip),%rdi \n+\tlea 0x36ab871e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93865,15 +93865,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab75b6(%rip),%rdi \n+\tlea 0x36ab85b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93924,15 +93924,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab744e(%rip),%rdi \n+\tlea 0x36ab844e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -93983,15 +93983,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab72e6(%rip),%rdi \n+\tlea 0x36ab82e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94042,15 +94042,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab717e(%rip),%rdi \n+\tlea 0x36ab817e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94101,15 +94101,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab7016(%rip),%rdi \n+\tlea 0x36ab8016(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94160,15 +94160,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab6eae(%rip),%rdi \n+\tlea 0x36ab7eae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94219,15 +94219,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab6d46(%rip),%rdi \n+\tlea 0x36ab7d46(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94278,15 +94278,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab6bde(%rip),%rdi \n+\tlea 0x36ab7bde(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94337,15 +94337,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab6a76(%rip),%rdi \n+\tlea 0x36ab7a76(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94396,15 +94396,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab690e(%rip),%rdi \n+\tlea 0x36ab790e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94455,15 +94455,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab67a6(%rip),%rdi \n+\tlea 0x36ab77a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94514,15 +94514,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab663e(%rip),%rdi \n+\tlea 0x36ab763e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94573,15 +94573,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab64d6(%rip),%rdi \n+\tlea 0x36ab74d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94632,15 +94632,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab636e(%rip),%rdi \n+\tlea 0x36ab736e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94691,15 +94691,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab6206(%rip),%rdi \n+\tlea 0x36ab7206(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94750,15 +94750,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab609e(%rip),%rdi \n+\tlea 0x36ab709e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94809,15 +94809,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab5f36(%rip),%rdi \n+\tlea 0x36ab6f36(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94868,15 +94868,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab5dce(%rip),%rdi \n+\tlea 0x36ab6dce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94927,15 +94927,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab5c66(%rip),%rdi \n+\tlea 0x36ab6c66(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -94986,15 +94986,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab5afe(%rip),%rdi \n+\tlea 0x36ab6afe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95045,15 +95045,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab5996(%rip),%rdi \n+\tlea 0x36ab6996(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95104,15 +95104,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab582e(%rip),%rdi \n+\tlea 0x36ab682e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95163,15 +95163,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab56c6(%rip),%rdi \n+\tlea 0x36ab66c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95222,15 +95222,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab555e(%rip),%rdi \n+\tlea 0x36ab655e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95281,15 +95281,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab53f6(%rip),%rdi \n+\tlea 0x36ab63f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95340,15 +95340,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab528e(%rip),%rdi \n+\tlea 0x36ab628e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95399,15 +95399,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab5126(%rip),%rdi \n+\tlea 0x36ab6126(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95458,15 +95458,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4fbe(%rip),%rdi \n+\tlea 0x36ab5fbe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95517,15 +95517,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4e56(%rip),%rdi \n+\tlea 0x36ab5e56(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95576,15 +95576,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4cee(%rip),%rdi \n+\tlea 0x36ab5cee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95635,15 +95635,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4b86(%rip),%rdi \n+\tlea 0x36ab5b86(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95694,15 +95694,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4a1e(%rip),%rdi \n+\tlea 0x36ab5a1e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95753,15 +95753,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab48b6(%rip),%rdi \n+\tlea 0x36ab58b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95812,15 +95812,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab474e(%rip),%rdi \n+\tlea 0x36ab574e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95871,15 +95871,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab45e6(%rip),%rdi \n+\tlea 0x36ab55e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95930,15 +95930,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab447e(%rip),%rdi \n+\tlea 0x36ab547e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -95989,15 +95989,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4316(%rip),%rdi \n+\tlea 0x36ab5316(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96048,15 +96048,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab41ae(%rip),%rdi \n+\tlea 0x36ab51ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96107,15 +96107,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab4046(%rip),%rdi \n+\tlea 0x36ab5046(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96166,15 +96166,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab3ede(%rip),%rdi \n+\tlea 0x36ab4ede(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96225,15 +96225,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab3d76(%rip),%rdi \n+\tlea 0x36ab4d76(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96284,15 +96284,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab3c0e(%rip),%rdi \n+\tlea 0x36ab4c0e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96343,15 +96343,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab3aa6(%rip),%rdi \n+\tlea 0x36ab4aa6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96402,15 +96402,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab393e(%rip),%rdi \n+\tlea 0x36ab493e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96461,15 +96461,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab37d6(%rip),%rdi \n+\tlea 0x36ab47d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96520,15 +96520,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab366e(%rip),%rdi \n+\tlea 0x36ab466e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96579,15 +96579,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab3506(%rip),%rdi \n+\tlea 0x36ab4506(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96638,15 +96638,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab339e(%rip),%rdi \n+\tlea 0x36ab439e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96697,15 +96697,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab3236(%rip),%rdi \n+\tlea 0x36ab4236(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -96756,15 +96756,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36ab30ce(%rip),%rdi \n+\tlea 0x36ab40ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -97160,15 +97160,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab2a75(%rip),%rdi \n+\tlea 0x36ab3a75(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8d2cf \n@@ -97395,15 +97395,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab2716(%rip),%rdi \n+\tlea 0x36ab3716(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8d6af \n@@ -97631,15 +97631,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab2376(%rip),%rdi \n+\tlea 0x36ab3376(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8da8f \n@@ -97867,15 +97867,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab1fd6(%rip),%rdi \n+\tlea 0x36ab2fd6(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8de6f \n@@ -98093,15 +98093,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab1ccc(%rip),%rdi \n+\tlea 0x36ab2ccc(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8e23f \n@@ -98329,15 +98329,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab1766(%rip),%rdi \n+\tlea 0x36ab2766(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8e61f \n@@ -98565,15 +98565,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab1486(%rip),%rdi \n+\tlea 0x36ab2486(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8e9ff \n@@ -98808,15 +98808,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab10ce(%rip),%rdi \n+\tlea 0x36ab20ce(%rip),%rdi \n \tjmp 963f9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 8edff \n@@ -98935,15 +98935,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab0cec(%rip),%rdi \n+\tlea 0x36ab1cec(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99034,15 +99034,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab0ad9(%rip),%rdi \n+\tlea 0x36ab1ad9(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99133,15 +99133,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab08c6(%rip),%rdi \n+\tlea 0x36ab18c6(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99232,15 +99232,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab06b3(%rip),%rdi \n+\tlea 0x36ab16b3(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99331,15 +99331,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab04a0(%rip),%rdi \n+\tlea 0x36ab14a0(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99430,15 +99430,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab028d(%rip),%rdi \n+\tlea 0x36ab128d(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99529,15 +99529,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36ab007a(%rip),%rdi \n+\tlea 0x36ab107a(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99628,15 +99628,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aafeaf(%rip),%rdi \n+\tlea 0x36ab0eaf(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99727,15 +99727,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aafc9c(%rip),%rdi \n+\tlea 0x36ab0c9c(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99826,15 +99826,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aafa89(%rip),%rdi \n+\tlea 0x36ab0a89(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -99925,15 +99925,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaf876(%rip),%rdi \n+\tlea 0x36ab0876(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100024,15 +100024,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaf663(%rip),%rdi \n+\tlea 0x36ab0663(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100123,15 +100123,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaf450(%rip),%rdi \n+\tlea 0x36ab0450(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100222,15 +100222,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaf23d(%rip),%rdi \n+\tlea 0x36ab023d(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100321,15 +100321,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaf032(%rip),%rdi \n+\tlea 0x36ab0032(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100420,15 +100420,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaee1f(%rip),%rdi \n+\tlea 0x36aafe1f(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100519,15 +100519,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaec0c(%rip),%rdi \n+\tlea 0x36aafc0c(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100618,15 +100618,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aae9f9(%rip),%rdi \n+\tlea 0x36aaf9f9(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100717,15 +100717,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aae7e6(%rip),%rdi \n+\tlea 0x36aaf7e6(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100816,15 +100816,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aae5d3(%rip),%rdi \n+\tlea 0x36aaf5d3(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -100915,15 +100915,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aae3c0(%rip),%rdi \n+\tlea 0x36aaf3c0(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101014,15 +101014,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aae1b5(%rip),%rdi \n+\tlea 0x36aaf1b5(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101113,15 +101113,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aadfa2(%rip),%rdi \n+\tlea 0x36aaefa2(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101212,15 +101212,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aadd8f(%rip),%rdi \n+\tlea 0x36aaed8f(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101311,15 +101311,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aadb7c(%rip),%rdi \n+\tlea 0x36aaeb7c(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101410,15 +101410,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aad969(%rip),%rdi \n+\tlea 0x36aae969(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101509,15 +101509,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aad756(%rip),%rdi \n+\tlea 0x36aae756(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101608,15 +101608,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aad543(%rip),%rdi \n+\tlea 0x36aae543(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101707,15 +101707,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aad3b8(%rip),%rdi \n+\tlea 0x36aae3b8(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101806,15 +101806,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aad1a5(%rip),%rdi \n+\tlea 0x36aae1a5(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -101905,15 +101905,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aacf92(%rip),%rdi \n+\tlea 0x36aadf92(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102004,15 +102004,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aacd7f(%rip),%rdi \n+\tlea 0x36aadd7f(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102103,15 +102103,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aacb6c(%rip),%rdi \n+\tlea 0x36aadb6c(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102202,15 +102202,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aac959(%rip),%rdi \n+\tlea 0x36aad959(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102301,15 +102301,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aac746(%rip),%rdi \n+\tlea 0x36aad746(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102400,15 +102400,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aac37b(%rip),%rdi \n+\tlea 0x36aad37b(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102499,15 +102499,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aac168(%rip),%rdi \n+\tlea 0x36aad168(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102598,15 +102598,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aabf55(%rip),%rdi \n+\tlea 0x36aacf55(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102697,15 +102697,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aabd42(%rip),%rdi \n+\tlea 0x36aacd42(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102796,15 +102796,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aabb2f(%rip),%rdi \n+\tlea 0x36aacb2f(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102895,15 +102895,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aab91c(%rip),%rdi \n+\tlea 0x36aac91c(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -102994,15 +102994,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aab709(%rip),%rdi \n+\tlea 0x36aac709(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103093,15 +103093,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aab5be(%rip),%rdi \n+\tlea 0x36aac5be(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103192,15 +103192,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aab3ab(%rip),%rdi \n+\tlea 0x36aac3ab(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103291,15 +103291,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aab198(%rip),%rdi \n+\tlea 0x36aac198(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103390,15 +103390,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaaf85(%rip),%rdi \n+\tlea 0x36aabf85(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103489,15 +103489,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaad72(%rip),%rdi \n+\tlea 0x36aabd72(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103588,15 +103588,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaab5f(%rip),%rdi \n+\tlea 0x36aabb5f(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103687,15 +103687,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaa94c(%rip),%rdi \n+\tlea 0x36aab94c(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103786,15 +103786,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaa741(%rip),%rdi \n+\tlea 0x36aab741(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103885,15 +103885,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaa52e(%rip),%rdi \n+\tlea 0x36aab52e(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -103984,15 +103984,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaa31b(%rip),%rdi \n+\tlea 0x36aab31b(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -104083,15 +104083,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aaa108(%rip),%rdi \n+\tlea 0x36aab108(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -104182,15 +104182,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa9ef5(%rip),%rdi \n+\tlea 0x36aaaef5(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -104281,15 +104281,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa9ce2(%rip),%rdi \n+\tlea 0x36aaace2(%rip),%rdi \n \tjmp 963f9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -104380,15 +104380,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa9acf(%rip),%rdi \n+\tlea 0x36aaaacf(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:284\n \tadd $0x158,%rsp\n@@ -104835,15 +104835,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa93c5(%rip),%rdi \n+\tlea 0x36aaa3c5(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 96b7f \n@@ -105070,15 +105070,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa9066(%rip),%rdi \n+\tlea 0x36aaa066(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 96f5f \n@@ -105306,15 +105306,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa8cc6(%rip),%rdi \n+\tlea 0x36aa9cc6(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 9733f \n@@ -105542,15 +105542,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa8926(%rip),%rdi \n+\tlea 0x36aa9926(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 9771f \n@@ -105768,15 +105768,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa861c(%rip),%rdi \n+\tlea 0x36aa961c(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 97aef \n@@ -106004,15 +106004,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa80b6(%rip),%rdi \n+\tlea 0x36aa90b6(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 97ecf \n@@ -106240,15 +106240,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa7dd6(%rip),%rdi \n+\tlea 0x36aa8dd6(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 982af \n@@ -106483,15 +106483,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa7a1e(%rip),%rdi \n+\tlea 0x36aa8a1e(%rip),%rdi \n \tjmp 9fca9 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp 986af \n@@ -106610,15 +106610,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa763c(%rip),%rdi \n+\tlea 0x36aa863c(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -106709,15 +106709,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa7429(%rip),%rdi \n+\tlea 0x36aa8429(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -106808,15 +106808,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa7216(%rip),%rdi \n+\tlea 0x36aa8216(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -106907,15 +106907,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa7003(%rip),%rdi \n+\tlea 0x36aa8003(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107006,15 +107006,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa6df0(%rip),%rdi \n+\tlea 0x36aa7df0(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107105,15 +107105,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa6bdd(%rip),%rdi \n+\tlea 0x36aa7bdd(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107204,15 +107204,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa69ca(%rip),%rdi \n+\tlea 0x36aa79ca(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107303,15 +107303,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa67ff(%rip),%rdi \n+\tlea 0x36aa77ff(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107402,15 +107402,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa65ec(%rip),%rdi \n+\tlea 0x36aa75ec(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107501,15 +107501,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa63d9(%rip),%rdi \n+\tlea 0x36aa73d9(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107600,15 +107600,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa61c6(%rip),%rdi \n+\tlea 0x36aa71c6(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107699,15 +107699,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa5fb3(%rip),%rdi \n+\tlea 0x36aa6fb3(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107798,15 +107798,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa5da0(%rip),%rdi \n+\tlea 0x36aa6da0(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107897,15 +107897,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa5b8d(%rip),%rdi \n+\tlea 0x36aa6b8d(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -107996,15 +107996,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa5982(%rip),%rdi \n+\tlea 0x36aa6982(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108095,15 +108095,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa576f(%rip),%rdi \n+\tlea 0x36aa676f(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108194,15 +108194,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa555c(%rip),%rdi \n+\tlea 0x36aa655c(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108293,15 +108293,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa5349(%rip),%rdi \n+\tlea 0x36aa6349(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108392,15 +108392,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa5136(%rip),%rdi \n+\tlea 0x36aa6136(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108491,15 +108491,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa4f23(%rip),%rdi \n+\tlea 0x36aa5f23(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108590,15 +108590,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa4d10(%rip),%rdi \n+\tlea 0x36aa5d10(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108689,15 +108689,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa4b05(%rip),%rdi \n+\tlea 0x36aa5b05(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108788,15 +108788,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa48f2(%rip),%rdi \n+\tlea 0x36aa58f2(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108887,15 +108887,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa46df(%rip),%rdi \n+\tlea 0x36aa56df(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -108986,15 +108986,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa44cc(%rip),%rdi \n+\tlea 0x36aa54cc(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109085,15 +109085,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa42b9(%rip),%rdi \n+\tlea 0x36aa52b9(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109184,15 +109184,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa40a6(%rip),%rdi \n+\tlea 0x36aa50a6(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109283,15 +109283,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa3e93(%rip),%rdi \n+\tlea 0x36aa4e93(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109382,15 +109382,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa3d08(%rip),%rdi \n+\tlea 0x36aa4d08(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109481,15 +109481,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa3af5(%rip),%rdi \n+\tlea 0x36aa4af5(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109580,15 +109580,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa38e2(%rip),%rdi \n+\tlea 0x36aa48e2(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109679,15 +109679,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa36cf(%rip),%rdi \n+\tlea 0x36aa46cf(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109778,15 +109778,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa34bc(%rip),%rdi \n+\tlea 0x36aa44bc(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109877,15 +109877,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa32a9(%rip),%rdi \n+\tlea 0x36aa42a9(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -109976,15 +109976,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa3096(%rip),%rdi \n+\tlea 0x36aa4096(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110075,15 +110075,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa2ccb(%rip),%rdi \n+\tlea 0x36aa3ccb(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110174,15 +110174,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa2ab8(%rip),%rdi \n+\tlea 0x36aa3ab8(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110273,15 +110273,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa28a5(%rip),%rdi \n+\tlea 0x36aa38a5(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110372,15 +110372,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa2692(%rip),%rdi \n+\tlea 0x36aa3692(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110471,15 +110471,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa247f(%rip),%rdi \n+\tlea 0x36aa347f(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110570,15 +110570,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa226c(%rip),%rdi \n+\tlea 0x36aa326c(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110669,15 +110669,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa2059(%rip),%rdi \n+\tlea 0x36aa3059(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110768,15 +110768,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa1f0e(%rip),%rdi \n+\tlea 0x36aa2f0e(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110867,15 +110867,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa1cfb(%rip),%rdi \n+\tlea 0x36aa2cfb(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -110966,15 +110966,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa1ae8(%rip),%rdi \n+\tlea 0x36aa2ae8(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111065,15 +111065,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa18d5(%rip),%rdi \n+\tlea 0x36aa28d5(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111164,15 +111164,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa16c2(%rip),%rdi \n+\tlea 0x36aa26c2(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111263,15 +111263,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa14af(%rip),%rdi \n+\tlea 0x36aa24af(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111362,15 +111362,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa129c(%rip),%rdi \n+\tlea 0x36aa229c(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111461,15 +111461,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa1091(%rip),%rdi \n+\tlea 0x36aa2091(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111560,15 +111560,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa0e7e(%rip),%rdi \n+\tlea 0x36aa1e7e(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111659,15 +111659,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa0c6b(%rip),%rdi \n+\tlea 0x36aa1c6b(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111758,15 +111758,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa0a58(%rip),%rdi \n+\tlea 0x36aa1a58(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111857,15 +111857,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa0845(%rip),%rdi \n+\tlea 0x36aa1845(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -111956,15 +111956,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa0632(%rip),%rdi \n+\tlea 0x36aa1632(%rip),%rdi \n \tjmp 9fca9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -112055,15 +112055,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36aa041f(%rip),%rdi \n+\tlea 0x36aa141f(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:284\n \tadd $0x158,%rsp\n@@ -112165,15 +112165,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9fe06(%rip),%rdi \n+\tlea 0x36aa0e06(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112224,15 +112224,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9fc9e(%rip),%rdi \n+\tlea 0x36aa0c9e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112283,15 +112283,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9fb36(%rip),%rdi \n+\tlea 0x36aa0b36(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112342,15 +112342,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f9ce(%rip),%rdi \n+\tlea 0x36aa09ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112401,15 +112401,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f866(%rip),%rdi \n+\tlea 0x36aa0866(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112460,15 +112460,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f6fe(%rip),%rdi \n+\tlea 0x36aa06fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112519,15 +112519,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f596(%rip),%rdi \n+\tlea 0x36aa0596(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112578,15 +112578,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f42e(%rip),%rdi \n+\tlea 0x36aa042e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112637,15 +112637,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f2c6(%rip),%rdi \n+\tlea 0x36aa02c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112696,15 +112696,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9f15e(%rip),%rdi \n+\tlea 0x36aa015e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112755,15 +112755,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9eff6(%rip),%rdi \n+\tlea 0x36a9fff6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112814,15 +112814,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ee8e(%rip),%rdi \n+\tlea 0x36a9fe8e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112873,15 +112873,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ed26(%rip),%rdi \n+\tlea 0x36a9fd26(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112932,15 +112932,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ebbe(%rip),%rdi \n+\tlea 0x36a9fbbe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -112991,15 +112991,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ea56(%rip),%rdi \n+\tlea 0x36a9fa56(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113050,15 +113050,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e8ee(%rip),%rdi \n+\tlea 0x36a9f8ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113109,15 +113109,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e786(%rip),%rdi \n+\tlea 0x36a9f786(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113168,15 +113168,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e61e(%rip),%rdi \n+\tlea 0x36a9f61e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113227,15 +113227,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e4b6(%rip),%rdi \n+\tlea 0x36a9f4b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113286,15 +113286,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e34e(%rip),%rdi \n+\tlea 0x36a9f34e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113345,15 +113345,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e1e6(%rip),%rdi \n+\tlea 0x36a9f1e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113404,15 +113404,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9e07e(%rip),%rdi \n+\tlea 0x36a9f07e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113463,15 +113463,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9df16(%rip),%rdi \n+\tlea 0x36a9ef16(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113522,15 +113522,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ddae(%rip),%rdi \n+\tlea 0x36a9edae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113581,15 +113581,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9dc46(%rip),%rdi \n+\tlea 0x36a9ec46(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113640,15 +113640,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9dade(%rip),%rdi \n+\tlea 0x36a9eade(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113699,15 +113699,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d976(%rip),%rdi \n+\tlea 0x36a9e976(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113758,15 +113758,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d80e(%rip),%rdi \n+\tlea 0x36a9e80e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113817,15 +113817,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d6a6(%rip),%rdi \n+\tlea 0x36a9e6a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113876,15 +113876,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d53e(%rip),%rdi \n+\tlea 0x36a9e53e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113935,15 +113935,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d3d6(%rip),%rdi \n+\tlea 0x36a9e3d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -113994,15 +113994,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d26e(%rip),%rdi \n+\tlea 0x36a9e26e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114053,15 +114053,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9d106(%rip),%rdi \n+\tlea 0x36a9e106(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114112,15 +114112,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9cf9e(%rip),%rdi \n+\tlea 0x36a9df9e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114171,15 +114171,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ce36(%rip),%rdi \n+\tlea 0x36a9de36(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114230,15 +114230,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ccce(%rip),%rdi \n+\tlea 0x36a9dcce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114289,15 +114289,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9cb66(%rip),%rdi \n+\tlea 0x36a9db66(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114348,15 +114348,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c9fe(%rip),%rdi \n+\tlea 0x36a9d9fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114407,15 +114407,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c896(%rip),%rdi \n+\tlea 0x36a9d896(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114466,15 +114466,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c72e(%rip),%rdi \n+\tlea 0x36a9d72e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114525,15 +114525,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c5c6(%rip),%rdi \n+\tlea 0x36a9d5c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114584,15 +114584,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c45e(%rip),%rdi \n+\tlea 0x36a9d45e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114643,15 +114643,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c2f6(%rip),%rdi \n+\tlea 0x36a9d2f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114702,15 +114702,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c18e(%rip),%rdi \n+\tlea 0x36a9d18e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114761,15 +114761,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9c026(%rip),%rdi \n+\tlea 0x36a9d026(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114820,15 +114820,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9bebe(%rip),%rdi \n+\tlea 0x36a9cebe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114879,15 +114879,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9bd56(%rip),%rdi \n+\tlea 0x36a9cd56(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114938,15 +114938,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9bbee(%rip),%rdi \n+\tlea 0x36a9cbee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -114997,15 +114997,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ba86(%rip),%rdi \n+\tlea 0x36a9ca86(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115056,15 +115056,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b91e(%rip),%rdi \n+\tlea 0x36a9c91e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115115,15 +115115,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b7b6(%rip),%rdi \n+\tlea 0x36a9c7b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115174,15 +115174,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b64e(%rip),%rdi \n+\tlea 0x36a9c64e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115233,15 +115233,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b4e6(%rip),%rdi \n+\tlea 0x36a9c4e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115292,15 +115292,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b37e(%rip),%rdi \n+\tlea 0x36a9c37e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115351,15 +115351,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b216(%rip),%rdi \n+\tlea 0x36a9c216(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115410,15 +115410,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9b0ae(%rip),%rdi \n+\tlea 0x36a9c0ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115469,15 +115469,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9af46(%rip),%rdi \n+\tlea 0x36a9bf46(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115528,15 +115528,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9adde(%rip),%rdi \n+\tlea 0x36a9bdde(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115587,15 +115587,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ac76(%rip),%rdi \n+\tlea 0x36a9bc76(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115646,15 +115646,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9ab0e(%rip),%rdi \n+\tlea 0x36a9bb0e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115705,15 +115705,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a9a6(%rip),%rdi \n+\tlea 0x36a9b9a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115764,15 +115764,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a83e(%rip),%rdi \n+\tlea 0x36a9b83e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115823,15 +115823,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a6d6(%rip),%rdi \n+\tlea 0x36a9b6d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115882,15 +115882,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a56e(%rip),%rdi \n+\tlea 0x36a9b56e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -115941,15 +115941,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a406(%rip),%rdi \n+\tlea 0x36a9b406(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116000,15 +116000,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a29e(%rip),%rdi \n+\tlea 0x36a9b29e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116059,15 +116059,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9a136(%rip),%rdi \n+\tlea 0x36a9b136(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116118,15 +116118,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99fce(%rip),%rdi \n+\tlea 0x36a9afce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116177,15 +116177,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99e66(%rip),%rdi \n+\tlea 0x36a9ae66(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116236,15 +116236,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99cfe(%rip),%rdi \n+\tlea 0x36a9acfe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116295,15 +116295,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99b96(%rip),%rdi \n+\tlea 0x36a9ab96(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116354,15 +116354,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99a2e(%rip),%rdi \n+\tlea 0x36a9aa2e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116413,15 +116413,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a998c6(%rip),%rdi \n+\tlea 0x36a9a8c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116472,15 +116472,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9975e(%rip),%rdi \n+\tlea 0x36a9a75e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116531,15 +116531,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a995f6(%rip),%rdi \n+\tlea 0x36a9a5f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116590,15 +116590,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9948e(%rip),%rdi \n+\tlea 0x36a9a48e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116649,15 +116649,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99326(%rip),%rdi \n+\tlea 0x36a9a326(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116708,15 +116708,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a991be(%rip),%rdi \n+\tlea 0x36a9a1be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116767,15 +116767,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a99056(%rip),%rdi \n+\tlea 0x36a9a056(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116826,15 +116826,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a98eee(%rip),%rdi \n+\tlea 0x36a99eee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116885,15 +116885,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a98d86(%rip),%rdi \n+\tlea 0x36a99d86(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -116944,15 +116944,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a98c1e(%rip),%rdi \n+\tlea 0x36a99c1e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117003,15 +117003,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a98ab6(%rip),%rdi \n+\tlea 0x36a99ab6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117062,15 +117062,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9894e(%rip),%rdi \n+\tlea 0x36a9994e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117121,15 +117121,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a987e6(%rip),%rdi \n+\tlea 0x36a997e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117180,15 +117180,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9867e(%rip),%rdi \n+\tlea 0x36a9967e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117239,15 +117239,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a98516(%rip),%rdi \n+\tlea 0x36a99516(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117298,15 +117298,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a983ae(%rip),%rdi \n+\tlea 0x36a993ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117357,15 +117357,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a98246(%rip),%rdi \n+\tlea 0x36a99246(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117416,15 +117416,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a980de(%rip),%rdi \n+\tlea 0x36a990de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117475,15 +117475,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97f76(%rip),%rdi \n+\tlea 0x36a98f76(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117534,15 +117534,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97e0e(%rip),%rdi \n+\tlea 0x36a98e0e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117593,15 +117593,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97ca6(%rip),%rdi \n+\tlea 0x36a98ca6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117652,15 +117652,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97b3e(%rip),%rdi \n+\tlea 0x36a98b3e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117711,15 +117711,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a979d6(%rip),%rdi \n+\tlea 0x36a989d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117770,15 +117770,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9786e(%rip),%rdi \n+\tlea 0x36a9886e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117829,15 +117829,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97706(%rip),%rdi \n+\tlea 0x36a98706(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117888,15 +117888,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9759e(%rip),%rdi \n+\tlea 0x36a9859e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -117947,15 +117947,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97436(%rip),%rdi \n+\tlea 0x36a98436(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118006,15 +118006,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a972ce(%rip),%rdi \n+\tlea 0x36a982ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118065,15 +118065,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a97166(%rip),%rdi \n+\tlea 0x36a98166(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118124,15 +118124,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96ffe(%rip),%rdi \n+\tlea 0x36a97ffe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118183,15 +118183,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96e96(%rip),%rdi \n+\tlea 0x36a97e96(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118242,15 +118242,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96d2e(%rip),%rdi \n+\tlea 0x36a97d2e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118301,15 +118301,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96bc6(%rip),%rdi \n+\tlea 0x36a97bc6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118360,15 +118360,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96a5e(%rip),%rdi \n+\tlea 0x36a97a5e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118419,15 +118419,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a968f6(%rip),%rdi \n+\tlea 0x36a978f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118478,15 +118478,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9678e(%rip),%rdi \n+\tlea 0x36a9778e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118537,15 +118537,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96626(%rip),%rdi \n+\tlea 0x36a97626(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118596,15 +118596,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a964be(%rip),%rdi \n+\tlea 0x36a974be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118655,15 +118655,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96356(%rip),%rdi \n+\tlea 0x36a97356(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118714,15 +118714,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a961ee(%rip),%rdi \n+\tlea 0x36a971ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118773,15 +118773,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a96086(%rip),%rdi \n+\tlea 0x36a97086(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118832,15 +118832,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95f1e(%rip),%rdi \n+\tlea 0x36a96f1e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118891,15 +118891,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95db6(%rip),%rdi \n+\tlea 0x36a96db6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -118950,15 +118950,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95c4e(%rip),%rdi \n+\tlea 0x36a96c4e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119009,15 +119009,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95ae6(%rip),%rdi \n+\tlea 0x36a96ae6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119068,15 +119068,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9597e(%rip),%rdi \n+\tlea 0x36a9697e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119127,15 +119127,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95816(%rip),%rdi \n+\tlea 0x36a96816(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119186,15 +119186,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a956ae(%rip),%rdi \n+\tlea 0x36a966ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119245,15 +119245,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95546(%rip),%rdi \n+\tlea 0x36a96546(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119304,15 +119304,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a953de(%rip),%rdi \n+\tlea 0x36a963de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119363,15 +119363,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a95276(%rip),%rdi \n+\tlea 0x36a96276(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119422,15 +119422,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a9510e(%rip),%rdi \n+\tlea 0x36a9610e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119481,15 +119481,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a94fa6(%rip),%rdi \n+\tlea 0x36a95fa6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119540,15 +119540,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a94e3e(%rip),%rdi \n+\tlea 0x36a95e3e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119599,15 +119599,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a94cd6(%rip),%rdi \n+\tlea 0x36a95cd6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -119658,15 +119658,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a94b6e(%rip),%rdi \n+\tlea 0x36a95b6e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -120062,15 +120062,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a94515(%rip),%rdi \n+\tlea 0x36a95515(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp abc2f \n@@ -120297,15 +120297,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a941b6(%rip),%rdi \n+\tlea 0x36a951b6(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp ac00f \n@@ -120533,15 +120533,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a93e16(%rip),%rdi \n+\tlea 0x36a94e16(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp ac3ef \n@@ -120769,15 +120769,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a93a76(%rip),%rdi \n+\tlea 0x36a94a76(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp ac7cf \n@@ -120995,15 +120995,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a9376c(%rip),%rdi \n+\tlea 0x36a9476c(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp acb9f \n@@ -121231,15 +121231,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a93206(%rip),%rdi \n+\tlea 0x36a94206(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp acf7f \n@@ -121467,15 +121467,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a92f26(%rip),%rdi \n+\tlea 0x36a93f26(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp ad35f \n@@ -121710,15 +121710,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a92b6e(%rip),%rdi \n+\tlea 0x36a93b6e(%rip),%rdi \n \tjmp b4d59 \n \tlea -0x1(%r13),%rdi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:156\n \tlea (%r12,%r12,1),%r8\n \tmov %r14,%rsi\n \tmov %r12,%r9\n \tjmp ad75f \n@@ -121837,15 +121837,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a9278c(%rip),%rdi \n+\tlea 0x36a9378c(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -121936,15 +121936,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a92579(%rip),%rdi \n+\tlea 0x36a93579(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122035,15 +122035,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a92366(%rip),%rdi \n+\tlea 0x36a93366(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122134,15 +122134,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a92153(%rip),%rdi \n+\tlea 0x36a93153(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122233,15 +122233,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a91f40(%rip),%rdi \n+\tlea 0x36a92f40(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122332,15 +122332,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a91d2d(%rip),%rdi \n+\tlea 0x36a92d2d(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122431,15 +122431,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a91b1a(%rip),%rdi \n+\tlea 0x36a92b1a(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122530,15 +122530,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a9194f(%rip),%rdi \n+\tlea 0x36a9294f(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122629,15 +122629,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a9173c(%rip),%rdi \n+\tlea 0x36a9273c(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122728,15 +122728,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a91529(%rip),%rdi \n+\tlea 0x36a92529(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122827,15 +122827,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a91316(%rip),%rdi \n+\tlea 0x36a92316(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -122926,15 +122926,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a91103(%rip),%rdi \n+\tlea 0x36a92103(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123025,15 +123025,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a90ef0(%rip),%rdi \n+\tlea 0x36a91ef0(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123124,15 +123124,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a90cdd(%rip),%rdi \n+\tlea 0x36a91cdd(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123223,15 +123223,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a90ad2(%rip),%rdi \n+\tlea 0x36a91ad2(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123322,15 +123322,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a908bf(%rip),%rdi \n+\tlea 0x36a918bf(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123421,15 +123421,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a906ac(%rip),%rdi \n+\tlea 0x36a916ac(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123520,15 +123520,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a90499(%rip),%rdi \n+\tlea 0x36a91499(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123619,15 +123619,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a90286(%rip),%rdi \n+\tlea 0x36a91286(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123718,15 +123718,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a90073(%rip),%rdi \n+\tlea 0x36a91073(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123817,15 +123817,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8fe60(%rip),%rdi \n+\tlea 0x36a90e60(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -123916,15 +123916,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8fc55(%rip),%rdi \n+\tlea 0x36a90c55(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124015,15 +124015,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8fa42(%rip),%rdi \n+\tlea 0x36a90a42(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124114,15 +124114,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8f82f(%rip),%rdi \n+\tlea 0x36a9082f(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124213,15 +124213,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8f61c(%rip),%rdi \n+\tlea 0x36a9061c(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124312,15 +124312,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8f409(%rip),%rdi \n+\tlea 0x36a90409(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124411,15 +124411,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8f1f6(%rip),%rdi \n+\tlea 0x36a901f6(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124510,15 +124510,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8efe3(%rip),%rdi \n+\tlea 0x36a8ffe3(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124609,15 +124609,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8ee58(%rip),%rdi \n+\tlea 0x36a8fe58(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124708,15 +124708,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8ec45(%rip),%rdi \n+\tlea 0x36a8fc45(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124807,15 +124807,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8ea32(%rip),%rdi \n+\tlea 0x36a8fa32(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -124906,15 +124906,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8e81f(%rip),%rdi \n+\tlea 0x36a8f81f(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125005,15 +125005,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8e60c(%rip),%rdi \n+\tlea 0x36a8f60c(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125104,15 +125104,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8e3f9(%rip),%rdi \n+\tlea 0x36a8f3f9(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125203,15 +125203,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8e1e6(%rip),%rdi \n+\tlea 0x36a8f1e6(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125302,15 +125302,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8de1b(%rip),%rdi \n+\tlea 0x36a8ee1b(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125401,15 +125401,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8dc08(%rip),%rdi \n+\tlea 0x36a8ec08(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125500,15 +125500,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8d9f5(%rip),%rdi \n+\tlea 0x36a8e9f5(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125599,15 +125599,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8d7e2(%rip),%rdi \n+\tlea 0x36a8e7e2(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125698,15 +125698,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8d5cf(%rip),%rdi \n+\tlea 0x36a8e5cf(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125797,15 +125797,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8d3bc(%rip),%rdi \n+\tlea 0x36a8e3bc(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125896,15 +125896,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8d1a9(%rip),%rdi \n+\tlea 0x36a8e1a9(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -125995,15 +125995,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8d05e(%rip),%rdi \n+\tlea 0x36a8e05e(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126094,15 +126094,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8ce4b(%rip),%rdi \n+\tlea 0x36a8de4b(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126193,15 +126193,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8cc38(%rip),%rdi \n+\tlea 0x36a8dc38(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126292,15 +126292,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8ca25(%rip),%rdi \n+\tlea 0x36a8da25(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126391,15 +126391,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8c812(%rip),%rdi \n+\tlea 0x36a8d812(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126490,15 +126490,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8c5ff(%rip),%rdi \n+\tlea 0x36a8d5ff(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126589,15 +126589,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8c3ec(%rip),%rdi \n+\tlea 0x36a8d3ec(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:175\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126688,15 +126688,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8c1e1(%rip),%rdi \n+\tlea 0x36a8d1e1(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:181\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126787,15 +126787,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8bfce(%rip),%rdi \n+\tlea 0x36a8cfce(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:187\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126886,15 +126886,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8bdbb(%rip),%rdi \n+\tlea 0x36a8cdbb(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:193\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -126985,15 +126985,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8bba8(%rip),%rdi \n+\tlea 0x36a8cba8(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:199\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -127084,15 +127084,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8b995(%rip),%rdi \n+\tlea 0x36a8c995(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:205\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -127183,15 +127183,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8b782(%rip),%rdi \n+\tlea 0x36a8c782(%rip),%rdi \n \tjmp b4d59 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:211\n \tmovslq %r14d,%r8\n \tmov %r15,%rdi\n \tmov $0x1,%ecx\n \tcall 22270 <__hipPushCallConfiguration@plt>\n \ttest %eax,%eax\n@@ -127282,15 +127282,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8b56f(%rip),%rdi \n+\tlea 0x36a8c56f(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmv.cu:284\n \tadd $0x158,%rsp\n@@ -127392,15 +127392,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8b156(%rip),%rdi \n+\tlea 0x36a8c156(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127451,15 +127451,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8afee(%rip),%rdi \n+\tlea 0x36a8bfee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127510,15 +127510,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8ae86(%rip),%rdi \n+\tlea 0x36a8be86(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127569,15 +127569,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8ad1e(%rip),%rdi \n+\tlea 0x36a8bd1e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127628,15 +127628,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8abb6(%rip),%rdi \n+\tlea 0x36a8bbb6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127687,15 +127687,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8aa4e(%rip),%rdi \n+\tlea 0x36a8ba4e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127746,15 +127746,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a8e6(%rip),%rdi \n+\tlea 0x36a8b8e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127805,15 +127805,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a77e(%rip),%rdi \n+\tlea 0x36a8b77e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127864,15 +127864,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a616(%rip),%rdi \n+\tlea 0x36a8b616(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127923,15 +127923,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a4ae(%rip),%rdi \n+\tlea 0x36a8b4ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -127982,15 +127982,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a346(%rip),%rdi \n+\tlea 0x36a8b346(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128041,15 +128041,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a1de(%rip),%rdi \n+\tlea 0x36a8b1de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128100,15 +128100,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8a076(%rip),%rdi \n+\tlea 0x36a8b076(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128159,15 +128159,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89f0e(%rip),%rdi \n+\tlea 0x36a8af0e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128218,15 +128218,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89da6(%rip),%rdi \n+\tlea 0x36a8ada6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128277,15 +128277,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89c3e(%rip),%rdi \n+\tlea 0x36a8ac3e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128336,15 +128336,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89ad6(%rip),%rdi \n+\tlea 0x36a8aad6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128395,15 +128395,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8996e(%rip),%rdi \n+\tlea 0x36a8a96e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128454,15 +128454,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89806(%rip),%rdi \n+\tlea 0x36a8a806(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128513,15 +128513,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8969e(%rip),%rdi \n+\tlea 0x36a8a69e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128572,15 +128572,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89536(%rip),%rdi \n+\tlea 0x36a8a536(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128631,15 +128631,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a893ce(%rip),%rdi \n+\tlea 0x36a8a3ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128690,15 +128690,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a89266(%rip),%rdi \n+\tlea 0x36a8a266(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128749,15 +128749,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a890fe(%rip),%rdi \n+\tlea 0x36a8a0fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128808,15 +128808,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88f96(%rip),%rdi \n+\tlea 0x36a89f96(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128867,15 +128867,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88e2e(%rip),%rdi \n+\tlea 0x36a89e2e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128926,15 +128926,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88cc6(%rip),%rdi \n+\tlea 0x36a89cc6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -128985,15 +128985,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88b5e(%rip),%rdi \n+\tlea 0x36a89b5e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129044,15 +129044,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a889f6(%rip),%rdi \n+\tlea 0x36a899f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129103,15 +129103,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8888e(%rip),%rdi \n+\tlea 0x36a8988e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129162,15 +129162,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88726(%rip),%rdi \n+\tlea 0x36a89726(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129221,15 +129221,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a885be(%rip),%rdi \n+\tlea 0x36a895be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129280,15 +129280,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88456(%rip),%rdi \n+\tlea 0x36a89456(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129339,15 +129339,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a882ee(%rip),%rdi \n+\tlea 0x36a892ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129398,15 +129398,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a88186(%rip),%rdi \n+\tlea 0x36a89186(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129457,15 +129457,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8801e(%rip),%rdi \n+\tlea 0x36a8901e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129516,15 +129516,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87eb6(%rip),%rdi \n+\tlea 0x36a88eb6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129575,15 +129575,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87d4e(%rip),%rdi \n+\tlea 0x36a88d4e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129634,15 +129634,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87be6(%rip),%rdi \n+\tlea 0x36a88be6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129693,15 +129693,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87a7e(%rip),%rdi \n+\tlea 0x36a88a7e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129752,15 +129752,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87916(%rip),%rdi \n+\tlea 0x36a88916(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129811,15 +129811,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a877ae(%rip),%rdi \n+\tlea 0x36a887ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129870,15 +129870,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87646(%rip),%rdi \n+\tlea 0x36a88646(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129929,15 +129929,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a874de(%rip),%rdi \n+\tlea 0x36a884de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -129988,15 +129988,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a87376(%rip),%rdi \n+\tlea 0x36a88376(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130047,15 +130047,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8720e(%rip),%rdi \n+\tlea 0x36a8820e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130106,15 +130106,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a870a6(%rip),%rdi \n+\tlea 0x36a880a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130165,15 +130165,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86f3e(%rip),%rdi \n+\tlea 0x36a87f3e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130224,15 +130224,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86dd6(%rip),%rdi \n+\tlea 0x36a87dd6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130283,15 +130283,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86c6e(%rip),%rdi \n+\tlea 0x36a87c6e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130342,15 +130342,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86b06(%rip),%rdi \n+\tlea 0x36a87b06(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130401,15 +130401,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8699e(%rip),%rdi \n+\tlea 0x36a8799e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130460,15 +130460,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86836(%rip),%rdi \n+\tlea 0x36a87836(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130519,15 +130519,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a866ce(%rip),%rdi \n+\tlea 0x36a876ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130578,15 +130578,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86566(%rip),%rdi \n+\tlea 0x36a87566(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130637,15 +130637,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a863fe(%rip),%rdi \n+\tlea 0x36a873fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130696,15 +130696,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a86296(%rip),%rdi \n+\tlea 0x36a87296(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130755,15 +130755,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a8612e(%rip),%rdi \n+\tlea 0x36a8712e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130814,15 +130814,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a85fc6(%rip),%rdi \n+\tlea 0x36a86fc6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130873,15 +130873,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a85e5e(%rip),%rdi \n+\tlea 0x36a86e5e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130932,15 +130932,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a85cf6(%rip),%rdi \n+\tlea 0x36a86cf6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -130991,15 +130991,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a85b8e(%rip),%rdi \n+\tlea 0x36a86b8e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -131050,15 +131050,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a85a26(%rip),%rdi \n+\tlea 0x36a86a26(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -131109,2983 +131109,2983 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a858be(%rip),%rdi \n+\tlea 0x36a868be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_register_globals():\n \tpush %rbx\n \tmov %rdi,%rbx\n \tsub $0x20,%rsp\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a85085(%rip),%rsi \n+\tlea 0x36a86085(%rip),%rsi \n \tlea 0x229797(%rip),%rcx # 2e4229 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9fb9>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a85062(%rip),%rsi \n+\tlea 0x36a86062(%rip),%rsi \n \tlea 0x2297a4(%rip),%rcx # 2e4261 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9ff1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a8503c(%rip),%rsi \n+\tlea 0x36a8603c(%rip),%rsi \n \tlea 0x2297ae(%rip),%rcx # 2e4299 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa029>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a85016(%rip),%rsi \n+\tlea 0x36a86016(%rip),%rsi \n \tlea 0x2297b8(%rip),%rcx # 2e42d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa061>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84ff0(%rip),%rsi \n+\tlea 0x36a85ff0(%rip),%rsi \n \tlea 0x2297c3(%rip),%rcx # 2e430a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa09a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84fca(%rip),%rsi \n+\tlea 0x36a85fca(%rip),%rsi \n \tlea 0x2297ce(%rip),%rcx # 2e4343 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa0d3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84fa4(%rip),%rsi \n+\tlea 0x36a85fa4(%rip),%rsi \n \tlea 0x2297d9(%rip),%rcx # 2e437c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa10c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84f7e(%rip),%rsi \n+\tlea 0x36a85f7e(%rip),%rsi \n \tlea 0x2297e4(%rip),%rcx # 2e43b5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa145>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84f58(%rip),%rsi \n+\tlea 0x36a85f58(%rip),%rsi \n \tlea 0x2297ef(%rip),%rcx # 2e43ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa17e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84f32(%rip),%rsi \n+\tlea 0x36a85f32(%rip),%rsi \n \tlea 0x2297f9(%rip),%rcx # 2e4426 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa1b6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84f0c(%rip),%rsi \n+\tlea 0x36a85f0c(%rip),%rsi \n \tlea 0x229803(%rip),%rcx # 2e445e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa1ee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84ee6(%rip),%rsi \n+\tlea 0x36a85ee6(%rip),%rsi \n \tlea 0x22980d(%rip),%rcx # 2e4496 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa226>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84ec0(%rip),%rsi \n+\tlea 0x36a85ec0(%rip),%rsi \n \tlea 0x229818(%rip),%rcx # 2e44cf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa25f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84e9a(%rip),%rsi \n+\tlea 0x36a85e9a(%rip),%rsi \n \tlea 0x229823(%rip),%rcx # 2e4508 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa298>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84e74(%rip),%rsi \n+\tlea 0x36a85e74(%rip),%rsi \n \tlea 0x22982e(%rip),%rcx # 2e4541 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa2d1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84e4e(%rip),%rsi \n+\tlea 0x36a85e4e(%rip),%rsi \n \tlea 0x229839(%rip),%rcx # 2e457a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa30a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84e28(%rip),%rsi \n+\tlea 0x36a85e28(%rip),%rsi \n \tlea 0x229844(%rip),%rcx # 2e45b3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa343>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84e02(%rip),%rsi \n+\tlea 0x36a85e02(%rip),%rsi \n \tlea 0x22984e(%rip),%rcx # 2e45eb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa37b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84ddc(%rip),%rsi \n+\tlea 0x36a85ddc(%rip),%rsi \n \tlea 0x229858(%rip),%rcx # 2e4623 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa3b3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84db6(%rip),%rsi \n+\tlea 0x36a85db6(%rip),%rsi \n \tlea 0x229862(%rip),%rcx # 2e465b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa3eb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84d90(%rip),%rsi \n+\tlea 0x36a85d90(%rip),%rsi \n \tlea 0x22986d(%rip),%rcx # 2e4694 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa424>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84d6a(%rip),%rsi \n+\tlea 0x36a85d6a(%rip),%rsi \n \tlea 0x229878(%rip),%rcx # 2e46cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa45d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84d44(%rip),%rsi \n+\tlea 0x36a85d44(%rip),%rsi \n \tlea 0x229883(%rip),%rcx # 2e4706 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa496>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84d1e(%rip),%rsi \n+\tlea 0x36a85d1e(%rip),%rsi \n \tlea 0x22988e(%rip),%rcx # 2e473f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa4cf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84cf8(%rip),%rsi \n+\tlea 0x36a85cf8(%rip),%rsi \n \tlea 0x229899(%rip),%rcx # 2e4778 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa508>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84cd2(%rip),%rsi \n+\tlea 0x36a85cd2(%rip),%rsi \n \tlea 0x2298a3(%rip),%rcx # 2e47b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa540>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84cac(%rip),%rsi \n+\tlea 0x36a85cac(%rip),%rsi \n \tlea 0x2298ad(%rip),%rcx # 2e47e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa578>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84c86(%rip),%rsi \n+\tlea 0x36a85c86(%rip),%rsi \n \tlea 0x2298b7(%rip),%rcx # 2e4820 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa5b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84c60(%rip),%rsi \n+\tlea 0x36a85c60(%rip),%rsi \n \tlea 0x2298c2(%rip),%rcx # 2e4859 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa5e9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84c3a(%rip),%rsi \n+\tlea 0x36a85c3a(%rip),%rsi \n \tlea 0x2298cd(%rip),%rcx # 2e4892 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa622>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84c14(%rip),%rsi \n+\tlea 0x36a85c14(%rip),%rsi \n \tlea 0x2298d8(%rip),%rcx # 2e48cb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa65b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84bee(%rip),%rsi \n+\tlea 0x36a85bee(%rip),%rsi \n \tlea 0x2298e3(%rip),%rcx # 2e4904 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa694>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84bc8(%rip),%rsi \n+\tlea 0x36a85bc8(%rip),%rsi \n \tlea 0x2298ee(%rip),%rcx # 2e493d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa6cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84ba2(%rip),%rsi \n+\tlea 0x36a85ba2(%rip),%rsi \n \tlea 0x2298f8(%rip),%rcx # 2e4975 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa705>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84b7c(%rip),%rsi \n+\tlea 0x36a85b7c(%rip),%rsi \n \tlea 0x229902(%rip),%rcx # 2e49ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa73d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84b56(%rip),%rsi \n+\tlea 0x36a85b56(%rip),%rsi \n \tlea 0x22990c(%rip),%rcx # 2e49e5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa775>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84b30(%rip),%rsi \n+\tlea 0x36a85b30(%rip),%rsi \n \tlea 0x229917(%rip),%rcx # 2e4a1e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa7ae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84b0a(%rip),%rsi \n+\tlea 0x36a85b0a(%rip),%rsi \n \tlea 0x229922(%rip),%rcx # 2e4a57 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa7e7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84ae4(%rip),%rsi \n+\tlea 0x36a85ae4(%rip),%rsi \n \tlea 0x22992d(%rip),%rcx # 2e4a90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa820>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84abe(%rip),%rsi \n+\tlea 0x36a85abe(%rip),%rsi \n \tlea 0x229938(%rip),%rcx # 2e4ac9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa859>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84a98(%rip),%rsi \n+\tlea 0x36a85a98(%rip),%rsi \n \tlea 0x229943(%rip),%rcx # 2e4b02 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa892>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84a72(%rip),%rsi \n+\tlea 0x36a85a72(%rip),%rsi \n \tlea 0x22994d(%rip),%rcx # 2e4b3a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa8ca>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84a4c(%rip),%rsi \n+\tlea 0x36a85a4c(%rip),%rsi \n \tlea 0x229957(%rip),%rcx # 2e4b72 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa902>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84a26(%rip),%rsi \n+\tlea 0x36a85a26(%rip),%rsi \n \tlea 0x229961(%rip),%rcx # 2e4baa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa93a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84a00(%rip),%rsi \n+\tlea 0x36a85a00(%rip),%rsi \n \tlea 0x22996c(%rip),%rcx # 2e4be3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa973>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a849da(%rip),%rsi \n+\tlea 0x36a859da(%rip),%rsi \n \tlea 0x229977(%rip),%rcx # 2e4c1c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa9ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a849b4(%rip),%rsi \n+\tlea 0x36a859b4(%rip),%rsi \n \tlea 0x229982(%rip),%rcx # 2e4c55 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xa9e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a8498e(%rip),%rsi \n+\tlea 0x36a8598e(%rip),%rsi \n \tlea 0x22998d(%rip),%rcx # 2e4c8e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaa1e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84968(%rip),%rsi \n+\tlea 0x36a85968(%rip),%rsi \n \tlea 0x229998(%rip),%rcx # 2e4cc7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaa57>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a84942(%rip),%rsi \n+\tlea 0x36a85942(%rip),%rsi \n \tlea 0x2299a2(%rip),%rcx # 2e4cff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaa8f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a8491c(%rip),%rsi \n+\tlea 0x36a8591c(%rip),%rsi \n \tlea 0x2299ac(%rip),%rcx # 2e4d37 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaac7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a848f6(%rip),%rsi \n+\tlea 0x36a858f6(%rip),%rsi \n \tlea 0x2299b6(%rip),%rcx # 2e4d6f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaaff>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a848d8(%rip),%rsi \n+\tlea 0x36a858d8(%rip),%rsi \n \tlea 0x2299c9(%rip),%rcx # 2e4da8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xab38>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a848b2(%rip),%rsi \n+\tlea 0x36a858b2(%rip),%rsi \n \tlea 0x2299d4(%rip),%rcx # 2e4de1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xab71>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8488c(%rip),%rsi \n+\tlea 0x36a8588c(%rip),%rsi \n \tlea 0x2299df(%rip),%rcx # 2e4e1a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xabaa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84866(%rip),%rsi \n+\tlea 0x36a85866(%rip),%rsi \n \tlea 0x2299ea(%rip),%rcx # 2e4e53 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xabe3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84840(%rip),%rsi \n+\tlea 0x36a85840(%rip),%rsi \n \tlea 0x2299f5(%rip),%rcx # 2e4e8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xac1c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8481a(%rip),%rsi \n+\tlea 0x36a8581a(%rip),%rsi \n \tlea 0x2299ff(%rip),%rcx # 2e4ec4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xac54>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a847f4(%rip),%rsi \n+\tlea 0x36a857f4(%rip),%rsi \n \tlea 0x229a09(%rip),%rcx # 2e4efc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xac8c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a847ce(%rip),%rsi \n+\tlea 0x36a857ce(%rip),%rsi \n \tlea 0x229a13(%rip),%rcx # 2e4f34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xacc4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a847a8(%rip),%rsi \n+\tlea 0x36a857a8(%rip),%rsi \n \tlea 0x229a1e(%rip),%rcx # 2e4f6d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xacfd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84782(%rip),%rsi \n+\tlea 0x36a85782(%rip),%rsi \n \tlea 0x229a29(%rip),%rcx # 2e4fa6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xad36>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8475c(%rip),%rsi \n+\tlea 0x36a8575c(%rip),%rsi \n \tlea 0x229a34(%rip),%rcx # 2e4fdf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xad6f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84736(%rip),%rsi \n+\tlea 0x36a85736(%rip),%rsi \n \tlea 0x229a3f(%rip),%rcx # 2e5018 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xada8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84710(%rip),%rsi \n+\tlea 0x36a85710(%rip),%rsi \n \tlea 0x229a4a(%rip),%rcx # 2e5051 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xade1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a846ea(%rip),%rsi \n+\tlea 0x36a856ea(%rip),%rsi \n \tlea 0x229a5c(%rip),%rcx # 2e5091 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xae21>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a846c4(%rip),%rsi \n+\tlea 0x36a856c4(%rip),%rsi \n \tlea 0x229a6e(%rip),%rcx # 2e50d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xae61>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8469e(%rip),%rsi \n+\tlea 0x36a8569e(%rip),%rsi \n \tlea 0x229a80(%rip),%rcx # 2e5111 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaea1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84678(%rip),%rsi \n+\tlea 0x36a85678(%rip),%rsi \n \tlea 0x229a93(%rip),%rcx # 2e5152 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaee2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84652(%rip),%rsi \n+\tlea 0x36a85652(%rip),%rsi \n \tlea 0x229aa6(%rip),%rcx # 2e5193 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaf23>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8462c(%rip),%rsi \n+\tlea 0x36a8562c(%rip),%rsi \n \tlea 0x229ab9(%rip),%rcx # 2e51d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xaf64>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84606(%rip),%rsi \n+\tlea 0x36a85606(%rip),%rsi \n \tlea 0x229acc(%rip),%rcx # 2e5215 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xafa5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a845e0(%rip),%rsi \n+\tlea 0x36a855e0(%rip),%rsi \n \tlea 0x229adf(%rip),%rcx # 2e5256 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xafe6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a845ba(%rip),%rsi \n+\tlea 0x36a855ba(%rip),%rsi \n \tlea 0x229af1(%rip),%rcx # 2e5296 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb026>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84594(%rip),%rsi \n+\tlea 0x36a85594(%rip),%rsi \n \tlea 0x229b03(%rip),%rcx # 2e52d6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb066>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8456e(%rip),%rsi \n+\tlea 0x36a8556e(%rip),%rsi \n \tlea 0x229b15(%rip),%rcx # 2e5316 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb0a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84548(%rip),%rsi \n+\tlea 0x36a85548(%rip),%rsi \n \tlea 0x229b28(%rip),%rcx # 2e5357 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb0e7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84522(%rip),%rsi \n+\tlea 0x36a85522(%rip),%rsi \n \tlea 0x229b3b(%rip),%rcx # 2e5398 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb128>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a844fc(%rip),%rsi \n+\tlea 0x36a854fc(%rip),%rsi \n \tlea 0x229b4e(%rip),%rcx # 2e53d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb169>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a844d6(%rip),%rsi \n+\tlea 0x36a854d6(%rip),%rsi \n \tlea 0x229b61(%rip),%rcx # 2e541a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb1aa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a844b0(%rip),%rsi \n+\tlea 0x36a854b0(%rip),%rsi \n \tlea 0x229b74(%rip),%rcx # 2e545b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb1eb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8448a(%rip),%rsi \n+\tlea 0x36a8548a(%rip),%rsi \n \tlea 0x229b86(%rip),%rcx # 2e549b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb22b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84464(%rip),%rsi \n+\tlea 0x36a85464(%rip),%rsi \n \tlea 0x229b98(%rip),%rcx # 2e54db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb26b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8443e(%rip),%rsi \n+\tlea 0x36a8543e(%rip),%rsi \n \tlea 0x229baa(%rip),%rcx # 2e551b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb2ab>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84418(%rip),%rsi \n+\tlea 0x36a85418(%rip),%rsi \n \tlea 0x229bbd(%rip),%rcx # 2e555c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb2ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a843f2(%rip),%rsi \n+\tlea 0x36a853f2(%rip),%rsi \n \tlea 0x229bd0(%rip),%rcx # 2e559d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb32d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a843cc(%rip),%rsi \n+\tlea 0x36a853cc(%rip),%rsi \n \tlea 0x229be3(%rip),%rcx # 2e55de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb36e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a843a6(%rip),%rsi \n+\tlea 0x36a853a6(%rip),%rsi \n \tlea 0x229bf6(%rip),%rcx # 2e561f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb3af>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84380(%rip),%rsi \n+\tlea 0x36a85380(%rip),%rsi \n \tlea 0x229c09(%rip),%rcx # 2e5660 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb3f0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8435a(%rip),%rsi \n+\tlea 0x36a8535a(%rip),%rsi \n \tlea 0x229c1b(%rip),%rcx # 2e56a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb430>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84334(%rip),%rsi \n+\tlea 0x36a85334(%rip),%rsi \n \tlea 0x229c2d(%rip),%rcx # 2e56e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb470>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8430e(%rip),%rsi \n+\tlea 0x36a8530e(%rip),%rsi \n \tlea 0x229c3f(%rip),%rcx # 2e5720 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb4b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a842e8(%rip),%rsi \n+\tlea 0x36a852e8(%rip),%rsi \n \tlea 0x229c52(%rip),%rcx # 2e5761 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb4f1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a842c2(%rip),%rsi \n+\tlea 0x36a852c2(%rip),%rsi \n \tlea 0x229c65(%rip),%rcx # 2e57a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb532>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8429c(%rip),%rsi \n+\tlea 0x36a8529c(%rip),%rsi \n \tlea 0x229c78(%rip),%rcx # 2e57e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb573>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84276(%rip),%rsi \n+\tlea 0x36a85276(%rip),%rsi \n \tlea 0x229c8b(%rip),%rcx # 2e5824 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb5b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84250(%rip),%rsi \n+\tlea 0x36a85250(%rip),%rsi \n \tlea 0x229c9e(%rip),%rcx # 2e5865 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb5f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8422a(%rip),%rsi \n+\tlea 0x36a8522a(%rip),%rsi \n \tlea 0x229cb0(%rip),%rcx # 2e58a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb635>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84204(%rip),%rsi \n+\tlea 0x36a85204(%rip),%rsi \n \tlea 0x229cc2(%rip),%rcx # 2e58e5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb675>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a841de(%rip),%rsi \n+\tlea 0x36a851de(%rip),%rsi \n \tlea 0x229cd4(%rip),%rcx # 2e5925 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb6b5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a841b8(%rip),%rsi \n+\tlea 0x36a851b8(%rip),%rsi \n \tlea 0x229ce7(%rip),%rcx # 2e5966 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb6f6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84192(%rip),%rsi \n+\tlea 0x36a85192(%rip),%rsi \n \tlea 0x229cfa(%rip),%rcx # 2e59a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb737>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8416c(%rip),%rsi \n+\tlea 0x36a8516c(%rip),%rsi \n \tlea 0x229d0d(%rip),%rcx # 2e59e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb778>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84146(%rip),%rsi \n+\tlea 0x36a85146(%rip),%rsi \n \tlea 0x229d20(%rip),%rcx # 2e5a29 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb7b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84120(%rip),%rsi \n+\tlea 0x36a85120(%rip),%rsi \n \tlea 0x229d33(%rip),%rcx # 2e5a6a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb7fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a840fa(%rip),%rsi \n+\tlea 0x36a850fa(%rip),%rsi \n \tlea 0x229d45(%rip),%rcx # 2e5aaa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb83a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a840d4(%rip),%rsi \n+\tlea 0x36a850d4(%rip),%rsi \n \tlea 0x229d57(%rip),%rcx # 2e5aea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb87a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a840ae(%rip),%rsi \n+\tlea 0x36a850ae(%rip),%rsi \n \tlea 0x229d69(%rip),%rcx # 2e5b2a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb8ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84088(%rip),%rsi \n+\tlea 0x36a85088(%rip),%rsi \n \tlea 0x229d7c(%rip),%rcx # 2e5b6b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb8fb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84062(%rip),%rsi \n+\tlea 0x36a85062(%rip),%rsi \n \tlea 0x229d8f(%rip),%rcx # 2e5bac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb93c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8403c(%rip),%rsi \n+\tlea 0x36a8503c(%rip),%rsi \n \tlea 0x229da2(%rip),%rcx # 2e5bed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb97d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a84016(%rip),%rsi \n+\tlea 0x36a85016(%rip),%rsi \n \tlea 0x229db5(%rip),%rcx # 2e5c2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb9be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83ff0(%rip),%rsi \n+\tlea 0x36a84ff0(%rip),%rsi \n \tlea 0x229dc8(%rip),%rcx # 2e5c6f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xb9ff>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83fca(%rip),%rsi \n+\tlea 0x36a84fca(%rip),%rsi \n \tlea 0x229dda(%rip),%rcx # 2e5caf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xba3f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83fa4(%rip),%rsi \n+\tlea 0x36a84fa4(%rip),%rsi \n \tlea 0x229dec(%rip),%rcx # 2e5cef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xba7f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83f7e(%rip),%rsi \n+\tlea 0x36a84f7e(%rip),%rsi \n \tlea 0x229dfe(%rip),%rcx # 2e5d2f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbabf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83f58(%rip),%rsi \n+\tlea 0x36a84f58(%rip),%rsi \n \tlea 0x229e11(%rip),%rcx # 2e5d70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbb00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83f32(%rip),%rsi \n+\tlea 0x36a84f32(%rip),%rsi \n \tlea 0x229e24(%rip),%rcx # 2e5db1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbb41>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83f0c(%rip),%rsi \n+\tlea 0x36a84f0c(%rip),%rsi \n \tlea 0x229e37(%rip),%rcx # 2e5df2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbb82>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83ee6(%rip),%rsi \n+\tlea 0x36a84ee6(%rip),%rsi \n \tlea 0x229e4a(%rip),%rcx # 2e5e33 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbbc3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83ec0(%rip),%rsi \n+\tlea 0x36a84ec0(%rip),%rsi \n \tlea 0x229e5d(%rip),%rcx # 2e5e74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbc04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83e9a(%rip),%rsi \n+\tlea 0x36a84e9a(%rip),%rsi \n \tlea 0x229e6f(%rip),%rcx # 2e5eb4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbc44>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83e74(%rip),%rsi \n+\tlea 0x36a84e74(%rip),%rsi \n \tlea 0x229e81(%rip),%rcx # 2e5ef4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbc84>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83e4e(%rip),%rsi \n+\tlea 0x36a84e4e(%rip),%rsi \n \tlea 0x229e93(%rip),%rcx # 2e5f34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbcc4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83e28(%rip),%rsi \n+\tlea 0x36a84e28(%rip),%rsi \n \tlea 0x229ea6(%rip),%rcx # 2e5f75 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbd05>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83e02(%rip),%rsi \n+\tlea 0x36a84e02(%rip),%rsi \n \tlea 0x229eb9(%rip),%rcx # 2e5fb6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbd46>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83ddc(%rip),%rsi \n+\tlea 0x36a84ddc(%rip),%rsi \n \tlea 0x229ecc(%rip),%rcx # 2e5ff7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbd87>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83db6(%rip),%rsi \n+\tlea 0x36a84db6(%rip),%rsi \n \tlea 0x229edf(%rip),%rcx # 2e6038 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbdc8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83d90(%rip),%rsi \n+\tlea 0x36a84d90(%rip),%rsi \n \tlea 0x229ef2(%rip),%rcx # 2e6079 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbe09>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83d6a(%rip),%rsi \n+\tlea 0x36a84d6a(%rip),%rsi \n \tlea 0x229f02(%rip),%rcx # 2e60b7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbe47>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83d44(%rip),%rsi \n+\tlea 0x36a84d44(%rip),%rsi \n \tlea 0x229f12(%rip),%rcx # 2e60f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbe85>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83d1e(%rip),%rsi \n+\tlea 0x36a84d1e(%rip),%rsi \n \tlea 0x229f22(%rip),%rcx # 2e6133 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbec3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83cf8(%rip),%rsi \n+\tlea 0x36a84cf8(%rip),%rsi \n \tlea 0x229f33(%rip),%rcx # 2e6172 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbf02>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83cd2(%rip),%rsi \n+\tlea 0x36a84cd2(%rip),%rsi \n \tlea 0x229f44(%rip),%rcx # 2e61b1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbf41>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83cac(%rip),%rsi \n+\tlea 0x36a84cac(%rip),%rsi \n \tlea 0x229f55(%rip),%rcx # 2e61f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbf80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83c86(%rip),%rsi \n+\tlea 0x36a84c86(%rip),%rsi \n \tlea 0x229f66(%rip),%rcx # 2e622f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbfbf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83c60(%rip),%rsi \n+\tlea 0x36a84c60(%rip),%rsi \n \tlea 0x229f77(%rip),%rcx # 2e626e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xbffe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83c3a(%rip),%rsi \n+\tlea 0x36a84c3a(%rip),%rsi \n \tlea 0x229f87(%rip),%rcx # 2e62ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc03c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83c14(%rip),%rsi \n+\tlea 0x36a84c14(%rip),%rsi \n \tlea 0x229f97(%rip),%rcx # 2e62ea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc07a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83bee(%rip),%rsi \n+\tlea 0x36a84bee(%rip),%rsi \n \tlea 0x229fa7(%rip),%rcx # 2e6328 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc0b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83bc8(%rip),%rsi \n+\tlea 0x36a84bc8(%rip),%rsi \n \tlea 0x229fb8(%rip),%rcx # 2e6367 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc0f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83ba2(%rip),%rsi \n+\tlea 0x36a84ba2(%rip),%rsi \n \tlea 0x229fc9(%rip),%rcx # 2e63a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc136>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83b7c(%rip),%rsi \n+\tlea 0x36a84b7c(%rip),%rsi \n \tlea 0x229fda(%rip),%rcx # 2e63e5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc175>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83b56(%rip),%rsi \n+\tlea 0x36a84b56(%rip),%rsi \n \tlea 0x229feb(%rip),%rcx # 2e6424 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc1b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83b30(%rip),%rsi \n+\tlea 0x36a84b30(%rip),%rsi \n \tlea 0x229ffc(%rip),%rcx # 2e6463 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc1f3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83b0a(%rip),%rsi \n+\tlea 0x36a84b0a(%rip),%rsi \n \tlea 0x22a00c(%rip),%rcx # 2e64a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc231>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83ae4(%rip),%rsi \n+\tlea 0x36a84ae4(%rip),%rsi \n \tlea 0x22a01c(%rip),%rcx # 2e64df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc26f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83abe(%rip),%rsi \n+\tlea 0x36a84abe(%rip),%rsi \n \tlea 0x22a02c(%rip),%rcx # 2e651d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc2ad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83a98(%rip),%rsi \n+\tlea 0x36a84a98(%rip),%rsi \n \tlea 0x22a03d(%rip),%rcx # 2e655c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc2ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83a72(%rip),%rsi \n+\tlea 0x36a84a72(%rip),%rsi \n \tlea 0x22a04e(%rip),%rcx # 2e659b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc32b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83a4c(%rip),%rsi \n+\tlea 0x36a84a4c(%rip),%rsi \n \tlea 0x22a05f(%rip),%rcx # 2e65da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc36a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83a26(%rip),%rsi \n+\tlea 0x36a84a26(%rip),%rsi \n \tlea 0x22a070(%rip),%rcx # 2e6619 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc3a9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83a00(%rip),%rsi \n+\tlea 0x36a84a00(%rip),%rsi \n \tlea 0x22a081(%rip),%rcx # 2e6658 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc3e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a839da(%rip),%rsi \n+\tlea 0x36a849da(%rip),%rsi \n \tlea 0x22a091(%rip),%rcx # 2e6696 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc426>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a839b4(%rip),%rsi \n+\tlea 0x36a849b4(%rip),%rsi \n \tlea 0x22a0a1(%rip),%rcx # 2e66d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc464>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8398e(%rip),%rsi \n+\tlea 0x36a8498e(%rip),%rsi \n \tlea 0x22a0b1(%rip),%rcx # 2e6712 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc4a2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83968(%rip),%rsi \n+\tlea 0x36a84968(%rip),%rsi \n \tlea 0x22a0c2(%rip),%rcx # 2e6751 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc4e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83942(%rip),%rsi \n+\tlea 0x36a84942(%rip),%rsi \n \tlea 0x22a0d3(%rip),%rcx # 2e6790 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc520>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8391c(%rip),%rsi \n+\tlea 0x36a8491c(%rip),%rsi \n \tlea 0x22a0e4(%rip),%rcx # 2e67cf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc55f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a838f6(%rip),%rsi \n+\tlea 0x36a848f6(%rip),%rsi \n \tlea 0x22a0f5(%rip),%rcx # 2e680e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc59e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a838d0(%rip),%rsi \n+\tlea 0x36a848d0(%rip),%rsi \n \tlea 0x22a106(%rip),%rcx # 2e684d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5dd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a838aa(%rip),%rsi \n+\tlea 0x36a848aa(%rip),%rsi \n \tlea 0x22a116(%rip),%rcx # 2e688b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc61b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83884(%rip),%rsi \n+\tlea 0x36a84884(%rip),%rsi \n \tlea 0x22a126(%rip),%rcx # 2e68c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc659>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8385e(%rip),%rsi \n+\tlea 0x36a8485e(%rip),%rsi \n \tlea 0x22a136(%rip),%rcx # 2e6907 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc697>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83838(%rip),%rsi \n+\tlea 0x36a84838(%rip),%rsi \n \tlea 0x22a147(%rip),%rcx # 2e6946 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc6d6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83812(%rip),%rsi \n+\tlea 0x36a84812(%rip),%rsi \n \tlea 0x22a158(%rip),%rcx # 2e6985 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc715>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a837ec(%rip),%rsi \n+\tlea 0x36a847ec(%rip),%rsi \n \tlea 0x22a169(%rip),%rcx # 2e69c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc754>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a837c6(%rip),%rsi \n+\tlea 0x36a847c6(%rip),%rsi \n \tlea 0x22a17a(%rip),%rcx # 2e6a03 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc793>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a837a0(%rip),%rsi \n+\tlea 0x36a847a0(%rip),%rsi \n \tlea 0x22a18b(%rip),%rcx # 2e6a42 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc7d2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8377a(%rip),%rsi \n+\tlea 0x36a8477a(%rip),%rsi \n \tlea 0x22a19b(%rip),%rcx # 2e6a80 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc810>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83754(%rip),%rsi \n+\tlea 0x36a84754(%rip),%rsi \n \tlea 0x22a1ab(%rip),%rcx # 2e6abe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc84e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8372e(%rip),%rsi \n+\tlea 0x36a8472e(%rip),%rsi \n \tlea 0x22a1bb(%rip),%rcx # 2e6afc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc88c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83708(%rip),%rsi \n+\tlea 0x36a84708(%rip),%rsi \n \tlea 0x22a1cc(%rip),%rcx # 2e6b3b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc8cb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a836e2(%rip),%rsi \n+\tlea 0x36a846e2(%rip),%rsi \n \tlea 0x22a1dd(%rip),%rcx # 2e6b7a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc90a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a836bc(%rip),%rsi \n+\tlea 0x36a846bc(%rip),%rsi \n \tlea 0x22a1ee(%rip),%rcx # 2e6bb9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc949>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83696(%rip),%rsi \n+\tlea 0x36a84696(%rip),%rsi \n \tlea 0x22a1ff(%rip),%rcx # 2e6bf8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc988>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83670(%rip),%rsi \n+\tlea 0x36a84670(%rip),%rsi \n \tlea 0x22a210(%rip),%rcx # 2e6c37 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc9c7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8364a(%rip),%rsi \n+\tlea 0x36a8464a(%rip),%rsi \n \tlea 0x22a220(%rip),%rcx # 2e6c75 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xca05>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83624(%rip),%rsi \n+\tlea 0x36a84624(%rip),%rsi \n \tlea 0x22a230(%rip),%rcx # 2e6cb3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xca43>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a835fe(%rip),%rsi \n+\tlea 0x36a845fe(%rip),%rsi \n \tlea 0x22a240(%rip),%rcx # 2e6cf1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xca81>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a835d8(%rip),%rsi \n+\tlea 0x36a845d8(%rip),%rsi \n \tlea 0x22a251(%rip),%rcx # 2e6d30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcac0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a835b2(%rip),%rsi \n+\tlea 0x36a845b2(%rip),%rsi \n \tlea 0x22a262(%rip),%rcx # 2e6d6f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcaff>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8358c(%rip),%rsi \n+\tlea 0x36a8458c(%rip),%rsi \n \tlea 0x22a273(%rip),%rcx # 2e6dae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcb3e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83566(%rip),%rsi \n+\tlea 0x36a84566(%rip),%rsi \n \tlea 0x22a284(%rip),%rcx # 2e6ded (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcb7d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83540(%rip),%rsi \n+\tlea 0x36a84540(%rip),%rsi \n \tlea 0x22a295(%rip),%rcx # 2e6e2c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcbbc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8351a(%rip),%rsi \n+\tlea 0x36a8451a(%rip),%rsi \n \tlea 0x22a2a5(%rip),%rcx # 2e6e6a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcbfa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a834f4(%rip),%rsi \n+\tlea 0x36a844f4(%rip),%rsi \n \tlea 0x22a2b5(%rip),%rcx # 2e6ea8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc38>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a834ce(%rip),%rsi \n+\tlea 0x36a844ce(%rip),%rsi \n \tlea 0x22a2c5(%rip),%rcx # 2e6ee6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc76>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a834a8(%rip),%rsi \n+\tlea 0x36a844a8(%rip),%rsi \n \tlea 0x22a2d6(%rip),%rcx # 2e6f25 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xccb5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83482(%rip),%rsi \n+\tlea 0x36a84482(%rip),%rsi \n \tlea 0x22a2e7(%rip),%rcx # 2e6f64 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xccf4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8345c(%rip),%rsi \n+\tlea 0x36a8445c(%rip),%rsi \n \tlea 0x22a2f8(%rip),%rcx # 2e6fa3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcd33>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83436(%rip),%rsi \n+\tlea 0x36a84436(%rip),%rsi \n \tlea 0x22a309(%rip),%rcx # 2e6fe2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcd72>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83410(%rip),%rsi \n+\tlea 0x36a84410(%rip),%rsi \n \tlea 0x22a31a(%rip),%rcx # 2e7021 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcdb1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a833ea(%rip),%rsi \n+\tlea 0x36a843ea(%rip),%rsi \n \tlea 0x22a331(%rip),%rcx # 2e7066 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcdf6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a833c4(%rip),%rsi \n+\tlea 0x36a843c4(%rip),%rsi \n \tlea 0x22a348(%rip),%rcx # 2e70ab (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xce3b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8339e(%rip),%rsi \n+\tlea 0x36a8439e(%rip),%rsi \n \tlea 0x22a35f(%rip),%rcx # 2e70f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xce80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83378(%rip),%rsi \n+\tlea 0x36a84378(%rip),%rsi \n \tlea 0x22a377(%rip),%rcx # 2e7136 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcec6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83352(%rip),%rsi \n+\tlea 0x36a84352(%rip),%rsi \n \tlea 0x22a38f(%rip),%rcx # 2e717c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf0c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8332c(%rip),%rsi \n+\tlea 0x36a8432c(%rip),%rsi \n \tlea 0x22a3a7(%rip),%rcx # 2e71c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf52>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83306(%rip),%rsi \n+\tlea 0x36a84306(%rip),%rsi \n \tlea 0x22a3bf(%rip),%rcx # 2e7208 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf98>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a832e0(%rip),%rsi \n+\tlea 0x36a842e0(%rip),%rsi \n \tlea 0x22a3d7(%rip),%rcx # 2e724e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcfde>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a832ba(%rip),%rsi \n+\tlea 0x36a842ba(%rip),%rsi \n \tlea 0x22a3ee(%rip),%rcx # 2e7293 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd023>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83294(%rip),%rsi \n+\tlea 0x36a84294(%rip),%rsi \n \tlea 0x22a405(%rip),%rcx # 2e72d8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd068>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8326e(%rip),%rsi \n+\tlea 0x36a8426e(%rip),%rsi \n \tlea 0x22a41c(%rip),%rcx # 2e731d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd0ad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83248(%rip),%rsi \n+\tlea 0x36a84248(%rip),%rsi \n \tlea 0x22a434(%rip),%rcx # 2e7363 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd0f3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83222(%rip),%rsi \n+\tlea 0x36a84222(%rip),%rsi \n \tlea 0x22a44c(%rip),%rcx # 2e73a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd139>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a831fc(%rip),%rsi \n+\tlea 0x36a841fc(%rip),%rsi \n \tlea 0x22a464(%rip),%rcx # 2e73ef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd17f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a831d6(%rip),%rsi \n+\tlea 0x36a841d6(%rip),%rsi \n \tlea 0x22a47c(%rip),%rcx # 2e7435 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd1c5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a831b0(%rip),%rsi \n+\tlea 0x36a841b0(%rip),%rsi \n \tlea 0x22a494(%rip),%rcx # 2e747b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd20b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8318a(%rip),%rsi \n+\tlea 0x36a8418a(%rip),%rsi \n \tlea 0x22a4ab(%rip),%rcx # 2e74c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd250>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83164(%rip),%rsi \n+\tlea 0x36a84164(%rip),%rsi \n \tlea 0x22a4c2(%rip),%rcx # 2e7505 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd295>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8313e(%rip),%rsi \n+\tlea 0x36a8413e(%rip),%rsi \n \tlea 0x22a4d9(%rip),%rcx # 2e754a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd2da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83118(%rip),%rsi \n+\tlea 0x36a84118(%rip),%rsi \n \tlea 0x22a4f1(%rip),%rcx # 2e7590 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd320>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a830f2(%rip),%rsi \n+\tlea 0x36a840f2(%rip),%rsi \n \tlea 0x22a509(%rip),%rcx # 2e75d6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd366>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a830cc(%rip),%rsi \n+\tlea 0x36a840cc(%rip),%rsi \n \tlea 0x22a521(%rip),%rcx # 2e761c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd3ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a830a6(%rip),%rsi \n+\tlea 0x36a840a6(%rip),%rsi \n \tlea 0x22a539(%rip),%rcx # 2e7662 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd3f2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83080(%rip),%rsi \n+\tlea 0x36a84080(%rip),%rsi \n \tlea 0x22a551(%rip),%rcx # 2e76a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd438>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8305a(%rip),%rsi \n+\tlea 0x36a8405a(%rip),%rsi \n \tlea 0x22a568(%rip),%rcx # 2e76ed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd47d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a83034(%rip),%rsi \n+\tlea 0x36a84034(%rip),%rsi \n \tlea 0x22a57f(%rip),%rcx # 2e7732 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd4c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a8300e(%rip),%rsi \n+\tlea 0x36a8400e(%rip),%rsi \n \tlea 0x22a596(%rip),%rcx # 2e7777 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd507>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82fe8(%rip),%rsi \n+\tlea 0x36a83fe8(%rip),%rsi \n \tlea 0x22a5ae(%rip),%rcx # 2e77bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd54d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82fc2(%rip),%rsi \n+\tlea 0x36a83fc2(%rip),%rsi \n \tlea 0x22a5c6(%rip),%rcx # 2e7803 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd593>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82f9c(%rip),%rsi \n+\tlea 0x36a83f9c(%rip),%rsi \n \tlea 0x22a5de(%rip),%rcx # 2e7849 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd5d9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82f76(%rip),%rsi \n+\tlea 0x36a83f76(%rip),%rsi \n \tlea 0x22a5f6(%rip),%rcx # 2e788f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd61f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82f50(%rip),%rsi \n+\tlea 0x36a83f50(%rip),%rsi \n \tlea 0x22a60e(%rip),%rcx # 2e78d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd665>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82f2a(%rip),%rsi \n+\tlea 0x36a83f2a(%rip),%rsi \n \tlea 0x22a625(%rip),%rcx # 2e791a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6aa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82f04(%rip),%rsi \n+\tlea 0x36a83f04(%rip),%rsi \n \tlea 0x22a63c(%rip),%rcx # 2e795f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6ef>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82ede(%rip),%rsi \n+\tlea 0x36a83ede(%rip),%rsi \n \tlea 0x22a653(%rip),%rcx # 2e79a4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd734>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82eb8(%rip),%rsi \n+\tlea 0x36a83eb8(%rip),%rsi \n \tlea 0x22a66b(%rip),%rcx # 2e79ea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd77a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82e92(%rip),%rsi \n+\tlea 0x36a83e92(%rip),%rsi \n \tlea 0x22a683(%rip),%rcx # 2e7a30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd7c0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82e6c(%rip),%rsi \n+\tlea 0x36a83e6c(%rip),%rsi \n \tlea 0x22a69b(%rip),%rcx # 2e7a76 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd806>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82e46(%rip),%rsi \n+\tlea 0x36a83e46(%rip),%rsi \n \tlea 0x22a6b3(%rip),%rcx # 2e7abc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd84c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82e20(%rip),%rsi \n+\tlea 0x36a83e20(%rip),%rsi \n \tlea 0x22a6cb(%rip),%rcx # 2e7b02 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd892>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82dfa(%rip),%rsi \n+\tlea 0x36a83dfa(%rip),%rsi \n \tlea 0x22a6e2(%rip),%rcx # 2e7b47 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd8d7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82dd4(%rip),%rsi \n+\tlea 0x36a83dd4(%rip),%rsi \n \tlea 0x22a6f9(%rip),%rcx # 2e7b8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd91c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82dae(%rip),%rsi \n+\tlea 0x36a83dae(%rip),%rsi \n \tlea 0x22a710(%rip),%rcx # 2e7bd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd961>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82d88(%rip),%rsi \n+\tlea 0x36a83d88(%rip),%rsi \n \tlea 0x22a728(%rip),%rcx # 2e7c17 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd9a7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82d62(%rip),%rsi \n+\tlea 0x36a83d62(%rip),%rsi \n \tlea 0x22a740(%rip),%rcx # 2e7c5d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd9ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82d3c(%rip),%rsi \n+\tlea 0x36a83d3c(%rip),%rsi \n \tlea 0x22a758(%rip),%rcx # 2e7ca3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xda33>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82d16(%rip),%rsi \n+\tlea 0x36a83d16(%rip),%rsi \n \tlea 0x22a770(%rip),%rcx # 2e7ce9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xda79>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82cf0(%rip),%rsi \n+\tlea 0x36a83cf0(%rip),%rsi \n \tlea 0x22a788(%rip),%rcx # 2e7d2f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdabf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82cca(%rip),%rsi \n+\tlea 0x36a83cca(%rip),%rsi \n \tlea 0x22a79f(%rip),%rcx # 2e7d74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdb04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82ca4(%rip),%rsi \n+\tlea 0x36a83ca4(%rip),%rsi \n \tlea 0x22a7b6(%rip),%rcx # 2e7db9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdb49>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82c7e(%rip),%rsi \n+\tlea 0x36a83c7e(%rip),%rsi \n \tlea 0x22a7cd(%rip),%rcx # 2e7dfe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdb8e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82c58(%rip),%rsi \n+\tlea 0x36a83c58(%rip),%rsi \n \tlea 0x22a7e5(%rip),%rcx # 2e7e44 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdbd4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82c32(%rip),%rsi \n+\tlea 0x36a83c32(%rip),%rsi \n \tlea 0x22a7fd(%rip),%rcx # 2e7e8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdc1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82c0c(%rip),%rsi \n+\tlea 0x36a83c0c(%rip),%rsi \n \tlea 0x22a815(%rip),%rcx # 2e7ed0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdc60>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82be6(%rip),%rsi \n+\tlea 0x36a83be6(%rip),%rsi \n \tlea 0x22a82d(%rip),%rcx # 2e7f16 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdca6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82bc0(%rip),%rsi \n+\tlea 0x36a83bc0(%rip),%rsi \n \tlea 0x22a845(%rip),%rcx # 2e7f5c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdcec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82b9a(%rip),%rsi \n+\tlea 0x36a83b9a(%rip),%rsi \n \tlea 0x22a85c(%rip),%rcx # 2e7fa1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdd31>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82b74(%rip),%rsi \n+\tlea 0x36a83b74(%rip),%rsi \n \tlea 0x22a873(%rip),%rcx # 2e7fe6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdd76>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82b4e(%rip),%rsi \n+\tlea 0x36a83b4e(%rip),%rsi \n \tlea 0x22a88a(%rip),%rcx # 2e802b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddbb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82b28(%rip),%rsi \n+\tlea 0x36a83b28(%rip),%rsi \n \tlea 0x22a8a2(%rip),%rcx # 2e8071 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xde01>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82b02(%rip),%rsi \n+\tlea 0x36a83b02(%rip),%rsi \n \tlea 0x22a8ba(%rip),%rcx # 2e80b7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xde47>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82adc(%rip),%rsi \n+\tlea 0x36a83adc(%rip),%rsi \n \tlea 0x22a8d2(%rip),%rcx # 2e80fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xde8d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a82ab6(%rip),%rsi \n+\tlea 0x36a83ab6(%rip),%rsi \n \tlea 0x22a8ea(%rip),%rcx # 2e8143 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xded3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n@@ -134094,33 +134094,33 @@\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tret\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rax\n-\tmov 0x36a88ab0(%rip),%rdi # 36b46338 ::get_beta()::val@@Base+0x20>\n+\tmov 0x36a89ab0(%rip),%rdi # 36b47338 ::get_beta()::val@@Base+0x20>\n \ttest %rdi,%rdi\n \tjne bd8a3 \n-\tlea 0x36a879b4(%rip),%rdi # 36b45248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4810>\n+\tlea 0x36a889b4(%rip),%rdi # 36b46248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4810>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a88a95(%rip) # 36b46338 ::get_beta()::val@@Base+0x20>\n+\tmov %rax,0x36a89a95(%rip) # 36b47338 ::get_beta()::val@@Base+0x20>\n \tcall baa70 \n \tlea 0x11(%rip),%rdi \n \tpop %rax\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a88a71(%rip),%rdi # 36b46338 ::get_beta()::val@@Base+0x20>\n+\tmov 0x36a89a71(%rip),%rdi # 36b47338 ::get_beta()::val@@Base+0x20>\n \ttest %rdi,%rdi\n \tje bd8e1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a88a5b(%rip) # 36b46338 ::get_beta()::val@@Base+0x20>\n+\tmovq $0x0,0x36a89a5b(%rip) # 36b47338 ::get_beta()::val@@Base+0x20>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000bd8f0 :\n ggml_cuda_mul_mat_vec_q(ggml_backend_cuda_context&, ggml_tensor const*, ggml_tensor const*, ggml_tensor const*, ggml_tensor*):\n@@ -135082,15 +135082,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a81c5c(%rip),%rdi \n+\tlea 0x36a82c5c(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -135247,15 +135247,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a819a9(%rip),%rdi \n+\tlea 0x36a829a9(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -135412,15 +135412,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a816f6(%rip),%rdi \n+\tlea 0x36a826f6(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -135577,15 +135577,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a81443(%rip),%rdi \n+\tlea 0x36a82443(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -135742,15 +135742,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a81190(%rip),%rdi \n+\tlea 0x36a82190(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -135907,15 +135907,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a80edd(%rip),%rdi \n+\tlea 0x36a81edd(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -136072,15 +136072,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a80c2a(%rip),%rdi \n+\tlea 0x36a81c2a(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -136237,15 +136237,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a80977(%rip),%rdi \n+\tlea 0x36a81977(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -136402,15 +136402,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a806c4(%rip),%rdi \n+\tlea 0x36a816c4(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -136567,15 +136567,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a80411(%rip),%rdi \n+\tlea 0x36a81411(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -136732,15 +136732,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a8015e(%rip),%rdi \n+\tlea 0x36a8115e(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -136897,15 +136897,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7feab(%rip),%rdi \n+\tlea 0x36a80eab(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -137062,15 +137062,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7fc38(%rip),%rdi \n+\tlea 0x36a80c38(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -137227,15 +137227,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7f985(%rip),%rdi \n+\tlea 0x36a80985(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -137392,15 +137392,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7f712(%rip),%rdi \n+\tlea 0x36a80712(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -137557,15 +137557,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7f49f(%rip),%rdi \n+\tlea 0x36a8049f(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -137722,15 +137722,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7f02c(%rip),%rdi \n+\tlea 0x36a8002c(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -137887,15 +137887,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7ee79(%rip),%rdi \n+\tlea 0x36a7fe79(%rip),%rdi \n \tjmp d42a9 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:245\n \tmov %r14d,%eax\n \txor %edx,%edx\n \tdiv %ecx\n \ttest %rdx,%rdx\n \tjne d42d4 \n@@ -138052,15 +138052,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7eb06(%rip),%rdi \n+\tlea 0x36a7fb06(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138167,15 +138167,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7e50b(%rip),%rdi \n+\tlea 0x36a7f50b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138282,15 +138282,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7e2d0(%rip),%rdi \n+\tlea 0x36a7f2d0(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138397,15 +138397,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7e095(%rip),%rdi \n+\tlea 0x36a7f095(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138508,15 +138508,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7de6e(%rip),%rdi \n+\tlea 0x36a7ee6e(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138619,15 +138619,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7dc47(%rip),%rdi \n+\tlea 0x36a7ec47(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138730,15 +138730,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7da20(%rip),%rdi \n+\tlea 0x36a7ea20(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138841,15 +138841,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7d7f9(%rip),%rdi \n+\tlea 0x36a7e7f9(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -138956,15 +138956,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7d5c6(%rip),%rdi \n+\tlea 0x36a7e5c6(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139071,15 +139071,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7d38b(%rip),%rdi \n+\tlea 0x36a7e38b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139186,15 +139186,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7d150(%rip),%rdi \n+\tlea 0x36a7e150(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139297,15 +139297,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7cf29(%rip),%rdi \n+\tlea 0x36a7df29(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139408,15 +139408,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7cd02(%rip),%rdi \n+\tlea 0x36a7dd02(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139519,15 +139519,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7cadb(%rip),%rdi \n+\tlea 0x36a7dadb(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139630,15 +139630,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7c8b4(%rip),%rdi \n+\tlea 0x36a7d8b4(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139745,15 +139745,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7c681(%rip),%rdi \n+\tlea 0x36a7d681(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139860,15 +139860,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7c446(%rip),%rdi \n+\tlea 0x36a7d446(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -139975,15 +139975,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7c20b(%rip),%rdi \n+\tlea 0x36a7d20b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140086,15 +140086,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7bfe4(%rip),%rdi \n+\tlea 0x36a7cfe4(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140197,15 +140197,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7bdbd(%rip),%rdi \n+\tlea 0x36a7cdbd(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140308,15 +140308,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7bb96(%rip),%rdi \n+\tlea 0x36a7cb96(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140419,15 +140419,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7b96f(%rip),%rdi \n+\tlea 0x36a7c96f(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140534,15 +140534,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7b73c(%rip),%rdi \n+\tlea 0x36a7c73c(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140649,15 +140649,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7b501(%rip),%rdi \n+\tlea 0x36a7c501(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140764,15 +140764,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7b2c6(%rip),%rdi \n+\tlea 0x36a7c2c6(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140875,15 +140875,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7b09f(%rip),%rdi \n+\tlea 0x36a7c09f(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -140986,15 +140986,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7ae78(%rip),%rdi \n+\tlea 0x36a7be78(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141097,15 +141097,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7ac51(%rip),%rdi \n+\tlea 0x36a7bc51(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141208,15 +141208,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7aa2a(%rip),%rdi \n+\tlea 0x36a7ba2a(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141323,15 +141323,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7a7f7(%rip),%rdi \n+\tlea 0x36a7b7f7(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141438,15 +141438,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7a5bc(%rip),%rdi \n+\tlea 0x36a7b5bc(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141553,15 +141553,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7a381(%rip),%rdi \n+\tlea 0x36a7b381(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141664,15 +141664,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7a15a(%rip),%rdi \n+\tlea 0x36a7b15a(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141775,15 +141775,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a79f33(%rip),%rdi \n+\tlea 0x36a7af33(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141886,15 +141886,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a79d0c(%rip),%rdi \n+\tlea 0x36a7ad0c(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -141997,15 +141997,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a79ae5(%rip),%rdi \n+\tlea 0x36a7aae5(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142112,15 +142112,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a798b2(%rip),%rdi \n+\tlea 0x36a7a8b2(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142227,15 +142227,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a79677(%rip),%rdi \n+\tlea 0x36a7a677(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142342,15 +142342,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7943c(%rip),%rdi \n+\tlea 0x36a7a43c(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142453,15 +142453,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a79215(%rip),%rdi \n+\tlea 0x36a7a215(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142564,15 +142564,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a78fee(%rip),%rdi \n+\tlea 0x36a79fee(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142675,15 +142675,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a78dc7(%rip),%rdi \n+\tlea 0x36a79dc7(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142786,15 +142786,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a78ba0(%rip),%rdi \n+\tlea 0x36a79ba0(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -142901,15 +142901,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7896d(%rip),%rdi \n+\tlea 0x36a7996d(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143016,15 +143016,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a78732(%rip),%rdi \n+\tlea 0x36a79732(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143131,15 +143131,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a784f7(%rip),%rdi \n+\tlea 0x36a794f7(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143242,15 +143242,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a782d0(%rip),%rdi \n+\tlea 0x36a792d0(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143353,15 +143353,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a780a9(%rip),%rdi \n+\tlea 0x36a790a9(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143464,15 +143464,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a77e82(%rip),%rdi \n+\tlea 0x36a78e82(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143575,15 +143575,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a77c5b(%rip),%rdi \n+\tlea 0x36a78c5b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143690,15 +143690,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a77a28(%rip),%rdi \n+\tlea 0x36a78a28(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143805,15 +143805,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a777ed(%rip),%rdi \n+\tlea 0x36a787ed(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -143920,15 +143920,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a775b2(%rip),%rdi \n+\tlea 0x36a785b2(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144031,15 +144031,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7738b(%rip),%rdi \n+\tlea 0x36a7838b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144142,15 +144142,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a77164(%rip),%rdi \n+\tlea 0x36a78164(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144253,15 +144253,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a76f3d(%rip),%rdi \n+\tlea 0x36a77f3d(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144364,15 +144364,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a76d16(%rip),%rdi \n+\tlea 0x36a77d16(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144479,15 +144479,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a76ae3(%rip),%rdi \n+\tlea 0x36a77ae3(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144594,15 +144594,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a768a8(%rip),%rdi \n+\tlea 0x36a778a8(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144709,15 +144709,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7666d(%rip),%rdi \n+\tlea 0x36a7766d(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144820,15 +144820,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a76446(%rip),%rdi \n+\tlea 0x36a77446(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -144931,15 +144931,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7621f(%rip),%rdi \n+\tlea 0x36a7721f(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145042,15 +145042,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a75ff8(%rip),%rdi \n+\tlea 0x36a76ff8(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145153,15 +145153,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a75dd1(%rip),%rdi \n+\tlea 0x36a76dd1(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145268,15 +145268,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a75b9e(%rip),%rdi \n+\tlea 0x36a76b9e(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145383,15 +145383,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a75963(%rip),%rdi \n+\tlea 0x36a76963(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145498,15 +145498,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a75728(%rip),%rdi \n+\tlea 0x36a76728(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145609,15 +145609,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a75501(%rip),%rdi \n+\tlea 0x36a76501(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145720,15 +145720,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a752da(%rip),%rdi \n+\tlea 0x36a762da(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145831,15 +145831,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a750b3(%rip),%rdi \n+\tlea 0x36a760b3(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -145942,15 +145942,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a74e8c(%rip),%rdi \n+\tlea 0x36a75e8c(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146057,15 +146057,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a74c59(%rip),%rdi \n+\tlea 0x36a75c59(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146172,15 +146172,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a74a1e(%rip),%rdi \n+\tlea 0x36a75a1e(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146287,15 +146287,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a747e3(%rip),%rdi \n+\tlea 0x36a757e3(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146398,15 +146398,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a745bc(%rip),%rdi \n+\tlea 0x36a755bc(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146509,15 +146509,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a74395(%rip),%rdi \n+\tlea 0x36a75395(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146620,15 +146620,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7416e(%rip),%rdi \n+\tlea 0x36a7516e(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146731,15 +146731,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73f47(%rip),%rdi \n+\tlea 0x36a74f47(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146846,15 +146846,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73d14(%rip),%rdi \n+\tlea 0x36a74d14(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -146961,15 +146961,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73ad9(%rip),%rdi \n+\tlea 0x36a74ad9(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147076,15 +147076,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7389e(%rip),%rdi \n+\tlea 0x36a7489e(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147187,15 +147187,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73677(%rip),%rdi \n+\tlea 0x36a74677(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147298,15 +147298,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73450(%rip),%rdi \n+\tlea 0x36a74450(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147409,15 +147409,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73229(%rip),%rdi \n+\tlea 0x36a74229(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147520,15 +147520,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a73002(%rip),%rdi \n+\tlea 0x36a74002(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147635,15 +147635,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a72e0f(%rip),%rdi \n+\tlea 0x36a73e0f(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147750,15 +147750,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a72bd4(%rip),%rdi \n+\tlea 0x36a73bd4(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147865,15 +147865,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a72999(%rip),%rdi \n+\tlea 0x36a73999(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -147976,15 +147976,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a72772(%rip),%rdi \n+\tlea 0x36a73772(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148087,15 +148087,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7254b(%rip),%rdi \n+\tlea 0x36a7354b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148198,15 +148198,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a72324(%rip),%rdi \n+\tlea 0x36a73324(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148309,15 +148309,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a720fd(%rip),%rdi \n+\tlea 0x36a730fd(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148424,15 +148424,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a71eca(%rip),%rdi \n+\tlea 0x36a72eca(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148539,15 +148539,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a71c8f(%rip),%rdi \n+\tlea 0x36a72c8f(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148654,15 +148654,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a71a54(%rip),%rdi \n+\tlea 0x36a72a54(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148765,15 +148765,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a7182d(%rip),%rdi \n+\tlea 0x36a7282d(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148876,15 +148876,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a71606(%rip),%rdi \n+\tlea 0x36a72606(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -148987,15 +148987,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a713df(%rip),%rdi \n+\tlea 0x36a723df(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149098,15 +149098,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a711b8(%rip),%rdi \n+\tlea 0x36a721b8(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149213,15 +149213,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a70fc5(%rip),%rdi \n+\tlea 0x36a71fc5(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149328,15 +149328,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a70d8a(%rip),%rdi \n+\tlea 0x36a71d8a(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149443,15 +149443,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a70b4f(%rip),%rdi \n+\tlea 0x36a71b4f(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149554,15 +149554,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a70928(%rip),%rdi \n+\tlea 0x36a71928(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149665,15 +149665,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a70701(%rip),%rdi \n+\tlea 0x36a71701(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149776,15 +149776,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a704da(%rip),%rdi \n+\tlea 0x36a714da(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -149887,15 +149887,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a702b3(%rip),%rdi \n+\tlea 0x36a712b3(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150002,15 +150002,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a700c0(%rip),%rdi \n+\tlea 0x36a710c0(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150117,15 +150117,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6fe85(%rip),%rdi \n+\tlea 0x36a70e85(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150232,15 +150232,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6fc4a(%rip),%rdi \n+\tlea 0x36a70c4a(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150343,15 +150343,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6fa23(%rip),%rdi \n+\tlea 0x36a70a23(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150454,15 +150454,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6f7fc(%rip),%rdi \n+\tlea 0x36a707fc(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150565,15 +150565,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6f5d5(%rip),%rdi \n+\tlea 0x36a705d5(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150676,15 +150676,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6f3ae(%rip),%rdi \n+\tlea 0x36a703ae(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150791,15 +150791,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6efbb(%rip),%rdi \n+\tlea 0x36a6ffbb(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -150906,15 +150906,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6ed80(%rip),%rdi \n+\tlea 0x36a6fd80(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151021,15 +151021,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6eb45(%rip),%rdi \n+\tlea 0x36a6fb45(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151132,15 +151132,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6e91e(%rip),%rdi \n+\tlea 0x36a6f91e(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151243,15 +151243,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6e6f7(%rip),%rdi \n+\tlea 0x36a6f6f7(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151354,15 +151354,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6e4d0(%rip),%rdi \n+\tlea 0x36a6f4d0(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151465,15 +151465,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6e2a9(%rip),%rdi \n+\tlea 0x36a6f2a9(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151580,15 +151580,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6e176(%rip),%rdi \n+\tlea 0x36a6f176(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151695,15 +151695,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6df3b(%rip),%rdi \n+\tlea 0x36a6ef3b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151810,15 +151810,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6dd00(%rip),%rdi \n+\tlea 0x36a6ed00(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -151921,15 +151921,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6dad9(%rip),%rdi \n+\tlea 0x36a6ead9(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152032,15 +152032,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6d8b2(%rip),%rdi \n+\tlea 0x36a6e8b2(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152143,15 +152143,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6d68b(%rip),%rdi \n+\tlea 0x36a6e68b(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152254,15 +152254,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6d464(%rip),%rdi \n+\tlea 0x36a6e464(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152369,15 +152369,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6d171(%rip),%rdi \n+\tlea 0x36a6e171(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152484,15 +152484,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6cf36(%rip),%rdi \n+\tlea 0x36a6df36(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \tcmp $0x1,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152599,15 +152599,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6ccfb(%rip),%rdi \n+\tlea 0x36a6dcfb(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152710,15 +152710,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6cad4(%rip),%rdi \n+\tlea 0x36a6dad4(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152821,15 +152821,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6c8ad(%rip),%rdi \n+\tlea 0x36a6d8ad(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -152932,15 +152932,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6c686(%rip),%rdi \n+\tlea 0x36a6d686(%rip),%rdi \n \tjmp d42a9 \n calc_nwarps(int, mmvq_parameter_table_id):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:84\n \txor %ecx,%ecx\n \ttest %eax,%eax\n \tsete %cl\n \tshl $0x20,%rcx\n@@ -153043,15 +153043,15 @@\n \tlea 0x48(%rsp),%rdx\n \tlea 0x40(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x60(%rsp),%rsi\n \tmov 0x68(%rsp),%edx\n \tmov 0x50(%rsp),%rcx\n \tmov 0x58(%rsp),%r8d\n-\tlea 0x36a6c45f(%rip),%rdi \n+\tlea 0x36a6d45f(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x40(%rsp)\n \tpush 0x50(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/mmvq.cu:489\n \tadd $0x138,%rsp\n@@ -153232,15 +153232,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6bd56(%rip),%rdi \n+\tlea 0x36a6cd56(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153291,15 +153291,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6bbee(%rip),%rdi \n+\tlea 0x36a6cbee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153350,15 +153350,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6ba86(%rip),%rdi \n+\tlea 0x36a6ca86(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153409,15 +153409,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b91e(%rip),%rdi \n+\tlea 0x36a6c91e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153468,15 +153468,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b7b6(%rip),%rdi \n+\tlea 0x36a6c7b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153527,15 +153527,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b64e(%rip),%rdi \n+\tlea 0x36a6c64e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153586,15 +153586,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b4e6(%rip),%rdi \n+\tlea 0x36a6c4e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153645,15 +153645,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b37e(%rip),%rdi \n+\tlea 0x36a6c37e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153704,15 +153704,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b216(%rip),%rdi \n+\tlea 0x36a6c216(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153763,15 +153763,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6b0ae(%rip),%rdi \n+\tlea 0x36a6c0ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153822,15 +153822,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6af46(%rip),%rdi \n+\tlea 0x36a6bf46(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153881,15 +153881,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6adde(%rip),%rdi \n+\tlea 0x36a6bdde(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153940,15 +153940,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6ac76(%rip),%rdi \n+\tlea 0x36a6bc76(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -153999,15 +153999,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6ab0e(%rip),%rdi \n+\tlea 0x36a6bb0e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154058,15 +154058,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a9a6(%rip),%rdi \n+\tlea 0x36a6b9a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154117,15 +154117,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a83e(%rip),%rdi \n+\tlea 0x36a6b83e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154176,15 +154176,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a6d6(%rip),%rdi \n+\tlea 0x36a6b6d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154235,15 +154235,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a56e(%rip),%rdi \n+\tlea 0x36a6b56e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154294,15 +154294,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a406(%rip),%rdi \n+\tlea 0x36a6b406(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154353,15 +154353,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a29e(%rip),%rdi \n+\tlea 0x36a6b29e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154412,15 +154412,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6a136(%rip),%rdi \n+\tlea 0x36a6b136(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154471,15 +154471,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69fce(%rip),%rdi \n+\tlea 0x36a6afce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154530,15 +154530,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69e66(%rip),%rdi \n+\tlea 0x36a6ae66(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154589,15 +154589,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69cfe(%rip),%rdi \n+\tlea 0x36a6acfe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154648,15 +154648,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69b96(%rip),%rdi \n+\tlea 0x36a6ab96(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154707,15 +154707,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69a2e(%rip),%rdi \n+\tlea 0x36a6aa2e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154766,15 +154766,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a698c6(%rip),%rdi \n+\tlea 0x36a6a8c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154825,15 +154825,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6975e(%rip),%rdi \n+\tlea 0x36a6a75e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154884,15 +154884,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a695f6(%rip),%rdi \n+\tlea 0x36a6a5f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -154943,15 +154943,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6948e(%rip),%rdi \n+\tlea 0x36a6a48e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155002,15 +155002,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69326(%rip),%rdi \n+\tlea 0x36a6a326(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155061,15 +155061,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a691be(%rip),%rdi \n+\tlea 0x36a6a1be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155120,15 +155120,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a69056(%rip),%rdi \n+\tlea 0x36a6a056(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155179,15 +155179,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a68eee(%rip),%rdi \n+\tlea 0x36a69eee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155238,15 +155238,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a68d86(%rip),%rdi \n+\tlea 0x36a69d86(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155297,15 +155297,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a68c1e(%rip),%rdi \n+\tlea 0x36a69c1e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155356,15 +155356,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a68ab6(%rip),%rdi \n+\tlea 0x36a69ab6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155415,15 +155415,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6894e(%rip),%rdi \n+\tlea 0x36a6994e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155474,15 +155474,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a687e6(%rip),%rdi \n+\tlea 0x36a697e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155533,15 +155533,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6867e(%rip),%rdi \n+\tlea 0x36a6967e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155592,15 +155592,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a68516(%rip),%rdi \n+\tlea 0x36a69516(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155651,15 +155651,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a683ae(%rip),%rdi \n+\tlea 0x36a693ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155710,15 +155710,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a68246(%rip),%rdi \n+\tlea 0x36a69246(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155769,15 +155769,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a680de(%rip),%rdi \n+\tlea 0x36a690de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155828,15 +155828,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67f76(%rip),%rdi \n+\tlea 0x36a68f76(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155887,15 +155887,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67e0e(%rip),%rdi \n+\tlea 0x36a68e0e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -155946,15 +155946,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67ca6(%rip),%rdi \n+\tlea 0x36a68ca6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156005,15 +156005,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67b3e(%rip),%rdi \n+\tlea 0x36a68b3e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156064,15 +156064,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a679d6(%rip),%rdi \n+\tlea 0x36a689d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156123,15 +156123,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6786e(%rip),%rdi \n+\tlea 0x36a6886e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156182,15 +156182,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67706(%rip),%rdi \n+\tlea 0x36a68706(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156241,15 +156241,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6759e(%rip),%rdi \n+\tlea 0x36a6859e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156300,15 +156300,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67436(%rip),%rdi \n+\tlea 0x36a68436(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156359,15 +156359,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a672ce(%rip),%rdi \n+\tlea 0x36a682ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156418,15 +156418,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a67166(%rip),%rdi \n+\tlea 0x36a68166(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156477,15 +156477,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66ffe(%rip),%rdi \n+\tlea 0x36a67ffe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156536,15 +156536,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66e96(%rip),%rdi \n+\tlea 0x36a67e96(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156595,15 +156595,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66d2e(%rip),%rdi \n+\tlea 0x36a67d2e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156654,15 +156654,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66bc6(%rip),%rdi \n+\tlea 0x36a67bc6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156713,15 +156713,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66a5e(%rip),%rdi \n+\tlea 0x36a67a5e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156772,15 +156772,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a668f6(%rip),%rdi \n+\tlea 0x36a678f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156831,15 +156831,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6678e(%rip),%rdi \n+\tlea 0x36a6778e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156890,15 +156890,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66626(%rip),%rdi \n+\tlea 0x36a67626(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -156949,15 +156949,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a664be(%rip),%rdi \n+\tlea 0x36a674be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157008,15 +157008,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66356(%rip),%rdi \n+\tlea 0x36a67356(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157067,15 +157067,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a661ee(%rip),%rdi \n+\tlea 0x36a671ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157126,15 +157126,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a66086(%rip),%rdi \n+\tlea 0x36a67086(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157185,15 +157185,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65f1e(%rip),%rdi \n+\tlea 0x36a66f1e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157244,15 +157244,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65db6(%rip),%rdi \n+\tlea 0x36a66db6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157303,15 +157303,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65c4e(%rip),%rdi \n+\tlea 0x36a66c4e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157362,15 +157362,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65ae6(%rip),%rdi \n+\tlea 0x36a66ae6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157421,15 +157421,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6597e(%rip),%rdi \n+\tlea 0x36a6697e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157480,15 +157480,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65816(%rip),%rdi \n+\tlea 0x36a66816(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157539,15 +157539,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a656ae(%rip),%rdi \n+\tlea 0x36a666ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157598,15 +157598,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65546(%rip),%rdi \n+\tlea 0x36a66546(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157657,15 +157657,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a653de(%rip),%rdi \n+\tlea 0x36a663de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157716,15 +157716,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a65276(%rip),%rdi \n+\tlea 0x36a66276(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157775,15 +157775,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6510e(%rip),%rdi \n+\tlea 0x36a6610e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157834,15 +157834,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64fa6(%rip),%rdi \n+\tlea 0x36a65fa6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157893,15 +157893,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64e3e(%rip),%rdi \n+\tlea 0x36a65e3e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -157952,15 +157952,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64cd6(%rip),%rdi \n+\tlea 0x36a65cd6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158011,15 +158011,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64b6e(%rip),%rdi \n+\tlea 0x36a65b6e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158070,15 +158070,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64a06(%rip),%rdi \n+\tlea 0x36a65a06(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158129,15 +158129,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6489e(%rip),%rdi \n+\tlea 0x36a6589e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158188,15 +158188,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64736(%rip),%rdi \n+\tlea 0x36a65736(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158247,15 +158247,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a645ce(%rip),%rdi \n+\tlea 0x36a655ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158306,15 +158306,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64466(%rip),%rdi \n+\tlea 0x36a65466(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158365,15 +158365,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a642fe(%rip),%rdi \n+\tlea 0x36a652fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158424,15 +158424,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a64196(%rip),%rdi \n+\tlea 0x36a65196(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158483,15 +158483,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6402e(%rip),%rdi \n+\tlea 0x36a6502e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158542,15 +158542,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63ec6(%rip),%rdi \n+\tlea 0x36a64ec6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158601,15 +158601,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63d5e(%rip),%rdi \n+\tlea 0x36a64d5e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158660,15 +158660,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63bf6(%rip),%rdi \n+\tlea 0x36a64bf6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158719,15 +158719,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63a8e(%rip),%rdi \n+\tlea 0x36a64a8e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158778,15 +158778,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63926(%rip),%rdi \n+\tlea 0x36a64926(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158837,15 +158837,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a637be(%rip),%rdi \n+\tlea 0x36a647be(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158896,15 +158896,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63656(%rip),%rdi \n+\tlea 0x36a64656(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -158955,15 +158955,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a634ee(%rip),%rdi \n+\tlea 0x36a644ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159014,15 +159014,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a63386(%rip),%rdi \n+\tlea 0x36a64386(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159073,15 +159073,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6321e(%rip),%rdi \n+\tlea 0x36a6421e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159132,15 +159132,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a630b6(%rip),%rdi \n+\tlea 0x36a640b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159191,15 +159191,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a62f4e(%rip),%rdi \n+\tlea 0x36a63f4e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159250,15 +159250,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a62de6(%rip),%rdi \n+\tlea 0x36a63de6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159309,15 +159309,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a62c7e(%rip),%rdi \n+\tlea 0x36a63c7e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159368,15 +159368,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a62b16(%rip),%rdi \n+\tlea 0x36a63b16(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159427,15 +159427,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a629ae(%rip),%rdi \n+\tlea 0x36a639ae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159486,15 +159486,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a62846(%rip),%rdi \n+\tlea 0x36a63846(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159545,15 +159545,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a626de(%rip),%rdi \n+\tlea 0x36a636de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159604,15 +159604,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a62576(%rip),%rdi \n+\tlea 0x36a63576(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159663,15 +159663,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6240e(%rip),%rdi \n+\tlea 0x36a6340e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159722,15 +159722,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a622a6(%rip),%rdi \n+\tlea 0x36a632a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159781,15 +159781,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6213e(%rip),%rdi \n+\tlea 0x36a6313e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159840,15 +159840,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61fd6(%rip),%rdi \n+\tlea 0x36a62fd6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159899,15 +159899,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61e6e(%rip),%rdi \n+\tlea 0x36a62e6e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -159958,15 +159958,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61d06(%rip),%rdi \n+\tlea 0x36a62d06(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160017,15 +160017,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61b9e(%rip),%rdi \n+\tlea 0x36a62b9e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160076,15 +160076,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61a36(%rip),%rdi \n+\tlea 0x36a62a36(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160135,15 +160135,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a618ce(%rip),%rdi \n+\tlea 0x36a628ce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160194,15 +160194,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61766(%rip),%rdi \n+\tlea 0x36a62766(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160253,15 +160253,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a615fe(%rip),%rdi \n+\tlea 0x36a625fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160312,15 +160312,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a61496(%rip),%rdi \n+\tlea 0x36a62496(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160371,15 +160371,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6132e(%rip),%rdi \n+\tlea 0x36a6232e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160430,15 +160430,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a611c6(%rip),%rdi \n+\tlea 0x36a621c6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160489,15 +160489,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6105e(%rip),%rdi \n+\tlea 0x36a6205e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160548,15 +160548,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a60ef6(%rip),%rdi \n+\tlea 0x36a61ef6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160607,15 +160607,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a60d8e(%rip),%rdi \n+\tlea 0x36a61d8e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160666,15 +160666,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a60c26(%rip),%rdi \n+\tlea 0x36a61c26(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160725,15 +160725,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a60abe(%rip),%rdi \n+\tlea 0x36a61abe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160784,15 +160784,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a60956(%rip),%rdi \n+\tlea 0x36a61956(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160843,15 +160843,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a607ee(%rip),%rdi \n+\tlea 0x36a617ee(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160902,15 +160902,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a60686(%rip),%rdi \n+\tlea 0x36a61686(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -160961,15 +160961,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6051e(%rip),%rdi \n+\tlea 0x36a6151e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161020,15 +161020,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a603b6(%rip),%rdi \n+\tlea 0x36a613b6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161079,15 +161079,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a6024e(%rip),%rdi \n+\tlea 0x36a6124e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161138,15 +161138,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a600e6(%rip),%rdi \n+\tlea 0x36a610e6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161197,15 +161197,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5ff7e(%rip),%rdi \n+\tlea 0x36a60f7e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161256,15 +161256,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5fe16(%rip),%rdi \n+\tlea 0x36a60e16(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161315,15 +161315,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5fcae(%rip),%rdi \n+\tlea 0x36a60cae(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161374,15 +161374,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5fb46(%rip),%rdi \n+\tlea 0x36a60b46(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161433,15 +161433,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f9de(%rip),%rdi \n+\tlea 0x36a609de(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161492,15 +161492,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f876(%rip),%rdi \n+\tlea 0x36a60876(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161551,15 +161551,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f70e(%rip),%rdi \n+\tlea 0x36a6070e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161610,15 +161610,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f5a6(%rip),%rdi \n+\tlea 0x36a605a6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161669,15 +161669,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f43e(%rip),%rdi \n+\tlea 0x36a6043e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161728,15 +161728,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f2d6(%rip),%rdi \n+\tlea 0x36a602d6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161787,15 +161787,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f16e(%rip),%rdi \n+\tlea 0x36a6016e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161846,15 +161846,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5f006(%rip),%rdi \n+\tlea 0x36a60006(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161905,15 +161905,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5ee9e(%rip),%rdi \n+\tlea 0x36a5fe9e(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -161964,15 +161964,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5ed36(%rip),%rdi \n+\tlea 0x36a5fd36(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -162023,15 +162023,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5ebce(%rip),%rdi \n+\tlea 0x36a5fbce(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -162082,15 +162082,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5ea66(%rip),%rdi \n+\tlea 0x36a5fa66(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -162141,1742 +162141,1742 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5e8fe(%rip),%rdi \n+\tlea 0x36a5f8fe(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n-\tmov 0x36a64448(%rip),%rbx # 36b46340 ::get_beta()::val@@Base+0x28>\n+\tmov 0x36a65448(%rip),%rbx # 36b47340 ::get_beta()::val@@Base+0x28>\n \ttest %rbx,%rbx\n \tjne e1f13 \n-\tlea 0x36a6335c(%rip),%rdi # 36b45260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4828>\n+\tlea 0x36a6435c(%rip),%rdi # 36b46260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4828>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a6442d(%rip) # 36b46340 ::get_beta()::val@@Base+0x28>\n+\tmov %rax,0x36a6542d(%rip) # 36b47340 ::get_beta()::val@@Base+0x28>\n \tsub $0x20,%rsp\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e3e6(%rip),%rsi \n+\tlea 0x36a5f3e6(%rip),%rsi \n \tlea 0x206301(%rip),%rcx # 2e8232 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xdfc2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e3c0(%rip),%rsi \n+\tlea 0x36a5f3c0(%rip),%rsi \n \tlea 0x206312(%rip),%rcx # 2e8271 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe001>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e39a(%rip),%rsi \n+\tlea 0x36a5f39a(%rip),%rsi \n \tlea 0x206323(%rip),%rcx # 2e82b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe040>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e374(%rip),%rsi \n+\tlea 0x36a5f374(%rip),%rsi \n \tlea 0x206334(%rip),%rcx # 2e82ef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe07f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e34e(%rip),%rsi \n+\tlea 0x36a5f34e(%rip),%rsi \n \tlea 0x206345(%rip),%rcx # 2e832e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe0be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e328(%rip),%rsi \n+\tlea 0x36a5f328(%rip),%rsi \n \tlea 0x206356(%rip),%rcx # 2e836d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe0fd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e302(%rip),%rsi \n+\tlea 0x36a5f302(%rip),%rsi \n \tlea 0x206367(%rip),%rcx # 2e83ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe13c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e2dc(%rip),%rsi \n+\tlea 0x36a5f2dc(%rip),%rsi \n \tlea 0x206378(%rip),%rcx # 2e83eb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe17b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e2b6(%rip),%rsi \n+\tlea 0x36a5f2b6(%rip),%rsi \n \tlea 0x206389(%rip),%rcx # 2e842a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe1ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e290(%rip),%rsi \n+\tlea 0x36a5f290(%rip),%rsi \n \tlea 0x20639a(%rip),%rcx # 2e8469 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe1f9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e26a(%rip),%rsi \n+\tlea 0x36a5f26a(%rip),%rsi \n \tlea 0x2063ab(%rip),%rcx # 2e84a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe238>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e244(%rip),%rsi \n+\tlea 0x36a5f244(%rip),%rsi \n \tlea 0x2063bc(%rip),%rcx # 2e84e7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe277>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e21e(%rip),%rsi \n+\tlea 0x36a5f21e(%rip),%rsi \n \tlea 0x2063cd(%rip),%rcx # 2e8526 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe2b6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e1f8(%rip),%rsi \n+\tlea 0x36a5f1f8(%rip),%rsi \n \tlea 0x2063de(%rip),%rcx # 2e8565 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe2f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e1d2(%rip),%rsi \n+\tlea 0x36a5f1d2(%rip),%rsi \n \tlea 0x2063ef(%rip),%rcx # 2e85a4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe334>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e1ac(%rip),%rsi \n+\tlea 0x36a5f1ac(%rip),%rsi \n \tlea 0x206400(%rip),%rcx # 2e85e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe373>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e186(%rip),%rsi \n+\tlea 0x36a5f186(%rip),%rsi \n \tlea 0x206411(%rip),%rcx # 2e8622 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe3b2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e160(%rip),%rsi \n+\tlea 0x36a5f160(%rip),%rsi \n \tlea 0x206422(%rip),%rcx # 2e8661 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe3f1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e13a(%rip),%rsi \n+\tlea 0x36a5f13a(%rip),%rsi \n \tlea 0x206433(%rip),%rcx # 2e86a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe430>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e114(%rip),%rsi \n+\tlea 0x36a5f114(%rip),%rsi \n \tlea 0x206444(%rip),%rcx # 2e86df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe46f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e0ee(%rip),%rsi \n+\tlea 0x36a5f0ee(%rip),%rsi \n \tlea 0x206455(%rip),%rcx # 2e871e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe4ae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e0c8(%rip),%rsi \n+\tlea 0x36a5f0c8(%rip),%rsi \n \tlea 0x206466(%rip),%rcx # 2e875d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe4ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e0a2(%rip),%rsi \n+\tlea 0x36a5f0a2(%rip),%rsi \n \tlea 0x206477(%rip),%rcx # 2e879c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe52c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e07c(%rip),%rsi \n+\tlea 0x36a5f07c(%rip),%rsi \n \tlea 0x206488(%rip),%rcx # 2e87db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe56b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e056(%rip),%rsi \n+\tlea 0x36a5f056(%rip),%rsi \n \tlea 0x206499(%rip),%rcx # 2e881a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe5aa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e030(%rip),%rsi \n+\tlea 0x36a5f030(%rip),%rsi \n \tlea 0x2064aa(%rip),%rcx # 2e8859 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe5e9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5e00a(%rip),%rsi \n+\tlea 0x36a5f00a(%rip),%rsi \n \tlea 0x2064bb(%rip),%rcx # 2e8898 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe628>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dfe4(%rip),%rsi \n+\tlea 0x36a5efe4(%rip),%rsi \n \tlea 0x2064cc(%rip),%rcx # 2e88d7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe667>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dfbe(%rip),%rsi \n+\tlea 0x36a5efbe(%rip),%rsi \n \tlea 0x2064dd(%rip),%rcx # 2e8916 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe6a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5df98(%rip),%rsi \n+\tlea 0x36a5ef98(%rip),%rsi \n \tlea 0x2064ee(%rip),%rcx # 2e8955 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe6e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5df72(%rip),%rsi \n+\tlea 0x36a5ef72(%rip),%rsi \n \tlea 0x2064ff(%rip),%rcx # 2e8994 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe724>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5df4c(%rip),%rsi \n+\tlea 0x36a5ef4c(%rip),%rsi \n \tlea 0x206510(%rip),%rcx # 2e89d3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe763>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5df26(%rip),%rsi \n+\tlea 0x36a5ef26(%rip),%rsi \n \tlea 0x206521(%rip),%rcx # 2e8a12 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe7a2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5df00(%rip),%rsi \n+\tlea 0x36a5ef00(%rip),%rsi \n \tlea 0x206532(%rip),%rcx # 2e8a51 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe7e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5deda(%rip),%rsi \n+\tlea 0x36a5eeda(%rip),%rsi \n \tlea 0x206543(%rip),%rcx # 2e8a90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe820>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5deb4(%rip),%rsi \n+\tlea 0x36a5eeb4(%rip),%rsi \n \tlea 0x206554(%rip),%rcx # 2e8acf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe85f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5de8e(%rip),%rsi \n+\tlea 0x36a5ee8e(%rip),%rsi \n \tlea 0x206565(%rip),%rcx # 2e8b0e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe89e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5de68(%rip),%rsi \n+\tlea 0x36a5ee68(%rip),%rsi \n \tlea 0x206576(%rip),%rcx # 2e8b4d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe8dd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5de42(%rip),%rsi \n+\tlea 0x36a5ee42(%rip),%rsi \n \tlea 0x206587(%rip),%rcx # 2e8b8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe91c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5de1c(%rip),%rsi \n+\tlea 0x36a5ee1c(%rip),%rsi \n \tlea 0x206598(%rip),%rcx # 2e8bcb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe95b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5ddf6(%rip),%rsi \n+\tlea 0x36a5edf6(%rip),%rsi \n \tlea 0x2065a9(%rip),%rcx # 2e8c0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe99a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5ddd0(%rip),%rsi \n+\tlea 0x36a5edd0(%rip),%rsi \n \tlea 0x2065bb(%rip),%rcx # 2e8c4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe9da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5ddaa(%rip),%rsi \n+\tlea 0x36a5edaa(%rip),%rsi \n \tlea 0x2065cd(%rip),%rcx # 2e8c8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xea1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dd84(%rip),%rsi \n+\tlea 0x36a5ed84(%rip),%rsi \n \tlea 0x2065df(%rip),%rcx # 2e8cca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xea5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dd5e(%rip),%rsi \n+\tlea 0x36a5ed5e(%rip),%rsi \n \tlea 0x2065f1(%rip),%rcx # 2e8d0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xea9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dd38(%rip),%rsi \n+\tlea 0x36a5ed38(%rip),%rsi \n \tlea 0x206603(%rip),%rcx # 2e8d4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xeada>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dd12(%rip),%rsi \n+\tlea 0x36a5ed12(%rip),%rsi \n \tlea 0x206615(%rip),%rcx # 2e8d8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xeb1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dcec(%rip),%rsi \n+\tlea 0x36a5ecec(%rip),%rsi \n \tlea 0x206627(%rip),%rcx # 2e8dca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xeb5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dcc6(%rip),%rsi \n+\tlea 0x36a5ecc6(%rip),%rsi \n \tlea 0x206639(%rip),%rcx # 2e8e0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xeb9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dca0(%rip),%rsi \n+\tlea 0x36a5eca0(%rip),%rsi \n \tlea 0x20664b(%rip),%rcx # 2e8e4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xebda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dc7a(%rip),%rsi \n+\tlea 0x36a5ec7a(%rip),%rsi \n \tlea 0x20665d(%rip),%rcx # 2e8e8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xec1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5dc54(%rip),%rsi \n+\tlea 0x36a5ec54(%rip),%rsi \n \tlea 0x20666f(%rip),%rcx # 2e8eca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xec5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5dc36(%rip),%rsi \n+\tlea 0x36a5ec36(%rip),%rsi \n \tlea 0x206689(%rip),%rcx # 2e8f0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xec9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5dc10(%rip),%rsi \n+\tlea 0x36a5ec10(%rip),%rsi \n \tlea 0x20669b(%rip),%rcx # 2e8f4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xecda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5dbea(%rip),%rsi \n+\tlea 0x36a5ebea(%rip),%rsi \n \tlea 0x2066ad(%rip),%rcx # 2e8f8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xed1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5dbc4(%rip),%rsi \n+\tlea 0x36a5ebc4(%rip),%rsi \n \tlea 0x2066bf(%rip),%rcx # 2e8fca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xed5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5db9e(%rip),%rsi \n+\tlea 0x36a5eb9e(%rip),%rsi \n \tlea 0x2066d1(%rip),%rcx # 2e900a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xed9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5db78(%rip),%rsi \n+\tlea 0x36a5eb78(%rip),%rsi \n \tlea 0x2066e3(%rip),%rcx # 2e904a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xedda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5db52(%rip),%rsi \n+\tlea 0x36a5eb52(%rip),%rsi \n \tlea 0x2066f5(%rip),%rcx # 2e908a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xee1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5db2c(%rip),%rsi \n+\tlea 0x36a5eb2c(%rip),%rsi \n \tlea 0x206707(%rip),%rcx # 2e90ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xee5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5db06(%rip),%rsi \n+\tlea 0x36a5eb06(%rip),%rsi \n \tlea 0x206719(%rip),%rcx # 2e910a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xee9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5dae0(%rip),%rsi \n+\tlea 0x36a5eae0(%rip),%rsi \n \tlea 0x20672b(%rip),%rcx # 2e914a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xeeda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5daba(%rip),%rsi \n+\tlea 0x36a5eaba(%rip),%rsi \n \tlea 0x20673d(%rip),%rcx # 2e918a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xef1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5da94(%rip),%rsi \n+\tlea 0x36a5ea94(%rip),%rsi \n \tlea 0x20674f(%rip),%rcx # 2e91ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xef5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5da6e(%rip),%rsi \n+\tlea 0x36a5ea6e(%rip),%rsi \n \tlea 0x206761(%rip),%rcx # 2e920a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xef9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5da48(%rip),%rsi \n+\tlea 0x36a5ea48(%rip),%rsi \n \tlea 0x206773(%rip),%rcx # 2e924a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xefda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5da22(%rip),%rsi \n+\tlea 0x36a5ea22(%rip),%rsi \n \tlea 0x206785(%rip),%rcx # 2e928a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf01a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d9fc(%rip),%rsi \n+\tlea 0x36a5e9fc(%rip),%rsi \n \tlea 0x206797(%rip),%rcx # 2e92ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf05a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d9d6(%rip),%rsi \n+\tlea 0x36a5e9d6(%rip),%rsi \n \tlea 0x2067a9(%rip),%rcx # 2e930a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf09a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d9b0(%rip),%rsi \n+\tlea 0x36a5e9b0(%rip),%rsi \n \tlea 0x2067bb(%rip),%rcx # 2e934a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf0da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d98a(%rip),%rsi \n+\tlea 0x36a5e98a(%rip),%rsi \n \tlea 0x2067cd(%rip),%rcx # 2e938a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf11a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d964(%rip),%rsi \n+\tlea 0x36a5e964(%rip),%rsi \n \tlea 0x2067df(%rip),%rcx # 2e93ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf15a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d93e(%rip),%rsi \n+\tlea 0x36a5e93e(%rip),%rsi \n \tlea 0x2067f1(%rip),%rcx # 2e940a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf19a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d918(%rip),%rsi \n+\tlea 0x36a5e918(%rip),%rsi \n \tlea 0x206803(%rip),%rcx # 2e944a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf1da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d8f2(%rip),%rsi \n+\tlea 0x36a5e8f2(%rip),%rsi \n \tlea 0x206815(%rip),%rcx # 2e948a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf21a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d8cc(%rip),%rsi \n+\tlea 0x36a5e8cc(%rip),%rsi \n \tlea 0x206827(%rip),%rcx # 2e94ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf25a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d8a6(%rip),%rsi \n+\tlea 0x36a5e8a6(%rip),%rsi \n \tlea 0x206839(%rip),%rcx # 2e950a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf29a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d880(%rip),%rsi \n+\tlea 0x36a5e880(%rip),%rsi \n \tlea 0x20684b(%rip),%rcx # 2e954a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf2da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d85a(%rip),%rsi \n+\tlea 0x36a5e85a(%rip),%rsi \n \tlea 0x20685d(%rip),%rcx # 2e958a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf31a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d834(%rip),%rsi \n+\tlea 0x36a5e834(%rip),%rsi \n \tlea 0x20686f(%rip),%rcx # 2e95ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf35a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d80e(%rip),%rsi \n+\tlea 0x36a5e80e(%rip),%rsi \n \tlea 0x206881(%rip),%rcx # 2e960a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf39a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d7e8(%rip),%rsi \n+\tlea 0x36a5e7e8(%rip),%rsi \n \tlea 0x206893(%rip),%rcx # 2e964a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf3da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d7c2(%rip),%rsi \n+\tlea 0x36a5e7c2(%rip),%rsi \n \tlea 0x2068a5(%rip),%rcx # 2e968a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf41a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d79c(%rip),%rsi \n+\tlea 0x36a5e79c(%rip),%rsi \n \tlea 0x2068b7(%rip),%rcx # 2e96ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf45a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d776(%rip),%rsi \n+\tlea 0x36a5e776(%rip),%rsi \n \tlea 0x2068c9(%rip),%rcx # 2e970a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf49a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d750(%rip),%rsi \n+\tlea 0x36a5e750(%rip),%rsi \n \tlea 0x2068db(%rip),%rcx # 2e974a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf4da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d72a(%rip),%rsi \n+\tlea 0x36a5e72a(%rip),%rsi \n \tlea 0x2068ed(%rip),%rcx # 2e978a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf51a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d704(%rip),%rsi \n+\tlea 0x36a5e704(%rip),%rsi \n \tlea 0x2068ff(%rip),%rcx # 2e97ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf55a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d6de(%rip),%rsi \n+\tlea 0x36a5e6de(%rip),%rsi \n \tlea 0x206911(%rip),%rcx # 2e980a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf59a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d6b8(%rip),%rsi \n+\tlea 0x36a5e6b8(%rip),%rsi \n \tlea 0x206923(%rip),%rcx # 2e984a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf5da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d692(%rip),%rsi \n+\tlea 0x36a5e692(%rip),%rsi \n \tlea 0x206935(%rip),%rcx # 2e988a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf61a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d66c(%rip),%rsi \n+\tlea 0x36a5e66c(%rip),%rsi \n \tlea 0x206947(%rip),%rcx # 2e98ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf65a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d646(%rip),%rsi \n+\tlea 0x36a5e646(%rip),%rsi \n \tlea 0x206959(%rip),%rcx # 2e990a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf69a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d620(%rip),%rsi \n+\tlea 0x36a5e620(%rip),%rsi \n \tlea 0x20696b(%rip),%rcx # 2e994a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf6da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d5fa(%rip),%rsi \n+\tlea 0x36a5e5fa(%rip),%rsi \n \tlea 0x20697d(%rip),%rcx # 2e998a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf71a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d5d4(%rip),%rsi \n+\tlea 0x36a5e5d4(%rip),%rsi \n \tlea 0x20698f(%rip),%rcx # 2e99ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf75a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d5ae(%rip),%rsi \n+\tlea 0x36a5e5ae(%rip),%rsi \n \tlea 0x2069a1(%rip),%rcx # 2e9a0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf79a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d588(%rip),%rsi \n+\tlea 0x36a5e588(%rip),%rsi \n \tlea 0x2069b3(%rip),%rcx # 2e9a4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf7da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d562(%rip),%rsi \n+\tlea 0x36a5e562(%rip),%rsi \n \tlea 0x2069c5(%rip),%rcx # 2e9a8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf81a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d53c(%rip),%rsi \n+\tlea 0x36a5e53c(%rip),%rsi \n \tlea 0x2069d7(%rip),%rcx # 2e9aca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf85a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d516(%rip),%rsi \n+\tlea 0x36a5e516(%rip),%rsi \n \tlea 0x2069e9(%rip),%rcx # 2e9b0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf89a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d4f0(%rip),%rsi \n+\tlea 0x36a5e4f0(%rip),%rsi \n \tlea 0x2069fb(%rip),%rcx # 2e9b4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf8da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d4ca(%rip),%rsi \n+\tlea 0x36a5e4ca(%rip),%rsi \n \tlea 0x206a0d(%rip),%rcx # 2e9b8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf91a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d4a4(%rip),%rsi \n+\tlea 0x36a5e4a4(%rip),%rsi \n \tlea 0x206a1f(%rip),%rcx # 2e9bca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf95a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d47e(%rip),%rsi \n+\tlea 0x36a5e47e(%rip),%rsi \n \tlea 0x206a31(%rip),%rcx # 2e9c0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf99a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d458(%rip),%rsi \n+\tlea 0x36a5e458(%rip),%rsi \n \tlea 0x206a43(%rip),%rcx # 2e9c4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf9da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d432(%rip),%rsi \n+\tlea 0x36a5e432(%rip),%rsi \n \tlea 0x206a55(%rip),%rcx # 2e9c8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfa1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d40c(%rip),%rsi \n+\tlea 0x36a5e40c(%rip),%rsi \n \tlea 0x206a67(%rip),%rcx # 2e9cca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfa5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d3e6(%rip),%rsi \n+\tlea 0x36a5e3e6(%rip),%rsi \n \tlea 0x206a79(%rip),%rcx # 2e9d0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfa9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d3c0(%rip),%rsi \n+\tlea 0x36a5e3c0(%rip),%rsi \n \tlea 0x206a8b(%rip),%rcx # 2e9d4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfada>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d39a(%rip),%rsi \n+\tlea 0x36a5e39a(%rip),%rsi \n \tlea 0x206a9d(%rip),%rcx # 2e9d8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfb1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d374(%rip),%rsi \n+\tlea 0x36a5e374(%rip),%rsi \n \tlea 0x206aaf(%rip),%rcx # 2e9dca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfb5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d34e(%rip),%rsi \n+\tlea 0x36a5e34e(%rip),%rsi \n \tlea 0x206ac1(%rip),%rcx # 2e9e0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfb9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d328(%rip),%rsi \n+\tlea 0x36a5e328(%rip),%rsi \n \tlea 0x206ad3(%rip),%rcx # 2e9e4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfbda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d302(%rip),%rsi \n+\tlea 0x36a5e302(%rip),%rsi \n \tlea 0x206ae5(%rip),%rcx # 2e9e8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d2dc(%rip),%rsi \n+\tlea 0x36a5e2dc(%rip),%rsi \n \tlea 0x206af7(%rip),%rcx # 2e9eca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d2b6(%rip),%rsi \n+\tlea 0x36a5e2b6(%rip),%rsi \n \tlea 0x206b09(%rip),%rcx # 2e9f0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d290(%rip),%rsi \n+\tlea 0x36a5e290(%rip),%rsi \n \tlea 0x206b1b(%rip),%rcx # 2e9f4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfcda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d26a(%rip),%rsi \n+\tlea 0x36a5e26a(%rip),%rsi \n \tlea 0x206b2d(%rip),%rcx # 2e9f8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfd1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d244(%rip),%rsi \n+\tlea 0x36a5e244(%rip),%rsi \n \tlea 0x206b3f(%rip),%rcx # 2e9fca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfd5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d21e(%rip),%rsi \n+\tlea 0x36a5e21e(%rip),%rsi \n \tlea 0x206b51(%rip),%rcx # 2ea00a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfd9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d1f8(%rip),%rsi \n+\tlea 0x36a5e1f8(%rip),%rsi \n \tlea 0x206b63(%rip),%rcx # 2ea04a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfdda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d1d2(%rip),%rsi \n+\tlea 0x36a5e1d2(%rip),%rsi \n \tlea 0x206b75(%rip),%rcx # 2ea08a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfe1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d1ac(%rip),%rsi \n+\tlea 0x36a5e1ac(%rip),%rsi \n \tlea 0x206b87(%rip),%rcx # 2ea0ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfe5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d186(%rip),%rsi \n+\tlea 0x36a5e186(%rip),%rsi \n \tlea 0x206b99(%rip),%rcx # 2ea10a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfe9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d160(%rip),%rsi \n+\tlea 0x36a5e160(%rip),%rsi \n \tlea 0x206bab(%rip),%rcx # 2ea14a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfeda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d13a(%rip),%rsi \n+\tlea 0x36a5e13a(%rip),%rsi \n \tlea 0x206bbd(%rip),%rcx # 2ea18a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xff1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d114(%rip),%rsi \n+\tlea 0x36a5e114(%rip),%rsi \n \tlea 0x206bcf(%rip),%rcx # 2ea1ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xff5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d0ee(%rip),%rsi \n+\tlea 0x36a5e0ee(%rip),%rsi \n \tlea 0x206be1(%rip),%rcx # 2ea20a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xff9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d0c8(%rip),%rsi \n+\tlea 0x36a5e0c8(%rip),%rsi \n \tlea 0x206bf3(%rip),%rcx # 2ea24a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xffda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d0a2(%rip),%rsi \n+\tlea 0x36a5e0a2(%rip),%rsi \n \tlea 0x206c05(%rip),%rcx # 2ea28a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1001a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d07c(%rip),%rsi \n+\tlea 0x36a5e07c(%rip),%rsi \n \tlea 0x206c17(%rip),%rcx # 2ea2ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1005a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d056(%rip),%rsi \n+\tlea 0x36a5e056(%rip),%rsi \n \tlea 0x206c29(%rip),%rcx # 2ea30a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1009a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d030(%rip),%rsi \n+\tlea 0x36a5e030(%rip),%rsi \n \tlea 0x206c3b(%rip),%rcx # 2ea34a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x100da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5d00a(%rip),%rsi \n+\tlea 0x36a5e00a(%rip),%rsi \n \tlea 0x206c4d(%rip),%rcx # 2ea38a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1011a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cfe4(%rip),%rsi \n+\tlea 0x36a5dfe4(%rip),%rsi \n \tlea 0x206c5f(%rip),%rcx # 2ea3ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1015a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cfbe(%rip),%rsi \n+\tlea 0x36a5dfbe(%rip),%rsi \n \tlea 0x206c71(%rip),%rcx # 2ea40a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1019a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cf98(%rip),%rsi \n+\tlea 0x36a5df98(%rip),%rsi \n \tlea 0x206c83(%rip),%rcx # 2ea44a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x101da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cf72(%rip),%rsi \n+\tlea 0x36a5df72(%rip),%rsi \n \tlea 0x206c95(%rip),%rcx # 2ea48a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1021a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cf4c(%rip),%rsi \n+\tlea 0x36a5df4c(%rip),%rsi \n \tlea 0x206ca7(%rip),%rcx # 2ea4ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1025a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cf26(%rip),%rsi \n+\tlea 0x36a5df26(%rip),%rsi \n \tlea 0x206cb9(%rip),%rcx # 2ea50a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1029a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cf00(%rip),%rsi \n+\tlea 0x36a5df00(%rip),%rsi \n \tlea 0x206ccb(%rip),%rcx # 2ea54a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x102da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5ceda(%rip),%rsi \n+\tlea 0x36a5deda(%rip),%rsi \n \tlea 0x206cdd(%rip),%rcx # 2ea58a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1031a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5ceb4(%rip),%rsi \n+\tlea 0x36a5deb4(%rip),%rsi \n \tlea 0x206cef(%rip),%rcx # 2ea5ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1035a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5ce8e(%rip),%rsi \n+\tlea 0x36a5de8e(%rip),%rsi \n \tlea 0x206d01(%rip),%rcx # 2ea60a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1039a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5ce68(%rip),%rsi \n+\tlea 0x36a5de68(%rip),%rsi \n \tlea 0x206d13(%rip),%rcx # 2ea64a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x103da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5ce42(%rip),%rsi \n+\tlea 0x36a5de42(%rip),%rsi \n \tlea 0x206d25(%rip),%rcx # 2ea68a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1041a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5ce1c(%rip),%rsi \n+\tlea 0x36a5de1c(%rip),%rsi \n \tlea 0x206d37(%rip),%rcx # 2ea6ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1045a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cdf6(%rip),%rsi \n+\tlea 0x36a5ddf6(%rip),%rsi \n \tlea 0x206d49(%rip),%rcx # 2ea70a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1049a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cdd0(%rip),%rsi \n+\tlea 0x36a5ddd0(%rip),%rsi \n \tlea 0x206d5b(%rip),%rcx # 2ea74a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x104da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cdaa(%rip),%rsi \n+\tlea 0x36a5ddaa(%rip),%rsi \n \tlea 0x206d6d(%rip),%rcx # 2ea78a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1051a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n-\tlea 0x36a5cd84(%rip),%rsi \n+\tlea 0x36a5dd84(%rip),%rsi \n \tlea 0x206d7f(%rip),%rcx # 2ea7ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1055a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tpush $0x0\n \tpush $0x0\n@@ -163885,20 +163885,20 @@\n \tcall 23460 <__hipRegisterFunction@plt>\n \tadd $0x20,%rsp\n \tlea 0xe(%rip),%rdi \n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a628b9(%rip),%rdi # 36b46340 ::get_beta()::val@@Base+0x28>\n+\tmov 0x36a638b9(%rip),%rdi # 36b47340 ::get_beta()::val@@Base+0x28>\n \ttest %rdi,%rdi\n \tje e3aa1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a628a3(%rip) # 36b46340 ::get_beta()::val@@Base+0x28>\n+\tmovq $0x0,0x36a638a3(%rip) # 36b47340 ::get_beta()::val@@Base+0x28>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000e3ab0 :\n ggml_cuda_op_norm(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -164062,15 +164062,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5cac1(%rip),%rdi \n+\tlea 0x36a5dac1(%rip),%rdi \n \tjmp e3dfc \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:292\n \tadd $0x3e0,%rdx\n \tmov %r15,%rdi\n \tmov 0x80(%rsp),%rsi\n \tmov $0x1,%ecx\n \txor %r8d,%r8d\n@@ -164106,15 +164106,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5c9dc(%rip),%rdi \n+\tlea 0x36a5d9dc(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_norm(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:365\n@@ -164279,15 +164279,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a5c757(%rip),%rdi \n+\tlea 0x36a5d757(%rip),%rdi \n \tjmp e4145 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:303\n \tadd $0x400,%r15\n \tmov %r12,%rdi\n \tmov $0x1,%esi\n \tmov %r15,%rdx\n \tmov $0x1,%ecx\n@@ -164318,15 +164318,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a5c6a3(%rip),%rdi \n+\tlea 0x36a5d6a3(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_group_norm(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:384\n@@ -164532,15 +164532,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5c391(%rip),%rdi \n+\tlea 0x36a5d391(%rip),%rdi \n \tjmp e454c \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:316\n \tadd $0x3e0,%rdx\n \tmov %r15,%rdi\n \tmov 0x80(%rsp),%rsi\n \tmov $0x1,%ecx\n \txor %r8d,%r8d\n@@ -164576,15 +164576,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5c2ac(%rip),%rdi \n+\tlea 0x36a5d2ac(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_rms_norm(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:408\n@@ -164742,15 +164742,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5c03b(%rip),%rdi \n+\tlea 0x36a5d03b(%rip),%rdi \n \tjmp e487b \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:326\n \tadd $0x400,%rdx\n \tmov $0x1,%esi\n \tmov $0x1,%ecx\n \txor %r8d,%r8d\n \tmov %rbx,%r9\n@@ -164779,15 +164779,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5bf8d(%rip),%rdi \n+\tlea 0x36a5cf8d(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_rms_norm_back(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:434\n@@ -165007,15 +165007,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5bc31(%rip),%rdi \n+\tlea 0x36a5cc31(%rip),%rdi \n \tjmp e4ccc \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:339\n \tadd $0x3e0,%rdx\n \tmov %r15,%rdi\n \tmov 0x80(%rsp),%rsi\n \tmov $0x1,%ecx\n \txor %r8d,%r8d\n@@ -165051,15 +165051,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5bb4c(%rip),%rdi \n+\tlea 0x36a5cb4c(%rip),%rdi \n \tlea 0x90(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_l2_norm(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/norm.cu:458\n@@ -165137,15 +165137,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b977(%rip),%rdi \n+\tlea 0x36a5c977(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -165177,15 +165177,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b8af(%rip),%rdi \n+\tlea 0x36a5c8af(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -165211,15 +165211,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5b80f(%rip),%rdi \n+\tlea 0x36a5c80f(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -165245,15 +165245,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5b777(%rip),%rdi \n+\tlea 0x36a5c777(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -165285,15 +165285,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b6b7(%rip),%rdi \n+\tlea 0x36a5c6b7(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -165325,15 +165325,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b5ef(%rip),%rdi \n+\tlea 0x36a5c5ef(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -165359,15 +165359,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b551(%rip),%rdi \n+\tlea 0x36a5c551(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -165393,15 +165393,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b4b9(%rip),%rdi \n+\tlea 0x36a5c4b9(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -165433,15 +165433,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b3f7(%rip),%rdi \n+\tlea 0x36a5c3f7(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -165473,144 +165473,144 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a5b32f(%rip),%rdi \n+\tlea 0x36a5c32f(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a60e2c(%rip),%rbx # 36b46348 ::get_beta()::val@@Base+0x30>\n+\tmov 0x36a61e2c(%rip),%rbx # 36b47348 ::get_beta()::val@@Base+0x30>\n \ttest %rbx,%rbx\n \tjne e5537 \n-\tlea 0x36a5fd50(%rip),%rdi # 36b45278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4840>\n+\tlea 0x36a60d50(%rip),%rdi # 36b46278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4840>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a60e11(%rip) # 36b46348 ::get_beta()::val@@Base+0x30>\n+\tmov %rax,0x36a61e11(%rip) # 36b47348 ::get_beta()::val@@Base+0x30>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b286(%rip),%rsi \n+\tlea 0x36a5c286(%rip),%rsi \n \tlea 0x205336(%rip),%rcx # 2ea887 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10617>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b260(%rip),%rsi \n+\tlea 0x36a5c260(%rip),%rsi \n \tlea 0x205327(%rip),%rcx # 2ea8a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10636>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b23a(%rip),%rsi \n+\tlea 0x36a5c23a(%rip),%rsi \n \tlea 0x20531a(%rip),%rcx # 2ea8c7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10657>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b214(%rip),%rsi \n+\tlea 0x36a5c214(%rip),%rsi \n \tlea 0x205310(%rip),%rcx # 2ea8eb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1067b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b1ee(%rip),%rsi \n+\tlea 0x36a5c1ee(%rip),%rsi \n \tlea 0x205308(%rip),%rcx # 2ea911 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x106a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b1c8(%rip),%rsi \n+\tlea 0x36a5c1c8(%rip),%rsi \n \tlea 0x2052fe(%rip),%rcx # 2ea935 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x106c5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b1a2(%rip),%rsi \n+\tlea 0x36a5c1a2(%rip),%rsi \n \tlea 0x2052f6(%rip),%rcx # 2ea95b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x106eb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b17c(%rip),%rsi \n+\tlea 0x36a5c17c(%rip),%rsi \n \tlea 0x2052f1(%rip),%rcx # 2ea984 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10714>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b156(%rip),%rsi \n+\tlea 0x36a5c156(%rip),%rsi \n \tlea 0x2052ee(%rip),%rcx # 2ea9af (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1073f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5b130(%rip),%rsi \n+\tlea 0x36a5c130(%rip),%rsi \n \tlea 0x2052e3(%rip),%rcx # 2ea9d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10762>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a60c21(%rip),%rdi # 36b46348 ::get_beta()::val@@Base+0x30>\n+\tmov 0x36a61c21(%rip),%rdi # 36b47348 ::get_beta()::val@@Base+0x30>\n \ttest %rdi,%rdi\n \tje e5741 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a60c0b(%rip) # 36b46348 ::get_beta()::val@@Base+0x30>\n+\tmovq $0x0,0x36a61c0b(%rip) # 36b47348 ::get_beta()::val@@Base+0x30>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000e5750 :\n ggml_cuda_opt_step_adamw(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -165775,15 +165775,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5ae6e(%rip),%rdi \n+\tlea 0x36a5be6e(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_opt_step_adamw(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/opt-step-adamw.cu:78\n@@ -165928,51 +165928,51 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a5aba8(%rip),%rdi \n+\tlea 0x36a5bba8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36a606a5(%rip),%rdi # 36b46350 ::get_beta()::val@@Base+0x38>\n+\tmov 0x36a616a5(%rip),%rdi # 36b47350 ::get_beta()::val@@Base+0x38>\n \ttest %rdi,%rdi\n \tjne e5cc6 \n-\tlea 0x36a5f5d9(%rip),%rdi # 36b45290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4858>\n+\tlea 0x36a605d9(%rip),%rdi # 36b46290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4858>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a6068a(%rip) # 36b46350 ::get_beta()::val@@Base+0x38>\n+\tmov %rax,0x36a6168a(%rip) # 36b47350 ::get_beta()::val@@Base+0x38>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5ab47(%rip),%rsi \n+\tlea 0x36a5bb47(%rip),%rsi \n \tlea 0x204f0c(%rip),%rcx # 2eabec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1097c>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a60639(%rip),%rdi # 36b46350 ::get_beta()::val@@Base+0x38>\n+\tmov 0x36a61639(%rip),%rdi # 36b47350 ::get_beta()::val@@Base+0x38>\n \ttest %rdi,%rdi\n \tje e5d31 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a60623(%rip) # 36b46350 ::get_beta()::val@@Base+0x38>\n+\tmovq $0x0,0x36a61623(%rip) # 36b47350 ::get_beta()::val@@Base+0x38>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000e5d40 :\n ggml_cuda_out_prod(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -166497,15 +166497,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a5a2f6(%rip),%rdi \n+\tlea 0x36a5b2f6(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/pad.cu:49\n \tadd $0x98,%rsp\n@@ -166574,51 +166574,51 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a5a199(%rip),%rdi \n+\tlea 0x36a5b199(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x98,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36a5fc9d(%rip),%rdi # 36b46358 ::get_beta()::val@@Base+0x40>\n+\tmov 0x36a60c9d(%rip),%rdi # 36b47358 ::get_beta()::val@@Base+0x40>\n \ttest %rdi,%rdi\n \tjne e66d6 \n-\tlea 0x36a5ebe1(%rip),%rdi # 36b452a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4870>\n+\tlea 0x36a5fbe1(%rip),%rdi # 36b462a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4870>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a5fc82(%rip) # 36b46358 ::get_beta()::val@@Base+0x40>\n+\tmov %rax,0x36a60c82(%rip) # 36b47358 ::get_beta()::val@@Base+0x40>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5a13f(%rip),%rsi \n+\tlea 0x36a5b13f(%rip),%rsi \n \tlea 0x204773(%rip),%rcx # 2eae63 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10bf3>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a5fc31(%rip),%rdi # 36b46358 ::get_beta()::val@@Base+0x40>\n+\tmov 0x36a60c31(%rip),%rdi # 36b47358 ::get_beta()::val@@Base+0x40>\n \ttest %rdi,%rdi\n \tje e6741 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a5fc1b(%rip) # 36b46358 ::get_beta()::val@@Base+0x40>\n+\tmovq $0x0,0x36a60c1b(%rip) # 36b47358 ::get_beta()::val@@Base+0x40>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000e6750 :\n ggml_cuda_op_pool2d(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -166776,15 +166776,15 @@\n \tlea 0x68(%rsp),%rdx\n \tlea 0x60(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x80(%rsp),%rsi\n \tmov 0x88(%rsp),%edx\n \tmov 0x70(%rsp),%rcx\n \tmov 0x78(%rsp),%r8d\n-\tlea 0x36a59e71(%rip),%rdi \n+\tlea 0x36a5ae71(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x60(%rsp)\n \tpush 0x70(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_pool2d(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/pool2d.cu:94\n@@ -166861,51 +166861,51 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a59cc0(%rip),%rdi \n+\tlea 0x36a5acc0(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36a5f7c5(%rip),%rdi # 36b46360 ::get_beta()::val@@Base+0x48>\n+\tmov 0x36a607c5(%rip),%rdi # 36b47360 ::get_beta()::val@@Base+0x48>\n \ttest %rdi,%rdi\n \tjne e6bb6 \n-\tlea 0x36a5e719(%rip),%rdi # 36b452c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4888>\n+\tlea 0x36a5f719(%rip),%rdi # 36b462c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4888>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a5f7aa(%rip) # 36b46360 ::get_beta()::val@@Base+0x48>\n+\tmov %rax,0x36a607aa(%rip) # 36b47360 ::get_beta()::val@@Base+0x48>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a59c67(%rip),%rsi \n+\tlea 0x36a5ac67(%rip),%rsi \n \tlea 0x2042f7(%rip),%rcx # 2eaec7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10c57>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a5f759(%rip),%rdi # 36b46360 ::get_beta()::val@@Base+0x48>\n+\tmov 0x36a60759(%rip),%rdi # 36b47360 ::get_beta()::val@@Base+0x48>\n \ttest %rdi,%rdi\n \tje e6c21 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a5f743(%rip) # 36b46360 ::get_beta()::val@@Base+0x48>\n+\tmovq $0x0,0x36a60743(%rip) # 36b47360 ::get_beta()::val@@Base+0x48>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000e6c30 :\n quantize_row_q8_1_cuda(float const*, int const*, void*, ggml_type, long, long, long, long, long, long, long, long, ihipStream_t*):\n@@ -166989,15 +166989,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a59a87(%rip),%rdi \n+\tlea 0x36a5aa87(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/quantize.cu:160\n \tadd $0xb8,%rsp\n@@ -167054,15 +167054,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a59950(%rip),%rdi \n+\tlea 0x36a5a950(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -167156,15 +167156,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a59771(%rip),%rdi \n+\tlea 0x36a5a771(%rip),%rdi \n \tjmp e7206 \n \tmov $0x8308c,%eax\n \tbt %ecx,%eax\n \tjae e7231 \n \tmovabs $0x100000080,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/quantize.cu:180\n \tmov $0x1,%ecx\n@@ -167212,15 +167212,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a59642(%rip),%rdi \n+\tlea 0x36a5a642(%rip),%rdi \n \tlea 0x80(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/quantize.cu:190\n \tadd $0xd8,%rsp\n@@ -167280,15 +167280,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a594f6(%rip),%rdi \n+\tlea 0x36a5a4f6(%rip),%rdi \n \tjmp e7206 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/quantize.cu:166\n \tlea 0x203b9f(%rip),%rdi # 2eaf05 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10c95>\n \tlea 0x1f3cde(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x203bf7(%rip),%rcx # 2eaf6b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10cfb>\n \tmov $0xa6,%esi\n \txor %eax,%eax\n@@ -167340,15 +167340,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a593a8(%rip),%rdi \n+\tlea 0x36a5a3a8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -167385,15 +167385,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a592b0(%rip),%rdi \n+\tlea 0x36a5a2b0(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -167430,83 +167430,83 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a591b8(%rip),%rdi \n+\tlea 0x36a5a1b8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a5ec9c(%rip),%rbx # 36b46368 ::get_beta()::val@@Base+0x50>\n+\tmov 0x36a5fc9c(%rip),%rbx # 36b47368 ::get_beta()::val@@Base+0x50>\n \ttest %rbx,%rbx\n \tjne e76e7 \n-\tlea 0x36a5dc00(%rip),%rdi # 36b452d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48a0>\n+\tlea 0x36a5ec00(%rip),%rdi # 36b462d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48a0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a5ec81(%rip) # 36b46368 ::get_beta()::val@@Base+0x50>\n+\tmov %rax,0x36a5fc81(%rip) # 36b47368 ::get_beta()::val@@Base+0x50>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5913e(%rip),%rsi \n+\tlea 0x36a5a13e(%rip),%rsi \n \tlea 0x2038d9(%rip),%rcx # 2eafda (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10d6a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a59118(%rip),%rsi \n+\tlea 0x36a5a118(%rip),%rsi \n \tlea 0x2038ca(%rip),%rcx # 2eaff9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10d89>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a590f2(%rip),%rsi \n+\tlea 0x36a5a0f2(%rip),%rsi \n \tlea 0x2038dc(%rip),%rcx # 2eb039 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10dc9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a590cc(%rip),%rsi \n+\tlea 0x36a5a0cc(%rip),%rsi \n \tlea 0x2038ee(%rip),%rcx # 2eb079 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10e09>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a5ebb1(%rip),%rdi # 36b46368 ::get_beta()::val@@Base+0x50>\n+\tmov 0x36a5fbb1(%rip),%rdi # 36b47368 ::get_beta()::val@@Base+0x50>\n \ttest %rdi,%rdi\n \tje e77d1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a5eb9b(%rip) # 36b46368 ::get_beta()::val@@Base+0x50>\n+\tmovq $0x0,0x36a5fb9b(%rip) # 36b47368 ::get_beta()::val@@Base+0x50>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000e77e0 :\n ggml_cuda_op_rope(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -167565,15 +167565,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a58f2c(%rip),%rdi \n+\tlea 0x36a59f2c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167623,15 +167623,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a58de4(%rip),%rdi \n+\tlea 0x36a59de4(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167681,15 +167681,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a58c9c(%rip),%rdi \n+\tlea 0x36a59c9c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167739,15 +167739,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a58b54(%rip),%rdi \n+\tlea 0x36a59b54(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167801,15 +167801,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a589ec(%rip),%rdi \n+\tlea 0x36a599ec(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167863,15 +167863,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a58884(%rip),%rdi \n+\tlea 0x36a59884(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167925,15 +167925,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5871c(%rip),%rdi \n+\tlea 0x36a5971c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -167987,15 +167987,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a585b4(%rip),%rdi \n+\tlea 0x36a595b4(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168049,15 +168049,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5844c(%rip),%rdi \n+\tlea 0x36a5944c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168111,15 +168111,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a582e4(%rip),%rdi \n+\tlea 0x36a592e4(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168173,15 +168173,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5817c(%rip),%rdi \n+\tlea 0x36a5917c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168235,15 +168235,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a58014(%rip),%rdi \n+\tlea 0x36a59014(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168293,15 +168293,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57ecc(%rip),%rdi \n+\tlea 0x36a58ecc(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168351,15 +168351,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57d84(%rip),%rdi \n+\tlea 0x36a58d84(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168409,15 +168409,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57c3c(%rip),%rdi \n+\tlea 0x36a58c3c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168467,15 +168467,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57af4(%rip),%rdi \n+\tlea 0x36a58af4(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168525,15 +168525,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a579ac(%rip),%rdi \n+\tlea 0x36a589ac(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168583,15 +168583,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57864(%rip),%rdi \n+\tlea 0x36a58864(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168641,15 +168641,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5771c(%rip),%rdi \n+\tlea 0x36a5871c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168699,15 +168699,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a575d4(%rip),%rdi \n+\tlea 0x36a585d4(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168761,15 +168761,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5746c(%rip),%rdi \n+\tlea 0x36a5846c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168823,15 +168823,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57304(%rip),%rdi \n+\tlea 0x36a58304(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168885,15 +168885,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5719c(%rip),%rdi \n+\tlea 0x36a5819c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -168947,15 +168947,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a57034(%rip),%rdi \n+\tlea 0x36a58034(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169009,15 +169009,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a56ecc(%rip),%rdi \n+\tlea 0x36a57ecc(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169071,15 +169071,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a56d64(%rip),%rdi \n+\tlea 0x36a57d64(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169133,15 +169133,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a56bfc(%rip),%rdi \n+\tlea 0x36a57bfc(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169195,15 +169195,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a56a94(%rip),%rdi \n+\tlea 0x36a57a94(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169253,15 +169253,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a5694c(%rip),%rdi \n+\tlea 0x36a5794c(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169311,15 +169311,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a56804(%rip),%rdi \n+\tlea 0x36a57804(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169369,15 +169369,15 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a566bc(%rip),%rdi \n+\tlea 0x36a576bc(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -169427,364 +169427,364 @@\n \tlea 0x30(%rsp),%rdx\n \tlea 0x28(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x48(%rsp),%rsi\n \tmov 0x50(%rsp),%edx\n \tmov 0x38(%rsp),%rcx\n \tmov 0x40(%rsp),%r8d\n-\tlea 0x36a56574(%rip),%rdi \n+\tlea 0x36a57574(%rip),%rdi \n \tlea 0x70(%rsp),%r9\n \tpush 0x28(%rsp)\n \tpush 0x38(%rsp)\n \tcall 22100 \n \tadd $0xf8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a5bf64(%rip),%rbx # 36b46370 ::get_beta()::val@@Base+0x58>\n+\tmov 0x36a5cf64(%rip),%rbx # 36b47370 ::get_beta()::val@@Base+0x58>\n \ttest %rbx,%rbx\n \tjne ea427 \n-\tlea 0x36a5aed8(%rip),%rdi # 36b452f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48b8>\n+\tlea 0x36a5bed8(%rip),%rdi # 36b462f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48b8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a5bf49(%rip) # 36b46370 ::get_beta()::val@@Base+0x58>\n+\tmov %rax,0x36a5cf49(%rip) # 36b47370 ::get_beta()::val@@Base+0x58>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5641e(%rip),%rsi \n+\tlea 0x36a5741e(%rip),%rsi \n \tlea 0x200d1e(%rip),%rcx # 2eb15f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10eef>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a563f8(%rip),%rsi \n+\tlea 0x36a573f8(%rip),%rsi \n \tlea 0x200d32(%rip),%rcx # 2eb1a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f31>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a563d2(%rip),%rsi \n+\tlea 0x36a573d2(%rip),%rsi \n \tlea 0x200d46(%rip),%rcx # 2eb1e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f73>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a563ac(%rip),%rsi \n+\tlea 0x36a573ac(%rip),%rsi \n \tlea 0x200d60(%rip),%rcx # 2eb22b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10fbb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56386(%rip),%rsi \n+\tlea 0x36a57386(%rip),%rsi \n \tlea 0x200d7a(%rip),%rcx # 2eb273 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11003>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56360(%rip),%rsi \n+\tlea 0x36a57360(%rip),%rsi \n \tlea 0x200da1(%rip),%rcx # 2eb2c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11058>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5633a(%rip),%rsi \n+\tlea 0x36a5733a(%rip),%rsi \n \tlea 0x200dc8(%rip),%rcx # 2eb31d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x110ad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56314(%rip),%rsi \n+\tlea 0x36a57314(%rip),%rsi \n \tlea 0x200df5(%rip),%rcx # 2eb378 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11108>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a562ee(%rip),%rsi \n+\tlea 0x36a572ee(%rip),%rsi \n \tlea 0x200e22(%rip),%rcx # 2eb3d3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11163>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a562c8(%rip),%rsi \n+\tlea 0x36a572c8(%rip),%rsi \n \tlea 0x200e4a(%rip),%rcx # 2eb429 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x111b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a562a2(%rip),%rsi \n+\tlea 0x36a572a2(%rip),%rsi \n \tlea 0x200e72(%rip),%rcx # 2eb47f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1120f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5627c(%rip),%rsi \n+\tlea 0x36a5727c(%rip),%rsi \n \tlea 0x200ea0(%rip),%rcx # 2eb4db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1126b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56256(%rip),%rsi \n+\tlea 0x36a57256(%rip),%rsi \n \tlea 0x200ece(%rip),%rcx # 2eb537 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112c7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56230(%rip),%rsi \n+\tlea 0x36a57230(%rip),%rsi \n \tlea 0x200ee2(%rip),%rcx # 2eb579 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11309>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5620a(%rip),%rsi \n+\tlea 0x36a5720a(%rip),%rsi \n \tlea 0x200ef6(%rip),%rcx # 2eb5bb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1134b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a561e4(%rip),%rsi \n+\tlea 0x36a571e4(%rip),%rsi \n \tlea 0x200f10(%rip),%rcx # 2eb603 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11393>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a561be(%rip),%rsi \n+\tlea 0x36a571be(%rip),%rsi \n \tlea 0x200f2a(%rip),%rcx # 2eb64b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x113db>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56198(%rip),%rsi \n+\tlea 0x36a57198(%rip),%rsi \n \tlea 0x200f3e(%rip),%rcx # 2eb68d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1141d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56172(%rip),%rsi \n+\tlea 0x36a57172(%rip),%rsi \n \tlea 0x200f52(%rip),%rcx # 2eb6cf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1145f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5614c(%rip),%rsi \n+\tlea 0x36a5714c(%rip),%rsi \n \tlea 0x200f6c(%rip),%rcx # 2eb717 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x114a7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56126(%rip),%rsi \n+\tlea 0x36a57126(%rip),%rsi \n \tlea 0x200f86(%rip),%rcx # 2eb75f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x114ef>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56100(%rip),%rsi \n+\tlea 0x36a57100(%rip),%rsi \n \tlea 0x200fad(%rip),%rcx # 2eb7b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11544>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a560da(%rip),%rsi \n+\tlea 0x36a570da(%rip),%rsi \n \tlea 0x200fd4(%rip),%rcx # 2eb809 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11599>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a560b4(%rip),%rsi \n+\tlea 0x36a570b4(%rip),%rsi \n \tlea 0x201001(%rip),%rcx # 2eb864 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x115f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5608e(%rip),%rsi \n+\tlea 0x36a5708e(%rip),%rsi \n \tlea 0x20102e(%rip),%rcx # 2eb8bf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1164f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56068(%rip),%rsi \n+\tlea 0x36a57068(%rip),%rsi \n \tlea 0x201056(%rip),%rcx # 2eb915 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x116a5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a56042(%rip),%rsi \n+\tlea 0x36a57042(%rip),%rsi \n \tlea 0x20107e(%rip),%rcx # 2eb96b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x116fb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a5601c(%rip),%rsi \n+\tlea 0x36a5701c(%rip),%rsi \n \tlea 0x2010ac(%rip),%rcx # 2eb9c7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11757>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a55ff6(%rip),%rsi \n+\tlea 0x36a56ff6(%rip),%rsi \n \tlea 0x2010da(%rip),%rcx # 2eba23 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x117b3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a55fd0(%rip),%rsi \n+\tlea 0x36a56fd0(%rip),%rsi \n \tlea 0x2010ee(%rip),%rcx # 2eba65 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x117f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a55faa(%rip),%rsi \n+\tlea 0x36a56faa(%rip),%rsi \n \tlea 0x201102(%rip),%rcx # 2ebaa7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11837>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a55f84(%rip),%rsi \n+\tlea 0x36a56f84(%rip),%rsi \n \tlea 0x20111c(%rip),%rcx # 2ebaef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1187f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a5b969(%rip),%rdi # 36b46370 ::get_beta()::val@@Base+0x58>\n+\tmov 0x36a5c969(%rip),%rdi # 36b47370 ::get_beta()::val@@Base+0x58>\n \ttest %rdi,%rdi\n \tje eaa21 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a5b953(%rip) # 36b46370 ::get_beta()::val@@Base+0x58>\n+\tmovq $0x0,0x36a5c953(%rip) # 36b47370 ::get_beta()::val@@Base+0x58>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000eaa30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_op_rope_impl(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -170083,15 +170083,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a55977(%rip),%rdi \n+\tlea 0x36a56977(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:394\n \tmov 0x0(%r13),%eax\n \tcmp $0x1,%eax\n \tje eb407 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9d7>\n \ttest %eax,%eax\n \tmovss 0x18c(%rsp),%xmm0\n@@ -170192,15 +170192,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5570e(%rip),%rdi \n+\tlea 0x36a5670e(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:372\n \tcmp $0x18,%r14d\n \tmovss 0x18c(%rsp),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:417\n \tjne eb63b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc0b>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:418\n@@ -170320,15 +170320,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a5549e(%rip),%rdi \n+\tlea 0x36a5649e(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:257\n \ttest $0x1,%bpl\n \tmovss 0x18c(%rsp),%xmm0\n \tjne ecf59 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2529>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n@@ -170423,15 +170423,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5523a(%rip),%rdi \n+\tlea 0x36a5623a(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:430\n \tcmp $0x1,%eax\n \tje ec0df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16af>\n \ttest %eax,%eax\n \tjne ed054 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2624>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:234\n@@ -170530,15 +170530,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5504e(%rip),%rdi \n+\tlea 0x36a5604e(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:280\n \ttest $0x1,%bpl\n \tjne ecfbd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x258d>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n \tmovaps %xmm1,0x1a0(%rsp)\n@@ -170648,15 +170648,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a54d92(%rip),%rdi \n+\tlea 0x36a55d92(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:265\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n \tmovaps 0x170(%rsp),%xmm0\n \tmovlps %xmm0,0xa0(%rsp)\n \tmov 0xe0(%rsp),%rax\n@@ -170715,15 +170715,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a54bb2(%rip),%rdi \n+\tlea 0x36a55bb2(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n \ttest %eax,%eax\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n \tmovaps 0x170(%rsp),%xmm0\n \tmovlps %xmm0,0xa0(%rsp)\n \tmov 0xe0(%rsp),%rax\n \tmov %rax,0x90(%rsp)\n@@ -170781,15 +170781,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a54a1a(%rip),%rdi \n+\tlea 0x36a55a1a(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:303\n \ttest $0x1,%bpl\n \tjne ecff8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25c8>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n \tmovaps %xmm1,0x1a0(%rsp)\n@@ -170899,15 +170899,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a547d6(%rip),%rdi \n+\tlea 0x36a557d6(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:234\n \ttest $0x1,%bpl\n \tjne ed019 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25e9>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n \tmovaps %xmm1,0x170(%rsp)\n@@ -171001,15 +171001,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a545cb(%rip),%rdi \n+\tlea 0x36a555cb(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:288\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -171084,15 +171084,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a5436a(%rip),%rdi \n+\tlea 0x36a5536a(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:290\n@@ -171166,15 +171166,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a54171(%rip),%rdi \n+\tlea 0x36a55171(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:313\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -171249,15 +171249,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a53f78(%rip),%rdi \n+\tlea 0x36a54f78(%rip),%rdi \n \tjmp eccd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:242\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n \tmovaps 0x170(%rsp),%xmm0\n \tmovlps %xmm0,0xa0(%rsp)\n \tmov 0xe0(%rsp),%rax\n@@ -171316,15 +171316,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a53df0(%rip),%rdi \n+\tlea 0x36a54df0(%rip),%rdi \n \tjmp ece89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:313\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -171399,15 +171399,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a53bd7(%rip),%rdi \n+\tlea 0x36a54bd7(%rip),%rdi \n \tlea 0xf0(%rsp),%r9\n \tpush 0x50(%rsp)\n \tpush 0x60(%rsp)\n \tjmp ece99 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2469>\n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:242\n \tjne ecea2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -171469,15 +171469,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a53a3f(%rip),%rdi \n+\tlea 0x36a54a3f(%rip),%rdi \n \tlea 0xf0(%rsp),%r9\n \tpush 0x58(%rsp)\n \tpush 0x68(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:442\n \tadd $0x1b8,%rsp\n@@ -171879,15 +171879,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a533b7(%rip),%rdi \n+\tlea 0x36a543b7(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:394\n \tmov 0x0(%r13),%eax\n \tcmp $0x1,%eax\n \tje eda47 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x9d7>\n \ttest %eax,%eax\n \tmovss 0x18c(%rsp),%xmm0\n@@ -171988,15 +171988,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5314e(%rip),%rdi \n+\tlea 0x36a5414e(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:372\n \tcmp $0x18,%r14d\n \tmovss 0x18c(%rsp),%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:417\n \tjne edc7b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc0b>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:418\n@@ -172116,15 +172116,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a52ede(%rip),%rdi \n+\tlea 0x36a53ede(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:257\n \ttest $0x1,%bpl\n \tmovss 0x18c(%rsp),%xmm0\n \tjne ef599 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2529>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n@@ -172219,15 +172219,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a52c7a(%rip),%rdi \n+\tlea 0x36a53c7a(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:430\n \tcmp $0x1,%eax\n \tje ee71f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16af>\n \ttest %eax,%eax\n \tjne ef694 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2624>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:234\n@@ -172326,15 +172326,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a52a8e(%rip),%rdi \n+\tlea 0x36a53a8e(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:280\n \ttest $0x1,%bpl\n \tjne ef5fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x258d>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n \tmovaps %xmm1,0x1a0(%rsp)\n@@ -172444,15 +172444,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a527d2(%rip),%rdi \n+\tlea 0x36a537d2(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:265\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n \tmovaps 0x170(%rsp),%xmm0\n \tmovlps %xmm0,0xa0(%rsp)\n \tmov 0xe0(%rsp),%rax\n@@ -172511,15 +172511,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a525f2(%rip),%rdi \n+\tlea 0x36a535f2(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n \ttest %eax,%eax\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n \tmovaps 0x170(%rsp),%xmm0\n \tmovlps %xmm0,0xa0(%rsp)\n \tmov 0xe0(%rsp),%rax\n \tmov %rax,0x90(%rsp)\n@@ -172577,15 +172577,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5245a(%rip),%rdi \n+\tlea 0x36a5345a(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:303\n \ttest $0x1,%bpl\n \tjne ef638 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25c8>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n \tmovaps %xmm1,0x1a0(%rsp)\n@@ -172695,15 +172695,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a52216(%rip),%rdi \n+\tlea 0x36a53216(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:234\n \ttest $0x1,%bpl\n \tjne ef659 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25e9>\n \tmov %rbx,%r14\n \tmovsd 0x198(%rsp),%xmm1\n \tmovaps %xmm1,0x170(%rsp)\n@@ -172797,15 +172797,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5200b(%rip),%rdi \n+\tlea 0x36a5300b(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:288\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -172880,15 +172880,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a51daa(%rip),%rdi \n+\tlea 0x36a52daa(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:290\n@@ -172962,15 +172962,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a51bb1(%rip),%rdi \n+\tlea 0x36a52bb1(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:313\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -173045,15 +173045,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a519b8(%rip),%rdi \n+\tlea 0x36a529b8(%rip),%rdi \n \tjmp ef311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a1>\n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:242\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n \tmovaps 0x170(%rsp),%xmm0\n \tmovlps %xmm0,0xa0(%rsp)\n \tmov 0xe0(%rsp),%rax\n@@ -173112,15 +173112,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a51830(%rip),%rdi \n+\tlea 0x36a52830(%rip),%rdi \n \tjmp ef4c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2459>\n \ttest %eax,%eax\n \tmov 0x170(%rsp),%eax\n \tmov 0xcc(%rsp),%ecx\n \tmov 0xc8(%rsp),%edx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:313\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -173195,15 +173195,15 @@\n \tlea 0x58(%rsp),%rdx\n \tlea 0x50(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36a51617(%rip),%rdi \n+\tlea 0x36a52617(%rip),%rdi \n \tlea 0xf0(%rsp),%r9\n \tpush 0x50(%rsp)\n \tpush 0x60(%rsp)\n \tjmp ef4d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2469>\n \ttest %eax,%eax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:242\n \tjne ef4e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2472>\n@@ -173265,15 +173265,15 @@\n \tlea 0x60(%rsp),%rdx\n \tlea 0x58(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x68(%rsp),%rcx\n \tmov 0x70(%rsp),%r8d\n-\tlea 0x36a5147f(%rip),%rdi \n+\tlea 0x36a5247f(%rip),%rdi \n \tlea 0xf0(%rsp),%r9\n \tpush 0x58(%rsp)\n \tpush 0x68(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/rope.cu:442\n \tadd $0x1b8,%rsp\n@@ -173471,15 +173471,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a5113a(%rip),%rdi \n+\tlea 0x36a5213a(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_scale(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/scale.cu:33\n@@ -173535,51 +173535,51 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a51025(%rip),%rdi \n+\tlea 0x36a52025(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl (%rax)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36a56a1d(%rip),%rdi # 36b46378 ::get_beta()::val@@Base+0x60>\n+\tmov 0x36a57a1d(%rip),%rdi # 36b47378 ::get_beta()::val@@Base+0x60>\n \ttest %rdi,%rdi\n \tjne ef976 \n-\tlea 0x36a559a1(%rip),%rdi # 36b45308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48d0>\n+\tlea 0x36a569a1(%rip),%rdi # 36b46308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48d0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a56a02(%rip) # 36b46378 ::get_beta()::val@@Base+0x60>\n+\tmov %rax,0x36a57a02(%rip) # 36b47378 ::get_beta()::val@@Base+0x60>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a50fcf(%rip),%rsi \n+\tlea 0x36a51fcf(%rip),%rsi \n \tlea 0x1fc1f4(%rip),%rcx # 2ebb84 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11914>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a569b1(%rip),%rdi # 36b46378 ::get_beta()::val@@Base+0x60>\n+\tmov 0x36a579b1(%rip),%rdi # 36b47378 ::get_beta()::val@@Base+0x60>\n \ttest %rdi,%rdi\n \tje ef9e1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a5699b(%rip) # 36b46378 ::get_beta()::val@@Base+0x60>\n+\tmovq $0x0,0x36a5799b(%rip) # 36b47378 ::get_beta()::val@@Base+0x60>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000ef9f0 :\n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -173841,15 +173841,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a50adc(%rip),%rdi \n+\tlea 0x36a51adc(%rip),%rdi \n \tjmp f07c0 \n \tmov 0x160(%rsp),%rax\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:233\n \tshl $0x20,%rax\n \tmov 0x58(%rsp),%ebp\n \tor %rax,%rbp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:189\n@@ -173928,15 +173928,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a50903(%rip),%rdi \n+\tlea 0x36a51903(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:196\n \tcmp $0x7ff,%r15\n \tjg f0415 \n \tcmp $0x200,%r15\n \tje f10d4 \n@@ -174005,15 +174005,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a50753(%rip),%rdi \n+\tlea 0x36a51753(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:196\n \tcmp $0x80,%r15\n \tje f127d \n \tcmp $0x100,%r15\n \tjne f15cf \n@@ -174080,15 +174080,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a50580(%rip),%rdi \n+\tlea 0x36a51580(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:196\n \tcmp $0x800,%r15\n \tje f1426 \n \tcmp $0x1000,%r15\n \tjne f15cf \n@@ -174155,15 +174155,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a503dd(%rip),%rdi \n+\tlea 0x36a513dd(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n \tadd $0xe0,%r12\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:224\n \tlea 0x7c(,%r15,4),%r13\n \tand $0xffffffffffffff80,%r13\n \tsub $0xffffffffffffff80,%r13\n@@ -174240,15 +174240,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a501f8(%rip),%rdi \n+\tlea 0x36a511f8(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:316\n \tadd $0x188,%rsp\n@@ -174340,15 +174340,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a50000(%rip),%rdi \n+\tlea 0x36a51000(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:196\n \tcmp $0x7ff,%r15\n \tjg f0d68 \n \tcmp $0x200,%r15\n \tje f191d \n@@ -174417,15 +174417,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4fe50(%rip),%rdi \n+\tlea 0x36a50e50(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:196\n \tcmp $0x80,%r15\n \tje f1ac6 \n \tcmp $0x100,%r15\n \tjne f1e18 \n@@ -174492,15 +174492,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4fc7d(%rip),%rdi \n+\tlea 0x36a50c7d(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:196\n \tcmp $0x800,%r15\n \tje f1c6f \n \tcmp $0x1000,%r15\n \tjne f1e18 \n@@ -174567,15 +174567,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4fada(%rip),%rdi \n+\tlea 0x36a50ada(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -174636,15 +174636,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4f8a9(%rip),%rdi \n+\tlea 0x36a508a9(%rip),%rdi \n \tjmp f07c0 \n bool launch_soft_max_kernels<32, 64, 128, 256, 512, 1024, 2048, 4096, __half>(float const*, __half const*, float*, soft_max_params const&, ihipStream_t*, dim3, dim3, unsigned long)::{lambda(auto:1)#1}::operator() >(std::integral_constant) const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -174705,15 +174705,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4f720(%rip),%rdi \n+\tlea 0x36a50720(%rip),%rdi \n \tjmp f07c0 \n bool launch_soft_max_kernels<32, 64, 128, 256, 512, 1024, 2048, 4096, __half>(float const*, __half const*, float*, soft_max_params const&, ihipStream_t*, dim3, dim3, unsigned long)::{lambda(auto:1)#1}::operator() >(std::integral_constant) const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -174774,15 +174774,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4f567(%rip),%rdi \n+\tlea 0x36a50567(%rip),%rdi \n \tjmp f07c0 \n bool launch_soft_max_kernels<32, 64, 128, 256, 512, 1024, 2048, 4096, __half>(float const*, __half const*, float*, soft_max_params const&, ihipStream_t*, dim3, dim3, unsigned long)::{lambda(auto:1)#1}::operator() >(std::integral_constant) const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -174843,15 +174843,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4f3de(%rip),%rdi \n+\tlea 0x36a503de(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:212\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -174910,15 +174910,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4f201(%rip),%rdi \n+\tlea 0x36a50201(%rip),%rdi \n \tjmp f07c0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n \tmov %r13,%r8\n@@ -174978,15 +174978,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4f0b0(%rip),%rdi \n+\tlea 0x36a500b0(%rip),%rdi \n \tjmp f07c0 \n bool launch_soft_max_kernels<32, 64, 128, 256, 512, 1024, 2048, 4096, float>(float const*, float const*, float*, soft_max_params const&, ihipStream_t*, dim3, dim3, unsigned long)::{lambda(auto:1)#1}::operator() >(std::integral_constant) const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -175047,15 +175047,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4ef27(%rip),%rdi \n+\tlea 0x36a4ff27(%rip),%rdi \n \tjmp f07c0 \n bool launch_soft_max_kernels<32, 64, 128, 256, 512, 1024, 2048, 4096, float>(float const*, float const*, float*, soft_max_params const&, ihipStream_t*, dim3, dim3, unsigned long)::{lambda(auto:1)#1}::operator() >(std::integral_constant) const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -175116,15 +175116,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4ed6e(%rip),%rdi \n+\tlea 0x36a4fd6e(%rip),%rdi \n \tjmp f07c0 \n bool launch_soft_max_kernels<32, 64, 128, 256, 512, 1024, 2048, 4096, float>(float const*, float const*, float*, soft_max_params const&, ihipStream_t*, dim3, dim3, unsigned long)::{lambda(auto:1)#1}::operator() >(std::integral_constant) const:\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:198\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -175185,15 +175185,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4ebe5(%rip),%rdi \n+\tlea 0x36a4fbe5(%rip),%rdi \n \tjmp f07c0 \n ggml_cuda_op_soft_max(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:212\n \tmov %rbp,%rdi\n \tmov %ebx,%esi\n \tmov %r12,%rdx\n \tmov $0x1,%ecx\n@@ -175252,15 +175252,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4ea08(%rip),%rdi \n+\tlea 0x36a4fa08(%rip),%rdi \n \tjmp f07c0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:259\n \tlea 0x1f9bd6(%rip),%rdi # 2ebb9a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1192a>\n \tlea 0x1e9080(%rip),%rdx # 2db04b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xddb>\n \tlea 0x1f0c30(%rip),%rcx # 2e2c02 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x8992>\n \tmov $0x103,%esi\n \txor %eax,%eax\n@@ -175394,15 +175394,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a4e78f(%rip),%rdi \n+\tlea 0x36a4f78f(%rip),%rdi \n \tlea 0x60(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n ggml_cuda_op_soft_max_back(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/softmax.cu:344\n@@ -175474,15 +175474,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e631(%rip),%rdi \n+\tlea 0x36a4f631(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -175504,15 +175504,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e5a7(%rip),%rdi \n+\tlea 0x36a4f5a7(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175534,15 +175534,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e51f(%rip),%rdi \n+\tlea 0x36a4f51f(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175564,15 +175564,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e497(%rip),%rdi \n+\tlea 0x36a4f497(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175594,15 +175594,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e40f(%rip),%rdi \n+\tlea 0x36a4f40f(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175624,15 +175624,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e387(%rip),%rdi \n+\tlea 0x36a4f387(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175654,15 +175654,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e2ff(%rip),%rdi \n+\tlea 0x36a4f2ff(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175684,15 +175684,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e277(%rip),%rdi \n+\tlea 0x36a4f277(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175714,15 +175714,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e1ef(%rip),%rdi \n+\tlea 0x36a4f1ef(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175744,15 +175744,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e167(%rip),%rdi \n+\tlea 0x36a4f167(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175774,15 +175774,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e0df(%rip),%rdi \n+\tlea 0x36a4f0df(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175804,15 +175804,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4e057(%rip),%rdi \n+\tlea 0x36a4f057(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175834,15 +175834,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4dfcf(%rip),%rdi \n+\tlea 0x36a4efcf(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175864,15 +175864,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4df47(%rip),%rdi \n+\tlea 0x36a4ef47(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175894,15 +175894,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4debf(%rip),%rdi \n+\tlea 0x36a4eebf(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175924,15 +175924,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4de37(%rip),%rdi \n+\tlea 0x36a4ee37(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175954,15 +175954,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4ddaf(%rip),%rdi \n+\tlea 0x36a4edaf(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -175984,15 +175984,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4dd27(%rip),%rdi \n+\tlea 0x36a4ed27(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -176014,15 +176014,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4dc9f(%rip),%rdi \n+\tlea 0x36a4ec9f(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -176044,15 +176044,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4dc17(%rip),%rdi \n+\tlea 0x36a4ec17(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -176074,254 +176074,254 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a4db8f(%rip),%rdi \n+\tlea 0x36a4eb8f(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a534e4(%rip),%rbx # 36b46380 ::get_beta()::val@@Base+0x68>\n+\tmov 0x36a544e4(%rip),%rbx # 36b47380 ::get_beta()::val@@Base+0x68>\n \ttest %rbx,%rbx\n \tjne f2eb7 \n-\tlea 0x36a52478(%rip),%rdi # 36b45320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48e8>\n+\tlea 0x36a53478(%rip),%rdi # 36b46320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48e8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a534c9(%rip) # 36b46380 ::get_beta()::val@@Base+0x68>\n+\tmov %rax,0x36a544c9(%rip) # 36b47380 ::get_beta()::val@@Base+0x68>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4da96(%rip),%rsi \n+\tlea 0x36a4ea96(%rip),%rsi \n \tlea 0x1f8d6d(%rip),%rcx # 2ebc3e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119ce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4da80(%rip),%rsi \n+\tlea 0x36a4ea80(%rip),%rsi \n \tlea 0x1f8d60(%rip),%rcx # 2ebc5f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119ef>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4da5a(%rip),%rsi \n+\tlea 0x36a4ea5a(%rip),%rsi \n \tlea 0x1f8d77(%rip),%rcx # 2ebca4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11a34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4da34(%rip),%rsi \n+\tlea 0x36a4ea34(%rip),%rsi \n \tlea 0x1f8d8e(%rip),%rcx # 2ebce9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11a79>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4da0e(%rip),%rsi \n+\tlea 0x36a4ea0e(%rip),%rsi \n \tlea 0x1f8da7(%rip),%rcx # 2ebd30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11ac0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d9e8(%rip),%rsi \n+\tlea 0x36a4e9e8(%rip),%rsi \n \tlea 0x1f8dc0(%rip),%rcx # 2ebd77 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11b07>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d9c2(%rip),%rsi \n+\tlea 0x36a4e9c2(%rip),%rsi \n \tlea 0x1f8dd9(%rip),%rcx # 2ebdbe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11b4e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d99c(%rip),%rsi \n+\tlea 0x36a4e99c(%rip),%rsi \n \tlea 0x1f8df4(%rip),%rcx # 2ebe07 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11b97>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d976(%rip),%rsi \n+\tlea 0x36a4e976(%rip),%rsi \n \tlea 0x1f8e0f(%rip),%rcx # 2ebe50 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11be0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d908(%rip),%rsi \n+\tlea 0x36a4e908(%rip),%rsi \n \tlea 0x1f8e2a(%rip),%rcx # 2ebe99 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11c29>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d8d2(%rip),%rsi \n+\tlea 0x36a4e8d2(%rip),%rsi \n \tlea 0x1f8e3f(%rip),%rcx # 2ebedc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11c6c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d904(%rip),%rsi \n+\tlea 0x36a4e904(%rip),%rsi \n \tlea 0x1f8e54(%rip),%rcx # 2ebf1f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11caf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d8de(%rip),%rsi \n+\tlea 0x36a4e8de(%rip),%rsi \n \tlea 0x1f8e65(%rip),%rcx # 2ebf5e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11cee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d8b8(%rip),%rsi \n+\tlea 0x36a4e8b8(%rip),%rsi \n \tlea 0x1f8e76(%rip),%rcx # 2ebf9d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11d2d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d892(%rip),%rsi \n+\tlea 0x36a4e892(%rip),%rsi \n \tlea 0x1f8e89(%rip),%rcx # 2ebfde (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11d6e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d86c(%rip),%rsi \n+\tlea 0x36a4e86c(%rip),%rsi \n \tlea 0x1f8e9c(%rip),%rcx # 2ec01f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11daf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d846(%rip),%rsi \n+\tlea 0x36a4e846(%rip),%rsi \n \tlea 0x1f8eaf(%rip),%rcx # 2ec060 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11df0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d820(%rip),%rsi \n+\tlea 0x36a4e820(%rip),%rsi \n \tlea 0x1f8ec4(%rip),%rcx # 2ec0a3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11e33>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d7fa(%rip),%rsi \n+\tlea 0x36a4e7fa(%rip),%rsi \n \tlea 0x1f8ed9(%rip),%rcx # 2ec0e6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11e76>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d78c(%rip),%rsi \n+\tlea 0x36a4e78c(%rip),%rsi \n \tlea 0x1f8eee(%rip),%rcx # 2ec129 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11eb9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4d756(%rip),%rsi \n+\tlea 0x36a4e756(%rip),%rsi \n \tlea 0x1f8efd(%rip),%rcx # 2ec166 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x11ef6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x36a530e9(%rip),%rdi # 36b46380 ::get_beta()::val@@Base+0x68>\n+\tmov 0x36a540e9(%rip),%rdi # 36b47380 ::get_beta()::val@@Base+0x68>\n \ttest %rdi,%rdi\n \tje f32b1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a530d3(%rip) # 36b46380 ::get_beta()::val@@Base+0x68>\n+\tmovq $0x0,0x36a540d3(%rip) # 36b47380 ::get_beta()::val@@Base+0x68>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000f32c0 :\n ggml_cuda_op_ssm_conv(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -176483,15 +176483,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a4d49b(%rip),%rdi \n+\tlea 0x36a4e49b(%rip),%rdi \n \tjmp f39ac \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ssm-conv.cu:117\n \tcmp $0x3,%r10\n \tmov %edx,0x84(%rsp)\n \tje f3843 \n \tcmp $0x4,%r10\n \tjne f3b01 \n@@ -176562,15 +176562,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a4d322(%rip),%rdi \n+\tlea 0x36a4e322(%rip),%rdi \n \tjmp f39ac \n \tmov %edi,%ebx\n \tmov %esi,%r14d\n \tmov %edx,%ebp\n \tmovabs $0x100000080,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ssm-conv.cu:111\n \tmov %r8,%rdi\n@@ -176623,15 +176623,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a4d1d2(%rip),%rdi \n+\tlea 0x36a4e1d2(%rip),%rdi \n \tjmp f39ac \n \tmov %edi,%ebx\n \tmov %esi,%r14d\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ssm-conv.cu:124\n \tlea 0x7f(%rbp),%rax\n \tadd $0xfe,%rbp\n \ttest %rax,%rax\n@@ -176696,15 +176696,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a4d074(%rip),%rdi \n+\tlea 0x36a4e074(%rip),%rdi \n \tlea 0xa0(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/ssm-conv.cu:156\n \tadd $0xf8,%rsp\n@@ -176821,15 +176821,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4ce09(%rip),%rdi \n+\tlea 0x36a4de09(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -176868,15 +176868,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4cd11(%rip),%rdi \n+\tlea 0x36a4dd11(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -176915,15 +176915,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4cc19(%rip),%rdi \n+\tlea 0x36a4dc19(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -176962,83 +176962,83 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4cb21(%rip),%rdi \n+\tlea 0x36a4db21(%rip),%rdi \n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a5245c(%rip),%rbx # 36b46388 ::get_beta()::val@@Base+0x70>\n+\tmov 0x36a5345c(%rip),%rbx # 36b47388 ::get_beta()::val@@Base+0x70>\n \ttest %rbx,%rbx\n \tjne f3f47 \n-\tlea 0x36a51400(%rip),%rdi # 36b45338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4900>\n+\tlea 0x36a52400(%rip),%rdi # 36b46338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4900>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a52441(%rip) # 36b46388 ::get_beta()::val@@Base+0x70>\n+\tmov %rax,0x36a53441(%rip) # 36b47388 ::get_beta()::val@@Base+0x70>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4caae(%rip),%rsi \n+\tlea 0x36a4daae(%rip),%rsi \n \tlea 0x1f834e(%rip),%rcx # 2ec2af (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1203f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4ca88(%rip),%rsi \n+\tlea 0x36a4da88(%rip),%rsi \n \tlea 0x1f834f(%rip),%rcx # 2ec2de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1206e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4ca62(%rip),%rsi \n+\tlea 0x36a4da62(%rip),%rsi \n \tlea 0x1f8350(%rip),%rcx # 2ec30d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1209d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4ca3c(%rip),%rsi \n+\tlea 0x36a4da3c(%rip),%rsi \n \tlea 0x1f8361(%rip),%rcx # 2ec34c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x120dc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a52371(%rip),%rdi # 36b46388 ::get_beta()::val@@Base+0x70>\n+\tmov 0x36a53371(%rip),%rdi # 36b47388 ::get_beta()::val@@Base+0x70>\n \ttest %rdi,%rdi\n \tje f4031 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a5235b(%rip) # 36b46388 ::get_beta()::val@@Base+0x70>\n+\tmovq $0x0,0x36a5335b(%rip) # 36b47388 ::get_beta()::val@@Base+0x70>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000f4040 :\n ggml_cuda_op_ssm_scan(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -177535,63 +177535,63 @@\n \tmov $0xd4,%esi\n \txor %eax,%eax\n \tcall 22ac0 \n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a51b74(%rip),%rbx # 36b46390 ::get_beta()::val@@Base+0x78>\n+\tmov 0x36a52b74(%rip),%rbx # 36b47390 ::get_beta()::val@@Base+0x78>\n \ttest %rbx,%rbx\n \tjne f4837 \n-\tlea 0x36a50b28(%rip),%rdi # 36b45350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4918>\n+\tlea 0x36a51b28(%rip),%rdi # 36b46350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4918>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a51b59(%rip) # 36b46390 ::get_beta()::val@@Base+0x78>\n+\tmov %rax,0x36a52b59(%rip) # 36b47390 ::get_beta()::val@@Base+0x78>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tmov 0x36a50746(%rip),%rsi # 36b44f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4568>\n+\tmov 0x36a51746(%rip),%rsi # 36b45f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4568>\n \tlea 0x1f7d00(%rip),%rcx # 2ec551 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x122e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tmov 0x36a506c0(%rip),%rsi # 36b44f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4508>\n+\tmov 0x36a516c0(%rip),%rsi # 36b45f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4508>\n \tlea 0x1f7d1e(%rip),%rcx # 2ec59d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1232d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tmov 0x36a50722(%rip),%rsi # 36b44fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4590>\n+\tmov 0x36a51722(%rip),%rsi # 36b45fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4590>\n \tlea 0x1f7d3c(%rip),%rcx # 2ec5e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12379>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a51aa9(%rip),%rdi # 36b46390 ::get_beta()::val@@Base+0x78>\n+\tmov 0x36a52aa9(%rip),%rdi # 36b47390 ::get_beta()::val@@Base+0x78>\n \ttest %rdi,%rdi\n \tje f4901 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a51a93(%rip) # 36b46390 ::get_beta()::val@@Base+0x78>\n+\tmovq $0x0,0x36a52a93(%rip) # 36b47390 ::get_beta()::val@@Base+0x78>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000f4910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base>:\n void __device_stub__ssm_scan_f32_group<16, 128>(float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long):\n@@ -177655,15 +177655,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tmov 0x36a504c8(%rip),%rdi # 36b44f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4568>\n+\tmov 0x36a514c8(%rip),%rdi # 36b45f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4568>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x138,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -177731,15 +177731,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tmov 0x36a50290(%rip),%rdi # 36b44f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4508>\n+\tmov 0x36a51290(%rip),%rdi # 36b45f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long, long, long)@@Base+0x4508>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x138,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -177803,15 +177803,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tmov 0x36a50160(%rip),%rdi # 36b44fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4590>\n+\tmov 0x36a51160(%rip),%rdi # 36b45fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4590>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n@@ -178011,15 +178011,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b954(%rip),%rdi # 36b40a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n+\tlea 0x36a4c954(%rip),%rdi # 36b41a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/sumrows.cu:7\n \tadd $0x70,%rsp\n@@ -178044,15 +178044,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b8cd(%rip),%rdi # 36b40a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n+\tlea 0x36a4c8cd(%rip),%rdi # 36b41a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -178139,15 +178139,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b795(%rip),%rdi # 36b40a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n+\tlea 0x36a4c795(%rip),%rdi # 36b41a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/sumrows.cu:26\n \tadd $0x70,%rsp\n@@ -178186,41 +178186,41 @@\n \tlea 0x1e5db6(%rip),%rdx # 2db104 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xe94>\n \tmov $0x33f,%ecx\n \tmov %rax,%r8\n \tcall 229a0 \n \tnopl 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36a5102d(%rip),%rdi # 36b46398 ::get_beta()::val@@Base+0x80>\n+\tmov 0x36a5202d(%rip),%rdi # 36b47398 ::get_beta()::val@@Base+0x80>\n \ttest %rdi,%rdi\n \tjne f5386 \n-\tlea 0x36a4fff1(%rip),%rdi # 36b45368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4930>\n+\tlea 0x36a50ff1(%rip),%rdi # 36b46368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4930>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a51012(%rip) # 36b46398 ::get_beta()::val@@Base+0x80>\n+\tmov %rax,0x36a52012(%rip) # 36b47398 ::get_beta()::val@@Base+0x80>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4b6a7(%rip),%rsi # 36b40a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n+\tlea 0x36a4c6a7(%rip),%rsi # 36b41a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8>\n \tlea 0x1f7327(%rip),%rcx # 2ec6c7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12457>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a50fc1(%rip),%rdi # 36b46398 ::get_beta()::val@@Base+0x80>\n+\tmov 0x36a51fc1(%rip),%rdi # 36b47398 ::get_beta()::val@@Base+0x80>\n \ttest %rdi,%rdi\n \tje f53f1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a50fab(%rip) # 36b46398 ::get_beta()::val@@Base+0x80>\n+\tmovq $0x0,0x36a51fab(%rip) # 36b47398 ::get_beta()::val@@Base+0x80>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000f5400 :\n ggml_cuda_op_timestep_embedding(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -178320,15 +178320,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b4fc(%rip),%rdi # 36b40a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10>\n+\tlea 0x36a4c4fc(%rip),%rdi # 36b41a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/tsembd.cu:47\n \tadd $0x78,%rsp\n@@ -178385,51 +178385,51 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b3e8(%rip),%rdi # 36b40a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10>\n+\tlea 0x36a4c3e8(%rip),%rdi # 36b41a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tsub $0x28,%rsp\n-\tmov 0x36a50d15(%rip),%rdi # 36b463a0 ::get_beta()::val@@Base+0x88>\n+\tmov 0x36a51d15(%rip),%rdi # 36b473a0 ::get_beta()::val@@Base+0x88>\n \ttest %rdi,%rdi\n \tjne f56a6 \n-\tlea 0x36a4fce9(%rip),%rdi # 36b45380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4948>\n+\tlea 0x36a50ce9(%rip),%rdi # 36b46380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4948>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rdi\n-\tmov %rax,0x36a50cfa(%rip) # 36b463a0 ::get_beta()::val@@Base+0x88>\n+\tmov %rax,0x36a51cfa(%rip) # 36b473a0 ::get_beta()::val@@Base+0x88>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4b38f(%rip),%rsi # 36b40a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10>\n+\tlea 0x36a4c38f(%rip),%rsi # 36b41a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10>\n \tlea 0x1f7077(%rip),%rcx # 2ec737 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x124c7>\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x18(%rip),%rdi \n \tadd $0x28,%rsp\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a50ca9(%rip),%rdi # 36b463a0 ::get_beta()::val@@Base+0x88>\n+\tmov 0x36a51ca9(%rip),%rdi # 36b473a0 ::get_beta()::val@@Base+0x88>\n \ttest %rdi,%rdi\n \tje f5711 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a50c93(%rip) # 36b463a0 ::get_beta()::val@@Base+0x88>\n+\tmovq $0x0,0x36a51c93(%rip) # 36b473a0 ::get_beta()::val@@Base+0x88>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000f5720 :\n ggml_cuda_op_abs(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -178522,15 +178522,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b1ea(%rip),%rdi # 36b40a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18>\n+\tlea 0x36a4c1ea(%rip),%rdi # 36b41a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18>\n \tjmp f58cc \n ggml_cuda_op_abs(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_abs(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f58e2 \n \tmov %r13,0x48(%rsp)\n@@ -178547,15 +178547,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4b18c(%rip),%rdi # 36b40a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20>\n+\tlea 0x36a4c18c(%rip),%rdi # 36b41a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20>\n ggml_cuda_op_abs(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:125\n@@ -178697,15 +178697,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4af7a(%rip),%rdi # 36b40a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28>\n+\tlea 0x36a4bf7a(%rip),%rdi # 36b41a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28>\n \tjmp f5b4c \n ggml_cuda_op_sgn(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_sgn(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f5b62 \n \tmov %r13,0x48(%rsp)\n@@ -178722,15 +178722,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4af1c(%rip),%rdi # 36b40a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30>\n+\tlea 0x36a4bf1c(%rip),%rdi # 36b41a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30>\n ggml_cuda_op_sgn(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:129\n@@ -178872,15 +178872,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4ad0a(%rip),%rdi # 36b40a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38>\n+\tlea 0x36a4bd0a(%rip),%rdi # 36b41a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38>\n \tjmp f5dcc \n ggml_cuda_op_neg(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_neg(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f5de2 \n \tmov %r13,0x48(%rsp)\n@@ -178897,15 +178897,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4acac(%rip),%rdi # 36b40a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x40>\n+\tlea 0x36a4bcac(%rip),%rdi # 36b41a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x40>\n ggml_cuda_op_neg(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:133\n@@ -179047,15 +179047,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4aa9a(%rip),%rdi # 36b40a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48>\n+\tlea 0x36a4ba9a(%rip),%rdi # 36b41a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48>\n \tjmp f604c \n ggml_cuda_op_step(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_step(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f6062 \n \tmov %r13,0x48(%rsp)\n@@ -179072,15 +179072,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4aa3c(%rip),%rdi # 36b40a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x50>\n+\tlea 0x36a4ba3c(%rip),%rdi # 36b41a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x50>\n ggml_cuda_op_step(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:137\n@@ -179222,15 +179222,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a82a(%rip),%rdi # 36b40a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58>\n+\tlea 0x36a4b82a(%rip),%rdi # 36b41a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58>\n \tjmp f62cc \n ggml_cuda_op_gelu(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_gelu(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f62e2 \n \tmov %r13,0x48(%rsp)\n@@ -179247,15 +179247,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a7cc(%rip),%rdi # 36b40a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x60>\n+\tlea 0x36a4b7cc(%rip),%rdi # 36b41a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x60>\n ggml_cuda_op_gelu(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:141\n@@ -179397,15 +179397,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a5ba(%rip),%rdi # 36b40aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x68>\n+\tlea 0x36a4b5ba(%rip),%rdi # 36b41aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x68>\n \tjmp f654c \n ggml_cuda_op_gelu_erf(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_gelu_erf(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f6562 \n \tmov %r13,0x48(%rsp)\n@@ -179422,15 +179422,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a55c(%rip),%rdi # 36b40aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x70>\n+\tlea 0x36a4b55c(%rip),%rdi # 36b41aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x70>\n ggml_cuda_op_gelu_erf(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:145\n@@ -179572,15 +179572,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a34a(%rip),%rdi # 36b40ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x78>\n+\tlea 0x36a4b34a(%rip),%rdi # 36b41ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x78>\n \tjmp f67cc \n ggml_cuda_op_gelu_quick(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_gelu_quick(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f67e2 \n \tmov %r13,0x48(%rsp)\n@@ -179597,15 +179597,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a2ec(%rip),%rdi # 36b40ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x80>\n+\tlea 0x36a4b2ec(%rip),%rdi # 36b41ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x80>\n ggml_cuda_op_gelu_quick(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:149\n@@ -179747,15 +179747,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a0da(%rip),%rdi # 36b40ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x88>\n+\tlea 0x36a4b0da(%rip),%rdi # 36b41ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x88>\n \tjmp f6a4c \n ggml_cuda_op_silu(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_silu(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f6a62 \n \tmov %r13,0x48(%rsp)\n@@ -179772,15 +179772,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4a07c(%rip),%rdi # 36b40ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x90>\n+\tlea 0x36a4b07c(%rip),%rdi # 36b41ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x90>\n ggml_cuda_op_silu(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:153\n@@ -179922,15 +179922,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a49e6a(%rip),%rdi # 36b40ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x98>\n+\tlea 0x36a4ae6a(%rip),%rdi # 36b41ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x98>\n \tjmp f6ccc \n ggml_cuda_op_tanh(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_tanh(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f6ce2 \n \tmov %r13,0x48(%rsp)\n@@ -179947,15 +179947,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a49e0c(%rip),%rdi # 36b40ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa0>\n+\tlea 0x36a4ae0c(%rip),%rdi # 36b41ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa0>\n ggml_cuda_op_tanh(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:157\n@@ -180097,15 +180097,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a49bfa(%rip),%rdi # 36b40ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa8>\n+\tlea 0x36a4abfa(%rip),%rdi # 36b41ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa8>\n \tjmp f6f4c \n ggml_cuda_op_relu(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_relu(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f6f62 \n \tmov %r13,0x48(%rsp)\n@@ -180122,15 +180122,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a49b9c(%rip),%rdi # 36b40ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb0>\n+\tlea 0x36a4ab9c(%rip),%rdi # 36b41ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb0>\n ggml_cuda_op_relu(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:161\n@@ -180272,15 +180272,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4998a(%rip),%rdi # 36b40af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb8>\n+\tlea 0x36a4a98a(%rip),%rdi # 36b41af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb8>\n \tjmp f71cc \n ggml_cuda_op_sigmoid(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_sigmoid(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f71e2 \n \tmov %r13,0x48(%rsp)\n@@ -180297,15 +180297,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4992c(%rip),%rdi # 36b40af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc0>\n+\tlea 0x36a4a92c(%rip),%rdi # 36b41af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc0>\n ggml_cuda_op_sigmoid(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:165\n@@ -180447,15 +180447,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4971a(%rip),%rdi # 36b40b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc8>\n+\tlea 0x36a4a71a(%rip),%rdi # 36b41b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc8>\n \tjmp f744c \n ggml_cuda_op_hardsigmoid(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_hardsigmoid(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f7462 \n \tmov %r13,0x48(%rsp)\n@@ -180472,15 +180472,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a496bc(%rip),%rdi # 36b40b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd0>\n+\tlea 0x36a4a6bc(%rip),%rdi # 36b41b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd0>\n ggml_cuda_op_hardsigmoid(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:169\n@@ -180622,15 +180622,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a494aa(%rip),%rdi # 36b40b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd8>\n+\tlea 0x36a4a4aa(%rip),%rdi # 36b41b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd8>\n \tjmp f76cc \n ggml_cuda_op_hardswish(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_hardswish(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f76e2 \n \tmov %r13,0x48(%rsp)\n@@ -180647,15 +180647,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4944c(%rip),%rdi # 36b40b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe0>\n+\tlea 0x36a4a44c(%rip),%rdi # 36b41b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe0>\n ggml_cuda_op_hardswish(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:173\n@@ -180797,15 +180797,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4923a(%rip),%rdi # 36b40b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe8>\n+\tlea 0x36a4a23a(%rip),%rdi # 36b41b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe8>\n \tjmp f794c \n ggml_cuda_op_exp(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_exp(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f7962 \n \tmov %r13,0x48(%rsp)\n@@ -180822,15 +180822,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a491dc(%rip),%rdi # 36b40b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf0>\n+\tlea 0x36a4a1dc(%rip),%rdi # 36b41b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf0>\n ggml_cuda_op_exp(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:177\n@@ -180972,15 +180972,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a48fca(%rip),%rdi # 36b40b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf8>\n+\tlea 0x36a49fca(%rip),%rdi # 36b41b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf8>\n \tjmp f7bcc \n ggml_cuda_op_sqr(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_sqr(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f7be2 \n \tmov %r13,0x48(%rsp)\n@@ -180997,15 +180997,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a48f6c(%rip),%rdi # 36b40b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x100>\n+\tlea 0x36a49f6c(%rip),%rdi # 36b41b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x100>\n ggml_cuda_op_sqr(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:181\n@@ -181147,15 +181147,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a48d5a(%rip),%rdi # 36b40b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x108>\n+\tlea 0x36a49d5a(%rip),%rdi # 36b41b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x108>\n \tjmp f7e4c \n ggml_cuda_op_sqrt(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_sqrt(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f7e62 \n \tmov %r13,0x48(%rsp)\n@@ -181172,15 +181172,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a48cfc(%rip),%rdi # 36b40b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x110>\n+\tlea 0x36a49cfc(%rip),%rdi # 36b41b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x110>\n ggml_cuda_op_sqrt(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:185\n@@ -181322,15 +181322,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a48aea(%rip),%rdi # 36b40b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x118>\n+\tlea 0x36a49aea(%rip),%rdi # 36b41b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x118>\n \tjmp f80cc \n ggml_cuda_op_sin(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_sin(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f80e2 \n \tmov %r13,0x48(%rsp)\n@@ -181347,15 +181347,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a48a8c(%rip),%rdi # 36b40b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x120>\n+\tlea 0x36a49a8c(%rip),%rdi # 36b41b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x120>\n ggml_cuda_op_sin(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:189\n@@ -181497,15 +181497,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4887a(%rip),%rdi # 36b40b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x128>\n+\tlea 0x36a4987a(%rip),%rdi # 36b41b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x128>\n \tjmp f834c \n ggml_cuda_op_cos(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_cos(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f8362 \n \tmov %r13,0x48(%rsp)\n@@ -181522,15 +181522,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4881c(%rip),%rdi # 36b40b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x130>\n+\tlea 0x36a4981c(%rip),%rdi # 36b41b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x130>\n ggml_cuda_op_cos(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:193\n@@ -181672,15 +181672,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4860a(%rip),%rdi # 36b40b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x138>\n+\tlea 0x36a4960a(%rip),%rdi # 36b41b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x138>\n \tjmp f85cc \n ggml_cuda_op_log(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void unary_cuda<&(op_log(float)), float>(float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:100\n \tjne f85e2 \n \tmov %r13,0x48(%rsp)\n@@ -181697,15 +181697,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a485ac(%rip),%rdi # 36b40b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x140>\n+\tlea 0x36a495ac(%rip),%rdi # 36b41b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x140>\n ggml_cuda_op_log(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:197\n@@ -181967,15 +181967,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a481dd(%rip),%rdi # 36b40b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x148>\n+\tlea 0x36a491dd(%rip),%rdi # 36b41b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x148>\n \tjmp f8aaf \n \ttest %eax,%eax\n \tjne f8ac8 \n \tmov 0x10(%rsp),%rsi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:272\n \tshr $0x2,%rsi\n \tmov 0x8(%rsp),%rdi\n@@ -182024,15 +182024,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a480d9(%rip),%rdi # 36b40b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x150>\n+\tlea 0x36a490d9(%rip),%rdi # 36b41b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x150>\n \tlea 0x90(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:278\n \tadd $0xc8,%rsp\n@@ -182342,15 +182342,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a47c1d(%rip),%rdi # 36b40b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x158>\n+\tlea 0x36a48c1d(%rip),%rdi # 36b41b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x158>\n \tjmp f907f \n \ttest %eax,%eax\n \tjne f9098 \n \tmov 0x10(%rsp),%rsi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:272\n \tshr $0x2,%rsi\n \tmov 0x8(%rsp),%rdi\n@@ -182399,15 +182399,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a47b19(%rip),%rdi # 36b40b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x160>\n+\tlea 0x36a48b19(%rip),%rdi # 36b41b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x160>\n \tlea 0x90(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:282\n \tadd $0xc8,%rsp\n@@ -182717,15 +182717,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a4765d(%rip),%rdi # 36b40ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x168>\n+\tlea 0x36a4865d(%rip),%rdi # 36b41ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x168>\n \tjmp f964f \n \ttest %eax,%eax\n \tjne f9668 \n \tmov 0x10(%rsp),%rsi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:272\n \tshr $0x2,%rsi\n \tmov 0x8(%rsp),%rdi\n@@ -182774,15 +182774,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a47559(%rip),%rdi # 36b40ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x170>\n+\tlea 0x36a48559(%rip),%rdi # 36b41ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x170>\n \tlea 0x90(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:286\n \tadd $0xc8,%rsp\n@@ -183092,15 +183092,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a4709d(%rip),%rdi # 36b40bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x178>\n+\tlea 0x36a4809d(%rip),%rdi # 36b41bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x178>\n \tjmp f9c1f \n \ttest %eax,%eax\n \tjne f9c38 \n \tmov 0x10(%rsp),%rsi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:272\n \tshr $0x2,%rsi\n \tmov 0x8(%rsp),%rdi\n@@ -183149,15 +183149,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a46f99(%rip),%rdi # 36b40bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x180>\n+\tlea 0x36a47f99(%rip),%rdi # 36b41bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x180>\n \tlea 0x90(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:290\n \tadd $0xc8,%rsp\n@@ -183467,15 +183467,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a46add(%rip),%rdi # 36b40bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x188>\n+\tlea 0x36a47add(%rip),%rdi # 36b41bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x188>\n \tjmp fa1ef \n \ttest %eax,%eax\n \tjne fa208 \n \tmov 0x10(%rsp),%rsi\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:272\n \tshr $0x2,%rsi\n \tmov 0x8(%rsp),%rdi\n@@ -183524,15 +183524,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a469d9(%rip),%rdi # 36b40bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x190>\n+\tlea 0x36a479d9(%rip),%rdi # 36b41bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x190>\n \tlea 0x90(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:294\n \tadd $0xc8,%rsp\n@@ -183731,15 +183731,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a466ad(%rip),%rdi # 36b40bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x198>\n+\tlea 0x36a476ad(%rip),%rdi # 36b41bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x198>\n \tjmp fa5a1 \n ggml_cuda_op_silu_back(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void silu_back_cuda(float const*, float const*, float*, int, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:317\n \tjne fa5b7 \n \tmov %rbp,0x50(%rsp)\n@@ -183760,15 +183760,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a46637(%rip),%rdi # 36b40bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a0>\n+\tlea 0x36a47637(%rip),%rdi # 36b41bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a0>\n ggml_cuda_op_silu_back(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:341\n@@ -183917,15 +183917,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a463f4(%rip),%rdi # 36b40be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a8>\n+\tlea 0x36a473f4(%rip),%rdi # 36b41be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a8>\n \tjmp fa86c \n ggml_cuda_op_leaky_relu(ggml_backend_cuda_context&, ggml_tensor*):\n \ttest %eax,%eax\n void leaky_relu_cuda(float const*, float*, int, float, ihipStream_t*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:363\n \tjne fa882 \n \tmov %r13,0x48(%rsp)\n@@ -183946,15 +183946,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4637c(%rip),%rdi # 36b40be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b0>\n+\tlea 0x36a4737c(%rip),%rdi # 36b41be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b0>\n ggml_cuda_op_leaky_relu(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/unary.cu:386\n@@ -184020,15 +184020,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a460ad(%rip),%rdi # 36b40a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18>\n+\tlea 0x36a470ad(%rip),%rdi # 36b41a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184048,15 +184048,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a46035(%rip),%rdi # 36b40a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20>\n+\tlea 0x36a47035(%rip),%rdi # 36b41a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184076,15 +184076,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45fbd(%rip),%rdi # 36b40a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28>\n+\tlea 0x36a46fbd(%rip),%rdi # 36b41a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184104,15 +184104,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45f45(%rip),%rdi # 36b40a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30>\n+\tlea 0x36a46f45(%rip),%rdi # 36b41a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184132,15 +184132,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45ecd(%rip),%rdi # 36b40a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38>\n+\tlea 0x36a46ecd(%rip),%rdi # 36b41a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184160,15 +184160,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45e55(%rip),%rdi # 36b40a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x40>\n+\tlea 0x36a46e55(%rip),%rdi # 36b41a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x40>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184188,15 +184188,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45ddd(%rip),%rdi # 36b40a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48>\n+\tlea 0x36a46ddd(%rip),%rdi # 36b41a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184216,15 +184216,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45d65(%rip),%rdi # 36b40a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x50>\n+\tlea 0x36a46d65(%rip),%rdi # 36b41a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x50>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184244,15 +184244,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45ced(%rip),%rdi # 36b40a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58>\n+\tlea 0x36a46ced(%rip),%rdi # 36b41a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184272,15 +184272,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45c75(%rip),%rdi # 36b40a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x60>\n+\tlea 0x36a46c75(%rip),%rdi # 36b41a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x60>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184300,15 +184300,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45bfd(%rip),%rdi # 36b40aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x68>\n+\tlea 0x36a46bfd(%rip),%rdi # 36b41aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x68>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184328,15 +184328,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45b85(%rip),%rdi # 36b40aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x70>\n+\tlea 0x36a46b85(%rip),%rdi # 36b41aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x70>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184356,15 +184356,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45b0d(%rip),%rdi # 36b40ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x78>\n+\tlea 0x36a46b0d(%rip),%rdi # 36b41ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x78>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184384,15 +184384,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45a95(%rip),%rdi # 36b40ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x80>\n+\tlea 0x36a46a95(%rip),%rdi # 36b41ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x80>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184412,15 +184412,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45a1d(%rip),%rdi # 36b40ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x88>\n+\tlea 0x36a46a1d(%rip),%rdi # 36b41ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x88>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184440,15 +184440,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a459a5(%rip),%rdi # 36b40ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x90>\n+\tlea 0x36a469a5(%rip),%rdi # 36b41ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x90>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184468,15 +184468,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4592d(%rip),%rdi # 36b40ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x98>\n+\tlea 0x36a4692d(%rip),%rdi # 36b41ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x98>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184496,15 +184496,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a458b5(%rip),%rdi # 36b40ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa0>\n+\tlea 0x36a468b5(%rip),%rdi # 36b41ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184524,15 +184524,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4583d(%rip),%rdi # 36b40ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa8>\n+\tlea 0x36a4683d(%rip),%rdi # 36b41ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184552,15 +184552,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a457c5(%rip),%rdi # 36b40ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb0>\n+\tlea 0x36a467c5(%rip),%rdi # 36b41ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184580,15 +184580,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4574d(%rip),%rdi # 36b40af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb8>\n+\tlea 0x36a4674d(%rip),%rdi # 36b41af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184608,15 +184608,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a456d5(%rip),%rdi # 36b40af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc0>\n+\tlea 0x36a466d5(%rip),%rdi # 36b41af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184636,15 +184636,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4565d(%rip),%rdi # 36b40b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc8>\n+\tlea 0x36a4665d(%rip),%rdi # 36b41b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184664,15 +184664,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a455e5(%rip),%rdi # 36b40b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd0>\n+\tlea 0x36a465e5(%rip),%rdi # 36b41b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184692,15 +184692,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4556d(%rip),%rdi # 36b40b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd8>\n+\tlea 0x36a4656d(%rip),%rdi # 36b41b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184720,15 +184720,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a454f5(%rip),%rdi # 36b40b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe0>\n+\tlea 0x36a464f5(%rip),%rdi # 36b41b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184748,15 +184748,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4547d(%rip),%rdi # 36b40b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe8>\n+\tlea 0x36a4647d(%rip),%rdi # 36b41b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184776,15 +184776,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45405(%rip),%rdi # 36b40b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf0>\n+\tlea 0x36a46405(%rip),%rdi # 36b41b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184804,15 +184804,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4538d(%rip),%rdi # 36b40b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf8>\n+\tlea 0x36a4638d(%rip),%rdi # 36b41b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184832,15 +184832,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45315(%rip),%rdi # 36b40b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x100>\n+\tlea 0x36a46315(%rip),%rdi # 36b41b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x100>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184860,15 +184860,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4529d(%rip),%rdi # 36b40b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x108>\n+\tlea 0x36a4629d(%rip),%rdi # 36b41b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x108>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184888,15 +184888,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45225(%rip),%rdi # 36b40b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x110>\n+\tlea 0x36a46225(%rip),%rdi # 36b41b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x110>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184916,15 +184916,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a451ad(%rip),%rdi # 36b40b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x118>\n+\tlea 0x36a461ad(%rip),%rdi # 36b41b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x118>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184944,15 +184944,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45135(%rip),%rdi # 36b40b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x120>\n+\tlea 0x36a46135(%rip),%rdi # 36b41b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x120>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -184972,15 +184972,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a450bd(%rip),%rdi # 36b40b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x128>\n+\tlea 0x36a460bd(%rip),%rdi # 36b41b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x128>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -185000,15 +185000,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a45045(%rip),%rdi # 36b40b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x130>\n+\tlea 0x36a46045(%rip),%rdi # 36b41b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x130>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -185028,15 +185028,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a44fcd(%rip),%rdi # 36b40b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x138>\n+\tlea 0x36a45fcd(%rip),%rdi # 36b41b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x138>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -185056,15 +185056,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a44f55(%rip),%rdi # 36b40b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x140>\n+\tlea 0x36a45f55(%rip),%rdi # 36b41b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x140>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x78,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -185095,15 +185095,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44e98(%rip),%rdi # 36b40b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x148>\n+\tlea 0x36a45e98(%rip),%rdi # 36b41b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x148>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185134,15 +185134,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44dd0(%rip),%rdi # 36b40b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x150>\n+\tlea 0x36a45dd0(%rip),%rdi # 36b41b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x150>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185173,15 +185173,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44d08(%rip),%rdi # 36b40b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x158>\n+\tlea 0x36a45d08(%rip),%rdi # 36b41b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x158>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185212,15 +185212,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44c40(%rip),%rdi # 36b40b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x160>\n+\tlea 0x36a45c40(%rip),%rdi # 36b41b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x160>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185251,15 +185251,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44b78(%rip),%rdi # 36b40ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x168>\n+\tlea 0x36a45b78(%rip),%rdi # 36b41ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x168>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185290,15 +185290,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44ab0(%rip),%rdi # 36b40ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x170>\n+\tlea 0x36a45ab0(%rip),%rdi # 36b41ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x170>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185329,15 +185329,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a449e8(%rip),%rdi # 36b40bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x178>\n+\tlea 0x36a459e8(%rip),%rdi # 36b41bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x178>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185368,15 +185368,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44920(%rip),%rdi # 36b40bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x180>\n+\tlea 0x36a45920(%rip),%rdi # 36b41bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x180>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185407,15 +185407,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44858(%rip),%rdi # 36b40bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x188>\n+\tlea 0x36a45858(%rip),%rdi # 36b41bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x188>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185446,15 +185446,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36a44790(%rip),%rdi # 36b40bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x190>\n+\tlea 0x36a45790(%rip),%rdi # 36b41bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x190>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0xa8,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -185477,15 +185477,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a446fe(%rip),%rdi # 36b40bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x198>\n+\tlea 0x36a456fe(%rip),%rdi # 36b41bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x198>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -185508,15 +185508,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a44676(%rip),%rdi # 36b40bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a0>\n+\tlea 0x36a45676(%rip),%rdi # 36b41bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -185539,15 +185539,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a445ed(%rip),%rdi # 36b40be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a8>\n+\tlea 0x36a455ed(%rip),%rdi # 36b41be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl (%rax)\n@@ -185570,563 +185570,563 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a44565(%rip),%rdi # 36b40be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b0>\n+\tlea 0x36a45565(%rip),%rdi # 36b41be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl (%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a49cfc(%rip),%rbx # 36b463a8 ::get_beta()::val@@Base+0x90>\n+\tmov 0x36a4acfc(%rip),%rbx # 36b473a8 ::get_beta()::val@@Base+0x90>\n \ttest %rbx,%rbx\n \tjne fc6c7 \n-\tlea 0x36a48ce0(%rip),%rdi # 36b45398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4960>\n+\tlea 0x36a49ce0(%rip),%rdi # 36b46398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4960>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a49ce1(%rip) # 36b463a8 ::get_beta()::val@@Base+0x90>\n+\tmov %rax,0x36a4ace1(%rip) # 36b473a8 ::get_beta()::val@@Base+0x90>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44376(%rip),%rsi # 36b40a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18>\n+\tlea 0x36a45376(%rip),%rsi # 36b41a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18>\n \tlea 0x1f0192(%rip),%rcx # 2ec873 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12603>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44350(%rip),%rsi # 36b40a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20>\n+\tlea 0x36a45350(%rip),%rsi # 36b41a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20>\n \tlea 0x1f019e(%rip),%rcx # 2ec8ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1263d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4432a(%rip),%rsi # 36b40a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28>\n+\tlea 0x36a4532a(%rip),%rsi # 36b41a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28>\n \tlea 0x1f01a4(%rip),%rcx # 2ec8e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12671>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44304(%rip),%rsi # 36b40a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30>\n+\tlea 0x36a45304(%rip),%rsi # 36b41a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30>\n \tlea 0x1f01b0(%rip),%rcx # 2ec91b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x126ab>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a442de(%rip),%rsi # 36b40a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38>\n+\tlea 0x36a452de(%rip),%rsi # 36b41a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x38>\n \tlea 0x1f01b6(%rip),%rcx # 2ec94f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x126df>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a442b8(%rip),%rsi # 36b40a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x40>\n+\tlea 0x36a452b8(%rip),%rsi # 36b41a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x40>\n \tlea 0x1f01c2(%rip),%rcx # 2ec989 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12719>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44292(%rip),%rsi # 36b40a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48>\n+\tlea 0x36a45292(%rip),%rsi # 36b41a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x48>\n \tlea 0x1f01c8(%rip),%rcx # 2ec9bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1274d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4426c(%rip),%rsi # 36b40a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x50>\n+\tlea 0x36a4526c(%rip),%rsi # 36b41a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x50>\n \tlea 0x1f01d5(%rip),%rcx # 2ec9f8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12788>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44246(%rip),%rsi # 36b40a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58>\n+\tlea 0x36a45246(%rip),%rsi # 36b41a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x58>\n \tlea 0x1f01dc(%rip),%rcx # 2eca2d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x127bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44220(%rip),%rsi # 36b40a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x60>\n+\tlea 0x36a45220(%rip),%rsi # 36b41a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x60>\n \tlea 0x1f01e9(%rip),%rcx # 2eca68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x127f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a441fa(%rip),%rsi # 36b40aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x68>\n+\tlea 0x36a451fa(%rip),%rsi # 36b41aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x68>\n \tlea 0x1f01f0(%rip),%rcx # 2eca9d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1282d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a441d4(%rip),%rsi # 36b40aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x70>\n+\tlea 0x36a451d4(%rip),%rsi # 36b41aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x70>\n \tlea 0x1f0202(%rip),%rcx # 2ecadd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1286d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a441ae(%rip),%rsi # 36b40ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x78>\n+\tlea 0x36a451ae(%rip),%rsi # 36b41ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x78>\n \tlea 0x1f020e(%rip),%rcx # 2ecb17 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x128a7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44188(%rip),%rsi # 36b40ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x80>\n+\tlea 0x36a45188(%rip),%rsi # 36b41ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x80>\n \tlea 0x1f0222(%rip),%rcx # 2ecb59 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x128e9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44162(%rip),%rsi # 36b40ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x88>\n+\tlea 0x36a45162(%rip),%rsi # 36b41ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x88>\n \tlea 0x1f0230(%rip),%rcx # 2ecb95 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12925>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4413c(%rip),%rsi # 36b40ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x90>\n+\tlea 0x36a4513c(%rip),%rsi # 36b41ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x90>\n \tlea 0x1f023d(%rip),%rcx # 2ecbd0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12960>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44116(%rip),%rsi # 36b40ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x98>\n+\tlea 0x36a45116(%rip),%rsi # 36b41ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x98>\n \tlea 0x1f0244(%rip),%rcx # 2ecc05 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12995>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a440f0(%rip),%rsi # 36b40ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa0>\n+\tlea 0x36a450f0(%rip),%rsi # 36b41ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa0>\n \tlea 0x1f0251(%rip),%rcx # 2ecc40 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x129d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a440ca(%rip),%rsi # 36b40ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa8>\n+\tlea 0x36a450ca(%rip),%rsi # 36b41ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa8>\n \tlea 0x1f0258(%rip),%rcx # 2ecc75 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12a05>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a440a4(%rip),%rsi # 36b40ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb0>\n+\tlea 0x36a450a4(%rip),%rsi # 36b41ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb0>\n \tlea 0x1f0265(%rip),%rcx # 2eccb0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12a40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4407e(%rip),%rsi # 36b40af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb8>\n+\tlea 0x36a4507e(%rip),%rsi # 36b41af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb8>\n \tlea 0x1f026c(%rip),%rcx # 2ecce5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12a75>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44058(%rip),%rsi # 36b40af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc0>\n+\tlea 0x36a45058(%rip),%rsi # 36b41af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc0>\n \tlea 0x1f027d(%rip),%rcx # 2ecd24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12ab4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a44032(%rip),%rsi # 36b40b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc8>\n+\tlea 0x36a45032(%rip),%rsi # 36b41b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc8>\n \tlea 0x1f0288(%rip),%rcx # 2ecd5d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12aed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a4400c(%rip),%rsi # 36b40b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd0>\n+\tlea 0x36a4500c(%rip),%rsi # 36b41b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd0>\n \tlea 0x1f029d(%rip),%rcx # 2ecda0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12b30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43fe6(%rip),%rsi # 36b40b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd8>\n+\tlea 0x36a44fe6(%rip),%rsi # 36b41b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd8>\n \tlea 0x1f02ac(%rip),%rcx # 2ecddd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12b6d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43fc0(%rip),%rsi # 36b40b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe0>\n+\tlea 0x36a44fc0(%rip),%rsi # 36b41b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe0>\n \tlea 0x1f02bf(%rip),%rcx # 2ece1e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12bae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43f9a(%rip),%rsi # 36b40b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe8>\n+\tlea 0x36a44f9a(%rip),%rsi # 36b41b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe8>\n \tlea 0x1f02cc(%rip),%rcx # 2ece59 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12be9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43f74(%rip),%rsi # 36b40b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf0>\n+\tlea 0x36a44f74(%rip),%rsi # 36b41b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf0>\n \tlea 0x1f02d8(%rip),%rcx # 2ece93 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12c23>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43f4e(%rip),%rsi # 36b40b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf8>\n+\tlea 0x36a44f4e(%rip),%rsi # 36b41b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf8>\n \tlea 0x1f02de(%rip),%rcx # 2ecec7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12c57>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43f28(%rip),%rsi # 36b40b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x100>\n+\tlea 0x36a44f28(%rip),%rsi # 36b41b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x100>\n \tlea 0x1f02ea(%rip),%rcx # 2ecf01 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12c91>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43f02(%rip),%rsi # 36b40b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x108>\n+\tlea 0x36a44f02(%rip),%rsi # 36b41b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x108>\n \tlea 0x1f02f0(%rip),%rcx # 2ecf35 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12cc5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43edc(%rip),%rsi # 36b40b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x110>\n+\tlea 0x36a44edc(%rip),%rsi # 36b41b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x110>\n \tlea 0x1f02fd(%rip),%rcx # 2ecf70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12d00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43eb6(%rip),%rsi # 36b40b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x118>\n+\tlea 0x36a44eb6(%rip),%rsi # 36b41b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x118>\n \tlea 0x1f0304(%rip),%rcx # 2ecfa5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12d35>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43e90(%rip),%rsi # 36b40b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x120>\n+\tlea 0x36a44e90(%rip),%rsi # 36b41b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x120>\n \tlea 0x1f0310(%rip),%rcx # 2ecfdf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12d6f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43e6a(%rip),%rsi # 36b40b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x128>\n+\tlea 0x36a44e6a(%rip),%rsi # 36b41b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x128>\n \tlea 0x1f0316(%rip),%rcx # 2ed013 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12da3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43e44(%rip),%rsi # 36b40b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x130>\n+\tlea 0x36a44e44(%rip),%rsi # 36b41b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x130>\n \tlea 0x1f0322(%rip),%rcx # 2ed04d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12ddd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43e1e(%rip),%rsi # 36b40b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x138>\n+\tlea 0x36a44e1e(%rip),%rsi # 36b41b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x138>\n \tlea 0x1f0328(%rip),%rcx # 2ed081 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12e11>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43df8(%rip),%rsi # 36b40b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x140>\n+\tlea 0x36a44df8(%rip),%rsi # 36b41b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x140>\n \tlea 0x1f0334(%rip),%rcx # 2ed0bb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12e4b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43dd2(%rip),%rsi # 36b40b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x148>\n+\tlea 0x36a44dd2(%rip),%rsi # 36b41b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x148>\n \tlea 0x1f033a(%rip),%rcx # 2ed0ef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12e7f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43dac(%rip),%rsi # 36b40b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x150>\n+\tlea 0x36a44dac(%rip),%rsi # 36b41b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x150>\n \tlea 0x1f0353(%rip),%rcx # 2ed136 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12ec6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43d86(%rip),%rsi # 36b40b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x158>\n+\tlea 0x36a44d86(%rip),%rsi # 36b41b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x158>\n \tlea 0x1f0366(%rip),%rcx # 2ed177 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12f07>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43d60(%rip),%rsi # 36b40b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x160>\n+\tlea 0x36a44d60(%rip),%rsi # 36b41b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x160>\n \tlea 0x1f037f(%rip),%rcx # 2ed1be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12f4e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43d3a(%rip),%rsi # 36b40ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x168>\n+\tlea 0x36a44d3a(%rip),%rsi # 36b41ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x168>\n \tlea 0x1f0392(%rip),%rcx # 2ed1ff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12f8f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43d14(%rip),%rsi # 36b40ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x170>\n+\tlea 0x36a44d14(%rip),%rsi # 36b41ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x170>\n \tlea 0x1f03ab(%rip),%rcx # 2ed246 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x12fd6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43cee(%rip),%rsi # 36b40bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x178>\n+\tlea 0x36a44cee(%rip),%rsi # 36b41bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x178>\n \tlea 0x1f03be(%rip),%rcx # 2ed287 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13017>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43cc8(%rip),%rsi # 36b40bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x180>\n+\tlea 0x36a44cc8(%rip),%rsi # 36b41bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x180>\n \tlea 0x1f03dc(%rip),%rcx # 2ed2d3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13063>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43ca2(%rip),%rsi # 36b40bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x188>\n+\tlea 0x36a44ca2(%rip),%rsi # 36b41bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x188>\n \tlea 0x1f03f4(%rip),%rcx # 2ed319 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x130a9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43c7c(%rip),%rsi # 36b40bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x190>\n+\tlea 0x36a44c7c(%rip),%rsi # 36b41bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x190>\n \tlea 0x1f0414(%rip),%rcx # 2ed367 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x130f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43c56(%rip),%rsi # 36b40bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x198>\n+\tlea 0x36a44c56(%rip),%rsi # 36b41bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x198>\n \tlea 0x1f042e(%rip),%rcx # 2ed3af (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1313f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43c30(%rip),%rsi # 36b40bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a0>\n+\tlea 0x36a44c30(%rip),%rsi # 36b41bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a0>\n \tlea 0x1f042c(%rip),%rcx # 2ed3db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1316b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43c0a(%rip),%rsi # 36b40be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a8>\n+\tlea 0x36a44c0a(%rip),%rsi # 36b41be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a8>\n \tlea 0x1f0424(%rip),%rcx # 2ed401 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13191>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43be4(%rip),%rsi # 36b40be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b0>\n+\tlea 0x36a44be4(%rip),%rsi # 36b41be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b0>\n \tlea 0x1f0421(%rip),%rcx # 2ed42c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x131bc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a49371(%rip),%rdi # 36b463a8 ::get_beta()::val@@Base+0x90>\n+\tmov 0x36a4a371(%rip),%rdi # 36b473a8 ::get_beta()::val@@Base+0x90>\n \ttest %rdi,%rdi\n \tje fd051 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a4935b(%rip) # 36b463a8 ::get_beta()::val@@Base+0x90>\n+\tmovq $0x0,0x36a4a35b(%rip) # 36b473a8 ::get_beta()::val@@Base+0x90>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000fd060 :\n ggml_cuda_op_upscale(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -186310,15 +186310,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36a4388a(%rip),%rdi # 36b40bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b8>\n+\tlea 0x36a4488a(%rip),%rdi # 36b41bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b8>\n \tjmp fd64d \n ggml_cuda_op_upscale(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/upscale.cu:128\n \ttest $0x100,%eax\n \tmov %r12,0xd8(%rsp)\n \tmovdqa %xmm6,0xc0(%rsp)\n \tmovdqa %xmm7,0xb0(%rsp)\n@@ -186451,15 +186451,15 @@\n \tlea 0x50(%rsp),%rdx\n \tlea 0x48(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x68(%rsp),%rsi\n \tmov 0x70(%rsp),%edx\n \tmov 0x58(%rsp),%rcx\n \tmov 0x60(%rsp),%r8d\n-\tlea 0x36a435ab(%rip),%rdi # 36b40bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c0>\n+\tlea 0x36a445ab(%rip),%rdi # 36b41bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c0>\n ggml_cuda_op_upscale(ggml_backend_cuda_context&, ggml_tensor*):\n \tlea 0xe0(%rsp),%r9\n \tpush 0x48(%rsp)\n \tpush 0x58(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/upscale.cu:137\n@@ -186540,15 +186540,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a433df(%rip),%rdi # 36b40bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b8>\n+\tlea 0x36a443df(%rip),%rdi # 36b41bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0xe8,%rsp\n \tret\n \tnopl 0x0(%rax,%rax,1)\n@@ -186604,64 +186604,64 @@\n \tlea 0x38(%rsp),%rdx\n \tlea 0x30(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x50(%rsp),%rsi\n \tmov 0x58(%rsp),%edx\n \tmov 0x40(%rsp),%rcx\n \tmov 0x48(%rsp),%r8d\n-\tlea 0x36a4326b(%rip),%rdi # 36b40bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c0>\n+\tlea 0x36a4426b(%rip),%rdi # 36b41bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c0>\n \tlea 0x70(%rsp),%r9\n \tpush 0x30(%rsp)\n \tpush 0x40(%rsp)\n \tcall 22100 \n \tadd $0x108,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a489f4(%rip),%rbx # 36b463b0 ::get_beta()::val@@Base+0x98>\n+\tmov 0x36a499f4(%rip),%rbx # 36b473b0 ::get_beta()::val@@Base+0x98>\n \ttest %rbx,%rbx\n \tjne fd9d7 \n-\tlea 0x36a479e8(%rip),%rdi # 36b453b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4978>\n+\tlea 0x36a489e8(%rip),%rdi # 36b463b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4978>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a489d9(%rip) # 36b463b0 ::get_beta()::val@@Base+0x98>\n+\tmov %rax,0x36a499d9(%rip) # 36b473b0 ::get_beta()::val@@Base+0x98>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a43206(%rip),%rsi # 36b40bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b8>\n+\tlea 0x36a44206(%rip),%rsi # 36b41bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b8>\n \tlea 0x1efaaf(%rip),%rcx # 2ed4a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13230>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a431e0(%rip),%rsi # 36b40bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c0>\n+\tlea 0x36a441e0(%rip),%rsi # 36b41bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c0>\n \tlea 0x1efaa3(%rip),%rcx # 2ed4c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13252>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x16(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a48959(%rip),%rdi # 36b463b0 ::get_beta()::val@@Base+0x98>\n+\tmov 0x36a49959(%rip),%rdi # 36b473b0 ::get_beta()::val@@Base+0x98>\n \ttest %rdi,%rdi\n \tje fda71 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a48943(%rip) # 36b463b0 ::get_beta()::val@@Base+0x98>\n+\tmovq $0x0,0x36a49943(%rip) # 36b473b0 ::get_beta()::val@@Base+0x98>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000fda80 :\n ggml_cuda_op_rwkv_wkv6(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -186810,15 +186810,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a42edd(%rip),%rdi # 36b40c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d0>\n+\tlea 0x36a43edd(%rip),%rdi # 36b41c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d0>\n \tjmp fde87 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/wkv.cu:166\n \tmov %ebp,%edi\n \timul %r12d,%edi\n \tmovabs $0x100000000,%rdx\n \tor %rdx,%rdi\n \tor $0x40,%rdx\n@@ -186872,15 +186872,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a42d79(%rip),%rdi # 36b40c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c8>\n+\tlea 0x36a43d79(%rip),%rdi # 36b41c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c8>\n \tlea 0xb0(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/wkv.cu:170\n \tadd $0x118,%rsp\n@@ -186962,15 +186962,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a42bd3(%rip),%rdi # 36b40c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c8>\n+\tlea 0x36a43bd3(%rip),%rdi # 36b41c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -187009,15 +187009,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a42adb(%rip),%rdi # 36b40c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d0>\n+\tlea 0x36a43adb(%rip),%rdi # 36b41c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xb8,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -187177,15 +187177,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a427e7(%rip),%rdi # 36b40c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e0>\n+\tlea 0x36a437e7(%rip),%rdi # 36b41c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e0>\n \tjmp fe5ad \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/wkv.cu:195\n \tmov %ebp,%edi\n \timul %r12d,%edi\n \tmovabs $0x100000000,%rdx\n \tor %rdx,%rdi\n \tor $0x40,%rdx\n@@ -187243,15 +187243,15 @@\n \tlea 0x20(%rsp),%rdx\n \tlea 0x18(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x38(%rsp),%rsi\n \tmov 0x40(%rsp),%edx\n \tmov 0x28(%rsp),%rcx\n \tmov 0x30(%rsp),%r8d\n-\tlea 0x36a42663(%rip),%rdi # 36b40c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d8>\n+\tlea 0x36a43663(%rip),%rdi # 36b41c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d8>\n \tlea 0xc0(%rsp),%r9\n \tpush 0x18(%rsp)\n \tpush 0x28(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/wkv.cu:199\n \tadd $0x138,%rsp\n@@ -187335,15 +187335,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a424a3(%rip),%rdi # 36b40c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d8>\n+\tlea 0x36a434a3(%rip),%rdi # 36b41c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -187384,83 +187384,83 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a4239b(%rip),%rdi # 36b40c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e0>\n+\tlea 0x36a4339b(%rip),%rdi # 36b41c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xc8,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a47b0c(%rip),%rbx # 36b463b8 ::get_beta()::val@@Base+0xa0>\n+\tmov 0x36a48b0c(%rip),%rbx # 36b473b8 ::get_beta()::val@@Base+0xa0>\n \ttest %rbx,%rbx\n \tjne fe8c7 \n-\tlea 0x36a46b10(%rip),%rdi # 36b453c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4990>\n+\tlea 0x36a47b10(%rip),%rdi # 36b463c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4990>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a47af1(%rip) # 36b463b8 ::get_beta()::val@@Base+0xa0>\n+\tmov %rax,0x36a48af1(%rip) # 36b473b8 ::get_beta()::val@@Base+0xa0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a42326(%rip),%rsi # 36b40c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c8>\n+\tlea 0x36a43326(%rip),%rsi # 36b41c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c8>\n \tlea 0x1eece1(%rip),%rcx # 2ed5c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13352>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a42300(%rip),%rsi # 36b40c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d0>\n+\tlea 0x36a43300(%rip),%rsi # 36b41c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d0>\n \tlea 0x1eece5(%rip),%rcx # 2ed5f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13384>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a422da(%rip),%rsi # 36b40c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d8>\n+\tlea 0x36a432da(%rip),%rsi # 36b41c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d8>\n \tlea 0x1eecea(%rip),%rcx # 2ed627 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x133b7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a422b4(%rip),%rsi # 36b40c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e0>\n+\tlea 0x36a432b4(%rip),%rsi # 36b41c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e0>\n \tlea 0x1eecf2(%rip),%rcx # 2ed65d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x133ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a47a21(%rip),%rdi # 36b463b8 ::get_beta()::val@@Base+0xa0>\n+\tmov 0x36a48a21(%rip),%rdi # 36b473b8 ::get_beta()::val@@Base+0xa0>\n \ttest %rdi,%rdi\n \tje fe9b1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a47a0b(%rip) # 36b463b8 ::get_beta()::val@@Base+0xa0>\n+\tmovq $0x0,0x36a48a0b(%rip) # 36b473b8 ::get_beta()::val@@Base+0xa0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n void __device_stub__flash_attn_ext_f16<576, 512, 1, 16, 2, 2, false, true>(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int):\n \tsub $0x1a8,%rsp\n \tmov %rdi,0x78(%rsp)\n@@ -187553,15 +187553,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a41fbb(%rip),%rdi # 36b40c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e8>\n+\tlea 0x36a42fbb(%rip),%rdi # 36b41c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -187657,15 +187657,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a41cf3(%rip),%rdi # 36b40c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f0>\n+\tlea 0x36a42cf3(%rip),%rdi # 36b41c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -187691,15 +187691,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a41c50(%rip),%rdi # 36b40c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f8>\n+\tlea 0x36a42c50(%rip),%rdi # 36b41c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -187722,83 +187722,83 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a41bc6(%rip),%rdi # 36b40c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x200>\n+\tlea 0x36a42bc6(%rip),%rdi # 36b41c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x200>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a47324(%rip),%rbx # 36b463c0 ::get_beta()::val@@Base+0xa8>\n+\tmov 0x36a48324(%rip),%rbx # 36b473c0 ::get_beta()::val@@Base+0xa8>\n \ttest %rbx,%rbx\n \tjne ff0b7 \n-\tlea 0x36a46338(%rip),%rdi # 36b453e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49a8>\n+\tlea 0x36a47338(%rip),%rdi # 36b463e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49a8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a47309(%rip) # 36b463c0 ::get_beta()::val@@Base+0xa8>\n+\tmov %rax,0x36a48309(%rip) # 36b473c0 ::get_beta()::val@@Base+0xa8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a41b56(%rip),%rsi # 36b40c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e8>\n+\tlea 0x36a42b56(%rip),%rsi # 36b41c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e8>\n \tlea 0x1ee693(%rip),%rcx # 2ed764 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x134f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a41b30(%rip),%rsi # 36b40c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f0>\n+\tlea 0x36a42b30(%rip),%rsi # 36b41c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f0>\n \tlea 0x1ee6eb(%rip),%rcx # 2ed7ea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1357a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a41b0a(%rip),%rsi # 36b40c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f8>\n+\tlea 0x36a42b0a(%rip),%rsi # 36b41c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f8>\n \tlea 0x1ee743(%rip),%rcx # 2ed870 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13600>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a41ae4(%rip),%rsi # 36b40c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x200>\n+\tlea 0x36a42ae4(%rip),%rsi # 36b41c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x200>\n \tlea 0x1ee765(%rip),%rcx # 2ed8c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13650>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi \n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a47239(%rip),%rdi # 36b463c0 ::get_beta()::val@@Base+0xa8>\n+\tmov 0x36a48239(%rip),%rdi # 36b473c0 ::get_beta()::val@@Base+0xa8>\n \ttest %rdi,%rdi\n \tje ff1a1 \n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a47223(%rip) # 36b463c0 ::get_beta()::val@@Base+0xa8>\n+\tmovq $0x0,0x36a48223(%rip) # 36b473c0 ::get_beta()::val@@Base+0xa8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000000ff1b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<576, 512, 1, 16>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -187822,16 +187822,16 @@\n \tmov $0xdb50,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<576, 512, 1, 16>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1401\n \tcmove %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a41a36(%rip),%rax # 36b40c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f0>\n-\tlea 0x36a41a27(%rip),%rdx # 36b40c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e8>\n+\tlea 0x36a42a36(%rip),%rax # 36b41c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f0>\n+\tlea 0x36a42a27(%rip),%rdx # 36b41c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -188689,15 +188689,15 @@\n \tlea 0x120(%rsp),%rdx\n \tlea 0xf8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x110(%rsp),%rsi\n \tmov 0x118(%rsp),%edx\n \tmov 0x100(%rsp),%rcx\n \tmov 0x108(%rsp),%r8d\n-\tlea 0x36a40dea(%rip),%rdi # 36b40c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f8>\n+\tlea 0x36a41dea(%rip),%rdi # 36b41c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f8>\n \tlea 0x160(%rsp),%r9\n \tpush 0xf8(%rsp)\n \tpush 0x128(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp fff8d (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -188745,15 +188745,15 @@\n \tlea 0xf8(%rsp),%rdx\n \tlea 0xf0(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x110(%rsp),%rsi\n \tmov 0x118(%rsp),%edx\n \tmov 0x100(%rsp),%rcx\n \tmov 0x108(%rsp),%r8d\n-\tlea 0x36a40cca(%rip),%rdi # 36b40c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x200>\n+\tlea 0x36a41cca(%rip),%rdi # 36b41c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x200>\n \tlea 0x160(%rsp),%r9\n \tpush 0xf0(%rsp)\n \tpush 0x100(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -189072,15 +189072,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a4064b(%rip),%rdi # 36b40c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x208>\n+\tlea 0x36a4164b(%rip),%rdi # 36b41c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x208>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189176,15 +189176,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a40383(%rip),%rdi # 36b40c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x210>\n+\tlea 0x36a41383(%rip),%rdi # 36b41c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x210>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189280,15 +189280,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a400bb(%rip),%rdi # 36b40c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x218>\n+\tlea 0x36a410bb(%rip),%rdi # 36b41c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x218>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189384,15 +189384,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3fdf3(%rip),%rdi # 36b40c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x220>\n+\tlea 0x36a40df3(%rip),%rdi # 36b41c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x220>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189488,15 +189488,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3fb2b(%rip),%rdi # 36b40c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x228>\n+\tlea 0x36a40b2b(%rip),%rdi # 36b41c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x228>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189592,15 +189592,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3f863(%rip),%rdi # 36b40c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x230>\n+\tlea 0x36a40863(%rip),%rdi # 36b41c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x230>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189696,15 +189696,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3f59b(%rip),%rdi # 36b40c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x238>\n+\tlea 0x36a4059b(%rip),%rdi # 36b41c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x238>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189800,15 +189800,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3f2d3(%rip),%rdi # 36b40c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x240>\n+\tlea 0x36a402d3(%rip),%rdi # 36b41c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x240>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -189904,15 +189904,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3f00b(%rip),%rdi # 36b40c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x248>\n+\tlea 0x36a4000b(%rip),%rdi # 36b41c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x248>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -190008,15 +190008,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3ed43(%rip),%rdi # 36b40c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x250>\n+\tlea 0x36a3fd43(%rip),%rdi # 36b41c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x250>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -190112,15 +190112,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3ea7b(%rip),%rdi # 36b40c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x258>\n+\tlea 0x36a3fa7b(%rip),%rdi # 36b41c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x258>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -190216,15 +190216,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3e7b3(%rip),%rdi # 36b40c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x260>\n+\tlea 0x36a3f7b3(%rip),%rdi # 36b41c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x260>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -190250,15 +190250,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a3e710(%rip),%rdi # 36b40ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x268>\n+\tlea 0x36a3f710(%rip),%rdi # 36b41ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x268>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -190281,15 +190281,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a3e686(%rip),%rdi # 36b40ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x270>\n+\tlea 0x36a3f686(%rip),%rdi # 36b41ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x270>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -190315,15 +190315,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a3e5f0(%rip),%rdi # 36b40cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x278>\n+\tlea 0x36a3f5f0(%rip),%rdi # 36b41cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x278>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -190346,15 +190346,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a3e566(%rip),%rdi # 36b40cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x280>\n+\tlea 0x36a3f566(%rip),%rdi # 36b41cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x280>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -190380,15 +190380,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a3e4d0(%rip),%rdi # 36b40cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x288>\n+\tlea 0x36a3f4d0(%rip),%rdi # 36b41cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x288>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -190411,15 +190411,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a3e446(%rip),%rdi # 36b40cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x290>\n+\tlea 0x36a3f446(%rip),%rdi # 36b41cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x290>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -190445,15 +190445,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a3e3b0(%rip),%rdi # 36b40cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x298>\n+\tlea 0x36a3f3b0(%rip),%rdi # 36b41cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x298>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -190476,15 +190476,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a3e326(%rip),%rdi # 36b40cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a0>\n+\tlea 0x36a3f326(%rip),%rdi # 36b41cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -190510,15 +190510,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a3e290(%rip),%rdi # 36b40ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a8>\n+\tlea 0x36a3f290(%rip),%rdi # 36b41ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -190541,15 +190541,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a3e206(%rip),%rdi # 36b40ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b0>\n+\tlea 0x36a3f206(%rip),%rdi # 36b41ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -190575,15 +190575,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a3e170(%rip),%rdi # 36b40cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b8>\n+\tlea 0x36a3f170(%rip),%rdi # 36b41cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -190606,284 +190606,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a3e0e6(%rip),%rdi # 36b40cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c0>\n+\tlea 0x36a3f0e6(%rip),%rdi # 36b41cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a4378c(%rip),%rbx # 36b463c8 ::get_beta()::val@@Base+0xb0>\n+\tmov 0x36a4478c(%rip),%rbx # 36b473c8 ::get_beta()::val@@Base+0xb0>\n \ttest %rbx,%rbx\n \tjne 102c57 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a27>\n-\tlea 0x36a427b0(%rip),%rdi # 36b453f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49c0>\n+\tlea 0x36a437b0(%rip),%rdi # 36b463f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49c0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a43771(%rip) # 36b463c8 ::get_beta()::val@@Base+0xb0>\n+\tmov %rax,0x36a44771(%rip) # 36b473c8 ::get_beta()::val@@Base+0xb0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dfd6(%rip),%rsi # 36b40c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x208>\n+\tlea 0x36a3efd6(%rip),%rsi # 36b41c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x208>\n \tlea 0x1eac98(%rip),%rcx # 2ed909 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13699>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dfb0(%rip),%rsi # 36b40c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x210>\n+\tlea 0x36a3efb0(%rip),%rsi # 36b41c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x210>\n \tlea 0x1eaced(%rip),%rcx # 2ed98c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1371c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dfda(%rip),%rsi # 36b40ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x268>\n+\tlea 0x36a3efda(%rip),%rsi # 36b41ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x268>\n \tlea 0x1ead42(%rip),%rcx # 2eda0f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1379f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dfb4(%rip),%rsi # 36b40ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x270>\n+\tlea 0x36a3efb4(%rip),%rsi # 36b41ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x270>\n \tlea 0x1db621(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3df2e(%rip),%rsi # 36b40c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x218>\n+\tlea 0x36a3ef2e(%rip),%rsi # 36b41c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x218>\n \tlea 0x1ead34(%rip),%rcx # 2eda5d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x137ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3df08(%rip),%rsi # 36b40c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x220>\n+\tlea 0x36a3ef08(%rip),%rsi # 36b41c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x220>\n \tlea 0x1ead89(%rip),%rcx # 2edae0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13870>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3df32(%rip),%rsi # 36b40cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x278>\n+\tlea 0x36a3ef32(%rip),%rsi # 36b41cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x278>\n \tlea 0x1eadde(%rip),%rcx # 2edb63 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x138f3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3df0c(%rip),%rsi # 36b40cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x280>\n+\tlea 0x36a3ef0c(%rip),%rsi # 36b41cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x280>\n \tlea 0x1dc0d8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3de86(%rip),%rsi # 36b40c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x228>\n+\tlea 0x36a3ee86(%rip),%rsi # 36b41c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x228>\n \tlea 0x1eadd0(%rip),%rcx # 2edbb1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13941>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3de60(%rip),%rsi # 36b40c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x230>\n+\tlea 0x36a3ee60(%rip),%rsi # 36b41c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x230>\n \tlea 0x1eae25(%rip),%rcx # 2edc34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x139c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3de8a(%rip),%rsi # 36b40cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x288>\n+\tlea 0x36a3ee8a(%rip),%rsi # 36b41cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x288>\n \tlea 0x1eae7a(%rip),%rcx # 2edcb7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13a47>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3de64(%rip),%rsi # 36b40cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x290>\n+\tlea 0x36a3ee64(%rip),%rsi # 36b41cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x290>\n \tlea 0x1dc1a9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3ddde(%rip),%rsi # 36b40c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x238>\n+\tlea 0x36a3edde(%rip),%rsi # 36b41c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x238>\n \tlea 0x1eae6c(%rip),%rcx # 2edd05 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13a95>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3ddb8(%rip),%rsi # 36b40c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x240>\n+\tlea 0x36a3edb8(%rip),%rsi # 36b41c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x240>\n \tlea 0x1eaec3(%rip),%rcx # 2edd8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13b1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dde2(%rip),%rsi # 36b40cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x298>\n+\tlea 0x36a3ede2(%rip),%rsi # 36b41cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x298>\n \tlea 0x1eaf1a(%rip),%rcx # 2ede0f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13b9f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3ddbc(%rip),%rsi # 36b40cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a0>\n+\tlea 0x36a3edbc(%rip),%rsi # 36b41cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a0>\n \tlea 0x1dc27d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dd36(%rip),%rsi # 36b40c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x248>\n+\tlea 0x36a3ed36(%rip),%rsi # 36b41c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x248>\n \tlea 0x1eaf0d(%rip),%rcx # 2ede5e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13bee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dd10(%rip),%rsi # 36b40c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x250>\n+\tlea 0x36a3ed10(%rip),%rsi # 36b41c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x250>\n \tlea 0x1eaf64(%rip),%rcx # 2edee3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c73>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dd3a(%rip),%rsi # 36b40ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a8>\n+\tlea 0x36a3ed3a(%rip),%rsi # 36b41ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a8>\n \tlea 0x1eafbb(%rip),%rcx # 2edf68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13cf8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dd14(%rip),%rsi # 36b40ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b0>\n+\tlea 0x36a3ed14(%rip),%rsi # 36b41ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b0>\n \tlea 0x1db452(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dc8e(%rip),%rsi # 36b40c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x258>\n+\tlea 0x36a3ec8e(%rip),%rsi # 36b41c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x258>\n \tlea 0x1eafae(%rip),%rcx # 2edfb7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13d47>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dc68(%rip),%rsi # 36b40c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x260>\n+\tlea 0x36a3ec68(%rip),%rsi # 36b41c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x260>\n \tlea 0x1eb005(%rip),%rcx # 2ee03c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13dcc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dc92(%rip),%rsi # 36b40cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b8>\n+\tlea 0x36a3ec92(%rip),%rsi # 36b41cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b8>\n \tlea 0x1eb05c(%rip),%rcx # 2ee0c1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13e51>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3dc6c(%rip),%rsi # 36b40cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c0>\n+\tlea 0x36a3ec6c(%rip),%rsi # 36b41cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c0>\n \tlea 0x1dc38e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 1030c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3e90>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a43301(%rip),%rdi # 36b463c8 ::get_beta()::val@@Base+0xb0>\n+\tmov 0x36a44301(%rip),%rdi # 36b473c8 ::get_beta()::val@@Base+0xb0>\n \ttest %rdi,%rdi\n \tje 1030e1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3eb1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a432eb(%rip) # 36b463c8 ::get_beta()::val@@Base+0xb0>\n+\tmovq $0x0,0x36a442eb(%rip) # 36b473c8 ::get_beta()::val@@Base+0xb0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001030f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -190909,16 +190909,16 @@\n \tmov $0x2490,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3db0f(%rip),%rax # 36b40c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x210>\n-\tlea 0x36a3db00(%rip),%rdx # 36b40c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x208>\n+\tlea 0x36a3eb0f(%rip),%rax # 36b41c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x210>\n+\tlea 0x36a3eb00(%rip),%rdx # 36b41c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x208>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -191768,15 +191768,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3cf32(%rip),%rdi # 36b40ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x268>\n+\tlea 0x36a3df32(%rip),%rdi # 36b41ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x268>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 103eb5 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd45>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -191824,15 +191824,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3ce12(%rip),%rdi # 36b40ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x270>\n+\tlea 0x36a3de12(%rip),%rdi # 36b41ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x270>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -192091,16 +192091,16 @@\n \tmov $0x2c90,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3c96f(%rip),%rax # 36b40c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x220>\n-\tlea 0x36a3c960(%rip),%rdx # 36b40c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x218>\n+\tlea 0x36a3d96f(%rip),%rax # 36b41c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x220>\n+\tlea 0x36a3d960(%rip),%rdx # 36b41c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x218>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -192950,15 +192950,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3bd92(%rip),%rdi # 36b40cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x278>\n+\tlea 0x36a3cd92(%rip),%rdi # 36b41cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x278>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 105065 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd45>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -193006,15 +193006,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3bc72(%rip),%rdi # 36b40cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x280>\n+\tlea 0x36a3cc72(%rip),%rdi # 36b41cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x280>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -193273,16 +193273,16 @@\n \tmov $0x3490,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3b7cf(%rip),%rax # 36b40c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x230>\n-\tlea 0x36a3b7c0(%rip),%rdx # 36b40c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x228>\n+\tlea 0x36a3c7cf(%rip),%rax # 36b41c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x230>\n+\tlea 0x36a3c7c0(%rip),%rdx # 36b41c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x228>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -194132,15 +194132,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3abf2(%rip),%rdi # 36b40cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x288>\n+\tlea 0x36a3bbf2(%rip),%rdi # 36b41cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x288>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 106215 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd45>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -194188,15 +194188,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3aad2(%rip),%rdi # 36b40cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x290>\n+\tlea 0x36a3bad2(%rip),%rdi # 36b41cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x290>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -194455,16 +194455,16 @@\n \tmov $0x3c90,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3a62f(%rip),%rax # 36b40c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x240>\n-\tlea 0x36a3a620(%rip),%rdx # 36b40c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x238>\n+\tlea 0x36a3b62f(%rip),%rax # 36b41c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x240>\n+\tlea 0x36a3b620(%rip),%rdx # 36b41c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x238>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -195314,15 +195314,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a39a52(%rip),%rdi # 36b40cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x298>\n+\tlea 0x36a3aa52(%rip),%rdi # 36b41cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x298>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1073c5 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd45>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -195370,15 +195370,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a39932(%rip),%rdi # 36b40cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a0>\n+\tlea 0x36a3a932(%rip),%rdi # 36b41cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -195637,16 +195637,16 @@\n \tmov $0x4490,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3948f(%rip),%rax # 36b40c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x250>\n-\tlea 0x36a39480(%rip),%rdx # 36b40c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x248>\n+\tlea 0x36a3a48f(%rip),%rax # 36b41c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x250>\n+\tlea 0x36a3a480(%rip),%rdx # 36b41c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x248>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -196496,15 +196496,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a388b2(%rip),%rdi # 36b40ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a8>\n+\tlea 0x36a398b2(%rip),%rdi # 36b41ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 108575 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd45>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -196552,15 +196552,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a38792(%rip),%rdi # 36b40ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b0>\n+\tlea 0x36a39792(%rip),%rdi # 36b41ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -196819,16 +196819,16 @@\n \tmov $0x4250,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 1, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a382ef(%rip),%rax # 36b40c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x260>\n-\tlea 0x36a382e0(%rip),%rdx # 36b40c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x258>\n+\tlea 0x36a392ef(%rip),%rax # 36b41c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x260>\n+\tlea 0x36a392e0(%rip),%rdx # 36b41c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x258>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -197678,15 +197678,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a37712(%rip),%rdi # 36b40cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b8>\n+\tlea 0x36a38712(%rip),%rdi # 36b41cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 109725 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd45>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -197734,15 +197734,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a375f2(%rip),%rdi # 36b40cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c0>\n+\tlea 0x36a385f2(%rip),%rdi # 36b41cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -198068,15 +198068,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a36f4b(%rip),%rdi # 36b40d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c8>\n+\tlea 0x36a37f4b(%rip),%rdi # 36b41d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198172,15 +198172,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a36c83(%rip),%rdi # 36b40d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d0>\n+\tlea 0x36a37c83(%rip),%rdi # 36b41d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198276,15 +198276,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a369bb(%rip),%rdi # 36b40d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d8>\n+\tlea 0x36a379bb(%rip),%rdi # 36b41d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198380,15 +198380,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a366f3(%rip),%rdi # 36b40d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e0>\n+\tlea 0x36a376f3(%rip),%rdi # 36b41d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198484,15 +198484,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3642b(%rip),%rdi # 36b40d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e8>\n+\tlea 0x36a3742b(%rip),%rdi # 36b41d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198588,15 +198588,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a36163(%rip),%rdi # 36b40d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f0>\n+\tlea 0x36a37163(%rip),%rdi # 36b41d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198692,15 +198692,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a35e9b(%rip),%rdi # 36b40d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f8>\n+\tlea 0x36a36e9b(%rip),%rdi # 36b41d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198796,15 +198796,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a35bd3(%rip),%rdi # 36b40d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x300>\n+\tlea 0x36a36bd3(%rip),%rdi # 36b41d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x300>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -198900,15 +198900,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3590b(%rip),%rdi # 36b40d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x308>\n+\tlea 0x36a3690b(%rip),%rdi # 36b41d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x308>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -199004,15 +199004,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a35643(%rip),%rdi # 36b40d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x310>\n+\tlea 0x36a36643(%rip),%rdi # 36b41d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x310>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -199108,15 +199108,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3537b(%rip),%rdi # 36b40d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x318>\n+\tlea 0x36a3637b(%rip),%rdi # 36b41d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x318>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -199212,15 +199212,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a350b3(%rip),%rdi # 36b40d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x320>\n+\tlea 0x36a360b3(%rip),%rdi # 36b41d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x320>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -199246,15 +199246,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a35010(%rip),%rdi # 36b40d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x328>\n+\tlea 0x36a36010(%rip),%rdi # 36b41d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x328>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -199277,15 +199277,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a34f86(%rip),%rdi # 36b40d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x330>\n+\tlea 0x36a35f86(%rip),%rdi # 36b41d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x330>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -199311,15 +199311,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a34ef0(%rip),%rdi # 36b40d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x338>\n+\tlea 0x36a35ef0(%rip),%rdi # 36b41d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x338>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -199342,15 +199342,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a34e66(%rip),%rdi # 36b40d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x340>\n+\tlea 0x36a35e66(%rip),%rdi # 36b41d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x340>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -199376,15 +199376,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a34dd0(%rip),%rdi # 36b40d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x348>\n+\tlea 0x36a35dd0(%rip),%rdi # 36b41d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x348>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -199407,15 +199407,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a34d46(%rip),%rdi # 36b40d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x350>\n+\tlea 0x36a35d46(%rip),%rdi # 36b41d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x350>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -199441,15 +199441,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a34cb0(%rip),%rdi # 36b40d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x358>\n+\tlea 0x36a35cb0(%rip),%rdi # 36b41d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x358>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -199472,15 +199472,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a34c26(%rip),%rdi # 36b40d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x360>\n+\tlea 0x36a35c26(%rip),%rdi # 36b41d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x360>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -199506,15 +199506,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a34b90(%rip),%rdi # 36b40da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x368>\n+\tlea 0x36a35b90(%rip),%rdi # 36b41da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x368>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -199537,15 +199537,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a34b06(%rip),%rdi # 36b40da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x370>\n+\tlea 0x36a35b06(%rip),%rdi # 36b41da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x370>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -199571,15 +199571,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a34a70(%rip),%rdi # 36b40db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x378>\n+\tlea 0x36a35a70(%rip),%rdi # 36b41db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x378>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -199602,284 +199602,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a349e6(%rip),%rdi # 36b40db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x380>\n+\tlea 0x36a359e6(%rip),%rdi # 36b41db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x380>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a39fd4(%rip),%rbx # 36b463d0 ::get_beta()::val@@Base+0xb8>\n+\tmov 0x36a3afd4(%rip),%rbx # 36b473d0 ::get_beta()::val@@Base+0xb8>\n \ttest %rbx,%rbx\n \tjne 10c417 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a37>\n-\tlea 0x36a39008(%rip),%rdi # 36b45410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49d8>\n+\tlea 0x36a3a008(%rip),%rdi # 36b46410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49d8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a39fb9(%rip) # 36b463d0 ::get_beta()::val@@Base+0xb8>\n+\tmov %rax,0x36a3afb9(%rip) # 36b473d0 ::get_beta()::val@@Base+0xb8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a348d6(%rip),%rsi # 36b40d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c8>\n+\tlea 0x36a358d6(%rip),%rsi # 36b41d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c8>\n \tlea 0x1e1cdf(%rip),%rcx # 2ee110 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13ea0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a348b0(%rip),%rsi # 36b40d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d0>\n+\tlea 0x36a358b0(%rip),%rsi # 36b41d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d0>\n \tlea 0x1e1d35(%rip),%rcx # 2ee194 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13f24>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a348da(%rip),%rsi # 36b40d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x328>\n+\tlea 0x36a358da(%rip),%rsi # 36b41d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x328>\n \tlea 0x1d1e40(%rip),%rcx # 2de2cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x405d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a348b4(%rip),%rsi # 36b40d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x330>\n+\tlea 0x36a358b4(%rip),%rsi # 36b41d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x330>\n \tlea 0x1d1e61(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3482e(%rip),%rsi # 36b40d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d8>\n+\tlea 0x36a3582e(%rip),%rsi # 36b41d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d8>\n \tlea 0x1e1d2f(%rip),%rcx # 2ee218 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13fa8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34808(%rip),%rsi # 36b40d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e0>\n+\tlea 0x36a35808(%rip),%rsi # 36b41d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e0>\n \tlea 0x1e1d85(%rip),%rcx # 2ee29c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1402c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34832(%rip),%rsi # 36b40d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x338>\n+\tlea 0x36a35832(%rip),%rsi # 36b41d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x338>\n \tlea 0x1d28f7(%rip),%rcx # 2dee3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4bcc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3480c(%rip),%rsi # 36b40d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x340>\n+\tlea 0x36a3580c(%rip),%rsi # 36b41d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x340>\n \tlea 0x1d2918(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34786(%rip),%rsi # 36b40d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e8>\n+\tlea 0x36a35786(%rip),%rsi # 36b41d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e8>\n \tlea 0x1e1d7f(%rip),%rcx # 2ee320 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x140b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34760(%rip),%rsi # 36b40d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f0>\n+\tlea 0x36a35760(%rip),%rsi # 36b41d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f0>\n \tlea 0x1e1dd5(%rip),%rcx # 2ee3a4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14134>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3478a(%rip),%rsi # 36b40d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x348>\n+\tlea 0x36a3578a(%rip),%rsi # 36b41d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x348>\n \tlea 0x1d29c8(%rip),%rcx # 2defc5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4d55>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34764(%rip),%rsi # 36b40d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x350>\n+\tlea 0x36a35764(%rip),%rsi # 36b41d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x350>\n \tlea 0x1d29e9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a346de(%rip),%rsi # 36b40d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f8>\n+\tlea 0x36a356de(%rip),%rsi # 36b41d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f8>\n \tlea 0x1e1dcf(%rip),%rcx # 2ee428 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x141b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a346b8(%rip),%rsi # 36b40d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x300>\n+\tlea 0x36a356b8(%rip),%rsi # 36b41d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x300>\n \tlea 0x1e1e27(%rip),%rcx # 2ee4ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1423e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a346e2(%rip),%rsi # 36b40d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x358>\n+\tlea 0x36a356e2(%rip),%rsi # 36b41d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x358>\n \tlea 0x1d2a9b(%rip),%rcx # 2df150 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4ee0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a346bc(%rip),%rsi # 36b40d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x360>\n+\tlea 0x36a356bc(%rip),%rsi # 36b41d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x360>\n \tlea 0x1d2abd(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34636(%rip),%rsi # 36b40d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x308>\n+\tlea 0x36a35636(%rip),%rsi # 36b41d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x308>\n \tlea 0x1e1e23(%rip),%rcx # 2ee534 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x142c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34610(%rip),%rsi # 36b40d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x310>\n+\tlea 0x36a35610(%rip),%rsi # 36b41d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x310>\n \tlea 0x1e1e7b(%rip),%rcx # 2ee5ba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1434a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3463a(%rip),%rsi # 36b40da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x368>\n+\tlea 0x36a3563a(%rip),%rsi # 36b41da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x368>\n \tlea 0x1d1c70(%rip),%rcx # 2de3dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x416d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34614(%rip),%rsi # 36b40da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x370>\n+\tlea 0x36a35614(%rip),%rsi # 36b41da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x370>\n \tlea 0x1d1c92(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3458e(%rip),%rsi # 36b40d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x318>\n+\tlea 0x36a3558e(%rip),%rsi # 36b41d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x318>\n \tlea 0x1e1e77(%rip),%rcx # 2ee640 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x143d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34568(%rip),%rsi # 36b40d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x320>\n+\tlea 0x36a35568(%rip),%rsi # 36b41d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x320>\n \tlea 0x1e1ecf(%rip),%rcx # 2ee6c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14456>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a34592(%rip),%rsi # 36b40db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x378>\n+\tlea 0x36a35592(%rip),%rsi # 36b41db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x378>\n \tlea 0x1d2bac(%rip),%rcx # 2df3d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5161>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3456c(%rip),%rsi # 36b40db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x380>\n+\tlea 0x36a3556c(%rip),%rsi # 36b41db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x380>\n \tlea 0x1d2bce(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 10c880 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ea0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a39b49(%rip),%rdi # 36b463d0 ::get_beta()::val@@Base+0xb8>\n+\tmov 0x36a3ab49(%rip),%rdi # 36b473d0 ::get_beta()::val@@Base+0xb8>\n \ttest %rdi,%rdi\n \tje 10c8a1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a39b33(%rip) # 36b463d0 ::get_beta()::val@@Base+0xb8>\n+\tmovq $0x0,0x36a3ab33(%rip) # 36b473d0 ::get_beta()::val@@Base+0xb8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000010c8b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -199905,16 +199905,16 @@\n \tmov $0x2d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3440f(%rip),%rax # 36b40d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d0>\n-\tlea 0x36a34400(%rip),%rdx # 36b40d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c8>\n+\tlea 0x36a3540f(%rip),%rax # 36b41d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d0>\n+\tlea 0x36a35400(%rip),%rdx # 36b41d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -199955,16 +199955,16 @@\n \tmov $0x3500,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3439f(%rip),%rax # 36b40d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e0>\n-\tlea 0x36a34390(%rip),%rdx # 36b40d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d8>\n+\tlea 0x36a3539f(%rip),%rax # 36b41d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e0>\n+\tlea 0x36a35390(%rip),%rdx # 36b41d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -200005,16 +200005,16 @@\n \tmov $0x3d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3432f(%rip),%rax # 36b40d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f0>\n-\tlea 0x36a34320(%rip),%rdx # 36b40d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e8>\n+\tlea 0x36a3532f(%rip),%rax # 36b41d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f0>\n+\tlea 0x36a35320(%rip),%rdx # 36b41d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -200055,16 +200055,16 @@\n \tmov $0x4500,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a342bf(%rip),%rax # 36b40d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x300>\n-\tlea 0x36a342b0(%rip),%rdx # 36b40d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f8>\n+\tlea 0x36a352bf(%rip),%rax # 36b41d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x300>\n+\tlea 0x36a352b0(%rip),%rdx # 36b41d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -200105,16 +200105,16 @@\n \tmov $0x4d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3424f(%rip),%rax # 36b40d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x310>\n-\tlea 0x36a34240(%rip),%rdx # 36b40d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x308>\n+\tlea 0x36a3524f(%rip),%rax # 36b41d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x310>\n+\tlea 0x36a35240(%rip),%rdx # 36b41d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x308>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -200155,16 +200155,16 @@\n \tmov $0x4700,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 16, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a341df(%rip),%rax # 36b40d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x320>\n-\tlea 0x36a341d0(%rip),%rdx # 36b40d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x318>\n+\tlea 0x36a351df(%rip),%rax # 36b41d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x320>\n+\tlea 0x36a351d0(%rip),%rdx # 36b41d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x318>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -200272,15 +200272,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a33f6b(%rip),%rdi # 36b40dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x388>\n+\tlea 0x36a34f6b(%rip),%rdi # 36b41dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x388>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -200376,15 +200376,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a33ca3(%rip),%rdi # 36b40dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x390>\n+\tlea 0x36a34ca3(%rip),%rdi # 36b41dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x390>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -200480,15 +200480,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a339db(%rip),%rdi # 36b40dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x398>\n+\tlea 0x36a349db(%rip),%rdi # 36b41dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x398>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -200584,15 +200584,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a33713(%rip),%rdi # 36b40dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a0>\n+\tlea 0x36a34713(%rip),%rdi # 36b41dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -200688,15 +200688,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3344b(%rip),%rdi # 36b40de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a8>\n+\tlea 0x36a3444b(%rip),%rdi # 36b41de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -200792,15 +200792,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a33183(%rip),%rdi # 36b40de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b0>\n+\tlea 0x36a34183(%rip),%rdi # 36b41de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -200896,15 +200896,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a32ebb(%rip),%rdi # 36b40df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b8>\n+\tlea 0x36a33ebb(%rip),%rdi # 36b41df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -201000,15 +201000,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a32bf3(%rip),%rdi # 36b40df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c0>\n+\tlea 0x36a33bf3(%rip),%rdi # 36b41df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -201104,15 +201104,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3292b(%rip),%rdi # 36b40e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c8>\n+\tlea 0x36a3392b(%rip),%rdi # 36b41e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -201208,15 +201208,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a32663(%rip),%rdi # 36b40e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d0>\n+\tlea 0x36a33663(%rip),%rdi # 36b41e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -201312,15 +201312,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a3239b(%rip),%rdi # 36b40e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d8>\n+\tlea 0x36a3339b(%rip),%rdi # 36b41e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -201416,15 +201416,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a320d3(%rip),%rdi # 36b40e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e0>\n+\tlea 0x36a330d3(%rip),%rdi # 36b41e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -201450,15 +201450,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a32030(%rip),%rdi # 36b40e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e8>\n+\tlea 0x36a33030(%rip),%rdi # 36b41e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -201481,15 +201481,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a31fa6(%rip),%rdi # 36b40e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f0>\n+\tlea 0x36a32fa6(%rip),%rdi # 36b41e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -201515,15 +201515,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a31f10(%rip),%rdi # 36b40e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f8>\n+\tlea 0x36a32f10(%rip),%rdi # 36b41e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -201546,15 +201546,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a31e86(%rip),%rdi # 36b40e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x400>\n+\tlea 0x36a32e86(%rip),%rdi # 36b41e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x400>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -201580,15 +201580,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a31df0(%rip),%rdi # 36b40e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x408>\n+\tlea 0x36a32df0(%rip),%rdi # 36b41e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x408>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -201611,15 +201611,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a31d66(%rip),%rdi # 36b40e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x410>\n+\tlea 0x36a32d66(%rip),%rdi # 36b41e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x410>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -201645,15 +201645,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a31cd0(%rip),%rdi # 36b40e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x418>\n+\tlea 0x36a32cd0(%rip),%rdi # 36b41e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x418>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -201676,15 +201676,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a31c46(%rip),%rdi # 36b40e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x420>\n+\tlea 0x36a32c46(%rip),%rdi # 36b41e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x420>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -201710,15 +201710,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a31bb0(%rip),%rdi # 36b40e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x428>\n+\tlea 0x36a32bb0(%rip),%rdi # 36b41e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x428>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -201741,15 +201741,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a31b26(%rip),%rdi # 36b40e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x430>\n+\tlea 0x36a32b26(%rip),%rdi # 36b41e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x430>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -201775,15 +201775,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a31a90(%rip),%rdi # 36b40e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x438>\n+\tlea 0x36a32a90(%rip),%rdi # 36b41e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x438>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -201806,284 +201806,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a31a06(%rip),%rdi # 36b40e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x440>\n+\tlea 0x36a32a06(%rip),%rdi # 36b41e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x440>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a36f3c(%rip),%rbx # 36b463d8 ::get_beta()::val@@Base+0xc0>\n+\tmov 0x36a37f3c(%rip),%rbx # 36b473d8 ::get_beta()::val@@Base+0xc0>\n \ttest %rbx,%rbx\n \tjne 10f4b7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2987>\n-\tlea 0x36a35f80(%rip),%rdi # 36b45428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49f0>\n+\tlea 0x36a36f80(%rip),%rdi # 36b46428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x49f0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a36f21(%rip) # 36b463d8 ::get_beta()::val@@Base+0xc0>\n+\tmov %rax,0x36a37f21(%rip) # 36b473d8 ::get_beta()::val@@Base+0xc0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a318f6(%rip),%rsi # 36b40dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x388>\n+\tlea 0x36a328f6(%rip),%rsi # 36b41dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x388>\n \tlea 0x1df27b(%rip),%rcx # 2ee74c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x144dc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a318d0(%rip),%rsi # 36b40dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x390>\n+\tlea 0x36a328d0(%rip),%rsi # 36b41dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x390>\n \tlea 0x1df2d1(%rip),%rcx # 2ee7d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14560>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a318fa(%rip),%rsi # 36b40e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e8>\n+\tlea 0x36a328fa(%rip),%rsi # 36b41e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e8>\n \tlea 0x1df327(%rip),%rcx # 2ee854 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x145e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a318d4(%rip),%rsi # 36b40e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f0>\n+\tlea 0x36a328d4(%rip),%rsi # 36b41e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f0>\n \tlea 0x1cedc1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3184e(%rip),%rsi # 36b40dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x398>\n+\tlea 0x36a3284e(%rip),%rsi # 36b41dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x398>\n \tlea 0x1df31a(%rip),%rcx # 2ee8a3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14633>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31828(%rip),%rsi # 36b40dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a0>\n+\tlea 0x36a32828(%rip),%rsi # 36b41dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a0>\n \tlea 0x1df370(%rip),%rcx # 2ee927 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x146b7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31852(%rip),%rsi # 36b40e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f8>\n+\tlea 0x36a32852(%rip),%rsi # 36b41e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f8>\n \tlea 0x1df3c6(%rip),%rcx # 2ee9ab (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1473b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3182c(%rip),%rsi # 36b40e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x400>\n+\tlea 0x36a3282c(%rip),%rsi # 36b41e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x400>\n \tlea 0x1cf878(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a317a6(%rip),%rsi # 36b40de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a8>\n+\tlea 0x36a327a6(%rip),%rsi # 36b41de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a8>\n \tlea 0x1df3b9(%rip),%rcx # 2ee9fa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1478a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31780(%rip),%rsi # 36b40de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b0>\n+\tlea 0x36a32780(%rip),%rsi # 36b41de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b0>\n \tlea 0x1df40f(%rip),%rcx # 2eea7e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1480e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a317aa(%rip),%rsi # 36b40e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x408>\n+\tlea 0x36a327aa(%rip),%rsi # 36b41e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x408>\n \tlea 0x1df465(%rip),%rcx # 2eeb02 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14892>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31784(%rip),%rsi # 36b40e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x410>\n+\tlea 0x36a32784(%rip),%rsi # 36b41e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x410>\n \tlea 0x1cf949(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a316fe(%rip),%rsi # 36b40df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b8>\n+\tlea 0x36a326fe(%rip),%rsi # 36b41df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b8>\n \tlea 0x1df458(%rip),%rcx # 2eeb51 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x148e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a316d8(%rip),%rsi # 36b40df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c0>\n+\tlea 0x36a326d8(%rip),%rsi # 36b41df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c0>\n \tlea 0x1df4b0(%rip),%rcx # 2eebd7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14967>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31702(%rip),%rsi # 36b40e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x418>\n+\tlea 0x36a32702(%rip),%rsi # 36b41e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x418>\n \tlea 0x1df508(%rip),%rcx # 2eec5d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x149ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a316dc(%rip),%rsi # 36b40e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x420>\n+\tlea 0x36a326dc(%rip),%rsi # 36b41e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x420>\n \tlea 0x1cfa1d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31656(%rip),%rsi # 36b40e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c8>\n+\tlea 0x36a32656(%rip),%rsi # 36b41e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c8>\n \tlea 0x1df4fc(%rip),%rcx # 2eecad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14a3d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31630(%rip),%rsi # 36b40e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d0>\n+\tlea 0x36a32630(%rip),%rsi # 36b41e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d0>\n \tlea 0x1df554(%rip),%rcx # 2eed33 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14ac3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3165a(%rip),%rsi # 36b40e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x428>\n+\tlea 0x36a3265a(%rip),%rsi # 36b41e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x428>\n \tlea 0x1df5ac(%rip),%rcx # 2eedb9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14b49>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31634(%rip),%rsi # 36b40e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x430>\n+\tlea 0x36a32634(%rip),%rsi # 36b41e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x430>\n \tlea 0x1cebf2(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a315ae(%rip),%rsi # 36b40e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d8>\n+\tlea 0x36a325ae(%rip),%rsi # 36b41e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d8>\n \tlea 0x1df5a0(%rip),%rcx # 2eee09 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14b99>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a31588(%rip),%rsi # 36b40e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e0>\n+\tlea 0x36a32588(%rip),%rsi # 36b41e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e0>\n \tlea 0x1df5f8(%rip),%rcx # 2eee8f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14c1f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a315b2(%rip),%rsi # 36b40e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x438>\n+\tlea 0x36a325b2(%rip),%rsi # 36b41e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x438>\n \tlea 0x1df650(%rip),%rcx # 2eef15 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14ca5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a3158c(%rip),%rsi # 36b40e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x440>\n+\tlea 0x36a3258c(%rip),%rsi # 36b41e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x440>\n \tlea 0x1cfb2e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 10f920 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2df0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a36ab1(%rip),%rdi # 36b463d8 ::get_beta()::val@@Base+0xc0>\n+\tmov 0x36a37ab1(%rip),%rdi # 36b473d8 ::get_beta()::val@@Base+0xc0>\n \ttest %rdi,%rdi\n \tje 10f941 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e11>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a36a9b(%rip) # 36b463d8 ::get_beta()::val@@Base+0xc0>\n+\tmovq $0x0,0x36a37a9b(%rip) # 36b473d8 ::get_beta()::val@@Base+0xc0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000010f950 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -202109,16 +202109,16 @@\n \tmov $0x2d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3142f(%rip),%rax # 36b40dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x390>\n-\tlea 0x36a31420(%rip),%rdx # 36b40dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x388>\n+\tlea 0x36a3242f(%rip),%rax # 36b41dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x390>\n+\tlea 0x36a32420(%rip),%rdx # 36b41dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x388>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -202977,15 +202977,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3083b(%rip),%rdi # 36b40e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e8>\n+\tlea 0x36a3183b(%rip),%rdi # 36b41e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 11072a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -203033,15 +203033,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a3071d(%rip),%rdi # 36b40e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f0>\n+\tlea 0x36a3171d(%rip),%rdi # 36b41e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -203299,16 +203299,16 @@\n \tmov $0x3500,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a3027f(%rip),%rax # 36b40dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a0>\n-\tlea 0x36a30270(%rip),%rdx # 36b40dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x398>\n+\tlea 0x36a3127f(%rip),%rax # 36b41dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a0>\n+\tlea 0x36a31270(%rip),%rdx # 36b41dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x398>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -204167,15 +204167,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2f68b(%rip),%rdi # 36b40e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f8>\n+\tlea 0x36a3068b(%rip),%rdi # 36b41e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3f8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1118ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -204223,15 +204223,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2f56d(%rip),%rdi # 36b40e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x400>\n+\tlea 0x36a3056d(%rip),%rdi # 36b41e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x400>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -204489,16 +204489,16 @@\n \tmov $0x3d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2f0cf(%rip),%rax # 36b40de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b0>\n-\tlea 0x36a2f0c0(%rip),%rdx # 36b40de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a8>\n+\tlea 0x36a300cf(%rip),%rax # 36b41de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b0>\n+\tlea 0x36a300c0(%rip),%rdx # 36b41de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3a8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -205357,15 +205357,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2e4db(%rip),%rdi # 36b40e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x408>\n+\tlea 0x36a2f4db(%rip),%rdi # 36b41e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x408>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 112aaa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -205413,15 +205413,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2e3bd(%rip),%rdi # 36b40e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x410>\n+\tlea 0x36a2f3bd(%rip),%rdi # 36b41e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x410>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -205679,16 +205679,16 @@\n \tmov $0x4500,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2df1f(%rip),%rax # 36b40df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c0>\n-\tlea 0x36a2df10(%rip),%rdx # 36b40df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b8>\n+\tlea 0x36a2ef1f(%rip),%rax # 36b41df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c0>\n+\tlea 0x36a2ef10(%rip),%rdx # 36b41df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3b8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -206547,15 +206547,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2d32b(%rip),%rdi # 36b40e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x418>\n+\tlea 0x36a2e32b(%rip),%rdi # 36b41e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x418>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 113c6a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -206603,15 +206603,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2d20d(%rip),%rdi # 36b40e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x420>\n+\tlea 0x36a2e20d(%rip),%rdi # 36b41e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x420>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -206869,16 +206869,16 @@\n \tmov $0x4d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2cd6f(%rip),%rax # 36b40e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d0>\n-\tlea 0x36a2cd60(%rip),%rdx # 36b40e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c8>\n+\tlea 0x36a2dd6f(%rip),%rax # 36b41e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d0>\n+\tlea 0x36a2dd60(%rip),%rdx # 36b41e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3c8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -207737,15 +207737,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2c17b(%rip),%rdi # 36b40e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x428>\n+\tlea 0x36a2d17b(%rip),%rdi # 36b41e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x428>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 114e2a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -207793,15 +207793,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2c05d(%rip),%rdi # 36b40e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x430>\n+\tlea 0x36a2d05d(%rip),%rdi # 36b41e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x430>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -208059,16 +208059,16 @@\n \tmov $0x4700,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 16, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2bbbf(%rip),%rax # 36b40e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e0>\n-\tlea 0x36a2bbb0(%rip),%rdx # 36b40e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d8>\n+\tlea 0x36a2cbbf(%rip),%rax # 36b41e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3e0>\n+\tlea 0x36a2cbb0(%rip),%rdx # 36b41e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3d8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -208927,15 +208927,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2afcb(%rip),%rdi # 36b40e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x438>\n+\tlea 0x36a2bfcb(%rip),%rdi # 36b41e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x438>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 115fea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -208983,15 +208983,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2aead(%rip),%rdi # 36b40e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x440>\n+\tlea 0x36a2bead(%rip),%rdi # 36b41e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x440>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -209316,15 +209316,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a2a80b(%rip),%rdi # 36b40e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x448>\n+\tlea 0x36a2b80b(%rip),%rdi # 36b41e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x448>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -209420,15 +209420,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a2a543(%rip),%rdi # 36b40e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x450>\n+\tlea 0x36a2b543(%rip),%rdi # 36b41e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x450>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -209524,15 +209524,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a2a27b(%rip),%rdi # 36b40e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x458>\n+\tlea 0x36a2b27b(%rip),%rdi # 36b41e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x458>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -209628,15 +209628,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a29fb3(%rip),%rdi # 36b40e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x460>\n+\tlea 0x36a2afb3(%rip),%rdi # 36b41e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x460>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -209732,15 +209732,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a29ceb(%rip),%rdi # 36b40ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x468>\n+\tlea 0x36a2aceb(%rip),%rdi # 36b41ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x468>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -209836,15 +209836,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a29a23(%rip),%rdi # 36b40ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x470>\n+\tlea 0x36a2aa23(%rip),%rdi # 36b41ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x470>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -209940,15 +209940,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a2975b(%rip),%rdi # 36b40eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x478>\n+\tlea 0x36a2a75b(%rip),%rdi # 36b41eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x478>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -210044,15 +210044,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a29493(%rip),%rdi # 36b40eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x480>\n+\tlea 0x36a2a493(%rip),%rdi # 36b41eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x480>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -210148,15 +210148,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a291cb(%rip),%rdi # 36b40ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x488>\n+\tlea 0x36a2a1cb(%rip),%rdi # 36b41ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x488>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -210252,15 +210252,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a28f03(%rip),%rdi # 36b40ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x490>\n+\tlea 0x36a29f03(%rip),%rdi # 36b41ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x490>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -210356,15 +210356,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a28c3b(%rip),%rdi # 36b40ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x498>\n+\tlea 0x36a29c3b(%rip),%rdi # 36b41ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x498>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -210460,15 +210460,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a28973(%rip),%rdi # 36b40ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a0>\n+\tlea 0x36a29973(%rip),%rdi # 36b41ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -210494,15 +210494,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a288d0(%rip),%rdi # 36b40ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a8>\n+\tlea 0x36a298d0(%rip),%rdi # 36b41ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -210525,15 +210525,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a28846(%rip),%rdi # 36b40ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b0>\n+\tlea 0x36a29846(%rip),%rdi # 36b41ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -210559,15 +210559,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a287b0(%rip),%rdi # 36b40ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b8>\n+\tlea 0x36a297b0(%rip),%rdi # 36b41ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -210590,15 +210590,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a28726(%rip),%rdi # 36b40ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c0>\n+\tlea 0x36a29726(%rip),%rdi # 36b41ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -210624,15 +210624,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a28690(%rip),%rdi # 36b40f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c8>\n+\tlea 0x36a29690(%rip),%rdi # 36b41f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -210655,15 +210655,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a28606(%rip),%rdi # 36b40f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d0>\n+\tlea 0x36a29606(%rip),%rdi # 36b41f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -210689,15 +210689,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a28570(%rip),%rdi # 36b40f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d8>\n+\tlea 0x36a29570(%rip),%rdi # 36b41f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -210720,15 +210720,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a284e6(%rip),%rdi # 36b40f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e0>\n+\tlea 0x36a294e6(%rip),%rdi # 36b41f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -210754,15 +210754,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a28450(%rip),%rdi # 36b40f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e8>\n+\tlea 0x36a29450(%rip),%rdi # 36b41f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -210785,15 +210785,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a283c6(%rip),%rdi # 36b40f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f0>\n+\tlea 0x36a293c6(%rip),%rdi # 36b41f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -210819,15 +210819,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a28330(%rip),%rdi # 36b40f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f8>\n+\tlea 0x36a29330(%rip),%rdi # 36b41f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -210850,284 +210850,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a282a6(%rip),%rdi # 36b40f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x500>\n+\tlea 0x36a292a6(%rip),%rdi # 36b41f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x500>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a2d724(%rip),%rbx # 36b463e0 ::get_beta()::val@@Base+0xc8>\n+\tmov 0x36a2e724(%rip),%rbx # 36b473e0 ::get_beta()::val@@Base+0xc8>\n \ttest %rbx,%rbx\n \tjne 118cd7 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a47>\n-\tlea 0x36a2c778(%rip),%rdi # 36b45440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a08>\n+\tlea 0x36a2d778(%rip),%rdi # 36b46440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a08>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a2d709(%rip) # 36b463e0 ::get_beta()::val@@Base+0xc8>\n+\tmov %rax,0x36a2e709(%rip) # 36b473e0 ::get_beta()::val@@Base+0xc8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a28196(%rip),%rsi # 36b40e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x448>\n+\tlea 0x36a29196(%rip),%rsi # 36b41e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x448>\n \tlea 0x1d6274(%rip),%rcx # 2eef65 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14cf5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a28170(%rip),%rsi # 36b40e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x450>\n+\tlea 0x36a29170(%rip),%rsi # 36b41e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x450>\n \tlea 0x1d62ca(%rip),%rcx # 2eefe9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14d79>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a2819a(%rip),%rsi # 36b40ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a8>\n+\tlea 0x36a2919a(%rip),%rsi # 36b41ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a8>\n \tlea 0x1d6320(%rip),%rcx # 2ef06d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14dfd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a28174(%rip),%rsi # 36b40ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b0>\n+\tlea 0x36a29174(%rip),%rsi # 36b41ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b0>\n \tlea 0x1c55a1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a280ee(%rip),%rsi # 36b40e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x458>\n+\tlea 0x36a290ee(%rip),%rsi # 36b41e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x458>\n \tlea 0x1d6313(%rip),%rcx # 2ef0bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14e4c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a280c8(%rip),%rsi # 36b40e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x460>\n+\tlea 0x36a290c8(%rip),%rsi # 36b41e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x460>\n \tlea 0x1d6369(%rip),%rcx # 2ef140 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14ed0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a280f2(%rip),%rsi # 36b40ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b8>\n+\tlea 0x36a290f2(%rip),%rsi # 36b41ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b8>\n \tlea 0x1d63bf(%rip),%rcx # 2ef1c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14f54>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a280cc(%rip),%rsi # 36b40ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c0>\n+\tlea 0x36a290cc(%rip),%rsi # 36b41ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c0>\n \tlea 0x1c6058(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a28046(%rip),%rsi # 36b40ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x468>\n+\tlea 0x36a29046(%rip),%rsi # 36b41ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x468>\n \tlea 0x1d63b2(%rip),%rcx # 2ef213 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x14fa3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a28020(%rip),%rsi # 36b40ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x470>\n+\tlea 0x36a29020(%rip),%rsi # 36b41ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x470>\n \tlea 0x1d6408(%rip),%rcx # 2ef297 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15027>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a2804a(%rip),%rsi # 36b40f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c8>\n+\tlea 0x36a2904a(%rip),%rsi # 36b41f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c8>\n \tlea 0x1d645e(%rip),%rcx # 2ef31b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x150ab>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a28024(%rip),%rsi # 36b40f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d0>\n+\tlea 0x36a29024(%rip),%rsi # 36b41f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d0>\n \tlea 0x1c6129(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27f9e(%rip),%rsi # 36b40eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x478>\n+\tlea 0x36a28f9e(%rip),%rsi # 36b41eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x478>\n \tlea 0x1d6451(%rip),%rcx # 2ef36a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x150fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27f78(%rip),%rsi # 36b40eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x480>\n+\tlea 0x36a28f78(%rip),%rsi # 36b41eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x480>\n \tlea 0x1d64a9(%rip),%rcx # 2ef3f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15180>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27fa2(%rip),%rsi # 36b40f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d8>\n+\tlea 0x36a28fa2(%rip),%rsi # 36b41f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d8>\n \tlea 0x1d6501(%rip),%rcx # 2ef476 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15206>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27f7c(%rip),%rsi # 36b40f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e0>\n+\tlea 0x36a28f7c(%rip),%rsi # 36b41f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e0>\n \tlea 0x1c61fd(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27ef6(%rip),%rsi # 36b40ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x488>\n+\tlea 0x36a28ef6(%rip),%rsi # 36b41ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x488>\n \tlea 0x1d64f5(%rip),%rcx # 2ef4c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15256>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27ed0(%rip),%rsi # 36b40ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x490>\n+\tlea 0x36a28ed0(%rip),%rsi # 36b41ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x490>\n \tlea 0x1d654d(%rip),%rcx # 2ef54c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x152dc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27efa(%rip),%rsi # 36b40f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e8>\n+\tlea 0x36a28efa(%rip),%rsi # 36b41f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e8>\n \tlea 0x1d65a5(%rip),%rcx # 2ef5d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15362>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27ed4(%rip),%rsi # 36b40f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f0>\n+\tlea 0x36a28ed4(%rip),%rsi # 36b41f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f0>\n \tlea 0x1c53d2(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27e4e(%rip),%rsi # 36b40ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x498>\n+\tlea 0x36a28e4e(%rip),%rsi # 36b41ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x498>\n \tlea 0x1d6599(%rip),%rcx # 2ef622 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x153b2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27e28(%rip),%rsi # 36b40ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a0>\n+\tlea 0x36a28e28(%rip),%rsi # 36b41ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a0>\n \tlea 0x1d65f1(%rip),%rcx # 2ef6a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15438>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27e52(%rip),%rsi # 36b40f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f8>\n+\tlea 0x36a28e52(%rip),%rsi # 36b41f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f8>\n \tlea 0x1d6649(%rip),%rcx # 2ef72e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x154be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a27e2c(%rip),%rsi # 36b40f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x500>\n+\tlea 0x36a28e2c(%rip),%rsi # 36b41f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x500>\n \tlea 0x1c630e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 119140 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3eb0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a2d299(%rip),%rdi # 36b463e0 ::get_beta()::val@@Base+0xc8>\n+\tmov 0x36a2e299(%rip),%rdi # 36b473e0 ::get_beta()::val@@Base+0xc8>\n \ttest %rdi,%rdi\n \tje 119161 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ed1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a2d283(%rip) # 36b463e0 ::get_beta()::val@@Base+0xc8>\n+\tmovq $0x0,0x36a2e283(%rip) # 36b473e0 ::get_beta()::val@@Base+0xc8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000119170 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -211153,16 +211153,16 @@\n \tmov $0x2d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a27ccf(%rip),%rax # 36b40e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x450>\n-\tlea 0x36a27cc0(%rip),%rdx # 36b40e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x448>\n+\tlea 0x36a28ccf(%rip),%rax # 36b41e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x450>\n+\tlea 0x36a28cc0(%rip),%rdx # 36b41e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x448>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -212022,15 +212022,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a270cb(%rip),%rdi # 36b40ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a8>\n+\tlea 0x36a280cb(%rip),%rdi # 36b41ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 119f5a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -212078,15 +212078,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a26fad(%rip),%rdi # 36b40ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b0>\n+\tlea 0x36a27fad(%rip),%rdi # 36b41ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -212344,16 +212344,16 @@\n \tmov $0x3500,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a26b0f(%rip),%rax # 36b40e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x460>\n-\tlea 0x36a26b00(%rip),%rdx # 36b40e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x458>\n+\tlea 0x36a27b0f(%rip),%rax # 36b41e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x460>\n+\tlea 0x36a27b00(%rip),%rdx # 36b41e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x458>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -213213,15 +213213,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a25f0b(%rip),%rdi # 36b40ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b8>\n+\tlea 0x36a26f0b(%rip),%rdi # 36b41ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 11b12a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -213269,15 +213269,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a25ded(%rip),%rdi # 36b40ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c0>\n+\tlea 0x36a26ded(%rip),%rdi # 36b41ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -213535,16 +213535,16 @@\n \tmov $0x3d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2594f(%rip),%rax # 36b40ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x470>\n-\tlea 0x36a25940(%rip),%rdx # 36b40ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x468>\n+\tlea 0x36a2694f(%rip),%rax # 36b41ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x470>\n+\tlea 0x36a26940(%rip),%rdx # 36b41ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x468>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -214404,15 +214404,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a24d4b(%rip),%rdi # 36b40f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c8>\n+\tlea 0x36a25d4b(%rip),%rdi # 36b41f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 11c2fa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -214460,15 +214460,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a24c2d(%rip),%rdi # 36b40f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d0>\n+\tlea 0x36a25c2d(%rip),%rdi # 36b41f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -214726,16 +214726,16 @@\n \tmov $0x4500,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2478f(%rip),%rax # 36b40eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x480>\n-\tlea 0x36a24780(%rip),%rdx # 36b40eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x478>\n+\tlea 0x36a2578f(%rip),%rax # 36b41eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x480>\n+\tlea 0x36a25780(%rip),%rdx # 36b41eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x478>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -215595,15 +215595,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a23b8b(%rip),%rdi # 36b40f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d8>\n+\tlea 0x36a24b8b(%rip),%rdi # 36b41f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 11d4ca (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -215651,15 +215651,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a23a6d(%rip),%rdi # 36b40f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e0>\n+\tlea 0x36a24a6d(%rip),%rdi # 36b41f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -215917,16 +215917,16 @@\n \tmov $0x4d00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a235cf(%rip),%rax # 36b40ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x490>\n-\tlea 0x36a235c0(%rip),%rdx # 36b40ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x488>\n+\tlea 0x36a245cf(%rip),%rax # 36b41ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x490>\n+\tlea 0x36a245c0(%rip),%rdx # 36b41ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x488>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -216786,15 +216786,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a229cb(%rip),%rdi # 36b40f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e8>\n+\tlea 0x36a239cb(%rip),%rdi # 36b41f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4e8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 11e69a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -216842,15 +216842,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a228ad(%rip),%rdi # 36b40f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f0>\n+\tlea 0x36a238ad(%rip),%rdi # 36b41f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -217108,16 +217108,16 @@\n \tmov $0x8400,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 16, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a2240f(%rip),%rax # 36b40ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a0>\n-\tlea 0x36a22400(%rip),%rdx # 36b40ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x498>\n+\tlea 0x36a2340f(%rip),%rax # 36b41ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a0>\n+\tlea 0x36a23400(%rip),%rdx # 36b41ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x498>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -217977,15 +217977,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a2180b(%rip),%rdi # 36b40f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f8>\n+\tlea 0x36a2280b(%rip),%rdi # 36b41f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4f8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 11f86a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -218033,15 +218033,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a216ed(%rip),%rdi # 36b40f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x500>\n+\tlea 0x36a226ed(%rip),%rdi # 36b41f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x500>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -218366,15 +218366,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a2104b(%rip),%rdi # 36b40f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x508>\n+\tlea 0x36a2204b(%rip),%rdi # 36b41f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x508>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -218470,15 +218470,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a20d83(%rip),%rdi # 36b40f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x510>\n+\tlea 0x36a21d83(%rip),%rdi # 36b41f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x510>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -218504,15 +218504,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a20ce0(%rip),%rdi # 36b40f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x518>\n+\tlea 0x36a21ce0(%rip),%rdi # 36b41f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x518>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -218535,83 +218535,83 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a20c56(%rip),%rdi # 36b40f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x520>\n+\tlea 0x36a21c56(%rip),%rdi # 36b41f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x520>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a260bc(%rip),%rbx # 36b463e8 ::get_beta()::val@@Base+0xd0>\n+\tmov 0x36a270bc(%rip),%rbx # 36b473e8 ::get_beta()::val@@Base+0xd0>\n \ttest %rbx,%rbx\n \tjne 120347 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x1847>\n-\tlea 0x36a25120(%rip),%rdi # 36b45458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a20>\n+\tlea 0x36a26120(%rip),%rdi # 36b46458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a20>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a260a1(%rip) # 36b463e8 ::get_beta()::val@@Base+0xd0>\n+\tmov %rax,0x36a270a1(%rip) # 36b473e8 ::get_beta()::val@@Base+0xd0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a20be6(%rip),%rsi # 36b40f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x508>\n+\tlea 0x36a21be6(%rip),%rsi # 36b41f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x508>\n \tlea 0x1cf41d(%rip),%rcx # 2ef77e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1550e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a20bc0(%rip),%rsi # 36b40f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x510>\n+\tlea 0x36a21bc0(%rip),%rsi # 36b41f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x510>\n \tlea 0x1cf475(%rip),%rcx # 2ef804 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15594>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a20b9a(%rip),%rsi # 36b40f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x518>\n+\tlea 0x36a21b9a(%rip),%rsi # 36b41f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x518>\n \tlea 0x1cf4cd(%rip),%rcx # 2ef88a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1561a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a20b74(%rip),%rsi # 36b40f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x520>\n+\tlea 0x36a21b74(%rip),%rsi # 36b41f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x520>\n \tlea 0x1cd4d5(%rip),%rcx # 2ed8c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13650>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi # 120410 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x1910>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a25fd1(%rip),%rdi # 36b463e8 ::get_beta()::val@@Base+0xd0>\n+\tmov 0x36a26fd1(%rip),%rdi # 36b473e8 ::get_beta()::val@@Base+0xd0>\n \ttest %rdi,%rdi\n \tje 120431 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x1931>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a25fbb(%rip) # 36b463e8 ::get_beta()::val@@Base+0xd0>\n+\tmovq $0x0,0x36a26fbb(%rip) # 36b473e8 ::get_beta()::val@@Base+0xd0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000120440 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<576, 512, 2, 16>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -218624,16 +218624,16 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1367\n \tcall 22ce0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1368\n \tcall 22bc0 \n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a20ae6(%rip),%rax # 36b40f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x510>\n-\tlea 0x36a20ad7(%rip),%rdx # 36b40f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x508>\n+\tlea 0x36a21ae6(%rip),%rax # 36b41f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x510>\n+\tlea 0x36a21ad7(%rip),%rdx # 36b41f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x508>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov $0xe4a0,%r8d\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n@@ -219504,15 +219504,15 @@\n \tlea 0x110(%rsp),%rdx\n \tlea 0xe8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x100(%rsp),%rsi\n \tmov 0x108(%rsp),%edx\n \tmov 0xf0(%rsp),%rcx\n \tmov 0xf8(%rsp),%r8d\n-\tlea 0x36a1fe7e(%rip),%rdi # 36b40f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x518>\n+\tlea 0x36a20e7e(%rip),%rdi # 36b41f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x518>\n \tlea 0x150(%rsp),%r9\n \tpush 0xe8(%rsp)\n \tpush 0x118(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 121217 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd77>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -219560,15 +219560,15 @@\n \tlea 0xe8(%rsp),%rdx\n \tlea 0xe0(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x100(%rsp),%rsi\n \tmov 0x108(%rsp),%edx\n \tmov 0xf0(%rsp),%rcx\n \tmov 0xf8(%rsp),%r8d\n-\tlea 0x36a1fd60(%rip),%rdi # 36b40f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x520>\n+\tlea 0x36a20d60(%rip),%rdi # 36b41f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x520>\n \tlea 0x150(%rsp),%r9\n \tpush 0xe0(%rsp)\n \tpush 0xf0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -219886,15 +219886,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1f6eb(%rip),%rdi # 36b40f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x528>\n+\tlea 0x36a206eb(%rip),%rdi # 36b41f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x528>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -219990,15 +219990,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1f423(%rip),%rdi # 36b40f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x530>\n+\tlea 0x36a20423(%rip),%rdi # 36b41f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x530>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220094,15 +220094,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1f15b(%rip),%rdi # 36b40f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x538>\n+\tlea 0x36a2015b(%rip),%rdi # 36b41f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x538>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220198,15 +220198,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1ee93(%rip),%rdi # 36b40f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x540>\n+\tlea 0x36a1fe93(%rip),%rdi # 36b41f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x540>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220302,15 +220302,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1ebcb(%rip),%rdi # 36b40f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x548>\n+\tlea 0x36a1fbcb(%rip),%rdi # 36b41f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x548>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220406,15 +220406,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1e903(%rip),%rdi # 36b40f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x550>\n+\tlea 0x36a1f903(%rip),%rdi # 36b41f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x550>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220510,15 +220510,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1e63b(%rip),%rdi # 36b40f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x558>\n+\tlea 0x36a1f63b(%rip),%rdi # 36b41f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x558>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220614,15 +220614,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1e373(%rip),%rdi # 36b40f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x560>\n+\tlea 0x36a1f373(%rip),%rdi # 36b41f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x560>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220718,15 +220718,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1e0ab(%rip),%rdi # 36b40fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x568>\n+\tlea 0x36a1f0ab(%rip),%rdi # 36b41fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x568>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220822,15 +220822,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1dde3(%rip),%rdi # 36b40fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x570>\n+\tlea 0x36a1ede3(%rip),%rdi # 36b41fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x570>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -220926,15 +220926,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1db1b(%rip),%rdi # 36b40fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x578>\n+\tlea 0x36a1eb1b(%rip),%rdi # 36b41fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x578>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -221030,15 +221030,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1d853(%rip),%rdi # 36b40fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580>\n+\tlea 0x36a1e853(%rip),%rdi # 36b41fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -221064,15 +221064,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a1d7b0(%rip),%rdi # 36b40fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x588>\n+\tlea 0x36a1e7b0(%rip),%rdi # 36b41fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x588>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -221095,15 +221095,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a1d726(%rip),%rdi # 36b40fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x590>\n+\tlea 0x36a1e726(%rip),%rdi # 36b41fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x590>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -221129,15 +221129,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a1d690(%rip),%rdi # 36b40fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x598>\n+\tlea 0x36a1e690(%rip),%rdi # 36b41fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x598>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -221160,15 +221160,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a1d606(%rip),%rdi # 36b40fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a0>\n+\tlea 0x36a1e606(%rip),%rdi # 36b41fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -221194,15 +221194,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a1d570(%rip),%rdi # 36b40fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a8>\n+\tlea 0x36a1e570(%rip),%rdi # 36b41fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -221225,15 +221225,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a1d4e6(%rip),%rdi # 36b40fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b0>\n+\tlea 0x36a1e4e6(%rip),%rdi # 36b41fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -221259,15 +221259,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a1d450(%rip),%rdi # 36b40ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b8>\n+\tlea 0x36a1e450(%rip),%rdi # 36b41ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -221290,15 +221290,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a1d3c6(%rip),%rdi # 36b40ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c0>\n+\tlea 0x36a1e3c6(%rip),%rdi # 36b41ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -221324,15 +221324,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a1d330(%rip),%rdi # 36b41000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c8>\n+\tlea 0x36a1e330(%rip),%rdi # 36b42000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -221355,15 +221355,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a1d2a6(%rip),%rdi # 36b41008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d0>\n+\tlea 0x36a1e2a6(%rip),%rdi # 36b42008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -221389,15 +221389,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a1d210(%rip),%rdi # 36b41010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d8>\n+\tlea 0x36a1e210(%rip),%rdi # 36b42010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -221420,284 +221420,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a1d186(%rip),%rdi # 36b41018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e0>\n+\tlea 0x36a1e186(%rip),%rdi # 36b42018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a22534(%rip),%rbx # 36b463f0 ::get_beta()::val@@Base+0xd8>\n+\tmov 0x36a23534(%rip),%rbx # 36b473f0 ::get_beta()::val@@Base+0xd8>\n \ttest %rbx,%rbx\n \tjne 123ed7 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a37>\n-\tlea 0x36a215a8(%rip),%rdi # 36b45470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a38>\n+\tlea 0x36a225a8(%rip),%rdi # 36b46470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a38>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a22519(%rip) # 36b463f0 ::get_beta()::val@@Base+0xd8>\n+\tmov %rax,0x36a23519(%rip) # 36b473f0 ::get_beta()::val@@Base+0xd8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1d076(%rip),%rsi # 36b40f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x528>\n+\tlea 0x36a1e076(%rip),%rsi # 36b41f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x528>\n \tlea 0x1cb9e9(%rip),%rcx # 2ef8da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1566a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1d050(%rip),%rsi # 36b40f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x530>\n+\tlea 0x36a1e050(%rip),%rsi # 36b41f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x530>\n \tlea 0x1cba3e(%rip),%rcx # 2ef95d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x156ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1d07a(%rip),%rsi # 36b40fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x588>\n+\tlea 0x36a1e07a(%rip),%rsi # 36b41fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x588>\n \tlea 0x1cba93(%rip),%rcx # 2ef9e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15770>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1d054(%rip),%rsi # 36b40fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x590>\n+\tlea 0x36a1e054(%rip),%rsi # 36b41fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x590>\n \tlea 0x1ba3a1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cfce(%rip),%rsi # 36b40f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x538>\n+\tlea 0x36a1dfce(%rip),%rsi # 36b41f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x538>\n \tlea 0x1cba85(%rip),%rcx # 2efa2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x157be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cfa8(%rip),%rsi # 36b40f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x540>\n+\tlea 0x36a1dfa8(%rip),%rsi # 36b41f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x540>\n \tlea 0x1cbada(%rip),%rcx # 2efab1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15841>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cfd2(%rip),%rsi # 36b40fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x598>\n+\tlea 0x36a1dfd2(%rip),%rsi # 36b41fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x598>\n \tlea 0x1cbb2f(%rip),%rcx # 2efb34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x158c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cfac(%rip),%rsi # 36b40fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a0>\n+\tlea 0x36a1dfac(%rip),%rsi # 36b41fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a0>\n \tlea 0x1bae58(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cf26(%rip),%rsi # 36b40f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x548>\n+\tlea 0x36a1df26(%rip),%rsi # 36b41f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x548>\n \tlea 0x1cbb21(%rip),%rcx # 2efb82 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15912>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cf00(%rip),%rsi # 36b40f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x550>\n+\tlea 0x36a1df00(%rip),%rsi # 36b41f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x550>\n \tlea 0x1cbb76(%rip),%rcx # 2efc05 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15995>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cf2a(%rip),%rsi # 36b40fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a8>\n+\tlea 0x36a1df2a(%rip),%rsi # 36b41fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a8>\n \tlea 0x1cbbcb(%rip),%rcx # 2efc88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15a18>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cf04(%rip),%rsi # 36b40fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b0>\n+\tlea 0x36a1df04(%rip),%rsi # 36b41fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b0>\n \tlea 0x1baf29(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1ce7e(%rip),%rsi # 36b40f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x558>\n+\tlea 0x36a1de7e(%rip),%rsi # 36b41f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x558>\n \tlea 0x1cbbbd(%rip),%rcx # 2efcd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15a66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1ce58(%rip),%rsi # 36b40f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x560>\n+\tlea 0x36a1de58(%rip),%rsi # 36b41f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x560>\n \tlea 0x1cbc14(%rip),%rcx # 2efd5b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15aeb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1ce82(%rip),%rsi # 36b40ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b8>\n+\tlea 0x36a1de82(%rip),%rsi # 36b41ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b8>\n \tlea 0x1cbc6b(%rip),%rcx # 2efde0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15b70>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1ce5c(%rip),%rsi # 36b40ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c0>\n+\tlea 0x36a1de5c(%rip),%rsi # 36b41ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c0>\n \tlea 0x1baffd(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cdd6(%rip),%rsi # 36b40fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x568>\n+\tlea 0x36a1ddd6(%rip),%rsi # 36b41fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x568>\n \tlea 0x1cbc5e(%rip),%rcx # 2efe2f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15bbf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cdb0(%rip),%rsi # 36b40fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x570>\n+\tlea 0x36a1ddb0(%rip),%rsi # 36b41fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x570>\n \tlea 0x1cbcb5(%rip),%rcx # 2efeb4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c44>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cdda(%rip),%rsi # 36b41000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c8>\n+\tlea 0x36a1ddda(%rip),%rsi # 36b42000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c8>\n \tlea 0x1cbd0c(%rip),%rcx # 2eff39 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15cc9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cdb4(%rip),%rsi # 36b41008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d0>\n+\tlea 0x36a1ddb4(%rip),%rsi # 36b42008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d0>\n \tlea 0x1ba1d2(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cd2e(%rip),%rsi # 36b40fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x578>\n+\tlea 0x36a1dd2e(%rip),%rsi # 36b41fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x578>\n \tlea 0x1cbcff(%rip),%rcx # 2eff88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15d18>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cd08(%rip),%rsi # 36b40fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580>\n+\tlea 0x36a1dd08(%rip),%rsi # 36b41fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580>\n \tlea 0x1cbd56(%rip),%rcx # 2f000d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15d9d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cd32(%rip),%rsi # 36b41010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d8>\n+\tlea 0x36a1dd32(%rip),%rsi # 36b42010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d8>\n \tlea 0x1cbdad(%rip),%rcx # 2f0092 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15e22>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1cd0c(%rip),%rsi # 36b41018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e0>\n+\tlea 0x36a1dd0c(%rip),%rsi # 36b42018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e0>\n \tlea 0x1bb10e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 124340 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ea0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a220a9(%rip),%rdi # 36b463f0 ::get_beta()::val@@Base+0xd8>\n+\tmov 0x36a230a9(%rip),%rdi # 36b473f0 ::get_beta()::val@@Base+0xd8>\n \ttest %rdi,%rdi\n \tje 124361 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a22093(%rip) # 36b463f0 ::get_beta()::val@@Base+0xd8>\n+\tmovq $0x0,0x36a23093(%rip) # 36b473f0 ::get_beta()::val@@Base+0xd8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000124370 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -221723,16 +221723,16 @@\n \tmov $0x2520,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a1cbaf(%rip),%rax # 36b40f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x530>\n-\tlea 0x36a1cba0(%rip),%rdx # 36b40f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x528>\n+\tlea 0x36a1dbaf(%rip),%rax # 36b41f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x530>\n+\tlea 0x36a1dba0(%rip),%rdx # 36b41f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x528>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -222592,15 +222592,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1bfab(%rip),%rdi # 36b40fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x588>\n+\tlea 0x36a1cfab(%rip),%rdi # 36b41fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x588>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 12515a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -222648,15 +222648,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1be8d(%rip),%rdi # 36b40fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x590>\n+\tlea 0x36a1ce8d(%rip),%rdi # 36b41fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x590>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -222914,16 +222914,16 @@\n \tmov $0x2d20,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a1b9ef(%rip),%rax # 36b40f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x540>\n-\tlea 0x36a1b9e0(%rip),%rdx # 36b40f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x538>\n+\tlea 0x36a1c9ef(%rip),%rax # 36b41f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x540>\n+\tlea 0x36a1c9e0(%rip),%rdx # 36b41f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x538>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -223783,15 +223783,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1adeb(%rip),%rdi # 36b40fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x598>\n+\tlea 0x36a1bdeb(%rip),%rdi # 36b41fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x598>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 12632a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -223839,15 +223839,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1accd(%rip),%rdi # 36b40fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a0>\n+\tlea 0x36a1bccd(%rip),%rdi # 36b41fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -224105,16 +224105,16 @@\n \tmov $0x3520,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a1a82f(%rip),%rax # 36b40f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x550>\n-\tlea 0x36a1a820(%rip),%rdx # 36b40f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x548>\n+\tlea 0x36a1b82f(%rip),%rax # 36b41f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x550>\n+\tlea 0x36a1b820(%rip),%rdx # 36b41f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x548>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -224974,15 +224974,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a19c2b(%rip),%rdi # 36b40fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a8>\n+\tlea 0x36a1ac2b(%rip),%rdi # 36b41fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5a8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1274fa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -225030,15 +225030,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a19b0d(%rip),%rdi # 36b40fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b0>\n+\tlea 0x36a1ab0d(%rip),%rdi # 36b41fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -225296,16 +225296,16 @@\n \tmov $0x3d20,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a1966f(%rip),%rax # 36b40f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x560>\n-\tlea 0x36a19660(%rip),%rdx # 36b40f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x558>\n+\tlea 0x36a1a66f(%rip),%rax # 36b41f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x560>\n+\tlea 0x36a1a660(%rip),%rdx # 36b41f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x558>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -226165,15 +226165,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a18a6b(%rip),%rdi # 36b40ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b8>\n+\tlea 0x36a19a6b(%rip),%rdi # 36b41ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5b8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1286ca (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -226221,15 +226221,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1894d(%rip),%rdi # 36b40ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c0>\n+\tlea 0x36a1994d(%rip),%rdi # 36b41ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -226487,16 +226487,16 @@\n \tmov $0x4520,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a184af(%rip),%rax # 36b40fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x570>\n-\tlea 0x36a184a0(%rip),%rdx # 36b40fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x568>\n+\tlea 0x36a194af(%rip),%rax # 36b41fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x570>\n+\tlea 0x36a194a0(%rip),%rdx # 36b41fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x568>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -227356,15 +227356,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a178ab(%rip),%rdi # 36b41000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c8>\n+\tlea 0x36a188ab(%rip),%rdi # 36b42000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 12989a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -227412,15 +227412,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1778d(%rip),%rdi # 36b41008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d0>\n+\tlea 0x36a1878d(%rip),%rdi # 36b42008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -227678,16 +227678,16 @@\n \tmov $0x42a0,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 2, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a172ef(%rip),%rax # 36b40fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580>\n-\tlea 0x36a172e0(%rip),%rdx # 36b40fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x578>\n+\tlea 0x36a182ef(%rip),%rax # 36b41fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x580>\n+\tlea 0x36a182e0(%rip),%rdx # 36b41fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x578>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -228547,15 +228547,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a166eb(%rip),%rdi # 36b41010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d8>\n+\tlea 0x36a176eb(%rip),%rdi # 36b42010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5d8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 12aa6a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -228603,15 +228603,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a165cd(%rip),%rdi # 36b41018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e0>\n+\tlea 0x36a175cd(%rip),%rdi # 36b42018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -228936,15 +228936,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a15f2b(%rip),%rdi # 36b41020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e8>\n+\tlea 0x36a16f2b(%rip),%rdi # 36b42020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229040,15 +229040,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a15c63(%rip),%rdi # 36b41028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f0>\n+\tlea 0x36a16c63(%rip),%rdi # 36b42028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229144,15 +229144,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1599b(%rip),%rdi # 36b41030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f8>\n+\tlea 0x36a1699b(%rip),%rdi # 36b42030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229248,15 +229248,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a156d3(%rip),%rdi # 36b41038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x600>\n+\tlea 0x36a166d3(%rip),%rdi # 36b42038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x600>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229352,15 +229352,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1540b(%rip),%rdi # 36b41040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x608>\n+\tlea 0x36a1640b(%rip),%rdi # 36b42040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x608>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229456,15 +229456,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a15143(%rip),%rdi # 36b41048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x610>\n+\tlea 0x36a16143(%rip),%rdi # 36b42048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x610>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229560,15 +229560,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a14e7b(%rip),%rdi # 36b41050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x618>\n+\tlea 0x36a15e7b(%rip),%rdi # 36b42050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x618>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229664,15 +229664,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a14bb3(%rip),%rdi # 36b41058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x620>\n+\tlea 0x36a15bb3(%rip),%rdi # 36b42058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x620>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229768,15 +229768,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a148eb(%rip),%rdi # 36b41060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x628>\n+\tlea 0x36a158eb(%rip),%rdi # 36b42060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x628>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229872,15 +229872,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a14623(%rip),%rdi # 36b41068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x630>\n+\tlea 0x36a15623(%rip),%rdi # 36b42068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x630>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -229976,15 +229976,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a1435b(%rip),%rdi # 36b41070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x638>\n+\tlea 0x36a1535b(%rip),%rdi # 36b42070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x638>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -230080,15 +230080,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a14093(%rip),%rdi # 36b41078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x640>\n+\tlea 0x36a15093(%rip),%rdi # 36b42078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x640>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -230114,15 +230114,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a13ff0(%rip),%rdi # 36b41080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x648>\n+\tlea 0x36a14ff0(%rip),%rdi # 36b42080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x648>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -230145,15 +230145,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a13f66(%rip),%rdi # 36b41088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x650>\n+\tlea 0x36a14f66(%rip),%rdi # 36b42088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x650>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -230179,15 +230179,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a13ed0(%rip),%rdi # 36b41090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x658>\n+\tlea 0x36a14ed0(%rip),%rdi # 36b42090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x658>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -230210,15 +230210,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a13e46(%rip),%rdi # 36b41098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x660>\n+\tlea 0x36a14e46(%rip),%rdi # 36b42098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x660>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -230244,15 +230244,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a13db0(%rip),%rdi # 36b410a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x668>\n+\tlea 0x36a14db0(%rip),%rdi # 36b420a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x668>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -230275,15 +230275,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a13d26(%rip),%rdi # 36b410a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x670>\n+\tlea 0x36a14d26(%rip),%rdi # 36b420a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x670>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -230309,15 +230309,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a13c90(%rip),%rdi # 36b410b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x678>\n+\tlea 0x36a14c90(%rip),%rdi # 36b420b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x678>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -230340,15 +230340,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a13c06(%rip),%rdi # 36b410b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x680>\n+\tlea 0x36a14c06(%rip),%rdi # 36b420b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x680>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -230374,15 +230374,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a13b70(%rip),%rdi # 36b410c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x688>\n+\tlea 0x36a14b70(%rip),%rdi # 36b420c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x688>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -230405,15 +230405,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a13ae6(%rip),%rdi # 36b410c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x690>\n+\tlea 0x36a14ae6(%rip),%rdi # 36b420c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x690>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -230439,15 +230439,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a13a50(%rip),%rdi # 36b410d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x698>\n+\tlea 0x36a14a50(%rip),%rdi # 36b420d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x698>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -230470,284 +230470,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a139c6(%rip),%rdi # 36b410d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a0>\n+\tlea 0x36a149c6(%rip),%rdi # 36b420d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a18cbc(%rip),%rbx # 36b463f8 ::get_beta()::val@@Base+0xe0>\n+\tmov 0x36a19cbc(%rip),%rbx # 36b473f8 ::get_beta()::val@@Base+0xe0>\n \ttest %rbx,%rbx\n \tjne 12d757 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a57>\n-\tlea 0x36a17d40(%rip),%rdi # 36b45488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a50>\n+\tlea 0x36a18d40(%rip),%rdi # 36b46488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a50>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a18ca1(%rip) # 36b463f8 ::get_beta()::val@@Base+0xe0>\n+\tmov %rax,0x36a19ca1(%rip) # 36b473f8 ::get_beta()::val@@Base+0xe0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a138b6(%rip),%rsi # 36b41020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e8>\n+\tlea 0x36a148b6(%rip),%rsi # 36b42020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e8>\n \tlea 0x1c2970(%rip),%rcx # 2f00e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15e71>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13890(%rip),%rsi # 36b41028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f0>\n+\tlea 0x36a14890(%rip),%rsi # 36b42028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f0>\n \tlea 0x1c29c5(%rip),%rcx # 2f0164 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15ef4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a138ba(%rip),%rsi # 36b41080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x648>\n+\tlea 0x36a148ba(%rip),%rsi # 36b42080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x648>\n \tlea 0x1c2a1a(%rip),%rcx # 2f01e7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15f77>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13894(%rip),%rsi # 36b41088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x650>\n+\tlea 0x36a14894(%rip),%rsi # 36b42088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x650>\n \tlea 0x1b0b21(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1380e(%rip),%rsi # 36b41030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f8>\n+\tlea 0x36a1480e(%rip),%rsi # 36b42030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f8>\n \tlea 0x1c2a0c(%rip),%rcx # 2f0235 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15fc5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a137e8(%rip),%rsi # 36b41038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x600>\n+\tlea 0x36a147e8(%rip),%rsi # 36b42038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x600>\n \tlea 0x1c2a61(%rip),%rcx # 2f02b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16048>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13812(%rip),%rsi # 36b41090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x658>\n+\tlea 0x36a14812(%rip),%rsi # 36b42090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x658>\n \tlea 0x1c2ab6(%rip),%rcx # 2f033b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x160cb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a137ec(%rip),%rsi # 36b41098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x660>\n+\tlea 0x36a147ec(%rip),%rsi # 36b42098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x660>\n \tlea 0x1b15d8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13766(%rip),%rsi # 36b41040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x608>\n+\tlea 0x36a14766(%rip),%rsi # 36b42040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x608>\n \tlea 0x1c2aa8(%rip),%rcx # 2f0389 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16119>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13740(%rip),%rsi # 36b41048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x610>\n+\tlea 0x36a14740(%rip),%rsi # 36b42048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x610>\n \tlea 0x1c2afd(%rip),%rcx # 2f040c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1619c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1376a(%rip),%rsi # 36b410a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x668>\n+\tlea 0x36a1476a(%rip),%rsi # 36b420a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x668>\n \tlea 0x1c2b52(%rip),%rcx # 2f048f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1621f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13744(%rip),%rsi # 36b410a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x670>\n+\tlea 0x36a14744(%rip),%rsi # 36b420a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x670>\n \tlea 0x1b16a9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a136be(%rip),%rsi # 36b41050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x618>\n+\tlea 0x36a146be(%rip),%rsi # 36b42050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x618>\n \tlea 0x1c2b44(%rip),%rcx # 2f04dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1626d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13698(%rip),%rsi # 36b41058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x620>\n+\tlea 0x36a14698(%rip),%rsi # 36b42058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x620>\n \tlea 0x1c2b9b(%rip),%rcx # 2f0562 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x162f2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a136c2(%rip),%rsi # 36b410b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x678>\n+\tlea 0x36a146c2(%rip),%rsi # 36b420b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x678>\n \tlea 0x1c2bf2(%rip),%rcx # 2f05e7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16377>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1369c(%rip),%rsi # 36b410b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x680>\n+\tlea 0x36a1469c(%rip),%rsi # 36b420b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x680>\n \tlea 0x1b177d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13616(%rip),%rsi # 36b41060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x628>\n+\tlea 0x36a14616(%rip),%rsi # 36b42060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x628>\n \tlea 0x1c2be5(%rip),%rcx # 2f0636 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x163c6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a135f0(%rip),%rsi # 36b41068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x630>\n+\tlea 0x36a145f0(%rip),%rsi # 36b42068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x630>\n \tlea 0x1c2c3c(%rip),%rcx # 2f06bb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1644b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1361a(%rip),%rsi # 36b410c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x688>\n+\tlea 0x36a1461a(%rip),%rsi # 36b420c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x688>\n \tlea 0x1c2c93(%rip),%rcx # 2f0740 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x164d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a135f4(%rip),%rsi # 36b410c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x690>\n+\tlea 0x36a145f4(%rip),%rsi # 36b420c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x690>\n \tlea 0x1b0952(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1356e(%rip),%rsi # 36b41070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x638>\n+\tlea 0x36a1456e(%rip),%rsi # 36b42070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x638>\n \tlea 0x1c2c86(%rip),%rcx # 2f078f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1651f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13548(%rip),%rsi # 36b41078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x640>\n+\tlea 0x36a14548(%rip),%rsi # 36b42078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x640>\n \tlea 0x1c2cdd(%rip),%rcx # 2f0814 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x165a4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a13572(%rip),%rsi # 36b410d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x698>\n+\tlea 0x36a14572(%rip),%rsi # 36b420d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x698>\n \tlea 0x1c2d34(%rip),%rcx # 2f0899 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16629>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a1354c(%rip),%rsi # 36b410d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a0>\n+\tlea 0x36a1454c(%rip),%rsi # 36b420d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a0>\n \tlea 0x1b188e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 12dbc0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a18831(%rip),%rdi # 36b463f8 ::get_beta()::val@@Base+0xe0>\n+\tmov 0x36a19831(%rip),%rdi # 36b473f8 ::get_beta()::val@@Base+0xe0>\n \ttest %rdi,%rdi\n \tje 12dbe1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ee1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a1881b(%rip) # 36b463f8 ::get_beta()::val@@Base+0xe0>\n+\tmovq $0x0,0x36a1981b(%rip) # 36b473f8 ::get_beta()::val@@Base+0xe0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000012dbf0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -230773,16 +230773,16 @@\n \tmov $0x2520,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a133ef(%rip),%rax # 36b41028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f0>\n-\tlea 0x36a133e0(%rip),%rdx # 36b41020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e8>\n+\tlea 0x36a143ef(%rip),%rax # 36b42028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f0>\n+\tlea 0x36a143e0(%rip),%rdx # 36b42020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5e8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -231642,15 +231642,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a127eb(%rip),%rdi # 36b41080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x648>\n+\tlea 0x36a137eb(%rip),%rdi # 36b42080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x648>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 12e9da (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -231698,15 +231698,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a126cd(%rip),%rdi # 36b41088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x650>\n+\tlea 0x36a136cd(%rip),%rdi # 36b42088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x650>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -231964,16 +231964,16 @@\n \tmov $0x2d20,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a1222f(%rip),%rax # 36b41038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x600>\n-\tlea 0x36a12220(%rip),%rdx # 36b41030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f8>\n+\tlea 0x36a1322f(%rip),%rax # 36b42038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x600>\n+\tlea 0x36a13220(%rip),%rdx # 36b42030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x5f8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -232833,15 +232833,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1162b(%rip),%rdi # 36b41090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x658>\n+\tlea 0x36a1262b(%rip),%rdi # 36b42090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x658>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 12fbaa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -232889,15 +232889,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1150d(%rip),%rdi # 36b41098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x660>\n+\tlea 0x36a1250d(%rip),%rdi # 36b42098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x660>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -233155,16 +233155,16 @@\n \tmov $0x3520,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a1106f(%rip),%rax # 36b41048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x610>\n-\tlea 0x36a11060(%rip),%rdx # 36b41040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x608>\n+\tlea 0x36a1206f(%rip),%rax # 36b42048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x610>\n+\tlea 0x36a12060(%rip),%rdx # 36b42040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x608>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -234024,15 +234024,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1046b(%rip),%rdi # 36b410a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x668>\n+\tlea 0x36a1146b(%rip),%rdi # 36b420a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x668>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 130d7a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -234080,15 +234080,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a1034d(%rip),%rdi # 36b410a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x670>\n+\tlea 0x36a1134d(%rip),%rdi # 36b420a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x670>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -234346,16 +234346,16 @@\n \tmov $0x3d20,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a0feaf(%rip),%rax # 36b41058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x620>\n-\tlea 0x36a0fea0(%rip),%rdx # 36b41050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x618>\n+\tlea 0x36a10eaf(%rip),%rax # 36b42058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x620>\n+\tlea 0x36a10ea0(%rip),%rdx # 36b42050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x618>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -235215,15 +235215,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0f2ab(%rip),%rdi # 36b410b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x678>\n+\tlea 0x36a102ab(%rip),%rdi # 36b420b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x678>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 131f4a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -235271,15 +235271,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0f18d(%rip),%rdi # 36b410b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x680>\n+\tlea 0x36a1018d(%rip),%rdi # 36b420b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x680>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -235537,16 +235537,16 @@\n \tmov $0x4520,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a0ecef(%rip),%rax # 36b41068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x630>\n-\tlea 0x36a0ece0(%rip),%rdx # 36b41060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x628>\n+\tlea 0x36a0fcef(%rip),%rax # 36b42068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x630>\n+\tlea 0x36a0fce0(%rip),%rdx # 36b42060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x628>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -236406,15 +236406,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0e0eb(%rip),%rdi # 36b410c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x688>\n+\tlea 0x36a0f0eb(%rip),%rdi # 36b420c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x688>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 13311a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -236462,15 +236462,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0dfcd(%rip),%rdi # 36b410c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x690>\n+\tlea 0x36a0efcd(%rip),%rdi # 36b420c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x690>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -236728,16 +236728,16 @@\n \tmov $0x42a0,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 2, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a0db2f(%rip),%rax # 36b41078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x640>\n-\tlea 0x36a0db20(%rip),%rdx # 36b41070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x638>\n+\tlea 0x36a0eb2f(%rip),%rax # 36b42078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x640>\n+\tlea 0x36a0eb20(%rip),%rdx # 36b42070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x638>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -237597,15 +237597,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0cf2b(%rip),%rdi # 36b410d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x698>\n+\tlea 0x36a0df2b(%rip),%rdi # 36b420d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x698>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1342ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -237653,15 +237653,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0ce0d(%rip),%rdi # 36b410d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a0>\n+\tlea 0x36a0de0d(%rip),%rdi # 36b420d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -237986,15 +237986,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0c76b(%rip),%rdi # 36b410e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a8>\n+\tlea 0x36a0d76b(%rip),%rdi # 36b420e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238090,15 +238090,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0c4a3(%rip),%rdi # 36b410e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b0>\n+\tlea 0x36a0d4a3(%rip),%rdi # 36b420e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238194,15 +238194,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0c1db(%rip),%rdi # 36b410f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b8>\n+\tlea 0x36a0d1db(%rip),%rdi # 36b420f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238298,15 +238298,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0bf13(%rip),%rdi # 36b410f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c0>\n+\tlea 0x36a0cf13(%rip),%rdi # 36b420f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238402,15 +238402,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0bc4b(%rip),%rdi # 36b41100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c8>\n+\tlea 0x36a0cc4b(%rip),%rdi # 36b42100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238506,15 +238506,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0b983(%rip),%rdi # 36b41108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d0>\n+\tlea 0x36a0c983(%rip),%rdi # 36b42108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238610,15 +238610,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0b6bb(%rip),%rdi # 36b41110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d8>\n+\tlea 0x36a0c6bb(%rip),%rdi # 36b42110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238714,15 +238714,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0b3f3(%rip),%rdi # 36b41118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e0>\n+\tlea 0x36a0c3f3(%rip),%rdi # 36b42118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238818,15 +238818,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0b12b(%rip),%rdi # 36b41120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e8>\n+\tlea 0x36a0c12b(%rip),%rdi # 36b42120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -238922,15 +238922,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0ae63(%rip),%rdi # 36b41128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f0>\n+\tlea 0x36a0be63(%rip),%rdi # 36b42128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -239026,15 +239026,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0ab9b(%rip),%rdi # 36b41130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f8>\n+\tlea 0x36a0bb9b(%rip),%rdi # 36b42130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -239130,15 +239130,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0a8d3(%rip),%rdi # 36b41138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x700>\n+\tlea 0x36a0b8d3(%rip),%rdi # 36b42138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x700>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -239164,15 +239164,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a0a830(%rip),%rdi # 36b41140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x708>\n+\tlea 0x36a0b830(%rip),%rdi # 36b42140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x708>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -239195,15 +239195,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a0a7a6(%rip),%rdi # 36b41148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x710>\n+\tlea 0x36a0b7a6(%rip),%rdi # 36b42148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x710>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -239229,15 +239229,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a0a710(%rip),%rdi # 36b41150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x718>\n+\tlea 0x36a0b710(%rip),%rdi # 36b42150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x718>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -239260,15 +239260,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a0a686(%rip),%rdi # 36b41158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x720>\n+\tlea 0x36a0b686(%rip),%rdi # 36b42158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x720>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -239294,15 +239294,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a0a5f0(%rip),%rdi # 36b41160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x728>\n+\tlea 0x36a0b5f0(%rip),%rdi # 36b42160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x728>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -239325,15 +239325,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a0a566(%rip),%rdi # 36b41168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x730>\n+\tlea 0x36a0b566(%rip),%rdi # 36b42168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x730>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -239359,15 +239359,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a0a4d0(%rip),%rdi # 36b41170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x738>\n+\tlea 0x36a0b4d0(%rip),%rdi # 36b42170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x738>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -239390,15 +239390,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a0a446(%rip),%rdi # 36b41178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x740>\n+\tlea 0x36a0b446(%rip),%rdi # 36b42178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x740>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -239424,15 +239424,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a0a3b0(%rip),%rdi # 36b41180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x748>\n+\tlea 0x36a0b3b0(%rip),%rdi # 36b42180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x748>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -239455,15 +239455,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a0a326(%rip),%rdi # 36b41188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x750>\n+\tlea 0x36a0b326(%rip),%rdi # 36b42188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x750>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -239489,15 +239489,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a0a290(%rip),%rdi # 36b41190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x758>\n+\tlea 0x36a0b290(%rip),%rdi # 36b42190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x758>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -239520,284 +239520,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a0a206(%rip),%rdi # 36b41198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x760>\n+\tlea 0x36a0b206(%rip),%rdi # 36b42198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x760>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a0f444(%rip),%rbx # 36b46400 ::get_beta()::val@@Base+0xe8>\n+\tmov 0x36a10444(%rip),%rbx # 36b47400 ::get_beta()::val@@Base+0xe8>\n \ttest %rbx,%rbx\n \tjne 136fd7 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a57>\n-\tlea 0x36a0e4d8(%rip),%rdi # 36b454a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a68>\n+\tlea 0x36a0f4d8(%rip),%rdi # 36b464a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a68>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a0f429(%rip) # 36b46400 ::get_beta()::val@@Base+0xe8>\n+\tmov %rax,0x36a10429(%rip) # 36b47400 ::get_beta()::val@@Base+0xe8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a0f6(%rip),%rsi # 36b410e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a8>\n+\tlea 0x36a0b0f6(%rip),%rsi # 36b420e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a8>\n \tlea 0x1b98f7(%rip),%rcx # 2f08e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16678>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a0d0(%rip),%rsi # 36b410e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b0>\n+\tlea 0x36a0b0d0(%rip),%rsi # 36b420e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b0>\n \tlea 0x1b994d(%rip),%rcx # 2f096c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166fc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a0fa(%rip),%rsi # 36b41140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x708>\n+\tlea 0x36a0b0fa(%rip),%rsi # 36b42140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x708>\n \tlea 0x1a7592(%rip),%rcx # 2de5df (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x436f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a0d4(%rip),%rsi # 36b41148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x710>\n+\tlea 0x36a0b0d4(%rip),%rsi # 36b42148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x710>\n \tlea 0x1a72a1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a04e(%rip),%rsi # 36b410f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b8>\n+\tlea 0x36a0b04e(%rip),%rsi # 36b420f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b8>\n \tlea 0x1b9947(%rip),%rcx # 2f09f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16780>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a028(%rip),%rsi # 36b410f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c0>\n+\tlea 0x36a0b028(%rip),%rsi # 36b420f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c0>\n \tlea 0x1b999d(%rip),%rcx # 2f0a74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16804>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a052(%rip),%rsi # 36b41150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x718>\n+\tlea 0x36a0b052(%rip),%rsi # 36b42150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x718>\n \tlea 0x1a8549(%rip),%rcx # 2df64e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x53de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0a02c(%rip),%rsi # 36b41158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x720>\n+\tlea 0x36a0b02c(%rip),%rsi # 36b42158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x720>\n \tlea 0x1a7d58(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09fa6(%rip),%rsi # 36b41100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c8>\n+\tlea 0x36a0afa6(%rip),%rsi # 36b42100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c8>\n \tlea 0x1b9997(%rip),%rcx # 2f0af8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16888>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09f80(%rip),%rsi # 36b41108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d0>\n+\tlea 0x36a0af80(%rip),%rsi # 36b42108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d0>\n \tlea 0x1b99ed(%rip),%rcx # 2f0b7c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1690c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09faa(%rip),%rsi # 36b41160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x728>\n+\tlea 0x36a0afaa(%rip),%rsi # 36b42160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x728>\n \tlea 0x1a85d2(%rip),%rcx # 2df78f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x551f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09f84(%rip),%rsi # 36b41168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x730>\n+\tlea 0x36a0af84(%rip),%rsi # 36b42168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x730>\n \tlea 0x1a7e29(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09efe(%rip),%rsi # 36b41110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d8>\n+\tlea 0x36a0aefe(%rip),%rsi # 36b42110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d8>\n \tlea 0x1b99e7(%rip),%rcx # 2f0c00 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16990>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09ed8(%rip),%rsi # 36b41118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e0>\n+\tlea 0x36a0aed8(%rip),%rsi # 36b42118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e0>\n \tlea 0x1b9a3f(%rip),%rcx # 2f0c86 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16a16>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09f02(%rip),%rsi # 36b41170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x738>\n+\tlea 0x36a0af02(%rip),%rsi # 36b42170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x738>\n \tlea 0x1a865d(%rip),%rcx # 2df8d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x5662>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09edc(%rip),%rsi # 36b41178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x740>\n+\tlea 0x36a0aedc(%rip),%rsi # 36b42178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x740>\n \tlea 0x1a7efd(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09e56(%rip),%rsi # 36b41120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e8>\n+\tlea 0x36a0ae56(%rip),%rsi # 36b42120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e8>\n \tlea 0x1b9a3b(%rip),%rcx # 2f0d0c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16a9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09e30(%rip),%rsi # 36b41128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f0>\n+\tlea 0x36a0ae30(%rip),%rsi # 36b42128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f0>\n \tlea 0x1b9a93(%rip),%rcx # 2f0d92 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16b22>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09e5a(%rip),%rsi # 36b41180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x748>\n+\tlea 0x36a0ae5a(%rip),%rsi # 36b42180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x748>\n \tlea 0x1a737a(%rip),%rcx # 2de6a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4437>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09e34(%rip),%rsi # 36b41188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x750>\n+\tlea 0x36a0ae34(%rip),%rsi # 36b42188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x750>\n \tlea 0x1a70d2(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09dae(%rip),%rsi # 36b41130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f8>\n+\tlea 0x36a0adae(%rip),%rsi # 36b42130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f8>\n \tlea 0x1b9a8f(%rip),%rcx # 2f0e18 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16ba8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09d88(%rip),%rsi # 36b41138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x700>\n+\tlea 0x36a0ad88(%rip),%rsi # 36b42138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x700>\n \tlea 0x1b9ae7(%rip),%rcx # 2f0e9e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16c2e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09db2(%rip),%rsi # 36b41190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x758>\n+\tlea 0x36a0adb2(%rip),%rsi # 36b42190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x758>\n \tlea 0x1a9225(%rip),%rcx # 2e060a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x639a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a09d8c(%rip),%rsi # 36b41198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x760>\n+\tlea 0x36a0ad8c(%rip),%rsi # 36b42198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x760>\n \tlea 0x1a800e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 137440 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a0efb9(%rip),%rdi # 36b46400 ::get_beta()::val@@Base+0xe8>\n+\tmov 0x36a0ffb9(%rip),%rdi # 36b47400 ::get_beta()::val@@Base+0xe8>\n \ttest %rdi,%rdi\n \tje 137461 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ee1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a0efa3(%rip) # 36b46400 ::get_beta()::val@@Base+0xe8>\n+\tmovq $0x0,0x36a0ffa3(%rip) # 36b47400 ::get_beta()::val@@Base+0xe8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000137470 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -239823,16 +239823,16 @@\n \tmov $0x3600,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a09c2f(%rip),%rax # 36b410e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b0>\n-\tlea 0x36a09c20(%rip),%rdx # 36b410e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a8>\n+\tlea 0x36a0ac2f(%rip),%rax # 36b420e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b0>\n+\tlea 0x36a0ac20(%rip),%rdx # 36b420e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6a8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -239873,16 +239873,16 @@\n \tmov $0x3e00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a09bbf(%rip),%rax # 36b410f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c0>\n-\tlea 0x36a09bb0(%rip),%rdx # 36b410f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b8>\n+\tlea 0x36a0abbf(%rip),%rax # 36b420f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c0>\n+\tlea 0x36a0abb0(%rip),%rdx # 36b420f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6b8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -239923,16 +239923,16 @@\n \tmov $0x4600,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a09b4f(%rip),%rax # 36b41108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d0>\n-\tlea 0x36a09b40(%rip),%rdx # 36b41100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c8>\n+\tlea 0x36a0ab4f(%rip),%rax # 36b42108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d0>\n+\tlea 0x36a0ab40(%rip),%rdx # 36b42100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6c8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -239973,16 +239973,16 @@\n \tmov $0x4e00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a09adf(%rip),%rax # 36b41118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e0>\n-\tlea 0x36a09ad0(%rip),%rdx # 36b41110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d8>\n+\tlea 0x36a0aadf(%rip),%rax # 36b42118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e0>\n+\tlea 0x36a0aad0(%rip),%rdx # 36b42110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6d8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -240023,16 +240023,16 @@\n \tmov $0x5600,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a09a6f(%rip),%rax # 36b41128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f0>\n-\tlea 0x36a09a60(%rip),%rdx # 36b41120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e8>\n+\tlea 0x36a0aa6f(%rip),%rax # 36b42128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f0>\n+\tlea 0x36a0aa60(%rip),%rdx # 36b42120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6e8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -240073,16 +240073,16 @@\n \tmov $0x4c00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 32, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a099ff(%rip),%rax # 36b41138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x700>\n-\tlea 0x36a099f0(%rip),%rdx # 36b41130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f8>\n+\tlea 0x36a0a9ff(%rip),%rax # 36b42138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x700>\n+\tlea 0x36a0a9f0(%rip),%rdx # 36b42130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x6f8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -240190,15 +240190,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0978b(%rip),%rdi # 36b411a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x768>\n+\tlea 0x36a0a78b(%rip),%rdi # 36b421a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x768>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240294,15 +240294,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a094c3(%rip),%rdi # 36b411a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x770>\n+\tlea 0x36a0a4c3(%rip),%rdi # 36b421a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x770>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240398,15 +240398,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a091fb(%rip),%rdi # 36b411b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x778>\n+\tlea 0x36a0a1fb(%rip),%rdi # 36b421b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x778>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240502,15 +240502,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a08f33(%rip),%rdi # 36b411b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x780>\n+\tlea 0x36a09f33(%rip),%rdi # 36b421b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x780>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240606,15 +240606,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a08c6b(%rip),%rdi # 36b411c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x788>\n+\tlea 0x36a09c6b(%rip),%rdi # 36b421c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x788>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240710,15 +240710,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a089a3(%rip),%rdi # 36b411c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x790>\n+\tlea 0x36a099a3(%rip),%rdi # 36b421c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x790>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240814,15 +240814,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a086db(%rip),%rdi # 36b411d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x798>\n+\tlea 0x36a096db(%rip),%rdi # 36b421d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x798>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -240918,15 +240918,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a08413(%rip),%rdi # 36b411d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a0>\n+\tlea 0x36a09413(%rip),%rdi # 36b421d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -241022,15 +241022,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0814b(%rip),%rdi # 36b411e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a8>\n+\tlea 0x36a0914b(%rip),%rdi # 36b421e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -241126,15 +241126,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a07e83(%rip),%rdi # 36b411e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b0>\n+\tlea 0x36a08e83(%rip),%rdi # 36b421e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -241230,15 +241230,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a07bbb(%rip),%rdi # 36b411f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b8>\n+\tlea 0x36a08bbb(%rip),%rdi # 36b421f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -241334,15 +241334,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a078f3(%rip),%rdi # 36b411f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c0>\n+\tlea 0x36a088f3(%rip),%rdi # 36b421f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -241368,15 +241368,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a07850(%rip),%rdi # 36b41200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c8>\n+\tlea 0x36a08850(%rip),%rdi # 36b42200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -241399,15 +241399,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a077c6(%rip),%rdi # 36b41208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d0>\n+\tlea 0x36a087c6(%rip),%rdi # 36b42208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -241433,15 +241433,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a07730(%rip),%rdi # 36b41210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d8>\n+\tlea 0x36a08730(%rip),%rdi # 36b42210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -241464,15 +241464,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a076a6(%rip),%rdi # 36b41218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e0>\n+\tlea 0x36a086a6(%rip),%rdi # 36b42218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -241498,15 +241498,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a07610(%rip),%rdi # 36b41220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e8>\n+\tlea 0x36a08610(%rip),%rdi # 36b42220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -241529,15 +241529,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a07586(%rip),%rdi # 36b41228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f0>\n+\tlea 0x36a08586(%rip),%rdi # 36b42228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -241563,15 +241563,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a074f0(%rip),%rdi # 36b41230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f8>\n+\tlea 0x36a084f0(%rip),%rdi # 36b42230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -241594,15 +241594,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a07466(%rip),%rdi # 36b41238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x800>\n+\tlea 0x36a08466(%rip),%rdi # 36b42238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x800>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -241628,15 +241628,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a073d0(%rip),%rdi # 36b41240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x808>\n+\tlea 0x36a083d0(%rip),%rdi # 36b42240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x808>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -241659,15 +241659,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a07346(%rip),%rdi # 36b41248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x810>\n+\tlea 0x36a08346(%rip),%rdi # 36b42248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x810>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -241693,15 +241693,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36a072b0(%rip),%rdi # 36b41250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x818>\n+\tlea 0x36a082b0(%rip),%rdi # 36b42250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x818>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -241724,284 +241724,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36a07226(%rip),%rdi # 36b41258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x820>\n+\tlea 0x36a08226(%rip),%rdi # 36b42258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x820>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a0c3ac(%rip),%rbx # 36b46408 ::get_beta()::val@@Base+0xf0>\n+\tmov 0x36a0d3ac(%rip),%rbx # 36b47408 ::get_beta()::val@@Base+0xf0>\n \ttest %rbx,%rbx\n \tjne 13a077 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2987>\n-\tlea 0x36a0b450(%rip),%rdi # 36b454b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a80>\n+\tlea 0x36a0c450(%rip),%rdi # 36b464b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a80>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a0c391(%rip) # 36b46408 ::get_beta()::val@@Base+0xf0>\n+\tmov %rax,0x36a0d391(%rip) # 36b47408 ::get_beta()::val@@Base+0xf0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a07116(%rip),%rsi # 36b411a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x768>\n+\tlea 0x36a08116(%rip),%rsi # 36b421a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x768>\n \tlea 0x1b6e93(%rip),%rcx # 2f0f24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16cb4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a070f0(%rip),%rsi # 36b411a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x770>\n+\tlea 0x36a080f0(%rip),%rsi # 36b421a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x770>\n \tlea 0x1b6ee9(%rip),%rcx # 2f0fa8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16d38>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0711a(%rip),%rsi # 36b41200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c8>\n+\tlea 0x36a0811a(%rip),%rsi # 36b42200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c8>\n \tlea 0x1b6f3f(%rip),%rcx # 2f102c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16dbc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a070f4(%rip),%rsi # 36b41208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d0>\n+\tlea 0x36a080f4(%rip),%rsi # 36b42208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d0>\n \tlea 0x1a4201(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0706e(%rip),%rsi # 36b411b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x778>\n+\tlea 0x36a0806e(%rip),%rsi # 36b421b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x778>\n \tlea 0x1b6f32(%rip),%rcx # 2f107b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16e0b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a07048(%rip),%rsi # 36b411b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x780>\n+\tlea 0x36a08048(%rip),%rsi # 36b421b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x780>\n \tlea 0x1b6f88(%rip),%rcx # 2f10ff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16e8f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a07072(%rip),%rsi # 36b41210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d8>\n+\tlea 0x36a08072(%rip),%rsi # 36b42210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d8>\n \tlea 0x1b6fde(%rip),%rcx # 2f1183 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16f13>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a0704c(%rip),%rsi # 36b41218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e0>\n+\tlea 0x36a0804c(%rip),%rsi # 36b42218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e0>\n \tlea 0x1a4cb8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06fc6(%rip),%rsi # 36b411c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x788>\n+\tlea 0x36a07fc6(%rip),%rsi # 36b421c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x788>\n \tlea 0x1b6fd1(%rip),%rcx # 2f11d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16f62>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06fa0(%rip),%rsi # 36b411c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x790>\n+\tlea 0x36a07fa0(%rip),%rsi # 36b421c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x790>\n \tlea 0x1b7027(%rip),%rcx # 2f1256 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16fe6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06fca(%rip),%rsi # 36b41220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e8>\n+\tlea 0x36a07fca(%rip),%rsi # 36b42220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e8>\n \tlea 0x1b707d(%rip),%rcx # 2f12da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1706a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06fa4(%rip),%rsi # 36b41228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f0>\n+\tlea 0x36a07fa4(%rip),%rsi # 36b42228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f0>\n \tlea 0x1a4d89(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06f1e(%rip),%rsi # 36b411d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x798>\n+\tlea 0x36a07f1e(%rip),%rsi # 36b421d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x798>\n \tlea 0x1b7070(%rip),%rcx # 2f1329 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x170b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06ef8(%rip),%rsi # 36b411d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a0>\n+\tlea 0x36a07ef8(%rip),%rsi # 36b421d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a0>\n \tlea 0x1b70c8(%rip),%rcx # 2f13af (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1713f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06f22(%rip),%rsi # 36b41230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f8>\n+\tlea 0x36a07f22(%rip),%rsi # 36b42230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f8>\n \tlea 0x1b7120(%rip),%rcx # 2f1435 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x171c5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06efc(%rip),%rsi # 36b41238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x800>\n+\tlea 0x36a07efc(%rip),%rsi # 36b42238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x800>\n \tlea 0x1a4e5d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06e76(%rip),%rsi # 36b411e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a8>\n+\tlea 0x36a07e76(%rip),%rsi # 36b421e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a8>\n \tlea 0x1b7114(%rip),%rcx # 2f1485 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17215>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06e50(%rip),%rsi # 36b411e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b0>\n+\tlea 0x36a07e50(%rip),%rsi # 36b421e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b0>\n \tlea 0x1b716c(%rip),%rcx # 2f150b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1729b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06e7a(%rip),%rsi # 36b41240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x808>\n+\tlea 0x36a07e7a(%rip),%rsi # 36b42240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x808>\n \tlea 0x1b71c4(%rip),%rcx # 2f1591 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17321>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06e54(%rip),%rsi # 36b41248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x810>\n+\tlea 0x36a07e54(%rip),%rsi # 36b42248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x810>\n \tlea 0x1a4032(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06dce(%rip),%rsi # 36b411f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b8>\n+\tlea 0x36a07dce(%rip),%rsi # 36b421f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b8>\n \tlea 0x1b71b8(%rip),%rcx # 2f15e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17371>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06da8(%rip),%rsi # 36b411f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c0>\n+\tlea 0x36a07da8(%rip),%rsi # 36b421f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c0>\n \tlea 0x1b7210(%rip),%rcx # 2f1667 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x173f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06dd2(%rip),%rsi # 36b41250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x818>\n+\tlea 0x36a07dd2(%rip),%rsi # 36b42250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x818>\n \tlea 0x1b7268(%rip),%rcx # 2f16ed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1747d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36a06dac(%rip),%rsi # 36b41258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x820>\n+\tlea 0x36a07dac(%rip),%rsi # 36b42258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x820>\n \tlea 0x1a4f6e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 13a4e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2df0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a0bf21(%rip),%rdi # 36b46408 ::get_beta()::val@@Base+0xf0>\n+\tmov 0x36a0cf21(%rip),%rdi # 36b47408 ::get_beta()::val@@Base+0xf0>\n \ttest %rdi,%rdi\n \tje 13a501 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e11>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a0bf0b(%rip) # 36b46408 ::get_beta()::val@@Base+0xf0>\n+\tmovq $0x0,0x36a0cf0b(%rip) # 36b47408 ::get_beta()::val@@Base+0xf0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000013a510 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -242027,16 +242027,16 @@\n \tmov $0x3600,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a06c4f(%rip),%rax # 36b411a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x770>\n-\tlea 0x36a06c40(%rip),%rdx # 36b411a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x768>\n+\tlea 0x36a07c4f(%rip),%rax # 36b421a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x770>\n+\tlea 0x36a07c40(%rip),%rdx # 36b421a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x768>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -242895,15 +242895,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0605b(%rip),%rdi # 36b41200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c8>\n+\tlea 0x36a0705b(%rip),%rdi # 36b42200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 13b2ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -242951,15 +242951,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a05f3d(%rip),%rdi # 36b41208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d0>\n+\tlea 0x36a06f3d(%rip),%rdi # 36b42208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -243217,16 +243217,16 @@\n \tmov $0x3e00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a05a9f(%rip),%rax # 36b411b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x780>\n-\tlea 0x36a05a90(%rip),%rdx # 36b411b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x778>\n+\tlea 0x36a06a9f(%rip),%rax # 36b421b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x780>\n+\tlea 0x36a06a90(%rip),%rdx # 36b421b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x778>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -244085,15 +244085,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a04eab(%rip),%rdi # 36b41210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d8>\n+\tlea 0x36a05eab(%rip),%rdi # 36b42210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7d8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 13c4aa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -244141,15 +244141,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a04d8d(%rip),%rdi # 36b41218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e0>\n+\tlea 0x36a05d8d(%rip),%rdi # 36b42218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -244407,16 +244407,16 @@\n \tmov $0x4600,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a048ef(%rip),%rax # 36b411c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x790>\n-\tlea 0x36a048e0(%rip),%rdx # 36b411c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x788>\n+\tlea 0x36a058ef(%rip),%rax # 36b421c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x790>\n+\tlea 0x36a058e0(%rip),%rdx # 36b421c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x788>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -245275,15 +245275,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a03cfb(%rip),%rdi # 36b41220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e8>\n+\tlea 0x36a04cfb(%rip),%rdi # 36b42220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7e8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 13d66a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -245331,15 +245331,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a03bdd(%rip),%rdi # 36b41228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f0>\n+\tlea 0x36a04bdd(%rip),%rdi # 36b42228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -245597,16 +245597,16 @@\n \tmov $0x4e00,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a0373f(%rip),%rax # 36b411d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a0>\n-\tlea 0x36a03730(%rip),%rdx # 36b411d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x798>\n+\tlea 0x36a0473f(%rip),%rax # 36b421d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a0>\n+\tlea 0x36a04730(%rip),%rdx # 36b421d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x798>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -246465,15 +246465,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a02b4b(%rip),%rdi # 36b41230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f8>\n+\tlea 0x36a03b4b(%rip),%rdi # 36b42230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7f8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 13e82a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -246521,15 +246521,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a02a2d(%rip),%rdi # 36b41238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x800>\n+\tlea 0x36a03a2d(%rip),%rdi # 36b42238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x800>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -246787,16 +246787,16 @@\n \tmov $0x5600,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a0258f(%rip),%rax # 36b411e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b0>\n-\tlea 0x36a02580(%rip),%rdx # 36b411e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a8>\n+\tlea 0x36a0358f(%rip),%rax # 36b421e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b0>\n+\tlea 0x36a03580(%rip),%rdx # 36b421e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7a8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -247655,15 +247655,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0199b(%rip),%rdi # 36b41240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x808>\n+\tlea 0x36a0299b(%rip),%rdi # 36b42240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x808>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 13f9ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -247711,15 +247711,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a0187d(%rip),%rdi # 36b41248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x810>\n+\tlea 0x36a0287d(%rip),%rdi # 36b42248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x810>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -247977,16 +247977,16 @@\n \tmov $0x8400,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 32, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x36a013df(%rip),%rax # 36b411f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c0>\n-\tlea 0x36a013d0(%rip),%rdx # 36b411f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b8>\n+\tlea 0x36a023df(%rip),%rax # 36b421f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7c0>\n+\tlea 0x36a023d0(%rip),%rdx # 36b421f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x7b8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -248845,15 +248845,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a007eb(%rip),%rdi # 36b41250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x818>\n+\tlea 0x36a017eb(%rip),%rdi # 36b42250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x818>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 140baa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -248901,15 +248901,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36a006cd(%rip),%rdi # 36b41258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x820>\n+\tlea 0x36a016cd(%rip),%rdi # 36b42258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x820>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -249234,15 +249234,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36a0002b(%rip),%rdi # 36b41260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x828>\n+\tlea 0x36a0102b(%rip),%rdi # 36b42260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x828>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -249338,15 +249338,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ffd63(%rip),%rdi # 36b41268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x830>\n+\tlea 0x36a00d63(%rip),%rdi # 36b42268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x830>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -249372,15 +249372,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ffcc0(%rip),%rdi # 36b41270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x838>\n+\tlea 0x36a00cc0(%rip),%rdi # 36b42270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x838>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -249403,83 +249403,83 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ffc36(%rip),%rdi # 36b41278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x840>\n+\tlea 0x36a00c36(%rip),%rdi # 36b42278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x840>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a04da4(%rip),%rbx # 36b46410 ::get_beta()::val@@Base+0xf8>\n+\tmov 0x36a05da4(%rip),%rbx # 36b47410 ::get_beta()::val@@Base+0xf8>\n \ttest %rbx,%rbx\n \tjne 141687 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x1837>\n-\tlea 0x36a03e58(%rip),%rdi # 36b454d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a98>\n+\tlea 0x36a04e58(%rip),%rdi # 36b464d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4a98>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a04d89(%rip) # 36b46410 ::get_beta()::val@@Base+0xf8>\n+\tmov %rax,0x36a05d89(%rip) # 36b47410 ::get_beta()::val@@Base+0xf8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ffbc6(%rip),%rsi # 36b41260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x828>\n+\tlea 0x36a00bc6(%rip),%rsi # 36b42260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x828>\n \tlea 0x1b009c(%rip),%rcx # 2f173d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x174cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ffba0(%rip),%rsi # 36b41268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x830>\n+\tlea 0x36a00ba0(%rip),%rsi # 36b42268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x830>\n \tlea 0x1b00f4(%rip),%rcx # 2f17c3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17553>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ffb7a(%rip),%rsi # 36b41270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x838>\n+\tlea 0x36a00b7a(%rip),%rsi # 36b42270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x838>\n \tlea 0x1b014c(%rip),%rcx # 2f1849 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x175d9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ffb54(%rip),%rsi # 36b41278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x840>\n+\tlea 0x36a00b54(%rip),%rsi # 36b42278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x840>\n \tlea 0x1ac195(%rip),%rcx # 2ed8c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13650>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xa(%rip),%rdi # 141750 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x1900>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n __hip_module_dtor():\n-\tmov 0x36a04cb9(%rip),%rdi # 36b46410 ::get_beta()::val@@Base+0xf8>\n+\tmov 0x36a05cb9(%rip),%rdi # 36b47410 ::get_beta()::val@@Base+0xf8>\n \ttest %rdi,%rdi\n \tje 141771 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x1921>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a04ca3(%rip) # 36b46410 ::get_beta()::val@@Base+0xf8>\n+\tmovq $0x0,0x36a05ca3(%rip) # 36b47410 ::get_beta()::val@@Base+0xf8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000141780 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<576, 512, 4, 16>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -249492,16 +249492,16 @@\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1367\n \tcall 22ce0 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1368\n \tcall 22bc0 \n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369ffac6(%rip),%rax # 36b41268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x830>\n-\tlea 0x369ffab7(%rip),%rdx # 36b41260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x828>\n+\tlea 0x36a00ac6(%rip),%rax # 36b42268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x830>\n+\tlea 0x36a00ab7(%rip),%rdx # 36b42260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x828>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov $0x17740,%r8d\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n@@ -250372,15 +250372,15 @@\n \tlea 0x110(%rsp),%rdx\n \tlea 0xe8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x100(%rsp),%rsi\n \tmov 0x108(%rsp),%edx\n \tmov 0xf0(%rsp),%rcx\n \tmov 0xf8(%rsp),%r8d\n-\tlea 0x369fee5e(%rip),%rdi # 36b41270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x838>\n+\tlea 0x369ffe5e(%rip),%rdi # 36b42270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x838>\n \tlea 0x150(%rsp),%r9\n \tpush 0xe8(%rsp)\n \tpush 0x118(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 142557 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd77>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -250428,15 +250428,15 @@\n \tlea 0xe8(%rsp),%rdx\n \tlea 0xe0(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x100(%rsp),%rsi\n \tmov 0x108(%rsp),%edx\n \tmov 0xf0(%rsp),%rcx\n \tmov 0xf8(%rsp),%r8d\n-\tlea 0x369fed40(%rip),%rdi # 36b41278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x840>\n+\tlea 0x369ffd40(%rip),%rdi # 36b42278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x840>\n \tlea 0x150(%rsp),%r9\n \tpush 0xe0(%rsp)\n \tpush 0xf0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -250754,15 +250754,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fe6cb(%rip),%rdi # 36b41280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x848>\n+\tlea 0x369ff6cb(%rip),%rdi # 36b42280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x848>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -250858,15 +250858,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fe403(%rip),%rdi # 36b41288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x850>\n+\tlea 0x369ff403(%rip),%rdi # 36b42288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x850>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -250962,15 +250962,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fe13b(%rip),%rdi # 36b41290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x858>\n+\tlea 0x369ff13b(%rip),%rdi # 36b42290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x858>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251066,15 +251066,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fde73(%rip),%rdi # 36b41298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x860>\n+\tlea 0x369fee73(%rip),%rdi # 36b42298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x860>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251170,15 +251170,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fdbab(%rip),%rdi # 36b412a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x868>\n+\tlea 0x369febab(%rip),%rdi # 36b422a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x868>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251274,15 +251274,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fd8e3(%rip),%rdi # 36b412a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x870>\n+\tlea 0x369fe8e3(%rip),%rdi # 36b422a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x870>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251378,15 +251378,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fd61b(%rip),%rdi # 36b412b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x878>\n+\tlea 0x369fe61b(%rip),%rdi # 36b422b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x878>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251482,15 +251482,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fd353(%rip),%rdi # 36b412b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x880>\n+\tlea 0x369fe353(%rip),%rdi # 36b422b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x880>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251586,15 +251586,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fd08b(%rip),%rdi # 36b412c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x888>\n+\tlea 0x369fe08b(%rip),%rdi # 36b422c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x888>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251690,15 +251690,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fcdc3(%rip),%rdi # 36b412c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x890>\n+\tlea 0x369fddc3(%rip),%rdi # 36b422c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x890>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251794,15 +251794,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fcafb(%rip),%rdi # 36b412d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x898>\n+\tlea 0x369fdafb(%rip),%rdi # 36b422d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x898>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251898,15 +251898,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369fc833(%rip),%rdi # 36b412d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a0>\n+\tlea 0x369fd833(%rip),%rdi # 36b422d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -251932,15 +251932,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369fc790(%rip),%rdi # 36b412e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a8>\n+\tlea 0x369fd790(%rip),%rdi # 36b422e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -251963,15 +251963,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369fc706(%rip),%rdi # 36b412e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b0>\n+\tlea 0x369fd706(%rip),%rdi # 36b422e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -251997,15 +251997,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369fc670(%rip),%rdi # 36b412f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b8>\n+\tlea 0x369fd670(%rip),%rdi # 36b422f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -252028,15 +252028,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369fc5e6(%rip),%rdi # 36b412f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c0>\n+\tlea 0x369fd5e6(%rip),%rdi # 36b422f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -252062,15 +252062,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369fc550(%rip),%rdi # 36b41300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c8>\n+\tlea 0x369fd550(%rip),%rdi # 36b42300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -252093,15 +252093,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369fc4c6(%rip),%rdi # 36b41308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d0>\n+\tlea 0x369fd4c6(%rip),%rdi # 36b42308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -252127,15 +252127,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369fc430(%rip),%rdi # 36b41310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d8>\n+\tlea 0x369fd430(%rip),%rdi # 36b42310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -252158,15 +252158,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369fc3a6(%rip),%rdi # 36b41318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e0>\n+\tlea 0x369fd3a6(%rip),%rdi # 36b42318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -252192,15 +252192,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369fc310(%rip),%rdi # 36b41320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e8>\n+\tlea 0x369fd310(%rip),%rdi # 36b42320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -252223,15 +252223,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369fc286(%rip),%rdi # 36b41328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f0>\n+\tlea 0x369fd286(%rip),%rdi # 36b42328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -252257,15 +252257,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369fc1f0(%rip),%rdi # 36b41330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f8>\n+\tlea 0x369fd1f0(%rip),%rdi # 36b42330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -252288,284 +252288,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369fc166(%rip),%rdi # 36b41338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x900>\n+\tlea 0x369fd166(%rip),%rdi # 36b42338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x900>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36a0121c(%rip),%rbx # 36b46418 ::get_beta()::val@@Base+0x100>\n+\tmov 0x36a0221c(%rip),%rbx # 36b47418 ::get_beta()::val@@Base+0x100>\n \ttest %rbx,%rbx\n \tjne 145217 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a37>\n-\tlea 0x36a002e0(%rip),%rdi # 36b454e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ab0>\n+\tlea 0x36a012e0(%rip),%rdi # 36b464e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ab0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36a01201(%rip) # 36b46418 ::get_beta()::val@@Base+0x100>\n+\tmov %rax,0x36a02201(%rip) # 36b47418 ::get_beta()::val@@Base+0x100>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fc056(%rip),%rsi # 36b41280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x848>\n+\tlea 0x369fd056(%rip),%rsi # 36b42280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x848>\n \tlea 0x1ac668(%rip),%rcx # 2f1899 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17629>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fc030(%rip),%rsi # 36b41288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x850>\n+\tlea 0x369fd030(%rip),%rsi # 36b42288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x850>\n \tlea 0x1ac6bd(%rip),%rcx # 2f191c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x176ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fc05a(%rip),%rsi # 36b412e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a8>\n+\tlea 0x369fd05a(%rip),%rsi # 36b422e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a8>\n \tlea 0x1ac712(%rip),%rcx # 2f199f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1772f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fc034(%rip),%rsi # 36b412e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b0>\n+\tlea 0x369fd034(%rip),%rsi # 36b422e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b0>\n \tlea 0x199061(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbfae(%rip),%rsi # 36b41290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x858>\n+\tlea 0x369fcfae(%rip),%rsi # 36b42290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x858>\n \tlea 0x1ac704(%rip),%rcx # 2f19ed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1777d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbf88(%rip),%rsi # 36b41298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x860>\n+\tlea 0x369fcf88(%rip),%rsi # 36b42298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x860>\n \tlea 0x1ac759(%rip),%rcx # 2f1a70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17800>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbfb2(%rip),%rsi # 36b412f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b8>\n+\tlea 0x369fcfb2(%rip),%rsi # 36b422f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b8>\n \tlea 0x1ac7ae(%rip),%rcx # 2f1af3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17883>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbf8c(%rip),%rsi # 36b412f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c0>\n+\tlea 0x369fcf8c(%rip),%rsi # 36b422f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c0>\n \tlea 0x199b18(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbf06(%rip),%rsi # 36b412a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x868>\n+\tlea 0x369fcf06(%rip),%rsi # 36b422a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x868>\n \tlea 0x1ac7a0(%rip),%rcx # 2f1b41 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x178d1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbee0(%rip),%rsi # 36b412a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x870>\n+\tlea 0x369fcee0(%rip),%rsi # 36b422a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x870>\n \tlea 0x1ac7f5(%rip),%rcx # 2f1bc4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17954>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbf0a(%rip),%rsi # 36b41300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c8>\n+\tlea 0x369fcf0a(%rip),%rsi # 36b42300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c8>\n \tlea 0x1ac84a(%rip),%rcx # 2f1c47 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x179d7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbee4(%rip),%rsi # 36b41308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d0>\n+\tlea 0x369fcee4(%rip),%rsi # 36b42308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d0>\n \tlea 0x199be9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbe5e(%rip),%rsi # 36b412b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x878>\n+\tlea 0x369fce5e(%rip),%rsi # 36b422b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x878>\n \tlea 0x1ac83c(%rip),%rcx # 2f1c95 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17a25>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbe38(%rip),%rsi # 36b412b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x880>\n+\tlea 0x369fce38(%rip),%rsi # 36b422b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x880>\n \tlea 0x1ac893(%rip),%rcx # 2f1d1a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17aaa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbe62(%rip),%rsi # 36b41310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d8>\n+\tlea 0x369fce62(%rip),%rsi # 36b42310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d8>\n \tlea 0x1ac8ea(%rip),%rcx # 2f1d9f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17b2f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbe3c(%rip),%rsi # 36b41318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e0>\n+\tlea 0x369fce3c(%rip),%rsi # 36b42318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e0>\n \tlea 0x199cbd(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbdb6(%rip),%rsi # 36b412c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x888>\n+\tlea 0x369fcdb6(%rip),%rsi # 36b422c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x888>\n \tlea 0x1ac8dd(%rip),%rcx # 2f1dee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17b7e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbd90(%rip),%rsi # 36b412c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x890>\n+\tlea 0x369fcd90(%rip),%rsi # 36b422c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x890>\n \tlea 0x1ac934(%rip),%rcx # 2f1e73 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17c03>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbdba(%rip),%rsi # 36b41320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e8>\n+\tlea 0x369fcdba(%rip),%rsi # 36b42320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e8>\n \tlea 0x1ac98b(%rip),%rcx # 2f1ef8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17c88>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbd94(%rip),%rsi # 36b41328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f0>\n+\tlea 0x369fcd94(%rip),%rsi # 36b42328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f0>\n \tlea 0x198e92(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbd0e(%rip),%rsi # 36b412d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x898>\n+\tlea 0x369fcd0e(%rip),%rsi # 36b422d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x898>\n \tlea 0x1ac97e(%rip),%rcx # 2f1f47 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17cd7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbce8(%rip),%rsi # 36b412d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a0>\n+\tlea 0x369fcce8(%rip),%rsi # 36b422d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a0>\n \tlea 0x1ac9d5(%rip),%rcx # 2f1fcc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17d5c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbd12(%rip),%rsi # 36b41330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f8>\n+\tlea 0x369fcd12(%rip),%rsi # 36b42330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f8>\n \tlea 0x1aca2c(%rip),%rcx # 2f2051 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17de1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369fbcec(%rip),%rsi # 36b41338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x900>\n+\tlea 0x369fccec(%rip),%rsi # 36b42338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x900>\n \tlea 0x199dce(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 145680 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ea0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x36a00d91(%rip),%rdi # 36b46418 ::get_beta()::val@@Base+0x100>\n+\tmov 0x36a01d91(%rip),%rdi # 36b47418 ::get_beta()::val@@Base+0x100>\n \ttest %rdi,%rdi\n \tje 1456a1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36a00d7b(%rip) # 36b46418 ::get_beta()::val@@Base+0x100>\n+\tmovq $0x0,0x36a01d7b(%rip) # 36b47418 ::get_beta()::val@@Base+0x100>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001456b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -252591,16 +252591,16 @@\n \tmov $0x2640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369fbb8f(%rip),%rax # 36b41288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x850>\n-\tlea 0x369fbb80(%rip),%rdx # 36b41280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x848>\n+\tlea 0x369fcb8f(%rip),%rax # 36b42288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x850>\n+\tlea 0x369fcb80(%rip),%rdx # 36b42280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x848>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -253459,15 +253459,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369faf9b(%rip),%rdi # 36b412e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a8>\n+\tlea 0x369fbf9b(%rip),%rdi # 36b422e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 14648a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -253515,15 +253515,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369fae7d(%rip),%rdi # 36b412e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b0>\n+\tlea 0x369fbe7d(%rip),%rdi # 36b422e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -253781,16 +253781,16 @@\n \tmov $0x2e40,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369fa9df(%rip),%rax # 36b41298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x860>\n-\tlea 0x369fa9d0(%rip),%rdx # 36b41290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x858>\n+\tlea 0x369fb9df(%rip),%rax # 36b42298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x860>\n+\tlea 0x369fb9d0(%rip),%rdx # 36b42290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x858>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -254649,15 +254649,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f9deb(%rip),%rdi # 36b412f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b8>\n+\tlea 0x369fadeb(%rip),%rdi # 36b422f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8b8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 14764a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -254705,15 +254705,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f9ccd(%rip),%rdi # 36b412f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c0>\n+\tlea 0x369faccd(%rip),%rdi # 36b422f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -254971,16 +254971,16 @@\n \tmov $0x3640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f982f(%rip),%rax # 36b412a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x870>\n-\tlea 0x369f9820(%rip),%rdx # 36b412a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x868>\n+\tlea 0x369fa82f(%rip),%rax # 36b422a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x870>\n+\tlea 0x369fa820(%rip),%rdx # 36b422a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x868>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -255839,15 +255839,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f8c3b(%rip),%rdi # 36b41300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c8>\n+\tlea 0x369f9c3b(%rip),%rdi # 36b42300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 14880a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -255895,15 +255895,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f8b1d(%rip),%rdi # 36b41308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d0>\n+\tlea 0x369f9b1d(%rip),%rdi # 36b42308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -256161,16 +256161,16 @@\n \tmov $0x3e40,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f867f(%rip),%rax # 36b412b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x880>\n-\tlea 0x369f8670(%rip),%rdx # 36b412b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x878>\n+\tlea 0x369f967f(%rip),%rax # 36b422b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x880>\n+\tlea 0x369f9670(%rip),%rdx # 36b422b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x878>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -257029,15 +257029,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f7a8b(%rip),%rdi # 36b41310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d8>\n+\tlea 0x369f8a8b(%rip),%rdi # 36b42310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8d8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1499ca (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -257085,15 +257085,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f796d(%rip),%rdi # 36b41318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e0>\n+\tlea 0x369f896d(%rip),%rdi # 36b42318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -257351,16 +257351,16 @@\n \tmov $0x4640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f74cf(%rip),%rax # 36b412c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x890>\n-\tlea 0x369f74c0(%rip),%rdx # 36b412c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x888>\n+\tlea 0x369f84cf(%rip),%rax # 36b422c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x890>\n+\tlea 0x369f84c0(%rip),%rdx # 36b422c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x888>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -258219,15 +258219,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f68db(%rip),%rdi # 36b41320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e8>\n+\tlea 0x369f78db(%rip),%rdi # 36b42320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8e8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 14ab8a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -258275,15 +258275,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f67bd(%rip),%rdi # 36b41328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f0>\n+\tlea 0x369f77bd(%rip),%rdi # 36b42328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -258541,16 +258541,16 @@\n \tmov $0x4340,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 4, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f631f(%rip),%rax # 36b412d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a0>\n-\tlea 0x369f6310(%rip),%rdx # 36b412d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x898>\n+\tlea 0x369f731f(%rip),%rax # 36b422d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8a0>\n+\tlea 0x369f7310(%rip),%rdx # 36b422d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x898>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -259409,15 +259409,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f572b(%rip),%rdi # 36b41330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f8>\n+\tlea 0x369f672b(%rip),%rdi # 36b42330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x8f8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 14bd4a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -259465,15 +259465,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f560d(%rip),%rdi # 36b41338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x900>\n+\tlea 0x369f660d(%rip),%rdi # 36b42338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x900>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -259798,15 +259798,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f4f6b(%rip),%rdi # 36b41340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x908>\n+\tlea 0x369f5f6b(%rip),%rdi # 36b42340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x908>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -259902,15 +259902,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f4ca3(%rip),%rdi # 36b41348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x910>\n+\tlea 0x369f5ca3(%rip),%rdi # 36b42348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x910>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260006,15 +260006,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f49db(%rip),%rdi # 36b41350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x918>\n+\tlea 0x369f59db(%rip),%rdi # 36b42350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x918>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260110,15 +260110,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f4713(%rip),%rdi # 36b41358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x920>\n+\tlea 0x369f5713(%rip),%rdi # 36b42358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x920>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260214,15 +260214,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f444b(%rip),%rdi # 36b41360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x928>\n+\tlea 0x369f544b(%rip),%rdi # 36b42360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x928>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260318,15 +260318,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f4183(%rip),%rdi # 36b41368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x930>\n+\tlea 0x369f5183(%rip),%rdi # 36b42368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x930>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260422,15 +260422,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f3ebb(%rip),%rdi # 36b41370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x938>\n+\tlea 0x369f4ebb(%rip),%rdi # 36b42370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x938>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260526,15 +260526,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f3bf3(%rip),%rdi # 36b41378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x940>\n+\tlea 0x369f4bf3(%rip),%rdi # 36b42378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x940>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260630,15 +260630,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f392b(%rip),%rdi # 36b41380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x948>\n+\tlea 0x369f492b(%rip),%rdi # 36b42380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x948>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260734,15 +260734,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f3663(%rip),%rdi # 36b41388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x950>\n+\tlea 0x369f4663(%rip),%rdi # 36b42388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x950>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260838,15 +260838,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f339b(%rip),%rdi # 36b41390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x958>\n+\tlea 0x369f439b(%rip),%rdi # 36b42390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x958>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260942,15 +260942,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369f30d3(%rip),%rdi # 36b41398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x960>\n+\tlea 0x369f40d3(%rip),%rdi # 36b42398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x960>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -260976,15 +260976,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369f3030(%rip),%rdi # 36b413a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x968>\n+\tlea 0x369f4030(%rip),%rdi # 36b423a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x968>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -261007,15 +261007,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369f2fa6(%rip),%rdi # 36b413a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x970>\n+\tlea 0x369f3fa6(%rip),%rdi # 36b423a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x970>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -261041,15 +261041,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369f2f10(%rip),%rdi # 36b413b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x978>\n+\tlea 0x369f3f10(%rip),%rdi # 36b423b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x978>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -261072,15 +261072,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369f2e86(%rip),%rdi # 36b413b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x980>\n+\tlea 0x369f3e86(%rip),%rdi # 36b423b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x980>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -261106,15 +261106,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369f2df0(%rip),%rdi # 36b413c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x988>\n+\tlea 0x369f3df0(%rip),%rdi # 36b423c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x988>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -261137,15 +261137,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369f2d66(%rip),%rdi # 36b413c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x990>\n+\tlea 0x369f3d66(%rip),%rdi # 36b423c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x990>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -261171,15 +261171,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369f2cd0(%rip),%rdi # 36b413d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x998>\n+\tlea 0x369f3cd0(%rip),%rdi # 36b423d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x998>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -261202,15 +261202,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369f2c46(%rip),%rdi # 36b413d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a0>\n+\tlea 0x369f3c46(%rip),%rdi # 36b423d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -261236,15 +261236,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369f2bb0(%rip),%rdi # 36b413e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a8>\n+\tlea 0x369f3bb0(%rip),%rdi # 36b423e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -261267,15 +261267,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369f2b26(%rip),%rdi # 36b413e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b0>\n+\tlea 0x369f3b26(%rip),%rdi # 36b423e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -261301,15 +261301,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369f2a90(%rip),%rdi # 36b413f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b8>\n+\tlea 0x369f3a90(%rip),%rdi # 36b423f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -261332,284 +261332,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369f2a06(%rip),%rdi # 36b413f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c0>\n+\tlea 0x369f3a06(%rip),%rdi # 36b423f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369f7a04(%rip),%rbx # 36b46420 ::get_beta()::val@@Base+0x108>\n+\tmov 0x369f8a04(%rip),%rbx # 36b47420 ::get_beta()::val@@Base+0x108>\n \ttest %rbx,%rbx\n \tjne 14ea37 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a47>\n-\tlea 0x369f6ad8(%rip),%rdi # 36b45500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ac8>\n+\tlea 0x369f7ad8(%rip),%rdi # 36b46500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ac8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369f79e9(%rip) # 36b46420 ::get_beta()::val@@Base+0x108>\n+\tmov %rax,0x369f89e9(%rip) # 36b47420 ::get_beta()::val@@Base+0x108>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f28f6(%rip),%rsi # 36b41340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x908>\n+\tlea 0x369f38f6(%rip),%rsi # 36b42340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x908>\n \tlea 0x1a364f(%rip),%rcx # 2f20a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17e30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f28d0(%rip),%rsi # 36b41348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x910>\n+\tlea 0x369f38d0(%rip),%rsi # 36b42348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x910>\n \tlea 0x1a36a4(%rip),%rcx # 2f2123 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17eb3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f28fa(%rip),%rsi # 36b413a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x968>\n+\tlea 0x369f38fa(%rip),%rsi # 36b423a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x968>\n \tlea 0x1a36f9(%rip),%rcx # 2f21a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17f36>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f28d4(%rip),%rsi # 36b413a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x970>\n+\tlea 0x369f38d4(%rip),%rsi # 36b423a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x970>\n \tlea 0x18f841(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f284e(%rip),%rsi # 36b41350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x918>\n+\tlea 0x369f384e(%rip),%rsi # 36b42350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x918>\n \tlea 0x1a36eb(%rip),%rcx # 2f21f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x17f84>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2828(%rip),%rsi # 36b41358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x920>\n+\tlea 0x369f3828(%rip),%rsi # 36b42358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x920>\n \tlea 0x1a3740(%rip),%rcx # 2f2277 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18007>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2852(%rip),%rsi # 36b413b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x978>\n+\tlea 0x369f3852(%rip),%rsi # 36b423b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x978>\n \tlea 0x1a3795(%rip),%rcx # 2f22fa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1808a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f282c(%rip),%rsi # 36b413b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x980>\n+\tlea 0x369f382c(%rip),%rsi # 36b423b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x980>\n \tlea 0x1902f8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f27a6(%rip),%rsi # 36b41360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x928>\n+\tlea 0x369f37a6(%rip),%rsi # 36b42360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x928>\n \tlea 0x1a3787(%rip),%rcx # 2f2348 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x180d8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2780(%rip),%rsi # 36b41368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x930>\n+\tlea 0x369f3780(%rip),%rsi # 36b42368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x930>\n \tlea 0x1a37dc(%rip),%rcx # 2f23cb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1815b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f27aa(%rip),%rsi # 36b413c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x988>\n+\tlea 0x369f37aa(%rip),%rsi # 36b423c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x988>\n \tlea 0x1a3831(%rip),%rcx # 2f244e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x181de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2784(%rip),%rsi # 36b413c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x990>\n+\tlea 0x369f3784(%rip),%rsi # 36b423c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x990>\n \tlea 0x1903c9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f26fe(%rip),%rsi # 36b41370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x938>\n+\tlea 0x369f36fe(%rip),%rsi # 36b42370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x938>\n \tlea 0x1a3823(%rip),%rcx # 2f249c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1822c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f26d8(%rip),%rsi # 36b41378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x940>\n+\tlea 0x369f36d8(%rip),%rsi # 36b42378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x940>\n \tlea 0x1a387a(%rip),%rcx # 2f2521 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x182b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2702(%rip),%rsi # 36b413d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x998>\n+\tlea 0x369f3702(%rip),%rsi # 36b423d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x998>\n \tlea 0x1a38d1(%rip),%rcx # 2f25a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18336>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f26dc(%rip),%rsi # 36b413d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a0>\n+\tlea 0x369f36dc(%rip),%rsi # 36b423d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a0>\n \tlea 0x19049d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2656(%rip),%rsi # 36b41380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x948>\n+\tlea 0x369f3656(%rip),%rsi # 36b42380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x948>\n \tlea 0x1a38c4(%rip),%rcx # 2f25f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18385>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2630(%rip),%rsi # 36b41388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x950>\n+\tlea 0x369f3630(%rip),%rsi # 36b42388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x950>\n \tlea 0x1a391b(%rip),%rcx # 2f267a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1840a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f265a(%rip),%rsi # 36b413e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a8>\n+\tlea 0x369f365a(%rip),%rsi # 36b423e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a8>\n \tlea 0x1a3972(%rip),%rcx # 2f26ff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1848f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2634(%rip),%rsi # 36b413e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b0>\n+\tlea 0x369f3634(%rip),%rsi # 36b423e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b0>\n \tlea 0x18f672(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f25ae(%rip),%rsi # 36b41390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x958>\n+\tlea 0x369f35ae(%rip),%rsi # 36b42390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x958>\n \tlea 0x1a3965(%rip),%rcx # 2f274e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f2588(%rip),%rsi # 36b41398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x960>\n+\tlea 0x369f3588(%rip),%rsi # 36b42398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x960>\n \tlea 0x1a39bc(%rip),%rcx # 2f27d3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18563>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f25b2(%rip),%rsi # 36b413f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b8>\n+\tlea 0x369f35b2(%rip),%rsi # 36b423f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b8>\n \tlea 0x1a3a13(%rip),%rcx # 2f2858 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x185e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369f258c(%rip),%rsi # 36b413f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c0>\n+\tlea 0x369f358c(%rip),%rsi # 36b423f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c0>\n \tlea 0x1905ae(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 14eea0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3eb0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369f7579(%rip),%rdi # 36b46420 ::get_beta()::val@@Base+0x108>\n+\tmov 0x369f8579(%rip),%rdi # 36b47420 ::get_beta()::val@@Base+0x108>\n \ttest %rdi,%rdi\n \tje 14eec1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ed1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369f7563(%rip) # 36b46420 ::get_beta()::val@@Base+0x108>\n+\tmovq $0x0,0x369f8563(%rip) # 36b47420 ::get_beta()::val@@Base+0x108>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000014eed0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -261635,16 +261635,16 @@\n \tmov $0x2640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f242f(%rip),%rax # 36b41348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x910>\n-\tlea 0x369f2420(%rip),%rdx # 36b41340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x908>\n+\tlea 0x369f342f(%rip),%rax # 36b42348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x910>\n+\tlea 0x369f3420(%rip),%rdx # 36b42340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x908>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -262504,15 +262504,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f182b(%rip),%rdi # 36b413a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x968>\n+\tlea 0x369f282b(%rip),%rdi # 36b423a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x968>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 14fcba (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -262560,15 +262560,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f170d(%rip),%rdi # 36b413a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x970>\n+\tlea 0x369f270d(%rip),%rdi # 36b423a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x970>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -262826,16 +262826,16 @@\n \tmov $0x2e40,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f126f(%rip),%rax # 36b41358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x920>\n-\tlea 0x369f1260(%rip),%rdx # 36b41350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x918>\n+\tlea 0x369f226f(%rip),%rax # 36b42358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x920>\n+\tlea 0x369f2260(%rip),%rdx # 36b42350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x918>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -263695,15 +263695,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f066b(%rip),%rdi # 36b413b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x978>\n+\tlea 0x369f166b(%rip),%rdi # 36b423b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x978>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 150e8a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -263751,15 +263751,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369f054d(%rip),%rdi # 36b413b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x980>\n+\tlea 0x369f154d(%rip),%rdi # 36b423b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x980>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -264017,16 +264017,16 @@\n \tmov $0x3640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369f00af(%rip),%rax # 36b41368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x930>\n-\tlea 0x369f00a0(%rip),%rdx # 36b41360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x928>\n+\tlea 0x369f10af(%rip),%rax # 36b42368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x930>\n+\tlea 0x369f10a0(%rip),%rdx # 36b42360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x928>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -264886,15 +264886,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ef4ab(%rip),%rdi # 36b413c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x988>\n+\tlea 0x369f04ab(%rip),%rdi # 36b423c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x988>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15205a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -264942,15 +264942,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ef38d(%rip),%rdi # 36b413c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x990>\n+\tlea 0x369f038d(%rip),%rdi # 36b423c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x990>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -265208,16 +265208,16 @@\n \tmov $0x3e40,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369eeeef(%rip),%rax # 36b41378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x940>\n-\tlea 0x369eeee0(%rip),%rdx # 36b41370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x938>\n+\tlea 0x369efeef(%rip),%rax # 36b42378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x940>\n+\tlea 0x369efee0(%rip),%rdx # 36b42370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x938>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -266077,15 +266077,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ee2eb(%rip),%rdi # 36b413d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x998>\n+\tlea 0x369ef2eb(%rip),%rdi # 36b423d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x998>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15322a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -266133,15 +266133,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ee1cd(%rip),%rdi # 36b413d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a0>\n+\tlea 0x369ef1cd(%rip),%rdi # 36b423d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -266399,16 +266399,16 @@\n \tmov $0x4640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369edd2f(%rip),%rax # 36b41388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x950>\n-\tlea 0x369edd20(%rip),%rdx # 36b41380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x948>\n+\tlea 0x369eed2f(%rip),%rax # 36b42388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x950>\n+\tlea 0x369eed20(%rip),%rdx # 36b42380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x948>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -267268,15 +267268,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ed12b(%rip),%rdi # 36b413e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a8>\n+\tlea 0x369ee12b(%rip),%rdi # 36b423e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9a8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1543fa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -267324,15 +267324,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ed00d(%rip),%rdi # 36b413e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b0>\n+\tlea 0x369ee00d(%rip),%rdi # 36b423e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -267590,16 +267590,16 @@\n \tmov $0x4340,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 4, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369ecb6f(%rip),%rax # 36b41398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x960>\n-\tlea 0x369ecb60(%rip),%rdx # 36b41390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x958>\n+\tlea 0x369edb6f(%rip),%rax # 36b42398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x960>\n+\tlea 0x369edb60(%rip),%rdx # 36b42390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x958>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -268459,15 +268459,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ebf6b(%rip),%rdi # 36b413f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b8>\n+\tlea 0x369ecf6b(%rip),%rdi # 36b423f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9b8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1555ca (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -268515,15 +268515,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ebe4d(%rip),%rdi # 36b413f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c0>\n+\tlea 0x369ece4d(%rip),%rdi # 36b423f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -268848,15 +268848,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369eb7ab(%rip),%rdi # 36b41400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c8>\n+\tlea 0x369ec7ab(%rip),%rdi # 36b42400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -268952,15 +268952,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369eb4e3(%rip),%rdi # 36b41408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d0>\n+\tlea 0x369ec4e3(%rip),%rdi # 36b42408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269056,15 +269056,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369eb21b(%rip),%rdi # 36b41410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d8>\n+\tlea 0x369ec21b(%rip),%rdi # 36b42410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269160,15 +269160,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369eaf53(%rip),%rdi # 36b41418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e0>\n+\tlea 0x369ebf53(%rip),%rdi # 36b42418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269264,15 +269264,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369eac8b(%rip),%rdi # 36b41420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e8>\n+\tlea 0x369ebc8b(%rip),%rdi # 36b42420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269368,15 +269368,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ea9c3(%rip),%rdi # 36b41428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f0>\n+\tlea 0x369eb9c3(%rip),%rdi # 36b42428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269472,15 +269472,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ea6fb(%rip),%rdi # 36b41430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f8>\n+\tlea 0x369eb6fb(%rip),%rdi # 36b42430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269576,15 +269576,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ea433(%rip),%rdi # 36b41438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa00>\n+\tlea 0x369eb433(%rip),%rdi # 36b42438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa00>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269680,15 +269680,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ea16b(%rip),%rdi # 36b41440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa08>\n+\tlea 0x369eb16b(%rip),%rdi # 36b42440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa08>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269784,15 +269784,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e9ea3(%rip),%rdi # 36b41448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa10>\n+\tlea 0x369eaea3(%rip),%rdi # 36b42448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa10>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269888,15 +269888,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e9bdb(%rip),%rdi # 36b41450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa18>\n+\tlea 0x369eabdb(%rip),%rdi # 36b42450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa18>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -269992,15 +269992,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e9913(%rip),%rdi # 36b41458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa20>\n+\tlea 0x369ea913(%rip),%rdi # 36b42458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa20>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -270026,15 +270026,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e9870(%rip),%rdi # 36b41460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa28>\n+\tlea 0x369ea870(%rip),%rdi # 36b42460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa28>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -270057,15 +270057,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e97e6(%rip),%rdi # 36b41468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa30>\n+\tlea 0x369ea7e6(%rip),%rdi # 36b42468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa30>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -270091,15 +270091,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e9750(%rip),%rdi # 36b41470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa38>\n+\tlea 0x369ea750(%rip),%rdi # 36b42470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa38>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -270122,15 +270122,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e96c6(%rip),%rdi # 36b41478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa40>\n+\tlea 0x369ea6c6(%rip),%rdi # 36b42478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa40>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -270156,15 +270156,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e9630(%rip),%rdi # 36b41480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa48>\n+\tlea 0x369ea630(%rip),%rdi # 36b42480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa48>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -270187,15 +270187,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e95a6(%rip),%rdi # 36b41488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa50>\n+\tlea 0x369ea5a6(%rip),%rdi # 36b42488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa50>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -270221,15 +270221,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e9510(%rip),%rdi # 36b41490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa58>\n+\tlea 0x369ea510(%rip),%rdi # 36b42490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa58>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -270252,15 +270252,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e9486(%rip),%rdi # 36b41498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa60>\n+\tlea 0x369ea486(%rip),%rdi # 36b42498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa60>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -270286,15 +270286,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e93f0(%rip),%rdi # 36b414a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa68>\n+\tlea 0x369ea3f0(%rip),%rdi # 36b424a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa68>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -270317,15 +270317,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e9366(%rip),%rdi # 36b414a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa70>\n+\tlea 0x369ea366(%rip),%rdi # 36b424a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa70>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -270351,15 +270351,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e92d0(%rip),%rdi # 36b414b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa78>\n+\tlea 0x369ea2d0(%rip),%rdi # 36b424b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa78>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -270382,284 +270382,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e9246(%rip),%rdi # 36b414b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa80>\n+\tlea 0x369ea246(%rip),%rdi # 36b424b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa80>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369ee18c(%rip),%rbx # 36b46428 ::get_beta()::val@@Base+0x110>\n+\tmov 0x369ef18c(%rip),%rbx # 36b47428 ::get_beta()::val@@Base+0x110>\n \ttest %rbx,%rbx\n \tjne 1582b7 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a57>\n-\tlea 0x369ed270(%rip),%rdi # 36b45518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ae0>\n+\tlea 0x369ee270(%rip),%rdi # 36b46518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ae0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369ee171(%rip) # 36b46428 ::get_beta()::val@@Base+0x110>\n+\tmov %rax,0x369ef171(%rip) # 36b47428 ::get_beta()::val@@Base+0x110>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e9136(%rip),%rsi # 36b41400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c8>\n+\tlea 0x369ea136(%rip),%rsi # 36b42400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c8>\n \tlea 0x19a5d6(%rip),%rcx # 2f28a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18637>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e9110(%rip),%rsi # 36b41408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d0>\n+\tlea 0x369ea110(%rip),%rsi # 36b42408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d0>\n \tlea 0x19a62b(%rip),%rcx # 2f292a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x186ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e913a(%rip),%rsi # 36b41460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa28>\n+\tlea 0x369ea13a(%rip),%rsi # 36b42460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa28>\n \tlea 0x19a680(%rip),%rcx # 2f29ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1873d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e9114(%rip),%rsi # 36b41468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa30>\n+\tlea 0x369ea114(%rip),%rsi # 36b42468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa30>\n \tlea 0x185fc1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e908e(%rip),%rsi # 36b41410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d8>\n+\tlea 0x369ea08e(%rip),%rsi # 36b42410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d8>\n \tlea 0x19a672(%rip),%rcx # 2f29fb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1878b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e9068(%rip),%rsi # 36b41418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e0>\n+\tlea 0x369ea068(%rip),%rsi # 36b42418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e0>\n \tlea 0x19a6c7(%rip),%rcx # 2f2a7e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1880e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e9092(%rip),%rsi # 36b41470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa38>\n+\tlea 0x369ea092(%rip),%rsi # 36b42470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa38>\n \tlea 0x19a71c(%rip),%rcx # 2f2b01 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18891>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e906c(%rip),%rsi # 36b41478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa40>\n+\tlea 0x369ea06c(%rip),%rsi # 36b42478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa40>\n \tlea 0x186a78(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8fe6(%rip),%rsi # 36b41420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e8>\n+\tlea 0x369e9fe6(%rip),%rsi # 36b42420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e8>\n \tlea 0x19a70e(%rip),%rcx # 2f2b4f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x188df>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8fc0(%rip),%rsi # 36b41428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f0>\n+\tlea 0x369e9fc0(%rip),%rsi # 36b42428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f0>\n \tlea 0x19a763(%rip),%rcx # 2f2bd2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18962>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8fea(%rip),%rsi # 36b41480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa48>\n+\tlea 0x369e9fea(%rip),%rsi # 36b42480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa48>\n \tlea 0x19a7b8(%rip),%rcx # 2f2c55 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x189e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8fc4(%rip),%rsi # 36b41488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa50>\n+\tlea 0x369e9fc4(%rip),%rsi # 36b42488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa50>\n \tlea 0x186b49(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8f3e(%rip),%rsi # 36b41430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f8>\n+\tlea 0x369e9f3e(%rip),%rsi # 36b42430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f8>\n \tlea 0x19a7aa(%rip),%rcx # 2f2ca3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18a33>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8f18(%rip),%rsi # 36b41438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa00>\n+\tlea 0x369e9f18(%rip),%rsi # 36b42438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa00>\n \tlea 0x19a801(%rip),%rcx # 2f2d28 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18ab8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8f42(%rip),%rsi # 36b41490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa58>\n+\tlea 0x369e9f42(%rip),%rsi # 36b42490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa58>\n \tlea 0x19a858(%rip),%rcx # 2f2dad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18b3d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8f1c(%rip),%rsi # 36b41498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa60>\n+\tlea 0x369e9f1c(%rip),%rsi # 36b42498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa60>\n \tlea 0x186c1d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8e96(%rip),%rsi # 36b41440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa08>\n+\tlea 0x369e9e96(%rip),%rsi # 36b42440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa08>\n \tlea 0x19a84b(%rip),%rcx # 2f2dfc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18b8c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8e70(%rip),%rsi # 36b41448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa10>\n+\tlea 0x369e9e70(%rip),%rsi # 36b42448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa10>\n \tlea 0x19a8a2(%rip),%rcx # 2f2e81 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18c11>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8e9a(%rip),%rsi # 36b414a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa68>\n+\tlea 0x369e9e9a(%rip),%rsi # 36b424a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa68>\n \tlea 0x19a8f9(%rip),%rcx # 2f2f06 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18c96>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8e74(%rip),%rsi # 36b414a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa70>\n+\tlea 0x369e9e74(%rip),%rsi # 36b424a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa70>\n \tlea 0x185df2(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8dee(%rip),%rsi # 36b41450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa18>\n+\tlea 0x369e9dee(%rip),%rsi # 36b42450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa18>\n \tlea 0x19a8ec(%rip),%rcx # 2f2f55 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18ce5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8dc8(%rip),%rsi # 36b41458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa20>\n+\tlea 0x369e9dc8(%rip),%rsi # 36b42458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa20>\n \tlea 0x19a943(%rip),%rcx # 2f2fda (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18d6a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8df2(%rip),%rsi # 36b414b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa78>\n+\tlea 0x369e9df2(%rip),%rsi # 36b424b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa78>\n \tlea 0x19a99a(%rip),%rcx # 2f305f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18def>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369e8dcc(%rip),%rsi # 36b414b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa80>\n+\tlea 0x369e9dcc(%rip),%rsi # 36b424b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa80>\n \tlea 0x186d2e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 158720 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369edd01(%rip),%rdi # 36b46428 ::get_beta()::val@@Base+0x110>\n+\tmov 0x369eed01(%rip),%rdi # 36b47428 ::get_beta()::val@@Base+0x110>\n \ttest %rdi,%rdi\n \tje 158741 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ee1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369edceb(%rip) # 36b46428 ::get_beta()::val@@Base+0x110>\n+\tmovq $0x0,0x369eeceb(%rip) # 36b47428 ::get_beta()::val@@Base+0x110>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000158750 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -270685,16 +270685,16 @@\n \tmov $0x2640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369e8c6f(%rip),%rax # 36b41408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d0>\n-\tlea 0x369e8c60(%rip),%rdx # 36b41400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c8>\n+\tlea 0x369e9c6f(%rip),%rax # 36b42408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d0>\n+\tlea 0x369e9c60(%rip),%rdx # 36b42400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9c8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -271554,15 +271554,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e806b(%rip),%rdi # 36b41460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa28>\n+\tlea 0x369e906b(%rip),%rdi # 36b42460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa28>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15953a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -271610,15 +271610,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e7f4d(%rip),%rdi # 36b41468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa30>\n+\tlea 0x369e8f4d(%rip),%rdi # 36b42468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa30>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -271876,16 +271876,16 @@\n \tmov $0x2e40,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369e7aaf(%rip),%rax # 36b41418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e0>\n-\tlea 0x369e7aa0(%rip),%rdx # 36b41410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d8>\n+\tlea 0x369e8aaf(%rip),%rax # 36b42418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e0>\n+\tlea 0x369e8aa0(%rip),%rdx # 36b42410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9d8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -272745,15 +272745,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e6eab(%rip),%rdi # 36b41470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa38>\n+\tlea 0x369e7eab(%rip),%rdi # 36b42470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa38>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15a70a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -272801,15 +272801,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e6d8d(%rip),%rdi # 36b41478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa40>\n+\tlea 0x369e7d8d(%rip),%rdi # 36b42478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa40>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -273067,16 +273067,16 @@\n \tmov $0x3640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369e68ef(%rip),%rax # 36b41428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f0>\n-\tlea 0x369e68e0(%rip),%rdx # 36b41420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e8>\n+\tlea 0x369e78ef(%rip),%rax # 36b42428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f0>\n+\tlea 0x369e78e0(%rip),%rdx # 36b42420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9e8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -273936,15 +273936,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e5ceb(%rip),%rdi # 36b41480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa48>\n+\tlea 0x369e6ceb(%rip),%rdi # 36b42480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa48>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15b8da (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -273992,15 +273992,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e5bcd(%rip),%rdi # 36b41488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa50>\n+\tlea 0x369e6bcd(%rip),%rdi # 36b42488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa50>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -274258,16 +274258,16 @@\n \tmov $0x3e40,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369e572f(%rip),%rax # 36b41438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa00>\n-\tlea 0x369e5720(%rip),%rdx # 36b41430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f8>\n+\tlea 0x369e672f(%rip),%rax # 36b42438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa00>\n+\tlea 0x369e6720(%rip),%rdx # 36b42430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x9f8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -275127,15 +275127,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e4b2b(%rip),%rdi # 36b41490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa58>\n+\tlea 0x369e5b2b(%rip),%rdi # 36b42490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa58>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15caaa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -275183,15 +275183,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e4a0d(%rip),%rdi # 36b41498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa60>\n+\tlea 0x369e5a0d(%rip),%rdi # 36b42498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa60>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -275449,16 +275449,16 @@\n \tmov $0x4640,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369e456f(%rip),%rax # 36b41448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa10>\n-\tlea 0x369e4560(%rip),%rdx # 36b41440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa08>\n+\tlea 0x369e556f(%rip),%rax # 36b42448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa10>\n+\tlea 0x369e5560(%rip),%rdx # 36b42440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa08>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -276318,15 +276318,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e396b(%rip),%rdi # 36b414a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa68>\n+\tlea 0x369e496b(%rip),%rdi # 36b424a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa68>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15dc7a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -276374,15 +276374,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e384d(%rip),%rdi # 36b414a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa70>\n+\tlea 0x369e484d(%rip),%rdi # 36b424a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa70>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -276640,16 +276640,16 @@\n \tmov $0x4400,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 4, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1399\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369e33af(%rip),%rax # 36b41458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa20>\n-\tlea 0x369e33a0(%rip),%rdx # 36b41450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa18>\n+\tlea 0x369e43af(%rip),%rax # 36b42458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa20>\n+\tlea 0x369e43a0(%rip),%rdx # 36b42450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa18>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -277509,15 +277509,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e27ab(%rip),%rdi # 36b414b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa78>\n+\tlea 0x369e37ab(%rip),%rdi # 36b424b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa78>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 15ee4a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -277565,15 +277565,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369e268d(%rip),%rdi # 36b414b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa80>\n+\tlea 0x369e368d(%rip),%rdi # 36b424b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa80>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -277898,15 +277898,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e1feb(%rip),%rdi # 36b414c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa88>\n+\tlea 0x369e2feb(%rip),%rdi # 36b424c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa88>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278002,15 +278002,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e1d23(%rip),%rdi # 36b414c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa90>\n+\tlea 0x369e2d23(%rip),%rdi # 36b424c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa90>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278106,15 +278106,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e1a5b(%rip),%rdi # 36b414d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa98>\n+\tlea 0x369e2a5b(%rip),%rdi # 36b424d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa98>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278210,15 +278210,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e1793(%rip),%rdi # 36b414d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa0>\n+\tlea 0x369e2793(%rip),%rdi # 36b424d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278314,15 +278314,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e14cb(%rip),%rdi # 36b414e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa8>\n+\tlea 0x369e24cb(%rip),%rdi # 36b424e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278418,15 +278418,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e1203(%rip),%rdi # 36b414e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab0>\n+\tlea 0x369e2203(%rip),%rdi # 36b424e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278522,15 +278522,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e0f3b(%rip),%rdi # 36b414f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab8>\n+\tlea 0x369e1f3b(%rip),%rdi # 36b424f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278626,15 +278626,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e0c73(%rip),%rdi # 36b414f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac0>\n+\tlea 0x369e1c73(%rip),%rdi # 36b424f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278730,15 +278730,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e09ab(%rip),%rdi # 36b41500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac8>\n+\tlea 0x369e19ab(%rip),%rdi # 36b42500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278834,15 +278834,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e06e3(%rip),%rdi # 36b41508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad0>\n+\tlea 0x369e16e3(%rip),%rdi # 36b42508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -278938,15 +278938,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e041b(%rip),%rdi # 36b41510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad8>\n+\tlea 0x369e141b(%rip),%rdi # 36b42510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -279042,15 +279042,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369e0153(%rip),%rdi # 36b41518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae0>\n+\tlea 0x369e1153(%rip),%rdi # 36b42518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -279076,15 +279076,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369e00b0(%rip),%rdi # 36b41520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae8>\n+\tlea 0x369e10b0(%rip),%rdi # 36b42520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -279107,15 +279107,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369e0026(%rip),%rdi # 36b41528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf0>\n+\tlea 0x369e1026(%rip),%rdi # 36b42528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -279141,15 +279141,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369dff90(%rip),%rdi # 36b41530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf8>\n+\tlea 0x369e0f90(%rip),%rdi # 36b42530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -279172,15 +279172,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369dff06(%rip),%rdi # 36b41538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb00>\n+\tlea 0x369e0f06(%rip),%rdi # 36b42538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb00>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -279206,15 +279206,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369dfe70(%rip),%rdi # 36b41540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb08>\n+\tlea 0x369e0e70(%rip),%rdi # 36b42540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb08>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -279237,15 +279237,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369dfde6(%rip),%rdi # 36b41548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb10>\n+\tlea 0x369e0de6(%rip),%rdi # 36b42548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb10>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -279271,15 +279271,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369dfd50(%rip),%rdi # 36b41550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb18>\n+\tlea 0x369e0d50(%rip),%rdi # 36b42550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb18>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -279302,15 +279302,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369dfcc6(%rip),%rdi # 36b41558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb20>\n+\tlea 0x369e0cc6(%rip),%rdi # 36b42558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb20>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -279336,15 +279336,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369dfc30(%rip),%rdi # 36b41560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb28>\n+\tlea 0x369e0c30(%rip),%rdi # 36b42560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb28>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -279367,15 +279367,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369dfba6(%rip),%rdi # 36b41568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb30>\n+\tlea 0x369e0ba6(%rip),%rdi # 36b42568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb30>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -279401,15 +279401,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369dfb10(%rip),%rdi # 36b41570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb38>\n+\tlea 0x369e0b10(%rip),%rdi # 36b42570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb38>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -279432,284 +279432,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369dfa86(%rip),%rdi # 36b41578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb40>\n+\tlea 0x369e0a86(%rip),%rdi # 36b42578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb40>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369e4914(%rip),%rbx # 36b46430 ::get_beta()::val@@Base+0x118>\n+\tmov 0x369e5914(%rip),%rbx # 36b47430 ::get_beta()::val@@Base+0x118>\n \ttest %rbx,%rbx\n \tjne 161b37 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a57>\n-\tlea 0x369e3a08(%rip),%rdi # 36b45530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4af8>\n+\tlea 0x369e4a08(%rip),%rdi # 36b46530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4af8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369e48f9(%rip) # 36b46430 ::get_beta()::val@@Base+0x118>\n+\tmov %rax,0x369e58f9(%rip) # 36b47430 ::get_beta()::val@@Base+0x118>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df976(%rip),%rsi # 36b414c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa88>\n+\tlea 0x369e0976(%rip),%rsi # 36b424c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa88>\n \tlea 0x19155d(%rip),%rcx # 2f30ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e3e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df950(%rip),%rsi # 36b414c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa90>\n+\tlea 0x369e0950(%rip),%rsi # 36b424c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa90>\n \tlea 0x1915b3(%rip),%rcx # 2f3132 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18ec2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df97a(%rip),%rsi # 36b41520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae8>\n+\tlea 0x369e097a(%rip),%rsi # 36b42520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae8>\n \tlea 0x191609(%rip),%rcx # 2f31b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18f46>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df954(%rip),%rsi # 36b41528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf0>\n+\tlea 0x369e0954(%rip),%rsi # 36b42528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf0>\n \tlea 0x17c741(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df8ce(%rip),%rsi # 36b414d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa98>\n+\tlea 0x369e08ce(%rip),%rsi # 36b424d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa98>\n \tlea 0x1915fc(%rip),%rcx # 2f3205 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18f95>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df8a8(%rip),%rsi # 36b414d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa0>\n+\tlea 0x369e08a8(%rip),%rsi # 36b424d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa0>\n \tlea 0x191652(%rip),%rcx # 2f3289 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19019>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df8d2(%rip),%rsi # 36b41530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf8>\n+\tlea 0x369e08d2(%rip),%rsi # 36b42530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf8>\n \tlea 0x1916a8(%rip),%rcx # 2f330d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1909d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df8ac(%rip),%rsi # 36b41538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb00>\n+\tlea 0x369e08ac(%rip),%rsi # 36b42538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb00>\n \tlea 0x17d1f8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df826(%rip),%rsi # 36b414e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa8>\n+\tlea 0x369e0826(%rip),%rsi # 36b424e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa8>\n \tlea 0x19169b(%rip),%rcx # 2f335c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x190ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df800(%rip),%rsi # 36b414e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab0>\n+\tlea 0x369e0800(%rip),%rsi # 36b424e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab0>\n \tlea 0x1916f1(%rip),%rcx # 2f33e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19170>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df82a(%rip),%rsi # 36b41540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb08>\n+\tlea 0x369e082a(%rip),%rsi # 36b42540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb08>\n \tlea 0x191747(%rip),%rcx # 2f3464 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x191f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df804(%rip),%rsi # 36b41548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb10>\n+\tlea 0x369e0804(%rip),%rsi # 36b42548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb10>\n \tlea 0x17d2c9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df77e(%rip),%rsi # 36b414f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab8>\n+\tlea 0x369e077e(%rip),%rsi # 36b424f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab8>\n \tlea 0x19173a(%rip),%rcx # 2f34b3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19243>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df758(%rip),%rsi # 36b414f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac0>\n+\tlea 0x369e0758(%rip),%rsi # 36b424f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac0>\n \tlea 0x191792(%rip),%rcx # 2f3539 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x192c9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df782(%rip),%rsi # 36b41550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb18>\n+\tlea 0x369e0782(%rip),%rsi # 36b42550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb18>\n \tlea 0x1917ea(%rip),%rcx # 2f35bf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1934f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df75c(%rip),%rsi # 36b41558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb20>\n+\tlea 0x369e075c(%rip),%rsi # 36b42558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb20>\n \tlea 0x17d39d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df6d6(%rip),%rsi # 36b41500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac8>\n+\tlea 0x369e06d6(%rip),%rsi # 36b42500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac8>\n \tlea 0x1917de(%rip),%rcx # 2f360f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1939f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df6b0(%rip),%rsi # 36b41508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad0>\n+\tlea 0x369e06b0(%rip),%rsi # 36b42508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad0>\n \tlea 0x191836(%rip),%rcx # 2f3695 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19425>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df6da(%rip),%rsi # 36b41560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb28>\n+\tlea 0x369e06da(%rip),%rsi # 36b42560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb28>\n \tlea 0x19188e(%rip),%rcx # 2f371b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x194ab>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df6b4(%rip),%rsi # 36b41568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb30>\n+\tlea 0x369e06b4(%rip),%rsi # 36b42568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb30>\n \tlea 0x17c572(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df62e(%rip),%rsi # 36b41510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad8>\n+\tlea 0x369e062e(%rip),%rsi # 36b42510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad8>\n \tlea 0x191882(%rip),%rcx # 2f376b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x194fb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df608(%rip),%rsi # 36b41518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae0>\n+\tlea 0x369e0608(%rip),%rsi # 36b42518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae0>\n \tlea 0x1918da(%rip),%rcx # 2f37f1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19581>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df632(%rip),%rsi # 36b41570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb38>\n+\tlea 0x369e0632(%rip),%rsi # 36b42570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb38>\n \tlea 0x191932(%rip),%rcx # 2f3877 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19607>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369df60c(%rip),%rsi # 36b41578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb40>\n+\tlea 0x369e060c(%rip),%rsi # 36b42578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb40>\n \tlea 0x17d4ae(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 161fa0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369e4489(%rip),%rdi # 36b46430 ::get_beta()::val@@Base+0x118>\n+\tmov 0x369e5489(%rip),%rdi # 36b47430 ::get_beta()::val@@Base+0x118>\n \ttest %rdi,%rdi\n \tje 161fc1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ee1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369e4473(%rip) # 36b46430 ::get_beta()::val@@Base+0x118>\n+\tmovq $0x0,0x369e5473(%rip) # 36b47430 ::get_beta()::val@@Base+0x118>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000161fd0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -279735,16 +279735,16 @@\n \tmov $0x4800,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369df4af(%rip),%rax # 36b414c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa90>\n-\tlea 0x369df4a0(%rip),%rdx # 36b414c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa88>\n+\tlea 0x369e04af(%rip),%rax # 36b424c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa90>\n+\tlea 0x369e04a0(%rip),%rdx # 36b424c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa88>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -280598,15 +280598,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369de8bb(%rip),%rdi # 36b41520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae8>\n+\tlea 0x369df8bb(%rip),%rdi # 36b42520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 162daa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -280654,15 +280654,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369de79d(%rip),%rdi # 36b41528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf0>\n+\tlea 0x369df79d(%rip),%rdi # 36b42528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -280920,16 +280920,16 @@\n \tmov $0x5000,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369de2ff(%rip),%rax # 36b414d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa0>\n-\tlea 0x369de2f0(%rip),%rdx # 36b414d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa98>\n+\tlea 0x369df2ff(%rip),%rax # 36b424d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa0>\n+\tlea 0x369df2f0(%rip),%rdx # 36b424d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xa98>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -281783,15 +281783,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369dd70b(%rip),%rdi # 36b41530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf8>\n+\tlea 0x369de70b(%rip),%rdi # 36b42530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaf8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 163f6a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -281839,15 +281839,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369dd5ed(%rip),%rdi # 36b41538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb00>\n+\tlea 0x369de5ed(%rip),%rdi # 36b42538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb00>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -282105,16 +282105,16 @@\n \tmov $0x5800,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369dd14f(%rip),%rax # 36b414e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab0>\n-\tlea 0x369dd140(%rip),%rdx # 36b414e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa8>\n+\tlea 0x369de14f(%rip),%rax # 36b424e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab0>\n+\tlea 0x369de140(%rip),%rdx # 36b424e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xaa8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -282968,15 +282968,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369dc55b(%rip),%rdi # 36b41540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb08>\n+\tlea 0x369dd55b(%rip),%rdi # 36b42540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb08>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 16512a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -283024,15 +283024,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369dc43d(%rip),%rdi # 36b41548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb10>\n+\tlea 0x369dd43d(%rip),%rdi # 36b42548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb10>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -283290,16 +283290,16 @@\n \tmov $0x6000,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369dbf9f(%rip),%rax # 36b414f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac0>\n-\tlea 0x369dbf90(%rip),%rdx # 36b414f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab8>\n+\tlea 0x369dcf9f(%rip),%rax # 36b424f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac0>\n+\tlea 0x369dcf90(%rip),%rdx # 36b424f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xab8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -284153,15 +284153,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369db3ab(%rip),%rdi # 36b41550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb18>\n+\tlea 0x369dc3ab(%rip),%rdi # 36b42550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb18>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1662ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -284209,15 +284209,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369db28d(%rip),%rdi # 36b41558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb20>\n+\tlea 0x369dc28d(%rip),%rdi # 36b42558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb20>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -284475,16 +284475,16 @@\n \tmov $0x6800,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369dadef(%rip),%rax # 36b41508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad0>\n-\tlea 0x369dade0(%rip),%rdx # 36b41500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac8>\n+\tlea 0x369dbdef(%rip),%rax # 36b42508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad0>\n+\tlea 0x369dbde0(%rip),%rdx # 36b42500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xac8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -285338,15 +285338,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369da1fb(%rip),%rdi # 36b41560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb28>\n+\tlea 0x369db1fb(%rip),%rdi # 36b42560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb28>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1674aa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -285394,15 +285394,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369da0dd(%rip),%rdi # 36b41568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb30>\n+\tlea 0x369db0dd(%rip),%rdi # 36b42568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb30>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -285660,16 +285660,16 @@\n \tmov $0x8400,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 64, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d9c3f(%rip),%rax # 36b41518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae0>\n-\tlea 0x369d9c30(%rip),%rdx # 36b41510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad8>\n+\tlea 0x369dac3f(%rip),%rax # 36b42518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xae0>\n+\tlea 0x369dac30(%rip),%rdx # 36b42510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xad8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -286523,15 +286523,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d904b(%rip),%rdi # 36b41570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb38>\n+\tlea 0x369da04b(%rip),%rdi # 36b42570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb38>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 16866a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -286579,15 +286579,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d8f2d(%rip),%rdi # 36b41578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb40>\n+\tlea 0x369d9f2d(%rip),%rdi # 36b42578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb40>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -286912,15 +286912,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d888b(%rip),%rdi # 36b41580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb48>\n+\tlea 0x369d988b(%rip),%rdi # 36b42580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb48>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287016,15 +287016,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d85c3(%rip),%rdi # 36b41588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb50>\n+\tlea 0x369d95c3(%rip),%rdi # 36b42588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb50>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287120,15 +287120,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d82fb(%rip),%rdi # 36b41590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb58>\n+\tlea 0x369d92fb(%rip),%rdi # 36b42590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb58>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287224,15 +287224,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d8033(%rip),%rdi # 36b41598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb60>\n+\tlea 0x369d9033(%rip),%rdi # 36b42598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb60>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287328,15 +287328,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d7d6b(%rip),%rdi # 36b415a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb68>\n+\tlea 0x369d8d6b(%rip),%rdi # 36b425a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb68>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287432,15 +287432,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d7aa3(%rip),%rdi # 36b415a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb70>\n+\tlea 0x369d8aa3(%rip),%rdi # 36b425a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb70>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287536,15 +287536,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d77db(%rip),%rdi # 36b415b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb78>\n+\tlea 0x369d87db(%rip),%rdi # 36b425b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb78>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287640,15 +287640,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d7513(%rip),%rdi # 36b415b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb80>\n+\tlea 0x369d8513(%rip),%rdi # 36b425b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb80>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287744,15 +287744,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d724b(%rip),%rdi # 36b415c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb88>\n+\tlea 0x369d824b(%rip),%rdi # 36b425c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb88>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287848,15 +287848,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d6f83(%rip),%rdi # 36b415c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb90>\n+\tlea 0x369d7f83(%rip),%rdi # 36b425c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb90>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -287952,15 +287952,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d6cbb(%rip),%rdi # 36b415d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb98>\n+\tlea 0x369d7cbb(%rip),%rdi # 36b425d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb98>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -288056,15 +288056,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369d69f3(%rip),%rdi # 36b415d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba0>\n+\tlea 0x369d79f3(%rip),%rdi # 36b425d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -288090,15 +288090,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369d6950(%rip),%rdi # 36b415e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba8>\n+\tlea 0x369d7950(%rip),%rdi # 36b425e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -288121,15 +288121,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369d68c6(%rip),%rdi # 36b415e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb0>\n+\tlea 0x369d78c6(%rip),%rdi # 36b425e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -288155,15 +288155,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369d6830(%rip),%rdi # 36b415f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb8>\n+\tlea 0x369d7830(%rip),%rdi # 36b425f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -288186,15 +288186,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369d67a6(%rip),%rdi # 36b415f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc0>\n+\tlea 0x369d77a6(%rip),%rdi # 36b425f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -288220,15 +288220,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369d6710(%rip),%rdi # 36b41600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc8>\n+\tlea 0x369d7710(%rip),%rdi # 36b42600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -288251,15 +288251,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369d6686(%rip),%rdi # 36b41608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd0>\n+\tlea 0x369d7686(%rip),%rdi # 36b42608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -288285,15 +288285,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369d65f0(%rip),%rdi # 36b41610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd8>\n+\tlea 0x369d75f0(%rip),%rdi # 36b42610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -288316,15 +288316,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369d6566(%rip),%rdi # 36b41618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe0>\n+\tlea 0x369d7566(%rip),%rdi # 36b42618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -288350,15 +288350,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369d64d0(%rip),%rdi # 36b41620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe8>\n+\tlea 0x369d74d0(%rip),%rdi # 36b42620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -288381,15 +288381,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369d6446(%rip),%rdi # 36b41628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf0>\n+\tlea 0x369d7446(%rip),%rdi # 36b42628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -288415,15 +288415,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369d63b0(%rip),%rdi # 36b41630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf8>\n+\tlea 0x369d73b0(%rip),%rdi # 36b42630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -288446,284 +288446,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369d6326(%rip),%rdi # 36b41638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc00>\n+\tlea 0x369d7326(%rip),%rdi # 36b42638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc00>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369db0fc(%rip),%rbx # 36b46438 ::get_beta()::val@@Base+0x120>\n+\tmov 0x369dc0fc(%rip),%rbx # 36b47438 ::get_beta()::val@@Base+0x120>\n \ttest %rbx,%rbx\n \tjne 16b357 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a47>\n-\tlea 0x369da200(%rip),%rdi # 36b45548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b10>\n+\tlea 0x369db200(%rip),%rdi # 36b46548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b10>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369db0e1(%rip) # 36b46438 ::get_beta()::val@@Base+0x120>\n+\tmov %rax,0x369dc0e1(%rip) # 36b47438 ::get_beta()::val@@Base+0x120>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d6216(%rip),%rsi # 36b41580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb48>\n+\tlea 0x369d7216(%rip),%rsi # 36b42580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb48>\n \tlea 0x188556(%rip),%rcx # 2f38c7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19657>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d61f0(%rip),%rsi # 36b41588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb50>\n+\tlea 0x369d71f0(%rip),%rsi # 36b42588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb50>\n \tlea 0x1885ab(%rip),%rcx # 2f394a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x196da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d621a(%rip),%rsi # 36b415e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba8>\n+\tlea 0x369d721a(%rip),%rsi # 36b425e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba8>\n \tlea 0x188600(%rip),%rcx # 2f39cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1975d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d61f4(%rip),%rsi # 36b415e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb0>\n+\tlea 0x369d71f4(%rip),%rsi # 36b425e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb0>\n \tlea 0x172f21(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d616e(%rip),%rsi # 36b41590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb58>\n+\tlea 0x369d716e(%rip),%rsi # 36b42590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb58>\n \tlea 0x1885f2(%rip),%rcx # 2f3a1b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x197ab>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d6148(%rip),%rsi # 36b41598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb60>\n+\tlea 0x369d7148(%rip),%rsi # 36b42598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb60>\n \tlea 0x188647(%rip),%rcx # 2f3a9e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1982e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d6172(%rip),%rsi # 36b415f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb8>\n+\tlea 0x369d7172(%rip),%rsi # 36b425f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb8>\n \tlea 0x18869c(%rip),%rcx # 2f3b21 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x198b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d614c(%rip),%rsi # 36b415f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc0>\n+\tlea 0x369d714c(%rip),%rsi # 36b425f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc0>\n \tlea 0x1739d8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d60c6(%rip),%rsi # 36b415a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb68>\n+\tlea 0x369d70c6(%rip),%rsi # 36b425a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb68>\n \tlea 0x18868e(%rip),%rcx # 2f3b6f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x198ff>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d60a0(%rip),%rsi # 36b415a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb70>\n+\tlea 0x369d70a0(%rip),%rsi # 36b425a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb70>\n \tlea 0x1886e3(%rip),%rcx # 2f3bf2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19982>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d60ca(%rip),%rsi # 36b41600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc8>\n+\tlea 0x369d70ca(%rip),%rsi # 36b42600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc8>\n \tlea 0x188738(%rip),%rcx # 2f3c75 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19a05>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d60a4(%rip),%rsi # 36b41608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd0>\n+\tlea 0x369d70a4(%rip),%rsi # 36b42608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd0>\n \tlea 0x173aa9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d601e(%rip),%rsi # 36b415b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb78>\n+\tlea 0x369d701e(%rip),%rsi # 36b425b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb78>\n \tlea 0x18872a(%rip),%rcx # 2f3cc3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19a53>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5ff8(%rip),%rsi # 36b415b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb80>\n+\tlea 0x369d6ff8(%rip),%rsi # 36b425b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb80>\n \tlea 0x188781(%rip),%rcx # 2f3d48 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19ad8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d6022(%rip),%rsi # 36b41610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd8>\n+\tlea 0x369d7022(%rip),%rsi # 36b42610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd8>\n \tlea 0x1887d8(%rip),%rcx # 2f3dcd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19b5d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5ffc(%rip),%rsi # 36b41618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe0>\n+\tlea 0x369d6ffc(%rip),%rsi # 36b42618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe0>\n \tlea 0x173b7d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5f76(%rip),%rsi # 36b415c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb88>\n+\tlea 0x369d6f76(%rip),%rsi # 36b425c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb88>\n \tlea 0x1887cb(%rip),%rcx # 2f3e1c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19bac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5f50(%rip),%rsi # 36b415c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb90>\n+\tlea 0x369d6f50(%rip),%rsi # 36b425c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb90>\n \tlea 0x188822(%rip),%rcx # 2f3ea1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19c31>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5f7a(%rip),%rsi # 36b41620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe8>\n+\tlea 0x369d6f7a(%rip),%rsi # 36b42620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe8>\n \tlea 0x188879(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5f54(%rip),%rsi # 36b41628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf0>\n+\tlea 0x369d6f54(%rip),%rsi # 36b42628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf0>\n \tlea 0x172d52(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5ece(%rip),%rsi # 36b415d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb98>\n+\tlea 0x369d6ece(%rip),%rsi # 36b425d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb98>\n \tlea 0x18886c(%rip),%rcx # 2f3f75 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19d05>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5ea8(%rip),%rsi # 36b415d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba0>\n+\tlea 0x369d6ea8(%rip),%rsi # 36b425d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba0>\n \tlea 0x1888c3(%rip),%rcx # 2f3ffa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19d8a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5ed2(%rip),%rsi # 36b41630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf8>\n+\tlea 0x369d6ed2(%rip),%rsi # 36b42630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf8>\n \tlea 0x18891a(%rip),%rcx # 2f407f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19e0f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369d5eac(%rip),%rsi # 36b41638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc00>\n+\tlea 0x369d6eac(%rip),%rsi # 36b42638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc00>\n \tlea 0x173c8e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 16b7c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3eb0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369dac71(%rip),%rdi # 36b46438 ::get_beta()::val@@Base+0x120>\n+\tmov 0x369dbc71(%rip),%rdi # 36b47438 ::get_beta()::val@@Base+0x120>\n \ttest %rdi,%rdi\n \tje 16b7e1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ed1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369dac5b(%rip) # 36b46438 ::get_beta()::val@@Base+0x120>\n+\tmovq $0x0,0x369dbc5b(%rip) # 36b47438 ::get_beta()::val@@Base+0x120>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000016b7f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -288749,16 +288749,16 @@\n \tmov $0x2880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d5d4f(%rip),%rax # 36b41588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb50>\n-\tlea 0x369d5d40(%rip),%rdx # 36b41580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb48>\n+\tlea 0x369d6d4f(%rip),%rax # 36b42588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb50>\n+\tlea 0x369d6d40(%rip),%rdx # 36b42580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb48>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -289612,15 +289612,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d515b(%rip),%rdi # 36b415e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba8>\n+\tlea 0x369d615b(%rip),%rdi # 36b425e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 16c5ca (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -289668,15 +289668,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d503d(%rip),%rdi # 36b415e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb0>\n+\tlea 0x369d603d(%rip),%rdi # 36b425e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -289934,16 +289934,16 @@\n \tmov $0x3080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d4b9f(%rip),%rax # 36b41598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb60>\n-\tlea 0x369d4b90(%rip),%rdx # 36b41590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb58>\n+\tlea 0x369d5b9f(%rip),%rax # 36b42598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb60>\n+\tlea 0x369d5b90(%rip),%rdx # 36b42590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb58>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -290797,15 +290797,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d3fab(%rip),%rdi # 36b415f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb8>\n+\tlea 0x369d4fab(%rip),%rdi # 36b425f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbb8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 16d78a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -290853,15 +290853,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d3e8d(%rip),%rdi # 36b415f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc0>\n+\tlea 0x369d4e8d(%rip),%rdi # 36b425f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -291119,16 +291119,16 @@\n \tmov $0x3880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d39ef(%rip),%rax # 36b415a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb70>\n-\tlea 0x369d39e0(%rip),%rdx # 36b415a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb68>\n+\tlea 0x369d49ef(%rip),%rax # 36b425a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb70>\n+\tlea 0x369d49e0(%rip),%rdx # 36b425a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb68>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -291982,15 +291982,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d2dfb(%rip),%rdi # 36b41600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc8>\n+\tlea 0x369d3dfb(%rip),%rdi # 36b42600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbc8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 16e94a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -292038,15 +292038,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d2cdd(%rip),%rdi # 36b41608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd0>\n+\tlea 0x369d3cdd(%rip),%rdi # 36b42608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -292304,16 +292304,16 @@\n \tmov $0x4080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d283f(%rip),%rax # 36b415b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb80>\n-\tlea 0x369d2830(%rip),%rdx # 36b415b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb78>\n+\tlea 0x369d383f(%rip),%rax # 36b425b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb80>\n+\tlea 0x369d3830(%rip),%rdx # 36b425b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb78>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -293167,15 +293167,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d1c4b(%rip),%rdi # 36b41610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd8>\n+\tlea 0x369d2c4b(%rip),%rdi # 36b42610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbd8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 16fb0a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -293223,15 +293223,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d1b2d(%rip),%rdi # 36b41618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe0>\n+\tlea 0x369d2b2d(%rip),%rdi # 36b42618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -293489,16 +293489,16 @@\n \tmov $0x4880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d168f(%rip),%rax # 36b415c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb90>\n-\tlea 0x369d1680(%rip),%rdx # 36b415c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb88>\n+\tlea 0x369d268f(%rip),%rax # 36b425c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb90>\n+\tlea 0x369d2680(%rip),%rdx # 36b425c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb88>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -294352,15 +294352,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d0a9b(%rip),%rdi # 36b41620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe8>\n+\tlea 0x369d1a9b(%rip),%rdi # 36b42620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbe8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 170cca (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -294408,15 +294408,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369d097d(%rip),%rdi # 36b41628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf0>\n+\tlea 0x369d197d(%rip),%rdi # 36b42628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -294674,16 +294674,16 @@\n \tmov $0x4480,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 8, 1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369d04df(%rip),%rax # 36b415d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba0>\n-\tlea 0x369d04d0(%rip),%rdx # 36b415d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb98>\n+\tlea 0x369d14df(%rip),%rax # 36b425d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xba0>\n+\tlea 0x369d14d0(%rip),%rdx # 36b425d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xb98>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -295537,15 +295537,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369cf8eb(%rip),%rdi # 36b41630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf8>\n+\tlea 0x369d08eb(%rip),%rdi # 36b42630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xbf8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 171e8a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -295593,15 +295593,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369cf7cd(%rip),%rdi # 36b41638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc00>\n+\tlea 0x369d07cd(%rip),%rdi # 36b42638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc00>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -295926,15 +295926,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cf12b(%rip),%rdi # 36b41640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc08>\n+\tlea 0x369d012b(%rip),%rdi # 36b42640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc08>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296030,15 +296030,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cee63(%rip),%rdi # 36b41648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc10>\n+\tlea 0x369cfe63(%rip),%rdi # 36b42648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc10>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296134,15 +296134,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ceb9b(%rip),%rdi # 36b41650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc18>\n+\tlea 0x369cfb9b(%rip),%rdi # 36b42650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc18>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296238,15 +296238,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ce8d3(%rip),%rdi # 36b41658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc20>\n+\tlea 0x369cf8d3(%rip),%rdi # 36b42658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc20>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296342,15 +296342,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ce60b(%rip),%rdi # 36b41660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc28>\n+\tlea 0x369cf60b(%rip),%rdi # 36b42660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc28>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296446,15 +296446,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ce343(%rip),%rdi # 36b41668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc30>\n+\tlea 0x369cf343(%rip),%rdi # 36b42668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc30>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296550,15 +296550,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ce07b(%rip),%rdi # 36b41670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc38>\n+\tlea 0x369cf07b(%rip),%rdi # 36b42670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc38>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296654,15 +296654,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cddb3(%rip),%rdi # 36b41678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc40>\n+\tlea 0x369cedb3(%rip),%rdi # 36b42678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc40>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296758,15 +296758,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cdaeb(%rip),%rdi # 36b41680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc48>\n+\tlea 0x369ceaeb(%rip),%rdi # 36b42680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc48>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296862,15 +296862,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cd823(%rip),%rdi # 36b41688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc50>\n+\tlea 0x369ce823(%rip),%rdi # 36b42688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc50>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -296966,15 +296966,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cd55b(%rip),%rdi # 36b41690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc58>\n+\tlea 0x369ce55b(%rip),%rdi # 36b42690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc58>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -297070,15 +297070,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369cd293(%rip),%rdi # 36b41698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc60>\n+\tlea 0x369ce293(%rip),%rdi # 36b42698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc60>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -297104,15 +297104,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369cd1f0(%rip),%rdi # 36b416a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc68>\n+\tlea 0x369ce1f0(%rip),%rdi # 36b426a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc68>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -297135,15 +297135,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369cd166(%rip),%rdi # 36b416a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc70>\n+\tlea 0x369ce166(%rip),%rdi # 36b426a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc70>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -297169,15 +297169,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369cd0d0(%rip),%rdi # 36b416b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc78>\n+\tlea 0x369ce0d0(%rip),%rdi # 36b426b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc78>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -297200,15 +297200,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369cd046(%rip),%rdi # 36b416b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc80>\n+\tlea 0x369ce046(%rip),%rdi # 36b426b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc80>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -297234,15 +297234,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ccfb0(%rip),%rdi # 36b416c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc88>\n+\tlea 0x369cdfb0(%rip),%rdi # 36b426c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc88>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -297265,15 +297265,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ccf26(%rip),%rdi # 36b416c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc90>\n+\tlea 0x369cdf26(%rip),%rdi # 36b426c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc90>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -297299,15 +297299,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369cce90(%rip),%rdi # 36b416d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc98>\n+\tlea 0x369cde90(%rip),%rdi # 36b426d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc98>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -297330,15 +297330,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369cce06(%rip),%rdi # 36b416d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca0>\n+\tlea 0x369cde06(%rip),%rdi # 36b426d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -297364,15 +297364,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ccd70(%rip),%rdi # 36b416e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca8>\n+\tlea 0x369cdd70(%rip),%rdi # 36b426e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -297395,15 +297395,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ccce6(%rip),%rdi # 36b416e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb0>\n+\tlea 0x369cdce6(%rip),%rdi # 36b426e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -297429,15 +297429,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ccc50(%rip),%rdi # 36b416f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb8>\n+\tlea 0x369cdc50(%rip),%rdi # 36b426f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -297460,284 +297460,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ccbc6(%rip),%rdi # 36b416f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc0>\n+\tlea 0x369cdbc6(%rip),%rdi # 36b426f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369d18e4(%rip),%rbx # 36b46440 ::get_beta()::val@@Base+0x128>\n+\tmov 0x369d28e4(%rip),%rbx # 36b47440 ::get_beta()::val@@Base+0x128>\n \ttest %rbx,%rbx\n \tjne 174b77 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a47>\n-\tlea 0x369d09f8(%rip),%rdi # 36b45560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b28>\n+\tlea 0x369d19f8(%rip),%rdi # 36b46560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b28>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369d18c9(%rip) # 36b46440 ::get_beta()::val@@Base+0x128>\n+\tmov %rax,0x369d28c9(%rip) # 36b47440 ::get_beta()::val@@Base+0x128>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ccab6(%rip),%rsi # 36b41640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc08>\n+\tlea 0x369cdab6(%rip),%rsi # 36b42640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc08>\n \tlea 0x17f53d(%rip),%rcx # 2f40ce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19e5e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cca90(%rip),%rsi # 36b41648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc10>\n+\tlea 0x369cda90(%rip),%rsi # 36b42648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc10>\n \tlea 0x17f592(%rip),%rcx # 2f4151 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19ee1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ccaba(%rip),%rsi # 36b416a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc68>\n+\tlea 0x369cdaba(%rip),%rsi # 36b426a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc68>\n \tlea 0x17f5e7(%rip),%rcx # 2f41d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19f64>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cca94(%rip),%rsi # 36b416a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc70>\n+\tlea 0x369cda94(%rip),%rsi # 36b426a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc70>\n \tlea 0x169701(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cca0e(%rip),%rsi # 36b41650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc18>\n+\tlea 0x369cda0e(%rip),%rsi # 36b42650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc18>\n \tlea 0x17f5d9(%rip),%rcx # 2f4222 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19fb2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc9e8(%rip),%rsi # 36b41658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc20>\n+\tlea 0x369cd9e8(%rip),%rsi # 36b42658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc20>\n \tlea 0x17f62e(%rip),%rcx # 2f42a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a035>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cca12(%rip),%rsi # 36b416b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc78>\n+\tlea 0x369cda12(%rip),%rsi # 36b426b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc78>\n \tlea 0x17f683(%rip),%rcx # 2f4328 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a0b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc9ec(%rip),%rsi # 36b416b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc80>\n+\tlea 0x369cd9ec(%rip),%rsi # 36b426b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc80>\n \tlea 0x16a1b8(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc966(%rip),%rsi # 36b41660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc28>\n+\tlea 0x369cd966(%rip),%rsi # 36b42660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc28>\n \tlea 0x17f675(%rip),%rcx # 2f4376 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a106>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc940(%rip),%rsi # 36b41668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc30>\n+\tlea 0x369cd940(%rip),%rsi # 36b42668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc30>\n \tlea 0x17f6ca(%rip),%rcx # 2f43f9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a189>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc96a(%rip),%rsi # 36b416c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc88>\n+\tlea 0x369cd96a(%rip),%rsi # 36b426c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc88>\n \tlea 0x17f71f(%rip),%rcx # 2f447c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a20c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc944(%rip),%rsi # 36b416c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc90>\n+\tlea 0x369cd944(%rip),%rsi # 36b426c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc90>\n \tlea 0x16a289(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc8be(%rip),%rsi # 36b41670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc38>\n+\tlea 0x369cd8be(%rip),%rsi # 36b42670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc38>\n \tlea 0x17f711(%rip),%rcx # 2f44ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a25a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc898(%rip),%rsi # 36b41678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc40>\n+\tlea 0x369cd898(%rip),%rsi # 36b42678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc40>\n \tlea 0x17f768(%rip),%rcx # 2f454f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a2df>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc8c2(%rip),%rsi # 36b416d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc98>\n+\tlea 0x369cd8c2(%rip),%rsi # 36b426d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc98>\n \tlea 0x17f7bf(%rip),%rcx # 2f45d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a364>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc89c(%rip),%rsi # 36b416d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca0>\n+\tlea 0x369cd89c(%rip),%rsi # 36b426d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca0>\n \tlea 0x16a35d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc816(%rip),%rsi # 36b41680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc48>\n+\tlea 0x369cd816(%rip),%rsi # 36b42680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc48>\n \tlea 0x17f7b2(%rip),%rcx # 2f4623 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a3b3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc7f0(%rip),%rsi # 36b41688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc50>\n+\tlea 0x369cd7f0(%rip),%rsi # 36b42688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc50>\n \tlea 0x17f809(%rip),%rcx # 2f46a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a438>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc81a(%rip),%rsi # 36b416e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca8>\n+\tlea 0x369cd81a(%rip),%rsi # 36b426e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca8>\n \tlea 0x17f860(%rip),%rcx # 2f472d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a4bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc7f4(%rip),%rsi # 36b416e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb0>\n+\tlea 0x369cd7f4(%rip),%rsi # 36b426e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb0>\n \tlea 0x169532(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc76e(%rip),%rsi # 36b41690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc58>\n+\tlea 0x369cd76e(%rip),%rsi # 36b42690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc58>\n \tlea 0x17f853(%rip),%rcx # 2f477c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a50c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc748(%rip),%rsi # 36b41698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc60>\n+\tlea 0x369cd748(%rip),%rsi # 36b42698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc60>\n \tlea 0x17f8aa(%rip),%rcx # 2f4801 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a591>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc772(%rip),%rsi # 36b416f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb8>\n+\tlea 0x369cd772(%rip),%rsi # 36b426f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb8>\n \tlea 0x17f901(%rip),%rcx # 2f4886 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a616>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369cc74c(%rip),%rsi # 36b416f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc0>\n+\tlea 0x369cd74c(%rip),%rsi # 36b426f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc0>\n \tlea 0x16a46e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 174fe0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3eb0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369d1459(%rip),%rdi # 36b46440 ::get_beta()::val@@Base+0x128>\n+\tmov 0x369d2459(%rip),%rdi # 36b47440 ::get_beta()::val@@Base+0x128>\n \ttest %rdi,%rdi\n \tje 175001 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ed1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369d1443(%rip) # 36b46440 ::get_beta()::val@@Base+0x128>\n+\tmovq $0x0,0x369d2443(%rip) # 36b47440 ::get_beta()::val@@Base+0x128>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000175010 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -297763,16 +297763,16 @@\n \tmov $0x2880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369cc5ef(%rip),%rax # 36b41648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc10>\n-\tlea 0x369cc5e0(%rip),%rdx # 36b41640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc08>\n+\tlea 0x369cd5ef(%rip),%rax # 36b42648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc10>\n+\tlea 0x369cd5e0(%rip),%rdx # 36b42640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc08>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -298631,15 +298631,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369cb9fb(%rip),%rdi # 36b416a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc68>\n+\tlea 0x369cc9fb(%rip),%rdi # 36b426a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc68>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 175dea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -298687,15 +298687,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369cb8dd(%rip),%rdi # 36b416a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc70>\n+\tlea 0x369cc8dd(%rip),%rdi # 36b426a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc70>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -298953,16 +298953,16 @@\n \tmov $0x3080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369cb43f(%rip),%rax # 36b41658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc20>\n-\tlea 0x369cb430(%rip),%rdx # 36b41650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc18>\n+\tlea 0x369cc43f(%rip),%rax # 36b42658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc20>\n+\tlea 0x369cc430(%rip),%rdx # 36b42650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc18>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -299821,15 +299821,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ca84b(%rip),%rdi # 36b416b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc78>\n+\tlea 0x369cb84b(%rip),%rdi # 36b426b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc78>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 176faa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -299877,15 +299877,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369ca72d(%rip),%rdi # 36b416b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc80>\n+\tlea 0x369cb72d(%rip),%rdi # 36b426b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc80>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -300143,16 +300143,16 @@\n \tmov $0x3880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369ca28f(%rip),%rax # 36b41668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc30>\n-\tlea 0x369ca280(%rip),%rdx # 36b41660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc28>\n+\tlea 0x369cb28f(%rip),%rax # 36b42668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc30>\n+\tlea 0x369cb280(%rip),%rdx # 36b42660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc28>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -301011,15 +301011,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c969b(%rip),%rdi # 36b416c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc88>\n+\tlea 0x369ca69b(%rip),%rdi # 36b426c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc88>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 17816a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -301067,15 +301067,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c957d(%rip),%rdi # 36b416c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc90>\n+\tlea 0x369ca57d(%rip),%rdi # 36b426c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc90>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -301333,16 +301333,16 @@\n \tmov $0x4080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369c90df(%rip),%rax # 36b41678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc40>\n-\tlea 0x369c90d0(%rip),%rdx # 36b41670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc38>\n+\tlea 0x369ca0df(%rip),%rax # 36b42678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc40>\n+\tlea 0x369ca0d0(%rip),%rdx # 36b42670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc38>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -302201,15 +302201,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c84eb(%rip),%rdi # 36b416d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc98>\n+\tlea 0x369c94eb(%rip),%rdi # 36b426d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc98>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 17932a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -302257,15 +302257,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c83cd(%rip),%rdi # 36b416d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca0>\n+\tlea 0x369c93cd(%rip),%rdi # 36b426d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -302523,16 +302523,16 @@\n \tmov $0x4880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369c7f2f(%rip),%rax # 36b41688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc50>\n-\tlea 0x369c7f20(%rip),%rdx # 36b41680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc48>\n+\tlea 0x369c8f2f(%rip),%rax # 36b42688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc50>\n+\tlea 0x369c8f20(%rip),%rdx # 36b42680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc48>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -303391,15 +303391,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c733b(%rip),%rdi # 36b416e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca8>\n+\tlea 0x369c833b(%rip),%rdi # 36b426e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xca8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 17a4ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -303447,15 +303447,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c721d(%rip),%rdi # 36b416e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb0>\n+\tlea 0x369c821d(%rip),%rdi # 36b426e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -303713,16 +303713,16 @@\n \tmov $0x4480,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 8, 2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369c6d7f(%rip),%rax # 36b41698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc60>\n-\tlea 0x369c6d70(%rip),%rdx # 36b41690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc58>\n+\tlea 0x369c7d7f(%rip),%rax # 36b42698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc60>\n+\tlea 0x369c7d70(%rip),%rdx # 36b42690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xc58>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \tmov $0x100,%r9d\n@@ -304581,15 +304581,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c618b(%rip),%rdi # 36b416f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb8>\n+\tlea 0x369c718b(%rip),%rdi # 36b426f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcb8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 17b6aa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -304637,15 +304637,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c606d(%rip),%rdi # 36b416f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc0>\n+\tlea 0x369c706d(%rip),%rdi # 36b426f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -304970,15 +304970,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c59cb(%rip),%rdi # 36b41700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc8>\n+\tlea 0x369c69cb(%rip),%rdi # 36b42700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305074,15 +305074,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c5703(%rip),%rdi # 36b41708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd0>\n+\tlea 0x369c6703(%rip),%rdi # 36b42708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305178,15 +305178,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c543b(%rip),%rdi # 36b41710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd8>\n+\tlea 0x369c643b(%rip),%rdi # 36b42710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305282,15 +305282,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c5173(%rip),%rdi # 36b41718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce0>\n+\tlea 0x369c6173(%rip),%rdi # 36b42718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305386,15 +305386,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c4eab(%rip),%rdi # 36b41720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce8>\n+\tlea 0x369c5eab(%rip),%rdi # 36b42720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305490,15 +305490,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c4be3(%rip),%rdi # 36b41728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf0>\n+\tlea 0x369c5be3(%rip),%rdi # 36b42728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305594,15 +305594,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c491b(%rip),%rdi # 36b41730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf8>\n+\tlea 0x369c591b(%rip),%rdi # 36b42730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305698,15 +305698,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c4653(%rip),%rdi # 36b41738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd00>\n+\tlea 0x369c5653(%rip),%rdi # 36b42738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd00>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305802,15 +305802,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c438b(%rip),%rdi # 36b41740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd08>\n+\tlea 0x369c538b(%rip),%rdi # 36b42740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd08>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -305906,15 +305906,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c40c3(%rip),%rdi # 36b41748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd10>\n+\tlea 0x369c50c3(%rip),%rdi # 36b42748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd10>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -306010,15 +306010,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c3dfb(%rip),%rdi # 36b41750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd18>\n+\tlea 0x369c4dfb(%rip),%rdi # 36b42750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd18>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -306114,15 +306114,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369c3b33(%rip),%rdi # 36b41758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd20>\n+\tlea 0x369c4b33(%rip),%rdi # 36b42758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd20>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -306148,15 +306148,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369c3a90(%rip),%rdi # 36b41760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd28>\n+\tlea 0x369c4a90(%rip),%rdi # 36b42760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd28>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -306179,15 +306179,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369c3a06(%rip),%rdi # 36b41768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd30>\n+\tlea 0x369c4a06(%rip),%rdi # 36b42768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd30>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -306213,15 +306213,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369c3970(%rip),%rdi # 36b41770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd38>\n+\tlea 0x369c4970(%rip),%rdi # 36b42770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd38>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -306244,15 +306244,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369c38e6(%rip),%rdi # 36b41778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd40>\n+\tlea 0x369c48e6(%rip),%rdi # 36b42778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd40>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -306278,15 +306278,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369c3850(%rip),%rdi # 36b41780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd48>\n+\tlea 0x369c4850(%rip),%rdi # 36b42780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd48>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -306309,15 +306309,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369c37c6(%rip),%rdi # 36b41788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd50>\n+\tlea 0x369c47c6(%rip),%rdi # 36b42788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd50>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -306343,15 +306343,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369c3730(%rip),%rdi # 36b41790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd58>\n+\tlea 0x369c4730(%rip),%rdi # 36b42790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd58>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -306374,15 +306374,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369c36a6(%rip),%rdi # 36b41798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd60>\n+\tlea 0x369c46a6(%rip),%rdi # 36b42798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd60>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -306408,15 +306408,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369c3610(%rip),%rdi # 36b417a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd68>\n+\tlea 0x369c4610(%rip),%rdi # 36b427a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd68>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -306439,15 +306439,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369c3586(%rip),%rdi # 36b417a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd70>\n+\tlea 0x369c4586(%rip),%rdi # 36b427a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd70>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -306473,15 +306473,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369c34f0(%rip),%rdi # 36b417b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd78>\n+\tlea 0x369c44f0(%rip),%rdi # 36b427b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd78>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -306504,284 +306504,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369c3466(%rip),%rdi # 36b417b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd80>\n+\tlea 0x369c4466(%rip),%rdi # 36b427b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd80>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369c80cc(%rip),%rbx # 36b46448 ::get_beta()::val@@Base+0x130>\n+\tmov 0x369c90cc(%rip),%rbx # 36b47448 ::get_beta()::val@@Base+0x130>\n \ttest %rbx,%rbx\n \tjne 17e397 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a47>\n-\tlea 0x369c71f0(%rip),%rdi # 36b45578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b40>\n+\tlea 0x369c81f0(%rip),%rdi # 36b46578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b40>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369c80b1(%rip) # 36b46448 ::get_beta()::val@@Base+0x130>\n+\tmov %rax,0x369c90b1(%rip) # 36b47448 ::get_beta()::val@@Base+0x130>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3356(%rip),%rsi # 36b41700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc8>\n+\tlea 0x369c4356(%rip),%rsi # 36b42700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc8>\n \tlea 0x176524(%rip),%rcx # 2f48d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a665>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3330(%rip),%rsi # 36b41708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd0>\n+\tlea 0x369c4330(%rip),%rsi # 36b42708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd0>\n \tlea 0x176579(%rip),%rcx # 2f4958 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a6e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c335a(%rip),%rsi # 36b41760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd28>\n+\tlea 0x369c435a(%rip),%rsi # 36b42760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd28>\n \tlea 0x1765ce(%rip),%rcx # 2f49db (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a76b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3334(%rip),%rsi # 36b41768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd30>\n+\tlea 0x369c4334(%rip),%rsi # 36b42768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd30>\n \tlea 0x15fee1(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c32ae(%rip),%rsi # 36b41710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd8>\n+\tlea 0x369c42ae(%rip),%rsi # 36b42710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd8>\n \tlea 0x1765c0(%rip),%rcx # 2f4a29 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a7b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3288(%rip),%rsi # 36b41718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce0>\n+\tlea 0x369c4288(%rip),%rsi # 36b42718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce0>\n \tlea 0x176615(%rip),%rcx # 2f4aac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a83c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c32b2(%rip),%rsi # 36b41770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd38>\n+\tlea 0x369c42b2(%rip),%rsi # 36b42770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd38>\n \tlea 0x17666a(%rip),%rcx # 2f4b2f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a8bf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c328c(%rip),%rsi # 36b41778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd40>\n+\tlea 0x369c428c(%rip),%rsi # 36b42778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd40>\n \tlea 0x160998(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3206(%rip),%rsi # 36b41720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce8>\n+\tlea 0x369c4206(%rip),%rsi # 36b42720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce8>\n \tlea 0x17665c(%rip),%rcx # 2f4b7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a90d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c31e0(%rip),%rsi # 36b41728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf0>\n+\tlea 0x369c41e0(%rip),%rsi # 36b42728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf0>\n \tlea 0x1766b1(%rip),%rcx # 2f4c00 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1a990>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c320a(%rip),%rsi # 36b41780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd48>\n+\tlea 0x369c420a(%rip),%rsi # 36b42780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd48>\n \tlea 0x176706(%rip),%rcx # 2f4c83 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1aa13>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c31e4(%rip),%rsi # 36b41788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd50>\n+\tlea 0x369c41e4(%rip),%rsi # 36b42788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd50>\n \tlea 0x160a69(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c315e(%rip),%rsi # 36b41730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf8>\n+\tlea 0x369c415e(%rip),%rsi # 36b42730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf8>\n \tlea 0x1766f8(%rip),%rcx # 2f4cd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1aa61>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3138(%rip),%rsi # 36b41738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd00>\n+\tlea 0x369c4138(%rip),%rsi # 36b42738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd00>\n \tlea 0x17674f(%rip),%rcx # 2f4d56 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1aae6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3162(%rip),%rsi # 36b41790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd58>\n+\tlea 0x369c4162(%rip),%rsi # 36b42790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd58>\n \tlea 0x1767a6(%rip),%rcx # 2f4ddb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ab6b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c313c(%rip),%rsi # 36b41798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd60>\n+\tlea 0x369c413c(%rip),%rsi # 36b42798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd60>\n \tlea 0x160b3d(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c30b6(%rip),%rsi # 36b41740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd08>\n+\tlea 0x369c40b6(%rip),%rsi # 36b42740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd08>\n \tlea 0x176799(%rip),%rcx # 2f4e2a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1abba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3090(%rip),%rsi # 36b41748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd10>\n+\tlea 0x369c4090(%rip),%rsi # 36b42748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd10>\n \tlea 0x1767f0(%rip),%rcx # 2f4eaf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ac3f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c30ba(%rip),%rsi # 36b417a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd68>\n+\tlea 0x369c40ba(%rip),%rsi # 36b427a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd68>\n \tlea 0x176847(%rip),%rcx # 2f4f34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1acc4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3094(%rip),%rsi # 36b417a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd70>\n+\tlea 0x369c4094(%rip),%rsi # 36b427a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd70>\n \tlea 0x15fd12(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c300e(%rip),%rsi # 36b41750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd18>\n+\tlea 0x369c400e(%rip),%rsi # 36b42750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd18>\n \tlea 0x17683a(%rip),%rcx # 2f4f83 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ad13>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c2fe8(%rip),%rsi # 36b41758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd20>\n+\tlea 0x369c3fe8(%rip),%rsi # 36b42758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd20>\n \tlea 0x176891(%rip),%rcx # 2f5008 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ad98>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c3012(%rip),%rsi # 36b417b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd78>\n+\tlea 0x369c4012(%rip),%rsi # 36b427b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd78>\n \tlea 0x1768e8(%rip),%rcx # 2f508d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ae1d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369c2fec(%rip),%rsi # 36b417b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd80>\n+\tlea 0x369c3fec(%rip),%rsi # 36b427b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd80>\n \tlea 0x160c4e(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 17e800 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3eb0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369c7c41(%rip),%rdi # 36b46448 ::get_beta()::val@@Base+0x130>\n+\tmov 0x369c8c41(%rip),%rdi # 36b47448 ::get_beta()::val@@Base+0x130>\n \ttest %rdi,%rdi\n \tje 17e821 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ed1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369c7c2b(%rip) # 36b46448 ::get_beta()::val@@Base+0x130>\n+\tmovq $0x0,0x369c8c2b(%rip) # 36b47448 ::get_beta()::val@@Base+0x130>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000017e830 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -306807,16 +306807,16 @@\n \tmov $0x2880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369c2e8f(%rip),%rax # 36b41708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd0>\n-\tlea 0x369c2e80(%rip),%rdx # 36b41700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc8>\n+\tlea 0x369c3e8f(%rip),%rax # 36b42708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd0>\n+\tlea 0x369c3e80(%rip),%rdx # 36b42700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcc8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -307676,15 +307676,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c228b(%rip),%rdi # 36b41760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd28>\n+\tlea 0x369c328b(%rip),%rdi # 36b42760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd28>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 17f61a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -307732,15 +307732,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c216d(%rip),%rdi # 36b41768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd30>\n+\tlea 0x369c316d(%rip),%rdi # 36b42768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd30>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -307998,16 +307998,16 @@\n \tmov $0x3080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369c1ccf(%rip),%rax # 36b41718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce0>\n-\tlea 0x369c1cc0(%rip),%rdx # 36b41710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd8>\n+\tlea 0x369c2ccf(%rip),%rax # 36b42718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce0>\n+\tlea 0x369c2cc0(%rip),%rdx # 36b42710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcd8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -308867,15 +308867,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c10cb(%rip),%rdi # 36b41770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd38>\n+\tlea 0x369c20cb(%rip),%rdi # 36b42770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd38>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1807ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -308923,15 +308923,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369c0fad(%rip),%rdi # 36b41778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd40>\n+\tlea 0x369c1fad(%rip),%rdi # 36b42778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd40>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -309189,16 +309189,16 @@\n \tmov $0x3880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369c0b0f(%rip),%rax # 36b41728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf0>\n-\tlea 0x369c0b00(%rip),%rdx # 36b41720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce8>\n+\tlea 0x369c1b0f(%rip),%rax # 36b42728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf0>\n+\tlea 0x369c1b00(%rip),%rdx # 36b42720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xce8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -310058,15 +310058,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bff0b(%rip),%rdi # 36b41780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd48>\n+\tlea 0x369c0f0b(%rip),%rdi # 36b42780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd48>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1819ba (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -310114,15 +310114,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bfded(%rip),%rdi # 36b41788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd50>\n+\tlea 0x369c0ded(%rip),%rdi # 36b42788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd50>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -310380,16 +310380,16 @@\n \tmov $0x4080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369bf94f(%rip),%rax # 36b41738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd00>\n-\tlea 0x369bf940(%rip),%rdx # 36b41730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf8>\n+\tlea 0x369c094f(%rip),%rax # 36b42738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd00>\n+\tlea 0x369c0940(%rip),%rdx # 36b42730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xcf8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -311249,15 +311249,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bed4b(%rip),%rdi # 36b41790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd58>\n+\tlea 0x369bfd4b(%rip),%rdi # 36b42790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd58>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 182b8a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -311305,15 +311305,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bec2d(%rip),%rdi # 36b41798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd60>\n+\tlea 0x369bfc2d(%rip),%rdi # 36b42798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd60>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -311571,16 +311571,16 @@\n \tmov $0x4880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369be78f(%rip),%rax # 36b41748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd10>\n-\tlea 0x369be780(%rip),%rdx # 36b41740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd08>\n+\tlea 0x369bf78f(%rip),%rax # 36b42748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd10>\n+\tlea 0x369bf780(%rip),%rdx # 36b42740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd08>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -312440,15 +312440,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bdb8b(%rip),%rdi # 36b417a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd68>\n+\tlea 0x369beb8b(%rip),%rdi # 36b427a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd68>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 183d5a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -312496,15 +312496,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bda6d(%rip),%rdi # 36b417a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd70>\n+\tlea 0x369bea6d(%rip),%rdi # 36b427a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd70>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -312762,16 +312762,16 @@\n \tmov $0x4480,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 8, 4>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369bd5cf(%rip),%rax # 36b41758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd20>\n-\tlea 0x369bd5c0(%rip),%rdx # 36b41750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd18>\n+\tlea 0x369be5cf(%rip),%rax # 36b42758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd20>\n+\tlea 0x369be5c0(%rip),%rdx # 36b42750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd18>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -313631,15 +313631,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bc9cb(%rip),%rdi # 36b417b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd78>\n+\tlea 0x369bd9cb(%rip),%rdi # 36b427b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd78>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 184f2a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -313687,15 +313687,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369bc8ad(%rip),%rdi # 36b417b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd80>\n+\tlea 0x369bd8ad(%rip),%rdi # 36b427b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd80>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -314020,15 +314020,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bc20b(%rip),%rdi # 36b417c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd88>\n+\tlea 0x369bd20b(%rip),%rdi # 36b427c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd88>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314124,15 +314124,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bbf43(%rip),%rdi # 36b417c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd90>\n+\tlea 0x369bcf43(%rip),%rdi # 36b427c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd90>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314228,15 +314228,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bbc7b(%rip),%rdi # 36b417d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd98>\n+\tlea 0x369bcc7b(%rip),%rdi # 36b427d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd98>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314332,15 +314332,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bb9b3(%rip),%rdi # 36b417d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda0>\n+\tlea 0x369bc9b3(%rip),%rdi # 36b427d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314436,15 +314436,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bb6eb(%rip),%rdi # 36b417e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda8>\n+\tlea 0x369bc6eb(%rip),%rdi # 36b427e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314540,15 +314540,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bb423(%rip),%rdi # 36b417e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb0>\n+\tlea 0x369bc423(%rip),%rdi # 36b427e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314644,15 +314644,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bb15b(%rip),%rdi # 36b417f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb8>\n+\tlea 0x369bc15b(%rip),%rdi # 36b427f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314748,15 +314748,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369bae93(%rip),%rdi # 36b417f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc0>\n+\tlea 0x369bbe93(%rip),%rdi # 36b427f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314852,15 +314852,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369babcb(%rip),%rdi # 36b41800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc8>\n+\tlea 0x369bbbcb(%rip),%rdi # 36b42800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -314956,15 +314956,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ba903(%rip),%rdi # 36b41808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd0>\n+\tlea 0x369bb903(%rip),%rdi # 36b42808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -315060,15 +315060,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ba63b(%rip),%rdi # 36b41810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd8>\n+\tlea 0x369bb63b(%rip),%rdi # 36b42810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -315164,15 +315164,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x369ba373(%rip),%rdi # 36b41818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde0>\n+\tlea 0x369bb373(%rip),%rdi # 36b42818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -315198,15 +315198,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ba2d0(%rip),%rdi # 36b41820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde8>\n+\tlea 0x369bb2d0(%rip),%rdi # 36b42820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -315229,15 +315229,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ba246(%rip),%rdi # 36b41828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf0>\n+\tlea 0x369bb246(%rip),%rdi # 36b42828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -315263,15 +315263,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ba1b0(%rip),%rdi # 36b41830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf8>\n+\tlea 0x369bb1b0(%rip),%rdi # 36b42830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -315294,15 +315294,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ba126(%rip),%rdi # 36b41838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe00>\n+\tlea 0x369bb126(%rip),%rdi # 36b42838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe00>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -315328,15 +315328,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ba090(%rip),%rdi # 36b41840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe08>\n+\tlea 0x369bb090(%rip),%rdi # 36b42840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe08>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -315359,15 +315359,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369ba006(%rip),%rdi # 36b41848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe10>\n+\tlea 0x369bb006(%rip),%rdi # 36b42848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe10>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -315393,15 +315393,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b9f70(%rip),%rdi # 36b41850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe18>\n+\tlea 0x369baf70(%rip),%rdi # 36b42850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe18>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -315424,15 +315424,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369b9ee6(%rip),%rdi # 36b41858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe20>\n+\tlea 0x369baee6(%rip),%rdi # 36b42858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe20>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -315458,15 +315458,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b9e50(%rip),%rdi # 36b41860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe28>\n+\tlea 0x369bae50(%rip),%rdi # 36b42860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe28>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -315489,15 +315489,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369b9dc6(%rip),%rdi # 36b41868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe30>\n+\tlea 0x369badc6(%rip),%rdi # 36b42868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe30>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -315523,15 +315523,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b9d30(%rip),%rdi # 36b41870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe38>\n+\tlea 0x369bad30(%rip),%rdi # 36b42870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe38>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -315554,284 +315554,284 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x369b9ca6(%rip),%rdi # 36b41878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe40>\n+\tlea 0x369baca6(%rip),%rdi # 36b42878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe40>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369be854(%rip),%rbx # 36b46450 ::get_beta()::val@@Base+0x138>\n+\tmov 0x369bf854(%rip),%rbx # 36b47450 ::get_beta()::val@@Base+0x138>\n \ttest %rbx,%rbx\n \tjne 187c17 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3a57>\n-\tlea 0x369bd988(%rip),%rdi # 36b45590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b58>\n+\tlea 0x369be988(%rip),%rdi # 36b46590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b58>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369be839(%rip) # 36b46450 ::get_beta()::val@@Base+0x138>\n+\tmov %rax,0x369bf839(%rip) # 36b47450 ::get_beta()::val@@Base+0x138>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9b96(%rip),%rsi # 36b417c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd88>\n+\tlea 0x369bab96(%rip),%rsi # 36b427c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd88>\n \tlea 0x16d4ab(%rip),%rcx # 2f50dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ae6c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9b70(%rip),%rsi # 36b417c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd90>\n+\tlea 0x369bab70(%rip),%rsi # 36b427c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd90>\n \tlea 0x16d500(%rip),%rcx # 2f515f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1aeef>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9b9a(%rip),%rsi # 36b41820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde8>\n+\tlea 0x369bab9a(%rip),%rsi # 36b42820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde8>\n \tlea 0x16d555(%rip),%rcx # 2f51e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1af72>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9b74(%rip),%rsi # 36b41828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf0>\n+\tlea 0x369bab74(%rip),%rsi # 36b42828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf0>\n \tlea 0x156661(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9aee(%rip),%rsi # 36b417d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd98>\n+\tlea 0x369baaee(%rip),%rsi # 36b427d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd98>\n \tlea 0x16d547(%rip),%rcx # 2f5230 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1afc0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9ac8(%rip),%rsi # 36b417d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda0>\n+\tlea 0x369baac8(%rip),%rsi # 36b427d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda0>\n \tlea 0x16d59c(%rip),%rcx # 2f52b3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b043>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9af2(%rip),%rsi # 36b41830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf8>\n+\tlea 0x369baaf2(%rip),%rsi # 36b42830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf8>\n \tlea 0x16d5f1(%rip),%rcx # 2f5336 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b0c6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9acc(%rip),%rsi # 36b41838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe00>\n+\tlea 0x369baacc(%rip),%rsi # 36b42838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe00>\n \tlea 0x157118(%rip),%rcx # 2dee8b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4c1b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9a46(%rip),%rsi # 36b417e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda8>\n+\tlea 0x369baa46(%rip),%rsi # 36b427e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda8>\n \tlea 0x16d5e3(%rip),%rcx # 2f5384 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b114>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9a20(%rip),%rsi # 36b417e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb0>\n+\tlea 0x369baa20(%rip),%rsi # 36b427e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb0>\n \tlea 0x16d638(%rip),%rcx # 2f5407 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b197>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9a4a(%rip),%rsi # 36b41840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe08>\n+\tlea 0x369baa4a(%rip),%rsi # 36b42840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe08>\n \tlea 0x16d68d(%rip),%rcx # 2f548a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b21a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9a24(%rip),%rsi # 36b41848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe10>\n+\tlea 0x369baa24(%rip),%rsi # 36b42848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe10>\n \tlea 0x1571e9(%rip),%rcx # 2df014 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4da4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b999e(%rip),%rsi # 36b417f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb8>\n+\tlea 0x369ba99e(%rip),%rsi # 36b427f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb8>\n \tlea 0x16d67f(%rip),%rcx # 2f54d8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b268>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9978(%rip),%rsi # 36b417f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc0>\n+\tlea 0x369ba978(%rip),%rsi # 36b427f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc0>\n \tlea 0x16d6d6(%rip),%rcx # 2f555d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b2ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b99a2(%rip),%rsi # 36b41850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe18>\n+\tlea 0x369ba9a2(%rip),%rsi # 36b42850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe18>\n \tlea 0x16d72d(%rip),%rcx # 2f55e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b372>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b997c(%rip),%rsi # 36b41858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe20>\n+\tlea 0x369ba97c(%rip),%rsi # 36b42858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe20>\n \tlea 0x1572bd(%rip),%rcx # 2df1a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x4f30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b98f6(%rip),%rsi # 36b41800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc8>\n+\tlea 0x369ba8f6(%rip),%rsi # 36b42800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc8>\n \tlea 0x16d720(%rip),%rcx # 2f5631 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b3c1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b98d0(%rip),%rsi # 36b41808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd0>\n+\tlea 0x369ba8d0(%rip),%rsi # 36b42808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd0>\n \tlea 0x16d777(%rip),%rcx # 2f56b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b446>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b98fa(%rip),%rsi # 36b41860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe28>\n+\tlea 0x369ba8fa(%rip),%rsi # 36b42860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe28>\n \tlea 0x16d7ce(%rip),%rcx # 2f573b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b4cb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b98d4(%rip),%rsi # 36b41868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe30>\n+\tlea 0x369ba8d4(%rip),%rsi # 36b42868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe30>\n \tlea 0x156492(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b984e(%rip),%rsi # 36b41810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd8>\n+\tlea 0x369ba84e(%rip),%rsi # 36b42810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd8>\n \tlea 0x16d7c1(%rip),%rcx # 2f578a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b51a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9828(%rip),%rsi # 36b41818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde0>\n+\tlea 0x369ba828(%rip),%rsi # 36b42818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde0>\n \tlea 0x16d818(%rip),%rcx # 2f580f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b59f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b9852(%rip),%rsi # 36b41870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe38>\n+\tlea 0x369ba852(%rip),%rsi # 36b42870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe38>\n \tlea 0x16d86f(%rip),%rcx # 2f5894 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b624>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369b982c(%rip),%rsi # 36b41878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe40>\n+\tlea 0x369ba82c(%rip),%rsi # 36b42878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe40>\n \tlea 0x1573ce(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0x12(%rip),%rdi # 188080 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ec0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax,%rax,1)\n __hip_module_dtor():\n-\tmov 0x369be3c9(%rip),%rdi # 36b46450 ::get_beta()::val@@Base+0x138>\n+\tmov 0x369bf3c9(%rip),%rdi # 36b47450 ::get_beta()::val@@Base+0x138>\n \ttest %rdi,%rdi\n \tje 1880a1 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3ee1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369be3b3(%rip) # 36b46450 ::get_beta()::val@@Base+0x138>\n+\tmovq $0x0,0x369bf3b3(%rip) # 36b47450 ::get_beta()::val@@Base+0x138>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001880b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -315857,16 +315857,16 @@\n \tmov $0x2880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<64, 64, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369b96cf(%rip),%rax # 36b417c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd90>\n-\tlea 0x369b96c0(%rip),%rdx # 36b417c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd88>\n+\tlea 0x369ba6cf(%rip),%rax # 36b427c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd90>\n+\tlea 0x369ba6c0(%rip),%rdx # 36b427c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd88>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -316726,15 +316726,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b8acb(%rip),%rdi # 36b41820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde8>\n+\tlea 0x369b9acb(%rip),%rdi # 36b42820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 188e9a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -316782,15 +316782,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b89ad(%rip),%rdi # 36b41828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf0>\n+\tlea 0x369b99ad(%rip),%rdi # 36b42828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -317048,16 +317048,16 @@\n \tmov $0x3080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<80, 80, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369b850f(%rip),%rax # 36b417d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda0>\n-\tlea 0x369b8500(%rip),%rdx # 36b417d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd98>\n+\tlea 0x369b950f(%rip),%rax # 36b427d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda0>\n+\tlea 0x369b9500(%rip),%rdx # 36b427d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xd98>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -317917,15 +317917,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b790b(%rip),%rdi # 36b41830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf8>\n+\tlea 0x369b890b(%rip),%rdi # 36b42830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdf8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 18a06a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -317973,15 +317973,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b77ed(%rip),%rdi # 36b41838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe00>\n+\tlea 0x369b87ed(%rip),%rdi # 36b42838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe00>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -318239,16 +318239,16 @@\n \tmov $0x3880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<96, 96, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369b734f(%rip),%rax # 36b417e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb0>\n-\tlea 0x369b7340(%rip),%rdx # 36b417e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda8>\n+\tlea 0x369b834f(%rip),%rax # 36b427e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb0>\n+\tlea 0x369b8340(%rip),%rdx # 36b427e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xda8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -319108,15 +319108,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b674b(%rip),%rdi # 36b41840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe08>\n+\tlea 0x369b774b(%rip),%rdi # 36b42840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe08>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 18b23a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -319164,15 +319164,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b662d(%rip),%rdi # 36b41848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe10>\n+\tlea 0x369b762d(%rip),%rdi # 36b42848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe10>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -319430,16 +319430,16 @@\n \tmov $0x4080,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<112, 112, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369b618f(%rip),%rax # 36b417f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc0>\n-\tlea 0x369b6180(%rip),%rdx # 36b417f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb8>\n+\tlea 0x369b718f(%rip),%rax # 36b427f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc0>\n+\tlea 0x369b7180(%rip),%rdx # 36b427f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdb8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -320299,15 +320299,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b558b(%rip),%rdi # 36b41850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe18>\n+\tlea 0x369b658b(%rip),%rdi # 36b42850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe18>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 18c40a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -320355,15 +320355,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b546d(%rip),%rdi # 36b41858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe20>\n+\tlea 0x369b646d(%rip),%rdi # 36b42858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe20>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -320621,16 +320621,16 @@\n \tmov $0x4880,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<128, 128, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369b4fcf(%rip),%rax # 36b41808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd0>\n-\tlea 0x369b4fc0(%rip),%rdx # 36b41800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc8>\n+\tlea 0x369b5fcf(%rip),%rax # 36b42808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd0>\n+\tlea 0x369b5fc0(%rip),%rdx # 36b42800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdc8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -321490,15 +321490,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b43cb(%rip),%rdi # 36b41860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe28>\n+\tlea 0x369b53cb(%rip),%rdi # 36b42860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe28>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 18d5da (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -321546,15 +321546,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b42ad(%rip),%rdi # 36b41868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe30>\n+\tlea 0x369b52ad(%rip),%rdi # 36b42868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe30>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -321812,16 +321812,16 @@\n \tmov $0x8400,%r8d\n void ggml_cuda_flash_attn_ext_mma_f16_case<256, 256, 8, 8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1400\n \tcmovb %rax,%r8\n \txorps %xmm0,%xmm0\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1407\n \tucomiss 0x5c(%rbx),%xmm0\n-\tlea 0x369b3e0f(%rip),%rax # 36b41818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde0>\n-\tlea 0x369b3e00(%rip),%rdx # 36b41810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd8>\n+\tlea 0x369b4e0f(%rip),%rax # 36b42818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xde0>\n+\tlea 0x369b4e00(%rip),%rdx # 36b42810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xdd8>\n \tcmovne %rax,%rdx\n \tcmovp %rax,%rdx\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-mma-f16.cuh:1431\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \tmov $0x100,%r9d\n@@ -322681,15 +322681,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b320b(%rip),%rdi # 36b41870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe38>\n+\tlea 0x369b420b(%rip),%rdi # 36b42870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe38>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 18e7aa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd6a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -322737,15 +322737,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x369b30ed(%rip),%rdi # 36b41878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe40>\n+\tlea 0x369b40ed(%rip),%rdi # 36b42878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe40>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -323035,15 +323035,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b2b58(%rip),%rdi # 36b41880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe48>\n+\tlea 0x369b3b58(%rip),%rdi # 36b42880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323104,15 +323104,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b29a0(%rip),%rdi # 36b41888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe50>\n+\tlea 0x369b39a0(%rip),%rdi # 36b42888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323153,15 +323153,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b2886(%rip),%rdi # 36b41890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe58>\n+\tlea 0x369b3886(%rip),%rdi # 36b42890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323202,15 +323202,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b276e(%rip),%rdi # 36b41898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe60>\n+\tlea 0x369b376e(%rip),%rdi # 36b42898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323271,15 +323271,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b25b8(%rip),%rdi # 36b418a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe68>\n+\tlea 0x369b35b8(%rip),%rdi # 36b428a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323340,15 +323340,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b2400(%rip),%rdi # 36b418a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe70>\n+\tlea 0x369b3400(%rip),%rdi # 36b428a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323389,15 +323389,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b22e6(%rip),%rdi # 36b418b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe78>\n+\tlea 0x369b32e6(%rip),%rdi # 36b428b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323438,15 +323438,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b21ce(%rip),%rdi # 36b418b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe80>\n+\tlea 0x369b31ce(%rip),%rdi # 36b428b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323507,15 +323507,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b2018(%rip),%rdi # 36b418c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe88>\n+\tlea 0x369b3018(%rip),%rdi # 36b428c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323576,15 +323576,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b1e60(%rip),%rdi # 36b418c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe90>\n+\tlea 0x369b2e60(%rip),%rdi # 36b428c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323625,15 +323625,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b1d46(%rip),%rdi # 36b418d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe98>\n+\tlea 0x369b2d46(%rip),%rdi # 36b428d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323674,15 +323674,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b1c2e(%rip),%rdi # 36b418d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea0>\n+\tlea 0x369b2c2e(%rip),%rdi # 36b428d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323743,15 +323743,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b1a78(%rip),%rdi # 36b418e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea8>\n+\tlea 0x369b2a78(%rip),%rdi # 36b428e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323812,15 +323812,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b18c0(%rip),%rdi # 36b418e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb0>\n+\tlea 0x369b28c0(%rip),%rdi # 36b428e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323861,15 +323861,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b17a6(%rip),%rdi # 36b418f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb8>\n+\tlea 0x369b27a6(%rip),%rdi # 36b428f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323910,15 +323910,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b168e(%rip),%rdi # 36b418f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec0>\n+\tlea 0x369b268e(%rip),%rdi # 36b428f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -323979,15 +323979,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b14d8(%rip),%rdi # 36b41900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec8>\n+\tlea 0x369b24d8(%rip),%rdi # 36b42900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324048,15 +324048,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b1320(%rip),%rdi # 36b41908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed0>\n+\tlea 0x369b2320(%rip),%rdi # 36b42908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324097,15 +324097,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b1206(%rip),%rdi # 36b41910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed8>\n+\tlea 0x369b2206(%rip),%rdi # 36b42910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324146,15 +324146,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b10ee(%rip),%rdi # 36b41918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee0>\n+\tlea 0x369b20ee(%rip),%rdi # 36b42918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324215,15 +324215,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b0f38(%rip),%rdi # 36b41920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee8>\n+\tlea 0x369b1f38(%rip),%rdi # 36b42920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324284,15 +324284,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b0d80(%rip),%rdi # 36b41928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef0>\n+\tlea 0x369b1d80(%rip),%rdi # 36b42928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324333,15 +324333,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b0c66(%rip),%rdi # 36b41930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef8>\n+\tlea 0x369b1c66(%rip),%rdi # 36b42930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324382,15 +324382,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b0b4e(%rip),%rdi # 36b41938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf00>\n+\tlea 0x369b1b4e(%rip),%rdi # 36b42938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324451,15 +324451,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b0998(%rip),%rdi # 36b41940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf08>\n+\tlea 0x369b1998(%rip),%rdi # 36b42940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324520,15 +324520,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b07e0(%rip),%rdi # 36b41948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf10>\n+\tlea 0x369b17e0(%rip),%rdi # 36b42948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324569,15 +324569,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b06c6(%rip),%rdi # 36b41950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf18>\n+\tlea 0x369b16c6(%rip),%rdi # 36b42950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324618,15 +324618,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b05ae(%rip),%rdi # 36b41958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf20>\n+\tlea 0x369b15ae(%rip),%rdi # 36b42958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324687,15 +324687,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b03f8(%rip),%rdi # 36b41960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf28>\n+\tlea 0x369b13f8(%rip),%rdi # 36b42960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324756,15 +324756,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369b0240(%rip),%rdi # 36b41968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf30>\n+\tlea 0x369b1240(%rip),%rdi # 36b42968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324805,15 +324805,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b0126(%rip),%rdi # 36b41970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf38>\n+\tlea 0x369b1126(%rip),%rdi # 36b42970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324854,15 +324854,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369b000e(%rip),%rdi # 36b41978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf40>\n+\tlea 0x369b100e(%rip),%rdi # 36b42978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324923,15 +324923,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369afe58(%rip),%rdi # 36b41980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf48>\n+\tlea 0x369b0e58(%rip),%rdi # 36b42980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -324992,15 +324992,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369afca0(%rip),%rdi # 36b41988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf50>\n+\tlea 0x369b0ca0(%rip),%rdi # 36b42988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325041,15 +325041,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369afb86(%rip),%rdi # 36b41990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf58>\n+\tlea 0x369b0b86(%rip),%rdi # 36b42990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325090,15 +325090,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369afa6e(%rip),%rdi # 36b41998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf60>\n+\tlea 0x369b0a6e(%rip),%rdi # 36b42998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325159,15 +325159,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369af8b8(%rip),%rdi # 36b419a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf68>\n+\tlea 0x369b08b8(%rip),%rdi # 36b429a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325228,15 +325228,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369af700(%rip),%rdi # 36b419a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf70>\n+\tlea 0x369b0700(%rip),%rdi # 36b429a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325277,15 +325277,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369af5e6(%rip),%rdi # 36b419b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf78>\n+\tlea 0x369b05e6(%rip),%rdi # 36b429b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325326,15 +325326,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369af4ce(%rip),%rdi # 36b419b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf80>\n+\tlea 0x369b04ce(%rip),%rdi # 36b429b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325395,15 +325395,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369af318(%rip),%rdi # 36b419c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf88>\n+\tlea 0x369b0318(%rip),%rdi # 36b429c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325464,15 +325464,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369af160(%rip),%rdi # 36b419c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf90>\n+\tlea 0x369b0160(%rip),%rdi # 36b429c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325513,15 +325513,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369af046(%rip),%rdi # 36b419d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf98>\n+\tlea 0x369b0046(%rip),%rdi # 36b429d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325562,15 +325562,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369aef2e(%rip),%rdi # 36b419d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa0>\n+\tlea 0x369aff2e(%rip),%rdi # 36b429d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325631,15 +325631,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369aed78(%rip),%rdi # 36b419e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa8>\n+\tlea 0x369afd78(%rip),%rdi # 36b429e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325700,15 +325700,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369aebc0(%rip),%rdi # 36b419e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb0>\n+\tlea 0x369afbc0(%rip),%rdi # 36b429e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325749,15 +325749,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369aeaa6(%rip),%rdi # 36b419f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb8>\n+\tlea 0x369afaa6(%rip),%rdi # 36b429f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325798,15 +325798,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ae98e(%rip),%rdi # 36b419f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc0>\n+\tlea 0x369af98e(%rip),%rdi # 36b429f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325867,15 +325867,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369ae7d8(%rip),%rdi # 36b41a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc8>\n+\tlea 0x369af7d8(%rip),%rdi # 36b42a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325936,15 +325936,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369ae620(%rip),%rdi # 36b41a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd0>\n+\tlea 0x369af620(%rip),%rdi # 36b42a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -325985,15 +325985,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ae506(%rip),%rdi # 36b41a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd8>\n+\tlea 0x369af506(%rip),%rdi # 36b42a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326034,15 +326034,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ae3ee(%rip),%rdi # 36b41a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe0>\n+\tlea 0x369af3ee(%rip),%rdi # 36b42a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326103,15 +326103,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369ae238(%rip),%rdi # 36b41a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe8>\n+\tlea 0x369af238(%rip),%rdi # 36b42a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326172,15 +326172,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369ae080(%rip),%rdi # 36b41a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff0>\n+\tlea 0x369af080(%rip),%rdi # 36b42a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326221,15 +326221,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369adf66(%rip),%rdi # 36b41a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff8>\n+\tlea 0x369aef66(%rip),%rdi # 36b42a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326270,15 +326270,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ade4e(%rip),%rdi # 36b41a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1000>\n+\tlea 0x369aee4e(%rip),%rdi # 36b42a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1000>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326339,15 +326339,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369adc98(%rip),%rdi # 36b41a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1008>\n+\tlea 0x369aec98(%rip),%rdi # 36b42a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1008>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326408,15 +326408,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369adae0(%rip),%rdi # 36b41a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1010>\n+\tlea 0x369aeae0(%rip),%rdi # 36b42a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1010>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326457,15 +326457,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ad9c6(%rip),%rdi # 36b41a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1018>\n+\tlea 0x369ae9c6(%rip),%rdi # 36b42a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1018>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326506,15 +326506,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ad8ae(%rip),%rdi # 36b41a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1020>\n+\tlea 0x369ae8ae(%rip),%rdi # 36b42a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1020>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326575,15 +326575,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369ad6f8(%rip),%rdi # 36b41a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1028>\n+\tlea 0x369ae6f8(%rip),%rdi # 36b42a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1028>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326644,15 +326644,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369ad540(%rip),%rdi # 36b41a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1030>\n+\tlea 0x369ae540(%rip),%rdi # 36b42a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1030>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326693,15 +326693,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ad426(%rip),%rdi # 36b41a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1038>\n+\tlea 0x369ae426(%rip),%rdi # 36b42a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1038>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -326742,696 +326742,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369ad30e(%rip),%rdi # 36b41a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1040>\n+\tlea 0x369ae30e(%rip),%rdi # 36b42a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1040>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369b1cbc(%rip),%rbx # 36b46458 ::get_beta()::val@@Base+0x140>\n+\tmov 0x369b2cbc(%rip),%rbx # 36b47458 ::get_beta()::val@@Base+0x140>\n \ttest %rbx,%rbx\n \tjne 1947b7 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x6d77>\n-\tlea 0x369b0e00(%rip),%rdi # 36b455a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b70>\n+\tlea 0x369b1e00(%rip),%rdi # 36b465a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b70>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369b1ca1(%rip) # 36b46458 ::get_beta()::val@@Base+0x140>\n+\tmov %rax,0x369b2ca1(%rip) # 36b47458 ::get_beta()::val@@Base+0x140>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ad0b6(%rip),%rsi # 36b41880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe48>\n+\tlea 0x369ae0b6(%rip),%rsi # 36b42880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe48>\n \tlea 0x1611d3(%rip),%rcx # 2f59a4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b734>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ad090(%rip),%rsi # 36b41888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe50>\n+\tlea 0x369ae090(%rip),%rsi # 36b42888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe50>\n \tlea 0x1611f1(%rip),%rcx # 2f59f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b780>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ad06a(%rip),%rsi # 36b41890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe58>\n+\tlea 0x369ae06a(%rip),%rsi # 36b42890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe58>\n \tlea 0x16120f(%rip),%rcx # 2f5a3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b7cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ad044(%rip),%rsi # 36b41898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe60>\n+\tlea 0x369ae044(%rip),%rsi # 36b42898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe60>\n \tlea 0x16122f(%rip),%rcx # 2f5a8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b81a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ad01e(%rip),%rsi # 36b418a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe68>\n+\tlea 0x369ae01e(%rip),%rsi # 36b428a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe68>\n \tlea 0x16124f(%rip),%rcx # 2f5ad8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b868>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acff8(%rip),%rsi # 36b418a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe70>\n+\tlea 0x369adff8(%rip),%rsi # 36b428a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe70>\n \tlea 0x16126e(%rip),%rcx # 2f5b25 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b8b5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acfd2(%rip),%rsi # 36b418b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe78>\n+\tlea 0x369adfd2(%rip),%rsi # 36b428b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe78>\n \tlea 0x16128d(%rip),%rcx # 2f5b72 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b902>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acfac(%rip),%rsi # 36b418b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe80>\n+\tlea 0x369adfac(%rip),%rsi # 36b428b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe80>\n \tlea 0x1612ae(%rip),%rcx # 2f5bc1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b951>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acf86(%rip),%rsi # 36b418c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe88>\n+\tlea 0x369adf86(%rip),%rsi # 36b428c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe88>\n \tlea 0x1612cf(%rip),%rcx # 2f5c10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b9a0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acf60(%rip),%rsi # 36b418c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe90>\n+\tlea 0x369adf60(%rip),%rsi # 36b428c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe90>\n \tlea 0x1612ee(%rip),%rcx # 2f5c5d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b9ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acf3a(%rip),%rsi # 36b418d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe98>\n+\tlea 0x369adf3a(%rip),%rsi # 36b428d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe98>\n \tlea 0x16130d(%rip),%rcx # 2f5caa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ba3a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acf14(%rip),%rsi # 36b418d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea0>\n+\tlea 0x369adf14(%rip),%rsi # 36b428d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea0>\n \tlea 0x16132e(%rip),%rcx # 2f5cf9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ba89>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369aceee(%rip),%rsi # 36b418e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea8>\n+\tlea 0x369adeee(%rip),%rsi # 36b428e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea8>\n \tlea 0x16134f(%rip),%rcx # 2f5d48 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bad8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acec8(%rip),%rsi # 36b418e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb0>\n+\tlea 0x369adec8(%rip),%rsi # 36b428e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb0>\n \tlea 0x16136e(%rip),%rcx # 2f5d95 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bb25>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acea2(%rip),%rsi # 36b418f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb8>\n+\tlea 0x369adea2(%rip),%rsi # 36b428f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb8>\n \tlea 0x16138d(%rip),%rcx # 2f5de2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bb72>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ace7c(%rip),%rsi # 36b418f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec0>\n+\tlea 0x369ade7c(%rip),%rsi # 36b428f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec0>\n \tlea 0x1613ae(%rip),%rcx # 2f5e31 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bbc1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ace56(%rip),%rsi # 36b41900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec8>\n+\tlea 0x369ade56(%rip),%rsi # 36b42900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec8>\n \tlea 0x1613cf(%rip),%rcx # 2f5e80 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bc10>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ace30(%rip),%rsi # 36b41908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed0>\n+\tlea 0x369ade30(%rip),%rsi # 36b42908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed0>\n \tlea 0x1613ee(%rip),%rcx # 2f5ecd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bc5d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ace0a(%rip),%rsi # 36b41910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed8>\n+\tlea 0x369ade0a(%rip),%rsi # 36b42910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed8>\n \tlea 0x16140d(%rip),%rcx # 2f5f1a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bcaa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acde4(%rip),%rsi # 36b41918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee0>\n+\tlea 0x369adde4(%rip),%rsi # 36b42918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee0>\n \tlea 0x16142e(%rip),%rcx # 2f5f69 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bcf9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acdbe(%rip),%rsi # 36b41920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee8>\n+\tlea 0x369addbe(%rip),%rsi # 36b42920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee8>\n \tlea 0x16144f(%rip),%rcx # 2f5fb8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bd48>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acd98(%rip),%rsi # 36b41928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef0>\n+\tlea 0x369add98(%rip),%rsi # 36b42928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef0>\n \tlea 0x16146e(%rip),%rcx # 2f6005 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bd95>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acd72(%rip),%rsi # 36b41930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef8>\n+\tlea 0x369add72(%rip),%rsi # 36b42930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef8>\n \tlea 0x16148d(%rip),%rcx # 2f6052 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bde2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acd4c(%rip),%rsi # 36b41938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf00>\n+\tlea 0x369add4c(%rip),%rsi # 36b42938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf00>\n \tlea 0x1614ae(%rip),%rcx # 2f60a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1be31>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acd26(%rip),%rsi # 36b41940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf08>\n+\tlea 0x369add26(%rip),%rsi # 36b42940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf08>\n \tlea 0x1614cf(%rip),%rcx # 2f60f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1be80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acd00(%rip),%rsi # 36b41948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf10>\n+\tlea 0x369add00(%rip),%rsi # 36b42948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf10>\n \tlea 0x1614ee(%rip),%rcx # 2f613d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1becd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369accda(%rip),%rsi # 36b41950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf18>\n+\tlea 0x369adcda(%rip),%rsi # 36b42950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf18>\n \tlea 0x16150d(%rip),%rcx # 2f618a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bf1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369accb4(%rip),%rsi # 36b41958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf20>\n+\tlea 0x369adcb4(%rip),%rsi # 36b42958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf20>\n \tlea 0x16152e(%rip),%rcx # 2f61d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bf69>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acc8e(%rip),%rsi # 36b41960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf28>\n+\tlea 0x369adc8e(%rip),%rsi # 36b42960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf28>\n \tlea 0x16154f(%rip),%rcx # 2f6228 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bfb8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acc68(%rip),%rsi # 36b41968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf30>\n+\tlea 0x369adc68(%rip),%rsi # 36b42968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf30>\n \tlea 0x16156e(%rip),%rcx # 2f6275 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c005>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acc42(%rip),%rsi # 36b41970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf38>\n+\tlea 0x369adc42(%rip),%rsi # 36b42970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf38>\n \tlea 0x16158d(%rip),%rcx # 2f62c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c052>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acc1c(%rip),%rsi # 36b41978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf40>\n+\tlea 0x369adc1c(%rip),%rsi # 36b42978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf40>\n \tlea 0x1615ae(%rip),%rcx # 2f6311 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c0a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acbf6(%rip),%rsi # 36b41980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf48>\n+\tlea 0x369adbf6(%rip),%rsi # 36b42980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf48>\n \tlea 0x1615cf(%rip),%rcx # 2f6360 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c0f0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acbd0(%rip),%rsi # 36b41988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf50>\n+\tlea 0x369adbd0(%rip),%rsi # 36b42988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf50>\n \tlea 0x1615ee(%rip),%rcx # 2f63ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c13d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acbaa(%rip),%rsi # 36b41990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf58>\n+\tlea 0x369adbaa(%rip),%rsi # 36b42990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf58>\n \tlea 0x16160d(%rip),%rcx # 2f63fa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c18a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acb84(%rip),%rsi # 36b41998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf60>\n+\tlea 0x369adb84(%rip),%rsi # 36b42998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf60>\n \tlea 0x16162e(%rip),%rcx # 2f6449 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c1d9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acb5e(%rip),%rsi # 36b419a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf68>\n+\tlea 0x369adb5e(%rip),%rsi # 36b429a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf68>\n \tlea 0x16164f(%rip),%rcx # 2f6498 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c228>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acb38(%rip),%rsi # 36b419a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf70>\n+\tlea 0x369adb38(%rip),%rsi # 36b429a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf70>\n \tlea 0x16166e(%rip),%rcx # 2f64e5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c275>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acb12(%rip),%rsi # 36b419b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf78>\n+\tlea 0x369adb12(%rip),%rsi # 36b429b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf78>\n \tlea 0x16168d(%rip),%rcx # 2f6532 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c2c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acaec(%rip),%rsi # 36b419b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf80>\n+\tlea 0x369adaec(%rip),%rsi # 36b429b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf80>\n \tlea 0x1616ae(%rip),%rcx # 2f6581 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c311>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acac6(%rip),%rsi # 36b419c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf88>\n+\tlea 0x369adac6(%rip),%rsi # 36b429c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf88>\n \tlea 0x1616cf(%rip),%rcx # 2f65d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c360>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369acaa0(%rip),%rsi # 36b419c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf90>\n+\tlea 0x369adaa0(%rip),%rsi # 36b429c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf90>\n \tlea 0x1616ee(%rip),%rcx # 2f661d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c3ad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369aca7a(%rip),%rsi # 36b419d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf98>\n+\tlea 0x369ada7a(%rip),%rsi # 36b429d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf98>\n \tlea 0x16170d(%rip),%rcx # 2f666a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c3fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369aca54(%rip),%rsi # 36b419d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa0>\n+\tlea 0x369ada54(%rip),%rsi # 36b429d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa0>\n \tlea 0x16172e(%rip),%rcx # 2f66b9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c449>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369aca2e(%rip),%rsi # 36b419e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa8>\n+\tlea 0x369ada2e(%rip),%rsi # 36b429e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa8>\n \tlea 0x16174f(%rip),%rcx # 2f6708 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c498>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369aca08(%rip),%rsi # 36b419e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb0>\n+\tlea 0x369ada08(%rip),%rsi # 36b429e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb0>\n \tlea 0x16176e(%rip),%rcx # 2f6755 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c4e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ac9e2(%rip),%rsi # 36b419f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb8>\n+\tlea 0x369ad9e2(%rip),%rsi # 36b429f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb8>\n \tlea 0x16178d(%rip),%rcx # 2f67a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c532>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ac9bc(%rip),%rsi # 36b419f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc0>\n+\tlea 0x369ad9bc(%rip),%rsi # 36b429f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc0>\n \tlea 0x1617ae(%rip),%rcx # 2f67f1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c581>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ac996(%rip),%rsi # 36b41a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc8>\n+\tlea 0x369ad996(%rip),%rsi # 36b42a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc8>\n \tlea 0x1617cf(%rip),%rcx # 2f6840 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c5d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ac970(%rip),%rsi # 36b41a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd0>\n+\tlea 0x369ad970(%rip),%rsi # 36b42a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd0>\n \tlea 0x1617ef(%rip),%rcx # 2f688e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c61e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ac94a(%rip),%rsi # 36b41a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd8>\n+\tlea 0x369ad94a(%rip),%rsi # 36b42a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd8>\n \tlea 0x16180f(%rip),%rcx # 2f68dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c66c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369ac924(%rip),%rsi # 36b41a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe0>\n+\tlea 0x369ad924(%rip),%rsi # 36b42a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe0>\n \tlea 0x161831(%rip),%rcx # 2f692c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c6bc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac8e7(%rip),%rsi # 36b41a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe8>\n+\tlea 0x369ad8e7(%rip),%rsi # 36b42a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe8>\n \tlea 0x16183c(%rip),%rcx # 2f697c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c70c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac8aa(%rip),%rsi # 36b41a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff0>\n+\tlea 0x369ad8aa(%rip),%rsi # 36b42a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff0>\n \tlea 0x161845(%rip),%rcx # 2f69ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c75a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac86d(%rip),%rsi # 36b41a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff8>\n+\tlea 0x369ad86d(%rip),%rsi # 36b42a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff8>\n \tlea 0x16184e(%rip),%rcx # 2f6a18 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c7a8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac830(%rip),%rsi # 36b41a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1000>\n+\tlea 0x369ad830(%rip),%rsi # 36b42a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1000>\n \tlea 0x161859(%rip),%rcx # 2f6a68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c7f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac7f3(%rip),%rsi # 36b41a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1008>\n+\tlea 0x369ad7f3(%rip),%rsi # 36b42a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1008>\n \tlea 0x161864(%rip),%rcx # 2f6ab8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c848>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac7b6(%rip),%rsi # 36b41a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1010>\n+\tlea 0x369ad7b6(%rip),%rsi # 36b42a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1010>\n \tlea 0x16186d(%rip),%rcx # 2f6b06 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c896>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac779(%rip),%rsi # 36b41a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1018>\n+\tlea 0x369ad779(%rip),%rsi # 36b42a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1018>\n \tlea 0x161876(%rip),%rcx # 2f6b54 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c8e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac73c(%rip),%rsi # 36b41a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1020>\n+\tlea 0x369ad73c(%rip),%rsi # 36b42a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1020>\n \tlea 0x161881(%rip),%rcx # 2f6ba4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c934>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac6ff(%rip),%rsi # 36b41a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1028>\n+\tlea 0x369ad6ff(%rip),%rsi # 36b42a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1028>\n \tlea 0x16188c(%rip),%rcx # 2f6bf4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c984>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac6c2(%rip),%rsi # 36b41a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1030>\n+\tlea 0x369ad6c2(%rip),%rsi # 36b42a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1030>\n \tlea 0x161895(%rip),%rcx # 2f6c42 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1c9d2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac685(%rip),%rsi # 36b41a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1038>\n+\tlea 0x369ad685(%rip),%rsi # 36b42a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1038>\n \tlea 0x16189e(%rip),%rcx # 2f6c90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ca20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369ac648(%rip),%rsi # 36b41a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1040>\n+\tlea 0x369ad648(%rip),%rsi # 36b42a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1040>\n \tlea 0x1618a9(%rip),%rcx # 2f6ce0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ca70>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 195460 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x7a20>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x369b0ff1(%rip),%rdi # 36b46458 ::get_beta()::val@@Base+0x140>\n+\tmov 0x369b1ff1(%rip),%rdi # 36b47458 ::get_beta()::val@@Base+0x140>\n \ttest %rdi,%rdi\n \tje 195481 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x7a41>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369b0fdb(%rip) # 36b46458 ::get_beta()::val@@Base+0x140>\n+\tmovq $0x0,0x369b1fdb(%rip) # 36b47458 ::get_beta()::val@@Base+0x140>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000195490 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)19>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -331044,15 +331044,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a9919(%rip),%rdi # 36b41a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1020>\n+\tlea 0x369aa919(%rip),%rdi # 36b42a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1020>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19842f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -331188,15 +331188,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a9640(%rip),%rdi # 36b41a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1018>\n+\tlea 0x369aa640(%rip),%rdi # 36b42a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1018>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -331347,15 +331347,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a92e3(%rip),%rdi # 36b419f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc0>\n+\tlea 0x369aa2e3(%rip),%rdi # 36b429f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 198a05 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -331491,15 +331491,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a900a(%rip),%rdi # 36b419f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb8>\n+\tlea 0x369aa00a(%rip),%rdi # 36b429f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -331650,15 +331650,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a8c2d(%rip),%rdi # 36b41918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee0>\n+\tlea 0x369a9c2d(%rip),%rdi # 36b42918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xee0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 198fdb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -331794,15 +331794,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a8954(%rip),%rdi # 36b41910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed8>\n+\tlea 0x369a9954(%rip),%rdi # 36b42910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xed8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -331953,15 +331953,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a8757(%rip),%rdi # 36b41a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe0>\n+\tlea 0x369a9757(%rip),%rdi # 36b42a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfe0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1995b1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -332097,15 +332097,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a847e(%rip),%rdi # 36b41a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd8>\n+\tlea 0x369a947e(%rip),%rdi # 36b42a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -332256,15 +332256,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a8121(%rip),%rdi # 36b419b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf80>\n+\tlea 0x369a9121(%rip),%rdi # 36b429b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 199b87 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -332400,15 +332400,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a7e48(%rip),%rdi # 36b419b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf78>\n+\tlea 0x369a8e48(%rip),%rdi # 36b429b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -332559,15 +332559,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a7a6b(%rip),%rdi # 36b418d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea0>\n+\tlea 0x369a8a6b(%rip),%rdi # 36b428d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xea0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19a15d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -332703,15 +332703,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a7792(%rip),%rdi # 36b418d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe98>\n+\tlea 0x369a8792(%rip),%rdi # 36b428d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -332862,15 +332862,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a7635(%rip),%rdi # 36b41a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1040>\n+\tlea 0x369a8635(%rip),%rdi # 36b42a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1040>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19a733 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -333006,15 +333006,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a735c(%rip),%rdi # 36b41a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1038>\n+\tlea 0x369a835c(%rip),%rdi # 36b42a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1038>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -333165,15 +333165,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a6edf(%rip),%rdi # 36b418f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec0>\n+\tlea 0x369a7edf(%rip),%rdi # 36b428f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xec0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19ad09 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -333309,15 +333309,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a6c06(%rip),%rdi # 36b418f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb8>\n+\tlea 0x369a7c06(%rip),%rdi # 36b428f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xeb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -333468,15 +333468,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a6989(%rip),%rdi # 36b41978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf40>\n+\tlea 0x369a7989(%rip),%rdi # 36b42978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19b2df (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -333612,15 +333612,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a66b0(%rip),%rdi # 36b41970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf38>\n+\tlea 0x369a76b0(%rip),%rdi # 36b42970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -333771,15 +333771,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a62d3(%rip),%rdi # 36b41898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe60>\n+\tlea 0x369a72d3(%rip),%rdi # 36b42898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19bb96 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -333921,15 +333921,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a6012(%rip),%rdi # 36b418b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe80>\n+\tlea 0x369a7012(%rip),%rdi # 36b428b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19be8b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -334065,15 +334065,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a5d19(%rip),%rdi # 36b41890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe58>\n+\tlea 0x369a6d19(%rip),%rdi # 36b42890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -334218,15 +334218,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a5a44(%rip),%rdi # 36b418b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe78>\n+\tlea 0x369a6a44(%rip),%rdi # 36b428b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xe78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -334377,15 +334377,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a57c7(%rip),%rdi # 36b41938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf00>\n+\tlea 0x369a67c7(%rip),%rdi # 36b42938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19c461 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -334521,15 +334521,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a54ee(%rip),%rdi # 36b41930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef8>\n+\tlea 0x369a64ee(%rip),%rdi # 36b42930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xef8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -334680,15 +334680,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a52f1(%rip),%rdi # 36b41a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1000>\n+\tlea 0x369a62f1(%rip),%rdi # 36b42a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1000>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19ca37 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -334824,15 +334824,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a5018(%rip),%rdi # 36b41a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff8>\n+\tlea 0x369a6018(%rip),%rdi # 36b42a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xff8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -334983,15 +334983,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a4c3b(%rip),%rdi # 36b41958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf20>\n+\tlea 0x369a5c3b(%rip),%rdi # 36b42958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19d00d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -335127,15 +335127,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a4962(%rip),%rdi # 36b41950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf18>\n+\tlea 0x369a5962(%rip),%rdi # 36b42950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -335286,15 +335286,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a46e5(%rip),%rdi # 36b419d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa0>\n+\tlea 0x369a56e5(%rip),%rdi # 36b429d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xfa0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19d5e3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -335430,15 +335430,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a440c(%rip),%rdi # 36b419d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf98>\n+\tlea 0x369a540c(%rip),%rdi # 36b429d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -335589,15 +335589,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a40cf(%rip),%rdi # 36b41998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf60>\n+\tlea 0x369a50cf(%rip),%rdi # 36b42998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 19dbb9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -335733,15 +335733,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369a3df6(%rip),%rdi # 36b41990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf58>\n+\tlea 0x369a4df6(%rip),%rdi # 36b42990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0xf58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -337584,15 +337584,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 191990 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x3f50>\n \tadd $0x1c8,%rsp\n \tjmp 19f40d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x369a5b07(%rip),%rax \n+\tmov 0x369a6b07(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x156408(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x156407(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -337882,15 +337882,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a2068(%rip),%rdi # 36b41a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1048>\n+\tlea 0x369a3068(%rip),%rdi # 36b42a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1048>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -337951,15 +337951,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a1eb0(%rip),%rdi # 36b41a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1050>\n+\tlea 0x369a2eb0(%rip),%rdi # 36b42a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1050>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338000,15 +338000,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a1d96(%rip),%rdi # 36b41a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1058>\n+\tlea 0x369a2d96(%rip),%rdi # 36b42a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1058>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338049,15 +338049,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a1c7e(%rip),%rdi # 36b41a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1060>\n+\tlea 0x369a2c7e(%rip),%rdi # 36b42a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1060>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338118,15 +338118,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a1ac8(%rip),%rdi # 36b41aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1068>\n+\tlea 0x369a2ac8(%rip),%rdi # 36b42aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1068>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338187,15 +338187,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a1910(%rip),%rdi # 36b41aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1070>\n+\tlea 0x369a2910(%rip),%rdi # 36b42aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1070>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338236,15 +338236,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a17f6(%rip),%rdi # 36b41ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1078>\n+\tlea 0x369a27f6(%rip),%rdi # 36b42ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1078>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338285,15 +338285,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a16de(%rip),%rdi # 36b41ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1080>\n+\tlea 0x369a26de(%rip),%rdi # 36b42ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1080>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338354,15 +338354,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a1528(%rip),%rdi # 36b41ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1088>\n+\tlea 0x369a2528(%rip),%rdi # 36b42ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1088>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338423,15 +338423,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a1370(%rip),%rdi # 36b41ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1090>\n+\tlea 0x369a2370(%rip),%rdi # 36b42ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1090>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338472,15 +338472,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a1256(%rip),%rdi # 36b41ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1098>\n+\tlea 0x369a2256(%rip),%rdi # 36b42ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1098>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338521,15 +338521,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a113e(%rip),%rdi # 36b41ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a0>\n+\tlea 0x369a213e(%rip),%rdi # 36b42ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338590,15 +338590,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a0f88(%rip),%rdi # 36b41ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a8>\n+\tlea 0x369a1f88(%rip),%rdi # 36b42ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338659,15 +338659,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a0dd0(%rip),%rdi # 36b41ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b0>\n+\tlea 0x369a1dd0(%rip),%rdi # 36b42ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338708,15 +338708,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a0cb6(%rip),%rdi # 36b41af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b8>\n+\tlea 0x369a1cb6(%rip),%rdi # 36b42af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338757,15 +338757,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a0b9e(%rip),%rdi # 36b41af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c0>\n+\tlea 0x369a1b9e(%rip),%rdi # 36b42af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338826,15 +338826,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a09e8(%rip),%rdi # 36b41b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c8>\n+\tlea 0x369a19e8(%rip),%rdi # 36b42b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338895,15 +338895,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a0830(%rip),%rdi # 36b41b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d0>\n+\tlea 0x369a1830(%rip),%rdi # 36b42b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338944,15 +338944,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a0716(%rip),%rdi # 36b41b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d8>\n+\tlea 0x369a1716(%rip),%rdi # 36b42b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -338993,15 +338993,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a05fe(%rip),%rdi # 36b41b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e0>\n+\tlea 0x369a15fe(%rip),%rdi # 36b42b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339062,15 +339062,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a0448(%rip),%rdi # 36b41b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e8>\n+\tlea 0x369a1448(%rip),%rdi # 36b42b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339131,15 +339131,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369a0290(%rip),%rdi # 36b41b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f0>\n+\tlea 0x369a1290(%rip),%rdi # 36b42b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339180,15 +339180,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a0176(%rip),%rdi # 36b41b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f8>\n+\tlea 0x369a1176(%rip),%rdi # 36b42b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339229,15 +339229,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369a005e(%rip),%rdi # 36b41b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1100>\n+\tlea 0x369a105e(%rip),%rdi # 36b42b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1100>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339298,15 +339298,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699fea8(%rip),%rdi # 36b41b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1108>\n+\tlea 0x369a0ea8(%rip),%rdi # 36b42b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1108>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339367,15 +339367,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699fcf0(%rip),%rdi # 36b41b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1110>\n+\tlea 0x369a0cf0(%rip),%rdi # 36b42b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1110>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339416,15 +339416,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699fbd6(%rip),%rdi # 36b41b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1118>\n+\tlea 0x369a0bd6(%rip),%rdi # 36b42b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1118>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339465,15 +339465,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699fabe(%rip),%rdi # 36b41b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1120>\n+\tlea 0x369a0abe(%rip),%rdi # 36b42b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1120>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339534,15 +339534,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699f908(%rip),%rdi # 36b41b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1128>\n+\tlea 0x369a0908(%rip),%rdi # 36b42b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1128>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339603,15 +339603,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699f750(%rip),%rdi # 36b41b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1130>\n+\tlea 0x369a0750(%rip),%rdi # 36b42b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1130>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339652,15 +339652,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699f636(%rip),%rdi # 36b41b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1138>\n+\tlea 0x369a0636(%rip),%rdi # 36b42b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1138>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339701,15 +339701,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699f51e(%rip),%rdi # 36b41b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1140>\n+\tlea 0x369a051e(%rip),%rdi # 36b42b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1140>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339770,15 +339770,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699f368(%rip),%rdi # 36b41b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1148>\n+\tlea 0x369a0368(%rip),%rdi # 36b42b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1148>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339839,15 +339839,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699f1b0(%rip),%rdi # 36b41b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1150>\n+\tlea 0x369a01b0(%rip),%rdi # 36b42b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1150>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339888,15 +339888,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699f096(%rip),%rdi # 36b41b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1158>\n+\tlea 0x369a0096(%rip),%rdi # 36b42b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1158>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -339937,15 +339937,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699ef7e(%rip),%rdi # 36b41b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1160>\n+\tlea 0x3699ff7e(%rip),%rdi # 36b42b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1160>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340006,15 +340006,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699edc8(%rip),%rdi # 36b41ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1168>\n+\tlea 0x3699fdc8(%rip),%rdi # 36b42ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1168>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340075,15 +340075,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699ec10(%rip),%rdi # 36b41ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1170>\n+\tlea 0x3699fc10(%rip),%rdi # 36b42ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1170>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340124,15 +340124,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699eaf6(%rip),%rdi # 36b41bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1178>\n+\tlea 0x3699faf6(%rip),%rdi # 36b42bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1178>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340173,15 +340173,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699e9de(%rip),%rdi # 36b41bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1180>\n+\tlea 0x3699f9de(%rip),%rdi # 36b42bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1180>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340242,15 +340242,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699e828(%rip),%rdi # 36b41bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1188>\n+\tlea 0x3699f828(%rip),%rdi # 36b42bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1188>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340311,15 +340311,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699e670(%rip),%rdi # 36b41bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1190>\n+\tlea 0x3699f670(%rip),%rdi # 36b42bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1190>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340360,15 +340360,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699e556(%rip),%rdi # 36b41bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1198>\n+\tlea 0x3699f556(%rip),%rdi # 36b42bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1198>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340409,15 +340409,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699e43e(%rip),%rdi # 36b41bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a0>\n+\tlea 0x3699f43e(%rip),%rdi # 36b42bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340478,15 +340478,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699e288(%rip),%rdi # 36b41be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a8>\n+\tlea 0x3699f288(%rip),%rdi # 36b42be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340547,15 +340547,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699e0d0(%rip),%rdi # 36b41be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b0>\n+\tlea 0x3699f0d0(%rip),%rdi # 36b42be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340596,15 +340596,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699dfb6(%rip),%rdi # 36b41bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b8>\n+\tlea 0x3699efb6(%rip),%rdi # 36b42bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340645,15 +340645,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699de9e(%rip),%rdi # 36b41bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c0>\n+\tlea 0x3699ee9e(%rip),%rdi # 36b42bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340714,15 +340714,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699dce8(%rip),%rdi # 36b41c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c8>\n+\tlea 0x3699ece8(%rip),%rdi # 36b42c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340783,15 +340783,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699db30(%rip),%rdi # 36b41c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d0>\n+\tlea 0x3699eb30(%rip),%rdi # 36b42c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340832,15 +340832,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699da16(%rip),%rdi # 36b41c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d8>\n+\tlea 0x3699ea16(%rip),%rdi # 36b42c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340881,15 +340881,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699d8fe(%rip),%rdi # 36b41c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e0>\n+\tlea 0x3699e8fe(%rip),%rdi # 36b42c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -340950,15 +340950,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699d748(%rip),%rdi # 36b41c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e8>\n+\tlea 0x3699e748(%rip),%rdi # 36b42c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341019,15 +341019,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699d590(%rip),%rdi # 36b41c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f0>\n+\tlea 0x3699e590(%rip),%rdi # 36b42c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341068,15 +341068,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699d476(%rip),%rdi # 36b41c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f8>\n+\tlea 0x3699e476(%rip),%rdi # 36b42c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341117,15 +341117,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699d35e(%rip),%rdi # 36b41c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1200>\n+\tlea 0x3699e35e(%rip),%rdi # 36b42c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1200>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341186,15 +341186,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699d1a8(%rip),%rdi # 36b41c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1208>\n+\tlea 0x3699e1a8(%rip),%rdi # 36b42c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1208>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341255,15 +341255,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699cff0(%rip),%rdi # 36b41c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1210>\n+\tlea 0x3699dff0(%rip),%rdi # 36b42c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1210>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341304,15 +341304,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699ced6(%rip),%rdi # 36b41c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1218>\n+\tlea 0x3699ded6(%rip),%rdi # 36b42c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1218>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341353,15 +341353,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699cdbe(%rip),%rdi # 36b41c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1220>\n+\tlea 0x3699ddbe(%rip),%rdi # 36b42c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1220>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341422,15 +341422,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699cc08(%rip),%rdi # 36b41c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1228>\n+\tlea 0x3699dc08(%rip),%rdi # 36b42c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1228>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341491,15 +341491,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3699ca50(%rip),%rdi # 36b41c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1230>\n+\tlea 0x3699da50(%rip),%rdi # 36b42c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1230>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341540,15 +341540,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699c936(%rip),%rdi # 36b41c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1238>\n+\tlea 0x3699d936(%rip),%rdi # 36b42c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1238>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -341589,696 +341589,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699c81e(%rip),%rdi # 36b41c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1240>\n+\tlea 0x3699d81e(%rip),%rdi # 36b42c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1240>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369a0fd4(%rip),%rbx # 36b46460 ::get_beta()::val@@Base+0x148>\n+\tmov 0x369a1fd4(%rip),%rbx # 36b47460 ::get_beta()::val@@Base+0x148>\n \ttest %rbx,%rbx\n \tjne 1a54a7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x369a0128(%rip),%rdi # 36b455c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b88>\n+\tlea 0x369a1128(%rip),%rdi # 36b465c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4b88>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369a0fb9(%rip) # 36b46460 ::get_beta()::val@@Base+0x148>\n+\tmov %rax,0x369a1fb9(%rip) # 36b47460 ::get_beta()::val@@Base+0x148>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c5c6(%rip),%rsi # 36b41a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1048>\n+\tlea 0x3699d5c6(%rip),%rsi # 36b42a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1048>\n \tlea 0x15186f(%rip),%rcx # 2f6d30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cac0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c5a0(%rip),%rsi # 36b41a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1050>\n+\tlea 0x3699d5a0(%rip),%rsi # 36b42a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1050>\n \tlea 0x15188d(%rip),%rcx # 2f6d7c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cb0c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c57a(%rip),%rsi # 36b41a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1058>\n+\tlea 0x3699d57a(%rip),%rsi # 36b42a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1058>\n \tlea 0x1518ab(%rip),%rcx # 2f6dc8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cb58>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c554(%rip),%rsi # 36b41a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1060>\n+\tlea 0x3699d554(%rip),%rsi # 36b42a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1060>\n \tlea 0x1518cb(%rip),%rcx # 2f6e16 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cba6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c52e(%rip),%rsi # 36b41aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1068>\n+\tlea 0x3699d52e(%rip),%rsi # 36b42aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1068>\n \tlea 0x1518eb(%rip),%rcx # 2f6e64 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cbf4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c508(%rip),%rsi # 36b41aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1070>\n+\tlea 0x3699d508(%rip),%rsi # 36b42aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1070>\n \tlea 0x15190a(%rip),%rcx # 2f6eb1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cc41>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c4e2(%rip),%rsi # 36b41ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1078>\n+\tlea 0x3699d4e2(%rip),%rsi # 36b42ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1078>\n \tlea 0x151929(%rip),%rcx # 2f6efe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cc8e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c4bc(%rip),%rsi # 36b41ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1080>\n+\tlea 0x3699d4bc(%rip),%rsi # 36b42ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1080>\n \tlea 0x15194a(%rip),%rcx # 2f6f4d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ccdd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c496(%rip),%rsi # 36b41ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1088>\n+\tlea 0x3699d496(%rip),%rsi # 36b42ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1088>\n \tlea 0x15196b(%rip),%rcx # 2f6f9c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cd2c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c470(%rip),%rsi # 36b41ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1090>\n+\tlea 0x3699d470(%rip),%rsi # 36b42ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1090>\n \tlea 0x15198a(%rip),%rcx # 2f6fe9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cd79>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c44a(%rip),%rsi # 36b41ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1098>\n+\tlea 0x3699d44a(%rip),%rsi # 36b42ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1098>\n \tlea 0x1519a9(%rip),%rcx # 2f7036 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cdc6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c424(%rip),%rsi # 36b41ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a0>\n+\tlea 0x3699d424(%rip),%rsi # 36b42ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a0>\n \tlea 0x1519ca(%rip),%rcx # 2f7085 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ce15>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c3fe(%rip),%rsi # 36b41ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a8>\n+\tlea 0x3699d3fe(%rip),%rsi # 36b42ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a8>\n \tlea 0x1519eb(%rip),%rcx # 2f70d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ce64>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c3d8(%rip),%rsi # 36b41ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b0>\n+\tlea 0x3699d3d8(%rip),%rsi # 36b42ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b0>\n \tlea 0x151a0a(%rip),%rcx # 2f7121 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ceb1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c3b2(%rip),%rsi # 36b41af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b8>\n+\tlea 0x3699d3b2(%rip),%rsi # 36b42af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b8>\n \tlea 0x151a29(%rip),%rcx # 2f716e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cefe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c38c(%rip),%rsi # 36b41af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c0>\n+\tlea 0x3699d38c(%rip),%rsi # 36b42af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c0>\n \tlea 0x151a4a(%rip),%rcx # 2f71bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cf4d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c366(%rip),%rsi # 36b41b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c8>\n+\tlea 0x3699d366(%rip),%rsi # 36b42b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c8>\n \tlea 0x151a6b(%rip),%rcx # 2f720c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cf9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c340(%rip),%rsi # 36b41b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d0>\n+\tlea 0x3699d340(%rip),%rsi # 36b42b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d0>\n \tlea 0x151a8a(%rip),%rcx # 2f7259 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1cfe9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c31a(%rip),%rsi # 36b41b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d8>\n+\tlea 0x3699d31a(%rip),%rsi # 36b42b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d8>\n \tlea 0x151aa9(%rip),%rcx # 2f72a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d036>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c2f4(%rip),%rsi # 36b41b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e0>\n+\tlea 0x3699d2f4(%rip),%rsi # 36b42b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e0>\n \tlea 0x151aca(%rip),%rcx # 2f72f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d085>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c2ce(%rip),%rsi # 36b41b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e8>\n+\tlea 0x3699d2ce(%rip),%rsi # 36b42b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e8>\n \tlea 0x151aeb(%rip),%rcx # 2f7344 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d0d4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c2a8(%rip),%rsi # 36b41b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f0>\n+\tlea 0x3699d2a8(%rip),%rsi # 36b42b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f0>\n \tlea 0x151b0a(%rip),%rcx # 2f7391 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d121>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c282(%rip),%rsi # 36b41b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f8>\n+\tlea 0x3699d282(%rip),%rsi # 36b42b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f8>\n \tlea 0x151b29(%rip),%rcx # 2f73de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d16e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c25c(%rip),%rsi # 36b41b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1100>\n+\tlea 0x3699d25c(%rip),%rsi # 36b42b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1100>\n \tlea 0x151b4a(%rip),%rcx # 2f742d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d1bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c236(%rip),%rsi # 36b41b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1108>\n+\tlea 0x3699d236(%rip),%rsi # 36b42b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1108>\n \tlea 0x151b6b(%rip),%rcx # 2f747c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d20c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c210(%rip),%rsi # 36b41b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1110>\n+\tlea 0x3699d210(%rip),%rsi # 36b42b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1110>\n \tlea 0x151b8a(%rip),%rcx # 2f74c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d259>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c1ea(%rip),%rsi # 36b41b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1118>\n+\tlea 0x3699d1ea(%rip),%rsi # 36b42b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1118>\n \tlea 0x151ba9(%rip),%rcx # 2f7516 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d2a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c1c4(%rip),%rsi # 36b41b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1120>\n+\tlea 0x3699d1c4(%rip),%rsi # 36b42b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1120>\n \tlea 0x151bca(%rip),%rcx # 2f7565 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d2f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c19e(%rip),%rsi # 36b41b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1128>\n+\tlea 0x3699d19e(%rip),%rsi # 36b42b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1128>\n \tlea 0x151beb(%rip),%rcx # 2f75b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d344>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c178(%rip),%rsi # 36b41b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1130>\n+\tlea 0x3699d178(%rip),%rsi # 36b42b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1130>\n \tlea 0x151c0a(%rip),%rcx # 2f7601 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d391>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c152(%rip),%rsi # 36b41b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1138>\n+\tlea 0x3699d152(%rip),%rsi # 36b42b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1138>\n \tlea 0x151c29(%rip),%rcx # 2f764e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d3de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c12c(%rip),%rsi # 36b41b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1140>\n+\tlea 0x3699d12c(%rip),%rsi # 36b42b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1140>\n \tlea 0x151c4a(%rip),%rcx # 2f769d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d42d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c106(%rip),%rsi # 36b41b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1148>\n+\tlea 0x3699d106(%rip),%rsi # 36b42b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1148>\n \tlea 0x151c6b(%rip),%rcx # 2f76ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d47c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c0e0(%rip),%rsi # 36b41b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1150>\n+\tlea 0x3699d0e0(%rip),%rsi # 36b42b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1150>\n \tlea 0x151c8a(%rip),%rcx # 2f7739 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d4c9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c0ba(%rip),%rsi # 36b41b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1158>\n+\tlea 0x3699d0ba(%rip),%rsi # 36b42b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1158>\n \tlea 0x151ca9(%rip),%rcx # 2f7786 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d516>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c094(%rip),%rsi # 36b41b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1160>\n+\tlea 0x3699d094(%rip),%rsi # 36b42b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1160>\n \tlea 0x151cca(%rip),%rcx # 2f77d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d565>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c06e(%rip),%rsi # 36b41ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1168>\n+\tlea 0x3699d06e(%rip),%rsi # 36b42ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1168>\n \tlea 0x151ceb(%rip),%rcx # 2f7824 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d5b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c048(%rip),%rsi # 36b41ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1170>\n+\tlea 0x3699d048(%rip),%rsi # 36b42ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1170>\n \tlea 0x151d0a(%rip),%rcx # 2f7871 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d601>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699c022(%rip),%rsi # 36b41bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1178>\n+\tlea 0x3699d022(%rip),%rsi # 36b42bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1178>\n \tlea 0x151d29(%rip),%rcx # 2f78be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d64e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bffc(%rip),%rsi # 36b41bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1180>\n+\tlea 0x3699cffc(%rip),%rsi # 36b42bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1180>\n \tlea 0x151d4a(%rip),%rcx # 2f790d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d69d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bfd6(%rip),%rsi # 36b41bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1188>\n+\tlea 0x3699cfd6(%rip),%rsi # 36b42bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1188>\n \tlea 0x151d6b(%rip),%rcx # 2f795c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d6ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bfb0(%rip),%rsi # 36b41bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1190>\n+\tlea 0x3699cfb0(%rip),%rsi # 36b42bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1190>\n \tlea 0x151d8a(%rip),%rcx # 2f79a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d739>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bf8a(%rip),%rsi # 36b41bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1198>\n+\tlea 0x3699cf8a(%rip),%rsi # 36b42bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1198>\n \tlea 0x151da9(%rip),%rcx # 2f79f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d786>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bf64(%rip),%rsi # 36b41bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a0>\n+\tlea 0x3699cf64(%rip),%rsi # 36b42bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a0>\n \tlea 0x151dca(%rip),%rcx # 2f7a45 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d7d5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bf3e(%rip),%rsi # 36b41be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a8>\n+\tlea 0x3699cf3e(%rip),%rsi # 36b42be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a8>\n \tlea 0x151deb(%rip),%rcx # 2f7a94 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d824>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bf18(%rip),%rsi # 36b41be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b0>\n+\tlea 0x3699cf18(%rip),%rsi # 36b42be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b0>\n \tlea 0x151e0a(%rip),%rcx # 2f7ae1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d871>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bef2(%rip),%rsi # 36b41bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b8>\n+\tlea 0x3699cef2(%rip),%rsi # 36b42bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b8>\n \tlea 0x151e29(%rip),%rcx # 2f7b2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d8be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699becc(%rip),%rsi # 36b41bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c0>\n+\tlea 0x3699cecc(%rip),%rsi # 36b42bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c0>\n \tlea 0x151e4a(%rip),%rcx # 2f7b7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d90d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699bea6(%rip),%rsi # 36b41c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c8>\n+\tlea 0x3699cea6(%rip),%rsi # 36b42c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c8>\n \tlea 0x151e6b(%rip),%rcx # 2f7bcc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d95c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699be80(%rip),%rsi # 36b41c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d0>\n+\tlea 0x3699ce80(%rip),%rsi # 36b42c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d0>\n \tlea 0x151e8b(%rip),%rcx # 2f7c1a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d9aa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699be5a(%rip),%rsi # 36b41c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d8>\n+\tlea 0x3699ce5a(%rip),%rsi # 36b42c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d8>\n \tlea 0x151eab(%rip),%rcx # 2f7c68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1d9f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3699be34(%rip),%rsi # 36b41c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e0>\n+\tlea 0x3699ce34(%rip),%rsi # 36b42c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e0>\n \tlea 0x151ecd(%rip),%rcx # 2f7cb8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1da48>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bdf7(%rip),%rsi # 36b41c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e8>\n+\tlea 0x3699cdf7(%rip),%rsi # 36b42c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e8>\n \tlea 0x151ed8(%rip),%rcx # 2f7d08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1da98>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bdba(%rip),%rsi # 36b41c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f0>\n+\tlea 0x3699cdba(%rip),%rsi # 36b42c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f0>\n \tlea 0x151ee1(%rip),%rcx # 2f7d56 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dae6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bd7d(%rip),%rsi # 36b41c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f8>\n+\tlea 0x3699cd7d(%rip),%rsi # 36b42c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f8>\n \tlea 0x151eea(%rip),%rcx # 2f7da4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1db34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bd40(%rip),%rsi # 36b41c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1200>\n+\tlea 0x3699cd40(%rip),%rsi # 36b42c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1200>\n \tlea 0x151ef5(%rip),%rcx # 2f7df4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1db84>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bd03(%rip),%rsi # 36b41c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1208>\n+\tlea 0x3699cd03(%rip),%rsi # 36b42c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1208>\n \tlea 0x151f00(%rip),%rcx # 2f7e44 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dbd4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bcc6(%rip),%rsi # 36b41c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1210>\n+\tlea 0x3699ccc6(%rip),%rsi # 36b42c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1210>\n \tlea 0x151f09(%rip),%rcx # 2f7e92 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dc22>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bc89(%rip),%rsi # 36b41c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1218>\n+\tlea 0x3699cc89(%rip),%rsi # 36b42c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1218>\n \tlea 0x151f12(%rip),%rcx # 2f7ee0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dc70>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bc4c(%rip),%rsi # 36b41c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1220>\n+\tlea 0x3699cc4c(%rip),%rsi # 36b42c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1220>\n \tlea 0x151f1d(%rip),%rcx # 2f7f30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dcc0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bc0f(%rip),%rsi # 36b41c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1228>\n+\tlea 0x3699cc0f(%rip),%rsi # 36b42c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1228>\n \tlea 0x151f28(%rip),%rcx # 2f7f80 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dd10>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bbd2(%rip),%rsi # 36b41c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1230>\n+\tlea 0x3699cbd2(%rip),%rsi # 36b42c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1230>\n \tlea 0x151f31(%rip),%rcx # 2f7fce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dd5e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bb95(%rip),%rsi # 36b41c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1238>\n+\tlea 0x3699cb95(%rip),%rsi # 36b42c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1238>\n \tlea 0x151f3a(%rip),%rcx # 2f801c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ddac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3699bb58(%rip),%rsi # 36b41c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1240>\n+\tlea 0x3699cb58(%rip),%rsi # 36b42c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1240>\n \tlea 0x151f45(%rip),%rcx # 2f806c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ddfc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 1a6150 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x369a0309(%rip),%rdi # 36b46460 ::get_beta()::val@@Base+0x148>\n+\tmov 0x369a1309(%rip),%rdi # 36b47460 ::get_beta()::val@@Base+0x148>\n \ttest %rdi,%rdi\n \tje 1a6171 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x369a02f3(%rip) # 36b46460 ::get_beta()::val@@Base+0x148>\n+\tmovq $0x0,0x369a12f3(%rip) # 36b47460 ::get_beta()::val@@Base+0x148>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001a6180 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)22>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -345891,15 +345891,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36998e29(%rip),%rdi # 36b41c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1220>\n+\tlea 0x36999e29(%rip),%rdi # 36b42c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1220>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1a911f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -346035,15 +346035,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36998b50(%rip),%rdi # 36b41c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1218>\n+\tlea 0x36999b50(%rip),%rdi # 36b42c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1218>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -346194,15 +346194,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369987f3(%rip),%rdi # 36b41bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c0>\n+\tlea 0x369997f3(%rip),%rdi # 36b42bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1a96f5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -346338,15 +346338,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3699851a(%rip),%rdi # 36b41bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b8>\n+\tlea 0x3699951a(%rip),%rdi # 36b42bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -346497,15 +346497,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3699813d(%rip),%rdi # 36b41b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e0>\n+\tlea 0x3699913d(%rip),%rdi # 36b42b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1a9ccb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -346641,15 +346641,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36997e64(%rip),%rdi # 36b41b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d8>\n+\tlea 0x36998e64(%rip),%rdi # 36b42b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -346800,15 +346800,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36997c67(%rip),%rdi # 36b41c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e0>\n+\tlea 0x36998c67(%rip),%rdi # 36b42c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1aa2a1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -346944,15 +346944,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3699798e(%rip),%rdi # 36b41c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d8>\n+\tlea 0x3699898e(%rip),%rdi # 36b42c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -347103,15 +347103,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36997631(%rip),%rdi # 36b41bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1180>\n+\tlea 0x36998631(%rip),%rdi # 36b42bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1180>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1aa877 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -347247,15 +347247,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36997358(%rip),%rdi # 36b41bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1178>\n+\tlea 0x36998358(%rip),%rdi # 36b42bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1178>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -347406,15 +347406,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36996f7b(%rip),%rdi # 36b41ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a0>\n+\tlea 0x36997f7b(%rip),%rdi # 36b42ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1aae4d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -347550,15 +347550,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36996ca2(%rip),%rdi # 36b41ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1098>\n+\tlea 0x36997ca2(%rip),%rdi # 36b42ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1098>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -347709,15 +347709,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36996b45(%rip),%rdi # 36b41c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1240>\n+\tlea 0x36997b45(%rip),%rdi # 36b42c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1240>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ab423 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -347853,15 +347853,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3699686c(%rip),%rdi # 36b41c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1238>\n+\tlea 0x3699786c(%rip),%rdi # 36b42c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1238>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -348012,15 +348012,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369963ef(%rip),%rdi # 36b41af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c0>\n+\tlea 0x369973ef(%rip),%rdi # 36b42af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ab9f9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -348156,15 +348156,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36996116(%rip),%rdi # 36b41af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b8>\n+\tlea 0x36997116(%rip),%rdi # 36b42af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -348315,15 +348315,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36995e99(%rip),%rdi # 36b41b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1140>\n+\tlea 0x36996e99(%rip),%rdi # 36b42b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1140>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1abfcf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -348459,15 +348459,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36995bc0(%rip),%rdi # 36b41b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1138>\n+\tlea 0x36996bc0(%rip),%rdi # 36b42b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1138>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -348618,15 +348618,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369957e3(%rip),%rdi # 36b41a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1060>\n+\tlea 0x369967e3(%rip),%rdi # 36b42a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1060>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ac886 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -348768,15 +348768,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36995522(%rip),%rdi # 36b41ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1080>\n+\tlea 0x36996522(%rip),%rdi # 36b42ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1080>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1acb7b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -348912,15 +348912,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36995229(%rip),%rdi # 36b41a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1058>\n+\tlea 0x36996229(%rip),%rdi # 36b42a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1058>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -349065,15 +349065,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36994f54(%rip),%rdi # 36b41ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1078>\n+\tlea 0x36995f54(%rip),%rdi # 36b42ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1078>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -349224,15 +349224,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36994cd7(%rip),%rdi # 36b41b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1100>\n+\tlea 0x36995cd7(%rip),%rdi # 36b42b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1100>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ad151 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -349368,15 +349368,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369949fe(%rip),%rdi # 36b41b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f8>\n+\tlea 0x369959fe(%rip),%rdi # 36b42b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x10f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -349527,15 +349527,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36994801(%rip),%rdi # 36b41c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1200>\n+\tlea 0x36995801(%rip),%rdi # 36b42c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1200>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ad727 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -349671,15 +349671,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36994528(%rip),%rdi # 36b41c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f8>\n+\tlea 0x36995528(%rip),%rdi # 36b42c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -349830,15 +349830,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3699414b(%rip),%rdi # 36b41b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1120>\n+\tlea 0x3699514b(%rip),%rdi # 36b42b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1120>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1adcfd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -349974,15 +349974,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36993e72(%rip),%rdi # 36b41b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1118>\n+\tlea 0x36994e72(%rip),%rdi # 36b42b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1118>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -350133,15 +350133,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36993bf5(%rip),%rdi # 36b41bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a0>\n+\tlea 0x36994bf5(%rip),%rdi # 36b42bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x11a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ae2d3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -350277,15 +350277,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3699391c(%rip),%rdi # 36b41bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1198>\n+\tlea 0x3699491c(%rip),%rdi # 36b42bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1198>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -350436,15 +350436,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369935df(%rip),%rdi # 36b41b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1160>\n+\tlea 0x369945df(%rip),%rdi # 36b42b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1160>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ae8a9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -350580,15 +350580,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36993306(%rip),%rdi # 36b41b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1158>\n+\tlea 0x36994306(%rip),%rdi # 36b42b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1158>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -352431,15 +352431,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 1a2680 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 1b00fd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36994e17(%rip),%rax \n+\tmov 0x36995e17(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x145718(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x145717(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -352729,15 +352729,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36991578(%rip),%rdi # 36b41c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1248>\n+\tlea 0x36992578(%rip),%rdi # 36b42c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1248>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -352798,15 +352798,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369913c0(%rip),%rdi # 36b41c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1250>\n+\tlea 0x369923c0(%rip),%rdi # 36b42c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1250>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -352847,15 +352847,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369912a6(%rip),%rdi # 36b41c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1258>\n+\tlea 0x369922a6(%rip),%rdi # 36b42c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1258>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -352896,15 +352896,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699118e(%rip),%rdi # 36b41c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1260>\n+\tlea 0x3699218e(%rip),%rdi # 36b42c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1260>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -352965,15 +352965,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36990fd8(%rip),%rdi # 36b41ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1268>\n+\tlea 0x36991fd8(%rip),%rdi # 36b42ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1268>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353034,15 +353034,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36990e20(%rip),%rdi # 36b41ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1270>\n+\tlea 0x36991e20(%rip),%rdi # 36b42ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1270>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353083,15 +353083,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36990d06(%rip),%rdi # 36b41cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1278>\n+\tlea 0x36991d06(%rip),%rdi # 36b42cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1278>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353132,15 +353132,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36990bee(%rip),%rdi # 36b41cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1280>\n+\tlea 0x36991bee(%rip),%rdi # 36b42cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1280>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353201,15 +353201,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36990a38(%rip),%rdi # 36b41cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1288>\n+\tlea 0x36991a38(%rip),%rdi # 36b42cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1288>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353270,15 +353270,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36990880(%rip),%rdi # 36b41cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1290>\n+\tlea 0x36991880(%rip),%rdi # 36b42cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1290>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353319,15 +353319,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36990766(%rip),%rdi # 36b41cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1298>\n+\tlea 0x36991766(%rip),%rdi # 36b42cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1298>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353368,15 +353368,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3699064e(%rip),%rdi # 36b41cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a0>\n+\tlea 0x3699164e(%rip),%rdi # 36b42cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353437,15 +353437,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36990498(%rip),%rdi # 36b41ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a8>\n+\tlea 0x36991498(%rip),%rdi # 36b42ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353506,15 +353506,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369902e0(%rip),%rdi # 36b41ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b0>\n+\tlea 0x369912e0(%rip),%rdi # 36b42ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353555,15 +353555,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369901c6(%rip),%rdi # 36b41cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b8>\n+\tlea 0x369911c6(%rip),%rdi # 36b42cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353604,15 +353604,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369900ae(%rip),%rdi # 36b41cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c0>\n+\tlea 0x369910ae(%rip),%rdi # 36b42cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353673,15 +353673,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698fef8(%rip),%rdi # 36b41d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c8>\n+\tlea 0x36990ef8(%rip),%rdi # 36b42d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353742,15 +353742,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698fd40(%rip),%rdi # 36b41d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d0>\n+\tlea 0x36990d40(%rip),%rdi # 36b42d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353791,15 +353791,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698fc26(%rip),%rdi # 36b41d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d8>\n+\tlea 0x36990c26(%rip),%rdi # 36b42d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353840,15 +353840,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698fb0e(%rip),%rdi # 36b41d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e0>\n+\tlea 0x36990b0e(%rip),%rdi # 36b42d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353909,15 +353909,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698f958(%rip),%rdi # 36b41d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e8>\n+\tlea 0x36990958(%rip),%rdi # 36b42d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -353978,15 +353978,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698f7a0(%rip),%rdi # 36b41d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f0>\n+\tlea 0x369907a0(%rip),%rdi # 36b42d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354027,15 +354027,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698f686(%rip),%rdi # 36b41d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f8>\n+\tlea 0x36990686(%rip),%rdi # 36b42d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354076,15 +354076,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698f56e(%rip),%rdi # 36b41d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1300>\n+\tlea 0x3699056e(%rip),%rdi # 36b42d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1300>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354145,15 +354145,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698f3b8(%rip),%rdi # 36b41d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1308>\n+\tlea 0x369903b8(%rip),%rdi # 36b42d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1308>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354214,15 +354214,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698f200(%rip),%rdi # 36b41d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1310>\n+\tlea 0x36990200(%rip),%rdi # 36b42d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1310>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354263,15 +354263,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698f0e6(%rip),%rdi # 36b41d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1318>\n+\tlea 0x369900e6(%rip),%rdi # 36b42d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1318>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354312,15 +354312,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698efce(%rip),%rdi # 36b41d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1320>\n+\tlea 0x3698ffce(%rip),%rdi # 36b42d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1320>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354381,15 +354381,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698ee18(%rip),%rdi # 36b41d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1328>\n+\tlea 0x3698fe18(%rip),%rdi # 36b42d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1328>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354450,15 +354450,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698ec60(%rip),%rdi # 36b41d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1330>\n+\tlea 0x3698fc60(%rip),%rdi # 36b42d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1330>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354499,15 +354499,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698eb46(%rip),%rdi # 36b41d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1338>\n+\tlea 0x3698fb46(%rip),%rdi # 36b42d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1338>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354548,15 +354548,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698ea2e(%rip),%rdi # 36b41d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1340>\n+\tlea 0x3698fa2e(%rip),%rdi # 36b42d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1340>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354617,15 +354617,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698e878(%rip),%rdi # 36b41d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1348>\n+\tlea 0x3698f878(%rip),%rdi # 36b42d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1348>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354686,15 +354686,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698e6c0(%rip),%rdi # 36b41d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1350>\n+\tlea 0x3698f6c0(%rip),%rdi # 36b42d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1350>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354735,15 +354735,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698e5a6(%rip),%rdi # 36b41d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1358>\n+\tlea 0x3698f5a6(%rip),%rdi # 36b42d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1358>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354784,15 +354784,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698e48e(%rip),%rdi # 36b41d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1360>\n+\tlea 0x3698f48e(%rip),%rdi # 36b42d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1360>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354853,15 +354853,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698e2d8(%rip),%rdi # 36b41da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1368>\n+\tlea 0x3698f2d8(%rip),%rdi # 36b42da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1368>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354922,15 +354922,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698e120(%rip),%rdi # 36b41da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1370>\n+\tlea 0x3698f120(%rip),%rdi # 36b42da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1370>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -354971,15 +354971,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698e006(%rip),%rdi # 36b41db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1378>\n+\tlea 0x3698f006(%rip),%rdi # 36b42db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1378>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355020,15 +355020,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698deee(%rip),%rdi # 36b41db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1380>\n+\tlea 0x3698eeee(%rip),%rdi # 36b42db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1380>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355089,15 +355089,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698dd38(%rip),%rdi # 36b41dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1388>\n+\tlea 0x3698ed38(%rip),%rdi # 36b42dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1388>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355158,15 +355158,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698db80(%rip),%rdi # 36b41dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1390>\n+\tlea 0x3698eb80(%rip),%rdi # 36b42dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1390>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355207,15 +355207,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698da66(%rip),%rdi # 36b41dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1398>\n+\tlea 0x3698ea66(%rip),%rdi # 36b42dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1398>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355256,15 +355256,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698d94e(%rip),%rdi # 36b41dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a0>\n+\tlea 0x3698e94e(%rip),%rdi # 36b42dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355325,15 +355325,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698d798(%rip),%rdi # 36b41de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a8>\n+\tlea 0x3698e798(%rip),%rdi # 36b42de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355394,15 +355394,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698d5e0(%rip),%rdi # 36b41de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b0>\n+\tlea 0x3698e5e0(%rip),%rdi # 36b42de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355443,15 +355443,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698d4c6(%rip),%rdi # 36b41df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b8>\n+\tlea 0x3698e4c6(%rip),%rdi # 36b42df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355492,15 +355492,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698d3ae(%rip),%rdi # 36b41df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c0>\n+\tlea 0x3698e3ae(%rip),%rdi # 36b42df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355561,15 +355561,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698d1f8(%rip),%rdi # 36b41e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c8>\n+\tlea 0x3698e1f8(%rip),%rdi # 36b42e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355630,15 +355630,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698d040(%rip),%rdi # 36b41e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d0>\n+\tlea 0x3698e040(%rip),%rdi # 36b42e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355679,15 +355679,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698cf26(%rip),%rdi # 36b41e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d8>\n+\tlea 0x3698df26(%rip),%rdi # 36b42e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355728,15 +355728,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698ce0e(%rip),%rdi # 36b41e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e0>\n+\tlea 0x3698de0e(%rip),%rdi # 36b42e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355797,15 +355797,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698cc58(%rip),%rdi # 36b41e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e8>\n+\tlea 0x3698dc58(%rip),%rdi # 36b42e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355866,15 +355866,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698caa0(%rip),%rdi # 36b41e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f0>\n+\tlea 0x3698daa0(%rip),%rdi # 36b42e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355915,15 +355915,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698c986(%rip),%rdi # 36b41e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f8>\n+\tlea 0x3698d986(%rip),%rdi # 36b42e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -355964,15 +355964,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698c86e(%rip),%rdi # 36b41e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1400>\n+\tlea 0x3698d86e(%rip),%rdi # 36b42e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1400>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356033,15 +356033,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698c6b8(%rip),%rdi # 36b41e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1408>\n+\tlea 0x3698d6b8(%rip),%rdi # 36b42e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1408>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356102,15 +356102,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698c500(%rip),%rdi # 36b41e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1410>\n+\tlea 0x3698d500(%rip),%rdi # 36b42e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1410>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356151,15 +356151,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698c3e6(%rip),%rdi # 36b41e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1418>\n+\tlea 0x3698d3e6(%rip),%rdi # 36b42e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1418>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356200,15 +356200,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698c2ce(%rip),%rdi # 36b41e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1420>\n+\tlea 0x3698d2ce(%rip),%rdi # 36b42e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1420>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356269,15 +356269,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698c118(%rip),%rdi # 36b41e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1428>\n+\tlea 0x3698d118(%rip),%rdi # 36b42e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1428>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356338,15 +356338,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3698bf60(%rip),%rdi # 36b41e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1430>\n+\tlea 0x3698cf60(%rip),%rdi # 36b42e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1430>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356387,15 +356387,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698be46(%rip),%rdi # 36b41e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1438>\n+\tlea 0x3698ce46(%rip),%rdi # 36b42e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1438>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -356436,696 +356436,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698bd2e(%rip),%rdi # 36b41e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1440>\n+\tlea 0x3698cd2e(%rip),%rdi # 36b42e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1440>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x369902ec(%rip),%rbx # 36b46468 ::get_beta()::val@@Base+0x150>\n+\tmov 0x369912ec(%rip),%rbx # 36b47468 ::get_beta()::val@@Base+0x150>\n \ttest %rbx,%rbx\n \tjne 1b6197 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3698f450(%rip),%rdi # 36b455d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ba0>\n+\tlea 0x36990450(%rip),%rdi # 36b465d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ba0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x369902d1(%rip) # 36b46468 ::get_beta()::val@@Base+0x150>\n+\tmov %rax,0x369912d1(%rip) # 36b47468 ::get_beta()::val@@Base+0x150>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698bad6(%rip),%rsi # 36b41c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1248>\n+\tlea 0x3698cad6(%rip),%rsi # 36b42c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1248>\n \tlea 0x141f0b(%rip),%rcx # 2f80bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1de4c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698bab0(%rip),%rsi # 36b41c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1250>\n+\tlea 0x3698cab0(%rip),%rsi # 36b42c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1250>\n \tlea 0x141f29(%rip),%rcx # 2f8108 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1de98>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698ba8a(%rip),%rsi # 36b41c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1258>\n+\tlea 0x3698ca8a(%rip),%rsi # 36b42c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1258>\n \tlea 0x141f47(%rip),%rcx # 2f8154 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dee4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698ba64(%rip),%rsi # 36b41c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1260>\n+\tlea 0x3698ca64(%rip),%rsi # 36b42c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1260>\n \tlea 0x141f67(%rip),%rcx # 2f81a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1df32>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698ba3e(%rip),%rsi # 36b41ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1268>\n+\tlea 0x3698ca3e(%rip),%rsi # 36b42ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1268>\n \tlea 0x141f87(%rip),%rcx # 2f81f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1df80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698ba18(%rip),%rsi # 36b41ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1270>\n+\tlea 0x3698ca18(%rip),%rsi # 36b42ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1270>\n \tlea 0x141fa6(%rip),%rcx # 2f823d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1dfcd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b9f2(%rip),%rsi # 36b41cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1278>\n+\tlea 0x3698c9f2(%rip),%rsi # 36b42cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1278>\n \tlea 0x141fc5(%rip),%rcx # 2f828a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e01a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b9cc(%rip),%rsi # 36b41cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1280>\n+\tlea 0x3698c9cc(%rip),%rsi # 36b42cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1280>\n \tlea 0x141fe6(%rip),%rcx # 2f82d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e069>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b9a6(%rip),%rsi # 36b41cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1288>\n+\tlea 0x3698c9a6(%rip),%rsi # 36b42cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1288>\n \tlea 0x142007(%rip),%rcx # 2f8328 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e0b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b980(%rip),%rsi # 36b41cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1290>\n+\tlea 0x3698c980(%rip),%rsi # 36b42cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1290>\n \tlea 0x142026(%rip),%rcx # 2f8375 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e105>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b95a(%rip),%rsi # 36b41cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1298>\n+\tlea 0x3698c95a(%rip),%rsi # 36b42cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1298>\n \tlea 0x142045(%rip),%rcx # 2f83c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e152>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b934(%rip),%rsi # 36b41cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a0>\n+\tlea 0x3698c934(%rip),%rsi # 36b42cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a0>\n \tlea 0x142066(%rip),%rcx # 2f8411 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e1a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b90e(%rip),%rsi # 36b41ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a8>\n+\tlea 0x3698c90e(%rip),%rsi # 36b42ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a8>\n \tlea 0x142087(%rip),%rcx # 2f8460 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e1f0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b8e8(%rip),%rsi # 36b41ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b0>\n+\tlea 0x3698c8e8(%rip),%rsi # 36b42ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b0>\n \tlea 0x1420a6(%rip),%rcx # 2f84ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e23d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b8c2(%rip),%rsi # 36b41cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b8>\n+\tlea 0x3698c8c2(%rip),%rsi # 36b42cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b8>\n \tlea 0x1420c5(%rip),%rcx # 2f84fa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e28a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b89c(%rip),%rsi # 36b41cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c0>\n+\tlea 0x3698c89c(%rip),%rsi # 36b42cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c0>\n \tlea 0x1420e6(%rip),%rcx # 2f8549 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e2d9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b876(%rip),%rsi # 36b41d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c8>\n+\tlea 0x3698c876(%rip),%rsi # 36b42d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c8>\n \tlea 0x142107(%rip),%rcx # 2f8598 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e328>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b850(%rip),%rsi # 36b41d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d0>\n+\tlea 0x3698c850(%rip),%rsi # 36b42d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d0>\n \tlea 0x142126(%rip),%rcx # 2f85e5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e375>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b82a(%rip),%rsi # 36b41d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d8>\n+\tlea 0x3698c82a(%rip),%rsi # 36b42d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d8>\n \tlea 0x142145(%rip),%rcx # 2f8632 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e3c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b804(%rip),%rsi # 36b41d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e0>\n+\tlea 0x3698c804(%rip),%rsi # 36b42d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e0>\n \tlea 0x142166(%rip),%rcx # 2f8681 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e411>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b7de(%rip),%rsi # 36b41d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e8>\n+\tlea 0x3698c7de(%rip),%rsi # 36b42d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e8>\n \tlea 0x142187(%rip),%rcx # 2f86d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e460>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b7b8(%rip),%rsi # 36b41d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f0>\n+\tlea 0x3698c7b8(%rip),%rsi # 36b42d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f0>\n \tlea 0x1421a6(%rip),%rcx # 2f871d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e4ad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b792(%rip),%rsi # 36b41d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f8>\n+\tlea 0x3698c792(%rip),%rsi # 36b42d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f8>\n \tlea 0x1421c5(%rip),%rcx # 2f876a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e4fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b76c(%rip),%rsi # 36b41d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1300>\n+\tlea 0x3698c76c(%rip),%rsi # 36b42d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1300>\n \tlea 0x1421e6(%rip),%rcx # 2f87b9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e549>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b746(%rip),%rsi # 36b41d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1308>\n+\tlea 0x3698c746(%rip),%rsi # 36b42d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1308>\n \tlea 0x142207(%rip),%rcx # 2f8808 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e598>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b720(%rip),%rsi # 36b41d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1310>\n+\tlea 0x3698c720(%rip),%rsi # 36b42d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1310>\n \tlea 0x142226(%rip),%rcx # 2f8855 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e5e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b6fa(%rip),%rsi # 36b41d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1318>\n+\tlea 0x3698c6fa(%rip),%rsi # 36b42d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1318>\n \tlea 0x142245(%rip),%rcx # 2f88a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e632>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b6d4(%rip),%rsi # 36b41d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1320>\n+\tlea 0x3698c6d4(%rip),%rsi # 36b42d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1320>\n \tlea 0x142266(%rip),%rcx # 2f88f1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e681>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b6ae(%rip),%rsi # 36b41d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1328>\n+\tlea 0x3698c6ae(%rip),%rsi # 36b42d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1328>\n \tlea 0x142287(%rip),%rcx # 2f8940 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e6d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b688(%rip),%rsi # 36b41d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1330>\n+\tlea 0x3698c688(%rip),%rsi # 36b42d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1330>\n \tlea 0x1422a6(%rip),%rcx # 2f898d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e71d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b662(%rip),%rsi # 36b41d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1338>\n+\tlea 0x3698c662(%rip),%rsi # 36b42d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1338>\n \tlea 0x1422c5(%rip),%rcx # 2f89da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e76a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b63c(%rip),%rsi # 36b41d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1340>\n+\tlea 0x3698c63c(%rip),%rsi # 36b42d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1340>\n \tlea 0x1422e6(%rip),%rcx # 2f8a29 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e7b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b616(%rip),%rsi # 36b41d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1348>\n+\tlea 0x3698c616(%rip),%rsi # 36b42d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1348>\n \tlea 0x142307(%rip),%rcx # 2f8a78 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e808>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b5f0(%rip),%rsi # 36b41d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1350>\n+\tlea 0x3698c5f0(%rip),%rsi # 36b42d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1350>\n \tlea 0x142326(%rip),%rcx # 2f8ac5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e855>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b5ca(%rip),%rsi # 36b41d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1358>\n+\tlea 0x3698c5ca(%rip),%rsi # 36b42d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1358>\n \tlea 0x142345(%rip),%rcx # 2f8b12 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e8a2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b5a4(%rip),%rsi # 36b41d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1360>\n+\tlea 0x3698c5a4(%rip),%rsi # 36b42d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1360>\n \tlea 0x142366(%rip),%rcx # 2f8b61 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e8f1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b57e(%rip),%rsi # 36b41da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1368>\n+\tlea 0x3698c57e(%rip),%rsi # 36b42da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1368>\n \tlea 0x142387(%rip),%rcx # 2f8bb0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e940>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b558(%rip),%rsi # 36b41da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1370>\n+\tlea 0x3698c558(%rip),%rsi # 36b42da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1370>\n \tlea 0x1423a6(%rip),%rcx # 2f8bfd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e98d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b532(%rip),%rsi # 36b41db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1378>\n+\tlea 0x3698c532(%rip),%rsi # 36b42db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1378>\n \tlea 0x1423c5(%rip),%rcx # 2f8c4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e9da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b50c(%rip),%rsi # 36b41db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1380>\n+\tlea 0x3698c50c(%rip),%rsi # 36b42db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1380>\n \tlea 0x1423e6(%rip),%rcx # 2f8c99 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ea29>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b4e6(%rip),%rsi # 36b41dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1388>\n+\tlea 0x3698c4e6(%rip),%rsi # 36b42dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1388>\n \tlea 0x142407(%rip),%rcx # 2f8ce8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ea78>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b4c0(%rip),%rsi # 36b41dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1390>\n+\tlea 0x3698c4c0(%rip),%rsi # 36b42dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1390>\n \tlea 0x142426(%rip),%rcx # 2f8d35 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1eac5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b49a(%rip),%rsi # 36b41dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1398>\n+\tlea 0x3698c49a(%rip),%rsi # 36b42dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1398>\n \tlea 0x142445(%rip),%rcx # 2f8d82 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1eb12>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b474(%rip),%rsi # 36b41dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a0>\n+\tlea 0x3698c474(%rip),%rsi # 36b42dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a0>\n \tlea 0x142466(%rip),%rcx # 2f8dd1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1eb61>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b44e(%rip),%rsi # 36b41de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a8>\n+\tlea 0x3698c44e(%rip),%rsi # 36b42de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a8>\n \tlea 0x142487(%rip),%rcx # 2f8e20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ebb0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b428(%rip),%rsi # 36b41de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b0>\n+\tlea 0x3698c428(%rip),%rsi # 36b42de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b0>\n \tlea 0x1424a6(%rip),%rcx # 2f8e6d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ebfd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b402(%rip),%rsi # 36b41df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b8>\n+\tlea 0x3698c402(%rip),%rsi # 36b42df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b8>\n \tlea 0x1424c5(%rip),%rcx # 2f8eba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ec4a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b3dc(%rip),%rsi # 36b41df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c0>\n+\tlea 0x3698c3dc(%rip),%rsi # 36b42df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c0>\n \tlea 0x1424e6(%rip),%rcx # 2f8f09 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ec99>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b3b6(%rip),%rsi # 36b41e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c8>\n+\tlea 0x3698c3b6(%rip),%rsi # 36b42e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c8>\n \tlea 0x142507(%rip),%rcx # 2f8f58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ece8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b390(%rip),%rsi # 36b41e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d0>\n+\tlea 0x3698c390(%rip),%rsi # 36b42e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d0>\n \tlea 0x142527(%rip),%rcx # 2f8fa6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ed36>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b36a(%rip),%rsi # 36b41e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d8>\n+\tlea 0x3698c36a(%rip),%rsi # 36b42e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d8>\n \tlea 0x142547(%rip),%rcx # 2f8ff4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ed84>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3698b344(%rip),%rsi # 36b41e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e0>\n+\tlea 0x3698c344(%rip),%rsi # 36b42e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e0>\n \tlea 0x142569(%rip),%rcx # 2f9044 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1edd4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b307(%rip),%rsi # 36b41e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e8>\n+\tlea 0x3698c307(%rip),%rsi # 36b42e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e8>\n \tlea 0x142574(%rip),%rcx # 2f9094 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ee24>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b2ca(%rip),%rsi # 36b41e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f0>\n+\tlea 0x3698c2ca(%rip),%rsi # 36b42e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f0>\n \tlea 0x14257d(%rip),%rcx # 2f90e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ee72>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b28d(%rip),%rsi # 36b41e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f8>\n+\tlea 0x3698c28d(%rip),%rsi # 36b42e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f8>\n \tlea 0x142586(%rip),%rcx # 2f9130 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1eec0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b250(%rip),%rsi # 36b41e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1400>\n+\tlea 0x3698c250(%rip),%rsi # 36b42e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1400>\n \tlea 0x142591(%rip),%rcx # 2f9180 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ef10>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b213(%rip),%rsi # 36b41e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1408>\n+\tlea 0x3698c213(%rip),%rsi # 36b42e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1408>\n \tlea 0x14259c(%rip),%rcx # 2f91d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ef60>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b1d6(%rip),%rsi # 36b41e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1410>\n+\tlea 0x3698c1d6(%rip),%rsi # 36b42e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1410>\n \tlea 0x1425a5(%rip),%rcx # 2f921e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1efae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b199(%rip),%rsi # 36b41e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1418>\n+\tlea 0x3698c199(%rip),%rsi # 36b42e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1418>\n \tlea 0x1425ae(%rip),%rcx # 2f926c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1effc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b15c(%rip),%rsi # 36b41e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1420>\n+\tlea 0x3698c15c(%rip),%rsi # 36b42e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1420>\n \tlea 0x1425b9(%rip),%rcx # 2f92bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f04c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b11f(%rip),%rsi # 36b41e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1428>\n+\tlea 0x3698c11f(%rip),%rsi # 36b42e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1428>\n \tlea 0x1425c4(%rip),%rcx # 2f930c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f09c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b0e2(%rip),%rsi # 36b41e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1430>\n+\tlea 0x3698c0e2(%rip),%rsi # 36b42e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1430>\n \tlea 0x1425cd(%rip),%rcx # 2f935a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f0ea>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b0a5(%rip),%rsi # 36b41e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1438>\n+\tlea 0x3698c0a5(%rip),%rsi # 36b42e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1438>\n \tlea 0x1425d6(%rip),%rcx # 2f93a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f138>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3698b068(%rip),%rsi # 36b41e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1440>\n+\tlea 0x3698c068(%rip),%rsi # 36b42e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1440>\n \tlea 0x1425e1(%rip),%rcx # 2f93f8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f188>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 1b6e40 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3698f621(%rip),%rdi # 36b46468 ::get_beta()::val@@Base+0x150>\n+\tmov 0x36990621(%rip),%rdi # 36b47468 ::get_beta()::val@@Base+0x150>\n \ttest %rdi,%rdi\n \tje 1b6e61 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3698f60b(%rip) # 36b46468 ::get_beta()::val@@Base+0x150>\n+\tmovq $0x0,0x3699060b(%rip) # 36b47468 ::get_beta()::val@@Base+0x150>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001b6e70 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)17>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -360738,15 +360738,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36988339(%rip),%rdi # 36b41e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1420>\n+\tlea 0x36989339(%rip),%rdi # 36b42e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1420>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1b9e0f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -360882,15 +360882,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36988060(%rip),%rdi # 36b41e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1418>\n+\tlea 0x36989060(%rip),%rdi # 36b42e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1418>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -361041,15 +361041,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36987d03(%rip),%rdi # 36b41df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c0>\n+\tlea 0x36988d03(%rip),%rdi # 36b42df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ba3e5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -361185,15 +361185,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36987a2a(%rip),%rdi # 36b41df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b8>\n+\tlea 0x36988a2a(%rip),%rdi # 36b42df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -361344,15 +361344,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3698764d(%rip),%rdi # 36b41d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e0>\n+\tlea 0x3698864d(%rip),%rdi # 36b42d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ba9bb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -361488,15 +361488,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36987374(%rip),%rdi # 36b41d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d8>\n+\tlea 0x36988374(%rip),%rdi # 36b42d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -361647,15 +361647,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36987177(%rip),%rdi # 36b41e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e0>\n+\tlea 0x36988177(%rip),%rdi # 36b42e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1baf91 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -361791,15 +361791,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36986e9e(%rip),%rdi # 36b41e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d8>\n+\tlea 0x36987e9e(%rip),%rdi # 36b42e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -361950,15 +361950,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36986b41(%rip),%rdi # 36b41db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1380>\n+\tlea 0x36987b41(%rip),%rdi # 36b42db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1380>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bb567 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -362094,15 +362094,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36986868(%rip),%rdi # 36b41db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1378>\n+\tlea 0x36987868(%rip),%rdi # 36b42db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1378>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -362253,15 +362253,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3698648b(%rip),%rdi # 36b41cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a0>\n+\tlea 0x3698748b(%rip),%rdi # 36b42cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bbb3d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -362397,15 +362397,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369861b2(%rip),%rdi # 36b41cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1298>\n+\tlea 0x369871b2(%rip),%rdi # 36b42cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1298>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -362556,15 +362556,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36986055(%rip),%rdi # 36b41e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1440>\n+\tlea 0x36987055(%rip),%rdi # 36b42e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1440>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bc113 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -362700,15 +362700,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36985d7c(%rip),%rdi # 36b41e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1438>\n+\tlea 0x36986d7c(%rip),%rdi # 36b42e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1438>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -362859,15 +362859,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369858ff(%rip),%rdi # 36b41cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c0>\n+\tlea 0x369868ff(%rip),%rdi # 36b42cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bc6e9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -363003,15 +363003,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36985626(%rip),%rdi # 36b41cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b8>\n+\tlea 0x36986626(%rip),%rdi # 36b42cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -363162,15 +363162,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369853a9(%rip),%rdi # 36b41d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1340>\n+\tlea 0x369863a9(%rip),%rdi # 36b42d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1340>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bccbf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -363306,15 +363306,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369850d0(%rip),%rdi # 36b41d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1338>\n+\tlea 0x369860d0(%rip),%rdi # 36b42d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1338>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -363465,15 +363465,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36984cf3(%rip),%rdi # 36b41c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1260>\n+\tlea 0x36985cf3(%rip),%rdi # 36b42c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1260>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bd576 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -363615,15 +363615,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36984a32(%rip),%rdi # 36b41cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1280>\n+\tlea 0x36985a32(%rip),%rdi # 36b42cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1280>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bd86b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -363759,15 +363759,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36984739(%rip),%rdi # 36b41c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1258>\n+\tlea 0x36985739(%rip),%rdi # 36b42c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1258>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -363912,15 +363912,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36984464(%rip),%rdi # 36b41cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1278>\n+\tlea 0x36985464(%rip),%rdi # 36b42cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1278>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -364071,15 +364071,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369841e7(%rip),%rdi # 36b41d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1300>\n+\tlea 0x369851e7(%rip),%rdi # 36b42d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1300>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bde41 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -364215,15 +364215,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36983f0e(%rip),%rdi # 36b41d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f8>\n+\tlea 0x36984f0e(%rip),%rdi # 36b42d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x12f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -364374,15 +364374,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36983d11(%rip),%rdi # 36b41e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1400>\n+\tlea 0x36984d11(%rip),%rdi # 36b42e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1400>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1be417 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -364518,15 +364518,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36983a38(%rip),%rdi # 36b41e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f8>\n+\tlea 0x36984a38(%rip),%rdi # 36b42e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -364677,15 +364677,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3698365b(%rip),%rdi # 36b41d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1320>\n+\tlea 0x3698465b(%rip),%rdi # 36b42d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1320>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1be9ed (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -364821,15 +364821,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36983382(%rip),%rdi # 36b41d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1318>\n+\tlea 0x36984382(%rip),%rdi # 36b42d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1318>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -364980,15 +364980,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36983105(%rip),%rdi # 36b41dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a0>\n+\tlea 0x36984105(%rip),%rdi # 36b42dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x13a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1befc3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -365124,15 +365124,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36982e2c(%rip),%rdi # 36b41dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1398>\n+\tlea 0x36983e2c(%rip),%rdi # 36b42dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1398>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -365283,15 +365283,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36982aef(%rip),%rdi # 36b41d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1360>\n+\tlea 0x36983aef(%rip),%rdi # 36b42d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1360>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1bf599 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -365427,15 +365427,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36982816(%rip),%rdi # 36b41d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1358>\n+\tlea 0x36983816(%rip),%rdi # 36b42d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1358>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -367278,15 +367278,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 1b3370 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 1c0ded (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36984127(%rip),%rax \n+\tmov 0x36985127(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x134a28(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x134a27(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -367576,15 +367576,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36980a88(%rip),%rdi # 36b41e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1448>\n+\tlea 0x36981a88(%rip),%rdi # 36b42e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1448>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367645,15 +367645,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369808d0(%rip),%rdi # 36b41e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1450>\n+\tlea 0x369818d0(%rip),%rdi # 36b42e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1450>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367694,15 +367694,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369807b6(%rip),%rdi # 36b41e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1458>\n+\tlea 0x369817b6(%rip),%rdi # 36b42e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1458>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367743,15 +367743,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3698069e(%rip),%rdi # 36b41e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1460>\n+\tlea 0x3698169e(%rip),%rdi # 36b42e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1460>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367812,15 +367812,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369804e8(%rip),%rdi # 36b41ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1468>\n+\tlea 0x369814e8(%rip),%rdi # 36b42ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1468>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367881,15 +367881,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36980330(%rip),%rdi # 36b41ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1470>\n+\tlea 0x36981330(%rip),%rdi # 36b42ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1470>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367930,15 +367930,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36980216(%rip),%rdi # 36b41eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1478>\n+\tlea 0x36981216(%rip),%rdi # 36b42eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1478>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -367979,15 +367979,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369800fe(%rip),%rdi # 36b41eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1480>\n+\tlea 0x369810fe(%rip),%rdi # 36b42eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1480>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368048,15 +368048,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697ff48(%rip),%rdi # 36b41ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1488>\n+\tlea 0x36980f48(%rip),%rdi # 36b42ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1488>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368117,15 +368117,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697fd90(%rip),%rdi # 36b41ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1490>\n+\tlea 0x36980d90(%rip),%rdi # 36b42ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1490>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368166,15 +368166,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697fc76(%rip),%rdi # 36b41ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1498>\n+\tlea 0x36980c76(%rip),%rdi # 36b42ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1498>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368215,15 +368215,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697fb5e(%rip),%rdi # 36b41ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a0>\n+\tlea 0x36980b5e(%rip),%rdi # 36b42ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368284,15 +368284,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697f9a8(%rip),%rdi # 36b41ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a8>\n+\tlea 0x369809a8(%rip),%rdi # 36b42ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368353,15 +368353,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697f7f0(%rip),%rdi # 36b41ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b0>\n+\tlea 0x369807f0(%rip),%rdi # 36b42ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368402,15 +368402,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697f6d6(%rip),%rdi # 36b41ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b8>\n+\tlea 0x369806d6(%rip),%rdi # 36b42ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368451,15 +368451,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697f5be(%rip),%rdi # 36b41ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c0>\n+\tlea 0x369805be(%rip),%rdi # 36b42ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368520,15 +368520,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697f408(%rip),%rdi # 36b41f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c8>\n+\tlea 0x36980408(%rip),%rdi # 36b42f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368589,15 +368589,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697f250(%rip),%rdi # 36b41f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d0>\n+\tlea 0x36980250(%rip),%rdi # 36b42f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368638,15 +368638,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697f136(%rip),%rdi # 36b41f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d8>\n+\tlea 0x36980136(%rip),%rdi # 36b42f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368687,15 +368687,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697f01e(%rip),%rdi # 36b41f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e0>\n+\tlea 0x3698001e(%rip),%rdi # 36b42f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368756,15 +368756,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697ee68(%rip),%rdi # 36b41f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e8>\n+\tlea 0x3697fe68(%rip),%rdi # 36b42f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368825,15 +368825,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697ecb0(%rip),%rdi # 36b41f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f0>\n+\tlea 0x3697fcb0(%rip),%rdi # 36b42f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368874,15 +368874,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697eb96(%rip),%rdi # 36b41f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f8>\n+\tlea 0x3697fb96(%rip),%rdi # 36b42f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368923,15 +368923,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697ea7e(%rip),%rdi # 36b41f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1500>\n+\tlea 0x3697fa7e(%rip),%rdi # 36b42f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1500>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -368992,15 +368992,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697e8c8(%rip),%rdi # 36b41f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1508>\n+\tlea 0x3697f8c8(%rip),%rdi # 36b42f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1508>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369061,15 +369061,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697e710(%rip),%rdi # 36b41f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1510>\n+\tlea 0x3697f710(%rip),%rdi # 36b42f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1510>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369110,15 +369110,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697e5f6(%rip),%rdi # 36b41f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1518>\n+\tlea 0x3697f5f6(%rip),%rdi # 36b42f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1518>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369159,15 +369159,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697e4de(%rip),%rdi # 36b41f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1520>\n+\tlea 0x3697f4de(%rip),%rdi # 36b42f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1520>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369228,15 +369228,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697e328(%rip),%rdi # 36b41f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1528>\n+\tlea 0x3697f328(%rip),%rdi # 36b42f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1528>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369297,15 +369297,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697e170(%rip),%rdi # 36b41f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1530>\n+\tlea 0x3697f170(%rip),%rdi # 36b42f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1530>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369346,15 +369346,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697e056(%rip),%rdi # 36b41f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1538>\n+\tlea 0x3697f056(%rip),%rdi # 36b42f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1538>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369395,15 +369395,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697df3e(%rip),%rdi # 36b41f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1540>\n+\tlea 0x3697ef3e(%rip),%rdi # 36b42f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1540>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369464,15 +369464,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697dd88(%rip),%rdi # 36b41f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1548>\n+\tlea 0x3697ed88(%rip),%rdi # 36b42f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1548>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369533,15 +369533,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697dbd0(%rip),%rdi # 36b41f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1550>\n+\tlea 0x3697ebd0(%rip),%rdi # 36b42f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1550>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369582,15 +369582,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697dab6(%rip),%rdi # 36b41f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1558>\n+\tlea 0x3697eab6(%rip),%rdi # 36b42f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1558>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369631,15 +369631,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697d99e(%rip),%rdi # 36b41f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1560>\n+\tlea 0x3697e99e(%rip),%rdi # 36b42f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1560>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369700,15 +369700,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697d7e8(%rip),%rdi # 36b41fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1568>\n+\tlea 0x3697e7e8(%rip),%rdi # 36b42fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1568>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369769,15 +369769,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697d630(%rip),%rdi # 36b41fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1570>\n+\tlea 0x3697e630(%rip),%rdi # 36b42fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1570>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369818,15 +369818,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697d516(%rip),%rdi # 36b41fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1578>\n+\tlea 0x3697e516(%rip),%rdi # 36b42fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1578>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369867,15 +369867,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697d3fe(%rip),%rdi # 36b41fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1580>\n+\tlea 0x3697e3fe(%rip),%rdi # 36b42fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1580>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -369936,15 +369936,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697d248(%rip),%rdi # 36b41fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1588>\n+\tlea 0x3697e248(%rip),%rdi # 36b42fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1588>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370005,15 +370005,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697d090(%rip),%rdi # 36b41fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1590>\n+\tlea 0x3697e090(%rip),%rdi # 36b42fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1590>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370054,15 +370054,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697cf76(%rip),%rdi # 36b41fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1598>\n+\tlea 0x3697df76(%rip),%rdi # 36b42fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1598>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370103,15 +370103,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697ce5e(%rip),%rdi # 36b41fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a0>\n+\tlea 0x3697de5e(%rip),%rdi # 36b42fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370172,15 +370172,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697cca8(%rip),%rdi # 36b41fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a8>\n+\tlea 0x3697dca8(%rip),%rdi # 36b42fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370241,15 +370241,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697caf0(%rip),%rdi # 36b41fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b0>\n+\tlea 0x3697daf0(%rip),%rdi # 36b42fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370290,15 +370290,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697c9d6(%rip),%rdi # 36b41ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b8>\n+\tlea 0x3697d9d6(%rip),%rdi # 36b42ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370339,15 +370339,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697c8be(%rip),%rdi # 36b41ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c0>\n+\tlea 0x3697d8be(%rip),%rdi # 36b42ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370408,15 +370408,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697c708(%rip),%rdi # 36b42000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c8>\n+\tlea 0x3697d708(%rip),%rdi # 36b43000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370477,15 +370477,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697c550(%rip),%rdi # 36b42008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d0>\n+\tlea 0x3697d550(%rip),%rdi # 36b43008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370526,15 +370526,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697c436(%rip),%rdi # 36b42010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d8>\n+\tlea 0x3697d436(%rip),%rdi # 36b43010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370575,15 +370575,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697c31e(%rip),%rdi # 36b42018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e0>\n+\tlea 0x3697d31e(%rip),%rdi # 36b43018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370644,15 +370644,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697c168(%rip),%rdi # 36b42020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e8>\n+\tlea 0x3697d168(%rip),%rdi # 36b43020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370713,15 +370713,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697bfb0(%rip),%rdi # 36b42028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f0>\n+\tlea 0x3697cfb0(%rip),%rdi # 36b43028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370762,15 +370762,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697be96(%rip),%rdi # 36b42030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f8>\n+\tlea 0x3697ce96(%rip),%rdi # 36b43030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370811,15 +370811,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697bd7e(%rip),%rdi # 36b42038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1600>\n+\tlea 0x3697cd7e(%rip),%rdi # 36b43038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1600>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370880,15 +370880,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697bbc8(%rip),%rdi # 36b42040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1608>\n+\tlea 0x3697cbc8(%rip),%rdi # 36b43040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1608>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370949,15 +370949,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697ba10(%rip),%rdi # 36b42048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1610>\n+\tlea 0x3697ca10(%rip),%rdi # 36b43048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1610>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -370998,15 +370998,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697b8f6(%rip),%rdi # 36b42050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1618>\n+\tlea 0x3697c8f6(%rip),%rdi # 36b43050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1618>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -371047,15 +371047,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697b7de(%rip),%rdi # 36b42058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1620>\n+\tlea 0x3697c7de(%rip),%rdi # 36b43058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1620>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -371116,15 +371116,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697b628(%rip),%rdi # 36b42060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1628>\n+\tlea 0x3697c628(%rip),%rdi # 36b43060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1628>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -371185,15 +371185,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3697b470(%rip),%rdi # 36b42068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1630>\n+\tlea 0x3697c470(%rip),%rdi # 36b43068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1630>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -371234,15 +371234,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697b356(%rip),%rdi # 36b42070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1638>\n+\tlea 0x3697c356(%rip),%rdi # 36b43070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1638>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -371283,696 +371283,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3697b23e(%rip),%rdi # 36b42078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1640>\n+\tlea 0x3697c23e(%rip),%rdi # 36b43078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1640>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3697f604(%rip),%rbx # 36b46470 ::get_beta()::val@@Base+0x158>\n+\tmov 0x36980604(%rip),%rbx # 36b47470 ::get_beta()::val@@Base+0x158>\n \ttest %rbx,%rbx\n \tjne 1c6e87 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3697e778(%rip),%rdi # 36b455f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4bb8>\n+\tlea 0x3697f778(%rip),%rdi # 36b465f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4bb8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3697f5e9(%rip) # 36b46470 ::get_beta()::val@@Base+0x158>\n+\tmov %rax,0x369805e9(%rip) # 36b47470 ::get_beta()::val@@Base+0x158>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697afe6(%rip),%rsi # 36b41e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1448>\n+\tlea 0x3697bfe6(%rip),%rsi # 36b42e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1448>\n \tlea 0x1325a7(%rip),%rcx # 2f9448 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f1d8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697afc0(%rip),%rsi # 36b41e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1450>\n+\tlea 0x3697bfc0(%rip),%rsi # 36b42e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1450>\n \tlea 0x1325c5(%rip),%rcx # 2f9494 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f224>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697af9a(%rip),%rsi # 36b41e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1458>\n+\tlea 0x3697bf9a(%rip),%rsi # 36b42e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1458>\n \tlea 0x1325e3(%rip),%rcx # 2f94e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f270>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697af74(%rip),%rsi # 36b41e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1460>\n+\tlea 0x3697bf74(%rip),%rsi # 36b42e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1460>\n \tlea 0x132603(%rip),%rcx # 2f952e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f2be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697af4e(%rip),%rsi # 36b41ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1468>\n+\tlea 0x3697bf4e(%rip),%rsi # 36b42ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1468>\n \tlea 0x132623(%rip),%rcx # 2f957c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f30c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697af28(%rip),%rsi # 36b41ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1470>\n+\tlea 0x3697bf28(%rip),%rsi # 36b42ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1470>\n \tlea 0x132642(%rip),%rcx # 2f95c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f359>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697af02(%rip),%rsi # 36b41eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1478>\n+\tlea 0x3697bf02(%rip),%rsi # 36b42eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1478>\n \tlea 0x132661(%rip),%rcx # 2f9616 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f3a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aedc(%rip),%rsi # 36b41eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1480>\n+\tlea 0x3697bedc(%rip),%rsi # 36b42eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1480>\n \tlea 0x132682(%rip),%rcx # 2f9665 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f3f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aeb6(%rip),%rsi # 36b41ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1488>\n+\tlea 0x3697beb6(%rip),%rsi # 36b42ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1488>\n \tlea 0x1326a3(%rip),%rcx # 2f96b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f444>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ae90(%rip),%rsi # 36b41ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1490>\n+\tlea 0x3697be90(%rip),%rsi # 36b42ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1490>\n \tlea 0x1326c2(%rip),%rcx # 2f9701 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f491>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ae6a(%rip),%rsi # 36b41ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1498>\n+\tlea 0x3697be6a(%rip),%rsi # 36b42ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1498>\n \tlea 0x1326e1(%rip),%rcx # 2f974e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f4de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ae44(%rip),%rsi # 36b41ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a0>\n+\tlea 0x3697be44(%rip),%rsi # 36b42ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a0>\n \tlea 0x132702(%rip),%rcx # 2f979d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f52d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ae1e(%rip),%rsi # 36b41ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a8>\n+\tlea 0x3697be1e(%rip),%rsi # 36b42ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a8>\n \tlea 0x132723(%rip),%rcx # 2f97ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f57c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697adf8(%rip),%rsi # 36b41ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b0>\n+\tlea 0x3697bdf8(%rip),%rsi # 36b42ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b0>\n \tlea 0x132742(%rip),%rcx # 2f9839 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f5c9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697add2(%rip),%rsi # 36b41ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b8>\n+\tlea 0x3697bdd2(%rip),%rsi # 36b42ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b8>\n \tlea 0x132761(%rip),%rcx # 2f9886 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f616>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697adac(%rip),%rsi # 36b41ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c0>\n+\tlea 0x3697bdac(%rip),%rsi # 36b42ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c0>\n \tlea 0x132782(%rip),%rcx # 2f98d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f665>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ad86(%rip),%rsi # 36b41f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c8>\n+\tlea 0x3697bd86(%rip),%rsi # 36b42f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c8>\n \tlea 0x1327a3(%rip),%rcx # 2f9924 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f6b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ad60(%rip),%rsi # 36b41f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d0>\n+\tlea 0x3697bd60(%rip),%rsi # 36b42f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d0>\n \tlea 0x1327c2(%rip),%rcx # 2f9971 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f701>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ad3a(%rip),%rsi # 36b41f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d8>\n+\tlea 0x3697bd3a(%rip),%rsi # 36b42f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d8>\n \tlea 0x1327e1(%rip),%rcx # 2f99be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f74e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ad14(%rip),%rsi # 36b41f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e0>\n+\tlea 0x3697bd14(%rip),%rsi # 36b42f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e0>\n \tlea 0x132802(%rip),%rcx # 2f9a0d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f79d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697acee(%rip),%rsi # 36b41f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e8>\n+\tlea 0x3697bcee(%rip),%rsi # 36b42f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e8>\n \tlea 0x132823(%rip),%rcx # 2f9a5c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f7ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697acc8(%rip),%rsi # 36b41f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f0>\n+\tlea 0x3697bcc8(%rip),%rsi # 36b42f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f0>\n \tlea 0x132842(%rip),%rcx # 2f9aa9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f839>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aca2(%rip),%rsi # 36b41f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f8>\n+\tlea 0x3697bca2(%rip),%rsi # 36b42f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f8>\n \tlea 0x132861(%rip),%rcx # 2f9af6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f886>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ac7c(%rip),%rsi # 36b41f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1500>\n+\tlea 0x3697bc7c(%rip),%rsi # 36b42f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1500>\n \tlea 0x132882(%rip),%rcx # 2f9b45 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f8d5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ac56(%rip),%rsi # 36b41f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1508>\n+\tlea 0x3697bc56(%rip),%rsi # 36b42f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1508>\n \tlea 0x1328a3(%rip),%rcx # 2f9b94 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f924>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ac30(%rip),%rsi # 36b41f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1510>\n+\tlea 0x3697bc30(%rip),%rsi # 36b42f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1510>\n \tlea 0x1328c2(%rip),%rcx # 2f9be1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f971>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ac0a(%rip),%rsi # 36b41f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1518>\n+\tlea 0x3697bc0a(%rip),%rsi # 36b42f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1518>\n \tlea 0x1328e1(%rip),%rcx # 2f9c2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1f9be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697abe4(%rip),%rsi # 36b41f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1520>\n+\tlea 0x3697bbe4(%rip),%rsi # 36b42f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1520>\n \tlea 0x132902(%rip),%rcx # 2f9c7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fa0d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697abbe(%rip),%rsi # 36b41f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1528>\n+\tlea 0x3697bbbe(%rip),%rsi # 36b42f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1528>\n \tlea 0x132923(%rip),%rcx # 2f9ccc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fa5c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ab98(%rip),%rsi # 36b41f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1530>\n+\tlea 0x3697bb98(%rip),%rsi # 36b42f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1530>\n \tlea 0x132942(%rip),%rcx # 2f9d19 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1faa9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ab72(%rip),%rsi # 36b41f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1538>\n+\tlea 0x3697bb72(%rip),%rsi # 36b42f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1538>\n \tlea 0x132961(%rip),%rcx # 2f9d66 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1faf6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ab4c(%rip),%rsi # 36b41f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1540>\n+\tlea 0x3697bb4c(%rip),%rsi # 36b42f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1540>\n \tlea 0x132982(%rip),%rcx # 2f9db5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fb45>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ab26(%rip),%rsi # 36b41f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1548>\n+\tlea 0x3697bb26(%rip),%rsi # 36b42f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1548>\n \tlea 0x1329a3(%rip),%rcx # 2f9e04 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fb94>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697ab00(%rip),%rsi # 36b41f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1550>\n+\tlea 0x3697bb00(%rip),%rsi # 36b42f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1550>\n \tlea 0x1329c2(%rip),%rcx # 2f9e51 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fbe1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aada(%rip),%rsi # 36b41f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1558>\n+\tlea 0x3697bada(%rip),%rsi # 36b42f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1558>\n \tlea 0x1329e1(%rip),%rcx # 2f9e9e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fc2e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aab4(%rip),%rsi # 36b41f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1560>\n+\tlea 0x3697bab4(%rip),%rsi # 36b42f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1560>\n \tlea 0x132a02(%rip),%rcx # 2f9eed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fc7d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aa8e(%rip),%rsi # 36b41fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1568>\n+\tlea 0x3697ba8e(%rip),%rsi # 36b42fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1568>\n \tlea 0x132a23(%rip),%rcx # 2f9f3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fccc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aa68(%rip),%rsi # 36b41fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1570>\n+\tlea 0x3697ba68(%rip),%rsi # 36b42fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1570>\n \tlea 0x132a42(%rip),%rcx # 2f9f89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fd19>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aa42(%rip),%rsi # 36b41fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1578>\n+\tlea 0x3697ba42(%rip),%rsi # 36b42fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1578>\n \tlea 0x132a61(%rip),%rcx # 2f9fd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fd66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697aa1c(%rip),%rsi # 36b41fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1580>\n+\tlea 0x3697ba1c(%rip),%rsi # 36b42fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1580>\n \tlea 0x132a82(%rip),%rcx # 2fa025 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fdb5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a9f6(%rip),%rsi # 36b41fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1588>\n+\tlea 0x3697b9f6(%rip),%rsi # 36b42fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1588>\n \tlea 0x132aa3(%rip),%rcx # 2fa074 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fe04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a9d0(%rip),%rsi # 36b41fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1590>\n+\tlea 0x3697b9d0(%rip),%rsi # 36b42fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1590>\n \tlea 0x132ac2(%rip),%rcx # 2fa0c1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fe51>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a9aa(%rip),%rsi # 36b41fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1598>\n+\tlea 0x3697b9aa(%rip),%rsi # 36b42fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1598>\n \tlea 0x132ae1(%rip),%rcx # 2fa10e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1fe9e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a984(%rip),%rsi # 36b41fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a0>\n+\tlea 0x3697b984(%rip),%rsi # 36b42fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a0>\n \tlea 0x132b02(%rip),%rcx # 2fa15d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1feed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a95e(%rip),%rsi # 36b41fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a8>\n+\tlea 0x3697b95e(%rip),%rsi # 36b42fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a8>\n \tlea 0x132b23(%rip),%rcx # 2fa1ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ff3c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a938(%rip),%rsi # 36b41fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b0>\n+\tlea 0x3697b938(%rip),%rsi # 36b42fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b0>\n \tlea 0x132b42(%rip),%rcx # 2fa1f9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ff89>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a912(%rip),%rsi # 36b41ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b8>\n+\tlea 0x3697b912(%rip),%rsi # 36b42ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b8>\n \tlea 0x132b61(%rip),%rcx # 2fa246 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1ffd6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a8ec(%rip),%rsi # 36b41ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c0>\n+\tlea 0x3697b8ec(%rip),%rsi # 36b42ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c0>\n \tlea 0x132b82(%rip),%rcx # 2fa295 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20025>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a8c6(%rip),%rsi # 36b42000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c8>\n+\tlea 0x3697b8c6(%rip),%rsi # 36b43000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c8>\n \tlea 0x132ba3(%rip),%rcx # 2fa2e4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20074>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a8a0(%rip),%rsi # 36b42008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d0>\n+\tlea 0x3697b8a0(%rip),%rsi # 36b43008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d0>\n \tlea 0x132bc3(%rip),%rcx # 2fa332 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x200c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a87a(%rip),%rsi # 36b42010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d8>\n+\tlea 0x3697b87a(%rip),%rsi # 36b43010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d8>\n \tlea 0x132be3(%rip),%rcx # 2fa380 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20110>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3697a854(%rip),%rsi # 36b42018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e0>\n+\tlea 0x3697b854(%rip),%rsi # 36b43018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e0>\n \tlea 0x132c05(%rip),%rcx # 2fa3d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20160>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a817(%rip),%rsi # 36b42020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e8>\n+\tlea 0x3697b817(%rip),%rsi # 36b43020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e8>\n \tlea 0x132c10(%rip),%rcx # 2fa420 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x201b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a7da(%rip),%rsi # 36b42028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f0>\n+\tlea 0x3697b7da(%rip),%rsi # 36b43028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f0>\n \tlea 0x132c19(%rip),%rcx # 2fa46e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x201fe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a79d(%rip),%rsi # 36b42030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f8>\n+\tlea 0x3697b79d(%rip),%rsi # 36b43030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f8>\n \tlea 0x132c22(%rip),%rcx # 2fa4bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2024c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a760(%rip),%rsi # 36b42038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1600>\n+\tlea 0x3697b760(%rip),%rsi # 36b43038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1600>\n \tlea 0x132c2d(%rip),%rcx # 2fa50c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2029c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a723(%rip),%rsi # 36b42040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1608>\n+\tlea 0x3697b723(%rip),%rsi # 36b43040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1608>\n \tlea 0x132c38(%rip),%rcx # 2fa55c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x202ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a6e6(%rip),%rsi # 36b42048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1610>\n+\tlea 0x3697b6e6(%rip),%rsi # 36b43048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1610>\n \tlea 0x132c41(%rip),%rcx # 2fa5aa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2033a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a6a9(%rip),%rsi # 36b42050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1618>\n+\tlea 0x3697b6a9(%rip),%rsi # 36b43050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1618>\n \tlea 0x132c4a(%rip),%rcx # 2fa5f8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20388>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a66c(%rip),%rsi # 36b42058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1620>\n+\tlea 0x3697b66c(%rip),%rsi # 36b43058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1620>\n \tlea 0x132c55(%rip),%rcx # 2fa648 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x203d8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a62f(%rip),%rsi # 36b42060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1628>\n+\tlea 0x3697b62f(%rip),%rsi # 36b43060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1628>\n \tlea 0x132c60(%rip),%rcx # 2fa698 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20428>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a5f2(%rip),%rsi # 36b42068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1630>\n+\tlea 0x3697b5f2(%rip),%rsi # 36b43068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1630>\n \tlea 0x132c69(%rip),%rcx # 2fa6e6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20476>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a5b5(%rip),%rsi # 36b42070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1638>\n+\tlea 0x3697b5b5(%rip),%rsi # 36b43070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1638>\n \tlea 0x132c72(%rip),%rcx # 2fa734 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x204c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3697a578(%rip),%rsi # 36b42078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1640>\n+\tlea 0x3697b578(%rip),%rsi # 36b43078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1640>\n \tlea 0x132c7d(%rip),%rcx # 2fa784 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20514>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 1c7b30 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3697e939(%rip),%rdi # 36b46470 ::get_beta()::val@@Base+0x158>\n+\tmov 0x3697f939(%rip),%rdi # 36b47470 ::get_beta()::val@@Base+0x158>\n \ttest %rdi,%rdi\n \tje 1c7b51 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3697e923(%rip) # 36b46470 ::get_beta()::val@@Base+0x158>\n+\tmovq $0x0,0x3697f923(%rip) # 36b47470 ::get_beta()::val@@Base+0x158>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001c7b60 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)16>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -375585,15 +375585,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36977849(%rip),%rdi # 36b42058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1620>\n+\tlea 0x36978849(%rip),%rdi # 36b43058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1620>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1caaff (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -375729,15 +375729,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36977570(%rip),%rdi # 36b42050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1618>\n+\tlea 0x36978570(%rip),%rdi # 36b43050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1618>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -375888,15 +375888,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36977213(%rip),%rdi # 36b41ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c0>\n+\tlea 0x36978213(%rip),%rdi # 36b42ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cb0d5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -376032,15 +376032,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36976f3a(%rip),%rdi # 36b41ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b8>\n+\tlea 0x36977f3a(%rip),%rdi # 36b42ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -376191,15 +376191,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36976b5d(%rip),%rdi # 36b41f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e0>\n+\tlea 0x36977b5d(%rip),%rdi # 36b42f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cb6ab (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -376335,15 +376335,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36976884(%rip),%rdi # 36b41f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d8>\n+\tlea 0x36977884(%rip),%rdi # 36b42f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -376494,15 +376494,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36976687(%rip),%rdi # 36b42018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e0>\n+\tlea 0x36977687(%rip),%rdi # 36b43018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cbc81 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -376638,15 +376638,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369763ae(%rip),%rdi # 36b42010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d8>\n+\tlea 0x369773ae(%rip),%rdi # 36b43010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -376797,15 +376797,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36976051(%rip),%rdi # 36b41fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1580>\n+\tlea 0x36977051(%rip),%rdi # 36b42fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1580>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cc257 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -376941,15 +376941,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36975d78(%rip),%rdi # 36b41fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1578>\n+\tlea 0x36976d78(%rip),%rdi # 36b42fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1578>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -377100,15 +377100,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3697599b(%rip),%rdi # 36b41ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a0>\n+\tlea 0x3697699b(%rip),%rdi # 36b42ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cc82d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -377244,15 +377244,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369756c2(%rip),%rdi # 36b41ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1498>\n+\tlea 0x369766c2(%rip),%rdi # 36b42ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1498>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -377403,15 +377403,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36975565(%rip),%rdi # 36b42078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1640>\n+\tlea 0x36976565(%rip),%rdi # 36b43078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1640>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cce03 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -377547,15 +377547,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3697528c(%rip),%rdi # 36b42070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1638>\n+\tlea 0x3697628c(%rip),%rdi # 36b43070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1638>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -377706,15 +377706,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36974e0f(%rip),%rdi # 36b41ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c0>\n+\tlea 0x36975e0f(%rip),%rdi # 36b42ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cd3d9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -377850,15 +377850,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36974b36(%rip),%rdi # 36b41ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b8>\n+\tlea 0x36975b36(%rip),%rdi # 36b42ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -378009,15 +378009,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369748b9(%rip),%rdi # 36b41f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1540>\n+\tlea 0x369758b9(%rip),%rdi # 36b42f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1540>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cd9af (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -378153,15 +378153,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369745e0(%rip),%rdi # 36b41f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1538>\n+\tlea 0x369755e0(%rip),%rdi # 36b42f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1538>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -378312,15 +378312,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36974203(%rip),%rdi # 36b41e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1460>\n+\tlea 0x36975203(%rip),%rdi # 36b42e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1460>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ce266 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -378462,15 +378462,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36973f42(%rip),%rdi # 36b41eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1480>\n+\tlea 0x36974f42(%rip),%rdi # 36b42eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1480>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ce55b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -378606,15 +378606,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36973c49(%rip),%rdi # 36b41e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1458>\n+\tlea 0x36974c49(%rip),%rdi # 36b42e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1458>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -378759,15 +378759,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36973974(%rip),%rdi # 36b41eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1478>\n+\tlea 0x36974974(%rip),%rdi # 36b42eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1478>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -378918,15 +378918,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369736f7(%rip),%rdi # 36b41f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1500>\n+\tlea 0x369746f7(%rip),%rdi # 36b42f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1500>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ceb31 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -379062,15 +379062,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3697341e(%rip),%rdi # 36b41f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f8>\n+\tlea 0x3697441e(%rip),%rdi # 36b42f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x14f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -379221,15 +379221,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36973221(%rip),%rdi # 36b42038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1600>\n+\tlea 0x36974221(%rip),%rdi # 36b43038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1600>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cf107 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -379365,15 +379365,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36972f48(%rip),%rdi # 36b42030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f8>\n+\tlea 0x36973f48(%rip),%rdi # 36b43030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -379524,15 +379524,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36972b6b(%rip),%rdi # 36b41f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1520>\n+\tlea 0x36973b6b(%rip),%rdi # 36b42f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1520>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cf6dd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -379668,15 +379668,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36972892(%rip),%rdi # 36b41f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1518>\n+\tlea 0x36973892(%rip),%rdi # 36b42f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1518>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -379827,15 +379827,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36972615(%rip),%rdi # 36b41fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a0>\n+\tlea 0x36973615(%rip),%rdi # 36b42fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x15a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1cfcb3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -379971,15 +379971,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3697233c(%rip),%rdi # 36b41fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1598>\n+\tlea 0x3697333c(%rip),%rdi # 36b42fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1598>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -380130,15 +380130,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36971fff(%rip),%rdi # 36b41f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1560>\n+\tlea 0x36972fff(%rip),%rdi # 36b42f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1560>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1d0289 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -380274,15 +380274,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36971d26(%rip),%rdi # 36b41f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1558>\n+\tlea 0x36972d26(%rip),%rdi # 36b42f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1558>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -382125,15 +382125,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 1c4060 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 1d1add (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36973437(%rip),%rax \n+\tmov 0x36974437(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x123d38(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x123d37(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -382423,15 +382423,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696ff98(%rip),%rdi # 36b42080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1648>\n+\tlea 0x36970f98(%rip),%rdi # 36b43080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1648>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382492,15 +382492,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696fde0(%rip),%rdi # 36b42088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1650>\n+\tlea 0x36970de0(%rip),%rdi # 36b43088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1650>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382541,15 +382541,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696fcc6(%rip),%rdi # 36b42090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1658>\n+\tlea 0x36970cc6(%rip),%rdi # 36b43090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1658>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382590,15 +382590,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696fbae(%rip),%rdi # 36b42098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1660>\n+\tlea 0x36970bae(%rip),%rdi # 36b43098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1660>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382659,15 +382659,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696f9f8(%rip),%rdi # 36b420a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1668>\n+\tlea 0x369709f8(%rip),%rdi # 36b430a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1668>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382728,15 +382728,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696f840(%rip),%rdi # 36b420a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1670>\n+\tlea 0x36970840(%rip),%rdi # 36b430a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1670>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382777,15 +382777,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696f726(%rip),%rdi # 36b420b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1678>\n+\tlea 0x36970726(%rip),%rdi # 36b430b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1678>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382826,15 +382826,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696f60e(%rip),%rdi # 36b420b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1680>\n+\tlea 0x3697060e(%rip),%rdi # 36b430b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1680>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382895,15 +382895,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696f458(%rip),%rdi # 36b420c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1688>\n+\tlea 0x36970458(%rip),%rdi # 36b430c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1688>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -382964,15 +382964,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696f2a0(%rip),%rdi # 36b420c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1690>\n+\tlea 0x369702a0(%rip),%rdi # 36b430c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1690>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383013,15 +383013,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696f186(%rip),%rdi # 36b420d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1698>\n+\tlea 0x36970186(%rip),%rdi # 36b430d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1698>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383062,15 +383062,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696f06e(%rip),%rdi # 36b420d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a0>\n+\tlea 0x3697006e(%rip),%rdi # 36b430d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383131,15 +383131,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696eeb8(%rip),%rdi # 36b420e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a8>\n+\tlea 0x3696feb8(%rip),%rdi # 36b430e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383200,15 +383200,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696ed00(%rip),%rdi # 36b420e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b0>\n+\tlea 0x3696fd00(%rip),%rdi # 36b430e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383249,15 +383249,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696ebe6(%rip),%rdi # 36b420f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b8>\n+\tlea 0x3696fbe6(%rip),%rdi # 36b430f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383298,15 +383298,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696eace(%rip),%rdi # 36b420f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c0>\n+\tlea 0x3696face(%rip),%rdi # 36b430f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383367,15 +383367,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696e918(%rip),%rdi # 36b42100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c8>\n+\tlea 0x3696f918(%rip),%rdi # 36b43100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383436,15 +383436,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696e760(%rip),%rdi # 36b42108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d0>\n+\tlea 0x3696f760(%rip),%rdi # 36b43108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383485,15 +383485,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696e646(%rip),%rdi # 36b42110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d8>\n+\tlea 0x3696f646(%rip),%rdi # 36b43110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383534,15 +383534,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696e52e(%rip),%rdi # 36b42118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e0>\n+\tlea 0x3696f52e(%rip),%rdi # 36b43118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383603,15 +383603,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696e378(%rip),%rdi # 36b42120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e8>\n+\tlea 0x3696f378(%rip),%rdi # 36b43120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383672,15 +383672,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696e1c0(%rip),%rdi # 36b42128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f0>\n+\tlea 0x3696f1c0(%rip),%rdi # 36b43128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383721,15 +383721,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696e0a6(%rip),%rdi # 36b42130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f8>\n+\tlea 0x3696f0a6(%rip),%rdi # 36b43130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383770,15 +383770,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696df8e(%rip),%rdi # 36b42138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1700>\n+\tlea 0x3696ef8e(%rip),%rdi # 36b43138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1700>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383839,15 +383839,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696ddd8(%rip),%rdi # 36b42140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1708>\n+\tlea 0x3696edd8(%rip),%rdi # 36b43140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1708>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383908,15 +383908,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696dc20(%rip),%rdi # 36b42148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1710>\n+\tlea 0x3696ec20(%rip),%rdi # 36b43148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1710>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -383957,15 +383957,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696db06(%rip),%rdi # 36b42150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1718>\n+\tlea 0x3696eb06(%rip),%rdi # 36b43150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1718>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384006,15 +384006,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696d9ee(%rip),%rdi # 36b42158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1720>\n+\tlea 0x3696e9ee(%rip),%rdi # 36b43158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1720>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384075,15 +384075,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696d838(%rip),%rdi # 36b42160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1728>\n+\tlea 0x3696e838(%rip),%rdi # 36b43160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1728>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384144,15 +384144,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696d680(%rip),%rdi # 36b42168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1730>\n+\tlea 0x3696e680(%rip),%rdi # 36b43168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1730>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384193,15 +384193,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696d566(%rip),%rdi # 36b42170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1738>\n+\tlea 0x3696e566(%rip),%rdi # 36b43170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1738>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384242,15 +384242,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696d44e(%rip),%rdi # 36b42178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1740>\n+\tlea 0x3696e44e(%rip),%rdi # 36b43178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1740>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384311,15 +384311,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696d298(%rip),%rdi # 36b42180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1748>\n+\tlea 0x3696e298(%rip),%rdi # 36b43180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1748>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384380,15 +384380,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696d0e0(%rip),%rdi # 36b42188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1750>\n+\tlea 0x3696e0e0(%rip),%rdi # 36b43188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1750>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384429,15 +384429,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696cfc6(%rip),%rdi # 36b42190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1758>\n+\tlea 0x3696dfc6(%rip),%rdi # 36b43190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1758>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384478,15 +384478,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696ceae(%rip),%rdi # 36b42198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1760>\n+\tlea 0x3696deae(%rip),%rdi # 36b43198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1760>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384547,15 +384547,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696ccf8(%rip),%rdi # 36b421a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1768>\n+\tlea 0x3696dcf8(%rip),%rdi # 36b431a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1768>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384616,15 +384616,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696cb40(%rip),%rdi # 36b421a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1770>\n+\tlea 0x3696db40(%rip),%rdi # 36b431a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1770>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384665,15 +384665,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696ca26(%rip),%rdi # 36b421b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1778>\n+\tlea 0x3696da26(%rip),%rdi # 36b431b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1778>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384714,15 +384714,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696c90e(%rip),%rdi # 36b421b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1780>\n+\tlea 0x3696d90e(%rip),%rdi # 36b431b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1780>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384783,15 +384783,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696c758(%rip),%rdi # 36b421c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1788>\n+\tlea 0x3696d758(%rip),%rdi # 36b431c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1788>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384852,15 +384852,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696c5a0(%rip),%rdi # 36b421c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1790>\n+\tlea 0x3696d5a0(%rip),%rdi # 36b431c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1790>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384901,15 +384901,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696c486(%rip),%rdi # 36b421d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1798>\n+\tlea 0x3696d486(%rip),%rdi # 36b431d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1798>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -384950,15 +384950,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696c36e(%rip),%rdi # 36b421d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a0>\n+\tlea 0x3696d36e(%rip),%rdi # 36b431d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385019,15 +385019,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696c1b8(%rip),%rdi # 36b421e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a8>\n+\tlea 0x3696d1b8(%rip),%rdi # 36b431e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385088,15 +385088,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696c000(%rip),%rdi # 36b421e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b0>\n+\tlea 0x3696d000(%rip),%rdi # 36b431e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385137,15 +385137,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696bee6(%rip),%rdi # 36b421f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b8>\n+\tlea 0x3696cee6(%rip),%rdi # 36b431f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385186,15 +385186,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696bdce(%rip),%rdi # 36b421f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c0>\n+\tlea 0x3696cdce(%rip),%rdi # 36b431f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385255,15 +385255,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696bc18(%rip),%rdi # 36b42200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c8>\n+\tlea 0x3696cc18(%rip),%rdi # 36b43200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385324,15 +385324,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696ba60(%rip),%rdi # 36b42208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d0>\n+\tlea 0x3696ca60(%rip),%rdi # 36b43208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385373,15 +385373,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696b946(%rip),%rdi # 36b42210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d8>\n+\tlea 0x3696c946(%rip),%rdi # 36b43210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385422,15 +385422,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696b82e(%rip),%rdi # 36b42218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e0>\n+\tlea 0x3696c82e(%rip),%rdi # 36b43218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385491,15 +385491,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696b678(%rip),%rdi # 36b42220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e8>\n+\tlea 0x3696c678(%rip),%rdi # 36b43220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385560,15 +385560,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696b4c0(%rip),%rdi # 36b42228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f0>\n+\tlea 0x3696c4c0(%rip),%rdi # 36b43228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385609,15 +385609,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696b3a6(%rip),%rdi # 36b42230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f8>\n+\tlea 0x3696c3a6(%rip),%rdi # 36b43230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385658,15 +385658,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696b28e(%rip),%rdi # 36b42238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1800>\n+\tlea 0x3696c28e(%rip),%rdi # 36b43238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1800>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385727,15 +385727,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696b0d8(%rip),%rdi # 36b42240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1808>\n+\tlea 0x3696c0d8(%rip),%rdi # 36b43240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1808>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385796,15 +385796,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696af20(%rip),%rdi # 36b42248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1810>\n+\tlea 0x3696bf20(%rip),%rdi # 36b43248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1810>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385845,15 +385845,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696ae06(%rip),%rdi # 36b42250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1818>\n+\tlea 0x3696be06(%rip),%rdi # 36b43250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1818>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385894,15 +385894,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696acee(%rip),%rdi # 36b42258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1820>\n+\tlea 0x3696bcee(%rip),%rdi # 36b43258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1820>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -385963,15 +385963,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696ab38(%rip),%rdi # 36b42260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1828>\n+\tlea 0x3696bb38(%rip),%rdi # 36b43260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1828>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -386032,15 +386032,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3696a980(%rip),%rdi # 36b42268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1830>\n+\tlea 0x3696b980(%rip),%rdi # 36b43268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1830>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -386081,15 +386081,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696a866(%rip),%rdi # 36b42270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1838>\n+\tlea 0x3696b866(%rip),%rdi # 36b43270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1838>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -386130,696 +386130,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3696a74e(%rip),%rdi # 36b42278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1840>\n+\tlea 0x3696b74e(%rip),%rdi # 36b43278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1840>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3696e91c(%rip),%rbx # 36b46478 ::get_beta()::val@@Base+0x160>\n+\tmov 0x3696f91c(%rip),%rbx # 36b47478 ::get_beta()::val@@Base+0x160>\n \ttest %rbx,%rbx\n \tjne 1d7b77 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3696daa0(%rip),%rdi # 36b45608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4bd0>\n+\tlea 0x3696eaa0(%rip),%rdi # 36b46608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4bd0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3696e901(%rip) # 36b46478 ::get_beta()::val@@Base+0x160>\n+\tmov %rax,0x3696f901(%rip) # 36b47478 ::get_beta()::val@@Base+0x160>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a4f6(%rip),%rsi # 36b42080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1648>\n+\tlea 0x3696b4f6(%rip),%rsi # 36b43080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1648>\n \tlea 0x122c43(%rip),%rcx # 2fa7d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20564>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a4d0(%rip),%rsi # 36b42088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1650>\n+\tlea 0x3696b4d0(%rip),%rsi # 36b43088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1650>\n \tlea 0x122c61(%rip),%rcx # 2fa820 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x205b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a4aa(%rip),%rsi # 36b42090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1658>\n+\tlea 0x3696b4aa(%rip),%rsi # 36b43090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1658>\n \tlea 0x122c7f(%rip),%rcx # 2fa86c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x205fc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a484(%rip),%rsi # 36b42098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1660>\n+\tlea 0x3696b484(%rip),%rsi # 36b43098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1660>\n \tlea 0x122c9f(%rip),%rcx # 2fa8ba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2064a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a45e(%rip),%rsi # 36b420a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1668>\n+\tlea 0x3696b45e(%rip),%rsi # 36b430a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1668>\n \tlea 0x122cbf(%rip),%rcx # 2fa908 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20698>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a438(%rip),%rsi # 36b420a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1670>\n+\tlea 0x3696b438(%rip),%rsi # 36b430a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1670>\n \tlea 0x122cde(%rip),%rcx # 2fa955 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x206e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a412(%rip),%rsi # 36b420b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1678>\n+\tlea 0x3696b412(%rip),%rsi # 36b430b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1678>\n \tlea 0x122cfd(%rip),%rcx # 2fa9a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20732>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a3ec(%rip),%rsi # 36b420b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1680>\n+\tlea 0x3696b3ec(%rip),%rsi # 36b430b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1680>\n \tlea 0x122d1e(%rip),%rcx # 2fa9f1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20781>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a3c6(%rip),%rsi # 36b420c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1688>\n+\tlea 0x3696b3c6(%rip),%rsi # 36b430c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1688>\n \tlea 0x122d3f(%rip),%rcx # 2faa40 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x207d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a3a0(%rip),%rsi # 36b420c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1690>\n+\tlea 0x3696b3a0(%rip),%rsi # 36b430c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1690>\n \tlea 0x122d5e(%rip),%rcx # 2faa8d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2081d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a37a(%rip),%rsi # 36b420d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1698>\n+\tlea 0x3696b37a(%rip),%rsi # 36b430d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1698>\n \tlea 0x122d7d(%rip),%rcx # 2faada (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2086a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a354(%rip),%rsi # 36b420d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a0>\n+\tlea 0x3696b354(%rip),%rsi # 36b430d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a0>\n \tlea 0x122d9e(%rip),%rcx # 2fab29 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x208b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a32e(%rip),%rsi # 36b420e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a8>\n+\tlea 0x3696b32e(%rip),%rsi # 36b430e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a8>\n \tlea 0x122dbf(%rip),%rcx # 2fab78 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20908>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a308(%rip),%rsi # 36b420e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b0>\n+\tlea 0x3696b308(%rip),%rsi # 36b430e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b0>\n \tlea 0x122dde(%rip),%rcx # 2fabc5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20955>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a2e2(%rip),%rsi # 36b420f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b8>\n+\tlea 0x3696b2e2(%rip),%rsi # 36b430f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b8>\n \tlea 0x122dfd(%rip),%rcx # 2fac12 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x209a2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a2bc(%rip),%rsi # 36b420f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c0>\n+\tlea 0x3696b2bc(%rip),%rsi # 36b430f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c0>\n \tlea 0x122e1e(%rip),%rcx # 2fac61 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x209f1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a296(%rip),%rsi # 36b42100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c8>\n+\tlea 0x3696b296(%rip),%rsi # 36b43100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c8>\n \tlea 0x122e3f(%rip),%rcx # 2facb0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20a40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a270(%rip),%rsi # 36b42108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d0>\n+\tlea 0x3696b270(%rip),%rsi # 36b43108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d0>\n \tlea 0x122e5e(%rip),%rcx # 2facfd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20a8d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a24a(%rip),%rsi # 36b42110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d8>\n+\tlea 0x3696b24a(%rip),%rsi # 36b43110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d8>\n \tlea 0x122e7d(%rip),%rcx # 2fad4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20ada>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a224(%rip),%rsi # 36b42118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e0>\n+\tlea 0x3696b224(%rip),%rsi # 36b43118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e0>\n \tlea 0x122e9e(%rip),%rcx # 2fad99 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20b29>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a1fe(%rip),%rsi # 36b42120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e8>\n+\tlea 0x3696b1fe(%rip),%rsi # 36b43120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e8>\n \tlea 0x122ebf(%rip),%rcx # 2fade8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20b78>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a1d8(%rip),%rsi # 36b42128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f0>\n+\tlea 0x3696b1d8(%rip),%rsi # 36b43128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f0>\n \tlea 0x122ede(%rip),%rcx # 2fae35 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20bc5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a1b2(%rip),%rsi # 36b42130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f8>\n+\tlea 0x3696b1b2(%rip),%rsi # 36b43130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f8>\n \tlea 0x122efd(%rip),%rcx # 2fae82 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20c12>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a18c(%rip),%rsi # 36b42138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1700>\n+\tlea 0x3696b18c(%rip),%rsi # 36b43138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1700>\n \tlea 0x122f1e(%rip),%rcx # 2faed1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20c61>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a166(%rip),%rsi # 36b42140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1708>\n+\tlea 0x3696b166(%rip),%rsi # 36b43140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1708>\n \tlea 0x122f3f(%rip),%rcx # 2faf20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20cb0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a140(%rip),%rsi # 36b42148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1710>\n+\tlea 0x3696b140(%rip),%rsi # 36b43148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1710>\n \tlea 0x122f5e(%rip),%rcx # 2faf6d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20cfd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a11a(%rip),%rsi # 36b42150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1718>\n+\tlea 0x3696b11a(%rip),%rsi # 36b43150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1718>\n \tlea 0x122f7d(%rip),%rcx # 2fafba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20d4a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a0f4(%rip),%rsi # 36b42158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1720>\n+\tlea 0x3696b0f4(%rip),%rsi # 36b43158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1720>\n \tlea 0x122f9e(%rip),%rcx # 2fb009 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20d99>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a0ce(%rip),%rsi # 36b42160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1728>\n+\tlea 0x3696b0ce(%rip),%rsi # 36b43160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1728>\n \tlea 0x122fbf(%rip),%rcx # 2fb058 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20de8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a0a8(%rip),%rsi # 36b42168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1730>\n+\tlea 0x3696b0a8(%rip),%rsi # 36b43168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1730>\n \tlea 0x122fde(%rip),%rcx # 2fb0a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20e35>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a082(%rip),%rsi # 36b42170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1738>\n+\tlea 0x3696b082(%rip),%rsi # 36b43170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1738>\n \tlea 0x122ffd(%rip),%rcx # 2fb0f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20e82>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a05c(%rip),%rsi # 36b42178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1740>\n+\tlea 0x3696b05c(%rip),%rsi # 36b43178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1740>\n \tlea 0x12301e(%rip),%rcx # 2fb141 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20ed1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a036(%rip),%rsi # 36b42180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1748>\n+\tlea 0x3696b036(%rip),%rsi # 36b43180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1748>\n \tlea 0x12303f(%rip),%rcx # 2fb190 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20f20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3696a010(%rip),%rsi # 36b42188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1750>\n+\tlea 0x3696b010(%rip),%rsi # 36b43188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1750>\n \tlea 0x12305e(%rip),%rcx # 2fb1dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20f6d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969fea(%rip),%rsi # 36b42190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1758>\n+\tlea 0x3696afea(%rip),%rsi # 36b43190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1758>\n \tlea 0x12307d(%rip),%rcx # 2fb22a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x20fba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969fc4(%rip),%rsi # 36b42198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1760>\n+\tlea 0x3696afc4(%rip),%rsi # 36b43198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1760>\n \tlea 0x12309e(%rip),%rcx # 2fb279 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21009>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969f9e(%rip),%rsi # 36b421a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1768>\n+\tlea 0x3696af9e(%rip),%rsi # 36b431a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1768>\n \tlea 0x1230bf(%rip),%rcx # 2fb2c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21058>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969f78(%rip),%rsi # 36b421a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1770>\n+\tlea 0x3696af78(%rip),%rsi # 36b431a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1770>\n \tlea 0x1230de(%rip),%rcx # 2fb315 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x210a5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969f52(%rip),%rsi # 36b421b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1778>\n+\tlea 0x3696af52(%rip),%rsi # 36b431b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1778>\n \tlea 0x1230fd(%rip),%rcx # 2fb362 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x210f2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969f2c(%rip),%rsi # 36b421b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1780>\n+\tlea 0x3696af2c(%rip),%rsi # 36b431b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1780>\n \tlea 0x12311e(%rip),%rcx # 2fb3b1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21141>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969f06(%rip),%rsi # 36b421c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1788>\n+\tlea 0x3696af06(%rip),%rsi # 36b431c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1788>\n \tlea 0x12313f(%rip),%rcx # 2fb400 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21190>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969ee0(%rip),%rsi # 36b421c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1790>\n+\tlea 0x3696aee0(%rip),%rsi # 36b431c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1790>\n \tlea 0x12315e(%rip),%rcx # 2fb44d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x211dd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969eba(%rip),%rsi # 36b421d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1798>\n+\tlea 0x3696aeba(%rip),%rsi # 36b431d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1798>\n \tlea 0x12317d(%rip),%rcx # 2fb49a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2122a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969e94(%rip),%rsi # 36b421d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a0>\n+\tlea 0x3696ae94(%rip),%rsi # 36b431d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a0>\n \tlea 0x12319e(%rip),%rcx # 2fb4e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21279>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969e6e(%rip),%rsi # 36b421e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a8>\n+\tlea 0x3696ae6e(%rip),%rsi # 36b431e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a8>\n \tlea 0x1231bf(%rip),%rcx # 2fb538 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x212c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969e48(%rip),%rsi # 36b421e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b0>\n+\tlea 0x3696ae48(%rip),%rsi # 36b431e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b0>\n \tlea 0x1231de(%rip),%rcx # 2fb585 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21315>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969e22(%rip),%rsi # 36b421f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b8>\n+\tlea 0x3696ae22(%rip),%rsi # 36b431f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b8>\n \tlea 0x1231fd(%rip),%rcx # 2fb5d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21362>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969dfc(%rip),%rsi # 36b421f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c0>\n+\tlea 0x3696adfc(%rip),%rsi # 36b431f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c0>\n \tlea 0x12321e(%rip),%rcx # 2fb621 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x213b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969dd6(%rip),%rsi # 36b42200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c8>\n+\tlea 0x3696add6(%rip),%rsi # 36b43200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c8>\n \tlea 0x12323f(%rip),%rcx # 2fb670 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21400>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969db0(%rip),%rsi # 36b42208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d0>\n+\tlea 0x3696adb0(%rip),%rsi # 36b43208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d0>\n \tlea 0x12325f(%rip),%rcx # 2fb6be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2144e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969d8a(%rip),%rsi # 36b42210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d8>\n+\tlea 0x3696ad8a(%rip),%rsi # 36b43210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d8>\n \tlea 0x12327f(%rip),%rcx # 2fb70c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2149c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36969d64(%rip),%rsi # 36b42218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e0>\n+\tlea 0x3696ad64(%rip),%rsi # 36b43218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e0>\n \tlea 0x1232a1(%rip),%rcx # 2fb75c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x214ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969d27(%rip),%rsi # 36b42220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e8>\n+\tlea 0x3696ad27(%rip),%rsi # 36b43220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e8>\n \tlea 0x1232ac(%rip),%rcx # 2fb7ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2153c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969cea(%rip),%rsi # 36b42228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f0>\n+\tlea 0x3696acea(%rip),%rsi # 36b43228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f0>\n \tlea 0x1232b5(%rip),%rcx # 2fb7fa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2158a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969cad(%rip),%rsi # 36b42230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f8>\n+\tlea 0x3696acad(%rip),%rsi # 36b43230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f8>\n \tlea 0x1232be(%rip),%rcx # 2fb848 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x215d8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969c70(%rip),%rsi # 36b42238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1800>\n+\tlea 0x3696ac70(%rip),%rsi # 36b43238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1800>\n \tlea 0x1232c9(%rip),%rcx # 2fb898 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21628>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969c33(%rip),%rsi # 36b42240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1808>\n+\tlea 0x3696ac33(%rip),%rsi # 36b43240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1808>\n \tlea 0x1232d4(%rip),%rcx # 2fb8e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21678>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969bf6(%rip),%rsi # 36b42248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1810>\n+\tlea 0x3696abf6(%rip),%rsi # 36b43248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1810>\n \tlea 0x1232dd(%rip),%rcx # 2fb936 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x216c6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969bb9(%rip),%rsi # 36b42250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1818>\n+\tlea 0x3696abb9(%rip),%rsi # 36b43250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1818>\n \tlea 0x1232e6(%rip),%rcx # 2fb984 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21714>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969b7c(%rip),%rsi # 36b42258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1820>\n+\tlea 0x3696ab7c(%rip),%rsi # 36b43258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1820>\n \tlea 0x1232f1(%rip),%rcx # 2fb9d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21764>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969b3f(%rip),%rsi # 36b42260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1828>\n+\tlea 0x3696ab3f(%rip),%rsi # 36b43260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1828>\n \tlea 0x1232fc(%rip),%rcx # 2fba24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x217b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969b02(%rip),%rsi # 36b42268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1830>\n+\tlea 0x3696ab02(%rip),%rsi # 36b43268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1830>\n \tlea 0x123305(%rip),%rcx # 2fba72 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21802>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969ac5(%rip),%rsi # 36b42270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1838>\n+\tlea 0x3696aac5(%rip),%rsi # 36b43270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1838>\n \tlea 0x12330e(%rip),%rcx # 2fbac0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21850>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36969a88(%rip),%rsi # 36b42278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1840>\n+\tlea 0x3696aa88(%rip),%rsi # 36b43278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1840>\n \tlea 0x123319(%rip),%rcx # 2fbb10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x218a0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 1d8820 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3696dc51(%rip),%rdi # 36b46478 ::get_beta()::val@@Base+0x160>\n+\tmov 0x3696ec51(%rip),%rdi # 36b47478 ::get_beta()::val@@Base+0x160>\n \ttest %rdi,%rdi\n \tje 1d8841 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3696dc3b(%rip) # 36b46478 ::get_beta()::val@@Base+0x160>\n+\tmovq $0x0,0x3696ec3b(%rip) # 36b47478 ::get_beta()::val@@Base+0x160>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001d8850 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)21>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -390432,15 +390432,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36966d59(%rip),%rdi # 36b42258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1820>\n+\tlea 0x36967d59(%rip),%rdi # 36b43258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1820>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1db7ef (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -390576,15 +390576,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36966a80(%rip),%rdi # 36b42250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1818>\n+\tlea 0x36967a80(%rip),%rdi # 36b43250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1818>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -390735,15 +390735,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36966723(%rip),%rdi # 36b421f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c0>\n+\tlea 0x36967723(%rip),%rdi # 36b431f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1dbdc5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -390879,15 +390879,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696644a(%rip),%rdi # 36b421f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b8>\n+\tlea 0x3696744a(%rip),%rdi # 36b431f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -391038,15 +391038,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696606d(%rip),%rdi # 36b42118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e0>\n+\tlea 0x3696706d(%rip),%rdi # 36b43118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1dc39b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -391182,15 +391182,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36965d94(%rip),%rdi # 36b42110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d8>\n+\tlea 0x36966d94(%rip),%rdi # 36b43110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -391341,15 +391341,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36965b97(%rip),%rdi # 36b42218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e0>\n+\tlea 0x36966b97(%rip),%rdi # 36b43218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1dc971 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -391485,15 +391485,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369658be(%rip),%rdi # 36b42210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d8>\n+\tlea 0x369668be(%rip),%rdi # 36b43210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -391644,15 +391644,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36965561(%rip),%rdi # 36b421b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1780>\n+\tlea 0x36966561(%rip),%rdi # 36b431b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1780>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1dcf47 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -391788,15 +391788,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36965288(%rip),%rdi # 36b421b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1778>\n+\tlea 0x36966288(%rip),%rdi # 36b431b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1778>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -391947,15 +391947,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36964eab(%rip),%rdi # 36b420d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a0>\n+\tlea 0x36965eab(%rip),%rdi # 36b430d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1dd51d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -392091,15 +392091,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36964bd2(%rip),%rdi # 36b420d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1698>\n+\tlea 0x36965bd2(%rip),%rdi # 36b430d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1698>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -392250,15 +392250,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36964a75(%rip),%rdi # 36b42278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1840>\n+\tlea 0x36965a75(%rip),%rdi # 36b43278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1840>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ddaf3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -392394,15 +392394,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696479c(%rip),%rdi # 36b42270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1838>\n+\tlea 0x3696579c(%rip),%rdi # 36b43270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1838>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -392553,15 +392553,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696431f(%rip),%rdi # 36b420f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c0>\n+\tlea 0x3696531f(%rip),%rdi # 36b430f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1de0c9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -392697,15 +392697,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36964046(%rip),%rdi # 36b420f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b8>\n+\tlea 0x36965046(%rip),%rdi # 36b430f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -392856,15 +392856,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36963dc9(%rip),%rdi # 36b42178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1740>\n+\tlea 0x36964dc9(%rip),%rdi # 36b43178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1740>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1de69f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -393000,15 +393000,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36963af0(%rip),%rdi # 36b42170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1738>\n+\tlea 0x36964af0(%rip),%rdi # 36b43170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1738>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -393159,15 +393159,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36963713(%rip),%rdi # 36b42098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1660>\n+\tlea 0x36964713(%rip),%rdi # 36b43098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1660>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1def56 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -393309,15 +393309,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36963452(%rip),%rdi # 36b420b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1680>\n+\tlea 0x36964452(%rip),%rdi # 36b430b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1680>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1df24b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -393453,15 +393453,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36963159(%rip),%rdi # 36b42090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1658>\n+\tlea 0x36964159(%rip),%rdi # 36b43090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1658>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -393606,15 +393606,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36962e84(%rip),%rdi # 36b420b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1678>\n+\tlea 0x36963e84(%rip),%rdi # 36b430b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1678>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -393765,15 +393765,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36962c07(%rip),%rdi # 36b42138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1700>\n+\tlea 0x36963c07(%rip),%rdi # 36b43138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1700>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1df821 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -393909,15 +393909,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696292e(%rip),%rdi # 36b42130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f8>\n+\tlea 0x3696392e(%rip),%rdi # 36b43130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x16f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -394068,15 +394068,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36962731(%rip),%rdi # 36b42238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1800>\n+\tlea 0x36963731(%rip),%rdi # 36b43238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1800>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1dfdf7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -394212,15 +394212,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36962458(%rip),%rdi # 36b42230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f8>\n+\tlea 0x36963458(%rip),%rdi # 36b43230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -394371,15 +394371,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696207b(%rip),%rdi # 36b42158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1720>\n+\tlea 0x3696307b(%rip),%rdi # 36b43158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1720>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1e03cd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -394515,15 +394515,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36961da2(%rip),%rdi # 36b42150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1718>\n+\tlea 0x36962da2(%rip),%rdi # 36b43150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1718>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -394674,15 +394674,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36961b25(%rip),%rdi # 36b421d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a0>\n+\tlea 0x36962b25(%rip),%rdi # 36b431d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x17a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1e09a3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -394818,15 +394818,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696184c(%rip),%rdi # 36b421d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1798>\n+\tlea 0x3696284c(%rip),%rdi # 36b431d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1798>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -394977,15 +394977,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3696150f(%rip),%rdi # 36b42198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1760>\n+\tlea 0x3696250f(%rip),%rdi # 36b43198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1760>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1e0f79 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -395121,15 +395121,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36961236(%rip),%rdi # 36b42190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1758>\n+\tlea 0x36962236(%rip),%rdi # 36b43190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1758>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -396972,15 +396972,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 1d4d50 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 1e27cd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36962747(%rip),%rax \n+\tmov 0x36963747(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x113048(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x113047(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -397270,15 +397270,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695f4a8(%rip),%rdi # 36b42280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1848>\n+\tlea 0x369604a8(%rip),%rdi # 36b43280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1848>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397339,15 +397339,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695f2f0(%rip),%rdi # 36b42288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1850>\n+\tlea 0x369602f0(%rip),%rdi # 36b43288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1850>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397388,15 +397388,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695f1d6(%rip),%rdi # 36b42290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1858>\n+\tlea 0x369601d6(%rip),%rdi # 36b43290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1858>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397437,15 +397437,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695f0be(%rip),%rdi # 36b42298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1860>\n+\tlea 0x369600be(%rip),%rdi # 36b43298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1860>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397506,15 +397506,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695ef08(%rip),%rdi # 36b422a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1868>\n+\tlea 0x3695ff08(%rip),%rdi # 36b432a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1868>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397575,15 +397575,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695ed50(%rip),%rdi # 36b422a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1870>\n+\tlea 0x3695fd50(%rip),%rdi # 36b432a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1870>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397624,15 +397624,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695ec36(%rip),%rdi # 36b422b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1878>\n+\tlea 0x3695fc36(%rip),%rdi # 36b432b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1878>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397673,15 +397673,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695eb1e(%rip),%rdi # 36b422b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1880>\n+\tlea 0x3695fb1e(%rip),%rdi # 36b432b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1880>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397742,15 +397742,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695e968(%rip),%rdi # 36b422c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1888>\n+\tlea 0x3695f968(%rip),%rdi # 36b432c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1888>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397811,15 +397811,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695e7b0(%rip),%rdi # 36b422c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1890>\n+\tlea 0x3695f7b0(%rip),%rdi # 36b432c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1890>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397860,15 +397860,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695e696(%rip),%rdi # 36b422d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1898>\n+\tlea 0x3695f696(%rip),%rdi # 36b432d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1898>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397909,15 +397909,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695e57e(%rip),%rdi # 36b422d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a0>\n+\tlea 0x3695f57e(%rip),%rdi # 36b432d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -397978,15 +397978,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695e3c8(%rip),%rdi # 36b422e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a8>\n+\tlea 0x3695f3c8(%rip),%rdi # 36b432e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398047,15 +398047,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695e210(%rip),%rdi # 36b422e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b0>\n+\tlea 0x3695f210(%rip),%rdi # 36b432e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398096,15 +398096,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695e0f6(%rip),%rdi # 36b422f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b8>\n+\tlea 0x3695f0f6(%rip),%rdi # 36b432f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398145,15 +398145,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695dfde(%rip),%rdi # 36b422f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c0>\n+\tlea 0x3695efde(%rip),%rdi # 36b432f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398214,15 +398214,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695de28(%rip),%rdi # 36b42300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c8>\n+\tlea 0x3695ee28(%rip),%rdi # 36b43300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398283,15 +398283,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695dc70(%rip),%rdi # 36b42308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d0>\n+\tlea 0x3695ec70(%rip),%rdi # 36b43308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398332,15 +398332,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695db56(%rip),%rdi # 36b42310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d8>\n+\tlea 0x3695eb56(%rip),%rdi # 36b43310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398381,15 +398381,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695da3e(%rip),%rdi # 36b42318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e0>\n+\tlea 0x3695ea3e(%rip),%rdi # 36b43318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398450,15 +398450,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695d888(%rip),%rdi # 36b42320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e8>\n+\tlea 0x3695e888(%rip),%rdi # 36b43320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398519,15 +398519,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695d6d0(%rip),%rdi # 36b42328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f0>\n+\tlea 0x3695e6d0(%rip),%rdi # 36b43328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398568,15 +398568,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695d5b6(%rip),%rdi # 36b42330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f8>\n+\tlea 0x3695e5b6(%rip),%rdi # 36b43330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398617,15 +398617,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695d49e(%rip),%rdi # 36b42338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1900>\n+\tlea 0x3695e49e(%rip),%rdi # 36b43338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1900>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398686,15 +398686,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695d2e8(%rip),%rdi # 36b42340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1908>\n+\tlea 0x3695e2e8(%rip),%rdi # 36b43340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1908>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398755,15 +398755,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695d130(%rip),%rdi # 36b42348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1910>\n+\tlea 0x3695e130(%rip),%rdi # 36b43348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1910>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398804,15 +398804,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695d016(%rip),%rdi # 36b42350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1918>\n+\tlea 0x3695e016(%rip),%rdi # 36b43350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1918>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398853,15 +398853,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695cefe(%rip),%rdi # 36b42358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1920>\n+\tlea 0x3695defe(%rip),%rdi # 36b43358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1920>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398922,15 +398922,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695cd48(%rip),%rdi # 36b42360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1928>\n+\tlea 0x3695dd48(%rip),%rdi # 36b43360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1928>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -398991,15 +398991,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695cb90(%rip),%rdi # 36b42368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1930>\n+\tlea 0x3695db90(%rip),%rdi # 36b43368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1930>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399040,15 +399040,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695ca76(%rip),%rdi # 36b42370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1938>\n+\tlea 0x3695da76(%rip),%rdi # 36b43370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1938>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399089,15 +399089,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695c95e(%rip),%rdi # 36b42378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1940>\n+\tlea 0x3695d95e(%rip),%rdi # 36b43378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1940>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399158,15 +399158,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695c7a8(%rip),%rdi # 36b42380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1948>\n+\tlea 0x3695d7a8(%rip),%rdi # 36b43380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1948>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399227,15 +399227,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695c5f0(%rip),%rdi # 36b42388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1950>\n+\tlea 0x3695d5f0(%rip),%rdi # 36b43388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1950>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399276,15 +399276,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695c4d6(%rip),%rdi # 36b42390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1958>\n+\tlea 0x3695d4d6(%rip),%rdi # 36b43390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1958>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399325,15 +399325,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695c3be(%rip),%rdi # 36b42398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1960>\n+\tlea 0x3695d3be(%rip),%rdi # 36b43398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1960>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399394,15 +399394,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695c208(%rip),%rdi # 36b423a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1968>\n+\tlea 0x3695d208(%rip),%rdi # 36b433a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1968>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399463,15 +399463,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695c050(%rip),%rdi # 36b423a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1970>\n+\tlea 0x3695d050(%rip),%rdi # 36b433a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1970>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399512,15 +399512,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695bf36(%rip),%rdi # 36b423b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1978>\n+\tlea 0x3695cf36(%rip),%rdi # 36b433b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1978>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399561,15 +399561,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695be1e(%rip),%rdi # 36b423b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1980>\n+\tlea 0x3695ce1e(%rip),%rdi # 36b433b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1980>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399630,15 +399630,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695bc68(%rip),%rdi # 36b423c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1988>\n+\tlea 0x3695cc68(%rip),%rdi # 36b433c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1988>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399699,15 +399699,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695bab0(%rip),%rdi # 36b423c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1990>\n+\tlea 0x3695cab0(%rip),%rdi # 36b433c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1990>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399748,15 +399748,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695b996(%rip),%rdi # 36b423d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1998>\n+\tlea 0x3695c996(%rip),%rdi # 36b433d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1998>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399797,15 +399797,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695b87e(%rip),%rdi # 36b423d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a0>\n+\tlea 0x3695c87e(%rip),%rdi # 36b433d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399866,15 +399866,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695b6c8(%rip),%rdi # 36b423e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a8>\n+\tlea 0x3695c6c8(%rip),%rdi # 36b433e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399935,15 +399935,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695b510(%rip),%rdi # 36b423e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b0>\n+\tlea 0x3695c510(%rip),%rdi # 36b433e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -399984,15 +399984,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695b3f6(%rip),%rdi # 36b423f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b8>\n+\tlea 0x3695c3f6(%rip),%rdi # 36b433f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400033,15 +400033,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695b2de(%rip),%rdi # 36b423f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c0>\n+\tlea 0x3695c2de(%rip),%rdi # 36b433f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400102,15 +400102,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695b128(%rip),%rdi # 36b42400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c8>\n+\tlea 0x3695c128(%rip),%rdi # 36b43400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400171,15 +400171,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695af70(%rip),%rdi # 36b42408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d0>\n+\tlea 0x3695bf70(%rip),%rdi # 36b43408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400220,15 +400220,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695ae56(%rip),%rdi # 36b42410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d8>\n+\tlea 0x3695be56(%rip),%rdi # 36b43410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400269,15 +400269,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695ad3e(%rip),%rdi # 36b42418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e0>\n+\tlea 0x3695bd3e(%rip),%rdi # 36b43418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400338,15 +400338,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695ab88(%rip),%rdi # 36b42420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e8>\n+\tlea 0x3695bb88(%rip),%rdi # 36b43420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400407,15 +400407,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695a9d0(%rip),%rdi # 36b42428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f0>\n+\tlea 0x3695b9d0(%rip),%rdi # 36b43428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400456,15 +400456,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695a8b6(%rip),%rdi # 36b42430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f8>\n+\tlea 0x3695b8b6(%rip),%rdi # 36b43430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400505,15 +400505,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695a79e(%rip),%rdi # 36b42438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a00>\n+\tlea 0x3695b79e(%rip),%rdi # 36b43438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400574,15 +400574,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695a5e8(%rip),%rdi # 36b42440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a08>\n+\tlea 0x3695b5e8(%rip),%rdi # 36b43440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400643,15 +400643,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695a430(%rip),%rdi # 36b42448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a10>\n+\tlea 0x3695b430(%rip),%rdi # 36b43448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400692,15 +400692,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695a316(%rip),%rdi # 36b42450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a18>\n+\tlea 0x3695b316(%rip),%rdi # 36b43450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400741,15 +400741,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3695a1fe(%rip),%rdi # 36b42458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a20>\n+\tlea 0x3695b1fe(%rip),%rdi # 36b43458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400810,15 +400810,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3695a048(%rip),%rdi # 36b42460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a28>\n+\tlea 0x3695b048(%rip),%rdi # 36b43460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400879,15 +400879,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36959e90(%rip),%rdi # 36b42468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a30>\n+\tlea 0x3695ae90(%rip),%rdi # 36b43468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400928,15 +400928,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36959d76(%rip),%rdi # 36b42470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a38>\n+\tlea 0x3695ad76(%rip),%rdi # 36b43470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -400977,696 +400977,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36959c5e(%rip),%rdi # 36b42478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a40>\n+\tlea 0x3695ac5e(%rip),%rdi # 36b43478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3695dc34(%rip),%rbx # 36b46480 ::get_beta()::val@@Base+0x168>\n+\tmov 0x3695ec34(%rip),%rbx # 36b47480 ::get_beta()::val@@Base+0x168>\n \ttest %rbx,%rbx\n \tjne 1e8867 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3695cdc8(%rip),%rdi # 36b45620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4be8>\n+\tlea 0x3695ddc8(%rip),%rdi # 36b46620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4be8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3695dc19(%rip) # 36b46480 ::get_beta()::val@@Base+0x168>\n+\tmov %rax,0x3695ec19(%rip) # 36b47480 ::get_beta()::val@@Base+0x168>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959a06(%rip),%rsi # 36b42280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1848>\n+\tlea 0x3695aa06(%rip),%rsi # 36b43280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1848>\n \tlea 0x1132df(%rip),%rcx # 2fbb60 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x218f0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369599e0(%rip),%rsi # 36b42288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1850>\n+\tlea 0x3695a9e0(%rip),%rsi # 36b43288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1850>\n \tlea 0x1132fd(%rip),%rcx # 2fbbac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2193c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369599ba(%rip),%rsi # 36b42290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1858>\n+\tlea 0x3695a9ba(%rip),%rsi # 36b43290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1858>\n \tlea 0x11331b(%rip),%rcx # 2fbbf8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21988>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959994(%rip),%rsi # 36b42298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1860>\n+\tlea 0x3695a994(%rip),%rsi # 36b43298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1860>\n \tlea 0x11333b(%rip),%rcx # 2fbc46 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x219d6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695996e(%rip),%rsi # 36b422a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1868>\n+\tlea 0x3695a96e(%rip),%rsi # 36b432a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1868>\n \tlea 0x11335b(%rip),%rcx # 2fbc94 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21a24>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959948(%rip),%rsi # 36b422a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1870>\n+\tlea 0x3695a948(%rip),%rsi # 36b432a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1870>\n \tlea 0x11337a(%rip),%rcx # 2fbce1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21a71>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959922(%rip),%rsi # 36b422b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1878>\n+\tlea 0x3695a922(%rip),%rsi # 36b432b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1878>\n \tlea 0x113399(%rip),%rcx # 2fbd2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21abe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369598fc(%rip),%rsi # 36b422b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1880>\n+\tlea 0x3695a8fc(%rip),%rsi # 36b432b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1880>\n \tlea 0x1133ba(%rip),%rcx # 2fbd7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21b0d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369598d6(%rip),%rsi # 36b422c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1888>\n+\tlea 0x3695a8d6(%rip),%rsi # 36b432c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1888>\n \tlea 0x1133db(%rip),%rcx # 2fbdcc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21b5c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369598b0(%rip),%rsi # 36b422c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1890>\n+\tlea 0x3695a8b0(%rip),%rsi # 36b432c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1890>\n \tlea 0x1133fa(%rip),%rcx # 2fbe19 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21ba9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695988a(%rip),%rsi # 36b422d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1898>\n+\tlea 0x3695a88a(%rip),%rsi # 36b432d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1898>\n \tlea 0x113419(%rip),%rcx # 2fbe66 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21bf6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959864(%rip),%rsi # 36b422d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a0>\n+\tlea 0x3695a864(%rip),%rsi # 36b432d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a0>\n \tlea 0x11343a(%rip),%rcx # 2fbeb5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21c45>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695983e(%rip),%rsi # 36b422e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a8>\n+\tlea 0x3695a83e(%rip),%rsi # 36b432e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a8>\n \tlea 0x11345b(%rip),%rcx # 2fbf04 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21c94>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959818(%rip),%rsi # 36b422e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b0>\n+\tlea 0x3695a818(%rip),%rsi # 36b432e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b0>\n \tlea 0x11347a(%rip),%rcx # 2fbf51 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21ce1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369597f2(%rip),%rsi # 36b422f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b8>\n+\tlea 0x3695a7f2(%rip),%rsi # 36b432f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b8>\n \tlea 0x113499(%rip),%rcx # 2fbf9e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21d2e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369597cc(%rip),%rsi # 36b422f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c0>\n+\tlea 0x3695a7cc(%rip),%rsi # 36b432f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c0>\n \tlea 0x1134ba(%rip),%rcx # 2fbfed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21d7d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369597a6(%rip),%rsi # 36b42300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c8>\n+\tlea 0x3695a7a6(%rip),%rsi # 36b43300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c8>\n \tlea 0x1134db(%rip),%rcx # 2fc03c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21dcc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959780(%rip),%rsi # 36b42308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d0>\n+\tlea 0x3695a780(%rip),%rsi # 36b43308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d0>\n \tlea 0x1134fa(%rip),%rcx # 2fc089 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21e19>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695975a(%rip),%rsi # 36b42310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d8>\n+\tlea 0x3695a75a(%rip),%rsi # 36b43310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d8>\n \tlea 0x113519(%rip),%rcx # 2fc0d6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21e66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959734(%rip),%rsi # 36b42318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e0>\n+\tlea 0x3695a734(%rip),%rsi # 36b43318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e0>\n \tlea 0x11353a(%rip),%rcx # 2fc125 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21eb5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695970e(%rip),%rsi # 36b42320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e8>\n+\tlea 0x3695a70e(%rip),%rsi # 36b43320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e8>\n \tlea 0x11355b(%rip),%rcx # 2fc174 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21f04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369596e8(%rip),%rsi # 36b42328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f0>\n+\tlea 0x3695a6e8(%rip),%rsi # 36b43328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f0>\n \tlea 0x11357a(%rip),%rcx # 2fc1c1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21f51>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369596c2(%rip),%rsi # 36b42330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f8>\n+\tlea 0x3695a6c2(%rip),%rsi # 36b43330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f8>\n \tlea 0x113599(%rip),%rcx # 2fc20e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21f9e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695969c(%rip),%rsi # 36b42338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1900>\n+\tlea 0x3695a69c(%rip),%rsi # 36b43338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1900>\n \tlea 0x1135ba(%rip),%rcx # 2fc25d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x21fed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959676(%rip),%rsi # 36b42340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1908>\n+\tlea 0x3695a676(%rip),%rsi # 36b43340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1908>\n \tlea 0x1135db(%rip),%rcx # 2fc2ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2203c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959650(%rip),%rsi # 36b42348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1910>\n+\tlea 0x3695a650(%rip),%rsi # 36b43348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1910>\n \tlea 0x1135fa(%rip),%rcx # 2fc2f9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22089>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695962a(%rip),%rsi # 36b42350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1918>\n+\tlea 0x3695a62a(%rip),%rsi # 36b43350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1918>\n \tlea 0x113619(%rip),%rcx # 2fc346 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x220d6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959604(%rip),%rsi # 36b42358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1920>\n+\tlea 0x3695a604(%rip),%rsi # 36b43358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1920>\n \tlea 0x11363a(%rip),%rcx # 2fc395 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22125>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369595de(%rip),%rsi # 36b42360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1928>\n+\tlea 0x3695a5de(%rip),%rsi # 36b43360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1928>\n \tlea 0x11365b(%rip),%rcx # 2fc3e4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22174>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369595b8(%rip),%rsi # 36b42368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1930>\n+\tlea 0x3695a5b8(%rip),%rsi # 36b43368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1930>\n \tlea 0x11367a(%rip),%rcx # 2fc431 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x221c1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959592(%rip),%rsi # 36b42370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1938>\n+\tlea 0x3695a592(%rip),%rsi # 36b43370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1938>\n \tlea 0x113699(%rip),%rcx # 2fc47e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2220e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695956c(%rip),%rsi # 36b42378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1940>\n+\tlea 0x3695a56c(%rip),%rsi # 36b43378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1940>\n \tlea 0x1136ba(%rip),%rcx # 2fc4cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2225d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959546(%rip),%rsi # 36b42380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1948>\n+\tlea 0x3695a546(%rip),%rsi # 36b43380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1948>\n \tlea 0x1136db(%rip),%rcx # 2fc51c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x222ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959520(%rip),%rsi # 36b42388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1950>\n+\tlea 0x3695a520(%rip),%rsi # 36b43388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1950>\n \tlea 0x1136fa(%rip),%rcx # 2fc569 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x222f9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369594fa(%rip),%rsi # 36b42390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1958>\n+\tlea 0x3695a4fa(%rip),%rsi # 36b43390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1958>\n \tlea 0x113719(%rip),%rcx # 2fc5b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22346>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369594d4(%rip),%rsi # 36b42398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1960>\n+\tlea 0x3695a4d4(%rip),%rsi # 36b43398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1960>\n \tlea 0x11373a(%rip),%rcx # 2fc605 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22395>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369594ae(%rip),%rsi # 36b423a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1968>\n+\tlea 0x3695a4ae(%rip),%rsi # 36b433a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1968>\n \tlea 0x11375b(%rip),%rcx # 2fc654 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x223e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959488(%rip),%rsi # 36b423a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1970>\n+\tlea 0x3695a488(%rip),%rsi # 36b433a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1970>\n \tlea 0x11377a(%rip),%rcx # 2fc6a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22431>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959462(%rip),%rsi # 36b423b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1978>\n+\tlea 0x3695a462(%rip),%rsi # 36b433b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1978>\n \tlea 0x113799(%rip),%rcx # 2fc6ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2247e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695943c(%rip),%rsi # 36b423b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1980>\n+\tlea 0x3695a43c(%rip),%rsi # 36b433b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1980>\n \tlea 0x1137ba(%rip),%rcx # 2fc73d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x224cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959416(%rip),%rsi # 36b423c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1988>\n+\tlea 0x3695a416(%rip),%rsi # 36b433c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1988>\n \tlea 0x1137db(%rip),%rcx # 2fc78c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2251c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369593f0(%rip),%rsi # 36b423c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1990>\n+\tlea 0x3695a3f0(%rip),%rsi # 36b433c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1990>\n \tlea 0x1137fa(%rip),%rcx # 2fc7d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22569>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369593ca(%rip),%rsi # 36b423d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1998>\n+\tlea 0x3695a3ca(%rip),%rsi # 36b433d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1998>\n \tlea 0x113819(%rip),%rcx # 2fc826 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x225b6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369593a4(%rip),%rsi # 36b423d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a0>\n+\tlea 0x3695a3a4(%rip),%rsi # 36b433d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a0>\n \tlea 0x11383a(%rip),%rcx # 2fc875 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22605>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695937e(%rip),%rsi # 36b423e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a8>\n+\tlea 0x3695a37e(%rip),%rsi # 36b433e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a8>\n \tlea 0x11385b(%rip),%rcx # 2fc8c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22654>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959358(%rip),%rsi # 36b423e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b0>\n+\tlea 0x3695a358(%rip),%rsi # 36b433e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b0>\n \tlea 0x11387a(%rip),%rcx # 2fc911 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x226a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959332(%rip),%rsi # 36b423f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b8>\n+\tlea 0x3695a332(%rip),%rsi # 36b433f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b8>\n \tlea 0x113899(%rip),%rcx # 2fc95e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x226ee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695930c(%rip),%rsi # 36b423f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c0>\n+\tlea 0x3695a30c(%rip),%rsi # 36b433f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c0>\n \tlea 0x1138ba(%rip),%rcx # 2fc9ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2273d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369592e6(%rip),%rsi # 36b42400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c8>\n+\tlea 0x3695a2e6(%rip),%rsi # 36b43400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c8>\n \tlea 0x1138db(%rip),%rcx # 2fc9fc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2278c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369592c0(%rip),%rsi # 36b42408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d0>\n+\tlea 0x3695a2c0(%rip),%rsi # 36b43408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d0>\n \tlea 0x1138fb(%rip),%rcx # 2fca4a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x227da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3695929a(%rip),%rsi # 36b42410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d8>\n+\tlea 0x3695a29a(%rip),%rsi # 36b43410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d8>\n \tlea 0x11391b(%rip),%rcx # 2fca98 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22828>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36959274(%rip),%rsi # 36b42418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e0>\n+\tlea 0x3695a274(%rip),%rsi # 36b43418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e0>\n \tlea 0x11393d(%rip),%rcx # 2fcae8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22878>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36959237(%rip),%rsi # 36b42420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e8>\n+\tlea 0x3695a237(%rip),%rsi # 36b43420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e8>\n \tlea 0x113948(%rip),%rcx # 2fcb38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x228c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369591fa(%rip),%rsi # 36b42428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f0>\n+\tlea 0x3695a1fa(%rip),%rsi # 36b43428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f0>\n \tlea 0x113951(%rip),%rcx # 2fcb86 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22916>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369591bd(%rip),%rsi # 36b42430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f8>\n+\tlea 0x3695a1bd(%rip),%rsi # 36b43430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f8>\n \tlea 0x11395a(%rip),%rcx # 2fcbd4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22964>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36959180(%rip),%rsi # 36b42438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a00>\n+\tlea 0x3695a180(%rip),%rsi # 36b43438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a00>\n \tlea 0x113965(%rip),%rcx # 2fcc24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x229b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36959143(%rip),%rsi # 36b42440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a08>\n+\tlea 0x3695a143(%rip),%rsi # 36b43440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a08>\n \tlea 0x113970(%rip),%rcx # 2fcc74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36959106(%rip),%rsi # 36b42448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a10>\n+\tlea 0x3695a106(%rip),%rsi # 36b43448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a10>\n \tlea 0x113979(%rip),%rcx # 2fccc2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22a52>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369590c9(%rip),%rsi # 36b42450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a18>\n+\tlea 0x3695a0c9(%rip),%rsi # 36b43450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a18>\n \tlea 0x113982(%rip),%rcx # 2fcd10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22aa0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3695908c(%rip),%rsi # 36b42458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a20>\n+\tlea 0x3695a08c(%rip),%rsi # 36b43458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a20>\n \tlea 0x11398d(%rip),%rcx # 2fcd60 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22af0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3695904f(%rip),%rsi # 36b42460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a28>\n+\tlea 0x3695a04f(%rip),%rsi # 36b43460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a28>\n \tlea 0x113998(%rip),%rcx # 2fcdb0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22b40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36959012(%rip),%rsi # 36b42468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a30>\n+\tlea 0x3695a012(%rip),%rsi # 36b43468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a30>\n \tlea 0x1139a1(%rip),%rcx # 2fcdfe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22b8e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36958fd5(%rip),%rsi # 36b42470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a38>\n+\tlea 0x36959fd5(%rip),%rsi # 36b43470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a38>\n \tlea 0x1139aa(%rip),%rcx # 2fce4c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22bdc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36958f98(%rip),%rsi # 36b42478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a40>\n+\tlea 0x36959f98(%rip),%rsi # 36b43478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a40>\n \tlea 0x1139b5(%rip),%rcx # 2fce9c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22c2c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 1e9510 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3695cf69(%rip),%rdi # 36b46480 ::get_beta()::val@@Base+0x168>\n+\tmov 0x3695df69(%rip),%rdi # 36b47480 ::get_beta()::val@@Base+0x168>\n \ttest %rdi,%rdi\n \tje 1e9531 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3695cf53(%rip) # 36b46480 ::get_beta()::val@@Base+0x168>\n+\tmovq $0x0,0x3695df53(%rip) # 36b47480 ::get_beta()::val@@Base+0x168>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001e9540 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)18>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -405279,15 +405279,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36956269(%rip),%rdi # 36b42458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a20>\n+\tlea 0x36957269(%rip),%rdi # 36b43458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ec4df (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -405423,15 +405423,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36955f90(%rip),%rdi # 36b42450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a18>\n+\tlea 0x36956f90(%rip),%rdi # 36b43450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -405582,15 +405582,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36955c33(%rip),%rdi # 36b423f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c0>\n+\tlea 0x36956c33(%rip),%rdi # 36b433f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ecab5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -405726,15 +405726,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3695595a(%rip),%rdi # 36b423f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b8>\n+\tlea 0x3695695a(%rip),%rdi # 36b433f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -405885,15 +405885,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3695557d(%rip),%rdi # 36b42318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e0>\n+\tlea 0x3695657d(%rip),%rdi # 36b43318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ed08b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -406029,15 +406029,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369552a4(%rip),%rdi # 36b42310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d8>\n+\tlea 0x369562a4(%rip),%rdi # 36b43310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -406188,15 +406188,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369550a7(%rip),%rdi # 36b42418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e0>\n+\tlea 0x369560a7(%rip),%rdi # 36b43418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ed661 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -406332,15 +406332,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36954dce(%rip),%rdi # 36b42410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d8>\n+\tlea 0x36955dce(%rip),%rdi # 36b43410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -406491,15 +406491,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36954a71(%rip),%rdi # 36b423b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1980>\n+\tlea 0x36955a71(%rip),%rdi # 36b433b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1980>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1edc37 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -406635,15 +406635,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36954798(%rip),%rdi # 36b423b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1978>\n+\tlea 0x36955798(%rip),%rdi # 36b433b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1978>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -406794,15 +406794,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369543bb(%rip),%rdi # 36b422d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a0>\n+\tlea 0x369553bb(%rip),%rdi # 36b432d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ee20d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -406938,15 +406938,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369540e2(%rip),%rdi # 36b422d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1898>\n+\tlea 0x369550e2(%rip),%rdi # 36b432d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1898>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -407097,15 +407097,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36953f85(%rip),%rdi # 36b42478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a40>\n+\tlea 0x36954f85(%rip),%rdi # 36b43478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ee7e3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -407241,15 +407241,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36953cac(%rip),%rdi # 36b42470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a38>\n+\tlea 0x36954cac(%rip),%rdi # 36b43470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -407400,15 +407400,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3695382f(%rip),%rdi # 36b422f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c0>\n+\tlea 0x3695482f(%rip),%rdi # 36b432f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1eedb9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -407544,15 +407544,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36953556(%rip),%rdi # 36b422f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b8>\n+\tlea 0x36954556(%rip),%rdi # 36b432f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -407703,15 +407703,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369532d9(%rip),%rdi # 36b42378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1940>\n+\tlea 0x369542d9(%rip),%rdi # 36b43378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1940>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ef38f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -407847,15 +407847,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36953000(%rip),%rdi # 36b42370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1938>\n+\tlea 0x36954000(%rip),%rdi # 36b43370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1938>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -408006,15 +408006,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36952c23(%rip),%rdi # 36b42298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1860>\n+\tlea 0x36953c23(%rip),%rdi # 36b43298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1860>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1efc46 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -408156,15 +408156,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36952962(%rip),%rdi # 36b422b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1880>\n+\tlea 0x36953962(%rip),%rdi # 36b432b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1880>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1eff3b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -408300,15 +408300,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36952669(%rip),%rdi # 36b42290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1858>\n+\tlea 0x36953669(%rip),%rdi # 36b43290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1858>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -408453,15 +408453,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36952394(%rip),%rdi # 36b422b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1878>\n+\tlea 0x36953394(%rip),%rdi # 36b432b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1878>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -408612,15 +408612,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36952117(%rip),%rdi # 36b42338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1900>\n+\tlea 0x36953117(%rip),%rdi # 36b43338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1900>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1f0511 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -408756,15 +408756,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36951e3e(%rip),%rdi # 36b42330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f8>\n+\tlea 0x36952e3e(%rip),%rdi # 36b43330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x18f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -408915,15 +408915,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36951c41(%rip),%rdi # 36b42438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a00>\n+\tlea 0x36952c41(%rip),%rdi # 36b43438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1f0ae7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -409059,15 +409059,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36951968(%rip),%rdi # 36b42430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f8>\n+\tlea 0x36952968(%rip),%rdi # 36b43430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -409218,15 +409218,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3695158b(%rip),%rdi # 36b42358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1920>\n+\tlea 0x3695258b(%rip),%rdi # 36b43358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1920>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1f10bd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -409362,15 +409362,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369512b2(%rip),%rdi # 36b42350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1918>\n+\tlea 0x369522b2(%rip),%rdi # 36b43350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1918>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -409521,15 +409521,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36951035(%rip),%rdi # 36b423d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a0>\n+\tlea 0x36952035(%rip),%rdi # 36b433d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x19a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1f1693 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -409665,15 +409665,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36950d5c(%rip),%rdi # 36b423d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1998>\n+\tlea 0x36951d5c(%rip),%rdi # 36b433d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1998>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -409824,15 +409824,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36950a1f(%rip),%rdi # 36b42398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1960>\n+\tlea 0x36951a1f(%rip),%rdi # 36b43398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1960>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1f1c69 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -409968,15 +409968,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36950746(%rip),%rdi # 36b42390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1958>\n+\tlea 0x36951746(%rip),%rdi # 36b43390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1958>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -411819,15 +411819,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 1e5a40 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 1f34bd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36951a57(%rip),%rax \n+\tmov 0x36952a57(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x102358(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x102357(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -412117,15 +412117,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694e9b8(%rip),%rdi # 36b42480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a48>\n+\tlea 0x3694f9b8(%rip),%rdi # 36b43480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412186,15 +412186,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694e800(%rip),%rdi # 36b42488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a50>\n+\tlea 0x3694f800(%rip),%rdi # 36b43488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412235,15 +412235,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694e6e6(%rip),%rdi # 36b42490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a58>\n+\tlea 0x3694f6e6(%rip),%rdi # 36b43490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412284,15 +412284,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694e5ce(%rip),%rdi # 36b42498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a60>\n+\tlea 0x3694f5ce(%rip),%rdi # 36b43498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412353,15 +412353,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694e418(%rip),%rdi # 36b424a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a68>\n+\tlea 0x3694f418(%rip),%rdi # 36b434a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412422,15 +412422,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694e260(%rip),%rdi # 36b424a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a70>\n+\tlea 0x3694f260(%rip),%rdi # 36b434a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412471,15 +412471,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694e146(%rip),%rdi # 36b424b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a78>\n+\tlea 0x3694f146(%rip),%rdi # 36b434b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412520,15 +412520,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694e02e(%rip),%rdi # 36b424b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a80>\n+\tlea 0x3694f02e(%rip),%rdi # 36b434b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412589,15 +412589,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694de78(%rip),%rdi # 36b424c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a88>\n+\tlea 0x3694ee78(%rip),%rdi # 36b434c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412658,15 +412658,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694dcc0(%rip),%rdi # 36b424c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a90>\n+\tlea 0x3694ecc0(%rip),%rdi # 36b434c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412707,15 +412707,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694dba6(%rip),%rdi # 36b424d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a98>\n+\tlea 0x3694eba6(%rip),%rdi # 36b434d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412756,15 +412756,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694da8e(%rip),%rdi # 36b424d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa0>\n+\tlea 0x3694ea8e(%rip),%rdi # 36b434d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412825,15 +412825,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694d8d8(%rip),%rdi # 36b424e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa8>\n+\tlea 0x3694e8d8(%rip),%rdi # 36b434e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412894,15 +412894,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694d720(%rip),%rdi # 36b424e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab0>\n+\tlea 0x3694e720(%rip),%rdi # 36b434e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412943,15 +412943,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694d606(%rip),%rdi # 36b424f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab8>\n+\tlea 0x3694e606(%rip),%rdi # 36b434f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -412992,15 +412992,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694d4ee(%rip),%rdi # 36b424f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac0>\n+\tlea 0x3694e4ee(%rip),%rdi # 36b434f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413061,15 +413061,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694d338(%rip),%rdi # 36b42500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac8>\n+\tlea 0x3694e338(%rip),%rdi # 36b43500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413130,15 +413130,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694d180(%rip),%rdi # 36b42508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad0>\n+\tlea 0x3694e180(%rip),%rdi # 36b43508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413179,15 +413179,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694d066(%rip),%rdi # 36b42510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad8>\n+\tlea 0x3694e066(%rip),%rdi # 36b43510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413228,15 +413228,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694cf4e(%rip),%rdi # 36b42518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae0>\n+\tlea 0x3694df4e(%rip),%rdi # 36b43518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413297,15 +413297,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694cd98(%rip),%rdi # 36b42520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae8>\n+\tlea 0x3694dd98(%rip),%rdi # 36b43520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413366,15 +413366,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694cbe0(%rip),%rdi # 36b42528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af0>\n+\tlea 0x3694dbe0(%rip),%rdi # 36b43528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413415,15 +413415,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694cac6(%rip),%rdi # 36b42530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af8>\n+\tlea 0x3694dac6(%rip),%rdi # 36b43530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413464,15 +413464,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694c9ae(%rip),%rdi # 36b42538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b00>\n+\tlea 0x3694d9ae(%rip),%rdi # 36b43538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413533,15 +413533,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694c7f8(%rip),%rdi # 36b42540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b08>\n+\tlea 0x3694d7f8(%rip),%rdi # 36b43540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413602,15 +413602,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694c640(%rip),%rdi # 36b42548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b10>\n+\tlea 0x3694d640(%rip),%rdi # 36b43548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413651,15 +413651,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694c526(%rip),%rdi # 36b42550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b18>\n+\tlea 0x3694d526(%rip),%rdi # 36b43550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413700,15 +413700,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694c40e(%rip),%rdi # 36b42558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b20>\n+\tlea 0x3694d40e(%rip),%rdi # 36b43558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413769,15 +413769,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694c258(%rip),%rdi # 36b42560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b28>\n+\tlea 0x3694d258(%rip),%rdi # 36b43560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413838,15 +413838,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694c0a0(%rip),%rdi # 36b42568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b30>\n+\tlea 0x3694d0a0(%rip),%rdi # 36b43568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413887,15 +413887,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694bf86(%rip),%rdi # 36b42570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b38>\n+\tlea 0x3694cf86(%rip),%rdi # 36b43570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -413936,15 +413936,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694be6e(%rip),%rdi # 36b42578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b40>\n+\tlea 0x3694ce6e(%rip),%rdi # 36b43578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414005,15 +414005,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694bcb8(%rip),%rdi # 36b42580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b48>\n+\tlea 0x3694ccb8(%rip),%rdi # 36b43580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414074,15 +414074,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694bb00(%rip),%rdi # 36b42588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b50>\n+\tlea 0x3694cb00(%rip),%rdi # 36b43588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414123,15 +414123,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694b9e6(%rip),%rdi # 36b42590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b58>\n+\tlea 0x3694c9e6(%rip),%rdi # 36b43590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414172,15 +414172,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694b8ce(%rip),%rdi # 36b42598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b60>\n+\tlea 0x3694c8ce(%rip),%rdi # 36b43598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414241,15 +414241,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694b718(%rip),%rdi # 36b425a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b68>\n+\tlea 0x3694c718(%rip),%rdi # 36b435a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414310,15 +414310,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694b560(%rip),%rdi # 36b425a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b70>\n+\tlea 0x3694c560(%rip),%rdi # 36b435a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414359,15 +414359,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694b446(%rip),%rdi # 36b425b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b78>\n+\tlea 0x3694c446(%rip),%rdi # 36b435b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414408,15 +414408,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694b32e(%rip),%rdi # 36b425b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b80>\n+\tlea 0x3694c32e(%rip),%rdi # 36b435b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414477,15 +414477,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694b178(%rip),%rdi # 36b425c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b88>\n+\tlea 0x3694c178(%rip),%rdi # 36b435c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414546,15 +414546,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694afc0(%rip),%rdi # 36b425c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b90>\n+\tlea 0x3694bfc0(%rip),%rdi # 36b435c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414595,15 +414595,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694aea6(%rip),%rdi # 36b425d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b98>\n+\tlea 0x3694bea6(%rip),%rdi # 36b435d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414644,15 +414644,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694ad8e(%rip),%rdi # 36b425d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba0>\n+\tlea 0x3694bd8e(%rip),%rdi # 36b435d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414713,15 +414713,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694abd8(%rip),%rdi # 36b425e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba8>\n+\tlea 0x3694bbd8(%rip),%rdi # 36b435e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414782,15 +414782,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694aa20(%rip),%rdi # 36b425e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb0>\n+\tlea 0x3694ba20(%rip),%rdi # 36b435e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414831,15 +414831,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694a906(%rip),%rdi # 36b425f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb8>\n+\tlea 0x3694b906(%rip),%rdi # 36b435f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414880,15 +414880,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694a7ee(%rip),%rdi # 36b425f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc0>\n+\tlea 0x3694b7ee(%rip),%rdi # 36b435f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -414949,15 +414949,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694a638(%rip),%rdi # 36b42600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc8>\n+\tlea 0x3694b638(%rip),%rdi # 36b43600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415018,15 +415018,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694a480(%rip),%rdi # 36b42608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd0>\n+\tlea 0x3694b480(%rip),%rdi # 36b43608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415067,15 +415067,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694a366(%rip),%rdi # 36b42610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd8>\n+\tlea 0x3694b366(%rip),%rdi # 36b43610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415116,15 +415116,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694a24e(%rip),%rdi # 36b42618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be0>\n+\tlea 0x3694b24e(%rip),%rdi # 36b43618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415185,15 +415185,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3694a098(%rip),%rdi # 36b42620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be8>\n+\tlea 0x3694b098(%rip),%rdi # 36b43620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415254,15 +415254,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36949ee0(%rip),%rdi # 36b42628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf0>\n+\tlea 0x3694aee0(%rip),%rdi # 36b43628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415303,15 +415303,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36949dc6(%rip),%rdi # 36b42630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf8>\n+\tlea 0x3694adc6(%rip),%rdi # 36b43630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415352,15 +415352,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36949cae(%rip),%rdi # 36b42638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c00>\n+\tlea 0x3694acae(%rip),%rdi # 36b43638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415421,15 +415421,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36949af8(%rip),%rdi # 36b42640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c08>\n+\tlea 0x3694aaf8(%rip),%rdi # 36b43640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415490,15 +415490,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36949940(%rip),%rdi # 36b42648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c10>\n+\tlea 0x3694a940(%rip),%rdi # 36b43648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415539,15 +415539,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36949826(%rip),%rdi # 36b42650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c18>\n+\tlea 0x3694a826(%rip),%rdi # 36b43650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415588,15 +415588,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694970e(%rip),%rdi # 36b42658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c20>\n+\tlea 0x3694a70e(%rip),%rdi # 36b43658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415657,15 +415657,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36949558(%rip),%rdi # 36b42660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c28>\n+\tlea 0x3694a558(%rip),%rdi # 36b43660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415726,15 +415726,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369493a0(%rip),%rdi # 36b42668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c30>\n+\tlea 0x3694a3a0(%rip),%rdi # 36b43668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415775,15 +415775,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36949286(%rip),%rdi # 36b42670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c38>\n+\tlea 0x3694a286(%rip),%rdi # 36b43670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -415824,696 +415824,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3694916e(%rip),%rdi # 36b42678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c40>\n+\tlea 0x3694a16e(%rip),%rdi # 36b43678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3694cf4c(%rip),%rbx # 36b46488 ::get_beta()::val@@Base+0x170>\n+\tmov 0x3694df4c(%rip),%rbx # 36b47488 ::get_beta()::val@@Base+0x170>\n \ttest %rbx,%rbx\n \tjne 1f9557 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3694c0f0(%rip),%rdi # 36b45638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c00>\n+\tlea 0x3694d0f0(%rip),%rdi # 36b46638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c00>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3694cf31(%rip) # 36b46488 ::get_beta()::val@@Base+0x170>\n+\tmov %rax,0x3694df31(%rip) # 36b47488 ::get_beta()::val@@Base+0x170>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948f16(%rip),%rsi # 36b42480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a48>\n+\tlea 0x36949f16(%rip),%rsi # 36b43480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a48>\n \tlea 0x10397b(%rip),%rcx # 2fceec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22c7c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948ef0(%rip),%rsi # 36b42488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a50>\n+\tlea 0x36949ef0(%rip),%rsi # 36b43488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a50>\n \tlea 0x103999(%rip),%rcx # 2fcf38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22cc8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948eca(%rip),%rsi # 36b42490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a58>\n+\tlea 0x36949eca(%rip),%rsi # 36b43490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a58>\n \tlea 0x1039b7(%rip),%rcx # 2fcf84 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22d14>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948ea4(%rip),%rsi # 36b42498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a60>\n+\tlea 0x36949ea4(%rip),%rsi # 36b43498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a60>\n \tlea 0x1039d7(%rip),%rcx # 2fcfd2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22d62>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948e7e(%rip),%rsi # 36b424a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a68>\n+\tlea 0x36949e7e(%rip),%rsi # 36b434a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a68>\n \tlea 0x1039f7(%rip),%rcx # 2fd020 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22db0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948e58(%rip),%rsi # 36b424a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a70>\n+\tlea 0x36949e58(%rip),%rsi # 36b434a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a70>\n \tlea 0x103a16(%rip),%rcx # 2fd06d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22dfd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948e32(%rip),%rsi # 36b424b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a78>\n+\tlea 0x36949e32(%rip),%rsi # 36b434b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a78>\n \tlea 0x103a35(%rip),%rcx # 2fd0ba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22e4a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948e0c(%rip),%rsi # 36b424b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a80>\n+\tlea 0x36949e0c(%rip),%rsi # 36b434b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a80>\n \tlea 0x103a56(%rip),%rcx # 2fd109 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22e99>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948de6(%rip),%rsi # 36b424c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a88>\n+\tlea 0x36949de6(%rip),%rsi # 36b434c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a88>\n \tlea 0x103a77(%rip),%rcx # 2fd158 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22ee8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948dc0(%rip),%rsi # 36b424c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a90>\n+\tlea 0x36949dc0(%rip),%rsi # 36b434c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a90>\n \tlea 0x103a96(%rip),%rcx # 2fd1a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22f35>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948d9a(%rip),%rsi # 36b424d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a98>\n+\tlea 0x36949d9a(%rip),%rsi # 36b434d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a98>\n \tlea 0x103ab5(%rip),%rcx # 2fd1f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22f82>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948d74(%rip),%rsi # 36b424d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa0>\n+\tlea 0x36949d74(%rip),%rsi # 36b434d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa0>\n \tlea 0x103ad6(%rip),%rcx # 2fd241 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x22fd1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948d4e(%rip),%rsi # 36b424e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa8>\n+\tlea 0x36949d4e(%rip),%rsi # 36b434e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa8>\n \tlea 0x103af7(%rip),%rcx # 2fd290 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23020>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948d28(%rip),%rsi # 36b424e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab0>\n+\tlea 0x36949d28(%rip),%rsi # 36b434e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab0>\n \tlea 0x103b16(%rip),%rcx # 2fd2dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2306d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948d02(%rip),%rsi # 36b424f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab8>\n+\tlea 0x36949d02(%rip),%rsi # 36b434f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab8>\n \tlea 0x103b35(%rip),%rcx # 2fd32a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x230ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948cdc(%rip),%rsi # 36b424f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac0>\n+\tlea 0x36949cdc(%rip),%rsi # 36b434f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac0>\n \tlea 0x103b56(%rip),%rcx # 2fd379 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23109>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948cb6(%rip),%rsi # 36b42500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac8>\n+\tlea 0x36949cb6(%rip),%rsi # 36b43500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac8>\n \tlea 0x103b77(%rip),%rcx # 2fd3c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23158>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948c90(%rip),%rsi # 36b42508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad0>\n+\tlea 0x36949c90(%rip),%rsi # 36b43508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad0>\n \tlea 0x103b96(%rip),%rcx # 2fd415 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x231a5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948c6a(%rip),%rsi # 36b42510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad8>\n+\tlea 0x36949c6a(%rip),%rsi # 36b43510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad8>\n \tlea 0x103bb5(%rip),%rcx # 2fd462 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x231f2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948c44(%rip),%rsi # 36b42518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae0>\n+\tlea 0x36949c44(%rip),%rsi # 36b43518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae0>\n \tlea 0x103bd6(%rip),%rcx # 2fd4b1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23241>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948c1e(%rip),%rsi # 36b42520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae8>\n+\tlea 0x36949c1e(%rip),%rsi # 36b43520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae8>\n \tlea 0x103bf7(%rip),%rcx # 2fd500 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23290>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948bf8(%rip),%rsi # 36b42528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af0>\n+\tlea 0x36949bf8(%rip),%rsi # 36b43528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af0>\n \tlea 0x103c16(%rip),%rcx # 2fd54d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x232dd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948bd2(%rip),%rsi # 36b42530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af8>\n+\tlea 0x36949bd2(%rip),%rsi # 36b43530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af8>\n \tlea 0x103c35(%rip),%rcx # 2fd59a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2332a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948bac(%rip),%rsi # 36b42538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b00>\n+\tlea 0x36949bac(%rip),%rsi # 36b43538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b00>\n \tlea 0x103c56(%rip),%rcx # 2fd5e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23379>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948b86(%rip),%rsi # 36b42540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b08>\n+\tlea 0x36949b86(%rip),%rsi # 36b43540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b08>\n \tlea 0x103c77(%rip),%rcx # 2fd638 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x233c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948b60(%rip),%rsi # 36b42548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b10>\n+\tlea 0x36949b60(%rip),%rsi # 36b43548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b10>\n \tlea 0x103c96(%rip),%rcx # 2fd685 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23415>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948b3a(%rip),%rsi # 36b42550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b18>\n+\tlea 0x36949b3a(%rip),%rsi # 36b43550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b18>\n \tlea 0x103cb5(%rip),%rcx # 2fd6d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23462>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948b14(%rip),%rsi # 36b42558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b20>\n+\tlea 0x36949b14(%rip),%rsi # 36b43558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b20>\n \tlea 0x103cd6(%rip),%rcx # 2fd721 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x234b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948aee(%rip),%rsi # 36b42560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b28>\n+\tlea 0x36949aee(%rip),%rsi # 36b43560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b28>\n \tlea 0x103cf7(%rip),%rcx # 2fd770 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23500>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948ac8(%rip),%rsi # 36b42568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b30>\n+\tlea 0x36949ac8(%rip),%rsi # 36b43568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b30>\n \tlea 0x103d16(%rip),%rcx # 2fd7bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2354d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948aa2(%rip),%rsi # 36b42570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b38>\n+\tlea 0x36949aa2(%rip),%rsi # 36b43570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b38>\n \tlea 0x103d35(%rip),%rcx # 2fd80a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2359a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948a7c(%rip),%rsi # 36b42578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b40>\n+\tlea 0x36949a7c(%rip),%rsi # 36b43578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b40>\n \tlea 0x103d56(%rip),%rcx # 2fd859 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x235e9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948a56(%rip),%rsi # 36b42580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b48>\n+\tlea 0x36949a56(%rip),%rsi # 36b43580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b48>\n \tlea 0x103d77(%rip),%rcx # 2fd8a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23638>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948a30(%rip),%rsi # 36b42588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b50>\n+\tlea 0x36949a30(%rip),%rsi # 36b43588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b50>\n \tlea 0x103d96(%rip),%rcx # 2fd8f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23685>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948a0a(%rip),%rsi # 36b42590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b58>\n+\tlea 0x36949a0a(%rip),%rsi # 36b43590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b58>\n \tlea 0x103db5(%rip),%rcx # 2fd942 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x236d2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369489e4(%rip),%rsi # 36b42598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b60>\n+\tlea 0x369499e4(%rip),%rsi # 36b43598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b60>\n \tlea 0x103dd6(%rip),%rcx # 2fd991 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23721>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369489be(%rip),%rsi # 36b425a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b68>\n+\tlea 0x369499be(%rip),%rsi # 36b435a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b68>\n \tlea 0x103df7(%rip),%rcx # 2fd9e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23770>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948998(%rip),%rsi # 36b425a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b70>\n+\tlea 0x36949998(%rip),%rsi # 36b435a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b70>\n \tlea 0x103e16(%rip),%rcx # 2fda2d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x237bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948972(%rip),%rsi # 36b425b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b78>\n+\tlea 0x36949972(%rip),%rsi # 36b435b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b78>\n \tlea 0x103e35(%rip),%rcx # 2fda7a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2380a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3694894c(%rip),%rsi # 36b425b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b80>\n+\tlea 0x3694994c(%rip),%rsi # 36b435b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b80>\n \tlea 0x103e56(%rip),%rcx # 2fdac9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23859>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948926(%rip),%rsi # 36b425c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b88>\n+\tlea 0x36949926(%rip),%rsi # 36b435c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b88>\n \tlea 0x103e77(%rip),%rcx # 2fdb18 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x238a8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948900(%rip),%rsi # 36b425c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b90>\n+\tlea 0x36949900(%rip),%rsi # 36b435c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b90>\n \tlea 0x103e96(%rip),%rcx # 2fdb65 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x238f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369488da(%rip),%rsi # 36b425d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b98>\n+\tlea 0x369498da(%rip),%rsi # 36b435d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b98>\n \tlea 0x103eb5(%rip),%rcx # 2fdbb2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23942>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369488b4(%rip),%rsi # 36b425d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba0>\n+\tlea 0x369498b4(%rip),%rsi # 36b435d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba0>\n \tlea 0x103ed6(%rip),%rcx # 2fdc01 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23991>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3694888e(%rip),%rsi # 36b425e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba8>\n+\tlea 0x3694988e(%rip),%rsi # 36b435e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba8>\n \tlea 0x103ef7(%rip),%rcx # 2fdc50 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x239e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948868(%rip),%rsi # 36b425e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb0>\n+\tlea 0x36949868(%rip),%rsi # 36b435e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb0>\n \tlea 0x103f16(%rip),%rcx # 2fdc9d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23a2d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948842(%rip),%rsi # 36b425f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb8>\n+\tlea 0x36949842(%rip),%rsi # 36b435f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb8>\n \tlea 0x103f35(%rip),%rcx # 2fdcea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23a7a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3694881c(%rip),%rsi # 36b425f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc0>\n+\tlea 0x3694981c(%rip),%rsi # 36b435f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc0>\n \tlea 0x103f56(%rip),%rcx # 2fdd39 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23ac9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369487f6(%rip),%rsi # 36b42600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc8>\n+\tlea 0x369497f6(%rip),%rsi # 36b43600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc8>\n \tlea 0x103f77(%rip),%rcx # 2fdd88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23b18>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369487d0(%rip),%rsi # 36b42608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd0>\n+\tlea 0x369497d0(%rip),%rsi # 36b43608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd0>\n \tlea 0x103f97(%rip),%rcx # 2fddd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23b66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369487aa(%rip),%rsi # 36b42610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd8>\n+\tlea 0x369497aa(%rip),%rsi # 36b43610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd8>\n \tlea 0x103fb7(%rip),%rcx # 2fde24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23bb4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36948784(%rip),%rsi # 36b42618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be0>\n+\tlea 0x36949784(%rip),%rsi # 36b43618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be0>\n \tlea 0x103fd9(%rip),%rcx # 2fde74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23c04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36948747(%rip),%rsi # 36b42620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be8>\n+\tlea 0x36949747(%rip),%rsi # 36b43620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be8>\n \tlea 0x103fe4(%rip),%rcx # 2fdec4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23c54>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3694870a(%rip),%rsi # 36b42628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf0>\n+\tlea 0x3694970a(%rip),%rsi # 36b43628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf0>\n \tlea 0x103fed(%rip),%rcx # 2fdf12 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23ca2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369486cd(%rip),%rsi # 36b42630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf8>\n+\tlea 0x369496cd(%rip),%rsi # 36b43630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf8>\n \tlea 0x103ff6(%rip),%rcx # 2fdf60 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23cf0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36948690(%rip),%rsi # 36b42638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c00>\n+\tlea 0x36949690(%rip),%rsi # 36b43638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c00>\n \tlea 0x104001(%rip),%rcx # 2fdfb0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23d40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36948653(%rip),%rsi # 36b42640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c08>\n+\tlea 0x36949653(%rip),%rsi # 36b43640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c08>\n \tlea 0x10400c(%rip),%rcx # 2fe000 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23d90>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36948616(%rip),%rsi # 36b42648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c10>\n+\tlea 0x36949616(%rip),%rsi # 36b43648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c10>\n \tlea 0x104015(%rip),%rcx # 2fe04e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23dde>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369485d9(%rip),%rsi # 36b42650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c18>\n+\tlea 0x369495d9(%rip),%rsi # 36b43650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c18>\n \tlea 0x10401e(%rip),%rcx # 2fe09c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23e2c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3694859c(%rip),%rsi # 36b42658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c20>\n+\tlea 0x3694959c(%rip),%rsi # 36b43658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c20>\n \tlea 0x104029(%rip),%rcx # 2fe0ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23e7c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3694855f(%rip),%rsi # 36b42660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c28>\n+\tlea 0x3694955f(%rip),%rsi # 36b43660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c28>\n \tlea 0x104034(%rip),%rcx # 2fe13c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23ecc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36948522(%rip),%rsi # 36b42668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c30>\n+\tlea 0x36949522(%rip),%rsi # 36b43668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c30>\n \tlea 0x10403d(%rip),%rcx # 2fe18a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23f1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369484e5(%rip),%rsi # 36b42670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c38>\n+\tlea 0x369494e5(%rip),%rsi # 36b43670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c38>\n \tlea 0x104046(%rip),%rcx # 2fe1d8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23f68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369484a8(%rip),%rsi # 36b42678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c40>\n+\tlea 0x369494a8(%rip),%rsi # 36b43678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c40>\n \tlea 0x104051(%rip),%rcx # 2fe228 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x23fb8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 1fa200 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3694c281(%rip),%rdi # 36b46488 ::get_beta()::val@@Base+0x170>\n+\tmov 0x3694d281(%rip),%rdi # 36b47488 ::get_beta()::val@@Base+0x170>\n \ttest %rdi,%rdi\n \tje 1fa221 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3694c26b(%rip) # 36b46488 ::get_beta()::val@@Base+0x170>\n+\tmovq $0x0,0x3694d26b(%rip) # 36b47488 ::get_beta()::val@@Base+0x170>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000001fa230 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)20>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -420126,15 +420126,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36945779(%rip),%rdi # 36b42658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c20>\n+\tlea 0x36946779(%rip),%rdi # 36b43658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1fd1cf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -420270,15 +420270,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369454a0(%rip),%rdi # 36b42650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c18>\n+\tlea 0x369464a0(%rip),%rdi # 36b43650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -420429,15 +420429,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36945143(%rip),%rdi # 36b425f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc0>\n+\tlea 0x36946143(%rip),%rdi # 36b435f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1fd7a5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -420573,15 +420573,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36944e6a(%rip),%rdi # 36b425f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb8>\n+\tlea 0x36945e6a(%rip),%rdi # 36b435f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -420732,15 +420732,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36944a8d(%rip),%rdi # 36b42518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae0>\n+\tlea 0x36945a8d(%rip),%rdi # 36b43518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ae0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1fdd7b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -420876,15 +420876,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369447b4(%rip),%rdi # 36b42510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad8>\n+\tlea 0x369457b4(%rip),%rdi # 36b43510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ad8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -421035,15 +421035,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369445b7(%rip),%rdi # 36b42618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be0>\n+\tlea 0x369455b7(%rip),%rdi # 36b43618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1be0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1fe351 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -421179,15 +421179,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369442de(%rip),%rdi # 36b42610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd8>\n+\tlea 0x369452de(%rip),%rdi # 36b43610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -421338,15 +421338,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36943f81(%rip),%rdi # 36b425b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b80>\n+\tlea 0x36944f81(%rip),%rdi # 36b435b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1fe927 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -421482,15 +421482,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36943ca8(%rip),%rdi # 36b425b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b78>\n+\tlea 0x36944ca8(%rip),%rdi # 36b435b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -421641,15 +421641,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369438cb(%rip),%rdi # 36b424d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa0>\n+\tlea 0x369448cb(%rip),%rdi # 36b434d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1aa0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1feefd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -421785,15 +421785,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369435f2(%rip),%rdi # 36b424d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a98>\n+\tlea 0x369445f2(%rip),%rdi # 36b434d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -421944,15 +421944,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36943495(%rip),%rdi # 36b42678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c40>\n+\tlea 0x36944495(%rip),%rdi # 36b43678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ff4d3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -422088,15 +422088,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369431bc(%rip),%rdi # 36b42670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c38>\n+\tlea 0x369441bc(%rip),%rdi # 36b43670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -422247,15 +422247,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36942d3f(%rip),%rdi # 36b424f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac0>\n+\tlea 0x36943d3f(%rip),%rdi # 36b434f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ac0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 1ffaa9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -422391,15 +422391,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36942a66(%rip),%rdi # 36b424f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab8>\n+\tlea 0x36943a66(%rip),%rdi # 36b434f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ab8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -422550,15 +422550,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369427e9(%rip),%rdi # 36b42578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b40>\n+\tlea 0x369437e9(%rip),%rdi # 36b43578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20007f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -422694,15 +422694,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36942510(%rip),%rdi # 36b42570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b38>\n+\tlea 0x36943510(%rip),%rdi # 36b43570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -422853,15 +422853,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36942133(%rip),%rdi # 36b42498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a60>\n+\tlea 0x36943133(%rip),%rdi # 36b43498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 200936 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -423003,15 +423003,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36941e72(%rip),%rdi # 36b424b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a80>\n+\tlea 0x36942e72(%rip),%rdi # 36b434b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 200c2b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -423147,15 +423147,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36941b79(%rip),%rdi # 36b42490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a58>\n+\tlea 0x36942b79(%rip),%rdi # 36b43490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -423300,15 +423300,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369418a4(%rip),%rdi # 36b424b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a78>\n+\tlea 0x369428a4(%rip),%rdi # 36b434b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1a78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -423459,15 +423459,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36941627(%rip),%rdi # 36b42538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b00>\n+\tlea 0x36942627(%rip),%rdi # 36b43538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 201201 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -423603,15 +423603,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3694134e(%rip),%rdi # 36b42530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af8>\n+\tlea 0x3694234e(%rip),%rdi # 36b43530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1af8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -423762,15 +423762,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36941151(%rip),%rdi # 36b42638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c00>\n+\tlea 0x36942151(%rip),%rdi # 36b43638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2017d7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -423906,15 +423906,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36940e78(%rip),%rdi # 36b42630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf8>\n+\tlea 0x36941e78(%rip),%rdi # 36b43630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1bf8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -424065,15 +424065,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36940a9b(%rip),%rdi # 36b42558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b20>\n+\tlea 0x36941a9b(%rip),%rdi # 36b43558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 201dad (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -424209,15 +424209,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369407c2(%rip),%rdi # 36b42550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b18>\n+\tlea 0x369417c2(%rip),%rdi # 36b43550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -424368,15 +424368,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36940545(%rip),%rdi # 36b425d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba0>\n+\tlea 0x36941545(%rip),%rdi # 36b435d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ba0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 202383 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -424512,15 +424512,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3694026c(%rip),%rdi # 36b425d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b98>\n+\tlea 0x3694126c(%rip),%rdi # 36b435d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -424671,15 +424671,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3693ff2f(%rip),%rdi # 36b42598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b60>\n+\tlea 0x36940f2f(%rip),%rdi # 36b43598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 202959 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -424815,15 +424815,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3693fc56(%rip),%rdi # 36b42590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b58>\n+\tlea 0x36940c56(%rip),%rdi # 36b43590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1b58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -426666,15 +426666,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 1f6730 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 2041ad (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36940d67(%rip),%rax \n+\tmov 0x36941d67(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0xf1668(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0xf1667(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -426964,15 +426964,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693dec8(%rip),%rdi # 36b42680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c48>\n+\tlea 0x3693eec8(%rip),%rdi # 36b43680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427033,15 +427033,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693dd10(%rip),%rdi # 36b42688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c50>\n+\tlea 0x3693ed10(%rip),%rdi # 36b43688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427082,15 +427082,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693dbf6(%rip),%rdi # 36b42690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c58>\n+\tlea 0x3693ebf6(%rip),%rdi # 36b43690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427131,15 +427131,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693dade(%rip),%rdi # 36b42698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c60>\n+\tlea 0x3693eade(%rip),%rdi # 36b43698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427200,15 +427200,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693d928(%rip),%rdi # 36b426a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c68>\n+\tlea 0x3693e928(%rip),%rdi # 36b436a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427269,15 +427269,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693d770(%rip),%rdi # 36b426a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c70>\n+\tlea 0x3693e770(%rip),%rdi # 36b436a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427318,15 +427318,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693d656(%rip),%rdi # 36b426b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c78>\n+\tlea 0x3693e656(%rip),%rdi # 36b436b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427367,15 +427367,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693d53e(%rip),%rdi # 36b426b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c80>\n+\tlea 0x3693e53e(%rip),%rdi # 36b436b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427436,15 +427436,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693d388(%rip),%rdi # 36b426c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c88>\n+\tlea 0x3693e388(%rip),%rdi # 36b436c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427505,15 +427505,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693d1d0(%rip),%rdi # 36b426c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c90>\n+\tlea 0x3693e1d0(%rip),%rdi # 36b436c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427554,15 +427554,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693d0b6(%rip),%rdi # 36b426d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c98>\n+\tlea 0x3693e0b6(%rip),%rdi # 36b436d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427603,15 +427603,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693cf9e(%rip),%rdi # 36b426d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca0>\n+\tlea 0x3693df9e(%rip),%rdi # 36b436d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427672,15 +427672,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693cde8(%rip),%rdi # 36b426e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca8>\n+\tlea 0x3693dde8(%rip),%rdi # 36b436e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427741,15 +427741,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693cc30(%rip),%rdi # 36b426e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb0>\n+\tlea 0x3693dc30(%rip),%rdi # 36b436e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427790,15 +427790,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693cb16(%rip),%rdi # 36b426f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb8>\n+\tlea 0x3693db16(%rip),%rdi # 36b436f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427839,15 +427839,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693c9fe(%rip),%rdi # 36b426f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc0>\n+\tlea 0x3693d9fe(%rip),%rdi # 36b436f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427908,15 +427908,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693c848(%rip),%rdi # 36b42700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc8>\n+\tlea 0x3693d848(%rip),%rdi # 36b43700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -427977,15 +427977,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693c690(%rip),%rdi # 36b42708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd0>\n+\tlea 0x3693d690(%rip),%rdi # 36b43708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428026,15 +428026,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693c576(%rip),%rdi # 36b42710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd8>\n+\tlea 0x3693d576(%rip),%rdi # 36b43710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428075,15 +428075,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693c45e(%rip),%rdi # 36b42718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce0>\n+\tlea 0x3693d45e(%rip),%rdi # 36b43718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428144,15 +428144,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693c2a8(%rip),%rdi # 36b42720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce8>\n+\tlea 0x3693d2a8(%rip),%rdi # 36b43720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428213,15 +428213,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693c0f0(%rip),%rdi # 36b42728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf0>\n+\tlea 0x3693d0f0(%rip),%rdi # 36b43728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428262,15 +428262,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693bfd6(%rip),%rdi # 36b42730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf8>\n+\tlea 0x3693cfd6(%rip),%rdi # 36b43730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428311,15 +428311,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693bebe(%rip),%rdi # 36b42738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d00>\n+\tlea 0x3693cebe(%rip),%rdi # 36b43738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428380,15 +428380,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693bd08(%rip),%rdi # 36b42740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d08>\n+\tlea 0x3693cd08(%rip),%rdi # 36b43740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428449,15 +428449,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693bb50(%rip),%rdi # 36b42748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d10>\n+\tlea 0x3693cb50(%rip),%rdi # 36b43748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428498,15 +428498,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693ba36(%rip),%rdi # 36b42750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d18>\n+\tlea 0x3693ca36(%rip),%rdi # 36b43750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428547,15 +428547,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693b91e(%rip),%rdi # 36b42758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d20>\n+\tlea 0x3693c91e(%rip),%rdi # 36b43758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428616,15 +428616,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693b768(%rip),%rdi # 36b42760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d28>\n+\tlea 0x3693c768(%rip),%rdi # 36b43760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428685,15 +428685,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693b5b0(%rip),%rdi # 36b42768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d30>\n+\tlea 0x3693c5b0(%rip),%rdi # 36b43768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428734,15 +428734,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693b496(%rip),%rdi # 36b42770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d38>\n+\tlea 0x3693c496(%rip),%rdi # 36b43770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428783,15 +428783,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693b37e(%rip),%rdi # 36b42778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d40>\n+\tlea 0x3693c37e(%rip),%rdi # 36b43778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428852,15 +428852,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693b1c8(%rip),%rdi # 36b42780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d48>\n+\tlea 0x3693c1c8(%rip),%rdi # 36b43780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428921,15 +428921,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693b010(%rip),%rdi # 36b42788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d50>\n+\tlea 0x3693c010(%rip),%rdi # 36b43788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -428970,15 +428970,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693aef6(%rip),%rdi # 36b42790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d58>\n+\tlea 0x3693bef6(%rip),%rdi # 36b43790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429019,15 +429019,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693adde(%rip),%rdi # 36b42798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d60>\n+\tlea 0x3693bdde(%rip),%rdi # 36b43798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429088,15 +429088,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693ac28(%rip),%rdi # 36b427a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d68>\n+\tlea 0x3693bc28(%rip),%rdi # 36b437a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429157,15 +429157,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693aa70(%rip),%rdi # 36b427a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d70>\n+\tlea 0x3693ba70(%rip),%rdi # 36b437a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429206,15 +429206,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693a956(%rip),%rdi # 36b427b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d78>\n+\tlea 0x3693b956(%rip),%rdi # 36b437b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429255,15 +429255,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693a83e(%rip),%rdi # 36b427b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d80>\n+\tlea 0x3693b83e(%rip),%rdi # 36b437b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429324,15 +429324,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693a688(%rip),%rdi # 36b427c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d88>\n+\tlea 0x3693b688(%rip),%rdi # 36b437c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429393,15 +429393,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693a4d0(%rip),%rdi # 36b427c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d90>\n+\tlea 0x3693b4d0(%rip),%rdi # 36b437c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429442,15 +429442,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693a3b6(%rip),%rdi # 36b427d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d98>\n+\tlea 0x3693b3b6(%rip),%rdi # 36b437d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429491,15 +429491,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693a29e(%rip),%rdi # 36b427d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da0>\n+\tlea 0x3693b29e(%rip),%rdi # 36b437d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429560,15 +429560,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3693a0e8(%rip),%rdi # 36b427e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da8>\n+\tlea 0x3693b0e8(%rip),%rdi # 36b437e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429629,15 +429629,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36939f30(%rip),%rdi # 36b427e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db0>\n+\tlea 0x3693af30(%rip),%rdi # 36b437e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429678,15 +429678,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36939e16(%rip),%rdi # 36b427f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db8>\n+\tlea 0x3693ae16(%rip),%rdi # 36b437f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429727,15 +429727,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36939cfe(%rip),%rdi # 36b427f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc0>\n+\tlea 0x3693acfe(%rip),%rdi # 36b437f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429796,15 +429796,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36939b48(%rip),%rdi # 36b42800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc8>\n+\tlea 0x3693ab48(%rip),%rdi # 36b43800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429865,15 +429865,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36939990(%rip),%rdi # 36b42808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd0>\n+\tlea 0x3693a990(%rip),%rdi # 36b43808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429914,15 +429914,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36939876(%rip),%rdi # 36b42810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd8>\n+\tlea 0x3693a876(%rip),%rdi # 36b43810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -429963,15 +429963,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693975e(%rip),%rdi # 36b42818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de0>\n+\tlea 0x3693a75e(%rip),%rdi # 36b43818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430032,15 +430032,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369395a8(%rip),%rdi # 36b42820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de8>\n+\tlea 0x3693a5a8(%rip),%rdi # 36b43820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430101,15 +430101,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369393f0(%rip),%rdi # 36b42828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df0>\n+\tlea 0x3693a3f0(%rip),%rdi # 36b43828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430150,15 +430150,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369392d6(%rip),%rdi # 36b42830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df8>\n+\tlea 0x3693a2d6(%rip),%rdi # 36b43830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430199,15 +430199,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369391be(%rip),%rdi # 36b42838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e00>\n+\tlea 0x3693a1be(%rip),%rdi # 36b43838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430268,15 +430268,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36939008(%rip),%rdi # 36b42840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e08>\n+\tlea 0x3693a008(%rip),%rdi # 36b43840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430337,15 +430337,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36938e50(%rip),%rdi # 36b42848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e10>\n+\tlea 0x36939e50(%rip),%rdi # 36b43848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430386,15 +430386,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36938d36(%rip),%rdi # 36b42850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e18>\n+\tlea 0x36939d36(%rip),%rdi # 36b43850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430435,15 +430435,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36938c1e(%rip),%rdi # 36b42858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e20>\n+\tlea 0x36939c1e(%rip),%rdi # 36b43858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430504,15 +430504,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36938a68(%rip),%rdi # 36b42860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e28>\n+\tlea 0x36939a68(%rip),%rdi # 36b43860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430573,15 +430573,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369388b0(%rip),%rdi # 36b42868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e30>\n+\tlea 0x369398b0(%rip),%rdi # 36b43868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430622,15 +430622,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36938796(%rip),%rdi # 36b42870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e38>\n+\tlea 0x36939796(%rip),%rdi # 36b43870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -430671,696 +430671,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3693867e(%rip),%rdi # 36b42878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e40>\n+\tlea 0x3693967e(%rip),%rdi # 36b43878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3693c264(%rip),%rbx # 36b46490 ::get_beta()::val@@Base+0x178>\n+\tmov 0x3693d264(%rip),%rbx # 36b47490 ::get_beta()::val@@Base+0x178>\n \ttest %rbx,%rbx\n \tjne 20a247 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3693b418(%rip),%rdi # 36b45650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c18>\n+\tlea 0x3693c418(%rip),%rdi # 36b46650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c18>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3693c249(%rip) # 36b46490 ::get_beta()::val@@Base+0x178>\n+\tmov %rax,0x3693d249(%rip) # 36b47490 ::get_beta()::val@@Base+0x178>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938426(%rip),%rsi # 36b42680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c48>\n+\tlea 0x36939426(%rip),%rsi # 36b43680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c48>\n \tlea 0xf4017(%rip),%rcx # 2fe278 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24008>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938400(%rip),%rsi # 36b42688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c50>\n+\tlea 0x36939400(%rip),%rsi # 36b43688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c50>\n \tlea 0xf4035(%rip),%rcx # 2fe2c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24054>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369383da(%rip),%rsi # 36b42690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c58>\n+\tlea 0x369393da(%rip),%rsi # 36b43690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c58>\n \tlea 0xf4053(%rip),%rcx # 2fe310 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x240a0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369383b4(%rip),%rsi # 36b42698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c60>\n+\tlea 0x369393b4(%rip),%rsi # 36b43698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c60>\n \tlea 0xf4073(%rip),%rcx # 2fe35e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x240ee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3693838e(%rip),%rsi # 36b426a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c68>\n+\tlea 0x3693938e(%rip),%rsi # 36b436a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c68>\n \tlea 0xf4093(%rip),%rcx # 2fe3ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2413c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938368(%rip),%rsi # 36b426a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c70>\n+\tlea 0x36939368(%rip),%rsi # 36b436a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c70>\n \tlea 0xf40b2(%rip),%rcx # 2fe3f9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24189>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938342(%rip),%rsi # 36b426b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c78>\n+\tlea 0x36939342(%rip),%rsi # 36b436b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c78>\n \tlea 0xf40d1(%rip),%rcx # 2fe446 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x241d6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3693831c(%rip),%rsi # 36b426b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c80>\n+\tlea 0x3693931c(%rip),%rsi # 36b436b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c80>\n \tlea 0xf40f2(%rip),%rcx # 2fe495 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24225>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369382f6(%rip),%rsi # 36b426c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c88>\n+\tlea 0x369392f6(%rip),%rsi # 36b436c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c88>\n \tlea 0xf4113(%rip),%rcx # 2fe4e4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24274>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369382d0(%rip),%rsi # 36b426c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c90>\n+\tlea 0x369392d0(%rip),%rsi # 36b436c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c90>\n \tlea 0xf4132(%rip),%rcx # 2fe531 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x242c1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369382aa(%rip),%rsi # 36b426d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c98>\n+\tlea 0x369392aa(%rip),%rsi # 36b436d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c98>\n \tlea 0xf4151(%rip),%rcx # 2fe57e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2430e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938284(%rip),%rsi # 36b426d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca0>\n+\tlea 0x36939284(%rip),%rsi # 36b436d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca0>\n \tlea 0xf4172(%rip),%rcx # 2fe5cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2435d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3693825e(%rip),%rsi # 36b426e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca8>\n+\tlea 0x3693925e(%rip),%rsi # 36b436e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca8>\n \tlea 0xf4193(%rip),%rcx # 2fe61c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x243ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938238(%rip),%rsi # 36b426e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb0>\n+\tlea 0x36939238(%rip),%rsi # 36b436e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb0>\n \tlea 0xf41b2(%rip),%rcx # 2fe669 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x243f9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938212(%rip),%rsi # 36b426f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb8>\n+\tlea 0x36939212(%rip),%rsi # 36b436f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb8>\n \tlea 0xf41d1(%rip),%rcx # 2fe6b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24446>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369381ec(%rip),%rsi # 36b426f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc0>\n+\tlea 0x369391ec(%rip),%rsi # 36b436f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc0>\n \tlea 0xf41f2(%rip),%rcx # 2fe705 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24495>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369381c6(%rip),%rsi # 36b42700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc8>\n+\tlea 0x369391c6(%rip),%rsi # 36b43700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc8>\n \tlea 0xf4213(%rip),%rcx # 2fe754 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x244e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369381a0(%rip),%rsi # 36b42708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd0>\n+\tlea 0x369391a0(%rip),%rsi # 36b43708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd0>\n \tlea 0xf4232(%rip),%rcx # 2fe7a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24531>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3693817a(%rip),%rsi # 36b42710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd8>\n+\tlea 0x3693917a(%rip),%rsi # 36b43710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd8>\n \tlea 0xf4251(%rip),%rcx # 2fe7ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2457e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938154(%rip),%rsi # 36b42718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce0>\n+\tlea 0x36939154(%rip),%rsi # 36b43718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce0>\n \tlea 0xf4272(%rip),%rcx # 2fe83d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x245cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3693812e(%rip),%rsi # 36b42720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce8>\n+\tlea 0x3693912e(%rip),%rsi # 36b43720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce8>\n \tlea 0xf4293(%rip),%rcx # 2fe88c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2461c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938108(%rip),%rsi # 36b42728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf0>\n+\tlea 0x36939108(%rip),%rsi # 36b43728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf0>\n \tlea 0xf42b2(%rip),%rcx # 2fe8d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24669>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369380e2(%rip),%rsi # 36b42730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf8>\n+\tlea 0x369390e2(%rip),%rsi # 36b43730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf8>\n \tlea 0xf42d1(%rip),%rcx # 2fe926 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x246b6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369380bc(%rip),%rsi # 36b42738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d00>\n+\tlea 0x369390bc(%rip),%rsi # 36b43738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d00>\n \tlea 0xf42f2(%rip),%rcx # 2fe975 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24705>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938096(%rip),%rsi # 36b42740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d08>\n+\tlea 0x36939096(%rip),%rsi # 36b43740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d08>\n \tlea 0xf4313(%rip),%rcx # 2fe9c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24754>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938070(%rip),%rsi # 36b42748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d10>\n+\tlea 0x36939070(%rip),%rsi # 36b43748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d10>\n \tlea 0xf4332(%rip),%rcx # 2fea11 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x247a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3693804a(%rip),%rsi # 36b42750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d18>\n+\tlea 0x3693904a(%rip),%rsi # 36b43750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d18>\n \tlea 0xf4351(%rip),%rcx # 2fea5e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x247ee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36938024(%rip),%rsi # 36b42758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d20>\n+\tlea 0x36939024(%rip),%rsi # 36b43758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d20>\n \tlea 0xf4372(%rip),%rcx # 2feaad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2483d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937ffe(%rip),%rsi # 36b42760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d28>\n+\tlea 0x36938ffe(%rip),%rsi # 36b43760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d28>\n \tlea 0xf4393(%rip),%rcx # 2feafc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2488c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937fd8(%rip),%rsi # 36b42768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d30>\n+\tlea 0x36938fd8(%rip),%rsi # 36b43768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d30>\n \tlea 0xf43b2(%rip),%rcx # 2feb49 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x248d9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937fb2(%rip),%rsi # 36b42770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d38>\n+\tlea 0x36938fb2(%rip),%rsi # 36b43770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d38>\n \tlea 0xf43d1(%rip),%rcx # 2feb96 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24926>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937f8c(%rip),%rsi # 36b42778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d40>\n+\tlea 0x36938f8c(%rip),%rsi # 36b43778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d40>\n \tlea 0xf43f2(%rip),%rcx # 2febe5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24975>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937f66(%rip),%rsi # 36b42780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d48>\n+\tlea 0x36938f66(%rip),%rsi # 36b43780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d48>\n \tlea 0xf4413(%rip),%rcx # 2fec34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x249c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937f40(%rip),%rsi # 36b42788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d50>\n+\tlea 0x36938f40(%rip),%rsi # 36b43788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d50>\n \tlea 0xf4432(%rip),%rcx # 2fec81 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24a11>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937f1a(%rip),%rsi # 36b42790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d58>\n+\tlea 0x36938f1a(%rip),%rsi # 36b43790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d58>\n \tlea 0xf4451(%rip),%rcx # 2fecce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24a5e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937ef4(%rip),%rsi # 36b42798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d60>\n+\tlea 0x36938ef4(%rip),%rsi # 36b43798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d60>\n \tlea 0xf4472(%rip),%rcx # 2fed1d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24aad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937ece(%rip),%rsi # 36b427a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d68>\n+\tlea 0x36938ece(%rip),%rsi # 36b437a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d68>\n \tlea 0xf4493(%rip),%rcx # 2fed6c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24afc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937ea8(%rip),%rsi # 36b427a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d70>\n+\tlea 0x36938ea8(%rip),%rsi # 36b437a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d70>\n \tlea 0xf44b2(%rip),%rcx # 2fedb9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24b49>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937e82(%rip),%rsi # 36b427b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d78>\n+\tlea 0x36938e82(%rip),%rsi # 36b437b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d78>\n \tlea 0xf44d1(%rip),%rcx # 2fee06 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24b96>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937e5c(%rip),%rsi # 36b427b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d80>\n+\tlea 0x36938e5c(%rip),%rsi # 36b437b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d80>\n \tlea 0xf44f2(%rip),%rcx # 2fee55 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24be5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937e36(%rip),%rsi # 36b427c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d88>\n+\tlea 0x36938e36(%rip),%rsi # 36b437c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d88>\n \tlea 0xf4513(%rip),%rcx # 2feea4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24c34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937e10(%rip),%rsi # 36b427c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d90>\n+\tlea 0x36938e10(%rip),%rsi # 36b437c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d90>\n \tlea 0xf4532(%rip),%rcx # 2feef1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24c81>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937dea(%rip),%rsi # 36b427d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d98>\n+\tlea 0x36938dea(%rip),%rsi # 36b437d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d98>\n \tlea 0xf4551(%rip),%rcx # 2fef3e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24cce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937dc4(%rip),%rsi # 36b427d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da0>\n+\tlea 0x36938dc4(%rip),%rsi # 36b437d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da0>\n \tlea 0xf4572(%rip),%rcx # 2fef8d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24d1d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937d9e(%rip),%rsi # 36b427e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da8>\n+\tlea 0x36938d9e(%rip),%rsi # 36b437e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da8>\n \tlea 0xf4593(%rip),%rcx # 2fefdc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24d6c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937d78(%rip),%rsi # 36b427e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db0>\n+\tlea 0x36938d78(%rip),%rsi # 36b437e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db0>\n \tlea 0xf45b2(%rip),%rcx # 2ff029 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24db9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937d52(%rip),%rsi # 36b427f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db8>\n+\tlea 0x36938d52(%rip),%rsi # 36b437f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db8>\n \tlea 0xf45d1(%rip),%rcx # 2ff076 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24e06>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937d2c(%rip),%rsi # 36b427f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc0>\n+\tlea 0x36938d2c(%rip),%rsi # 36b437f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc0>\n \tlea 0xf45f2(%rip),%rcx # 2ff0c5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24e55>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937d06(%rip),%rsi # 36b42800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc8>\n+\tlea 0x36938d06(%rip),%rsi # 36b43800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc8>\n \tlea 0xf4613(%rip),%rcx # 2ff114 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24ea4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937ce0(%rip),%rsi # 36b42808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd0>\n+\tlea 0x36938ce0(%rip),%rsi # 36b43808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd0>\n \tlea 0xf4633(%rip),%rcx # 2ff162 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24ef2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937cba(%rip),%rsi # 36b42810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd8>\n+\tlea 0x36938cba(%rip),%rsi # 36b43810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd8>\n \tlea 0xf4653(%rip),%rcx # 2ff1b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24f40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36937c94(%rip),%rsi # 36b42818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de0>\n+\tlea 0x36938c94(%rip),%rsi # 36b43818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de0>\n \tlea 0xf4675(%rip),%rcx # 2ff200 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24f90>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937c57(%rip),%rsi # 36b42820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de8>\n+\tlea 0x36938c57(%rip),%rsi # 36b43820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de8>\n \tlea 0xf4680(%rip),%rcx # 2ff250 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x24fe0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937c1a(%rip),%rsi # 36b42828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df0>\n+\tlea 0x36938c1a(%rip),%rsi # 36b43828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df0>\n \tlea 0xf4689(%rip),%rcx # 2ff29e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2502e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937bdd(%rip),%rsi # 36b42830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df8>\n+\tlea 0x36938bdd(%rip),%rsi # 36b43830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df8>\n \tlea 0xf4692(%rip),%rcx # 2ff2ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2507c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937ba0(%rip),%rsi # 36b42838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e00>\n+\tlea 0x36938ba0(%rip),%rsi # 36b43838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e00>\n \tlea 0xf469d(%rip),%rcx # 2ff33c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x250cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937b63(%rip),%rsi # 36b42840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e08>\n+\tlea 0x36938b63(%rip),%rsi # 36b43840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e08>\n \tlea 0xf46a8(%rip),%rcx # 2ff38c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2511c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937b26(%rip),%rsi # 36b42848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e10>\n+\tlea 0x36938b26(%rip),%rsi # 36b43848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e10>\n \tlea 0xf46b1(%rip),%rcx # 2ff3da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2516a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937ae9(%rip),%rsi # 36b42850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e18>\n+\tlea 0x36938ae9(%rip),%rsi # 36b43850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e18>\n \tlea 0xf46ba(%rip),%rcx # 2ff428 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x251b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937aac(%rip),%rsi # 36b42858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e20>\n+\tlea 0x36938aac(%rip),%rsi # 36b43858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e20>\n \tlea 0xf46c5(%rip),%rcx # 2ff478 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25208>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937a6f(%rip),%rsi # 36b42860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e28>\n+\tlea 0x36938a6f(%rip),%rsi # 36b43860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e28>\n \tlea 0xf46d0(%rip),%rcx # 2ff4c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25258>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36937a32(%rip),%rsi # 36b42868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e30>\n+\tlea 0x36938a32(%rip),%rsi # 36b43868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e30>\n \tlea 0xf46d9(%rip),%rcx # 2ff516 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x252a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369379f5(%rip),%rsi # 36b42870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e38>\n+\tlea 0x369389f5(%rip),%rsi # 36b43870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e38>\n \tlea 0xf46e2(%rip),%rcx # 2ff564 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x252f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369379b8(%rip),%rsi # 36b42878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e40>\n+\tlea 0x369389b8(%rip),%rsi # 36b43878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e40>\n \tlea 0xf46ed(%rip),%rcx # 2ff5b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25344>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 20aef0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3693b599(%rip),%rdi # 36b46490 ::get_beta()::val@@Base+0x178>\n+\tmov 0x3693c599(%rip),%rdi # 36b47490 ::get_beta()::val@@Base+0x178>\n \ttest %rdi,%rdi\n \tje 20af11 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3693b583(%rip) # 36b46490 ::get_beta()::val@@Base+0x178>\n+\tmovq $0x0,0x3693c583(%rip) # 36b47490 ::get_beta()::val@@Base+0x178>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000020af20 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)23>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -434973,15 +434973,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36934c89(%rip),%rdi # 36b42858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e20>\n+\tlea 0x36935c89(%rip),%rdi # 36b43858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20debf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -435117,15 +435117,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369349b0(%rip),%rdi # 36b42850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e18>\n+\tlea 0x369359b0(%rip),%rdi # 36b43850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -435276,15 +435276,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36934653(%rip),%rdi # 36b427f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc0>\n+\tlea 0x36935653(%rip),%rdi # 36b437f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20e495 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -435420,15 +435420,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3693437a(%rip),%rdi # 36b427f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db8>\n+\tlea 0x3693537a(%rip),%rdi # 36b437f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1db8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -435579,15 +435579,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36933f9d(%rip),%rdi # 36b42718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce0>\n+\tlea 0x36934f9d(%rip),%rdi # 36b43718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ce0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20ea6b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -435723,15 +435723,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36933cc4(%rip),%rdi # 36b42710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd8>\n+\tlea 0x36934cc4(%rip),%rdi # 36b43710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -435882,15 +435882,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36933ac7(%rip),%rdi # 36b42818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de0>\n+\tlea 0x36934ac7(%rip),%rdi # 36b43818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1de0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20f041 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -436026,15 +436026,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369337ee(%rip),%rdi # 36b42810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd8>\n+\tlea 0x369347ee(%rip),%rdi # 36b43810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1dd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -436185,15 +436185,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36933491(%rip),%rdi # 36b427b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d80>\n+\tlea 0x36934491(%rip),%rdi # 36b437b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20f617 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -436329,15 +436329,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369331b8(%rip),%rdi # 36b427b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d78>\n+\tlea 0x369341b8(%rip),%rdi # 36b437b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -436488,15 +436488,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36932ddb(%rip),%rdi # 36b426d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca0>\n+\tlea 0x36933ddb(%rip),%rdi # 36b436d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ca0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 20fbed (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -436632,15 +436632,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36932b02(%rip),%rdi # 36b426d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c98>\n+\tlea 0x36933b02(%rip),%rdi # 36b436d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -436791,15 +436791,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369329a5(%rip),%rdi # 36b42878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e40>\n+\tlea 0x369339a5(%rip),%rdi # 36b43878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2101c3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -436935,15 +436935,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369326cc(%rip),%rdi # 36b42870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e38>\n+\tlea 0x369336cc(%rip),%rdi # 36b43870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -437094,15 +437094,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3693224f(%rip),%rdi # 36b426f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc0>\n+\tlea 0x3693324f(%rip),%rdi # 36b436f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 210799 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -437238,15 +437238,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36931f76(%rip),%rdi # 36b426f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb8>\n+\tlea 0x36932f76(%rip),%rdi # 36b436f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -437397,15 +437397,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36931cf9(%rip),%rdi # 36b42778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d40>\n+\tlea 0x36932cf9(%rip),%rdi # 36b43778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 210d6f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -437541,15 +437541,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36931a20(%rip),%rdi # 36b42770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d38>\n+\tlea 0x36932a20(%rip),%rdi # 36b43770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -437700,15 +437700,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36931643(%rip),%rdi # 36b42698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c60>\n+\tlea 0x36932643(%rip),%rdi # 36b43698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 211626 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -437850,15 +437850,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36931382(%rip),%rdi # 36b426b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c80>\n+\tlea 0x36932382(%rip),%rdi # 36b436b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 21191b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -437994,15 +437994,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36931089(%rip),%rdi # 36b42690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c58>\n+\tlea 0x36932089(%rip),%rdi # 36b43690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -438147,15 +438147,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36930db4(%rip),%rdi # 36b426b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c78>\n+\tlea 0x36931db4(%rip),%rdi # 36b436b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1c78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -438306,15 +438306,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36930b37(%rip),%rdi # 36b42738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d00>\n+\tlea 0x36931b37(%rip),%rdi # 36b43738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 211ef1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -438450,15 +438450,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3693085e(%rip),%rdi # 36b42730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf8>\n+\tlea 0x3693185e(%rip),%rdi # 36b43730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1cf8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -438609,15 +438609,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36930661(%rip),%rdi # 36b42838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e00>\n+\tlea 0x36931661(%rip),%rdi # 36b43838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2124c7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -438753,15 +438753,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36930388(%rip),%rdi # 36b42830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df8>\n+\tlea 0x36931388(%rip),%rdi # 36b43830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1df8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -438912,15 +438912,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692ffab(%rip),%rdi # 36b42758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d20>\n+\tlea 0x36930fab(%rip),%rdi # 36b43758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 212a9d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -439056,15 +439056,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692fcd2(%rip),%rdi # 36b42750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d18>\n+\tlea 0x36930cd2(%rip),%rdi # 36b43750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -439215,15 +439215,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692fa55(%rip),%rdi # 36b427d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da0>\n+\tlea 0x36930a55(%rip),%rdi # 36b437d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1da0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 213073 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -439359,15 +439359,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692f77c(%rip),%rdi # 36b427d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d98>\n+\tlea 0x3693077c(%rip),%rdi # 36b437d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -439518,15 +439518,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692f43f(%rip),%rdi # 36b42798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d60>\n+\tlea 0x3693043f(%rip),%rdi # 36b43798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 213649 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -439662,15 +439662,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692f166(%rip),%rdi # 36b42790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d58>\n+\tlea 0x36930166(%rip),%rdi # 36b43790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1d58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -441513,15 +441513,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 207420 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 214e9d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36930077(%rip),%rax \n+\tmov 0x36931077(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0xe0978(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0xe0977(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -441811,15 +441811,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692d3d8(%rip),%rdi # 36b42880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e48>\n+\tlea 0x3692e3d8(%rip),%rdi # 36b43880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -441880,15 +441880,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692d220(%rip),%rdi # 36b42888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e50>\n+\tlea 0x3692e220(%rip),%rdi # 36b43888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -441929,15 +441929,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692d106(%rip),%rdi # 36b42890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e58>\n+\tlea 0x3692e106(%rip),%rdi # 36b43890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -441978,15 +441978,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692cfee(%rip),%rdi # 36b42898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e60>\n+\tlea 0x3692dfee(%rip),%rdi # 36b43898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442047,15 +442047,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692ce38(%rip),%rdi # 36b428a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e68>\n+\tlea 0x3692de38(%rip),%rdi # 36b438a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442116,15 +442116,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692cc80(%rip),%rdi # 36b428a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e70>\n+\tlea 0x3692dc80(%rip),%rdi # 36b438a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442165,15 +442165,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692cb66(%rip),%rdi # 36b428b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e78>\n+\tlea 0x3692db66(%rip),%rdi # 36b438b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442214,15 +442214,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692ca4e(%rip),%rdi # 36b428b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e80>\n+\tlea 0x3692da4e(%rip),%rdi # 36b438b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442283,15 +442283,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692c898(%rip),%rdi # 36b428c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e88>\n+\tlea 0x3692d898(%rip),%rdi # 36b438c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442352,15 +442352,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692c6e0(%rip),%rdi # 36b428c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e90>\n+\tlea 0x3692d6e0(%rip),%rdi # 36b438c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442401,15 +442401,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692c5c6(%rip),%rdi # 36b428d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e98>\n+\tlea 0x3692d5c6(%rip),%rdi # 36b438d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442450,15 +442450,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692c4ae(%rip),%rdi # 36b428d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea0>\n+\tlea 0x3692d4ae(%rip),%rdi # 36b438d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442519,15 +442519,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692c2f8(%rip),%rdi # 36b428e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea8>\n+\tlea 0x3692d2f8(%rip),%rdi # 36b438e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442588,15 +442588,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692c140(%rip),%rdi # 36b428e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb0>\n+\tlea 0x3692d140(%rip),%rdi # 36b438e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442637,15 +442637,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692c026(%rip),%rdi # 36b428f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb8>\n+\tlea 0x3692d026(%rip),%rdi # 36b438f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442686,15 +442686,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692bf0e(%rip),%rdi # 36b428f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec0>\n+\tlea 0x3692cf0e(%rip),%rdi # 36b438f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442755,15 +442755,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692bd58(%rip),%rdi # 36b42900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec8>\n+\tlea 0x3692cd58(%rip),%rdi # 36b43900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442824,15 +442824,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692bba0(%rip),%rdi # 36b42908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed0>\n+\tlea 0x3692cba0(%rip),%rdi # 36b43908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442873,15 +442873,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692ba86(%rip),%rdi # 36b42910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed8>\n+\tlea 0x3692ca86(%rip),%rdi # 36b43910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442922,15 +442922,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692b96e(%rip),%rdi # 36b42918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee0>\n+\tlea 0x3692c96e(%rip),%rdi # 36b43918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -442991,15 +442991,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692b7b8(%rip),%rdi # 36b42920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee8>\n+\tlea 0x3692c7b8(%rip),%rdi # 36b43920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443060,15 +443060,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692b600(%rip),%rdi # 36b42928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef0>\n+\tlea 0x3692c600(%rip),%rdi # 36b43928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443109,15 +443109,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692b4e6(%rip),%rdi # 36b42930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef8>\n+\tlea 0x3692c4e6(%rip),%rdi # 36b43930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443158,15 +443158,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692b3ce(%rip),%rdi # 36b42938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f00>\n+\tlea 0x3692c3ce(%rip),%rdi # 36b43938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443227,15 +443227,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692b218(%rip),%rdi # 36b42940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f08>\n+\tlea 0x3692c218(%rip),%rdi # 36b43940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443296,15 +443296,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692b060(%rip),%rdi # 36b42948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f10>\n+\tlea 0x3692c060(%rip),%rdi # 36b43948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443345,15 +443345,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692af46(%rip),%rdi # 36b42950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f18>\n+\tlea 0x3692bf46(%rip),%rdi # 36b43950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443394,15 +443394,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692ae2e(%rip),%rdi # 36b42958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f20>\n+\tlea 0x3692be2e(%rip),%rdi # 36b43958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443463,15 +443463,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692ac78(%rip),%rdi # 36b42960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f28>\n+\tlea 0x3692bc78(%rip),%rdi # 36b43960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443532,15 +443532,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692aac0(%rip),%rdi # 36b42968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f30>\n+\tlea 0x3692bac0(%rip),%rdi # 36b43968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443581,15 +443581,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692a9a6(%rip),%rdi # 36b42970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f38>\n+\tlea 0x3692b9a6(%rip),%rdi # 36b43970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443630,15 +443630,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692a88e(%rip),%rdi # 36b42978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f40>\n+\tlea 0x3692b88e(%rip),%rdi # 36b43978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443699,15 +443699,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692a6d8(%rip),%rdi # 36b42980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f48>\n+\tlea 0x3692b6d8(%rip),%rdi # 36b43980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443768,15 +443768,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692a520(%rip),%rdi # 36b42988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f50>\n+\tlea 0x3692b520(%rip),%rdi # 36b43988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443817,15 +443817,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692a406(%rip),%rdi # 36b42990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f58>\n+\tlea 0x3692b406(%rip),%rdi # 36b43990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443866,15 +443866,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692a2ee(%rip),%rdi # 36b42998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f60>\n+\tlea 0x3692b2ee(%rip),%rdi # 36b43998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -443935,15 +443935,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3692a138(%rip),%rdi # 36b429a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f68>\n+\tlea 0x3692b138(%rip),%rdi # 36b439a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444004,15 +444004,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36929f80(%rip),%rdi # 36b429a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f70>\n+\tlea 0x3692af80(%rip),%rdi # 36b439a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444053,15 +444053,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36929e66(%rip),%rdi # 36b429b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f78>\n+\tlea 0x3692ae66(%rip),%rdi # 36b439b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444102,15 +444102,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36929d4e(%rip),%rdi # 36b429b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f80>\n+\tlea 0x3692ad4e(%rip),%rdi # 36b439b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444171,15 +444171,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36929b98(%rip),%rdi # 36b429c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f88>\n+\tlea 0x3692ab98(%rip),%rdi # 36b439c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444240,15 +444240,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369299e0(%rip),%rdi # 36b429c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f90>\n+\tlea 0x3692a9e0(%rip),%rdi # 36b439c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444289,15 +444289,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369298c6(%rip),%rdi # 36b429d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f98>\n+\tlea 0x3692a8c6(%rip),%rdi # 36b439d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444338,15 +444338,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369297ae(%rip),%rdi # 36b429d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa0>\n+\tlea 0x3692a7ae(%rip),%rdi # 36b439d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444407,15 +444407,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369295f8(%rip),%rdi # 36b429e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa8>\n+\tlea 0x3692a5f8(%rip),%rdi # 36b439e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444476,15 +444476,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36929440(%rip),%rdi # 36b429e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb0>\n+\tlea 0x3692a440(%rip),%rdi # 36b439e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444525,15 +444525,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36929326(%rip),%rdi # 36b429f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb8>\n+\tlea 0x3692a326(%rip),%rdi # 36b439f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444574,15 +444574,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692920e(%rip),%rdi # 36b429f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc0>\n+\tlea 0x3692a20e(%rip),%rdi # 36b439f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444643,15 +444643,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36929058(%rip),%rdi # 36b42a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc8>\n+\tlea 0x3692a058(%rip),%rdi # 36b43a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444712,15 +444712,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36928ea0(%rip),%rdi # 36b42a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd0>\n+\tlea 0x36929ea0(%rip),%rdi # 36b43a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444761,15 +444761,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36928d86(%rip),%rdi # 36b42a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd8>\n+\tlea 0x36929d86(%rip),%rdi # 36b43a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444810,15 +444810,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36928c6e(%rip),%rdi # 36b42a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe0>\n+\tlea 0x36929c6e(%rip),%rdi # 36b43a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444879,15 +444879,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36928ab8(%rip),%rdi # 36b42a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe8>\n+\tlea 0x36929ab8(%rip),%rdi # 36b43a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444948,15 +444948,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36928900(%rip),%rdi # 36b42a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff0>\n+\tlea 0x36929900(%rip),%rdi # 36b43a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -444997,15 +444997,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369287e6(%rip),%rdi # 36b42a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff8>\n+\tlea 0x369297e6(%rip),%rdi # 36b43a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445046,15 +445046,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369286ce(%rip),%rdi # 36b42a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2000>\n+\tlea 0x369296ce(%rip),%rdi # 36b43a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2000>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445115,15 +445115,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36928518(%rip),%rdi # 36b42a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2008>\n+\tlea 0x36929518(%rip),%rdi # 36b43a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2008>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445184,15 +445184,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36928360(%rip),%rdi # 36b42a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2010>\n+\tlea 0x36929360(%rip),%rdi # 36b43a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2010>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445233,15 +445233,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36928246(%rip),%rdi # 36b42a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2018>\n+\tlea 0x36929246(%rip),%rdi # 36b43a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2018>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445282,15 +445282,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3692812e(%rip),%rdi # 36b42a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2020>\n+\tlea 0x3692912e(%rip),%rdi # 36b43a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2020>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445351,15 +445351,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36927f78(%rip),%rdi # 36b42a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2028>\n+\tlea 0x36928f78(%rip),%rdi # 36b43a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2028>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445420,15 +445420,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36927dc0(%rip),%rdi # 36b42a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2030>\n+\tlea 0x36928dc0(%rip),%rdi # 36b43a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2030>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445469,15 +445469,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36927ca6(%rip),%rdi # 36b42a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2038>\n+\tlea 0x36928ca6(%rip),%rdi # 36b43a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2038>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -445518,696 +445518,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36927b8e(%rip),%rdi # 36b42a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2040>\n+\tlea 0x36928b8e(%rip),%rdi # 36b43a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2040>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3692b57c(%rip),%rbx # 36b46498 ::get_beta()::val@@Base+0x180>\n+\tmov 0x3692c57c(%rip),%rbx # 36b47498 ::get_beta()::val@@Base+0x180>\n \ttest %rbx,%rbx\n \tjne 21af37 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x3692a740(%rip),%rdi # 36b45668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c30>\n+\tlea 0x3692b740(%rip),%rdi # 36b46668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c30>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3692b561(%rip) # 36b46498 ::get_beta()::val@@Base+0x180>\n+\tmov %rax,0x3692c561(%rip) # 36b47498 ::get_beta()::val@@Base+0x180>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927936(%rip),%rsi # 36b42880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e48>\n+\tlea 0x36928936(%rip),%rsi # 36b43880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e48>\n \tlea 0xe46b3(%rip),%rcx # 2ff604 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25394>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927910(%rip),%rsi # 36b42888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e50>\n+\tlea 0x36928910(%rip),%rsi # 36b43888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e50>\n \tlea 0xe46d1(%rip),%rcx # 2ff650 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x253e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369278ea(%rip),%rsi # 36b42890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e58>\n+\tlea 0x369288ea(%rip),%rsi # 36b43890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e58>\n \tlea 0xe46ef(%rip),%rcx # 2ff69c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2542c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369278c4(%rip),%rsi # 36b42898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e60>\n+\tlea 0x369288c4(%rip),%rsi # 36b43898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e60>\n \tlea 0xe470f(%rip),%rcx # 2ff6ea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2547a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692789e(%rip),%rsi # 36b428a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e68>\n+\tlea 0x3692889e(%rip),%rsi # 36b438a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e68>\n \tlea 0xe472f(%rip),%rcx # 2ff738 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x254c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927878(%rip),%rsi # 36b428a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e70>\n+\tlea 0x36928878(%rip),%rsi # 36b438a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e70>\n \tlea 0xe474e(%rip),%rcx # 2ff785 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25515>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927852(%rip),%rsi # 36b428b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e78>\n+\tlea 0x36928852(%rip),%rsi # 36b438b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e78>\n \tlea 0xe476d(%rip),%rcx # 2ff7d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25562>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692782c(%rip),%rsi # 36b428b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e80>\n+\tlea 0x3692882c(%rip),%rsi # 36b438b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e80>\n \tlea 0xe478e(%rip),%rcx # 2ff821 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x255b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927806(%rip),%rsi # 36b428c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e88>\n+\tlea 0x36928806(%rip),%rsi # 36b438c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e88>\n \tlea 0xe47af(%rip),%rcx # 2ff870 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25600>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369277e0(%rip),%rsi # 36b428c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e90>\n+\tlea 0x369287e0(%rip),%rsi # 36b438c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e90>\n \tlea 0xe47ce(%rip),%rcx # 2ff8bd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2564d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369277ba(%rip),%rsi # 36b428d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e98>\n+\tlea 0x369287ba(%rip),%rsi # 36b438d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e98>\n \tlea 0xe47ed(%rip),%rcx # 2ff90a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2569a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927794(%rip),%rsi # 36b428d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea0>\n+\tlea 0x36928794(%rip),%rsi # 36b438d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea0>\n \tlea 0xe480e(%rip),%rcx # 2ff959 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x256e9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692776e(%rip),%rsi # 36b428e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea8>\n+\tlea 0x3692876e(%rip),%rsi # 36b438e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea8>\n \tlea 0xe482f(%rip),%rcx # 2ff9a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25738>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927748(%rip),%rsi # 36b428e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb0>\n+\tlea 0x36928748(%rip),%rsi # 36b438e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb0>\n \tlea 0xe484e(%rip),%rcx # 2ff9f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25785>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927722(%rip),%rsi # 36b428f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb8>\n+\tlea 0x36928722(%rip),%rsi # 36b438f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb8>\n \tlea 0xe486d(%rip),%rcx # 2ffa42 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x257d2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369276fc(%rip),%rsi # 36b428f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec0>\n+\tlea 0x369286fc(%rip),%rsi # 36b438f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec0>\n \tlea 0xe488e(%rip),%rcx # 2ffa91 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25821>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369276d6(%rip),%rsi # 36b42900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec8>\n+\tlea 0x369286d6(%rip),%rsi # 36b43900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec8>\n \tlea 0xe48af(%rip),%rcx # 2ffae0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25870>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369276b0(%rip),%rsi # 36b42908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed0>\n+\tlea 0x369286b0(%rip),%rsi # 36b43908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed0>\n \tlea 0xe48ce(%rip),%rcx # 2ffb2d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x258bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692768a(%rip),%rsi # 36b42910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed8>\n+\tlea 0x3692868a(%rip),%rsi # 36b43910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed8>\n \tlea 0xe48ed(%rip),%rcx # 2ffb7a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2590a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927664(%rip),%rsi # 36b42918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee0>\n+\tlea 0x36928664(%rip),%rsi # 36b43918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee0>\n \tlea 0xe490e(%rip),%rcx # 2ffbc9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25959>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692763e(%rip),%rsi # 36b42920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee8>\n+\tlea 0x3692863e(%rip),%rsi # 36b43920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee8>\n \tlea 0xe492f(%rip),%rcx # 2ffc18 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x259a8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927618(%rip),%rsi # 36b42928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef0>\n+\tlea 0x36928618(%rip),%rsi # 36b43928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef0>\n \tlea 0xe494e(%rip),%rcx # 2ffc65 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x259f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369275f2(%rip),%rsi # 36b42930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef8>\n+\tlea 0x369285f2(%rip),%rsi # 36b43930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef8>\n \tlea 0xe496d(%rip),%rcx # 2ffcb2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25a42>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369275cc(%rip),%rsi # 36b42938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f00>\n+\tlea 0x369285cc(%rip),%rsi # 36b43938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f00>\n \tlea 0xe498e(%rip),%rcx # 2ffd01 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25a91>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369275a6(%rip),%rsi # 36b42940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f08>\n+\tlea 0x369285a6(%rip),%rsi # 36b43940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f08>\n \tlea 0xe49af(%rip),%rcx # 2ffd50 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25ae0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927580(%rip),%rsi # 36b42948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f10>\n+\tlea 0x36928580(%rip),%rsi # 36b43948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f10>\n \tlea 0xe49ce(%rip),%rcx # 2ffd9d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25b2d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692755a(%rip),%rsi # 36b42950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f18>\n+\tlea 0x3692855a(%rip),%rsi # 36b43950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f18>\n \tlea 0xe49ed(%rip),%rcx # 2ffdea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25b7a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927534(%rip),%rsi # 36b42958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f20>\n+\tlea 0x36928534(%rip),%rsi # 36b43958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f20>\n \tlea 0xe4a0e(%rip),%rcx # 2ffe39 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25bc9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692750e(%rip),%rsi # 36b42960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f28>\n+\tlea 0x3692850e(%rip),%rsi # 36b43960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f28>\n \tlea 0xe4a2f(%rip),%rcx # 2ffe88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25c18>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369274e8(%rip),%rsi # 36b42968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f30>\n+\tlea 0x369284e8(%rip),%rsi # 36b43968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f30>\n \tlea 0xe4a4e(%rip),%rcx # 2ffed5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25c65>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369274c2(%rip),%rsi # 36b42970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f38>\n+\tlea 0x369284c2(%rip),%rsi # 36b43970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f38>\n \tlea 0xe4a6d(%rip),%rcx # 2fff22 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25cb2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692749c(%rip),%rsi # 36b42978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f40>\n+\tlea 0x3692849c(%rip),%rsi # 36b43978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f40>\n \tlea 0xe4a8e(%rip),%rcx # 2fff71 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25d01>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927476(%rip),%rsi # 36b42980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f48>\n+\tlea 0x36928476(%rip),%rsi # 36b43980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f48>\n \tlea 0xe4aaf(%rip),%rcx # 2fffc0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25d50>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927450(%rip),%rsi # 36b42988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f50>\n+\tlea 0x36928450(%rip),%rsi # 36b43988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f50>\n \tlea 0xe4ace(%rip),%rcx # 30000d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25d9d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692742a(%rip),%rsi # 36b42990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f58>\n+\tlea 0x3692842a(%rip),%rsi # 36b43990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f58>\n \tlea 0xe4aed(%rip),%rcx # 30005a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25dea>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927404(%rip),%rsi # 36b42998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f60>\n+\tlea 0x36928404(%rip),%rsi # 36b43998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f60>\n \tlea 0xe4b0e(%rip),%rcx # 3000a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25e39>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369273de(%rip),%rsi # 36b429a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f68>\n+\tlea 0x369283de(%rip),%rsi # 36b439a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f68>\n \tlea 0xe4b2f(%rip),%rcx # 3000f8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25e88>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369273b8(%rip),%rsi # 36b429a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f70>\n+\tlea 0x369283b8(%rip),%rsi # 36b439a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f70>\n \tlea 0xe4b4e(%rip),%rcx # 300145 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25ed5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927392(%rip),%rsi # 36b429b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f78>\n+\tlea 0x36928392(%rip),%rsi # 36b439b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f78>\n \tlea 0xe4b6d(%rip),%rcx # 300192 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25f22>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692736c(%rip),%rsi # 36b429b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f80>\n+\tlea 0x3692836c(%rip),%rsi # 36b439b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f80>\n \tlea 0xe4b8e(%rip),%rcx # 3001e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25f71>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927346(%rip),%rsi # 36b429c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f88>\n+\tlea 0x36928346(%rip),%rsi # 36b439c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f88>\n \tlea 0xe4baf(%rip),%rcx # 300230 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x25fc0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927320(%rip),%rsi # 36b429c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f90>\n+\tlea 0x36928320(%rip),%rsi # 36b439c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f90>\n \tlea 0xe4bce(%rip),%rcx # 30027d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2600d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369272fa(%rip),%rsi # 36b429d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f98>\n+\tlea 0x369282fa(%rip),%rsi # 36b439d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f98>\n \tlea 0xe4bed(%rip),%rcx # 3002ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2605a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369272d4(%rip),%rsi # 36b429d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa0>\n+\tlea 0x369282d4(%rip),%rsi # 36b439d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa0>\n \tlea 0xe4c0e(%rip),%rcx # 300319 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x260a9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369272ae(%rip),%rsi # 36b429e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa8>\n+\tlea 0x369282ae(%rip),%rsi # 36b439e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa8>\n \tlea 0xe4c2f(%rip),%rcx # 300368 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x260f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927288(%rip),%rsi # 36b429e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb0>\n+\tlea 0x36928288(%rip),%rsi # 36b439e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb0>\n \tlea 0xe4c4e(%rip),%rcx # 3003b5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26145>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927262(%rip),%rsi # 36b429f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb8>\n+\tlea 0x36928262(%rip),%rsi # 36b439f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb8>\n \tlea 0xe4c6d(%rip),%rcx # 300402 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26192>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3692723c(%rip),%rsi # 36b429f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc0>\n+\tlea 0x3692823c(%rip),%rsi # 36b439f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc0>\n \tlea 0xe4c8e(%rip),%rcx # 300451 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x261e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36927216(%rip),%rsi # 36b42a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc8>\n+\tlea 0x36928216(%rip),%rsi # 36b43a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc8>\n \tlea 0xe4caf(%rip),%rcx # 3004a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26230>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369271f0(%rip),%rsi # 36b42a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd0>\n+\tlea 0x369281f0(%rip),%rsi # 36b43a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd0>\n \tlea 0xe4ccf(%rip),%rcx # 3004ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2627e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369271ca(%rip),%rsi # 36b42a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd8>\n+\tlea 0x369281ca(%rip),%rsi # 36b43a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd8>\n \tlea 0xe4cef(%rip),%rcx # 30053c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x262cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369271a4(%rip),%rsi # 36b42a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe0>\n+\tlea 0x369281a4(%rip),%rsi # 36b43a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe0>\n \tlea 0xe4d11(%rip),%rcx # 30058c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2631c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36927167(%rip),%rsi # 36b42a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe8>\n+\tlea 0x36928167(%rip),%rsi # 36b43a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe8>\n \tlea 0xe4d1c(%rip),%rcx # 3005dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2636c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3692712a(%rip),%rsi # 36b42a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff0>\n+\tlea 0x3692812a(%rip),%rsi # 36b43a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff0>\n \tlea 0xe4d25(%rip),%rcx # 30062a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x263ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369270ed(%rip),%rsi # 36b42a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff8>\n+\tlea 0x369280ed(%rip),%rsi # 36b43a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff8>\n \tlea 0xe4d2e(%rip),%rcx # 300678 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26408>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369270b0(%rip),%rsi # 36b42a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2000>\n+\tlea 0x369280b0(%rip),%rsi # 36b43a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2000>\n \tlea 0xe4d39(%rip),%rcx # 3006c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26458>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36927073(%rip),%rsi # 36b42a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2008>\n+\tlea 0x36928073(%rip),%rsi # 36b43a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2008>\n \tlea 0xe4d44(%rip),%rcx # 300718 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x264a8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36927036(%rip),%rsi # 36b42a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2010>\n+\tlea 0x36928036(%rip),%rsi # 36b43a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2010>\n \tlea 0xe4d4d(%rip),%rcx # 300766 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x264f6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36926ff9(%rip),%rsi # 36b42a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2018>\n+\tlea 0x36927ff9(%rip),%rsi # 36b43a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2018>\n \tlea 0xe4d56(%rip),%rcx # 3007b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26544>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36926fbc(%rip),%rsi # 36b42a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2020>\n+\tlea 0x36927fbc(%rip),%rsi # 36b43a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2020>\n \tlea 0xe4d61(%rip),%rcx # 300804 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26594>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36926f7f(%rip),%rsi # 36b42a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2028>\n+\tlea 0x36927f7f(%rip),%rsi # 36b43a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2028>\n \tlea 0xe4d6c(%rip),%rcx # 300854 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x265e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36926f42(%rip),%rsi # 36b42a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2030>\n+\tlea 0x36927f42(%rip),%rsi # 36b43a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2030>\n \tlea 0xe4d75(%rip),%rcx # 3008a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26632>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36926f05(%rip),%rsi # 36b42a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2038>\n+\tlea 0x36927f05(%rip),%rsi # 36b43a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2038>\n \tlea 0xe4d7e(%rip),%rcx # 3008f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26680>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36926ec8(%rip),%rsi # 36b42a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2040>\n+\tlea 0x36927ec8(%rip),%rsi # 36b43a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2040>\n \tlea 0xe4d89(%rip),%rcx # 300940 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x266d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 21bbe0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x3692a8b1(%rip),%rdi # 36b46498 ::get_beta()::val@@Base+0x180>\n+\tmov 0x3692b8b1(%rip),%rdi # 36b47498 ::get_beta()::val@@Base+0x180>\n \ttest %rdi,%rdi\n \tje 21bc01 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3692a89b(%rip) # 36b46498 ::get_beta()::val@@Base+0x180>\n+\tmovq $0x0,0x3692b89b(%rip) # 36b47498 ::get_beta()::val@@Base+0x180>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000021bc10 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)10>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -449820,15 +449820,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36924199(%rip),%rdi # 36b42a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2020>\n+\tlea 0x36925199(%rip),%rdi # 36b43a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2020>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 21ebaf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -449964,15 +449964,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36923ec0(%rip),%rdi # 36b42a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2018>\n+\tlea 0x36924ec0(%rip),%rdi # 36b43a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2018>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -450123,15 +450123,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36923b63(%rip),%rdi # 36b429f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc0>\n+\tlea 0x36924b63(%rip),%rdi # 36b439f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 21f185 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -450267,15 +450267,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692388a(%rip),%rdi # 36b429f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb8>\n+\tlea 0x3692488a(%rip),%rdi # 36b439f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -450426,15 +450426,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369234ad(%rip),%rdi # 36b42918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee0>\n+\tlea 0x369244ad(%rip),%rdi # 36b43918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ee0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 21f75b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -450570,15 +450570,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369231d4(%rip),%rdi # 36b42910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed8>\n+\tlea 0x369241d4(%rip),%rdi # 36b43910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ed8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -450729,15 +450729,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36922fd7(%rip),%rdi # 36b42a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe0>\n+\tlea 0x36923fd7(%rip),%rdi # 36b43a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fe0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 21fd31 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -450873,15 +450873,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36922cfe(%rip),%rdi # 36b42a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd8>\n+\tlea 0x36923cfe(%rip),%rdi # 36b43a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -451032,15 +451032,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369229a1(%rip),%rdi # 36b429b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f80>\n+\tlea 0x369239a1(%rip),%rdi # 36b439b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 220307 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -451176,15 +451176,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369226c8(%rip),%rdi # 36b429b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f78>\n+\tlea 0x369236c8(%rip),%rdi # 36b439b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -451335,15 +451335,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369222eb(%rip),%rdi # 36b428d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea0>\n+\tlea 0x369232eb(%rip),%rdi # 36b438d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ea0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2208dd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -451479,15 +451479,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36922012(%rip),%rdi # 36b428d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e98>\n+\tlea 0x36923012(%rip),%rdi # 36b438d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -451638,15 +451638,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36921eb5(%rip),%rdi # 36b42a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2040>\n+\tlea 0x36922eb5(%rip),%rdi # 36b43a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2040>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 220eb3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -451782,15 +451782,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36921bdc(%rip),%rdi # 36b42a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2038>\n+\tlea 0x36922bdc(%rip),%rdi # 36b43a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2038>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -451941,15 +451941,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3692175f(%rip),%rdi # 36b428f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec0>\n+\tlea 0x3692275f(%rip),%rdi # 36b438f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ec0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 221489 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -452085,15 +452085,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36921486(%rip),%rdi # 36b428f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb8>\n+\tlea 0x36922486(%rip),%rdi # 36b438f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1eb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -452244,15 +452244,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36921209(%rip),%rdi # 36b42978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f40>\n+\tlea 0x36922209(%rip),%rdi # 36b43978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 221a5f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -452388,15 +452388,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36920f30(%rip),%rdi # 36b42970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f38>\n+\tlea 0x36921f30(%rip),%rdi # 36b43970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -452547,15 +452547,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36920b53(%rip),%rdi # 36b42898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e60>\n+\tlea 0x36921b53(%rip),%rdi # 36b43898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 222316 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -452697,15 +452697,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36920892(%rip),%rdi # 36b428b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e80>\n+\tlea 0x36921892(%rip),%rdi # 36b438b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 22260b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -452841,15 +452841,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36920599(%rip),%rdi # 36b42890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e58>\n+\tlea 0x36921599(%rip),%rdi # 36b43890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -452994,15 +452994,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369202c4(%rip),%rdi # 36b428b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e78>\n+\tlea 0x369212c4(%rip),%rdi # 36b438b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1e78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -453153,15 +453153,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36920047(%rip),%rdi # 36b42938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f00>\n+\tlea 0x36921047(%rip),%rdi # 36b43938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 222be1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -453297,15 +453297,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691fd6e(%rip),%rdi # 36b42930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef8>\n+\tlea 0x36920d6e(%rip),%rdi # 36b43930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ef8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -453456,15 +453456,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691fb71(%rip),%rdi # 36b42a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2000>\n+\tlea 0x36920b71(%rip),%rdi # 36b43a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2000>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2231b7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -453600,15 +453600,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691f898(%rip),%rdi # 36b42a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff8>\n+\tlea 0x36920898(%rip),%rdi # 36b43a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1ff8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -453759,15 +453759,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691f4bb(%rip),%rdi # 36b42958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f20>\n+\tlea 0x369204bb(%rip),%rdi # 36b43958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 22378d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -453903,15 +453903,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691f1e2(%rip),%rdi # 36b42950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f18>\n+\tlea 0x369201e2(%rip),%rdi # 36b43950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -454062,15 +454062,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691ef65(%rip),%rdi # 36b429d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa0>\n+\tlea 0x3691ff65(%rip),%rdi # 36b439d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1fa0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 223d63 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -454206,15 +454206,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691ec8c(%rip),%rdi # 36b429d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f98>\n+\tlea 0x3691fc8c(%rip),%rdi # 36b439d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -454365,15 +454365,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691e94f(%rip),%rdi # 36b42998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f60>\n+\tlea 0x3691f94f(%rip),%rdi # 36b43998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 224339 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -454509,15 +454509,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691e676(%rip),%rdi # 36b42990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f58>\n+\tlea 0x3691f676(%rip),%rdi # 36b43990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x1f58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -456360,15 +456360,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 218110 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 225b8d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x3691f387(%rip),%rax \n+\tmov 0x36920387(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0xcfc88(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0xcfc87(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -456658,15 +456658,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691c8e8(%rip),%rdi # 36b42a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2048>\n+\tlea 0x3691d8e8(%rip),%rdi # 36b43a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2048>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -456727,15 +456727,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691c730(%rip),%rdi # 36b42a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2050>\n+\tlea 0x3691d730(%rip),%rdi # 36b43a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2050>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -456776,15 +456776,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691c616(%rip),%rdi # 36b42a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2058>\n+\tlea 0x3691d616(%rip),%rdi # 36b43a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2058>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -456825,15 +456825,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691c4fe(%rip),%rdi # 36b42a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2060>\n+\tlea 0x3691d4fe(%rip),%rdi # 36b43a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2060>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -456894,15 +456894,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691c348(%rip),%rdi # 36b42aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2068>\n+\tlea 0x3691d348(%rip),%rdi # 36b43aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2068>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -456963,15 +456963,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691c190(%rip),%rdi # 36b42aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2070>\n+\tlea 0x3691d190(%rip),%rdi # 36b43aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2070>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457012,15 +457012,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691c076(%rip),%rdi # 36b42ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2078>\n+\tlea 0x3691d076(%rip),%rdi # 36b43ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2078>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457061,15 +457061,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691bf5e(%rip),%rdi # 36b42ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2080>\n+\tlea 0x3691cf5e(%rip),%rdi # 36b43ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2080>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457130,15 +457130,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691bda8(%rip),%rdi # 36b42ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2088>\n+\tlea 0x3691cda8(%rip),%rdi # 36b43ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2088>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457199,15 +457199,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691bbf0(%rip),%rdi # 36b42ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2090>\n+\tlea 0x3691cbf0(%rip),%rdi # 36b43ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2090>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457248,15 +457248,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691bad6(%rip),%rdi # 36b42ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2098>\n+\tlea 0x3691cad6(%rip),%rdi # 36b43ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2098>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457297,15 +457297,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691b9be(%rip),%rdi # 36b42ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a0>\n+\tlea 0x3691c9be(%rip),%rdi # 36b43ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457366,15 +457366,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691b808(%rip),%rdi # 36b42ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a8>\n+\tlea 0x3691c808(%rip),%rdi # 36b43ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457435,15 +457435,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691b650(%rip),%rdi # 36b42ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b0>\n+\tlea 0x3691c650(%rip),%rdi # 36b43ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457484,15 +457484,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691b536(%rip),%rdi # 36b42af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b8>\n+\tlea 0x3691c536(%rip),%rdi # 36b43af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457533,15 +457533,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691b41e(%rip),%rdi # 36b42af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c0>\n+\tlea 0x3691c41e(%rip),%rdi # 36b43af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457602,15 +457602,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691b268(%rip),%rdi # 36b42b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c8>\n+\tlea 0x3691c268(%rip),%rdi # 36b43b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457671,15 +457671,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691b0b0(%rip),%rdi # 36b42b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d0>\n+\tlea 0x3691c0b0(%rip),%rdi # 36b43b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457720,15 +457720,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691af96(%rip),%rdi # 36b42b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d8>\n+\tlea 0x3691bf96(%rip),%rdi # 36b43b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457769,15 +457769,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691ae7e(%rip),%rdi # 36b42b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e0>\n+\tlea 0x3691be7e(%rip),%rdi # 36b43b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457838,15 +457838,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691acc8(%rip),%rdi # 36b42b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e8>\n+\tlea 0x3691bcc8(%rip),%rdi # 36b43b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457907,15 +457907,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691ab10(%rip),%rdi # 36b42b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f0>\n+\tlea 0x3691bb10(%rip),%rdi # 36b43b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -457956,15 +457956,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691a9f6(%rip),%rdi # 36b42b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f8>\n+\tlea 0x3691b9f6(%rip),%rdi # 36b43b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458005,15 +458005,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691a8de(%rip),%rdi # 36b42b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2100>\n+\tlea 0x3691b8de(%rip),%rdi # 36b43b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2100>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458074,15 +458074,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691a728(%rip),%rdi # 36b42b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2108>\n+\tlea 0x3691b728(%rip),%rdi # 36b43b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2108>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458143,15 +458143,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691a570(%rip),%rdi # 36b42b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2110>\n+\tlea 0x3691b570(%rip),%rdi # 36b43b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2110>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458192,15 +458192,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691a456(%rip),%rdi # 36b42b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2118>\n+\tlea 0x3691b456(%rip),%rdi # 36b43b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2118>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458241,15 +458241,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691a33e(%rip),%rdi # 36b42b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2120>\n+\tlea 0x3691b33e(%rip),%rdi # 36b43b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2120>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458310,15 +458310,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3691a188(%rip),%rdi # 36b42b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2128>\n+\tlea 0x3691b188(%rip),%rdi # 36b43b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2128>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458379,15 +458379,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36919fd0(%rip),%rdi # 36b42b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2130>\n+\tlea 0x3691afd0(%rip),%rdi # 36b43b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2130>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458428,15 +458428,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36919eb6(%rip),%rdi # 36b42b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2138>\n+\tlea 0x3691aeb6(%rip),%rdi # 36b43b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2138>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458477,15 +458477,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36919d9e(%rip),%rdi # 36b42b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2140>\n+\tlea 0x3691ad9e(%rip),%rdi # 36b43b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2140>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458546,15 +458546,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36919be8(%rip),%rdi # 36b42b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2148>\n+\tlea 0x3691abe8(%rip),%rdi # 36b43b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2148>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458615,15 +458615,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36919a30(%rip),%rdi # 36b42b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2150>\n+\tlea 0x3691aa30(%rip),%rdi # 36b43b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2150>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458664,15 +458664,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36919916(%rip),%rdi # 36b42b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2158>\n+\tlea 0x3691a916(%rip),%rdi # 36b43b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2158>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458713,15 +458713,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369197fe(%rip),%rdi # 36b42b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2160>\n+\tlea 0x3691a7fe(%rip),%rdi # 36b43b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2160>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458782,15 +458782,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36919648(%rip),%rdi # 36b42ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2168>\n+\tlea 0x3691a648(%rip),%rdi # 36b43ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2168>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458851,15 +458851,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36919490(%rip),%rdi # 36b42ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2170>\n+\tlea 0x3691a490(%rip),%rdi # 36b43ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2170>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458900,15 +458900,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36919376(%rip),%rdi # 36b42bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2178>\n+\tlea 0x3691a376(%rip),%rdi # 36b43bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2178>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -458949,15 +458949,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691925e(%rip),%rdi # 36b42bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2180>\n+\tlea 0x3691a25e(%rip),%rdi # 36b43bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2180>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459018,15 +459018,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369190a8(%rip),%rdi # 36b42bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2188>\n+\tlea 0x3691a0a8(%rip),%rdi # 36b43bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2188>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459087,15 +459087,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36918ef0(%rip),%rdi # 36b42bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2190>\n+\tlea 0x36919ef0(%rip),%rdi # 36b43bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2190>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459136,15 +459136,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36918dd6(%rip),%rdi # 36b42bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2198>\n+\tlea 0x36919dd6(%rip),%rdi # 36b43bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2198>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459185,15 +459185,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36918cbe(%rip),%rdi # 36b42bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a0>\n+\tlea 0x36919cbe(%rip),%rdi # 36b43bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459254,15 +459254,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36918b08(%rip),%rdi # 36b42be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a8>\n+\tlea 0x36919b08(%rip),%rdi # 36b43be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459323,15 +459323,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36918950(%rip),%rdi # 36b42be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b0>\n+\tlea 0x36919950(%rip),%rdi # 36b43be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459372,15 +459372,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36918836(%rip),%rdi # 36b42bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b8>\n+\tlea 0x36919836(%rip),%rdi # 36b43bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459421,15 +459421,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691871e(%rip),%rdi # 36b42bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c0>\n+\tlea 0x3691971e(%rip),%rdi # 36b43bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459490,15 +459490,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36918568(%rip),%rdi # 36b42c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c8>\n+\tlea 0x36919568(%rip),%rdi # 36b43c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459559,15 +459559,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369183b0(%rip),%rdi # 36b42c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d0>\n+\tlea 0x369193b0(%rip),%rdi # 36b43c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459608,15 +459608,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36918296(%rip),%rdi # 36b42c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d8>\n+\tlea 0x36919296(%rip),%rdi # 36b43c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459657,15 +459657,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691817e(%rip),%rdi # 36b42c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e0>\n+\tlea 0x3691917e(%rip),%rdi # 36b43c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459726,15 +459726,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36917fc8(%rip),%rdi # 36b42c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e8>\n+\tlea 0x36918fc8(%rip),%rdi # 36b43c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459795,15 +459795,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36917e10(%rip),%rdi # 36b42c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f0>\n+\tlea 0x36918e10(%rip),%rdi # 36b43c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459844,15 +459844,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36917cf6(%rip),%rdi # 36b42c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f8>\n+\tlea 0x36918cf6(%rip),%rdi # 36b43c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459893,15 +459893,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36917bde(%rip),%rdi # 36b42c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2200>\n+\tlea 0x36918bde(%rip),%rdi # 36b43c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2200>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -459962,15 +459962,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36917a28(%rip),%rdi # 36b42c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2208>\n+\tlea 0x36918a28(%rip),%rdi # 36b43c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2208>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460031,15 +460031,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36917870(%rip),%rdi # 36b42c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2210>\n+\tlea 0x36918870(%rip),%rdi # 36b43c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2210>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460080,15 +460080,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36917756(%rip),%rdi # 36b42c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2218>\n+\tlea 0x36918756(%rip),%rdi # 36b43c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2218>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460129,15 +460129,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691763e(%rip),%rdi # 36b42c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2220>\n+\tlea 0x3691863e(%rip),%rdi # 36b43c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2220>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460198,15 +460198,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36917488(%rip),%rdi # 36b42c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2228>\n+\tlea 0x36918488(%rip),%rdi # 36b43c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2228>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460267,15 +460267,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369172d0(%rip),%rdi # 36b42c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2230>\n+\tlea 0x369182d0(%rip),%rdi # 36b43c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2230>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460316,15 +460316,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369171b6(%rip),%rdi # 36b42c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2238>\n+\tlea 0x369181b6(%rip),%rdi # 36b43c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2238>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -460365,696 +460365,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3691709e(%rip),%rdi # 36b42c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2240>\n+\tlea 0x3691809e(%rip),%rdi # 36b43c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2240>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3691a894(%rip),%rbx # 36b464a0 ::get_beta()::val@@Base+0x188>\n+\tmov 0x3691b894(%rip),%rbx # 36b474a0 ::get_beta()::val@@Base+0x188>\n \ttest %rbx,%rbx\n \tjne 22bc27 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x36919a68(%rip),%rdi # 36b45680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c48>\n+\tlea 0x3691aa68(%rip),%rdi # 36b46680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c48>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3691a879(%rip) # 36b464a0 ::get_beta()::val@@Base+0x188>\n+\tmov %rax,0x3691b879(%rip) # 36b474a0 ::get_beta()::val@@Base+0x188>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916e46(%rip),%rsi # 36b42a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2048>\n+\tlea 0x36917e46(%rip),%rsi # 36b43a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2048>\n \tlea 0xd4d4f(%rip),%rcx # 300990 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26720>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916e20(%rip),%rsi # 36b42a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2050>\n+\tlea 0x36917e20(%rip),%rsi # 36b43a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2050>\n \tlea 0xd4d6d(%rip),%rcx # 3009dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2676c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916dfa(%rip),%rsi # 36b42a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2058>\n+\tlea 0x36917dfa(%rip),%rsi # 36b43a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2058>\n \tlea 0xd4d8b(%rip),%rcx # 300a28 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x267b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916dd4(%rip),%rsi # 36b42a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2060>\n+\tlea 0x36917dd4(%rip),%rsi # 36b43a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2060>\n \tlea 0xd4dab(%rip),%rcx # 300a76 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26806>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916dae(%rip),%rsi # 36b42aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2068>\n+\tlea 0x36917dae(%rip),%rsi # 36b43aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2068>\n \tlea 0xd4dcb(%rip),%rcx # 300ac4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26854>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916d88(%rip),%rsi # 36b42aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2070>\n+\tlea 0x36917d88(%rip),%rsi # 36b43aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2070>\n \tlea 0xd4dea(%rip),%rcx # 300b11 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x268a1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916d62(%rip),%rsi # 36b42ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2078>\n+\tlea 0x36917d62(%rip),%rsi # 36b43ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2078>\n \tlea 0xd4e09(%rip),%rcx # 300b5e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x268ee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916d3c(%rip),%rsi # 36b42ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2080>\n+\tlea 0x36917d3c(%rip),%rsi # 36b43ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2080>\n \tlea 0xd4e2a(%rip),%rcx # 300bad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2693d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916d16(%rip),%rsi # 36b42ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2088>\n+\tlea 0x36917d16(%rip),%rsi # 36b43ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2088>\n \tlea 0xd4e4b(%rip),%rcx # 300bfc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2698c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916cf0(%rip),%rsi # 36b42ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2090>\n+\tlea 0x36917cf0(%rip),%rsi # 36b43ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2090>\n \tlea 0xd4e6a(%rip),%rcx # 300c49 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x269d9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916cca(%rip),%rsi # 36b42ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2098>\n+\tlea 0x36917cca(%rip),%rsi # 36b43ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2098>\n \tlea 0xd4e89(%rip),%rcx # 300c96 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26a26>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916ca4(%rip),%rsi # 36b42ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a0>\n+\tlea 0x36917ca4(%rip),%rsi # 36b43ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a0>\n \tlea 0xd4eaa(%rip),%rcx # 300ce5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26a75>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916c7e(%rip),%rsi # 36b42ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a8>\n+\tlea 0x36917c7e(%rip),%rsi # 36b43ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a8>\n \tlea 0xd4ecb(%rip),%rcx # 300d34 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26ac4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916c58(%rip),%rsi # 36b42ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b0>\n+\tlea 0x36917c58(%rip),%rsi # 36b43ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b0>\n \tlea 0xd4eea(%rip),%rcx # 300d81 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26b11>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916c32(%rip),%rsi # 36b42af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b8>\n+\tlea 0x36917c32(%rip),%rsi # 36b43af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b8>\n \tlea 0xd4f09(%rip),%rcx # 300dce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26b5e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916c0c(%rip),%rsi # 36b42af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c0>\n+\tlea 0x36917c0c(%rip),%rsi # 36b43af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c0>\n \tlea 0xd4f2a(%rip),%rcx # 300e1d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26bad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916be6(%rip),%rsi # 36b42b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c8>\n+\tlea 0x36917be6(%rip),%rsi # 36b43b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c8>\n \tlea 0xd4f4b(%rip),%rcx # 300e6c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26bfc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916bc0(%rip),%rsi # 36b42b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d0>\n+\tlea 0x36917bc0(%rip),%rsi # 36b43b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d0>\n \tlea 0xd4f6a(%rip),%rcx # 300eb9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26c49>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916b9a(%rip),%rsi # 36b42b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d8>\n+\tlea 0x36917b9a(%rip),%rsi # 36b43b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d8>\n \tlea 0xd4f89(%rip),%rcx # 300f06 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26c96>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916b74(%rip),%rsi # 36b42b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e0>\n+\tlea 0x36917b74(%rip),%rsi # 36b43b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e0>\n \tlea 0xd4faa(%rip),%rcx # 300f55 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26ce5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916b4e(%rip),%rsi # 36b42b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e8>\n+\tlea 0x36917b4e(%rip),%rsi # 36b43b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e8>\n \tlea 0xd4fcb(%rip),%rcx # 300fa4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26d34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916b28(%rip),%rsi # 36b42b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f0>\n+\tlea 0x36917b28(%rip),%rsi # 36b43b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f0>\n \tlea 0xd4fea(%rip),%rcx # 300ff1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26d81>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916b02(%rip),%rsi # 36b42b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f8>\n+\tlea 0x36917b02(%rip),%rsi # 36b43b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f8>\n \tlea 0xd5009(%rip),%rcx # 30103e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26dce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916adc(%rip),%rsi # 36b42b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2100>\n+\tlea 0x36917adc(%rip),%rsi # 36b43b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2100>\n \tlea 0xd502a(%rip),%rcx # 30108d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26e1d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916ab6(%rip),%rsi # 36b42b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2108>\n+\tlea 0x36917ab6(%rip),%rsi # 36b43b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2108>\n \tlea 0xd504b(%rip),%rcx # 3010dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26e6c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916a90(%rip),%rsi # 36b42b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2110>\n+\tlea 0x36917a90(%rip),%rsi # 36b43b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2110>\n \tlea 0xd506a(%rip),%rcx # 301129 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26eb9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916a6a(%rip),%rsi # 36b42b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2118>\n+\tlea 0x36917a6a(%rip),%rsi # 36b43b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2118>\n \tlea 0xd5089(%rip),%rcx # 301176 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26f06>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916a44(%rip),%rsi # 36b42b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2120>\n+\tlea 0x36917a44(%rip),%rsi # 36b43b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2120>\n \tlea 0xd50aa(%rip),%rcx # 3011c5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26f55>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916a1e(%rip),%rsi # 36b42b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2128>\n+\tlea 0x36917a1e(%rip),%rsi # 36b43b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2128>\n \tlea 0xd50cb(%rip),%rcx # 301214 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26fa4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369169f8(%rip),%rsi # 36b42b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2130>\n+\tlea 0x369179f8(%rip),%rsi # 36b43b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2130>\n \tlea 0xd50ea(%rip),%rcx # 301261 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x26ff1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369169d2(%rip),%rsi # 36b42b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2138>\n+\tlea 0x369179d2(%rip),%rsi # 36b43b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2138>\n \tlea 0xd5109(%rip),%rcx # 3012ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2703e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369169ac(%rip),%rsi # 36b42b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2140>\n+\tlea 0x369179ac(%rip),%rsi # 36b43b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2140>\n \tlea 0xd512a(%rip),%rcx # 3012fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2708d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916986(%rip),%rsi # 36b42b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2148>\n+\tlea 0x36917986(%rip),%rsi # 36b43b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2148>\n \tlea 0xd514b(%rip),%rcx # 30134c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x270dc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916960(%rip),%rsi # 36b42b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2150>\n+\tlea 0x36917960(%rip),%rsi # 36b43b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2150>\n \tlea 0xd516a(%rip),%rcx # 301399 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27129>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3691693a(%rip),%rsi # 36b42b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2158>\n+\tlea 0x3691793a(%rip),%rsi # 36b43b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2158>\n \tlea 0xd5189(%rip),%rcx # 3013e6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27176>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916914(%rip),%rsi # 36b42b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2160>\n+\tlea 0x36917914(%rip),%rsi # 36b43b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2160>\n \tlea 0xd51aa(%rip),%rcx # 301435 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x271c5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369168ee(%rip),%rsi # 36b42ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2168>\n+\tlea 0x369178ee(%rip),%rsi # 36b43ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2168>\n \tlea 0xd51cb(%rip),%rcx # 301484 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27214>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369168c8(%rip),%rsi # 36b42ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2170>\n+\tlea 0x369178c8(%rip),%rsi # 36b43ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2170>\n \tlea 0xd51ea(%rip),%rcx # 3014d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27261>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369168a2(%rip),%rsi # 36b42bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2178>\n+\tlea 0x369178a2(%rip),%rsi # 36b43bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2178>\n \tlea 0xd5209(%rip),%rcx # 30151e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x272ae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3691687c(%rip),%rsi # 36b42bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2180>\n+\tlea 0x3691787c(%rip),%rsi # 36b43bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2180>\n \tlea 0xd522a(%rip),%rcx # 30156d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x272fd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916856(%rip),%rsi # 36b42bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2188>\n+\tlea 0x36917856(%rip),%rsi # 36b43bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2188>\n \tlea 0xd524b(%rip),%rcx # 3015bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2734c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916830(%rip),%rsi # 36b42bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2190>\n+\tlea 0x36917830(%rip),%rsi # 36b43bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2190>\n \tlea 0xd526a(%rip),%rcx # 301609 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27399>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3691680a(%rip),%rsi # 36b42bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2198>\n+\tlea 0x3691780a(%rip),%rsi # 36b43bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2198>\n \tlea 0xd5289(%rip),%rcx # 301656 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x273e6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369167e4(%rip),%rsi # 36b42bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a0>\n+\tlea 0x369177e4(%rip),%rsi # 36b43bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a0>\n \tlea 0xd52aa(%rip),%rcx # 3016a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27435>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369167be(%rip),%rsi # 36b42be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a8>\n+\tlea 0x369177be(%rip),%rsi # 36b43be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a8>\n \tlea 0xd52cb(%rip),%rcx # 3016f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27484>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916798(%rip),%rsi # 36b42be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b0>\n+\tlea 0x36917798(%rip),%rsi # 36b43be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b0>\n \tlea 0xd52ea(%rip),%rcx # 301741 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x274d1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916772(%rip),%rsi # 36b42bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b8>\n+\tlea 0x36917772(%rip),%rsi # 36b43bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b8>\n \tlea 0xd5309(%rip),%rcx # 30178e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2751e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3691674c(%rip),%rsi # 36b42bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c0>\n+\tlea 0x3691774c(%rip),%rsi # 36b43bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c0>\n \tlea 0xd532a(%rip),%rcx # 3017dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2756d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916726(%rip),%rsi # 36b42c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c8>\n+\tlea 0x36917726(%rip),%rsi # 36b43c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c8>\n \tlea 0xd534b(%rip),%rcx # 30182c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x275bc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36916700(%rip),%rsi # 36b42c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d0>\n+\tlea 0x36917700(%rip),%rsi # 36b43c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d0>\n \tlea 0xd536b(%rip),%rcx # 30187a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2760a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369166da(%rip),%rsi # 36b42c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d8>\n+\tlea 0x369176da(%rip),%rsi # 36b43c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d8>\n \tlea 0xd538b(%rip),%rcx # 3018c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27658>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369166b4(%rip),%rsi # 36b42c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e0>\n+\tlea 0x369176b4(%rip),%rsi # 36b43c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e0>\n \tlea 0xd53ad(%rip),%rcx # 301918 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x276a8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36916677(%rip),%rsi # 36b42c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e8>\n+\tlea 0x36917677(%rip),%rsi # 36b43c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e8>\n \tlea 0xd53b8(%rip),%rcx # 301968 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x276f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3691663a(%rip),%rsi # 36b42c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f0>\n+\tlea 0x3691763a(%rip),%rsi # 36b43c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f0>\n \tlea 0xd53c1(%rip),%rcx # 3019b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27746>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369165fd(%rip),%rsi # 36b42c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f8>\n+\tlea 0x369175fd(%rip),%rsi # 36b43c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f8>\n \tlea 0xd53ca(%rip),%rcx # 301a04 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27794>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369165c0(%rip),%rsi # 36b42c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2200>\n+\tlea 0x369175c0(%rip),%rsi # 36b43c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2200>\n \tlea 0xd53d5(%rip),%rcx # 301a54 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x277e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36916583(%rip),%rsi # 36b42c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2208>\n+\tlea 0x36917583(%rip),%rsi # 36b43c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2208>\n \tlea 0xd53e0(%rip),%rcx # 301aa4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27834>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36916546(%rip),%rsi # 36b42c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2210>\n+\tlea 0x36917546(%rip),%rsi # 36b43c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2210>\n \tlea 0xd53e9(%rip),%rcx # 301af2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27882>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36916509(%rip),%rsi # 36b42c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2218>\n+\tlea 0x36917509(%rip),%rsi # 36b43c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2218>\n \tlea 0xd53f2(%rip),%rcx # 301b40 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x278d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369164cc(%rip),%rsi # 36b42c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2220>\n+\tlea 0x369174cc(%rip),%rsi # 36b43c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2220>\n \tlea 0xd53fd(%rip),%rcx # 301b90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27920>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3691648f(%rip),%rsi # 36b42c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2228>\n+\tlea 0x3691748f(%rip),%rsi # 36b43c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2228>\n \tlea 0xd5408(%rip),%rcx # 301be0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27970>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36916452(%rip),%rsi # 36b42c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2230>\n+\tlea 0x36917452(%rip),%rsi # 36b43c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2230>\n \tlea 0xd5411(%rip),%rcx # 301c2e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x279be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36916415(%rip),%rsi # 36b42c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2238>\n+\tlea 0x36917415(%rip),%rsi # 36b43c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2238>\n \tlea 0xd541a(%rip),%rcx # 301c7c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27a0c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369163d8(%rip),%rsi # 36b42c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2240>\n+\tlea 0x369173d8(%rip),%rsi # 36b43c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2240>\n \tlea 0xd5425(%rip),%rcx # 301ccc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27a5c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 22c8d0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36919bc9(%rip),%rdi # 36b464a0 ::get_beta()::val@@Base+0x188>\n+\tmov 0x3691abc9(%rip),%rdi # 36b474a0 ::get_beta()::val@@Base+0x188>\n \ttest %rdi,%rdi\n \tje 22c8f1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36919bb3(%rip) # 36b464a0 ::get_beta()::val@@Base+0x188>\n+\tmovq $0x0,0x3691abb3(%rip) # 36b474a0 ::get_beta()::val@@Base+0x188>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000022c900 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)11>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -464865,15 +464865,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36913549(%rip),%rdi # 36b42c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2220>\n+\tlea 0x36914549(%rip),%rdi # 36b43c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2220>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 22f9ff (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x30ff>\n \tmovabs $0x800000020,%rdx\n@@ -465009,15 +465009,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36913270(%rip),%rdi # 36b42c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2218>\n+\tlea 0x36914270(%rip),%rdi # 36b43c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2218>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -465168,15 +465168,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36912f13(%rip),%rdi # 36b42bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c0>\n+\tlea 0x36913f13(%rip),%rdi # 36b43bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 22ffd5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36d5>\n \tmovabs $0x800000020,%rdx\n@@ -465312,15 +465312,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36912c3a(%rip),%rdi # 36b42bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b8>\n+\tlea 0x36913c3a(%rip),%rdi # 36b43bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -465471,15 +465471,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691285d(%rip),%rdi # 36b42b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e0>\n+\tlea 0x3691385d(%rip),%rdi # 36b43b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2305ab (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3cab>\n \tmovabs $0x800000020,%rdx\n@@ -465615,15 +465615,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36912584(%rip),%rdi # 36b42b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d8>\n+\tlea 0x36913584(%rip),%rdi # 36b43b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -465774,15 +465774,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36912387(%rip),%rdi # 36b42c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e0>\n+\tlea 0x36913387(%rip),%rdi # 36b43c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 230b81 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4281>\n \tmovabs $0x800000020,%rdx\n@@ -465918,15 +465918,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369120ae(%rip),%rdi # 36b42c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d8>\n+\tlea 0x369130ae(%rip),%rdi # 36b43c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -466077,15 +466077,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36911d51(%rip),%rdi # 36b42bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2180>\n+\tlea 0x36912d51(%rip),%rdi # 36b43bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2180>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 231157 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4857>\n \tmovabs $0x800000020,%rdx\n@@ -466221,15 +466221,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36911a78(%rip),%rdi # 36b42bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2178>\n+\tlea 0x36912a78(%rip),%rdi # 36b43bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2178>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -466380,15 +466380,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3691169b(%rip),%rdi # 36b42ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a0>\n+\tlea 0x3691269b(%rip),%rdi # 36b43ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 23172d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4e2d>\n \tmovabs $0x800000020,%rdx\n@@ -466524,15 +466524,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369113c2(%rip),%rdi # 36b42ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2098>\n+\tlea 0x369123c2(%rip),%rdi # 36b43ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2098>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -466683,15 +466683,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36911265(%rip),%rdi # 36b42c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2240>\n+\tlea 0x36912265(%rip),%rdi # 36b43c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2240>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 231d03 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5403>\n \tmovabs $0x800000020,%rdx\n@@ -466827,15 +466827,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36910f8c(%rip),%rdi # 36b42c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2238>\n+\tlea 0x36911f8c(%rip),%rdi # 36b43c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2238>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -466986,15 +466986,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36910b0f(%rip),%rdi # 36b42af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c0>\n+\tlea 0x36911b0f(%rip),%rdi # 36b43af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2322d9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x59d9>\n \tmovabs $0x800000020,%rdx\n@@ -467130,15 +467130,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36910836(%rip),%rdi # 36b42af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b8>\n+\tlea 0x36911836(%rip),%rdi # 36b43af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -467289,15 +467289,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369105b9(%rip),%rdi # 36b42b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2140>\n+\tlea 0x369115b9(%rip),%rdi # 36b43b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2140>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2328af (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5faf>\n \tmovabs $0x800000020,%rdx\n@@ -467433,15 +467433,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369102e0(%rip),%rdi # 36b42b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2138>\n+\tlea 0x369112e0(%rip),%rdi # 36b43b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2138>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -467592,15 +467592,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690ff03(%rip),%rdi # 36b42a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2060>\n+\tlea 0x36910f03(%rip),%rdi # 36b43a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2060>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 233166 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6866>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -467742,15 +467742,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690fc42(%rip),%rdi # 36b42ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2080>\n+\tlea 0x36910c42(%rip),%rdi # 36b43ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2080>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 23345b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6b5b>\n \tmovabs $0x800000020,%rdx\n@@ -467886,15 +467886,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690f949(%rip),%rdi # 36b42a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2058>\n+\tlea 0x36910949(%rip),%rdi # 36b43a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2058>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -468039,15 +468039,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690f674(%rip),%rdi # 36b42ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2078>\n+\tlea 0x36910674(%rip),%rdi # 36b43ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2078>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -468198,15 +468198,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690f3f7(%rip),%rdi # 36b42b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2100>\n+\tlea 0x369103f7(%rip),%rdi # 36b43b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2100>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 233a31 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7131>\n \tmovabs $0x800000020,%rdx\n@@ -468342,15 +468342,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690f11e(%rip),%rdi # 36b42b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f8>\n+\tlea 0x3691011e(%rip),%rdi # 36b43b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x20f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -468501,15 +468501,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690ef21(%rip),%rdi # 36b42c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2200>\n+\tlea 0x3690ff21(%rip),%rdi # 36b43c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2200>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 234007 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7707>\n \tmovabs $0x800000020,%rdx\n@@ -468645,15 +468645,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690ec48(%rip),%rdi # 36b42c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f8>\n+\tlea 0x3690fc48(%rip),%rdi # 36b43c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -468804,15 +468804,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690e86b(%rip),%rdi # 36b42b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2120>\n+\tlea 0x3690f86b(%rip),%rdi # 36b43b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2120>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2345dd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7cdd>\n \tmovabs $0x800000020,%rdx\n@@ -468948,15 +468948,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690e592(%rip),%rdi # 36b42b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2118>\n+\tlea 0x3690f592(%rip),%rdi # 36b43b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2118>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -469107,15 +469107,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690e315(%rip),%rdi # 36b42bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a0>\n+\tlea 0x3690f315(%rip),%rdi # 36b43bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x21a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 234bb3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x82b3>\n \tmovabs $0x800000020,%rdx\n@@ -469251,15 +469251,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690e03c(%rip),%rdi # 36b42bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2198>\n+\tlea 0x3690f03c(%rip),%rdi # 36b43bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2198>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -469410,15 +469410,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690dcff(%rip),%rdi # 36b42b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2160>\n+\tlea 0x3690ecff(%rip),%rdi # 36b43b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2160>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 235189 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8889>\n \tmovabs $0x800000020,%rdx\n@@ -469554,15 +469554,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690da26(%rip),%rdi # 36b42b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2158>\n+\tlea 0x3690ea26(%rip),%rdi # 36b43b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2158>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -471405,15 +471405,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 228e00 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 2369dd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xa0dd>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x3690e537(%rip),%rax \n+\tmov 0x3690f537(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0xbee38(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0xbee37(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -471703,15 +471703,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690bc98(%rip),%rdi # 36b42c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2248>\n+\tlea 0x3690cc98(%rip),%rdi # 36b43c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2248>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -471772,15 +471772,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690bae0(%rip),%rdi # 36b42c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2250>\n+\tlea 0x3690cae0(%rip),%rdi # 36b43c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2250>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -471821,15 +471821,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690b9c6(%rip),%rdi # 36b42c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2258>\n+\tlea 0x3690c9c6(%rip),%rdi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2258>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -471870,15 +471870,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690b8ae(%rip),%rdi # 36b42c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2260>\n+\tlea 0x3690c8ae(%rip),%rdi # 36b43c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2260>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -471939,15 +471939,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690b6f8(%rip),%rdi # 36b42ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2268>\n+\tlea 0x3690c6f8(%rip),%rdi # 36b43ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2268>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472008,15 +472008,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690b540(%rip),%rdi # 36b42ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2270>\n+\tlea 0x3690c540(%rip),%rdi # 36b43ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2270>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472057,15 +472057,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690b426(%rip),%rdi # 36b42cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2278>\n+\tlea 0x3690c426(%rip),%rdi # 36b43cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2278>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472106,15 +472106,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690b30e(%rip),%rdi # 36b42cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2280>\n+\tlea 0x3690c30e(%rip),%rdi # 36b43cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2280>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472175,15 +472175,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690b158(%rip),%rdi # 36b42cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2288>\n+\tlea 0x3690c158(%rip),%rdi # 36b43cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2288>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472244,15 +472244,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690afa0(%rip),%rdi # 36b42cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2290>\n+\tlea 0x3690bfa0(%rip),%rdi # 36b43cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2290>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472293,15 +472293,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690ae86(%rip),%rdi # 36b42cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2298>\n+\tlea 0x3690be86(%rip),%rdi # 36b43cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2298>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472342,15 +472342,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690ad6e(%rip),%rdi # 36b42cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a0>\n+\tlea 0x3690bd6e(%rip),%rdi # 36b43cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472411,15 +472411,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690abb8(%rip),%rdi # 36b42ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a8>\n+\tlea 0x3690bbb8(%rip),%rdi # 36b43ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472480,15 +472480,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690aa00(%rip),%rdi # 36b42ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b0>\n+\tlea 0x3690ba00(%rip),%rdi # 36b43ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472529,15 +472529,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690a8e6(%rip),%rdi # 36b42cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b8>\n+\tlea 0x3690b8e6(%rip),%rdi # 36b43cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472578,15 +472578,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690a7ce(%rip),%rdi # 36b42cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c0>\n+\tlea 0x3690b7ce(%rip),%rdi # 36b43cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472647,15 +472647,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690a618(%rip),%rdi # 36b42d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c8>\n+\tlea 0x3690b618(%rip),%rdi # 36b43d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472716,15 +472716,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690a460(%rip),%rdi # 36b42d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d0>\n+\tlea 0x3690b460(%rip),%rdi # 36b43d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472765,15 +472765,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690a346(%rip),%rdi # 36b42d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d8>\n+\tlea 0x3690b346(%rip),%rdi # 36b43d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472814,15 +472814,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690a22e(%rip),%rdi # 36b42d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e0>\n+\tlea 0x3690b22e(%rip),%rdi # 36b43d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472883,15 +472883,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x3690a078(%rip),%rdi # 36b42d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e8>\n+\tlea 0x3690b078(%rip),%rdi # 36b43d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -472952,15 +472952,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36909ec0(%rip),%rdi # 36b42d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f0>\n+\tlea 0x3690aec0(%rip),%rdi # 36b43d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473001,15 +473001,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36909da6(%rip),%rdi # 36b42d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f8>\n+\tlea 0x3690ada6(%rip),%rdi # 36b43d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473050,15 +473050,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36909c8e(%rip),%rdi # 36b42d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2300>\n+\tlea 0x3690ac8e(%rip),%rdi # 36b43d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2300>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473119,15 +473119,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36909ad8(%rip),%rdi # 36b42d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2308>\n+\tlea 0x3690aad8(%rip),%rdi # 36b43d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2308>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473188,15 +473188,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36909920(%rip),%rdi # 36b42d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2310>\n+\tlea 0x3690a920(%rip),%rdi # 36b43d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2310>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473237,15 +473237,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36909806(%rip),%rdi # 36b42d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2318>\n+\tlea 0x3690a806(%rip),%rdi # 36b43d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2318>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473286,15 +473286,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369096ee(%rip),%rdi # 36b42d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2320>\n+\tlea 0x3690a6ee(%rip),%rdi # 36b43d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2320>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473355,15 +473355,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36909538(%rip),%rdi # 36b42d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2328>\n+\tlea 0x3690a538(%rip),%rdi # 36b43d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2328>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473424,15 +473424,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36909380(%rip),%rdi # 36b42d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2330>\n+\tlea 0x3690a380(%rip),%rdi # 36b43d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2330>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473473,15 +473473,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36909266(%rip),%rdi # 36b42d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2338>\n+\tlea 0x3690a266(%rip),%rdi # 36b43d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2338>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473522,15 +473522,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690914e(%rip),%rdi # 36b42d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2340>\n+\tlea 0x3690a14e(%rip),%rdi # 36b43d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2340>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473591,15 +473591,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36908f98(%rip),%rdi # 36b42d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2348>\n+\tlea 0x36909f98(%rip),%rdi # 36b43d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2348>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473660,15 +473660,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36908de0(%rip),%rdi # 36b42d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2350>\n+\tlea 0x36909de0(%rip),%rdi # 36b43d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2350>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473709,15 +473709,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36908cc6(%rip),%rdi # 36b42d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2358>\n+\tlea 0x36909cc6(%rip),%rdi # 36b43d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2358>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473758,15 +473758,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36908bae(%rip),%rdi # 36b42d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2360>\n+\tlea 0x36909bae(%rip),%rdi # 36b43d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2360>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473827,15 +473827,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369089f8(%rip),%rdi # 36b42da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2368>\n+\tlea 0x369099f8(%rip),%rdi # 36b43da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2368>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473896,15 +473896,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36908840(%rip),%rdi # 36b42da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2370>\n+\tlea 0x36909840(%rip),%rdi # 36b43da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2370>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473945,15 +473945,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36908726(%rip),%rdi # 36b42db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2378>\n+\tlea 0x36909726(%rip),%rdi # 36b43db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2378>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -473994,15 +473994,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690860e(%rip),%rdi # 36b42db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2380>\n+\tlea 0x3690960e(%rip),%rdi # 36b43db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2380>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474063,15 +474063,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36908458(%rip),%rdi # 36b42dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2388>\n+\tlea 0x36909458(%rip),%rdi # 36b43dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2388>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474132,15 +474132,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369082a0(%rip),%rdi # 36b42dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2390>\n+\tlea 0x369092a0(%rip),%rdi # 36b43dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2390>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474181,15 +474181,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36908186(%rip),%rdi # 36b42dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2398>\n+\tlea 0x36909186(%rip),%rdi # 36b43dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2398>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474230,15 +474230,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690806e(%rip),%rdi # 36b42dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a0>\n+\tlea 0x3690906e(%rip),%rdi # 36b43dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474299,15 +474299,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36907eb8(%rip),%rdi # 36b42de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a8>\n+\tlea 0x36908eb8(%rip),%rdi # 36b43de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474368,15 +474368,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36907d00(%rip),%rdi # 36b42de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b0>\n+\tlea 0x36908d00(%rip),%rdi # 36b43de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474417,15 +474417,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36907be6(%rip),%rdi # 36b42df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b8>\n+\tlea 0x36908be6(%rip),%rdi # 36b43df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474466,15 +474466,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36907ace(%rip),%rdi # 36b42df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c0>\n+\tlea 0x36908ace(%rip),%rdi # 36b43df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474535,15 +474535,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36907918(%rip),%rdi # 36b42e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c8>\n+\tlea 0x36908918(%rip),%rdi # 36b43e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474604,15 +474604,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36907760(%rip),%rdi # 36b42e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d0>\n+\tlea 0x36908760(%rip),%rdi # 36b43e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474653,15 +474653,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36907646(%rip),%rdi # 36b42e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d8>\n+\tlea 0x36908646(%rip),%rdi # 36b43e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474702,15 +474702,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690752e(%rip),%rdi # 36b42e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e0>\n+\tlea 0x3690852e(%rip),%rdi # 36b43e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474771,15 +474771,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36907378(%rip),%rdi # 36b42e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e8>\n+\tlea 0x36908378(%rip),%rdi # 36b43e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474840,15 +474840,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x369071c0(%rip),%rdi # 36b42e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f0>\n+\tlea 0x369081c0(%rip),%rdi # 36b43e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474889,15 +474889,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369070a6(%rip),%rdi # 36b42e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f8>\n+\tlea 0x369080a6(%rip),%rdi # 36b43e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -474938,15 +474938,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36906f8e(%rip),%rdi # 36b42e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2400>\n+\tlea 0x36907f8e(%rip),%rdi # 36b43e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2400>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475007,15 +475007,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36906dd8(%rip),%rdi # 36b42e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2408>\n+\tlea 0x36907dd8(%rip),%rdi # 36b43e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2408>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475076,15 +475076,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36906c20(%rip),%rdi # 36b42e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2410>\n+\tlea 0x36907c20(%rip),%rdi # 36b43e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2410>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475125,15 +475125,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36906b06(%rip),%rdi # 36b42e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2418>\n+\tlea 0x36907b06(%rip),%rdi # 36b43e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2418>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475174,15 +475174,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x369069ee(%rip),%rdi # 36b42e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2420>\n+\tlea 0x369079ee(%rip),%rdi # 36b43e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2420>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475243,15 +475243,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36906838(%rip),%rdi # 36b42e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2428>\n+\tlea 0x36907838(%rip),%rdi # 36b43e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2428>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475312,15 +475312,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36906680(%rip),%rdi # 36b42e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2430>\n+\tlea 0x36907680(%rip),%rdi # 36b43e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2430>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475361,15 +475361,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36906566(%rip),%rdi # 36b42e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2438>\n+\tlea 0x36907566(%rip),%rdi # 36b43e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2438>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -475410,696 +475410,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3690644e(%rip),%rdi # 36b42e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2440>\n+\tlea 0x3690744e(%rip),%rdi # 36b43e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2440>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36909a4c(%rip),%rbx # 36b464a8 ::get_beta()::val@@Base+0x190>\n+\tmov 0x3690aa4c(%rip),%rbx # 36b474a8 ::get_beta()::val@@Base+0x190>\n \ttest %rbx,%rbx\n \tjne 23ca77 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10177>\n-\tlea 0x36908c30(%rip),%rdi # 36b45698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c60>\n+\tlea 0x36909c30(%rip),%rdi # 36b46698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c60>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36909a31(%rip) # 36b464a8 ::get_beta()::val@@Base+0x190>\n+\tmov %rax,0x3690aa31(%rip) # 36b474a8 ::get_beta()::val@@Base+0x190>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369061f6(%rip),%rsi # 36b42c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2248>\n+\tlea 0x369071f6(%rip),%rsi # 36b43c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2248>\n \tlea 0xc528b(%rip),%rcx # 301d1c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27aac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369061d0(%rip),%rsi # 36b42c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2250>\n+\tlea 0x369071d0(%rip),%rsi # 36b43c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2250>\n \tlea 0xc52a8(%rip),%rcx # 301d67 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27af7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369061aa(%rip),%rsi # 36b42c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2258>\n+\tlea 0x369071aa(%rip),%rsi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2258>\n \tlea 0xc52c5(%rip),%rcx # 301db2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27b42>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36906184(%rip),%rsi # 36b42c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2260>\n+\tlea 0x36907184(%rip),%rsi # 36b43c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2260>\n \tlea 0xc52e4(%rip),%rcx # 301dff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27b8f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3690615e(%rip),%rsi # 36b42ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2268>\n+\tlea 0x3690715e(%rip),%rsi # 36b43ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2268>\n \tlea 0xc5303(%rip),%rcx # 301e4c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27bdc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36906138(%rip),%rsi # 36b42ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2270>\n+\tlea 0x36907138(%rip),%rsi # 36b43ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2270>\n \tlea 0xc5321(%rip),%rcx # 301e98 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27c28>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36906112(%rip),%rsi # 36b42cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2278>\n+\tlea 0x36907112(%rip),%rsi # 36b43cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2278>\n \tlea 0xc533f(%rip),%rcx # 301ee4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27c74>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369060ec(%rip),%rsi # 36b42cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2280>\n+\tlea 0x369070ec(%rip),%rsi # 36b43cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2280>\n \tlea 0xc535f(%rip),%rcx # 301f32 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27cc2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369060c6(%rip),%rsi # 36b42cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2288>\n+\tlea 0x369070c6(%rip),%rsi # 36b43cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2288>\n \tlea 0xc537f(%rip),%rcx # 301f80 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27d10>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x369060a0(%rip),%rsi # 36b42cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2290>\n+\tlea 0x369070a0(%rip),%rsi # 36b43cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2290>\n \tlea 0xc539d(%rip),%rcx # 301fcc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27d5c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3690607a(%rip),%rsi # 36b42cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2298>\n+\tlea 0x3690707a(%rip),%rsi # 36b43cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2298>\n \tlea 0xc53bb(%rip),%rcx # 302018 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27da8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36906054(%rip),%rsi # 36b42cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a0>\n+\tlea 0x36907054(%rip),%rsi # 36b43cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a0>\n \tlea 0xc53db(%rip),%rcx # 302066 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27df6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3690602e(%rip),%rsi # 36b42ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a8>\n+\tlea 0x3690702e(%rip),%rsi # 36b43ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a8>\n \tlea 0xc53fb(%rip),%rcx # 3020b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27e44>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36906008(%rip),%rsi # 36b42ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b0>\n+\tlea 0x36907008(%rip),%rsi # 36b43ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b0>\n \tlea 0xc5419(%rip),%rcx # 302100 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27e90>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905fe2(%rip),%rsi # 36b42cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b8>\n+\tlea 0x36906fe2(%rip),%rsi # 36b43cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b8>\n \tlea 0xc5437(%rip),%rcx # 30214c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27edc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905fbc(%rip),%rsi # 36b42cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c0>\n+\tlea 0x36906fbc(%rip),%rsi # 36b43cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c0>\n \tlea 0xc5457(%rip),%rcx # 30219a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27f2a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905f96(%rip),%rsi # 36b42d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c8>\n+\tlea 0x36906f96(%rip),%rsi # 36b43d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c8>\n \tlea 0xc5477(%rip),%rcx # 3021e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27f78>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905f70(%rip),%rsi # 36b42d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d0>\n+\tlea 0x36906f70(%rip),%rsi # 36b43d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d0>\n \tlea 0xc5495(%rip),%rcx # 302234 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x27fc4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905f4a(%rip),%rsi # 36b42d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d8>\n+\tlea 0x36906f4a(%rip),%rsi # 36b43d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d8>\n \tlea 0xc54b3(%rip),%rcx # 302280 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28010>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905f24(%rip),%rsi # 36b42d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e0>\n+\tlea 0x36906f24(%rip),%rsi # 36b43d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e0>\n \tlea 0xc54d3(%rip),%rcx # 3022ce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2805e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905efe(%rip),%rsi # 36b42d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e8>\n+\tlea 0x36906efe(%rip),%rsi # 36b43d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e8>\n \tlea 0xc54f3(%rip),%rcx # 30231c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x280ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905ed8(%rip),%rsi # 36b42d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f0>\n+\tlea 0x36906ed8(%rip),%rsi # 36b43d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f0>\n \tlea 0xc5511(%rip),%rcx # 302368 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x280f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905eb2(%rip),%rsi # 36b42d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f8>\n+\tlea 0x36906eb2(%rip),%rsi # 36b43d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f8>\n \tlea 0xc552f(%rip),%rcx # 3023b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28144>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905e8c(%rip),%rsi # 36b42d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2300>\n+\tlea 0x36906e8c(%rip),%rsi # 36b43d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2300>\n \tlea 0xc554f(%rip),%rcx # 302402 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28192>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905e66(%rip),%rsi # 36b42d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2308>\n+\tlea 0x36906e66(%rip),%rsi # 36b43d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2308>\n \tlea 0xc556f(%rip),%rcx # 302450 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x281e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905e40(%rip),%rsi # 36b42d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2310>\n+\tlea 0x36906e40(%rip),%rsi # 36b43d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2310>\n \tlea 0xc558d(%rip),%rcx # 30249c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2822c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905e1a(%rip),%rsi # 36b42d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2318>\n+\tlea 0x36906e1a(%rip),%rsi # 36b43d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2318>\n \tlea 0xc55ab(%rip),%rcx # 3024e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28278>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905df4(%rip),%rsi # 36b42d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2320>\n+\tlea 0x36906df4(%rip),%rsi # 36b43d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2320>\n \tlea 0xc55cb(%rip),%rcx # 302536 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x282c6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905dce(%rip),%rsi # 36b42d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2328>\n+\tlea 0x36906dce(%rip),%rsi # 36b43d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2328>\n \tlea 0xc55eb(%rip),%rcx # 302584 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28314>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905da8(%rip),%rsi # 36b42d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2330>\n+\tlea 0x36906da8(%rip),%rsi # 36b43d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2330>\n \tlea 0xc5609(%rip),%rcx # 3025d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28360>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905d82(%rip),%rsi # 36b42d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2338>\n+\tlea 0x36906d82(%rip),%rsi # 36b43d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2338>\n \tlea 0xc5627(%rip),%rcx # 30261c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x283ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905d5c(%rip),%rsi # 36b42d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2340>\n+\tlea 0x36906d5c(%rip),%rsi # 36b43d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2340>\n \tlea 0xc5647(%rip),%rcx # 30266a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x283fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905d36(%rip),%rsi # 36b42d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2348>\n+\tlea 0x36906d36(%rip),%rsi # 36b43d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2348>\n \tlea 0xc5667(%rip),%rcx # 3026b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28448>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905d10(%rip),%rsi # 36b42d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2350>\n+\tlea 0x36906d10(%rip),%rsi # 36b43d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2350>\n \tlea 0xc5685(%rip),%rcx # 302704 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28494>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905cea(%rip),%rsi # 36b42d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2358>\n+\tlea 0x36906cea(%rip),%rsi # 36b43d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2358>\n \tlea 0xc56a3(%rip),%rcx # 302750 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x284e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905cc4(%rip),%rsi # 36b42d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2360>\n+\tlea 0x36906cc4(%rip),%rsi # 36b43d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2360>\n \tlea 0xc56c3(%rip),%rcx # 30279e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2852e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905c9e(%rip),%rsi # 36b42da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2368>\n+\tlea 0x36906c9e(%rip),%rsi # 36b43da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2368>\n \tlea 0xc56e3(%rip),%rcx # 3027ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2857c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905c78(%rip),%rsi # 36b42da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2370>\n+\tlea 0x36906c78(%rip),%rsi # 36b43da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2370>\n \tlea 0xc5701(%rip),%rcx # 302838 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x285c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905c52(%rip),%rsi # 36b42db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2378>\n+\tlea 0x36906c52(%rip),%rsi # 36b43db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2378>\n \tlea 0xc571f(%rip),%rcx # 302884 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28614>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905c2c(%rip),%rsi # 36b42db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2380>\n+\tlea 0x36906c2c(%rip),%rsi # 36b43db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2380>\n \tlea 0xc573f(%rip),%rcx # 3028d2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28662>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905c06(%rip),%rsi # 36b42dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2388>\n+\tlea 0x36906c06(%rip),%rsi # 36b43dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2388>\n \tlea 0xc575f(%rip),%rcx # 302920 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x286b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905be0(%rip),%rsi # 36b42dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2390>\n+\tlea 0x36906be0(%rip),%rsi # 36b43dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2390>\n \tlea 0xc577d(%rip),%rcx # 30296c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x286fc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905bba(%rip),%rsi # 36b42dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2398>\n+\tlea 0x36906bba(%rip),%rsi # 36b43dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2398>\n \tlea 0xc579b(%rip),%rcx # 3029b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28748>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905b94(%rip),%rsi # 36b42dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a0>\n+\tlea 0x36906b94(%rip),%rsi # 36b43dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a0>\n \tlea 0xc57bb(%rip),%rcx # 302a06 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28796>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905b6e(%rip),%rsi # 36b42de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a8>\n+\tlea 0x36906b6e(%rip),%rsi # 36b43de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a8>\n \tlea 0xc57db(%rip),%rcx # 302a54 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x287e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905b48(%rip),%rsi # 36b42de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b0>\n+\tlea 0x36906b48(%rip),%rsi # 36b43de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b0>\n \tlea 0xc57f9(%rip),%rcx # 302aa0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28830>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905b22(%rip),%rsi # 36b42df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b8>\n+\tlea 0x36906b22(%rip),%rsi # 36b43df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b8>\n \tlea 0xc5817(%rip),%rcx # 302aec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2887c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905afc(%rip),%rsi # 36b42df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c0>\n+\tlea 0x36906afc(%rip),%rsi # 36b43df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c0>\n \tlea 0xc5837(%rip),%rcx # 302b3a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x288ca>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905ad6(%rip),%rsi # 36b42e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c8>\n+\tlea 0x36906ad6(%rip),%rsi # 36b43e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c8>\n \tlea 0xc5857(%rip),%rcx # 302b88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28918>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905ab0(%rip),%rsi # 36b42e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d0>\n+\tlea 0x36906ab0(%rip),%rsi # 36b43e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d0>\n \tlea 0xc5876(%rip),%rcx # 302bd5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28965>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905a8a(%rip),%rsi # 36b42e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d8>\n+\tlea 0x36906a8a(%rip),%rsi # 36b43e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d8>\n \tlea 0xc5895(%rip),%rcx # 302c22 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x289b2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36905a64(%rip),%rsi # 36b42e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e0>\n+\tlea 0x36906a64(%rip),%rsi # 36b43e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e0>\n \tlea 0xc58b6(%rip),%rcx # 302c71 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28a01>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36905a27(%rip),%rsi # 36b42e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e8>\n+\tlea 0x36906a27(%rip),%rsi # 36b43e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e8>\n \tlea 0xc58c0(%rip),%rcx # 302cc0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28a50>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369059ea(%rip),%rsi # 36b42e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f0>\n+\tlea 0x369069ea(%rip),%rsi # 36b43e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f0>\n \tlea 0xc58c8(%rip),%rcx # 302d0d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28a9d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369059ad(%rip),%rsi # 36b42e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f8>\n+\tlea 0x369069ad(%rip),%rsi # 36b43e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f8>\n \tlea 0xc58d0(%rip),%rcx # 302d5a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28aea>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36905970(%rip),%rsi # 36b42e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2400>\n+\tlea 0x36906970(%rip),%rsi # 36b43e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2400>\n \tlea 0xc58da(%rip),%rcx # 302da9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28b39>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36905933(%rip),%rsi # 36b42e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2408>\n+\tlea 0x36906933(%rip),%rsi # 36b43e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2408>\n \tlea 0xc58e4(%rip),%rcx # 302df8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28b88>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369058f6(%rip),%rsi # 36b42e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2410>\n+\tlea 0x369068f6(%rip),%rsi # 36b43e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2410>\n \tlea 0xc58ec(%rip),%rcx # 302e45 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28bd5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369058b9(%rip),%rsi # 36b42e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2418>\n+\tlea 0x369068b9(%rip),%rsi # 36b43e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2418>\n \tlea 0xc58f4(%rip),%rcx # 302e92 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28c22>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3690587c(%rip),%rsi # 36b42e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2420>\n+\tlea 0x3690687c(%rip),%rsi # 36b43e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2420>\n \tlea 0xc58fe(%rip),%rcx # 302ee1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28c71>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3690583f(%rip),%rsi # 36b42e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2428>\n+\tlea 0x3690683f(%rip),%rsi # 36b43e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2428>\n \tlea 0xc5908(%rip),%rcx # 302f30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28cc0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36905802(%rip),%rsi # 36b42e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2430>\n+\tlea 0x36906802(%rip),%rsi # 36b43e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2430>\n \tlea 0xc5910(%rip),%rcx # 302f7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28d0d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x369057c5(%rip),%rsi # 36b42e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2438>\n+\tlea 0x369067c5(%rip),%rsi # 36b43e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2438>\n \tlea 0xc5918(%rip),%rcx # 302fca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28d5a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36905788(%rip),%rsi # 36b42e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2440>\n+\tlea 0x36906788(%rip),%rsi # 36b43e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2440>\n \tlea 0xc5922(%rip),%rcx # 303019 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28da9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 23d720 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10e20>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36908d81(%rip),%rdi # 36b464a8 ::get_beta()::val@@Base+0x190>\n+\tmov 0x36909d81(%rip),%rdi # 36b474a8 ::get_beta()::val@@Base+0x190>\n \ttest %rdi,%rdi\n \tje 23d741 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10e41>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36908d6b(%rip) # 36b464a8 ::get_beta()::val@@Base+0x190>\n+\tmovq $0x0,0x36909d6b(%rip) # 36b474a8 ::get_beta()::val@@Base+0x190>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000023d750 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)2>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -479712,15 +479712,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36902a59(%rip),%rdi # 36b42e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2420>\n+\tlea 0x36903a59(%rip),%rdi # 36b43e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2420>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2406ef (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -479856,15 +479856,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36902780(%rip),%rdi # 36b42e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2418>\n+\tlea 0x36903780(%rip),%rdi # 36b43e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2418>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -480015,15 +480015,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36902423(%rip),%rdi # 36b42df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c0>\n+\tlea 0x36903423(%rip),%rdi # 36b43df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 240cc5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -480159,15 +480159,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690214a(%rip),%rdi # 36b42df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b8>\n+\tlea 0x3690314a(%rip),%rdi # 36b43df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -480318,15 +480318,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36901d6d(%rip),%rdi # 36b42d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e0>\n+\tlea 0x36902d6d(%rip),%rdi # 36b43d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 24129b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -480462,15 +480462,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36901a94(%rip),%rdi # 36b42d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d8>\n+\tlea 0x36902a94(%rip),%rdi # 36b43d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -480621,15 +480621,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36901897(%rip),%rdi # 36b42e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e0>\n+\tlea 0x36902897(%rip),%rdi # 36b43e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 241871 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -480765,15 +480765,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369015be(%rip),%rdi # 36b42e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d8>\n+\tlea 0x369025be(%rip),%rdi # 36b43e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -480924,15 +480924,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36901261(%rip),%rdi # 36b42db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2380>\n+\tlea 0x36902261(%rip),%rdi # 36b43db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2380>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 241e47 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -481068,15 +481068,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36900f88(%rip),%rdi # 36b42db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2378>\n+\tlea 0x36901f88(%rip),%rdi # 36b43db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2378>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -481227,15 +481227,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36900bab(%rip),%rdi # 36b42cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a0>\n+\tlea 0x36901bab(%rip),%rdi # 36b43cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 24241d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -481371,15 +481371,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x369008d2(%rip),%rdi # 36b42cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2298>\n+\tlea 0x369018d2(%rip),%rdi # 36b43cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2298>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -481530,15 +481530,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36900775(%rip),%rdi # 36b42e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2440>\n+\tlea 0x36901775(%rip),%rdi # 36b43e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2440>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2429f3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -481674,15 +481674,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690049c(%rip),%rdi # 36b42e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2438>\n+\tlea 0x3690149c(%rip),%rdi # 36b43e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2438>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -481833,15 +481833,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3690001f(%rip),%rdi # 36b42cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c0>\n+\tlea 0x3690101f(%rip),%rdi # 36b43cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 242fc9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -481977,15 +481977,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ffd46(%rip),%rdi # 36b42cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b8>\n+\tlea 0x36900d46(%rip),%rdi # 36b43cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -482136,15 +482136,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ffac9(%rip),%rdi # 36b42d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2340>\n+\tlea 0x36900ac9(%rip),%rdi # 36b43d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2340>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 24359f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -482280,15 +482280,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ff7f0(%rip),%rdi # 36b42d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2338>\n+\tlea 0x369007f0(%rip),%rdi # 36b43d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2338>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -482439,15 +482439,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ff413(%rip),%rdi # 36b42c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2260>\n+\tlea 0x36900413(%rip),%rdi # 36b43c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2260>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 243e56 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -482589,15 +482589,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ff152(%rip),%rdi # 36b42cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2280>\n+\tlea 0x36900152(%rip),%rdi # 36b43cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2280>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 24414b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -482733,15 +482733,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fee59(%rip),%rdi # 36b42c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2258>\n+\tlea 0x368ffe59(%rip),%rdi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2258>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -482886,15 +482886,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368feb84(%rip),%rdi # 36b42cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2278>\n+\tlea 0x368ffb84(%rip),%rdi # 36b43cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2278>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -483045,15 +483045,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fe907(%rip),%rdi # 36b42d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2300>\n+\tlea 0x368ff907(%rip),%rdi # 36b43d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2300>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 244721 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -483189,15 +483189,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fe62e(%rip),%rdi # 36b42d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f8>\n+\tlea 0x368ff62e(%rip),%rdi # 36b43d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x22f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -483348,15 +483348,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fe431(%rip),%rdi # 36b42e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2400>\n+\tlea 0x368ff431(%rip),%rdi # 36b43e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2400>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 244cf7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -483492,15 +483492,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fe158(%rip),%rdi # 36b42e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f8>\n+\tlea 0x368ff158(%rip),%rdi # 36b43e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -483651,15 +483651,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fdd7b(%rip),%rdi # 36b42d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2320>\n+\tlea 0x368fed7b(%rip),%rdi # 36b43d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2320>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2452cd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -483795,15 +483795,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fdaa2(%rip),%rdi # 36b42d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2318>\n+\tlea 0x368feaa2(%rip),%rdi # 36b43d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2318>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -483954,15 +483954,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fd825(%rip),%rdi # 36b42dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a0>\n+\tlea 0x368fe825(%rip),%rdi # 36b43dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x23a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2458a3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -484098,15 +484098,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fd54c(%rip),%rdi # 36b42dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2398>\n+\tlea 0x368fe54c(%rip),%rdi # 36b43dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2398>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -484257,15 +484257,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fd20f(%rip),%rdi # 36b42d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2360>\n+\tlea 0x368fe20f(%rip),%rdi # 36b43d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2360>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 245e79 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -484401,15 +484401,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368fcf36(%rip),%rdi # 36b42d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2358>\n+\tlea 0x368fdf36(%rip),%rdi # 36b43d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2358>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -486252,15 +486252,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 239c50 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd350>\n \tadd $0x1c8,%rsp\n \tjmp 2476cd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x368fd847(%rip),%rax \n+\tmov 0x368fe847(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0xae148(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0xae147(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -486550,15 +486550,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368fb1a8(%rip),%rdi # 36b42e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2448>\n+\tlea 0x368fc1a8(%rip),%rdi # 36b43e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2448>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486619,15 +486619,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368faff0(%rip),%rdi # 36b42e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2450>\n+\tlea 0x368fbff0(%rip),%rdi # 36b43e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2450>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486668,15 +486668,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368faed6(%rip),%rdi # 36b42e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2458>\n+\tlea 0x368fbed6(%rip),%rdi # 36b43e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2458>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486717,15 +486717,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368fadbe(%rip),%rdi # 36b42e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2460>\n+\tlea 0x368fbdbe(%rip),%rdi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2460>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486786,15 +486786,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368fac08(%rip),%rdi # 36b42ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2468>\n+\tlea 0x368fbc08(%rip),%rdi # 36b43ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2468>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486855,15 +486855,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368faa50(%rip),%rdi # 36b42ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2470>\n+\tlea 0x368fba50(%rip),%rdi # 36b43ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2470>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486904,15 +486904,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368fa936(%rip),%rdi # 36b42eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2478>\n+\tlea 0x368fb936(%rip),%rdi # 36b43eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2478>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -486953,15 +486953,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368fa81e(%rip),%rdi # 36b42eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2480>\n+\tlea 0x368fb81e(%rip),%rdi # 36b43eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2480>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487022,15 +487022,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368fa668(%rip),%rdi # 36b42ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2488>\n+\tlea 0x368fb668(%rip),%rdi # 36b43ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2488>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487091,15 +487091,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368fa4b0(%rip),%rdi # 36b42ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2490>\n+\tlea 0x368fb4b0(%rip),%rdi # 36b43ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2490>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487140,15 +487140,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368fa396(%rip),%rdi # 36b42ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2498>\n+\tlea 0x368fb396(%rip),%rdi # 36b43ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2498>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487189,15 +487189,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368fa27e(%rip),%rdi # 36b42ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a0>\n+\tlea 0x368fb27e(%rip),%rdi # 36b43ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487258,15 +487258,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368fa0c8(%rip),%rdi # 36b42ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a8>\n+\tlea 0x368fb0c8(%rip),%rdi # 36b43ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487327,15 +487327,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f9f10(%rip),%rdi # 36b42ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b0>\n+\tlea 0x368faf10(%rip),%rdi # 36b43ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487376,15 +487376,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f9df6(%rip),%rdi # 36b42ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b8>\n+\tlea 0x368fadf6(%rip),%rdi # 36b43ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487425,15 +487425,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f9cde(%rip),%rdi # 36b42ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c0>\n+\tlea 0x368facde(%rip),%rdi # 36b43ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487494,15 +487494,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f9b28(%rip),%rdi # 36b42f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c8>\n+\tlea 0x368fab28(%rip),%rdi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487563,15 +487563,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f9970(%rip),%rdi # 36b42f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d0>\n+\tlea 0x368fa970(%rip),%rdi # 36b43f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487612,15 +487612,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f9856(%rip),%rdi # 36b42f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d8>\n+\tlea 0x368fa856(%rip),%rdi # 36b43f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487661,15 +487661,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f973e(%rip),%rdi # 36b42f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e0>\n+\tlea 0x368fa73e(%rip),%rdi # 36b43f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487730,15 +487730,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f9588(%rip),%rdi # 36b42f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e8>\n+\tlea 0x368fa588(%rip),%rdi # 36b43f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487799,15 +487799,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f93d0(%rip),%rdi # 36b42f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f0>\n+\tlea 0x368fa3d0(%rip),%rdi # 36b43f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487848,15 +487848,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f92b6(%rip),%rdi # 36b42f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f8>\n+\tlea 0x368fa2b6(%rip),%rdi # 36b43f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487897,15 +487897,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f919e(%rip),%rdi # 36b42f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2500>\n+\tlea 0x368fa19e(%rip),%rdi # 36b43f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2500>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -487966,15 +487966,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f8fe8(%rip),%rdi # 36b42f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2508>\n+\tlea 0x368f9fe8(%rip),%rdi # 36b43f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2508>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488035,15 +488035,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f8e30(%rip),%rdi # 36b42f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2510>\n+\tlea 0x368f9e30(%rip),%rdi # 36b43f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2510>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488084,15 +488084,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f8d16(%rip),%rdi # 36b42f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2518>\n+\tlea 0x368f9d16(%rip),%rdi # 36b43f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2518>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488133,15 +488133,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f8bfe(%rip),%rdi # 36b42f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2520>\n+\tlea 0x368f9bfe(%rip),%rdi # 36b43f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2520>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488202,15 +488202,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f8a48(%rip),%rdi # 36b42f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2528>\n+\tlea 0x368f9a48(%rip),%rdi # 36b43f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2528>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488271,15 +488271,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f8890(%rip),%rdi # 36b42f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2530>\n+\tlea 0x368f9890(%rip),%rdi # 36b43f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2530>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488320,15 +488320,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f8776(%rip),%rdi # 36b42f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2538>\n+\tlea 0x368f9776(%rip),%rdi # 36b43f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2538>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488369,15 +488369,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f865e(%rip),%rdi # 36b42f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2540>\n+\tlea 0x368f965e(%rip),%rdi # 36b43f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2540>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488438,15 +488438,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f84a8(%rip),%rdi # 36b42f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2548>\n+\tlea 0x368f94a8(%rip),%rdi # 36b43f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2548>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488507,15 +488507,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f82f0(%rip),%rdi # 36b42f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2550>\n+\tlea 0x368f92f0(%rip),%rdi # 36b43f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2550>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488556,15 +488556,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f81d6(%rip),%rdi # 36b42f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2558>\n+\tlea 0x368f91d6(%rip),%rdi # 36b43f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2558>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488605,15 +488605,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f80be(%rip),%rdi # 36b42f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2560>\n+\tlea 0x368f90be(%rip),%rdi # 36b43f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2560>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488674,15 +488674,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f7f08(%rip),%rdi # 36b42fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2568>\n+\tlea 0x368f8f08(%rip),%rdi # 36b43fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2568>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488743,15 +488743,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f7d50(%rip),%rdi # 36b42fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2570>\n+\tlea 0x368f8d50(%rip),%rdi # 36b43fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2570>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488792,15 +488792,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f7c36(%rip),%rdi # 36b42fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2578>\n+\tlea 0x368f8c36(%rip),%rdi # 36b43fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2578>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488841,15 +488841,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f7b1e(%rip),%rdi # 36b42fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2580>\n+\tlea 0x368f8b1e(%rip),%rdi # 36b43fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2580>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488910,15 +488910,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f7968(%rip),%rdi # 36b42fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2588>\n+\tlea 0x368f8968(%rip),%rdi # 36b43fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2588>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -488979,15 +488979,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f77b0(%rip),%rdi # 36b42fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2590>\n+\tlea 0x368f87b0(%rip),%rdi # 36b43fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2590>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489028,15 +489028,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f7696(%rip),%rdi # 36b42fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2598>\n+\tlea 0x368f8696(%rip),%rdi # 36b43fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2598>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489077,15 +489077,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f757e(%rip),%rdi # 36b42fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a0>\n+\tlea 0x368f857e(%rip),%rdi # 36b43fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489146,15 +489146,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f73c8(%rip),%rdi # 36b42fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a8>\n+\tlea 0x368f83c8(%rip),%rdi # 36b43fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489215,15 +489215,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f7210(%rip),%rdi # 36b42fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b0>\n+\tlea 0x368f8210(%rip),%rdi # 36b43fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489264,15 +489264,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f70f6(%rip),%rdi # 36b42ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b8>\n+\tlea 0x368f80f6(%rip),%rdi # 36b43ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489313,15 +489313,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f6fde(%rip),%rdi # 36b42ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c0>\n+\tlea 0x368f7fde(%rip),%rdi # 36b43ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489382,15 +489382,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f6e28(%rip),%rdi # 36b43000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c8>\n+\tlea 0x368f7e28(%rip),%rdi # 36b44000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489451,15 +489451,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f6c70(%rip),%rdi # 36b43008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d0>\n+\tlea 0x368f7c70(%rip),%rdi # 36b44008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489500,15 +489500,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f6b56(%rip),%rdi # 36b43010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d8>\n+\tlea 0x368f7b56(%rip),%rdi # 36b44010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489549,15 +489549,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f6a3e(%rip),%rdi # 36b43018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e0>\n+\tlea 0x368f7a3e(%rip),%rdi # 36b44018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489618,15 +489618,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f6888(%rip),%rdi # 36b43020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e8>\n+\tlea 0x368f7888(%rip),%rdi # 36b44020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489687,15 +489687,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f66d0(%rip),%rdi # 36b43028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f0>\n+\tlea 0x368f76d0(%rip),%rdi # 36b44028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489736,15 +489736,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f65b6(%rip),%rdi # 36b43030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f8>\n+\tlea 0x368f75b6(%rip),%rdi # 36b44030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489785,15 +489785,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f649e(%rip),%rdi # 36b43038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2600>\n+\tlea 0x368f749e(%rip),%rdi # 36b44038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2600>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489854,15 +489854,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f62e8(%rip),%rdi # 36b43040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2608>\n+\tlea 0x368f72e8(%rip),%rdi # 36b44040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2608>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489923,15 +489923,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f6130(%rip),%rdi # 36b43048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2610>\n+\tlea 0x368f7130(%rip),%rdi # 36b44048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2610>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -489972,15 +489972,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f6016(%rip),%rdi # 36b43050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2618>\n+\tlea 0x368f7016(%rip),%rdi # 36b44050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2618>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -490021,15 +490021,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f5efe(%rip),%rdi # 36b43058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2620>\n+\tlea 0x368f6efe(%rip),%rdi # 36b44058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2620>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -490090,15 +490090,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f5d48(%rip),%rdi # 36b43060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2628>\n+\tlea 0x368f6d48(%rip),%rdi # 36b44060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2628>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -490159,15 +490159,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368f5b90(%rip),%rdi # 36b43068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2630>\n+\tlea 0x368f6b90(%rip),%rdi # 36b44068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2630>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -490208,15 +490208,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f5a76(%rip),%rdi # 36b43070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2638>\n+\tlea 0x368f6a76(%rip),%rdi # 36b44070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2638>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -490257,696 +490257,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368f595e(%rip),%rdi # 36b43078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2640>\n+\tlea 0x368f695e(%rip),%rdi # 36b44078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2640>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368f8d64(%rip),%rbx # 36b464b0 ::get_beta()::val@@Base+0x198>\n+\tmov 0x368f9d64(%rip),%rbx # 36b474b0 ::get_beta()::val@@Base+0x198>\n \ttest %rbx,%rbx\n \tjne 24d767 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x368f7f58(%rip),%rdi # 36b456b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c78>\n+\tlea 0x368f8f58(%rip),%rdi # 36b466b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c78>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368f8d49(%rip) # 36b464b0 ::get_beta()::val@@Base+0x198>\n+\tmov %rax,0x368f9d49(%rip) # 36b474b0 ::get_beta()::val@@Base+0x198>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5706(%rip),%rsi # 36b42e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2448>\n+\tlea 0x368f6706(%rip),%rsi # 36b43e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2448>\n \tlea 0xb58e7(%rip),%rcx # 303068 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28df8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f56e0(%rip),%rsi # 36b42e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2450>\n+\tlea 0x368f66e0(%rip),%rsi # 36b43e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2450>\n \tlea 0xb5904(%rip),%rcx # 3030b3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28e43>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f56ba(%rip),%rsi # 36b42e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2458>\n+\tlea 0x368f66ba(%rip),%rsi # 36b43e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2458>\n \tlea 0xb5921(%rip),%rcx # 3030fe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28e8e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5694(%rip),%rsi # 36b42e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2460>\n+\tlea 0x368f6694(%rip),%rsi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2460>\n \tlea 0xb5940(%rip),%rcx # 30314b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28edb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f566e(%rip),%rsi # 36b42ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2468>\n+\tlea 0x368f666e(%rip),%rsi # 36b43ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2468>\n \tlea 0xb595f(%rip),%rcx # 303198 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28f28>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5648(%rip),%rsi # 36b42ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2470>\n+\tlea 0x368f6648(%rip),%rsi # 36b43ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2470>\n \tlea 0xb597d(%rip),%rcx # 3031e4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28f74>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5622(%rip),%rsi # 36b42eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2478>\n+\tlea 0x368f6622(%rip),%rsi # 36b43eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2478>\n \tlea 0xb599b(%rip),%rcx # 303230 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x28fc0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f55fc(%rip),%rsi # 36b42eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2480>\n+\tlea 0x368f65fc(%rip),%rsi # 36b43eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2480>\n \tlea 0xb59bb(%rip),%rcx # 30327e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2900e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f55d6(%rip),%rsi # 36b42ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2488>\n+\tlea 0x368f65d6(%rip),%rsi # 36b43ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2488>\n \tlea 0xb59db(%rip),%rcx # 3032cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2905c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f55b0(%rip),%rsi # 36b42ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2490>\n+\tlea 0x368f65b0(%rip),%rsi # 36b43ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2490>\n \tlea 0xb59f9(%rip),%rcx # 303318 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x290a8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f558a(%rip),%rsi # 36b42ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2498>\n+\tlea 0x368f658a(%rip),%rsi # 36b43ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2498>\n \tlea 0xb5a17(%rip),%rcx # 303364 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x290f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5564(%rip),%rsi # 36b42ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a0>\n+\tlea 0x368f6564(%rip),%rsi # 36b43ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a0>\n \tlea 0xb5a37(%rip),%rcx # 3033b2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29142>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f553e(%rip),%rsi # 36b42ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a8>\n+\tlea 0x368f653e(%rip),%rsi # 36b43ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a8>\n \tlea 0xb5a57(%rip),%rcx # 303400 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29190>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5518(%rip),%rsi # 36b42ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b0>\n+\tlea 0x368f6518(%rip),%rsi # 36b43ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b0>\n \tlea 0xb5a75(%rip),%rcx # 30344c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x291dc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f54f2(%rip),%rsi # 36b42ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b8>\n+\tlea 0x368f64f2(%rip),%rsi # 36b43ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b8>\n \tlea 0xb5a93(%rip),%rcx # 303498 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29228>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f54cc(%rip),%rsi # 36b42ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c0>\n+\tlea 0x368f64cc(%rip),%rsi # 36b43ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c0>\n \tlea 0xb5ab3(%rip),%rcx # 3034e6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29276>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f54a6(%rip),%rsi # 36b42f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c8>\n+\tlea 0x368f64a6(%rip),%rsi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c8>\n \tlea 0xb5ad3(%rip),%rcx # 303534 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x292c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5480(%rip),%rsi # 36b42f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d0>\n+\tlea 0x368f6480(%rip),%rsi # 36b43f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d0>\n \tlea 0xb5af1(%rip),%rcx # 303580 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29310>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f545a(%rip),%rsi # 36b42f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d8>\n+\tlea 0x368f645a(%rip),%rsi # 36b43f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d8>\n \tlea 0xb5b0f(%rip),%rcx # 3035cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2935c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5434(%rip),%rsi # 36b42f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e0>\n+\tlea 0x368f6434(%rip),%rsi # 36b43f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e0>\n \tlea 0xb5b2f(%rip),%rcx # 30361a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x293aa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f540e(%rip),%rsi # 36b42f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e8>\n+\tlea 0x368f640e(%rip),%rsi # 36b43f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e8>\n \tlea 0xb5b4f(%rip),%rcx # 303668 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x293f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f53e8(%rip),%rsi # 36b42f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f0>\n+\tlea 0x368f63e8(%rip),%rsi # 36b43f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f0>\n \tlea 0xb5b6d(%rip),%rcx # 3036b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29444>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f53c2(%rip),%rsi # 36b42f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f8>\n+\tlea 0x368f63c2(%rip),%rsi # 36b43f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f8>\n \tlea 0xb5b8b(%rip),%rcx # 303700 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29490>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f539c(%rip),%rsi # 36b42f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2500>\n+\tlea 0x368f639c(%rip),%rsi # 36b43f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2500>\n \tlea 0xb5bab(%rip),%rcx # 30374e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x294de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5376(%rip),%rsi # 36b42f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2508>\n+\tlea 0x368f6376(%rip),%rsi # 36b43f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2508>\n \tlea 0xb5bcb(%rip),%rcx # 30379c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2952c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5350(%rip),%rsi # 36b42f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2510>\n+\tlea 0x368f6350(%rip),%rsi # 36b43f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2510>\n \tlea 0xb5be9(%rip),%rcx # 3037e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29578>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f532a(%rip),%rsi # 36b42f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2518>\n+\tlea 0x368f632a(%rip),%rsi # 36b43f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2518>\n \tlea 0xb5c07(%rip),%rcx # 303834 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x295c4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5304(%rip),%rsi # 36b42f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2520>\n+\tlea 0x368f6304(%rip),%rsi # 36b43f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2520>\n \tlea 0xb5c27(%rip),%rcx # 303882 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29612>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f52de(%rip),%rsi # 36b42f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2528>\n+\tlea 0x368f62de(%rip),%rsi # 36b43f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2528>\n \tlea 0xb5c47(%rip),%rcx # 3038d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29660>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f52b8(%rip),%rsi # 36b42f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2530>\n+\tlea 0x368f62b8(%rip),%rsi # 36b43f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2530>\n \tlea 0xb5c65(%rip),%rcx # 30391c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x296ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5292(%rip),%rsi # 36b42f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2538>\n+\tlea 0x368f6292(%rip),%rsi # 36b43f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2538>\n \tlea 0xb5c83(%rip),%rcx # 303968 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x296f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f526c(%rip),%rsi # 36b42f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2540>\n+\tlea 0x368f626c(%rip),%rsi # 36b43f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2540>\n \tlea 0xb5ca3(%rip),%rcx # 3039b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29746>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5246(%rip),%rsi # 36b42f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2548>\n+\tlea 0x368f6246(%rip),%rsi # 36b43f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2548>\n \tlea 0xb5cc3(%rip),%rcx # 303a04 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29794>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5220(%rip),%rsi # 36b42f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2550>\n+\tlea 0x368f6220(%rip),%rsi # 36b43f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2550>\n \tlea 0xb5ce1(%rip),%rcx # 303a50 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x297e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f51fa(%rip),%rsi # 36b42f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2558>\n+\tlea 0x368f61fa(%rip),%rsi # 36b43f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2558>\n \tlea 0xb5cff(%rip),%rcx # 303a9c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2982c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f51d4(%rip),%rsi # 36b42f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2560>\n+\tlea 0x368f61d4(%rip),%rsi # 36b43f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2560>\n \tlea 0xb5d1f(%rip),%rcx # 303aea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2987a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f51ae(%rip),%rsi # 36b42fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2568>\n+\tlea 0x368f61ae(%rip),%rsi # 36b43fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2568>\n \tlea 0xb5d3f(%rip),%rcx # 303b38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x298c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5188(%rip),%rsi # 36b42fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2570>\n+\tlea 0x368f6188(%rip),%rsi # 36b43fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2570>\n \tlea 0xb5d5d(%rip),%rcx # 303b84 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29914>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5162(%rip),%rsi # 36b42fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2578>\n+\tlea 0x368f6162(%rip),%rsi # 36b43fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2578>\n \tlea 0xb5d7b(%rip),%rcx # 303bd0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29960>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f513c(%rip),%rsi # 36b42fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2580>\n+\tlea 0x368f613c(%rip),%rsi # 36b43fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2580>\n \tlea 0xb5d9b(%rip),%rcx # 303c1e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x299ae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5116(%rip),%rsi # 36b42fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2588>\n+\tlea 0x368f6116(%rip),%rsi # 36b43fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2588>\n \tlea 0xb5dbb(%rip),%rcx # 303c6c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x299fc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f50f0(%rip),%rsi # 36b42fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2590>\n+\tlea 0x368f60f0(%rip),%rsi # 36b43fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2590>\n \tlea 0xb5dd9(%rip),%rcx # 303cb8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29a48>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f50ca(%rip),%rsi # 36b42fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2598>\n+\tlea 0x368f60ca(%rip),%rsi # 36b43fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2598>\n \tlea 0xb5df7(%rip),%rcx # 303d04 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29a94>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f50a4(%rip),%rsi # 36b42fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a0>\n+\tlea 0x368f60a4(%rip),%rsi # 36b43fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a0>\n \tlea 0xb5e17(%rip),%rcx # 303d52 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29ae2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f507e(%rip),%rsi # 36b42fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a8>\n+\tlea 0x368f607e(%rip),%rsi # 36b43fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a8>\n \tlea 0xb5e37(%rip),%rcx # 303da0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29b30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5058(%rip),%rsi # 36b42fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b0>\n+\tlea 0x368f6058(%rip),%rsi # 36b43fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b0>\n \tlea 0xb5e55(%rip),%rcx # 303dec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29b7c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f5032(%rip),%rsi # 36b42ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b8>\n+\tlea 0x368f6032(%rip),%rsi # 36b43ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b8>\n \tlea 0xb5e73(%rip),%rcx # 303e38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29bc8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f500c(%rip),%rsi # 36b42ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c0>\n+\tlea 0x368f600c(%rip),%rsi # 36b43ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c0>\n \tlea 0xb5e93(%rip),%rcx # 303e86 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29c16>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f4fe6(%rip),%rsi # 36b43000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c8>\n+\tlea 0x368f5fe6(%rip),%rsi # 36b44000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c8>\n \tlea 0xb5eb3(%rip),%rcx # 303ed4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29c64>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f4fc0(%rip),%rsi # 36b43008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d0>\n+\tlea 0x368f5fc0(%rip),%rsi # 36b44008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d0>\n \tlea 0xb5ed2(%rip),%rcx # 303f21 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29cb1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f4f9a(%rip),%rsi # 36b43010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d8>\n+\tlea 0x368f5f9a(%rip),%rsi # 36b44010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d8>\n \tlea 0xb5ef1(%rip),%rcx # 303f6e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29cfe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368f4f74(%rip),%rsi # 36b43018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e0>\n+\tlea 0x368f5f74(%rip),%rsi # 36b44018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e0>\n \tlea 0xb5f12(%rip),%rcx # 303fbd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29d4d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4f37(%rip),%rsi # 36b43020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e8>\n+\tlea 0x368f5f37(%rip),%rsi # 36b44020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e8>\n \tlea 0xb5f1c(%rip),%rcx # 30400c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29d9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4efa(%rip),%rsi # 36b43028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f0>\n+\tlea 0x368f5efa(%rip),%rsi # 36b44028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f0>\n \tlea 0xb5f24(%rip),%rcx # 304059 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29de9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4ebd(%rip),%rsi # 36b43030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f8>\n+\tlea 0x368f5ebd(%rip),%rsi # 36b44030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f8>\n \tlea 0xb5f2c(%rip),%rcx # 3040a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29e36>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4e80(%rip),%rsi # 36b43038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2600>\n+\tlea 0x368f5e80(%rip),%rsi # 36b44038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2600>\n \tlea 0xb5f36(%rip),%rcx # 3040f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29e85>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4e43(%rip),%rsi # 36b43040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2608>\n+\tlea 0x368f5e43(%rip),%rsi # 36b44040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2608>\n \tlea 0xb5f40(%rip),%rcx # 304144 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29ed4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4e06(%rip),%rsi # 36b43048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2610>\n+\tlea 0x368f5e06(%rip),%rsi # 36b44048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2610>\n \tlea 0xb5f48(%rip),%rcx # 304191 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29f21>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4dc9(%rip),%rsi # 36b43050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2618>\n+\tlea 0x368f5dc9(%rip),%rsi # 36b44050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2618>\n \tlea 0xb5f50(%rip),%rcx # 3041de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29f6e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4d8c(%rip),%rsi # 36b43058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2620>\n+\tlea 0x368f5d8c(%rip),%rsi # 36b44058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2620>\n \tlea 0xb5f5a(%rip),%rcx # 30422d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x29fbd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4d4f(%rip),%rsi # 36b43060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2628>\n+\tlea 0x368f5d4f(%rip),%rsi # 36b44060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2628>\n \tlea 0xb5f64(%rip),%rcx # 30427c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a00c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4d12(%rip),%rsi # 36b43068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2630>\n+\tlea 0x368f5d12(%rip),%rsi # 36b44068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2630>\n \tlea 0xb5f6c(%rip),%rcx # 3042c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a059>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4cd5(%rip),%rsi # 36b43070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2638>\n+\tlea 0x368f5cd5(%rip),%rsi # 36b44070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2638>\n \tlea 0xb5f74(%rip),%rcx # 304316 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a0a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368f4c98(%rip),%rsi # 36b43078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2640>\n+\tlea 0x368f5c98(%rip),%rsi # 36b44078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2640>\n \tlea 0xb5f7e(%rip),%rcx # 304365 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a0f5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 24e410 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x368f8099(%rip),%rdi # 36b464b0 ::get_beta()::val@@Base+0x198>\n+\tmov 0x368f9099(%rip),%rdi # 36b474b0 ::get_beta()::val@@Base+0x198>\n \ttest %rdi,%rdi\n \tje 24e431 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x368f8083(%rip) # 36b464b0 ::get_beta()::val@@Base+0x198>\n+\tmovq $0x0,0x368f9083(%rip) # 36b474b0 ::get_beta()::val@@Base+0x198>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000024e440 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)3>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -494559,15 +494559,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f1f69(%rip),%rdi # 36b43058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2620>\n+\tlea 0x368f2f69(%rip),%rdi # 36b44058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2620>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2513df (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -494703,15 +494703,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f1c90(%rip),%rdi # 36b43050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2618>\n+\tlea 0x368f2c90(%rip),%rdi # 36b44050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2618>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -494862,15 +494862,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f1933(%rip),%rdi # 36b42ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c0>\n+\tlea 0x368f2933(%rip),%rdi # 36b43ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2519b5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -495006,15 +495006,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f165a(%rip),%rdi # 36b42ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b8>\n+\tlea 0x368f265a(%rip),%rdi # 36b43ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -495165,15 +495165,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f127d(%rip),%rdi # 36b42f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e0>\n+\tlea 0x368f227d(%rip),%rdi # 36b43f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 251f8b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -495309,15 +495309,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f0fa4(%rip),%rdi # 36b42f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d8>\n+\tlea 0x368f1fa4(%rip),%rdi # 36b43f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -495468,15 +495468,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f0da7(%rip),%rdi # 36b43018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e0>\n+\tlea 0x368f1da7(%rip),%rdi # 36b44018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 252561 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -495612,15 +495612,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f0ace(%rip),%rdi # 36b43010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d8>\n+\tlea 0x368f1ace(%rip),%rdi # 36b44010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -495771,15 +495771,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f0771(%rip),%rdi # 36b42fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2580>\n+\tlea 0x368f1771(%rip),%rdi # 36b43fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2580>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 252b37 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -495915,15 +495915,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f0498(%rip),%rdi # 36b42fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2578>\n+\tlea 0x368f1498(%rip),%rdi # 36b43fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2578>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -496074,15 +496074,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368f00bb(%rip),%rdi # 36b42ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a0>\n+\tlea 0x368f10bb(%rip),%rdi # 36b43ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 25310d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -496218,15 +496218,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368efde2(%rip),%rdi # 36b42ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2498>\n+\tlea 0x368f0de2(%rip),%rdi # 36b43ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2498>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -496377,15 +496377,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368efc85(%rip),%rdi # 36b43078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2640>\n+\tlea 0x368f0c85(%rip),%rdi # 36b44078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2640>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2536e3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -496521,15 +496521,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ef9ac(%rip),%rdi # 36b43070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2638>\n+\tlea 0x368f09ac(%rip),%rdi # 36b44070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2638>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -496680,15 +496680,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ef52f(%rip),%rdi # 36b42ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c0>\n+\tlea 0x368f052f(%rip),%rdi # 36b43ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 253cb9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -496824,15 +496824,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ef256(%rip),%rdi # 36b42ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b8>\n+\tlea 0x368f0256(%rip),%rdi # 36b43ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -496983,15 +496983,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368eefd9(%rip),%rdi # 36b42f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2540>\n+\tlea 0x368effd9(%rip),%rdi # 36b43f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2540>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 25428f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -497127,15 +497127,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368eed00(%rip),%rdi # 36b42f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2538>\n+\tlea 0x368efd00(%rip),%rdi # 36b43f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2538>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -497286,15 +497286,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ee923(%rip),%rdi # 36b42e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2460>\n+\tlea 0x368ef923(%rip),%rdi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2460>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 254b46 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -497436,15 +497436,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ee662(%rip),%rdi # 36b42eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2480>\n+\tlea 0x368ef662(%rip),%rdi # 36b43eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2480>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 254e3b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -497580,15 +497580,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ee369(%rip),%rdi # 36b42e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2458>\n+\tlea 0x368ef369(%rip),%rdi # 36b43e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2458>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -497733,15 +497733,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ee094(%rip),%rdi # 36b42eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2478>\n+\tlea 0x368ef094(%rip),%rdi # 36b43eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2478>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -497892,15 +497892,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ede17(%rip),%rdi # 36b42f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2500>\n+\tlea 0x368eee17(%rip),%rdi # 36b43f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2500>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 255411 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -498036,15 +498036,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368edb3e(%rip),%rdi # 36b42f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f8>\n+\tlea 0x368eeb3e(%rip),%rdi # 36b43f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x24f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -498195,15 +498195,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ed941(%rip),%rdi # 36b43038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2600>\n+\tlea 0x368ee941(%rip),%rdi # 36b44038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2600>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2559e7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -498339,15 +498339,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ed668(%rip),%rdi # 36b43030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f8>\n+\tlea 0x368ee668(%rip),%rdi # 36b44030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -498498,15 +498498,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ed28b(%rip),%rdi # 36b42f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2520>\n+\tlea 0x368ee28b(%rip),%rdi # 36b43f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2520>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 255fbd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -498642,15 +498642,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ecfb2(%rip),%rdi # 36b42f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2518>\n+\tlea 0x368edfb2(%rip),%rdi # 36b43f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2518>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -498801,15 +498801,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ecd35(%rip),%rdi # 36b42fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a0>\n+\tlea 0x368edd35(%rip),%rdi # 36b43fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x25a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 256593 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -498945,15 +498945,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368eca5c(%rip),%rdi # 36b42fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2598>\n+\tlea 0x368eda5c(%rip),%rdi # 36b43fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2598>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -499104,15 +499104,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ec71f(%rip),%rdi # 36b42f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2560>\n+\tlea 0x368ed71f(%rip),%rdi # 36b43f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2560>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 256b69 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -499248,15 +499248,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ec446(%rip),%rdi # 36b42f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2558>\n+\tlea 0x368ed446(%rip),%rdi # 36b43f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2558>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -501099,15 +501099,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 24a940 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 2583bd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x368ecb57(%rip),%rax \n+\tmov 0x368edb57(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x9d458(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x9d457(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -501397,15 +501397,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368ea6b8(%rip),%rdi # 36b43080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2648>\n+\tlea 0x368eb6b8(%rip),%rdi # 36b44080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2648>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501466,15 +501466,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368ea500(%rip),%rdi # 36b43088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2650>\n+\tlea 0x368eb500(%rip),%rdi # 36b44088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2650>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501515,15 +501515,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368ea3e6(%rip),%rdi # 36b43090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2658>\n+\tlea 0x368eb3e6(%rip),%rdi # 36b44090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2658>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501564,15 +501564,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368ea2ce(%rip),%rdi # 36b43098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2660>\n+\tlea 0x368eb2ce(%rip),%rdi # 36b44098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2660>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501633,15 +501633,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368ea118(%rip),%rdi # 36b430a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2668>\n+\tlea 0x368eb118(%rip),%rdi # 36b440a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2668>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501702,15 +501702,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e9f60(%rip),%rdi # 36b430a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2670>\n+\tlea 0x368eaf60(%rip),%rdi # 36b440a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2670>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501751,15 +501751,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e9e46(%rip),%rdi # 36b430b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2678>\n+\tlea 0x368eae46(%rip),%rdi # 36b440b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2678>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501800,15 +501800,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e9d2e(%rip),%rdi # 36b430b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2680>\n+\tlea 0x368ead2e(%rip),%rdi # 36b440b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2680>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501869,15 +501869,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e9b78(%rip),%rdi # 36b430c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2688>\n+\tlea 0x368eab78(%rip),%rdi # 36b440c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2688>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501938,15 +501938,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e99c0(%rip),%rdi # 36b430c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2690>\n+\tlea 0x368ea9c0(%rip),%rdi # 36b440c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2690>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -501987,15 +501987,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e98a6(%rip),%rdi # 36b430d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2698>\n+\tlea 0x368ea8a6(%rip),%rdi # 36b440d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2698>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502036,15 +502036,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e978e(%rip),%rdi # 36b430d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a0>\n+\tlea 0x368ea78e(%rip),%rdi # 36b440d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502105,15 +502105,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e95d8(%rip),%rdi # 36b430e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a8>\n+\tlea 0x368ea5d8(%rip),%rdi # 36b440e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502174,15 +502174,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e9420(%rip),%rdi # 36b430e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b0>\n+\tlea 0x368ea420(%rip),%rdi # 36b440e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502223,15 +502223,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e9306(%rip),%rdi # 36b430f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b8>\n+\tlea 0x368ea306(%rip),%rdi # 36b440f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502272,15 +502272,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e91ee(%rip),%rdi # 36b430f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c0>\n+\tlea 0x368ea1ee(%rip),%rdi # 36b440f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502341,15 +502341,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e9038(%rip),%rdi # 36b43100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c8>\n+\tlea 0x368ea038(%rip),%rdi # 36b44100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502410,15 +502410,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e8e80(%rip),%rdi # 36b43108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d0>\n+\tlea 0x368e9e80(%rip),%rdi # 36b44108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502459,15 +502459,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e8d66(%rip),%rdi # 36b43110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d8>\n+\tlea 0x368e9d66(%rip),%rdi # 36b44110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502508,15 +502508,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e8c4e(%rip),%rdi # 36b43118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e0>\n+\tlea 0x368e9c4e(%rip),%rdi # 36b44118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502577,15 +502577,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e8a98(%rip),%rdi # 36b43120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e8>\n+\tlea 0x368e9a98(%rip),%rdi # 36b44120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502646,15 +502646,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e88e0(%rip),%rdi # 36b43128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f0>\n+\tlea 0x368e98e0(%rip),%rdi # 36b44128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502695,15 +502695,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e87c6(%rip),%rdi # 36b43130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f8>\n+\tlea 0x368e97c6(%rip),%rdi # 36b44130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502744,15 +502744,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e86ae(%rip),%rdi # 36b43138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2700>\n+\tlea 0x368e96ae(%rip),%rdi # 36b44138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2700>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502813,15 +502813,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e84f8(%rip),%rdi # 36b43140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2708>\n+\tlea 0x368e94f8(%rip),%rdi # 36b44140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2708>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502882,15 +502882,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e8340(%rip),%rdi # 36b43148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2710>\n+\tlea 0x368e9340(%rip),%rdi # 36b44148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2710>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502931,15 +502931,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e8226(%rip),%rdi # 36b43150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2718>\n+\tlea 0x368e9226(%rip),%rdi # 36b44150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2718>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -502980,15 +502980,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e810e(%rip),%rdi # 36b43158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2720>\n+\tlea 0x368e910e(%rip),%rdi # 36b44158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2720>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503049,15 +503049,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e7f58(%rip),%rdi # 36b43160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2728>\n+\tlea 0x368e8f58(%rip),%rdi # 36b44160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2728>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503118,15 +503118,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e7da0(%rip),%rdi # 36b43168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2730>\n+\tlea 0x368e8da0(%rip),%rdi # 36b44168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2730>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503167,15 +503167,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e7c86(%rip),%rdi # 36b43170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2738>\n+\tlea 0x368e8c86(%rip),%rdi # 36b44170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2738>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503216,15 +503216,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e7b6e(%rip),%rdi # 36b43178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2740>\n+\tlea 0x368e8b6e(%rip),%rdi # 36b44178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2740>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503285,15 +503285,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e79b8(%rip),%rdi # 36b43180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2748>\n+\tlea 0x368e89b8(%rip),%rdi # 36b44180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2748>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503354,15 +503354,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e7800(%rip),%rdi # 36b43188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2750>\n+\tlea 0x368e8800(%rip),%rdi # 36b44188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2750>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503403,15 +503403,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e76e6(%rip),%rdi # 36b43190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2758>\n+\tlea 0x368e86e6(%rip),%rdi # 36b44190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2758>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503452,15 +503452,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e75ce(%rip),%rdi # 36b43198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2760>\n+\tlea 0x368e85ce(%rip),%rdi # 36b44198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2760>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503521,15 +503521,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e7418(%rip),%rdi # 36b431a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2768>\n+\tlea 0x368e8418(%rip),%rdi # 36b441a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2768>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503590,15 +503590,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e7260(%rip),%rdi # 36b431a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2770>\n+\tlea 0x368e8260(%rip),%rdi # 36b441a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2770>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503639,15 +503639,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e7146(%rip),%rdi # 36b431b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2778>\n+\tlea 0x368e8146(%rip),%rdi # 36b441b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2778>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503688,15 +503688,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e702e(%rip),%rdi # 36b431b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2780>\n+\tlea 0x368e802e(%rip),%rdi # 36b441b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2780>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503757,15 +503757,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e6e78(%rip),%rdi # 36b431c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2788>\n+\tlea 0x368e7e78(%rip),%rdi # 36b441c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2788>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503826,15 +503826,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e6cc0(%rip),%rdi # 36b431c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2790>\n+\tlea 0x368e7cc0(%rip),%rdi # 36b441c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2790>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503875,15 +503875,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e6ba6(%rip),%rdi # 36b431d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2798>\n+\tlea 0x368e7ba6(%rip),%rdi # 36b441d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2798>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503924,15 +503924,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e6a8e(%rip),%rdi # 36b431d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a0>\n+\tlea 0x368e7a8e(%rip),%rdi # 36b441d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -503993,15 +503993,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e68d8(%rip),%rdi # 36b431e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a8>\n+\tlea 0x368e78d8(%rip),%rdi # 36b441e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504062,15 +504062,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e6720(%rip),%rdi # 36b431e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b0>\n+\tlea 0x368e7720(%rip),%rdi # 36b441e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504111,15 +504111,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e6606(%rip),%rdi # 36b431f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b8>\n+\tlea 0x368e7606(%rip),%rdi # 36b441f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504160,15 +504160,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e64ee(%rip),%rdi # 36b431f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c0>\n+\tlea 0x368e74ee(%rip),%rdi # 36b441f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504229,15 +504229,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e6338(%rip),%rdi # 36b43200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c8>\n+\tlea 0x368e7338(%rip),%rdi # 36b44200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504298,15 +504298,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e6180(%rip),%rdi # 36b43208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d0>\n+\tlea 0x368e7180(%rip),%rdi # 36b44208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504347,15 +504347,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e6066(%rip),%rdi # 36b43210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d8>\n+\tlea 0x368e7066(%rip),%rdi # 36b44210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504396,15 +504396,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e5f4e(%rip),%rdi # 36b43218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e0>\n+\tlea 0x368e6f4e(%rip),%rdi # 36b44218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504465,15 +504465,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e5d98(%rip),%rdi # 36b43220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e8>\n+\tlea 0x368e6d98(%rip),%rdi # 36b44220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504534,15 +504534,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e5be0(%rip),%rdi # 36b43228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f0>\n+\tlea 0x368e6be0(%rip),%rdi # 36b44228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504583,15 +504583,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e5ac6(%rip),%rdi # 36b43230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f8>\n+\tlea 0x368e6ac6(%rip),%rdi # 36b44230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504632,15 +504632,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e59ae(%rip),%rdi # 36b43238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2800>\n+\tlea 0x368e69ae(%rip),%rdi # 36b44238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2800>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504701,15 +504701,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e57f8(%rip),%rdi # 36b43240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2808>\n+\tlea 0x368e67f8(%rip),%rdi # 36b44240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2808>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504770,15 +504770,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e5640(%rip),%rdi # 36b43248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2810>\n+\tlea 0x368e6640(%rip),%rdi # 36b44248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2810>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504819,15 +504819,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e5526(%rip),%rdi # 36b43250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2818>\n+\tlea 0x368e6526(%rip),%rdi # 36b44250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2818>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504868,15 +504868,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e540e(%rip),%rdi # 36b43258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2820>\n+\tlea 0x368e640e(%rip),%rdi # 36b44258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2820>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -504937,15 +504937,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e5258(%rip),%rdi # 36b43260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2828>\n+\tlea 0x368e6258(%rip),%rdi # 36b44260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2828>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -505006,15 +505006,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368e50a0(%rip),%rdi # 36b43268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2830>\n+\tlea 0x368e60a0(%rip),%rdi # 36b44268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2830>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -505055,15 +505055,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e4f86(%rip),%rdi # 36b43270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2838>\n+\tlea 0x368e5f86(%rip),%rdi # 36b44270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2838>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -505104,696 +505104,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368e4e6e(%rip),%rdi # 36b43278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2840>\n+\tlea 0x368e5e6e(%rip),%rdi # 36b44278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2840>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368e807c(%rip),%rbx # 36b464b8 ::get_beta()::val@@Base+0x1a0>\n+\tmov 0x368e907c(%rip),%rbx # 36b474b8 ::get_beta()::val@@Base+0x1a0>\n \ttest %rbx,%rbx\n \tjne 25e457 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x368e7280(%rip),%rdi # 36b456c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c90>\n+\tlea 0x368e8280(%rip),%rdi # 36b466c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4c90>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368e8061(%rip) # 36b464b8 ::get_beta()::val@@Base+0x1a0>\n+\tmov %rax,0x368e9061(%rip) # 36b474b8 ::get_beta()::val@@Base+0x1a0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4c16(%rip),%rsi # 36b43080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2648>\n+\tlea 0x368e5c16(%rip),%rsi # 36b44080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2648>\n \tlea 0xa5f43(%rip),%rcx # 3043b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a144>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4bf0(%rip),%rsi # 36b43088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2650>\n+\tlea 0x368e5bf0(%rip),%rsi # 36b44088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2650>\n \tlea 0xa5f61(%rip),%rcx # 304400 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a190>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4bca(%rip),%rsi # 36b43090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2658>\n+\tlea 0x368e5bca(%rip),%rsi # 36b44090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2658>\n \tlea 0xa5f7f(%rip),%rcx # 30444c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a1dc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4ba4(%rip),%rsi # 36b43098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2660>\n+\tlea 0x368e5ba4(%rip),%rsi # 36b44098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2660>\n \tlea 0xa5f9f(%rip),%rcx # 30449a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a22a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4b7e(%rip),%rsi # 36b430a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2668>\n+\tlea 0x368e5b7e(%rip),%rsi # 36b440a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2668>\n \tlea 0xa5fbf(%rip),%rcx # 3044e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a278>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4b58(%rip),%rsi # 36b430a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2670>\n+\tlea 0x368e5b58(%rip),%rsi # 36b440a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2670>\n \tlea 0xa5fde(%rip),%rcx # 304535 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a2c5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4b32(%rip),%rsi # 36b430b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2678>\n+\tlea 0x368e5b32(%rip),%rsi # 36b440b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2678>\n \tlea 0xa5ffd(%rip),%rcx # 304582 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a312>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4b0c(%rip),%rsi # 36b430b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2680>\n+\tlea 0x368e5b0c(%rip),%rsi # 36b440b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2680>\n \tlea 0xa601e(%rip),%rcx # 3045d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a361>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4ae6(%rip),%rsi # 36b430c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2688>\n+\tlea 0x368e5ae6(%rip),%rsi # 36b440c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2688>\n \tlea 0xa603f(%rip),%rcx # 304620 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a3b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4ac0(%rip),%rsi # 36b430c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2690>\n+\tlea 0x368e5ac0(%rip),%rsi # 36b440c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2690>\n \tlea 0xa605e(%rip),%rcx # 30466d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a3fd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4a9a(%rip),%rsi # 36b430d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2698>\n+\tlea 0x368e5a9a(%rip),%rsi # 36b440d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2698>\n \tlea 0xa607d(%rip),%rcx # 3046ba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a44a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4a74(%rip),%rsi # 36b430d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a0>\n+\tlea 0x368e5a74(%rip),%rsi # 36b440d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a0>\n \tlea 0xa609e(%rip),%rcx # 304709 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a499>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4a4e(%rip),%rsi # 36b430e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a8>\n+\tlea 0x368e5a4e(%rip),%rsi # 36b440e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a8>\n \tlea 0xa60bf(%rip),%rcx # 304758 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a4e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4a28(%rip),%rsi # 36b430e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b0>\n+\tlea 0x368e5a28(%rip),%rsi # 36b440e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b0>\n \tlea 0xa60de(%rip),%rcx # 3047a5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a535>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4a02(%rip),%rsi # 36b430f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b8>\n+\tlea 0x368e5a02(%rip),%rsi # 36b440f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b8>\n \tlea 0xa60fd(%rip),%rcx # 3047f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a582>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e49dc(%rip),%rsi # 36b430f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c0>\n+\tlea 0x368e59dc(%rip),%rsi # 36b440f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c0>\n \tlea 0xa611e(%rip),%rcx # 304841 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a5d1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e49b6(%rip),%rsi # 36b43100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c8>\n+\tlea 0x368e59b6(%rip),%rsi # 36b44100 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c8>\n \tlea 0xa613f(%rip),%rcx # 304890 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a620>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4990(%rip),%rsi # 36b43108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d0>\n+\tlea 0x368e5990(%rip),%rsi # 36b44108 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d0>\n \tlea 0xa615e(%rip),%rcx # 3048dd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a66d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e496a(%rip),%rsi # 36b43110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d8>\n+\tlea 0x368e596a(%rip),%rsi # 36b44110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d8>\n \tlea 0xa617d(%rip),%rcx # 30492a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a6ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4944(%rip),%rsi # 36b43118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e0>\n+\tlea 0x368e5944(%rip),%rsi # 36b44118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e0>\n \tlea 0xa619e(%rip),%rcx # 304979 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a709>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e491e(%rip),%rsi # 36b43120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e8>\n+\tlea 0x368e591e(%rip),%rsi # 36b44120 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e8>\n \tlea 0xa61bf(%rip),%rcx # 3049c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a758>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e48f8(%rip),%rsi # 36b43128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f0>\n+\tlea 0x368e58f8(%rip),%rsi # 36b44128 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f0>\n \tlea 0xa61de(%rip),%rcx # 304a15 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a7a5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e48d2(%rip),%rsi # 36b43130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f8>\n+\tlea 0x368e58d2(%rip),%rsi # 36b44130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f8>\n \tlea 0xa61fd(%rip),%rcx # 304a62 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a7f2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e48ac(%rip),%rsi # 36b43138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2700>\n+\tlea 0x368e58ac(%rip),%rsi # 36b44138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2700>\n \tlea 0xa621e(%rip),%rcx # 304ab1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a841>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4886(%rip),%rsi # 36b43140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2708>\n+\tlea 0x368e5886(%rip),%rsi # 36b44140 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2708>\n \tlea 0xa623f(%rip),%rcx # 304b00 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a890>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4860(%rip),%rsi # 36b43148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2710>\n+\tlea 0x368e5860(%rip),%rsi # 36b44148 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2710>\n \tlea 0xa625e(%rip),%rcx # 304b4d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a8dd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e483a(%rip),%rsi # 36b43150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2718>\n+\tlea 0x368e583a(%rip),%rsi # 36b44150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2718>\n \tlea 0xa627d(%rip),%rcx # 304b9a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a92a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4814(%rip),%rsi # 36b43158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2720>\n+\tlea 0x368e5814(%rip),%rsi # 36b44158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2720>\n \tlea 0xa629e(%rip),%rcx # 304be9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a979>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e47ee(%rip),%rsi # 36b43160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2728>\n+\tlea 0x368e57ee(%rip),%rsi # 36b44160 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2728>\n \tlea 0xa62bf(%rip),%rcx # 304c38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2a9c8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e47c8(%rip),%rsi # 36b43168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2730>\n+\tlea 0x368e57c8(%rip),%rsi # 36b44168 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2730>\n \tlea 0xa62de(%rip),%rcx # 304c85 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2aa15>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e47a2(%rip),%rsi # 36b43170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2738>\n+\tlea 0x368e57a2(%rip),%rsi # 36b44170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2738>\n \tlea 0xa62fd(%rip),%rcx # 304cd2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2aa62>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e477c(%rip),%rsi # 36b43178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2740>\n+\tlea 0x368e577c(%rip),%rsi # 36b44178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2740>\n \tlea 0xa631e(%rip),%rcx # 304d21 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2aab1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4756(%rip),%rsi # 36b43180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2748>\n+\tlea 0x368e5756(%rip),%rsi # 36b44180 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2748>\n \tlea 0xa633f(%rip),%rcx # 304d70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ab00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4730(%rip),%rsi # 36b43188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2750>\n+\tlea 0x368e5730(%rip),%rsi # 36b44188 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2750>\n \tlea 0xa635e(%rip),%rcx # 304dbd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ab4d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e470a(%rip),%rsi # 36b43190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2758>\n+\tlea 0x368e570a(%rip),%rsi # 36b44190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2758>\n \tlea 0xa637d(%rip),%rcx # 304e0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ab9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e46e4(%rip),%rsi # 36b43198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2760>\n+\tlea 0x368e56e4(%rip),%rsi # 36b44198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2760>\n \tlea 0xa639e(%rip),%rcx # 304e59 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2abe9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e46be(%rip),%rsi # 36b431a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2768>\n+\tlea 0x368e56be(%rip),%rsi # 36b441a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2768>\n \tlea 0xa63bf(%rip),%rcx # 304ea8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ac38>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4698(%rip),%rsi # 36b431a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2770>\n+\tlea 0x368e5698(%rip),%rsi # 36b441a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2770>\n \tlea 0xa63de(%rip),%rcx # 304ef5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ac85>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4672(%rip),%rsi # 36b431b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2778>\n+\tlea 0x368e5672(%rip),%rsi # 36b441b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2778>\n \tlea 0xa63fd(%rip),%rcx # 304f42 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2acd2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e464c(%rip),%rsi # 36b431b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2780>\n+\tlea 0x368e564c(%rip),%rsi # 36b441b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2780>\n \tlea 0xa641e(%rip),%rcx # 304f91 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ad21>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4626(%rip),%rsi # 36b431c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2788>\n+\tlea 0x368e5626(%rip),%rsi # 36b441c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2788>\n \tlea 0xa643f(%rip),%rcx # 304fe0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ad70>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4600(%rip),%rsi # 36b431c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2790>\n+\tlea 0x368e5600(%rip),%rsi # 36b441c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2790>\n \tlea 0xa645e(%rip),%rcx # 30502d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2adbd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e45da(%rip),%rsi # 36b431d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2798>\n+\tlea 0x368e55da(%rip),%rsi # 36b441d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2798>\n \tlea 0xa647d(%rip),%rcx # 30507a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ae0a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e45b4(%rip),%rsi # 36b431d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a0>\n+\tlea 0x368e55b4(%rip),%rsi # 36b441d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a0>\n \tlea 0xa649e(%rip),%rcx # 3050c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ae59>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e458e(%rip),%rsi # 36b431e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a8>\n+\tlea 0x368e558e(%rip),%rsi # 36b441e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a8>\n \tlea 0xa64bf(%rip),%rcx # 305118 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2aea8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4568(%rip),%rsi # 36b431e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b0>\n+\tlea 0x368e5568(%rip),%rsi # 36b441e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b0>\n \tlea 0xa64de(%rip),%rcx # 305165 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2aef5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4542(%rip),%rsi # 36b431f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b8>\n+\tlea 0x368e5542(%rip),%rsi # 36b441f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b8>\n \tlea 0xa64fd(%rip),%rcx # 3051b2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2af42>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e451c(%rip),%rsi # 36b431f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c0>\n+\tlea 0x368e551c(%rip),%rsi # 36b441f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c0>\n \tlea 0xa651e(%rip),%rcx # 305201 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2af91>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e44f6(%rip),%rsi # 36b43200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c8>\n+\tlea 0x368e54f6(%rip),%rsi # 36b44200 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c8>\n \tlea 0xa653f(%rip),%rcx # 305250 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2afe0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e44d0(%rip),%rsi # 36b43208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d0>\n+\tlea 0x368e54d0(%rip),%rsi # 36b44208 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d0>\n \tlea 0xa655f(%rip),%rcx # 30529e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b02e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e44aa(%rip),%rsi # 36b43210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d8>\n+\tlea 0x368e54aa(%rip),%rsi # 36b44210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d8>\n \tlea 0xa657f(%rip),%rcx # 3052ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b07c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368e4484(%rip),%rsi # 36b43218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e0>\n+\tlea 0x368e5484(%rip),%rsi # 36b44218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e0>\n \tlea 0xa65a1(%rip),%rcx # 30533c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b0cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e4447(%rip),%rsi # 36b43220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e8>\n+\tlea 0x368e5447(%rip),%rsi # 36b44220 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e8>\n \tlea 0xa65ac(%rip),%rcx # 30538c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b11c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e440a(%rip),%rsi # 36b43228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f0>\n+\tlea 0x368e540a(%rip),%rsi # 36b44228 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f0>\n \tlea 0xa65b5(%rip),%rcx # 3053da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b16a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e43cd(%rip),%rsi # 36b43230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f8>\n+\tlea 0x368e53cd(%rip),%rsi # 36b44230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f8>\n \tlea 0xa65be(%rip),%rcx # 305428 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b1b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e4390(%rip),%rsi # 36b43238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2800>\n+\tlea 0x368e5390(%rip),%rsi # 36b44238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2800>\n \tlea 0xa65c9(%rip),%rcx # 305478 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b208>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e4353(%rip),%rsi # 36b43240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2808>\n+\tlea 0x368e5353(%rip),%rsi # 36b44240 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2808>\n \tlea 0xa65d4(%rip),%rcx # 3054c8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b258>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e4316(%rip),%rsi # 36b43248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2810>\n+\tlea 0x368e5316(%rip),%rsi # 36b44248 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2810>\n \tlea 0xa65dd(%rip),%rcx # 305516 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b2a6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e42d9(%rip),%rsi # 36b43250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2818>\n+\tlea 0x368e52d9(%rip),%rsi # 36b44250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2818>\n \tlea 0xa65e6(%rip),%rcx # 305564 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b2f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e429c(%rip),%rsi # 36b43258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2820>\n+\tlea 0x368e529c(%rip),%rsi # 36b44258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2820>\n \tlea 0xa65f1(%rip),%rcx # 3055b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b344>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e425f(%rip),%rsi # 36b43260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2828>\n+\tlea 0x368e525f(%rip),%rsi # 36b44260 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2828>\n \tlea 0xa65fc(%rip),%rcx # 305604 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b394>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e4222(%rip),%rsi # 36b43268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2830>\n+\tlea 0x368e5222(%rip),%rsi # 36b44268 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2830>\n \tlea 0xa6605(%rip),%rcx # 305652 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b3e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e41e5(%rip),%rsi # 36b43270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2838>\n+\tlea 0x368e51e5(%rip),%rsi # 36b44270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2838>\n \tlea 0xa660e(%rip),%rcx # 3056a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b430>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368e41a8(%rip),%rsi # 36b43278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2840>\n+\tlea 0x368e51a8(%rip),%rsi # 36b44278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2840>\n \tlea 0xa6619(%rip),%rcx # 3056f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b480>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 25f100 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x368e73b1(%rip),%rdi # 36b464b8 ::get_beta()::val@@Base+0x1a0>\n+\tmov 0x368e83b1(%rip),%rdi # 36b474b8 ::get_beta()::val@@Base+0x1a0>\n \ttest %rdi,%rdi\n \tje 25f121 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x368e739b(%rip) # 36b464b8 ::get_beta()::val@@Base+0x1a0>\n+\tmovq $0x0,0x368e839b(%rip) # 36b474b8 ::get_beta()::val@@Base+0x1a0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000025f130 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)12>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -509604,15 +509604,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e1319(%rip),%rdi # 36b43258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2820>\n+\tlea 0x368e2319(%rip),%rdi # 36b44258 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2820>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 26222f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x30ff>\n \tmovabs $0x800000020,%rdx\n@@ -509748,15 +509748,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e1040(%rip),%rdi # 36b43250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2818>\n+\tlea 0x368e2040(%rip),%rdi # 36b44250 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2818>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -509907,15 +509907,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e0ce3(%rip),%rdi # 36b431f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c0>\n+\tlea 0x368e1ce3(%rip),%rdi # 36b441f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 262805 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x36d5>\n \tmovabs $0x800000020,%rdx\n@@ -510051,15 +510051,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e0a0a(%rip),%rdi # 36b431f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b8>\n+\tlea 0x368e1a0a(%rip),%rdi # 36b441f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -510210,15 +510210,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e062d(%rip),%rdi # 36b43118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e0>\n+\tlea 0x368e162d(%rip),%rdi # 36b44118 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 262ddb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3cab>\n \tmovabs $0x800000020,%rdx\n@@ -510354,15 +510354,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e0354(%rip),%rdi # 36b43110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d8>\n+\tlea 0x368e1354(%rip),%rdi # 36b44110 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -510513,15 +510513,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368e0157(%rip),%rdi # 36b43218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e0>\n+\tlea 0x368e1157(%rip),%rdi # 36b44218 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2633b1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4281>\n \tmovabs $0x800000020,%rdx\n@@ -510657,15 +510657,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dfe7e(%rip),%rdi # 36b43210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d8>\n+\tlea 0x368e0e7e(%rip),%rdi # 36b44210 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -510816,15 +510816,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dfb21(%rip),%rdi # 36b431b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2780>\n+\tlea 0x368e0b21(%rip),%rdi # 36b441b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2780>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 263987 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4857>\n \tmovabs $0x800000020,%rdx\n@@ -510960,15 +510960,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368df848(%rip),%rdi # 36b431b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2778>\n+\tlea 0x368e0848(%rip),%rdi # 36b441b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2778>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -511119,15 +511119,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368df46b(%rip),%rdi # 36b430d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a0>\n+\tlea 0x368e046b(%rip),%rdi # 36b440d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 263f5d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4e2d>\n \tmovabs $0x800000020,%rdx\n@@ -511263,15 +511263,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368df192(%rip),%rdi # 36b430d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2698>\n+\tlea 0x368e0192(%rip),%rdi # 36b440d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2698>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -511422,15 +511422,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368df035(%rip),%rdi # 36b43278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2840>\n+\tlea 0x368e0035(%rip),%rdi # 36b44278 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2840>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 264533 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5403>\n \tmovabs $0x800000020,%rdx\n@@ -511566,15 +511566,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ded5c(%rip),%rdi # 36b43270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2838>\n+\tlea 0x368dfd5c(%rip),%rdi # 36b44270 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2838>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -511725,15 +511725,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368de8df(%rip),%rdi # 36b430f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c0>\n+\tlea 0x368df8df(%rip),%rdi # 36b440f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 264b09 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x59d9>\n \tmovabs $0x800000020,%rdx\n@@ -511869,15 +511869,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368de606(%rip),%rdi # 36b430f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b8>\n+\tlea 0x368df606(%rip),%rdi # 36b440f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -512028,15 +512028,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368de389(%rip),%rdi # 36b43178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2740>\n+\tlea 0x368df389(%rip),%rdi # 36b44178 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2740>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2650df (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5faf>\n \tmovabs $0x800000020,%rdx\n@@ -512172,15 +512172,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368de0b0(%rip),%rdi # 36b43170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2738>\n+\tlea 0x368df0b0(%rip),%rdi # 36b44170 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2738>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -512331,15 +512331,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ddcd3(%rip),%rdi # 36b43098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2660>\n+\tlea 0x368decd3(%rip),%rdi # 36b44098 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2660>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 265996 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6866>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -512481,15 +512481,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dda12(%rip),%rdi # 36b430b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2680>\n+\tlea 0x368dea12(%rip),%rdi # 36b440b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2680>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 265c8b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6b5b>\n \tmovabs $0x800000020,%rdx\n@@ -512625,15 +512625,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dd719(%rip),%rdi # 36b43090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2658>\n+\tlea 0x368de719(%rip),%rdi # 36b44090 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2658>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -512778,15 +512778,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dd444(%rip),%rdi # 36b430b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2678>\n+\tlea 0x368de444(%rip),%rdi # 36b440b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2678>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -512937,15 +512937,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dd1c7(%rip),%rdi # 36b43138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2700>\n+\tlea 0x368de1c7(%rip),%rdi # 36b44138 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2700>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 266261 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7131>\n \tmovabs $0x800000020,%rdx\n@@ -513081,15 +513081,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dceee(%rip),%rdi # 36b43130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f8>\n+\tlea 0x368ddeee(%rip),%rdi # 36b44130 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x26f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -513240,15 +513240,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dccf1(%rip),%rdi # 36b43238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2800>\n+\tlea 0x368ddcf1(%rip),%rdi # 36b44238 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2800>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 266837 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7707>\n \tmovabs $0x800000020,%rdx\n@@ -513384,15 +513384,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dca18(%rip),%rdi # 36b43230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f8>\n+\tlea 0x368dda18(%rip),%rdi # 36b44230 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -513543,15 +513543,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dc63b(%rip),%rdi # 36b43158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2720>\n+\tlea 0x368dd63b(%rip),%rdi # 36b44158 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2720>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 266e0d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7cdd>\n \tmovabs $0x800000020,%rdx\n@@ -513687,15 +513687,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dc362(%rip),%rdi # 36b43150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2718>\n+\tlea 0x368dd362(%rip),%rdi # 36b44150 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2718>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -513846,15 +513846,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dc0e5(%rip),%rdi # 36b431d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a0>\n+\tlea 0x368dd0e5(%rip),%rdi # 36b441d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x27a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2673e3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x82b3>\n \tmovabs $0x800000020,%rdx\n@@ -513990,15 +513990,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dbe0c(%rip),%rdi # 36b431d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2798>\n+\tlea 0x368dce0c(%rip),%rdi # 36b441d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2798>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -514149,15 +514149,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368dbacf(%rip),%rdi # 36b43198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2760>\n+\tlea 0x368dcacf(%rip),%rdi # 36b44198 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2760>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2679b9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8889>\n \tmovabs $0x800000020,%rdx\n@@ -514293,15 +514293,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368db7f6(%rip),%rdi # 36b43190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2758>\n+\tlea 0x368dc7f6(%rip),%rdi # 36b44190 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2758>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -516144,15 +516144,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 25b630 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 26920d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xa0dd>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x368dbd07(%rip),%rax \n+\tmov 0x368dcd07(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x8c608(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x8c607(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -516442,15 +516442,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d9a68(%rip),%rdi # 36b43280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2848>\n+\tlea 0x368daa68(%rip),%rdi # 36b44280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2848>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516511,15 +516511,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d98b0(%rip),%rdi # 36b43288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2850>\n+\tlea 0x368da8b0(%rip),%rdi # 36b44288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2850>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516560,15 +516560,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d9796(%rip),%rdi # 36b43290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2858>\n+\tlea 0x368da796(%rip),%rdi # 36b44290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2858>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516609,15 +516609,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d967e(%rip),%rdi # 36b43298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2860>\n+\tlea 0x368da67e(%rip),%rdi # 36b44298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2860>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516678,15 +516678,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d94c8(%rip),%rdi # 36b432a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2868>\n+\tlea 0x368da4c8(%rip),%rdi # 36b442a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2868>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516747,15 +516747,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d9310(%rip),%rdi # 36b432a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2870>\n+\tlea 0x368da310(%rip),%rdi # 36b442a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2870>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516796,15 +516796,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d91f6(%rip),%rdi # 36b432b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2878>\n+\tlea 0x368da1f6(%rip),%rdi # 36b442b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2878>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516845,15 +516845,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d90de(%rip),%rdi # 36b432b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2880>\n+\tlea 0x368da0de(%rip),%rdi # 36b442b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2880>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516914,15 +516914,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d8f28(%rip),%rdi # 36b432c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2888>\n+\tlea 0x368d9f28(%rip),%rdi # 36b442c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2888>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -516983,15 +516983,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d8d70(%rip),%rdi # 36b432c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2890>\n+\tlea 0x368d9d70(%rip),%rdi # 36b442c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2890>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517032,15 +517032,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d8c56(%rip),%rdi # 36b432d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2898>\n+\tlea 0x368d9c56(%rip),%rdi # 36b442d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2898>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517081,15 +517081,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d8b3e(%rip),%rdi # 36b432d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a0>\n+\tlea 0x368d9b3e(%rip),%rdi # 36b442d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517150,15 +517150,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d8988(%rip),%rdi # 36b432e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a8>\n+\tlea 0x368d9988(%rip),%rdi # 36b442e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517219,15 +517219,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d87d0(%rip),%rdi # 36b432e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b0>\n+\tlea 0x368d97d0(%rip),%rdi # 36b442e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517268,15 +517268,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d86b6(%rip),%rdi # 36b432f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b8>\n+\tlea 0x368d96b6(%rip),%rdi # 36b442f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517317,15 +517317,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d859e(%rip),%rdi # 36b432f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c0>\n+\tlea 0x368d959e(%rip),%rdi # 36b442f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517386,15 +517386,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d83e8(%rip),%rdi # 36b43300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c8>\n+\tlea 0x368d93e8(%rip),%rdi # 36b44300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517455,15 +517455,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d8230(%rip),%rdi # 36b43308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d0>\n+\tlea 0x368d9230(%rip),%rdi # 36b44308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517504,15 +517504,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d8116(%rip),%rdi # 36b43310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d8>\n+\tlea 0x368d9116(%rip),%rdi # 36b44310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517553,15 +517553,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d7ffe(%rip),%rdi # 36b43318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e0>\n+\tlea 0x368d8ffe(%rip),%rdi # 36b44318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517622,15 +517622,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d7e48(%rip),%rdi # 36b43320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e8>\n+\tlea 0x368d8e48(%rip),%rdi # 36b44320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517691,15 +517691,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d7c90(%rip),%rdi # 36b43328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f0>\n+\tlea 0x368d8c90(%rip),%rdi # 36b44328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517740,15 +517740,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d7b76(%rip),%rdi # 36b43330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f8>\n+\tlea 0x368d8b76(%rip),%rdi # 36b44330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517789,15 +517789,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d7a5e(%rip),%rdi # 36b43338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2900>\n+\tlea 0x368d8a5e(%rip),%rdi # 36b44338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2900>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517858,15 +517858,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d78a8(%rip),%rdi # 36b43340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2908>\n+\tlea 0x368d88a8(%rip),%rdi # 36b44340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2908>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517927,15 +517927,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d76f0(%rip),%rdi # 36b43348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2910>\n+\tlea 0x368d86f0(%rip),%rdi # 36b44348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2910>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -517976,15 +517976,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d75d6(%rip),%rdi # 36b43350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2918>\n+\tlea 0x368d85d6(%rip),%rdi # 36b44350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2918>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518025,15 +518025,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d74be(%rip),%rdi # 36b43358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2920>\n+\tlea 0x368d84be(%rip),%rdi # 36b44358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2920>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518094,15 +518094,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d7308(%rip),%rdi # 36b43360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2928>\n+\tlea 0x368d8308(%rip),%rdi # 36b44360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2928>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518163,15 +518163,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d7150(%rip),%rdi # 36b43368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2930>\n+\tlea 0x368d8150(%rip),%rdi # 36b44368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2930>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518212,15 +518212,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d7036(%rip),%rdi # 36b43370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2938>\n+\tlea 0x368d8036(%rip),%rdi # 36b44370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2938>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518261,15 +518261,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d6f1e(%rip),%rdi # 36b43378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2940>\n+\tlea 0x368d7f1e(%rip),%rdi # 36b44378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2940>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518330,15 +518330,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d6d68(%rip),%rdi # 36b43380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2948>\n+\tlea 0x368d7d68(%rip),%rdi # 36b44380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2948>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518399,15 +518399,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d6bb0(%rip),%rdi # 36b43388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2950>\n+\tlea 0x368d7bb0(%rip),%rdi # 36b44388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2950>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518448,15 +518448,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d6a96(%rip),%rdi # 36b43390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2958>\n+\tlea 0x368d7a96(%rip),%rdi # 36b44390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2958>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518497,15 +518497,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d697e(%rip),%rdi # 36b43398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2960>\n+\tlea 0x368d797e(%rip),%rdi # 36b44398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2960>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518566,15 +518566,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d67c8(%rip),%rdi # 36b433a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2968>\n+\tlea 0x368d77c8(%rip),%rdi # 36b443a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2968>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518635,15 +518635,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d6610(%rip),%rdi # 36b433a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2970>\n+\tlea 0x368d7610(%rip),%rdi # 36b443a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2970>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518684,15 +518684,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d64f6(%rip),%rdi # 36b433b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2978>\n+\tlea 0x368d74f6(%rip),%rdi # 36b443b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2978>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518733,15 +518733,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d63de(%rip),%rdi # 36b433b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2980>\n+\tlea 0x368d73de(%rip),%rdi # 36b443b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2980>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518802,15 +518802,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d6228(%rip),%rdi # 36b433c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2988>\n+\tlea 0x368d7228(%rip),%rdi # 36b443c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2988>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518871,15 +518871,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d6070(%rip),%rdi # 36b433c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2990>\n+\tlea 0x368d7070(%rip),%rdi # 36b443c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2990>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518920,15 +518920,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d5f56(%rip),%rdi # 36b433d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2998>\n+\tlea 0x368d6f56(%rip),%rdi # 36b443d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2998>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -518969,15 +518969,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d5e3e(%rip),%rdi # 36b433d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a0>\n+\tlea 0x368d6e3e(%rip),%rdi # 36b443d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519038,15 +519038,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d5c88(%rip),%rdi # 36b433e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a8>\n+\tlea 0x368d6c88(%rip),%rdi # 36b443e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519107,15 +519107,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d5ad0(%rip),%rdi # 36b433e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b0>\n+\tlea 0x368d6ad0(%rip),%rdi # 36b443e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519156,15 +519156,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d59b6(%rip),%rdi # 36b433f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b8>\n+\tlea 0x368d69b6(%rip),%rdi # 36b443f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519205,15 +519205,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d589e(%rip),%rdi # 36b433f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c0>\n+\tlea 0x368d689e(%rip),%rdi # 36b443f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519274,15 +519274,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d56e8(%rip),%rdi # 36b43400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c8>\n+\tlea 0x368d66e8(%rip),%rdi # 36b44400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519343,15 +519343,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d5530(%rip),%rdi # 36b43408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d0>\n+\tlea 0x368d6530(%rip),%rdi # 36b44408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519392,15 +519392,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d5416(%rip),%rdi # 36b43410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d8>\n+\tlea 0x368d6416(%rip),%rdi # 36b44410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519441,15 +519441,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d52fe(%rip),%rdi # 36b43418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e0>\n+\tlea 0x368d62fe(%rip),%rdi # 36b44418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519510,15 +519510,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d5148(%rip),%rdi # 36b43420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e8>\n+\tlea 0x368d6148(%rip),%rdi # 36b44420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519579,15 +519579,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d4f90(%rip),%rdi # 36b43428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f0>\n+\tlea 0x368d5f90(%rip),%rdi # 36b44428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519628,15 +519628,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d4e76(%rip),%rdi # 36b43430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f8>\n+\tlea 0x368d5e76(%rip),%rdi # 36b44430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519677,15 +519677,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d4d5e(%rip),%rdi # 36b43438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a00>\n+\tlea 0x368d5d5e(%rip),%rdi # 36b44438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519746,15 +519746,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d4ba8(%rip),%rdi # 36b43440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a08>\n+\tlea 0x368d5ba8(%rip),%rdi # 36b44440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519815,15 +519815,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d49f0(%rip),%rdi # 36b43448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a10>\n+\tlea 0x368d59f0(%rip),%rdi # 36b44448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519864,15 +519864,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d48d6(%rip),%rdi # 36b43450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a18>\n+\tlea 0x368d58d6(%rip),%rdi # 36b44450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519913,15 +519913,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d47be(%rip),%rdi # 36b43458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a20>\n+\tlea 0x368d57be(%rip),%rdi # 36b44458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -519982,15 +519982,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d4608(%rip),%rdi # 36b43460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a28>\n+\tlea 0x368d5608(%rip),%rdi # 36b44460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -520051,15 +520051,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368d4450(%rip),%rdi # 36b43468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a30>\n+\tlea 0x368d5450(%rip),%rdi # 36b44468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -520100,15 +520100,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d4336(%rip),%rdi # 36b43470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a38>\n+\tlea 0x368d5336(%rip),%rdi # 36b44470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -520149,696 +520149,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368d421e(%rip),%rdi # 36b43478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a40>\n+\tlea 0x368d521e(%rip),%rdi # 36b44478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368d7234(%rip),%rbx # 36b464c0 ::get_beta()::val@@Base+0x1a8>\n+\tmov 0x368d8234(%rip),%rbx # 36b474c0 ::get_beta()::val@@Base+0x1a8>\n \ttest %rbx,%rbx\n \tjne 26f2a7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10177>\n-\tlea 0x368d6448(%rip),%rdi # 36b456e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ca8>\n+\tlea 0x368d7448(%rip),%rdi # 36b466e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4ca8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368d7219(%rip) # 36b464c0 ::get_beta()::val@@Base+0x1a8>\n+\tmov %rax,0x368d8219(%rip) # 36b474c0 ::get_beta()::val@@Base+0x1a8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3fc6(%rip),%rsi # 36b43280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2848>\n+\tlea 0x368d4fc6(%rip),%rsi # 36b44280 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2848>\n \tlea 0x9647f(%rip),%rcx # 305740 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b4d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3fa0(%rip),%rsi # 36b43288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2850>\n+\tlea 0x368d4fa0(%rip),%rsi # 36b44288 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2850>\n \tlea 0x9649c(%rip),%rcx # 30578b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b51b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3f7a(%rip),%rsi # 36b43290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2858>\n+\tlea 0x368d4f7a(%rip),%rsi # 36b44290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2858>\n \tlea 0x964b9(%rip),%rcx # 3057d6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b566>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3f54(%rip),%rsi # 36b43298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2860>\n+\tlea 0x368d4f54(%rip),%rsi # 36b44298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2860>\n \tlea 0x964d8(%rip),%rcx # 305823 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b5b3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3f2e(%rip),%rsi # 36b432a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2868>\n+\tlea 0x368d4f2e(%rip),%rsi # 36b442a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2868>\n \tlea 0x964f7(%rip),%rcx # 305870 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b600>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3f08(%rip),%rsi # 36b432a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2870>\n+\tlea 0x368d4f08(%rip),%rsi # 36b442a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2870>\n \tlea 0x96515(%rip),%rcx # 3058bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b64c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3ee2(%rip),%rsi # 36b432b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2878>\n+\tlea 0x368d4ee2(%rip),%rsi # 36b442b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2878>\n \tlea 0x96533(%rip),%rcx # 305908 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b698>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3ebc(%rip),%rsi # 36b432b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2880>\n+\tlea 0x368d4ebc(%rip),%rsi # 36b442b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2880>\n \tlea 0x96553(%rip),%rcx # 305956 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b6e6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3e96(%rip),%rsi # 36b432c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2888>\n+\tlea 0x368d4e96(%rip),%rsi # 36b442c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2888>\n \tlea 0x96573(%rip),%rcx # 3059a4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b734>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3e70(%rip),%rsi # 36b432c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2890>\n+\tlea 0x368d4e70(%rip),%rsi # 36b442c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2890>\n \tlea 0x96591(%rip),%rcx # 3059f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b780>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3e4a(%rip),%rsi # 36b432d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2898>\n+\tlea 0x368d4e4a(%rip),%rsi # 36b442d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2898>\n \tlea 0x965af(%rip),%rcx # 305a3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b7cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3e24(%rip),%rsi # 36b432d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a0>\n+\tlea 0x368d4e24(%rip),%rsi # 36b442d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a0>\n \tlea 0x965cf(%rip),%rcx # 305a8a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b81a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3dfe(%rip),%rsi # 36b432e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a8>\n+\tlea 0x368d4dfe(%rip),%rsi # 36b442e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a8>\n \tlea 0x965ef(%rip),%rcx # 305ad8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b868>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3dd8(%rip),%rsi # 36b432e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b0>\n+\tlea 0x368d4dd8(%rip),%rsi # 36b442e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b0>\n \tlea 0x9660d(%rip),%rcx # 305b24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b8b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3db2(%rip),%rsi # 36b432f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b8>\n+\tlea 0x368d4db2(%rip),%rsi # 36b442f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b8>\n \tlea 0x9662b(%rip),%rcx # 305b70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b900>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3d8c(%rip),%rsi # 36b432f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c0>\n+\tlea 0x368d4d8c(%rip),%rsi # 36b442f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c0>\n \tlea 0x9664b(%rip),%rcx # 305bbe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b94e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3d66(%rip),%rsi # 36b43300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c8>\n+\tlea 0x368d4d66(%rip),%rsi # 36b44300 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c8>\n \tlea 0x9666b(%rip),%rcx # 305c0c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b99c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3d40(%rip),%rsi # 36b43308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d0>\n+\tlea 0x368d4d40(%rip),%rsi # 36b44308 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d0>\n \tlea 0x96689(%rip),%rcx # 305c58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2b9e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3d1a(%rip),%rsi # 36b43310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d8>\n+\tlea 0x368d4d1a(%rip),%rsi # 36b44310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d8>\n \tlea 0x966a7(%rip),%rcx # 305ca4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ba34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3cf4(%rip),%rsi # 36b43318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e0>\n+\tlea 0x368d4cf4(%rip),%rsi # 36b44318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e0>\n \tlea 0x966c7(%rip),%rcx # 305cf2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ba82>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3cce(%rip),%rsi # 36b43320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e8>\n+\tlea 0x368d4cce(%rip),%rsi # 36b44320 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e8>\n \tlea 0x966e7(%rip),%rcx # 305d40 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bad0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3ca8(%rip),%rsi # 36b43328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f0>\n+\tlea 0x368d4ca8(%rip),%rsi # 36b44328 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f0>\n \tlea 0x96705(%rip),%rcx # 305d8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bb1c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3c82(%rip),%rsi # 36b43330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f8>\n+\tlea 0x368d4c82(%rip),%rsi # 36b44330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f8>\n \tlea 0x96723(%rip),%rcx # 305dd8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bb68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3c5c(%rip),%rsi # 36b43338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2900>\n+\tlea 0x368d4c5c(%rip),%rsi # 36b44338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2900>\n \tlea 0x96743(%rip),%rcx # 305e26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bbb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3c36(%rip),%rsi # 36b43340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2908>\n+\tlea 0x368d4c36(%rip),%rsi # 36b44340 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2908>\n \tlea 0x96763(%rip),%rcx # 305e74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bc04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3c10(%rip),%rsi # 36b43348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2910>\n+\tlea 0x368d4c10(%rip),%rsi # 36b44348 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2910>\n \tlea 0x96781(%rip),%rcx # 305ec0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bc50>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3bea(%rip),%rsi # 36b43350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2918>\n+\tlea 0x368d4bea(%rip),%rsi # 36b44350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2918>\n \tlea 0x9679f(%rip),%rcx # 305f0c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bc9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3bc4(%rip),%rsi # 36b43358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2920>\n+\tlea 0x368d4bc4(%rip),%rsi # 36b44358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2920>\n \tlea 0x967bf(%rip),%rcx # 305f5a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bcea>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3b9e(%rip),%rsi # 36b43360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2928>\n+\tlea 0x368d4b9e(%rip),%rsi # 36b44360 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2928>\n \tlea 0x967df(%rip),%rcx # 305fa8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bd38>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3b78(%rip),%rsi # 36b43368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2930>\n+\tlea 0x368d4b78(%rip),%rsi # 36b44368 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2930>\n \tlea 0x967fd(%rip),%rcx # 305ff4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bd84>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3b52(%rip),%rsi # 36b43370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2938>\n+\tlea 0x368d4b52(%rip),%rsi # 36b44370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2938>\n \tlea 0x9681b(%rip),%rcx # 306040 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bdd0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3b2c(%rip),%rsi # 36b43378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2940>\n+\tlea 0x368d4b2c(%rip),%rsi # 36b44378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2940>\n \tlea 0x9683b(%rip),%rcx # 30608e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2be1e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3b06(%rip),%rsi # 36b43380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2948>\n+\tlea 0x368d4b06(%rip),%rsi # 36b44380 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2948>\n \tlea 0x9685b(%rip),%rcx # 3060dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2be6c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3ae0(%rip),%rsi # 36b43388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2950>\n+\tlea 0x368d4ae0(%rip),%rsi # 36b44388 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2950>\n \tlea 0x96879(%rip),%rcx # 306128 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2beb8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3aba(%rip),%rsi # 36b43390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2958>\n+\tlea 0x368d4aba(%rip),%rsi # 36b44390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2958>\n \tlea 0x96897(%rip),%rcx # 306174 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bf04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3a94(%rip),%rsi # 36b43398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2960>\n+\tlea 0x368d4a94(%rip),%rsi # 36b44398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2960>\n \tlea 0x968b7(%rip),%rcx # 3061c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bf52>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3a6e(%rip),%rsi # 36b433a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2968>\n+\tlea 0x368d4a6e(%rip),%rsi # 36b443a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2968>\n \tlea 0x968d7(%rip),%rcx # 306210 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bfa0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3a48(%rip),%rsi # 36b433a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2970>\n+\tlea 0x368d4a48(%rip),%rsi # 36b443a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2970>\n \tlea 0x968f5(%rip),%rcx # 30625c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2bfec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3a22(%rip),%rsi # 36b433b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2978>\n+\tlea 0x368d4a22(%rip),%rsi # 36b443b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2978>\n \tlea 0x96913(%rip),%rcx # 3062a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c038>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d39fc(%rip),%rsi # 36b433b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2980>\n+\tlea 0x368d49fc(%rip),%rsi # 36b443b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2980>\n \tlea 0x96933(%rip),%rcx # 3062f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c086>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d39d6(%rip),%rsi # 36b433c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2988>\n+\tlea 0x368d49d6(%rip),%rsi # 36b443c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2988>\n \tlea 0x96953(%rip),%rcx # 306344 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c0d4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d39b0(%rip),%rsi # 36b433c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2990>\n+\tlea 0x368d49b0(%rip),%rsi # 36b443c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2990>\n \tlea 0x96971(%rip),%rcx # 306390 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c120>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d398a(%rip),%rsi # 36b433d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2998>\n+\tlea 0x368d498a(%rip),%rsi # 36b443d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2998>\n \tlea 0x9698f(%rip),%rcx # 3063dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c16c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3964(%rip),%rsi # 36b433d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a0>\n+\tlea 0x368d4964(%rip),%rsi # 36b443d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a0>\n \tlea 0x969af(%rip),%rcx # 30642a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c1ba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d393e(%rip),%rsi # 36b433e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a8>\n+\tlea 0x368d493e(%rip),%rsi # 36b443e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a8>\n \tlea 0x969cf(%rip),%rcx # 306478 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c208>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3918(%rip),%rsi # 36b433e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b0>\n+\tlea 0x368d4918(%rip),%rsi # 36b443e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b0>\n \tlea 0x969ed(%rip),%rcx # 3064c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c254>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d38f2(%rip),%rsi # 36b433f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b8>\n+\tlea 0x368d48f2(%rip),%rsi # 36b443f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b8>\n \tlea 0x96a0b(%rip),%rcx # 306510 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c2a0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d38cc(%rip),%rsi # 36b433f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c0>\n+\tlea 0x368d48cc(%rip),%rsi # 36b443f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c0>\n \tlea 0x96a2b(%rip),%rcx # 30655e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c2ee>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d38a6(%rip),%rsi # 36b43400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c8>\n+\tlea 0x368d48a6(%rip),%rsi # 36b44400 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c8>\n \tlea 0x96a4b(%rip),%rcx # 3065ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c33c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3880(%rip),%rsi # 36b43408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d0>\n+\tlea 0x368d4880(%rip),%rsi # 36b44408 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d0>\n \tlea 0x96a6a(%rip),%rcx # 3065f9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c389>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d385a(%rip),%rsi # 36b43410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d8>\n+\tlea 0x368d485a(%rip),%rsi # 36b44410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d8>\n \tlea 0x96a89(%rip),%rcx # 306646 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c3d6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368d3834(%rip),%rsi # 36b43418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e0>\n+\tlea 0x368d4834(%rip),%rsi # 36b44418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e0>\n \tlea 0x96aaa(%rip),%rcx # 306695 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c425>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d37f7(%rip),%rsi # 36b43420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e8>\n+\tlea 0x368d47f7(%rip),%rsi # 36b44420 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e8>\n \tlea 0x96ab4(%rip),%rcx # 3066e4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c474>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d37ba(%rip),%rsi # 36b43428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f0>\n+\tlea 0x368d47ba(%rip),%rsi # 36b44428 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f0>\n \tlea 0x96abc(%rip),%rcx # 306731 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c4c1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d377d(%rip),%rsi # 36b43430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f8>\n+\tlea 0x368d477d(%rip),%rsi # 36b44430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f8>\n \tlea 0x96ac4(%rip),%rcx # 30677e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c50e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d3740(%rip),%rsi # 36b43438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a00>\n+\tlea 0x368d4740(%rip),%rsi # 36b44438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a00>\n \tlea 0x96ace(%rip),%rcx # 3067cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c55d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d3703(%rip),%rsi # 36b43440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a08>\n+\tlea 0x368d4703(%rip),%rsi # 36b44440 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a08>\n \tlea 0x96ad8(%rip),%rcx # 30681c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c5ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d36c6(%rip),%rsi # 36b43448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a10>\n+\tlea 0x368d46c6(%rip),%rsi # 36b44448 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a10>\n \tlea 0x96ae0(%rip),%rcx # 306869 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c5f9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d3689(%rip),%rsi # 36b43450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a18>\n+\tlea 0x368d4689(%rip),%rsi # 36b44450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a18>\n \tlea 0x96ae8(%rip),%rcx # 3068b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c646>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d364c(%rip),%rsi # 36b43458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a20>\n+\tlea 0x368d464c(%rip),%rsi # 36b44458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a20>\n \tlea 0x96af2(%rip),%rcx # 306905 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c695>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d360f(%rip),%rsi # 36b43460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a28>\n+\tlea 0x368d460f(%rip),%rsi # 36b44460 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a28>\n \tlea 0x96afc(%rip),%rcx # 306954 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c6e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d35d2(%rip),%rsi # 36b43468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a30>\n+\tlea 0x368d45d2(%rip),%rsi # 36b44468 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a30>\n \tlea 0x96b04(%rip),%rcx # 3069a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c731>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d3595(%rip),%rsi # 36b43470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a38>\n+\tlea 0x368d4595(%rip),%rsi # 36b44470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a38>\n \tlea 0x96b0c(%rip),%rcx # 3069ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c77e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368d3558(%rip),%rsi # 36b43478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a40>\n+\tlea 0x368d4558(%rip),%rsi # 36b44478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a40>\n \tlea 0x96b16(%rip),%rcx # 306a3d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c7cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 26ff50 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10e20>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x368d6569(%rip),%rdi # 36b464c0 ::get_beta()::val@@Base+0x1a8>\n+\tmov 0x368d7569(%rip),%rdi # 36b474c0 ::get_beta()::val@@Base+0x1a8>\n \ttest %rdi,%rdi\n \tje 26ff71 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10e41>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x368d6553(%rip) # 36b464c0 ::get_beta()::val@@Base+0x1a8>\n+\tmovq $0x0,0x368d7553(%rip) # 36b474c0 ::get_beta()::val@@Base+0x1a8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 000000000026ff80 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)6>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -524451,15 +524451,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368d0829(%rip),%rdi # 36b43458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a20>\n+\tlea 0x368d1829(%rip),%rdi # 36b44458 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 272f1f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -524595,15 +524595,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368d0550(%rip),%rdi # 36b43450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a18>\n+\tlea 0x368d1550(%rip),%rdi # 36b44450 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -524754,15 +524754,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368d01f3(%rip),%rdi # 36b433f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c0>\n+\tlea 0x368d11f3(%rip),%rdi # 36b443f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2734f5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -524898,15 +524898,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cff1a(%rip),%rdi # 36b433f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b8>\n+\tlea 0x368d0f1a(%rip),%rdi # 36b443f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -525057,15 +525057,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cfb3d(%rip),%rdi # 36b43318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e0>\n+\tlea 0x368d0b3d(%rip),%rdi # 36b44318 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 273acb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -525201,15 +525201,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cf864(%rip),%rdi # 36b43310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d8>\n+\tlea 0x368d0864(%rip),%rdi # 36b44310 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -525360,15 +525360,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cf667(%rip),%rdi # 36b43418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e0>\n+\tlea 0x368d0667(%rip),%rdi # 36b44418 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2740a1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -525504,15 +525504,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cf38e(%rip),%rdi # 36b43410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d8>\n+\tlea 0x368d038e(%rip),%rdi # 36b44410 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -525663,15 +525663,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cf031(%rip),%rdi # 36b433b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2980>\n+\tlea 0x368d0031(%rip),%rdi # 36b443b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2980>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 274677 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -525807,15 +525807,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ced58(%rip),%rdi # 36b433b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2978>\n+\tlea 0x368cfd58(%rip),%rdi # 36b443b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2978>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -525966,15 +525966,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ce97b(%rip),%rdi # 36b432d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a0>\n+\tlea 0x368cf97b(%rip),%rdi # 36b442d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 274c4d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -526110,15 +526110,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ce6a2(%rip),%rdi # 36b432d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2898>\n+\tlea 0x368cf6a2(%rip),%rdi # 36b442d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2898>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -526269,15 +526269,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ce545(%rip),%rdi # 36b43478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a40>\n+\tlea 0x368cf545(%rip),%rdi # 36b44478 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 275223 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -526413,15 +526413,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ce26c(%rip),%rdi # 36b43470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a38>\n+\tlea 0x368cf26c(%rip),%rdi # 36b44470 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -526572,15 +526572,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cddef(%rip),%rdi # 36b432f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c0>\n+\tlea 0x368cedef(%rip),%rdi # 36b442f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2757f9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -526716,15 +526716,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cdb16(%rip),%rdi # 36b432f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b8>\n+\tlea 0x368ceb16(%rip),%rdi # 36b442f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -526875,15 +526875,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cd899(%rip),%rdi # 36b43378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2940>\n+\tlea 0x368ce899(%rip),%rdi # 36b44378 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2940>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 275dcf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -527019,15 +527019,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cd5c0(%rip),%rdi # 36b43370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2938>\n+\tlea 0x368ce5c0(%rip),%rdi # 36b44370 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2938>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -527178,15 +527178,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cd1e3(%rip),%rdi # 36b43298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2860>\n+\tlea 0x368ce1e3(%rip),%rdi # 36b44298 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2860>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 276686 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -527328,15 +527328,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ccf22(%rip),%rdi # 36b432b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2880>\n+\tlea 0x368cdf22(%rip),%rdi # 36b442b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2880>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 27697b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -527472,15 +527472,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ccc29(%rip),%rdi # 36b43290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2858>\n+\tlea 0x368cdc29(%rip),%rdi # 36b44290 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2858>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -527625,15 +527625,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cc954(%rip),%rdi # 36b432b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2878>\n+\tlea 0x368cd954(%rip),%rdi # 36b442b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2878>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -527784,15 +527784,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cc6d7(%rip),%rdi # 36b43338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2900>\n+\tlea 0x368cd6d7(%rip),%rdi # 36b44338 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2900>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 276f51 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -527928,15 +527928,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cc3fe(%rip),%rdi # 36b43330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f8>\n+\tlea 0x368cd3fe(%rip),%rdi # 36b44330 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x28f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -528087,15 +528087,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cc201(%rip),%rdi # 36b43438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a00>\n+\tlea 0x368cd201(%rip),%rdi # 36b44438 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 277527 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -528231,15 +528231,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cbf28(%rip),%rdi # 36b43430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f8>\n+\tlea 0x368ccf28(%rip),%rdi # 36b44430 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -528390,15 +528390,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cbb4b(%rip),%rdi # 36b43358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2920>\n+\tlea 0x368ccb4b(%rip),%rdi # 36b44358 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2920>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 277afd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -528534,15 +528534,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cb872(%rip),%rdi # 36b43350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2918>\n+\tlea 0x368cc872(%rip),%rdi # 36b44350 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2918>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -528693,15 +528693,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cb5f5(%rip),%rdi # 36b433d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a0>\n+\tlea 0x368cc5f5(%rip),%rdi # 36b443d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x29a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2780d3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -528837,15 +528837,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cb31c(%rip),%rdi # 36b433d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2998>\n+\tlea 0x368cc31c(%rip),%rdi # 36b443d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2998>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -528996,15 +528996,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cafdf(%rip),%rdi # 36b43398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2960>\n+\tlea 0x368cbfdf(%rip),%rdi # 36b44398 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2960>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2786a9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -529140,15 +529140,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368cad06(%rip),%rdi # 36b43390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2958>\n+\tlea 0x368cbd06(%rip),%rdi # 36b44390 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2958>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -530991,15 +530991,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 26c480 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd350>\n \tadd $0x1c8,%rsp\n \tjmp 279efd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x368cb017(%rip),%rax \n+\tmov 0x368cc017(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x7b918(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x7b917(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -531289,15 +531289,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c8f78(%rip),%rdi # 36b43480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a48>\n+\tlea 0x368c9f78(%rip),%rdi # 36b44480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531358,15 +531358,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c8dc0(%rip),%rdi # 36b43488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a50>\n+\tlea 0x368c9dc0(%rip),%rdi # 36b44488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531407,15 +531407,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c8ca6(%rip),%rdi # 36b43490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a58>\n+\tlea 0x368c9ca6(%rip),%rdi # 36b44490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531456,15 +531456,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c8b8e(%rip),%rdi # 36b43498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a60>\n+\tlea 0x368c9b8e(%rip),%rdi # 36b44498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531525,15 +531525,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c89d8(%rip),%rdi # 36b434a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a68>\n+\tlea 0x368c99d8(%rip),%rdi # 36b444a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531594,15 +531594,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c8820(%rip),%rdi # 36b434a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a70>\n+\tlea 0x368c9820(%rip),%rdi # 36b444a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531643,15 +531643,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c8706(%rip),%rdi # 36b434b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a78>\n+\tlea 0x368c9706(%rip),%rdi # 36b444b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531692,15 +531692,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c85ee(%rip),%rdi # 36b434b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a80>\n+\tlea 0x368c95ee(%rip),%rdi # 36b444b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531761,15 +531761,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c8438(%rip),%rdi # 36b434c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a88>\n+\tlea 0x368c9438(%rip),%rdi # 36b444c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531830,15 +531830,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c8280(%rip),%rdi # 36b434c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a90>\n+\tlea 0x368c9280(%rip),%rdi # 36b444c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531879,15 +531879,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c8166(%rip),%rdi # 36b434d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a98>\n+\tlea 0x368c9166(%rip),%rdi # 36b444d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531928,15 +531928,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c804e(%rip),%rdi # 36b434d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa0>\n+\tlea 0x368c904e(%rip),%rdi # 36b444d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -531997,15 +531997,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c7e98(%rip),%rdi # 36b434e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa8>\n+\tlea 0x368c8e98(%rip),%rdi # 36b444e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532066,15 +532066,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c7ce0(%rip),%rdi # 36b434e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab0>\n+\tlea 0x368c8ce0(%rip),%rdi # 36b444e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532115,15 +532115,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c7bc6(%rip),%rdi # 36b434f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab8>\n+\tlea 0x368c8bc6(%rip),%rdi # 36b444f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532164,15 +532164,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c7aae(%rip),%rdi # 36b434f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac0>\n+\tlea 0x368c8aae(%rip),%rdi # 36b444f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532233,15 +532233,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c78f8(%rip),%rdi # 36b43500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac8>\n+\tlea 0x368c88f8(%rip),%rdi # 36b44500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532302,15 +532302,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c7740(%rip),%rdi # 36b43508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad0>\n+\tlea 0x368c8740(%rip),%rdi # 36b44508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532351,15 +532351,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c7626(%rip),%rdi # 36b43510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad8>\n+\tlea 0x368c8626(%rip),%rdi # 36b44510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532400,15 +532400,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c750e(%rip),%rdi # 36b43518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae0>\n+\tlea 0x368c850e(%rip),%rdi # 36b44518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532469,15 +532469,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c7358(%rip),%rdi # 36b43520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae8>\n+\tlea 0x368c8358(%rip),%rdi # 36b44520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532538,15 +532538,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c71a0(%rip),%rdi # 36b43528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af0>\n+\tlea 0x368c81a0(%rip),%rdi # 36b44528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532587,15 +532587,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c7086(%rip),%rdi # 36b43530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af8>\n+\tlea 0x368c8086(%rip),%rdi # 36b44530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532636,15 +532636,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c6f6e(%rip),%rdi # 36b43538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b00>\n+\tlea 0x368c7f6e(%rip),%rdi # 36b44538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532705,15 +532705,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c6db8(%rip),%rdi # 36b43540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b08>\n+\tlea 0x368c7db8(%rip),%rdi # 36b44540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532774,15 +532774,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c6c00(%rip),%rdi # 36b43548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b10>\n+\tlea 0x368c7c00(%rip),%rdi # 36b44548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532823,15 +532823,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c6ae6(%rip),%rdi # 36b43550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b18>\n+\tlea 0x368c7ae6(%rip),%rdi # 36b44550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532872,15 +532872,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c69ce(%rip),%rdi # 36b43558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b20>\n+\tlea 0x368c79ce(%rip),%rdi # 36b44558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -532941,15 +532941,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c6818(%rip),%rdi # 36b43560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b28>\n+\tlea 0x368c7818(%rip),%rdi # 36b44560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533010,15 +533010,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c6660(%rip),%rdi # 36b43568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b30>\n+\tlea 0x368c7660(%rip),%rdi # 36b44568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533059,15 +533059,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c6546(%rip),%rdi # 36b43570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b38>\n+\tlea 0x368c7546(%rip),%rdi # 36b44570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533108,15 +533108,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c642e(%rip),%rdi # 36b43578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b40>\n+\tlea 0x368c742e(%rip),%rdi # 36b44578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533177,15 +533177,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c6278(%rip),%rdi # 36b43580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b48>\n+\tlea 0x368c7278(%rip),%rdi # 36b44580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533246,15 +533246,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c60c0(%rip),%rdi # 36b43588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b50>\n+\tlea 0x368c70c0(%rip),%rdi # 36b44588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533295,15 +533295,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c5fa6(%rip),%rdi # 36b43590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b58>\n+\tlea 0x368c6fa6(%rip),%rdi # 36b44590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533344,15 +533344,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c5e8e(%rip),%rdi # 36b43598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b60>\n+\tlea 0x368c6e8e(%rip),%rdi # 36b44598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533413,15 +533413,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c5cd8(%rip),%rdi # 36b435a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b68>\n+\tlea 0x368c6cd8(%rip),%rdi # 36b445a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533482,15 +533482,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c5b20(%rip),%rdi # 36b435a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b70>\n+\tlea 0x368c6b20(%rip),%rdi # 36b445a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533531,15 +533531,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c5a06(%rip),%rdi # 36b435b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b78>\n+\tlea 0x368c6a06(%rip),%rdi # 36b445b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533580,15 +533580,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c58ee(%rip),%rdi # 36b435b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b80>\n+\tlea 0x368c68ee(%rip),%rdi # 36b445b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533649,15 +533649,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c5738(%rip),%rdi # 36b435c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b88>\n+\tlea 0x368c6738(%rip),%rdi # 36b445c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533718,15 +533718,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c5580(%rip),%rdi # 36b435c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b90>\n+\tlea 0x368c6580(%rip),%rdi # 36b445c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533767,15 +533767,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c5466(%rip),%rdi # 36b435d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b98>\n+\tlea 0x368c6466(%rip),%rdi # 36b445d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533816,15 +533816,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c534e(%rip),%rdi # 36b435d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba0>\n+\tlea 0x368c634e(%rip),%rdi # 36b445d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533885,15 +533885,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c5198(%rip),%rdi # 36b435e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba8>\n+\tlea 0x368c6198(%rip),%rdi # 36b445e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -533954,15 +533954,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c4fe0(%rip),%rdi # 36b435e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb0>\n+\tlea 0x368c5fe0(%rip),%rdi # 36b445e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534003,15 +534003,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c4ec6(%rip),%rdi # 36b435f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb8>\n+\tlea 0x368c5ec6(%rip),%rdi # 36b445f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534052,15 +534052,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c4dae(%rip),%rdi # 36b435f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc0>\n+\tlea 0x368c5dae(%rip),%rdi # 36b445f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534121,15 +534121,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c4bf8(%rip),%rdi # 36b43600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc8>\n+\tlea 0x368c5bf8(%rip),%rdi # 36b44600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534190,15 +534190,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c4a40(%rip),%rdi # 36b43608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd0>\n+\tlea 0x368c5a40(%rip),%rdi # 36b44608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534239,15 +534239,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c4926(%rip),%rdi # 36b43610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd8>\n+\tlea 0x368c5926(%rip),%rdi # 36b44610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534288,15 +534288,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c480e(%rip),%rdi # 36b43618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be0>\n+\tlea 0x368c580e(%rip),%rdi # 36b44618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534357,15 +534357,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c4658(%rip),%rdi # 36b43620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be8>\n+\tlea 0x368c5658(%rip),%rdi # 36b44620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534426,15 +534426,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c44a0(%rip),%rdi # 36b43628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf0>\n+\tlea 0x368c54a0(%rip),%rdi # 36b44628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534475,15 +534475,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c4386(%rip),%rdi # 36b43630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf8>\n+\tlea 0x368c5386(%rip),%rdi # 36b44630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534524,15 +534524,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c426e(%rip),%rdi # 36b43638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c00>\n+\tlea 0x368c526e(%rip),%rdi # 36b44638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534593,15 +534593,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c40b8(%rip),%rdi # 36b43640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c08>\n+\tlea 0x368c50b8(%rip),%rdi # 36b44640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534662,15 +534662,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c3f00(%rip),%rdi # 36b43648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c10>\n+\tlea 0x368c4f00(%rip),%rdi # 36b44648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534711,15 +534711,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c3de6(%rip),%rdi # 36b43650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c18>\n+\tlea 0x368c4de6(%rip),%rdi # 36b44650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534760,15 +534760,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c3cce(%rip),%rdi # 36b43658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c20>\n+\tlea 0x368c4cce(%rip),%rdi # 36b44658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534829,15 +534829,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c3b18(%rip),%rdi # 36b43660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c28>\n+\tlea 0x368c4b18(%rip),%rdi # 36b44660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534898,15 +534898,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368c3960(%rip),%rdi # 36b43668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c30>\n+\tlea 0x368c4960(%rip),%rdi # 36b44668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534947,15 +534947,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c3846(%rip),%rdi # 36b43670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c38>\n+\tlea 0x368c4846(%rip),%rdi # 36b44670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -534996,696 +534996,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368c372e(%rip),%rdi # 36b43678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c40>\n+\tlea 0x368c472e(%rip),%rdi # 36b44678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368c654c(%rip),%rbx # 36b464c8 ::get_beta()::val@@Base+0x1b0>\n+\tmov 0x368c754c(%rip),%rbx # 36b474c8 ::get_beta()::val@@Base+0x1b0>\n \ttest %rbx,%rbx\n \tjne 27ff97 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x368c5770(%rip),%rdi # 36b456f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4cc0>\n+\tlea 0x368c6770(%rip),%rdi # 36b466f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4cc0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368c6531(%rip) # 36b464c8 ::get_beta()::val@@Base+0x1b0>\n+\tmov %rax,0x368c7531(%rip) # 36b474c8 ::get_beta()::val@@Base+0x1b0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c34d6(%rip),%rsi # 36b43480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a48>\n+\tlea 0x368c44d6(%rip),%rsi # 36b44480 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a48>\n \tlea 0x86adb(%rip),%rcx # 306a8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c81c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c34b0(%rip),%rsi # 36b43488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a50>\n+\tlea 0x368c44b0(%rip),%rsi # 36b44488 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a50>\n \tlea 0x86af8(%rip),%rcx # 306ad7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c867>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c348a(%rip),%rsi # 36b43490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a58>\n+\tlea 0x368c448a(%rip),%rsi # 36b44490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a58>\n \tlea 0x86b15(%rip),%rcx # 306b22 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c8b2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3464(%rip),%rsi # 36b43498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a60>\n+\tlea 0x368c4464(%rip),%rsi # 36b44498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a60>\n \tlea 0x86b34(%rip),%rcx # 306b6f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c8ff>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c343e(%rip),%rsi # 36b434a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a68>\n+\tlea 0x368c443e(%rip),%rsi # 36b444a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a68>\n \tlea 0x86b53(%rip),%rcx # 306bbc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c94c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3418(%rip),%rsi # 36b434a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a70>\n+\tlea 0x368c4418(%rip),%rsi # 36b444a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a70>\n \tlea 0x86b71(%rip),%rcx # 306c08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c33f2(%rip),%rsi # 36b434b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a78>\n+\tlea 0x368c43f2(%rip),%rsi # 36b444b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a78>\n \tlea 0x86b8f(%rip),%rcx # 306c54 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2c9e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c33cc(%rip),%rsi # 36b434b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a80>\n+\tlea 0x368c43cc(%rip),%rsi # 36b444b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a80>\n \tlea 0x86baf(%rip),%rcx # 306ca2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ca32>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c33a6(%rip),%rsi # 36b434c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a88>\n+\tlea 0x368c43a6(%rip),%rsi # 36b444c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a88>\n \tlea 0x86bcf(%rip),%rcx # 306cf0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ca80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3380(%rip),%rsi # 36b434c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a90>\n+\tlea 0x368c4380(%rip),%rsi # 36b444c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a90>\n \tlea 0x86bed(%rip),%rcx # 306d3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cacc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c335a(%rip),%rsi # 36b434d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a98>\n+\tlea 0x368c435a(%rip),%rsi # 36b444d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a98>\n \tlea 0x86c0b(%rip),%rcx # 306d88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cb18>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3334(%rip),%rsi # 36b434d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa0>\n+\tlea 0x368c4334(%rip),%rsi # 36b444d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa0>\n \tlea 0x86c2b(%rip),%rcx # 306dd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cb66>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c330e(%rip),%rsi # 36b434e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa8>\n+\tlea 0x368c430e(%rip),%rsi # 36b444e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa8>\n \tlea 0x86c4b(%rip),%rcx # 306e24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cbb4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c32e8(%rip),%rsi # 36b434e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab0>\n+\tlea 0x368c42e8(%rip),%rsi # 36b444e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab0>\n \tlea 0x86c69(%rip),%rcx # 306e70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cc00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c32c2(%rip),%rsi # 36b434f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab8>\n+\tlea 0x368c42c2(%rip),%rsi # 36b444f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab8>\n \tlea 0x86c87(%rip),%rcx # 306ebc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cc4c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c329c(%rip),%rsi # 36b434f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac0>\n+\tlea 0x368c429c(%rip),%rsi # 36b444f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac0>\n \tlea 0x86ca7(%rip),%rcx # 306f0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cc9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3276(%rip),%rsi # 36b43500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac8>\n+\tlea 0x368c4276(%rip),%rsi # 36b44500 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac8>\n \tlea 0x86cc7(%rip),%rcx # 306f58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cce8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3250(%rip),%rsi # 36b43508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad0>\n+\tlea 0x368c4250(%rip),%rsi # 36b44508 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad0>\n \tlea 0x86ce5(%rip),%rcx # 306fa4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cd34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c322a(%rip),%rsi # 36b43510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad8>\n+\tlea 0x368c422a(%rip),%rsi # 36b44510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad8>\n \tlea 0x86d03(%rip),%rcx # 306ff0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cd80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3204(%rip),%rsi # 36b43518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae0>\n+\tlea 0x368c4204(%rip),%rsi # 36b44518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae0>\n \tlea 0x86d23(%rip),%rcx # 30703e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cdce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c31de(%rip),%rsi # 36b43520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae8>\n+\tlea 0x368c41de(%rip),%rsi # 36b44520 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae8>\n \tlea 0x86d43(%rip),%rcx # 30708c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ce1c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c31b8(%rip),%rsi # 36b43528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af0>\n+\tlea 0x368c41b8(%rip),%rsi # 36b44528 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af0>\n \tlea 0x86d61(%rip),%rcx # 3070d8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ce68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3192(%rip),%rsi # 36b43530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af8>\n+\tlea 0x368c4192(%rip),%rsi # 36b44530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af8>\n \tlea 0x86d7f(%rip),%rcx # 307124 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ceb4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c316c(%rip),%rsi # 36b43538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b00>\n+\tlea 0x368c416c(%rip),%rsi # 36b44538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b00>\n \tlea 0x86d9f(%rip),%rcx # 307172 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cf02>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3146(%rip),%rsi # 36b43540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b08>\n+\tlea 0x368c4146(%rip),%rsi # 36b44540 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b08>\n \tlea 0x86dbf(%rip),%rcx # 3071c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cf50>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3120(%rip),%rsi # 36b43548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b10>\n+\tlea 0x368c4120(%rip),%rsi # 36b44548 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b10>\n \tlea 0x86ddd(%rip),%rcx # 30720c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cf9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c30fa(%rip),%rsi # 36b43550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b18>\n+\tlea 0x368c40fa(%rip),%rsi # 36b44550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b18>\n \tlea 0x86dfb(%rip),%rcx # 307258 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2cfe8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c30d4(%rip),%rsi # 36b43558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b20>\n+\tlea 0x368c40d4(%rip),%rsi # 36b44558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b20>\n \tlea 0x86e1b(%rip),%rcx # 3072a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d036>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c30ae(%rip),%rsi # 36b43560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b28>\n+\tlea 0x368c40ae(%rip),%rsi # 36b44560 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b28>\n \tlea 0x86e3b(%rip),%rcx # 3072f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d084>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3088(%rip),%rsi # 36b43568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b30>\n+\tlea 0x368c4088(%rip),%rsi # 36b44568 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b30>\n \tlea 0x86e59(%rip),%rcx # 307340 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d0d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3062(%rip),%rsi # 36b43570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b38>\n+\tlea 0x368c4062(%rip),%rsi # 36b44570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b38>\n \tlea 0x86e77(%rip),%rcx # 30738c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d11c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c303c(%rip),%rsi # 36b43578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b40>\n+\tlea 0x368c403c(%rip),%rsi # 36b44578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b40>\n \tlea 0x86e97(%rip),%rcx # 3073da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d16a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c3016(%rip),%rsi # 36b43580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b48>\n+\tlea 0x368c4016(%rip),%rsi # 36b44580 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b48>\n \tlea 0x86eb7(%rip),%rcx # 307428 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d1b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2ff0(%rip),%rsi # 36b43588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b50>\n+\tlea 0x368c3ff0(%rip),%rsi # 36b44588 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b50>\n \tlea 0x86ed5(%rip),%rcx # 307474 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d204>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2fca(%rip),%rsi # 36b43590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b58>\n+\tlea 0x368c3fca(%rip),%rsi # 36b44590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b58>\n \tlea 0x86ef3(%rip),%rcx # 3074c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d250>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2fa4(%rip),%rsi # 36b43598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b60>\n+\tlea 0x368c3fa4(%rip),%rsi # 36b44598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b60>\n \tlea 0x86f13(%rip),%rcx # 30750e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d29e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2f7e(%rip),%rsi # 36b435a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b68>\n+\tlea 0x368c3f7e(%rip),%rsi # 36b445a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b68>\n \tlea 0x86f33(%rip),%rcx # 30755c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d2ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2f58(%rip),%rsi # 36b435a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b70>\n+\tlea 0x368c3f58(%rip),%rsi # 36b445a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b70>\n \tlea 0x86f51(%rip),%rcx # 3075a8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d338>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2f32(%rip),%rsi # 36b435b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b78>\n+\tlea 0x368c3f32(%rip),%rsi # 36b445b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b78>\n \tlea 0x86f6f(%rip),%rcx # 3075f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d384>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2f0c(%rip),%rsi # 36b435b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b80>\n+\tlea 0x368c3f0c(%rip),%rsi # 36b445b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b80>\n \tlea 0x86f8f(%rip),%rcx # 307642 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d3d2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2ee6(%rip),%rsi # 36b435c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b88>\n+\tlea 0x368c3ee6(%rip),%rsi # 36b445c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b88>\n \tlea 0x86faf(%rip),%rcx # 307690 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d420>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2ec0(%rip),%rsi # 36b435c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b90>\n+\tlea 0x368c3ec0(%rip),%rsi # 36b445c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b90>\n \tlea 0x86fcd(%rip),%rcx # 3076dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d46c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2e9a(%rip),%rsi # 36b435d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b98>\n+\tlea 0x368c3e9a(%rip),%rsi # 36b445d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b98>\n \tlea 0x86feb(%rip),%rcx # 307728 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d4b8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2e74(%rip),%rsi # 36b435d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba0>\n+\tlea 0x368c3e74(%rip),%rsi # 36b445d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba0>\n \tlea 0x8700b(%rip),%rcx # 307776 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d506>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2e4e(%rip),%rsi # 36b435e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba8>\n+\tlea 0x368c3e4e(%rip),%rsi # 36b445e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba8>\n \tlea 0x8702b(%rip),%rcx # 3077c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d554>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2e28(%rip),%rsi # 36b435e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb0>\n+\tlea 0x368c3e28(%rip),%rsi # 36b445e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb0>\n \tlea 0x87049(%rip),%rcx # 307810 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d5a0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2e02(%rip),%rsi # 36b435f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb8>\n+\tlea 0x368c3e02(%rip),%rsi # 36b445f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb8>\n \tlea 0x87067(%rip),%rcx # 30785c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d5ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2ddc(%rip),%rsi # 36b435f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc0>\n+\tlea 0x368c3ddc(%rip),%rsi # 36b445f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc0>\n \tlea 0x87087(%rip),%rcx # 3078aa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d63a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2db6(%rip),%rsi # 36b43600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc8>\n+\tlea 0x368c3db6(%rip),%rsi # 36b44600 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc8>\n \tlea 0x870a7(%rip),%rcx # 3078f8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d688>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2d90(%rip),%rsi # 36b43608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd0>\n+\tlea 0x368c3d90(%rip),%rsi # 36b44608 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd0>\n \tlea 0x870c6(%rip),%rcx # 307945 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d6d5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2d6a(%rip),%rsi # 36b43610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd8>\n+\tlea 0x368c3d6a(%rip),%rsi # 36b44610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd8>\n \tlea 0x870e5(%rip),%rcx # 307992 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d722>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368c2d44(%rip),%rsi # 36b43618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be0>\n+\tlea 0x368c3d44(%rip),%rsi # 36b44618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be0>\n \tlea 0x87106(%rip),%rcx # 3079e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d771>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2d07(%rip),%rsi # 36b43620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be8>\n+\tlea 0x368c3d07(%rip),%rsi # 36b44620 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be8>\n \tlea 0x87110(%rip),%rcx # 307a30 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d7c0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2cca(%rip),%rsi # 36b43628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf0>\n+\tlea 0x368c3cca(%rip),%rsi # 36b44628 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf0>\n \tlea 0x87118(%rip),%rcx # 307a7d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d80d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2c8d(%rip),%rsi # 36b43630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf8>\n+\tlea 0x368c3c8d(%rip),%rsi # 36b44630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf8>\n \tlea 0x87120(%rip),%rcx # 307aca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d85a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2c50(%rip),%rsi # 36b43638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c00>\n+\tlea 0x368c3c50(%rip),%rsi # 36b44638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c00>\n \tlea 0x8712a(%rip),%rcx # 307b19 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d8a9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2c13(%rip),%rsi # 36b43640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c08>\n+\tlea 0x368c3c13(%rip),%rsi # 36b44640 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c08>\n \tlea 0x87134(%rip),%rcx # 307b68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d8f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2bd6(%rip),%rsi # 36b43648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c10>\n+\tlea 0x368c3bd6(%rip),%rsi # 36b44648 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c10>\n \tlea 0x8713c(%rip),%rcx # 307bb5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d945>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2b99(%rip),%rsi # 36b43650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c18>\n+\tlea 0x368c3b99(%rip),%rsi # 36b44650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c18>\n \tlea 0x87144(%rip),%rcx # 307c02 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d992>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2b5c(%rip),%rsi # 36b43658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c20>\n+\tlea 0x368c3b5c(%rip),%rsi # 36b44658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c20>\n \tlea 0x8714e(%rip),%rcx # 307c51 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2d9e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2b1f(%rip),%rsi # 36b43660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c28>\n+\tlea 0x368c3b1f(%rip),%rsi # 36b44660 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c28>\n \tlea 0x87158(%rip),%rcx # 307ca0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2da30>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2ae2(%rip),%rsi # 36b43668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c30>\n+\tlea 0x368c3ae2(%rip),%rsi # 36b44668 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c30>\n \tlea 0x87160(%rip),%rcx # 307ced (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2da7d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2aa5(%rip),%rsi # 36b43670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c38>\n+\tlea 0x368c3aa5(%rip),%rsi # 36b44670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c38>\n \tlea 0x87168(%rip),%rcx # 307d3a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2daca>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368c2a68(%rip),%rsi # 36b43678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c40>\n+\tlea 0x368c3a68(%rip),%rsi # 36b44678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c40>\n \tlea 0x87172(%rip),%rcx # 307d89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2db19>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 280c40 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x368c5881(%rip),%rdi # 36b464c8 ::get_beta()::val@@Base+0x1b0>\n+\tmov 0x368c6881(%rip),%rdi # 36b474c8 ::get_beta()::val@@Base+0x1b0>\n \ttest %rdi,%rdi\n \tje 280c61 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x368c586b(%rip) # 36b464c8 ::get_beta()::val@@Base+0x1b0>\n+\tmovq $0x0,0x368c686b(%rip) # 36b474c8 ::get_beta()::val@@Base+0x1b0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000280c70 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)7>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -539298,15 +539298,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bfd39(%rip),%rdi # 36b43658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c20>\n+\tlea 0x368c0d39(%rip),%rdi # 36b44658 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 283c0f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -539442,15 +539442,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bfa60(%rip),%rdi # 36b43650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c18>\n+\tlea 0x368c0a60(%rip),%rdi # 36b44650 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -539601,15 +539601,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bf703(%rip),%rdi # 36b435f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc0>\n+\tlea 0x368c0703(%rip),%rdi # 36b445f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2841e5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -539745,15 +539745,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bf42a(%rip),%rdi # 36b435f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb8>\n+\tlea 0x368c042a(%rip),%rdi # 36b445f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -539904,15 +539904,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bf04d(%rip),%rdi # 36b43518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae0>\n+\tlea 0x368c004d(%rip),%rdi # 36b44518 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ae0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2847bb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -540048,15 +540048,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bed74(%rip),%rdi # 36b43510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad8>\n+\tlea 0x368bfd74(%rip),%rdi # 36b44510 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ad8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -540207,15 +540207,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368beb77(%rip),%rdi # 36b43618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be0>\n+\tlea 0x368bfb77(%rip),%rdi # 36b44618 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2be0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 284d91 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -540351,15 +540351,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368be89e(%rip),%rdi # 36b43610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd8>\n+\tlea 0x368bf89e(%rip),%rdi # 36b44610 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -540510,15 +540510,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368be541(%rip),%rdi # 36b435b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b80>\n+\tlea 0x368bf541(%rip),%rdi # 36b445b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 285367 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -540654,15 +540654,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368be268(%rip),%rdi # 36b435b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b78>\n+\tlea 0x368bf268(%rip),%rdi # 36b445b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -540813,15 +540813,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bde8b(%rip),%rdi # 36b434d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa0>\n+\tlea 0x368bee8b(%rip),%rdi # 36b444d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2aa0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 28593d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -540957,15 +540957,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bdbb2(%rip),%rdi # 36b434d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a98>\n+\tlea 0x368bebb2(%rip),%rdi # 36b444d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -541116,15 +541116,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bda55(%rip),%rdi # 36b43678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c40>\n+\tlea 0x368bea55(%rip),%rdi # 36b44678 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 285f13 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -541260,15 +541260,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bd77c(%rip),%rdi # 36b43670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c38>\n+\tlea 0x368be77c(%rip),%rdi # 36b44670 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -541419,15 +541419,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bd2ff(%rip),%rdi # 36b434f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac0>\n+\tlea 0x368be2ff(%rip),%rdi # 36b444f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ac0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2864e9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -541563,15 +541563,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bd026(%rip),%rdi # 36b434f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab8>\n+\tlea 0x368be026(%rip),%rdi # 36b444f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ab8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -541722,15 +541722,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bcda9(%rip),%rdi # 36b43578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b40>\n+\tlea 0x368bdda9(%rip),%rdi # 36b44578 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 286abf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -541866,15 +541866,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bcad0(%rip),%rdi # 36b43570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b38>\n+\tlea 0x368bdad0(%rip),%rdi # 36b44570 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -542025,15 +542025,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bc6f3(%rip),%rdi # 36b43498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a60>\n+\tlea 0x368bd6f3(%rip),%rdi # 36b44498 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 287376 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -542175,15 +542175,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bc432(%rip),%rdi # 36b434b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a80>\n+\tlea 0x368bd432(%rip),%rdi # 36b444b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 28766b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -542319,15 +542319,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bc139(%rip),%rdi # 36b43490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a58>\n+\tlea 0x368bd139(%rip),%rdi # 36b44490 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -542472,15 +542472,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bbe64(%rip),%rdi # 36b434b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a78>\n+\tlea 0x368bce64(%rip),%rdi # 36b444b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2a78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -542631,15 +542631,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bbbe7(%rip),%rdi # 36b43538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b00>\n+\tlea 0x368bcbe7(%rip),%rdi # 36b44538 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 287c41 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -542775,15 +542775,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bb90e(%rip),%rdi # 36b43530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af8>\n+\tlea 0x368bc90e(%rip),%rdi # 36b44530 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2af8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -542934,15 +542934,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bb711(%rip),%rdi # 36b43638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c00>\n+\tlea 0x368bc711(%rip),%rdi # 36b44638 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 288217 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -543078,15 +543078,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bb438(%rip),%rdi # 36b43630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf8>\n+\tlea 0x368bc438(%rip),%rdi # 36b44630 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2bf8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -543237,15 +543237,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bb05b(%rip),%rdi # 36b43558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b20>\n+\tlea 0x368bc05b(%rip),%rdi # 36b44558 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2887ed (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -543381,15 +543381,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bad82(%rip),%rdi # 36b43550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b18>\n+\tlea 0x368bbd82(%rip),%rdi # 36b44550 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -543540,15 +543540,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368bab05(%rip),%rdi # 36b435d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba0>\n+\tlea 0x368bbb05(%rip),%rdi # 36b445d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ba0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 288dc3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -543684,15 +543684,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ba82c(%rip),%rdi # 36b435d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b98>\n+\tlea 0x368bb82c(%rip),%rdi # 36b445d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -543843,15 +543843,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ba4ef(%rip),%rdi # 36b43598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b60>\n+\tlea 0x368bb4ef(%rip),%rdi # 36b44598 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 289399 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -543987,15 +543987,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ba216(%rip),%rdi # 36b43590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b58>\n+\tlea 0x368bb216(%rip),%rdi # 36b44590 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2b58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -545838,15 +545838,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 27d170 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 28abed (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x368ba327(%rip),%rax \n+\tmov 0x368bb327(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x6ac28(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x6ac27(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -546136,15 +546136,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b8488(%rip),%rdi # 36b43680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c48>\n+\tlea 0x368b9488(%rip),%rdi # 36b44680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546205,15 +546205,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b82d0(%rip),%rdi # 36b43688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c50>\n+\tlea 0x368b92d0(%rip),%rdi # 36b44688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546254,15 +546254,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b81b6(%rip),%rdi # 36b43690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c58>\n+\tlea 0x368b91b6(%rip),%rdi # 36b44690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546303,15 +546303,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b809e(%rip),%rdi # 36b43698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c60>\n+\tlea 0x368b909e(%rip),%rdi # 36b44698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546372,15 +546372,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b7ee8(%rip),%rdi # 36b436a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c68>\n+\tlea 0x368b8ee8(%rip),%rdi # 36b446a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546441,15 +546441,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b7d30(%rip),%rdi # 36b436a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c70>\n+\tlea 0x368b8d30(%rip),%rdi # 36b446a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546490,15 +546490,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b7c16(%rip),%rdi # 36b436b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c78>\n+\tlea 0x368b8c16(%rip),%rdi # 36b446b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546539,15 +546539,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b7afe(%rip),%rdi # 36b436b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c80>\n+\tlea 0x368b8afe(%rip),%rdi # 36b446b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546608,15 +546608,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b7948(%rip),%rdi # 36b436c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c88>\n+\tlea 0x368b8948(%rip),%rdi # 36b446c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546677,15 +546677,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b7790(%rip),%rdi # 36b436c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c90>\n+\tlea 0x368b8790(%rip),%rdi # 36b446c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546726,15 +546726,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b7676(%rip),%rdi # 36b436d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c98>\n+\tlea 0x368b8676(%rip),%rdi # 36b446d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546775,15 +546775,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b755e(%rip),%rdi # 36b436d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca0>\n+\tlea 0x368b855e(%rip),%rdi # 36b446d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546844,15 +546844,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b73a8(%rip),%rdi # 36b436e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca8>\n+\tlea 0x368b83a8(%rip),%rdi # 36b446e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546913,15 +546913,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b71f0(%rip),%rdi # 36b436e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb0>\n+\tlea 0x368b81f0(%rip),%rdi # 36b446e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -546962,15 +546962,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b70d6(%rip),%rdi # 36b436f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb8>\n+\tlea 0x368b80d6(%rip),%rdi # 36b446f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547011,15 +547011,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b6fbe(%rip),%rdi # 36b436f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc0>\n+\tlea 0x368b7fbe(%rip),%rdi # 36b446f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547080,15 +547080,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b6e08(%rip),%rdi # 36b43700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc8>\n+\tlea 0x368b7e08(%rip),%rdi # 36b44700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547149,15 +547149,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b6c50(%rip),%rdi # 36b43708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd0>\n+\tlea 0x368b7c50(%rip),%rdi # 36b44708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547198,15 +547198,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b6b36(%rip),%rdi # 36b43710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd8>\n+\tlea 0x368b7b36(%rip),%rdi # 36b44710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547247,15 +547247,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b6a1e(%rip),%rdi # 36b43718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce0>\n+\tlea 0x368b7a1e(%rip),%rdi # 36b44718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547316,15 +547316,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b6868(%rip),%rdi # 36b43720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce8>\n+\tlea 0x368b7868(%rip),%rdi # 36b44720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547385,15 +547385,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b66b0(%rip),%rdi # 36b43728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf0>\n+\tlea 0x368b76b0(%rip),%rdi # 36b44728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547434,15 +547434,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b6596(%rip),%rdi # 36b43730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf8>\n+\tlea 0x368b7596(%rip),%rdi # 36b44730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547483,15 +547483,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b647e(%rip),%rdi # 36b43738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d00>\n+\tlea 0x368b747e(%rip),%rdi # 36b44738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547552,15 +547552,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b62c8(%rip),%rdi # 36b43740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d08>\n+\tlea 0x368b72c8(%rip),%rdi # 36b44740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547621,15 +547621,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b6110(%rip),%rdi # 36b43748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d10>\n+\tlea 0x368b7110(%rip),%rdi # 36b44748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547670,15 +547670,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b5ff6(%rip),%rdi # 36b43750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d18>\n+\tlea 0x368b6ff6(%rip),%rdi # 36b44750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547719,15 +547719,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b5ede(%rip),%rdi # 36b43758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d20>\n+\tlea 0x368b6ede(%rip),%rdi # 36b44758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547788,15 +547788,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b5d28(%rip),%rdi # 36b43760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d28>\n+\tlea 0x368b6d28(%rip),%rdi # 36b44760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547857,15 +547857,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b5b70(%rip),%rdi # 36b43768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d30>\n+\tlea 0x368b6b70(%rip),%rdi # 36b44768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547906,15 +547906,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b5a56(%rip),%rdi # 36b43770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d38>\n+\tlea 0x368b6a56(%rip),%rdi # 36b44770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -547955,15 +547955,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b593e(%rip),%rdi # 36b43778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d40>\n+\tlea 0x368b693e(%rip),%rdi # 36b44778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548024,15 +548024,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b5788(%rip),%rdi # 36b43780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d48>\n+\tlea 0x368b6788(%rip),%rdi # 36b44780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548093,15 +548093,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b55d0(%rip),%rdi # 36b43788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d50>\n+\tlea 0x368b65d0(%rip),%rdi # 36b44788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548142,15 +548142,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b54b6(%rip),%rdi # 36b43790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d58>\n+\tlea 0x368b64b6(%rip),%rdi # 36b44790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548191,15 +548191,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b539e(%rip),%rdi # 36b43798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d60>\n+\tlea 0x368b639e(%rip),%rdi # 36b44798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548260,15 +548260,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b51e8(%rip),%rdi # 36b437a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d68>\n+\tlea 0x368b61e8(%rip),%rdi # 36b447a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548329,15 +548329,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b5030(%rip),%rdi # 36b437a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d70>\n+\tlea 0x368b6030(%rip),%rdi # 36b447a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548378,15 +548378,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b4f16(%rip),%rdi # 36b437b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d78>\n+\tlea 0x368b5f16(%rip),%rdi # 36b447b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548427,15 +548427,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b4dfe(%rip),%rdi # 36b437b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d80>\n+\tlea 0x368b5dfe(%rip),%rdi # 36b447b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548496,15 +548496,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b4c48(%rip),%rdi # 36b437c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d88>\n+\tlea 0x368b5c48(%rip),%rdi # 36b447c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548565,15 +548565,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b4a90(%rip),%rdi # 36b437c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d90>\n+\tlea 0x368b5a90(%rip),%rdi # 36b447c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548614,15 +548614,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b4976(%rip),%rdi # 36b437d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d98>\n+\tlea 0x368b5976(%rip),%rdi # 36b447d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548663,15 +548663,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b485e(%rip),%rdi # 36b437d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da0>\n+\tlea 0x368b585e(%rip),%rdi # 36b447d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548732,15 +548732,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b46a8(%rip),%rdi # 36b437e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da8>\n+\tlea 0x368b56a8(%rip),%rdi # 36b447e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548801,15 +548801,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b44f0(%rip),%rdi # 36b437e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db0>\n+\tlea 0x368b54f0(%rip),%rdi # 36b447e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548850,15 +548850,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b43d6(%rip),%rdi # 36b437f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db8>\n+\tlea 0x368b53d6(%rip),%rdi # 36b447f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548899,15 +548899,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b42be(%rip),%rdi # 36b437f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc0>\n+\tlea 0x368b52be(%rip),%rdi # 36b447f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -548968,15 +548968,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b4108(%rip),%rdi # 36b43800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc8>\n+\tlea 0x368b5108(%rip),%rdi # 36b44800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549037,15 +549037,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b3f50(%rip),%rdi # 36b43808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd0>\n+\tlea 0x368b4f50(%rip),%rdi # 36b44808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549086,15 +549086,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b3e36(%rip),%rdi # 36b43810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd8>\n+\tlea 0x368b4e36(%rip),%rdi # 36b44810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549135,15 +549135,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b3d1e(%rip),%rdi # 36b43818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de0>\n+\tlea 0x368b4d1e(%rip),%rdi # 36b44818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549204,15 +549204,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b3b68(%rip),%rdi # 36b43820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de8>\n+\tlea 0x368b4b68(%rip),%rdi # 36b44820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549273,15 +549273,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b39b0(%rip),%rdi # 36b43828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df0>\n+\tlea 0x368b49b0(%rip),%rdi # 36b44828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549322,15 +549322,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b3896(%rip),%rdi # 36b43830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df8>\n+\tlea 0x368b4896(%rip),%rdi # 36b44830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549371,15 +549371,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b377e(%rip),%rdi # 36b43838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e00>\n+\tlea 0x368b477e(%rip),%rdi # 36b44838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549440,15 +549440,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b35c8(%rip),%rdi # 36b43840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e08>\n+\tlea 0x368b45c8(%rip),%rdi # 36b44840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549509,15 +549509,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b3410(%rip),%rdi # 36b43848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e10>\n+\tlea 0x368b4410(%rip),%rdi # 36b44848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549558,15 +549558,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b32f6(%rip),%rdi # 36b43850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e18>\n+\tlea 0x368b42f6(%rip),%rdi # 36b44850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549607,15 +549607,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b31de(%rip),%rdi # 36b43858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e20>\n+\tlea 0x368b41de(%rip),%rdi # 36b44858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549676,15 +549676,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b3028(%rip),%rdi # 36b43860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e28>\n+\tlea 0x368b4028(%rip),%rdi # 36b44860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549745,15 +549745,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368b2e70(%rip),%rdi # 36b43868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e30>\n+\tlea 0x368b3e70(%rip),%rdi # 36b44868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549794,15 +549794,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b2d56(%rip),%rdi # 36b43870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e38>\n+\tlea 0x368b3d56(%rip),%rdi # 36b44870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -549843,696 +549843,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368b2c3e(%rip),%rdi # 36b43878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e40>\n+\tlea 0x368b3c3e(%rip),%rdi # 36b44878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368b5864(%rip),%rbx # 36b464d0 ::get_beta()::val@@Base+0x1b8>\n+\tmov 0x368b6864(%rip),%rbx # 36b474d0 ::get_beta()::val@@Base+0x1b8>\n \ttest %rbx,%rbx\n \tjne 290c87 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10017>\n-\tlea 0x368b4a98(%rip),%rdi # 36b45710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4cd8>\n+\tlea 0x368b5a98(%rip),%rdi # 36b46710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4cd8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368b5849(%rip) # 36b464d0 ::get_beta()::val@@Base+0x1b8>\n+\tmov %rax,0x368b6849(%rip) # 36b474d0 ::get_beta()::val@@Base+0x1b8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b29e6(%rip),%rsi # 36b43680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c48>\n+\tlea 0x368b39e6(%rip),%rsi # 36b44680 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c48>\n \tlea 0x77137(%rip),%rcx # 307dd8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2db68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b29c0(%rip),%rsi # 36b43688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c50>\n+\tlea 0x368b39c0(%rip),%rsi # 36b44688 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c50>\n \tlea 0x77155(%rip),%rcx # 307e24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dbb4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b299a(%rip),%rsi # 36b43690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c58>\n+\tlea 0x368b399a(%rip),%rsi # 36b44690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c58>\n \tlea 0x77173(%rip),%rcx # 307e70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dc00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2974(%rip),%rsi # 36b43698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c60>\n+\tlea 0x368b3974(%rip),%rsi # 36b44698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c60>\n \tlea 0x77193(%rip),%rcx # 307ebe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dc4e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b294e(%rip),%rsi # 36b436a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c68>\n+\tlea 0x368b394e(%rip),%rsi # 36b446a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c68>\n \tlea 0x771b3(%rip),%rcx # 307f0c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dc9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2928(%rip),%rsi # 36b436a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c70>\n+\tlea 0x368b3928(%rip),%rsi # 36b446a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c70>\n \tlea 0x771d2(%rip),%rcx # 307f59 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dce9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2902(%rip),%rsi # 36b436b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c78>\n+\tlea 0x368b3902(%rip),%rsi # 36b446b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c78>\n \tlea 0x771f1(%rip),%rcx # 307fa6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dd36>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b28dc(%rip),%rsi # 36b436b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c80>\n+\tlea 0x368b38dc(%rip),%rsi # 36b446b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c80>\n \tlea 0x77212(%rip),%rcx # 307ff5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dd85>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b28b6(%rip),%rsi # 36b436c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c88>\n+\tlea 0x368b38b6(%rip),%rsi # 36b446c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c88>\n \tlea 0x77233(%rip),%rcx # 308044 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ddd4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2890(%rip),%rsi # 36b436c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c90>\n+\tlea 0x368b3890(%rip),%rsi # 36b446c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c90>\n \tlea 0x77252(%rip),%rcx # 308091 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2de21>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b286a(%rip),%rsi # 36b436d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c98>\n+\tlea 0x368b386a(%rip),%rsi # 36b446d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c98>\n \tlea 0x77271(%rip),%rcx # 3080de (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2de6e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2844(%rip),%rsi # 36b436d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca0>\n+\tlea 0x368b3844(%rip),%rsi # 36b446d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca0>\n \tlea 0x77292(%rip),%rcx # 30812d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2debd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b281e(%rip),%rsi # 36b436e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca8>\n+\tlea 0x368b381e(%rip),%rsi # 36b446e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca8>\n \tlea 0x772b3(%rip),%rcx # 30817c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2df0c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b27f8(%rip),%rsi # 36b436e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb0>\n+\tlea 0x368b37f8(%rip),%rsi # 36b446e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb0>\n \tlea 0x772d2(%rip),%rcx # 3081c9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2df59>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b27d2(%rip),%rsi # 36b436f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb8>\n+\tlea 0x368b37d2(%rip),%rsi # 36b446f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb8>\n \tlea 0x772f1(%rip),%rcx # 308216 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dfa6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b27ac(%rip),%rsi # 36b436f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc0>\n+\tlea 0x368b37ac(%rip),%rsi # 36b446f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc0>\n \tlea 0x77312(%rip),%rcx # 308265 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2dff5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2786(%rip),%rsi # 36b43700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc8>\n+\tlea 0x368b3786(%rip),%rsi # 36b44700 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc8>\n \tlea 0x77333(%rip),%rcx # 3082b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e044>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2760(%rip),%rsi # 36b43708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd0>\n+\tlea 0x368b3760(%rip),%rsi # 36b44708 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd0>\n \tlea 0x77352(%rip),%rcx # 308301 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e091>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b273a(%rip),%rsi # 36b43710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd8>\n+\tlea 0x368b373a(%rip),%rsi # 36b44710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd8>\n \tlea 0x77371(%rip),%rcx # 30834e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e0de>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2714(%rip),%rsi # 36b43718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce0>\n+\tlea 0x368b3714(%rip),%rsi # 36b44718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce0>\n \tlea 0x77392(%rip),%rcx # 30839d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e12d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b26ee(%rip),%rsi # 36b43720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce8>\n+\tlea 0x368b36ee(%rip),%rsi # 36b44720 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce8>\n \tlea 0x773b3(%rip),%rcx # 3083ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e17c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b26c8(%rip),%rsi # 36b43728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf0>\n+\tlea 0x368b36c8(%rip),%rsi # 36b44728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf0>\n \tlea 0x773d2(%rip),%rcx # 308439 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e1c9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b26a2(%rip),%rsi # 36b43730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf8>\n+\tlea 0x368b36a2(%rip),%rsi # 36b44730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf8>\n \tlea 0x773f1(%rip),%rcx # 308486 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e216>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b267c(%rip),%rsi # 36b43738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d00>\n+\tlea 0x368b367c(%rip),%rsi # 36b44738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d00>\n \tlea 0x77412(%rip),%rcx # 3084d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e265>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2656(%rip),%rsi # 36b43740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d08>\n+\tlea 0x368b3656(%rip),%rsi # 36b44740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d08>\n \tlea 0x77433(%rip),%rcx # 308524 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e2b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2630(%rip),%rsi # 36b43748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d10>\n+\tlea 0x368b3630(%rip),%rsi # 36b44748 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d10>\n \tlea 0x77452(%rip),%rcx # 308571 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e301>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b260a(%rip),%rsi # 36b43750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d18>\n+\tlea 0x368b360a(%rip),%rsi # 36b44750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d18>\n \tlea 0x77471(%rip),%rcx # 3085be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e34e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b25e4(%rip),%rsi # 36b43758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d20>\n+\tlea 0x368b35e4(%rip),%rsi # 36b44758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d20>\n \tlea 0x77492(%rip),%rcx # 30860d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e39d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b25be(%rip),%rsi # 36b43760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d28>\n+\tlea 0x368b35be(%rip),%rsi # 36b44760 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d28>\n \tlea 0x774b3(%rip),%rcx # 30865c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e3ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2598(%rip),%rsi # 36b43768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d30>\n+\tlea 0x368b3598(%rip),%rsi # 36b44768 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d30>\n \tlea 0x774d2(%rip),%rcx # 3086a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e439>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2572(%rip),%rsi # 36b43770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d38>\n+\tlea 0x368b3572(%rip),%rsi # 36b44770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d38>\n \tlea 0x774f1(%rip),%rcx # 3086f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e486>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b254c(%rip),%rsi # 36b43778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d40>\n+\tlea 0x368b354c(%rip),%rsi # 36b44778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d40>\n \tlea 0x77512(%rip),%rcx # 308745 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e4d5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2526(%rip),%rsi # 36b43780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d48>\n+\tlea 0x368b3526(%rip),%rsi # 36b44780 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d48>\n \tlea 0x77533(%rip),%rcx # 308794 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e524>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2500(%rip),%rsi # 36b43788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d50>\n+\tlea 0x368b3500(%rip),%rsi # 36b44788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d50>\n \tlea 0x77552(%rip),%rcx # 3087e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e571>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b24da(%rip),%rsi # 36b43790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d58>\n+\tlea 0x368b34da(%rip),%rsi # 36b44790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d58>\n \tlea 0x77571(%rip),%rcx # 30882e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e5be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b24b4(%rip),%rsi # 36b43798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d60>\n+\tlea 0x368b34b4(%rip),%rsi # 36b44798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d60>\n \tlea 0x77592(%rip),%rcx # 30887d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e60d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b248e(%rip),%rsi # 36b437a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d68>\n+\tlea 0x368b348e(%rip),%rsi # 36b447a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d68>\n \tlea 0x775b3(%rip),%rcx # 3088cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e65c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2468(%rip),%rsi # 36b437a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d70>\n+\tlea 0x368b3468(%rip),%rsi # 36b447a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d70>\n \tlea 0x775d2(%rip),%rcx # 308919 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e6a9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2442(%rip),%rsi # 36b437b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d78>\n+\tlea 0x368b3442(%rip),%rsi # 36b447b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d78>\n \tlea 0x775f1(%rip),%rcx # 308966 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e6f6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b241c(%rip),%rsi # 36b437b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d80>\n+\tlea 0x368b341c(%rip),%rsi # 36b447b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d80>\n \tlea 0x77612(%rip),%rcx # 3089b5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e745>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b23f6(%rip),%rsi # 36b437c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d88>\n+\tlea 0x368b33f6(%rip),%rsi # 36b447c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d88>\n \tlea 0x77633(%rip),%rcx # 308a04 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e794>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b23d0(%rip),%rsi # 36b437c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d90>\n+\tlea 0x368b33d0(%rip),%rsi # 36b447c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d90>\n \tlea 0x77652(%rip),%rcx # 308a51 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e7e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b23aa(%rip),%rsi # 36b437d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d98>\n+\tlea 0x368b33aa(%rip),%rsi # 36b447d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d98>\n \tlea 0x77671(%rip),%rcx # 308a9e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e82e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2384(%rip),%rsi # 36b437d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da0>\n+\tlea 0x368b3384(%rip),%rsi # 36b447d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da0>\n \tlea 0x77692(%rip),%rcx # 308aed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e87d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b235e(%rip),%rsi # 36b437e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da8>\n+\tlea 0x368b335e(%rip),%rsi # 36b447e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da8>\n \tlea 0x776b3(%rip),%rcx # 308b3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e8cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2338(%rip),%rsi # 36b437e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db0>\n+\tlea 0x368b3338(%rip),%rsi # 36b447e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db0>\n \tlea 0x776d2(%rip),%rcx # 308b89 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e919>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2312(%rip),%rsi # 36b437f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db8>\n+\tlea 0x368b3312(%rip),%rsi # 36b447f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db8>\n \tlea 0x776f1(%rip),%rcx # 308bd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e966>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b22ec(%rip),%rsi # 36b437f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc0>\n+\tlea 0x368b32ec(%rip),%rsi # 36b447f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc0>\n \tlea 0x77712(%rip),%rcx # 308c25 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2e9b5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b22c6(%rip),%rsi # 36b43800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc8>\n+\tlea 0x368b32c6(%rip),%rsi # 36b44800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc8>\n \tlea 0x77733(%rip),%rcx # 308c74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ea04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b22a0(%rip),%rsi # 36b43808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd0>\n+\tlea 0x368b32a0(%rip),%rsi # 36b44808 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd0>\n \tlea 0x77753(%rip),%rcx # 308cc2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ea52>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b227a(%rip),%rsi # 36b43810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd8>\n+\tlea 0x368b327a(%rip),%rsi # 36b44810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd8>\n \tlea 0x77773(%rip),%rcx # 308d10 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2eaa0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368b2254(%rip),%rsi # 36b43818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de0>\n+\tlea 0x368b3254(%rip),%rsi # 36b44818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de0>\n \tlea 0x77795(%rip),%rcx # 308d60 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2eaf0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b2217(%rip),%rsi # 36b43820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de8>\n+\tlea 0x368b3217(%rip),%rsi # 36b44820 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de8>\n \tlea 0x777a0(%rip),%rcx # 308db0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2eb40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b21da(%rip),%rsi # 36b43828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df0>\n+\tlea 0x368b31da(%rip),%rsi # 36b44828 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df0>\n \tlea 0x777a9(%rip),%rcx # 308dfe (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2eb8e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b219d(%rip),%rsi # 36b43830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df8>\n+\tlea 0x368b319d(%rip),%rsi # 36b44830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df8>\n \tlea 0x777b2(%rip),%rcx # 308e4c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ebdc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b2160(%rip),%rsi # 36b43838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e00>\n+\tlea 0x368b3160(%rip),%rsi # 36b44838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e00>\n \tlea 0x777bd(%rip),%rcx # 308e9c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ec2c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b2123(%rip),%rsi # 36b43840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e08>\n+\tlea 0x368b3123(%rip),%rsi # 36b44840 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e08>\n \tlea 0x777c8(%rip),%rcx # 308eec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ec7c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b20e6(%rip),%rsi # 36b43848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e10>\n+\tlea 0x368b30e6(%rip),%rsi # 36b44848 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e10>\n \tlea 0x777d1(%rip),%rcx # 308f3a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ecca>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b20a9(%rip),%rsi # 36b43850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e18>\n+\tlea 0x368b30a9(%rip),%rsi # 36b44850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e18>\n \tlea 0x777da(%rip),%rcx # 308f88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ed18>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b206c(%rip),%rsi # 36b43858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e20>\n+\tlea 0x368b306c(%rip),%rsi # 36b44858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e20>\n \tlea 0x777e5(%rip),%rcx # 308fd8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ed68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b202f(%rip),%rsi # 36b43860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e28>\n+\tlea 0x368b302f(%rip),%rsi # 36b44860 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e28>\n \tlea 0x777f0(%rip),%rcx # 309028 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2edb8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b1ff2(%rip),%rsi # 36b43868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e30>\n+\tlea 0x368b2ff2(%rip),%rsi # 36b44868 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e30>\n \tlea 0x777f9(%rip),%rcx # 309076 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ee06>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b1fb5(%rip),%rsi # 36b43870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e38>\n+\tlea 0x368b2fb5(%rip),%rsi # 36b44870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e38>\n \tlea 0x77802(%rip),%rcx # 3090c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ee54>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368b1f78(%rip),%rsi # 36b43878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e40>\n+\tlea 0x368b2f78(%rip),%rsi # 36b44878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e40>\n \tlea 0x7780d(%rip),%rcx # 309114 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2eea4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 291930 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10cc0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x368b4b99(%rip),%rdi # 36b464d0 ::get_beta()::val@@Base+0x1b8>\n+\tmov 0x368b5b99(%rip),%rdi # 36b474d0 ::get_beta()::val@@Base+0x1b8>\n \ttest %rdi,%rdi\n \tje 291951 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ce1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x368b4b83(%rip) # 36b464d0 ::get_beta()::val@@Base+0x1b8>\n+\tmovq $0x0,0x368b5b83(%rip) # 36b474d0 ::get_beta()::val@@Base+0x1b8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 0000000000291960 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)13>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -554394,15 +554394,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368af069(%rip),%rdi # 36b43858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e20>\n+\tlea 0x368b0069(%rip),%rdi # 36b44858 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 294adf (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x317f>\n \tmovabs $0x800000020,%rdx\n@@ -554538,15 +554538,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aed90(%rip),%rdi # 36b43850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e18>\n+\tlea 0x368afd90(%rip),%rdi # 36b44850 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -554697,15 +554697,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aea33(%rip),%rdi # 36b437f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc0>\n+\tlea 0x368afa33(%rip),%rdi # 36b447f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2950b5 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3755>\n \tmovabs $0x800000020,%rdx\n@@ -554841,15 +554841,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ae75a(%rip),%rdi # 36b437f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db8>\n+\tlea 0x368af75a(%rip),%rdi # 36b447f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2db8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -555000,15 +555000,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ae37d(%rip),%rdi # 36b43718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce0>\n+\tlea 0x368af37d(%rip),%rdi # 36b44718 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ce0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 29568b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3d2b>\n \tmovabs $0x800000020,%rdx\n@@ -555144,15 +555144,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ae0a4(%rip),%rdi # 36b43710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd8>\n+\tlea 0x368af0a4(%rip),%rdi # 36b44710 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -555303,15 +555303,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368adea7(%rip),%rdi # 36b43818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de0>\n+\tlea 0x368aeea7(%rip),%rdi # 36b44818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2de0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 295c61 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4301>\n \tmovabs $0x800000020,%rdx\n@@ -555447,15 +555447,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368adbce(%rip),%rdi # 36b43810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd8>\n+\tlea 0x368aebce(%rip),%rdi # 36b44810 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2dd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -555606,15 +555606,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ad871(%rip),%rdi # 36b437b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d80>\n+\tlea 0x368ae871(%rip),%rdi # 36b447b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 296237 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x48d7>\n \tmovabs $0x800000020,%rdx\n@@ -555750,15 +555750,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ad598(%rip),%rdi # 36b437b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d78>\n+\tlea 0x368ae598(%rip),%rdi # 36b447b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -555909,15 +555909,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ad1bb(%rip),%rdi # 36b436d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca0>\n+\tlea 0x368ae1bb(%rip),%rdi # 36b446d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ca0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 29680d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ead>\n \tmovabs $0x800000020,%rdx\n@@ -556053,15 +556053,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368acee2(%rip),%rdi # 36b436d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c98>\n+\tlea 0x368adee2(%rip),%rdi # 36b446d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -556212,15 +556212,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368acd85(%rip),%rdi # 36b43878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e40>\n+\tlea 0x368add85(%rip),%rdi # 36b44878 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 296de3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5483>\n \tmovabs $0x800000020,%rdx\n@@ -556356,15 +556356,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368acaac(%rip),%rdi # 36b43870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e38>\n+\tlea 0x368adaac(%rip),%rdi # 36b44870 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -556515,15 +556515,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ac62f(%rip),%rdi # 36b436f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc0>\n+\tlea 0x368ad62f(%rip),%rdi # 36b446f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2973b9 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5a59>\n \tmovabs $0x800000020,%rdx\n@@ -556659,15 +556659,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ac356(%rip),%rdi # 36b436f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb8>\n+\tlea 0x368ad356(%rip),%rdi # 36b446f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -556818,15 +556818,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ac0d9(%rip),%rdi # 36b43778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d40>\n+\tlea 0x368ad0d9(%rip),%rdi # 36b44778 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 29798f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x602f>\n \tmovabs $0x800000020,%rdx\n@@ -556962,15 +556962,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368abe00(%rip),%rdi # 36b43770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d38>\n+\tlea 0x368ace00(%rip),%rdi # 36b44770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -557121,15 +557121,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aba23(%rip),%rdi # 36b43698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c60>\n+\tlea 0x368aca23(%rip),%rdi # 36b44698 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 298246 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x68e6>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -557271,15 +557271,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ab762(%rip),%rdi # 36b436b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c80>\n+\tlea 0x368ac762(%rip),%rdi # 36b446b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 29853b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6bdb>\n \tmovabs $0x800000020,%rdx\n@@ -557415,15 +557415,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ab469(%rip),%rdi # 36b43690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c58>\n+\tlea 0x368ac469(%rip),%rdi # 36b44690 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -557568,15 +557568,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368ab194(%rip),%rdi # 36b436b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c78>\n+\tlea 0x368ac194(%rip),%rdi # 36b446b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2c78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -557727,15 +557727,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aaf17(%rip),%rdi # 36b43738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d00>\n+\tlea 0x368abf17(%rip),%rdi # 36b44738 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 298b11 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x71b1>\n \tmovabs $0x800000020,%rdx\n@@ -557871,15 +557871,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aac3e(%rip),%rdi # 36b43730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf8>\n+\tlea 0x368abc3e(%rip),%rdi # 36b44730 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2cf8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -558030,15 +558030,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aaa41(%rip),%rdi # 36b43838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e00>\n+\tlea 0x368aba41(%rip),%rdi # 36b44838 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2990e7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7787>\n \tmovabs $0x800000020,%rdx\n@@ -558174,15 +558174,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aa768(%rip),%rdi # 36b43830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df8>\n+\tlea 0x368ab768(%rip),%rdi # 36b44830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2df8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -558333,15 +558333,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aa38b(%rip),%rdi # 36b43758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d20>\n+\tlea 0x368ab38b(%rip),%rdi # 36b44758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2996bd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7d5d>\n \tmovabs $0x800000020,%rdx\n@@ -558477,15 +558477,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368aa0b2(%rip),%rdi # 36b43750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d18>\n+\tlea 0x368ab0b2(%rip),%rdi # 36b44750 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -558636,15 +558636,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368a9e35(%rip),%rdi # 36b437d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da0>\n+\tlea 0x368aae35(%rip),%rdi # 36b447d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2da0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 299c93 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8333>\n \tmovabs $0x800000020,%rdx\n@@ -558780,15 +558780,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368a9b5c(%rip),%rdi # 36b437d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d98>\n+\tlea 0x368aab5c(%rip),%rdi # 36b447d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -558939,15 +558939,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368a981f(%rip),%rdi # 36b43798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d60>\n+\tlea 0x368aa81f(%rip),%rdi # 36b44798 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 29a269 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8909>\n \tmovabs $0x800000020,%rdx\n@@ -559083,15 +559083,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368a9546(%rip),%rdi # 36b43790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d58>\n+\tlea 0x368aa546(%rip),%rdi # 36b44790 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2d58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -560934,15 +560934,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 28de60 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd1f0>\n \tadd $0x1c8,%rsp\n \tjmp 29babd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xa15d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x368a9457(%rip),%rax \n+\tmov 0x368aa457(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x59d58(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x59d57(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -561232,15 +561232,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a77b8(%rip),%rdi # 36b43880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e48>\n+\tlea 0x368a87b8(%rip),%rdi # 36b44880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561301,15 +561301,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a7600(%rip),%rdi # 36b43888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e50>\n+\tlea 0x368a8600(%rip),%rdi # 36b44888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561350,15 +561350,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a74e6(%rip),%rdi # 36b43890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e58>\n+\tlea 0x368a84e6(%rip),%rdi # 36b44890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561399,15 +561399,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a73ce(%rip),%rdi # 36b43898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e60>\n+\tlea 0x368a83ce(%rip),%rdi # 36b44898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561468,15 +561468,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a7218(%rip),%rdi # 36b438a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e68>\n+\tlea 0x368a8218(%rip),%rdi # 36b448a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561537,15 +561537,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a7060(%rip),%rdi # 36b438a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e70>\n+\tlea 0x368a8060(%rip),%rdi # 36b448a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561586,15 +561586,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a6f46(%rip),%rdi # 36b438b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e78>\n+\tlea 0x368a7f46(%rip),%rdi # 36b448b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561635,15 +561635,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a6e2e(%rip),%rdi # 36b438b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e80>\n+\tlea 0x368a7e2e(%rip),%rdi # 36b448b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561704,15 +561704,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a6c78(%rip),%rdi # 36b438c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e88>\n+\tlea 0x368a7c78(%rip),%rdi # 36b448c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561773,15 +561773,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a6ac0(%rip),%rdi # 36b438c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e90>\n+\tlea 0x368a7ac0(%rip),%rdi # 36b448c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561822,15 +561822,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a69a6(%rip),%rdi # 36b438d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e98>\n+\tlea 0x368a79a6(%rip),%rdi # 36b448d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561871,15 +561871,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a688e(%rip),%rdi # 36b438d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea0>\n+\tlea 0x368a788e(%rip),%rdi # 36b448d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -561940,15 +561940,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a66d8(%rip),%rdi # 36b438e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea8>\n+\tlea 0x368a76d8(%rip),%rdi # 36b448e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562009,15 +562009,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a6520(%rip),%rdi # 36b438e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb0>\n+\tlea 0x368a7520(%rip),%rdi # 36b448e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562058,15 +562058,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a6406(%rip),%rdi # 36b438f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb8>\n+\tlea 0x368a7406(%rip),%rdi # 36b448f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562107,15 +562107,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a62ee(%rip),%rdi # 36b438f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec0>\n+\tlea 0x368a72ee(%rip),%rdi # 36b448f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562176,15 +562176,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a6138(%rip),%rdi # 36b43900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec8>\n+\tlea 0x368a7138(%rip),%rdi # 36b44900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562245,15 +562245,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a5f80(%rip),%rdi # 36b43908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed0>\n+\tlea 0x368a6f80(%rip),%rdi # 36b44908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562294,15 +562294,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a5e66(%rip),%rdi # 36b43910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed8>\n+\tlea 0x368a6e66(%rip),%rdi # 36b44910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562343,15 +562343,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a5d4e(%rip),%rdi # 36b43918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee0>\n+\tlea 0x368a6d4e(%rip),%rdi # 36b44918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562412,15 +562412,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a5b98(%rip),%rdi # 36b43920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee8>\n+\tlea 0x368a6b98(%rip),%rdi # 36b44920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562481,15 +562481,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a59e0(%rip),%rdi # 36b43928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef0>\n+\tlea 0x368a69e0(%rip),%rdi # 36b44928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562530,15 +562530,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a58c6(%rip),%rdi # 36b43930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef8>\n+\tlea 0x368a68c6(%rip),%rdi # 36b44930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562579,15 +562579,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a57ae(%rip),%rdi # 36b43938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f00>\n+\tlea 0x368a67ae(%rip),%rdi # 36b44938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f00>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562648,15 +562648,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a55f8(%rip),%rdi # 36b43940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f08>\n+\tlea 0x368a65f8(%rip),%rdi # 36b44940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f08>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562717,15 +562717,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a5440(%rip),%rdi # 36b43948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f10>\n+\tlea 0x368a6440(%rip),%rdi # 36b44948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f10>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562766,15 +562766,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a5326(%rip),%rdi # 36b43950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f18>\n+\tlea 0x368a6326(%rip),%rdi # 36b44950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f18>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562815,15 +562815,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a520e(%rip),%rdi # 36b43958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f20>\n+\tlea 0x368a620e(%rip),%rdi # 36b44958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f20>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562884,15 +562884,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a5058(%rip),%rdi # 36b43960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f28>\n+\tlea 0x368a6058(%rip),%rdi # 36b44960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f28>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -562953,15 +562953,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a4ea0(%rip),%rdi # 36b43968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f30>\n+\tlea 0x368a5ea0(%rip),%rdi # 36b44968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f30>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563002,15 +563002,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a4d86(%rip),%rdi # 36b43970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f38>\n+\tlea 0x368a5d86(%rip),%rdi # 36b44970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f38>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563051,15 +563051,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a4c6e(%rip),%rdi # 36b43978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f40>\n+\tlea 0x368a5c6e(%rip),%rdi # 36b44978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f40>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563120,15 +563120,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a4ab8(%rip),%rdi # 36b43980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f48>\n+\tlea 0x368a5ab8(%rip),%rdi # 36b44980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f48>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563189,15 +563189,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a4900(%rip),%rdi # 36b43988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f50>\n+\tlea 0x368a5900(%rip),%rdi # 36b44988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f50>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563238,15 +563238,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a47e6(%rip),%rdi # 36b43990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f58>\n+\tlea 0x368a57e6(%rip),%rdi # 36b44990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f58>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563287,15 +563287,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a46ce(%rip),%rdi # 36b43998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f60>\n+\tlea 0x368a56ce(%rip),%rdi # 36b44998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f60>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563356,15 +563356,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a4518(%rip),%rdi # 36b439a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f68>\n+\tlea 0x368a5518(%rip),%rdi # 36b449a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f68>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563425,15 +563425,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a4360(%rip),%rdi # 36b439a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f70>\n+\tlea 0x368a5360(%rip),%rdi # 36b449a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f70>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563474,15 +563474,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a4246(%rip),%rdi # 36b439b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f78>\n+\tlea 0x368a5246(%rip),%rdi # 36b449b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f78>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563523,15 +563523,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a412e(%rip),%rdi # 36b439b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f80>\n+\tlea 0x368a512e(%rip),%rdi # 36b449b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f80>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563592,15 +563592,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a3f78(%rip),%rdi # 36b439c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f88>\n+\tlea 0x368a4f78(%rip),%rdi # 36b449c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f88>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563661,15 +563661,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a3dc0(%rip),%rdi # 36b439c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f90>\n+\tlea 0x368a4dc0(%rip),%rdi # 36b449c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f90>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563710,15 +563710,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a3ca6(%rip),%rdi # 36b439d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f98>\n+\tlea 0x368a4ca6(%rip),%rdi # 36b449d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f98>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563759,15 +563759,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a3b8e(%rip),%rdi # 36b439d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa0>\n+\tlea 0x368a4b8e(%rip),%rdi # 36b449d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563828,15 +563828,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a39d8(%rip),%rdi # 36b439e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa8>\n+\tlea 0x368a49d8(%rip),%rdi # 36b449e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563897,15 +563897,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a3820(%rip),%rdi # 36b439e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb0>\n+\tlea 0x368a4820(%rip),%rdi # 36b449e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563946,15 +563946,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a3706(%rip),%rdi # 36b439f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb8>\n+\tlea 0x368a4706(%rip),%rdi # 36b449f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -563995,15 +563995,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a35ee(%rip),%rdi # 36b439f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc0>\n+\tlea 0x368a45ee(%rip),%rdi # 36b449f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564064,15 +564064,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a3438(%rip),%rdi # 36b43a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc8>\n+\tlea 0x368a4438(%rip),%rdi # 36b44a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564133,15 +564133,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a3280(%rip),%rdi # 36b43a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd0>\n+\tlea 0x368a4280(%rip),%rdi # 36b44a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564182,15 +564182,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a3166(%rip),%rdi # 36b43a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd8>\n+\tlea 0x368a4166(%rip),%rdi # 36b44a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564231,15 +564231,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a304e(%rip),%rdi # 36b43a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe0>\n+\tlea 0x368a404e(%rip),%rdi # 36b44a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564300,15 +564300,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a2e98(%rip),%rdi # 36b43a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe8>\n+\tlea 0x368a3e98(%rip),%rdi # 36b44a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564369,15 +564369,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a2ce0(%rip),%rdi # 36b43a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff0>\n+\tlea 0x368a3ce0(%rip),%rdi # 36b44a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564418,15 +564418,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a2bc6(%rip),%rdi # 36b43a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff8>\n+\tlea 0x368a3bc6(%rip),%rdi # 36b44a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564467,15 +564467,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a2aae(%rip),%rdi # 36b43a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3000>\n+\tlea 0x368a3aae(%rip),%rdi # 36b44a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3000>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564536,15 +564536,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a28f8(%rip),%rdi # 36b43a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3008>\n+\tlea 0x368a38f8(%rip),%rdi # 36b44a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3008>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564605,15 +564605,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a2740(%rip),%rdi # 36b43a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3010>\n+\tlea 0x368a3740(%rip),%rdi # 36b44a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3010>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564654,15 +564654,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a2626(%rip),%rdi # 36b43a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3018>\n+\tlea 0x368a3626(%rip),%rdi # 36b44a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3018>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564703,15 +564703,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a250e(%rip),%rdi # 36b43a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3020>\n+\tlea 0x368a350e(%rip),%rdi # 36b44a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3020>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564772,15 +564772,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a2358(%rip),%rdi # 36b43a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3028>\n+\tlea 0x368a3358(%rip),%rdi # 36b44a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3028>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564841,15 +564841,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368a21a0(%rip),%rdi # 36b43a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3030>\n+\tlea 0x368a31a0(%rip),%rdi # 36b44a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3030>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564890,15 +564890,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a2086(%rip),%rdi # 36b43a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3038>\n+\tlea 0x368a3086(%rip),%rdi # 36b44a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3038>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -564939,696 +564939,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368a1f6e(%rip),%rdi # 36b43a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3040>\n+\tlea 0x368a2f6e(%rip),%rdi # 36b44a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3040>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368a499c(%rip),%rbx # 36b464d8 ::get_beta()::val@@Base+0x1c0>\n+\tmov 0x368a599c(%rip),%rbx # 36b474d8 ::get_beta()::val@@Base+0x1c0>\n \ttest %rbx,%rbx\n \tjne 2a1b57 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x101f7>\n-\tlea 0x368a3be0(%rip),%rdi # 36b45728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4cf0>\n+\tlea 0x368a4be0(%rip),%rdi # 36b46728 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4cf0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368a4981(%rip) # 36b464d8 ::get_beta()::val@@Base+0x1c0>\n+\tmov %rax,0x368a5981(%rip) # 36b474d8 ::get_beta()::val@@Base+0x1c0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1d16(%rip),%rsi # 36b43880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e48>\n+\tlea 0x368a2d16(%rip),%rsi # 36b44880 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e48>\n \tlea 0x675f3(%rip),%rcx # 309164 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2eef4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1cf0(%rip),%rsi # 36b43888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e50>\n+\tlea 0x368a2cf0(%rip),%rsi # 36b44888 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e50>\n \tlea 0x67611(%rip),%rcx # 3091b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ef40>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1cca(%rip),%rsi # 36b43890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e58>\n+\tlea 0x368a2cca(%rip),%rsi # 36b44890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e58>\n \tlea 0x6762f(%rip),%rcx # 3091fc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ef8c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1ca4(%rip),%rsi # 36b43898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e60>\n+\tlea 0x368a2ca4(%rip),%rsi # 36b44898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e60>\n \tlea 0x6764f(%rip),%rcx # 30924a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2efda>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1c7e(%rip),%rsi # 36b438a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e68>\n+\tlea 0x368a2c7e(%rip),%rsi # 36b448a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e68>\n \tlea 0x6766f(%rip),%rcx # 309298 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f028>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1c58(%rip),%rsi # 36b438a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e70>\n+\tlea 0x368a2c58(%rip),%rsi # 36b448a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e70>\n \tlea 0x6768e(%rip),%rcx # 3092e5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f075>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1c32(%rip),%rsi # 36b438b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e78>\n+\tlea 0x368a2c32(%rip),%rsi # 36b448b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e78>\n \tlea 0x676ad(%rip),%rcx # 309332 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1c0c(%rip),%rsi # 36b438b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e80>\n+\tlea 0x368a2c0c(%rip),%rsi # 36b448b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e80>\n \tlea 0x676ce(%rip),%rcx # 309381 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f111>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1be6(%rip),%rsi # 36b438c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e88>\n+\tlea 0x368a2be6(%rip),%rsi # 36b448c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e88>\n \tlea 0x676ef(%rip),%rcx # 3093d0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f160>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1bc0(%rip),%rsi # 36b438c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e90>\n+\tlea 0x368a2bc0(%rip),%rsi # 36b448c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e90>\n \tlea 0x6770e(%rip),%rcx # 30941d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f1ad>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1b9a(%rip),%rsi # 36b438d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e98>\n+\tlea 0x368a2b9a(%rip),%rsi # 36b448d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e98>\n \tlea 0x6772d(%rip),%rcx # 30946a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f1fa>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1b74(%rip),%rsi # 36b438d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea0>\n+\tlea 0x368a2b74(%rip),%rsi # 36b448d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea0>\n \tlea 0x6774e(%rip),%rcx # 3094b9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f249>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1b4e(%rip),%rsi # 36b438e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea8>\n+\tlea 0x368a2b4e(%rip),%rsi # 36b448e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea8>\n \tlea 0x6776f(%rip),%rcx # 309508 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f298>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1b28(%rip),%rsi # 36b438e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb0>\n+\tlea 0x368a2b28(%rip),%rsi # 36b448e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb0>\n \tlea 0x6778e(%rip),%rcx # 309555 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f2e5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1b02(%rip),%rsi # 36b438f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb8>\n+\tlea 0x368a2b02(%rip),%rsi # 36b448f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb8>\n \tlea 0x677ad(%rip),%rcx # 3095a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f332>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1adc(%rip),%rsi # 36b438f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec0>\n+\tlea 0x368a2adc(%rip),%rsi # 36b448f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec0>\n \tlea 0x677ce(%rip),%rcx # 3095f1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f381>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1ab6(%rip),%rsi # 36b43900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec8>\n+\tlea 0x368a2ab6(%rip),%rsi # 36b44900 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec8>\n \tlea 0x677ef(%rip),%rcx # 309640 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f3d0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1a90(%rip),%rsi # 36b43908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed0>\n+\tlea 0x368a2a90(%rip),%rsi # 36b44908 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed0>\n \tlea 0x6780e(%rip),%rcx # 30968d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f41d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1a6a(%rip),%rsi # 36b43910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed8>\n+\tlea 0x368a2a6a(%rip),%rsi # 36b44910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed8>\n \tlea 0x6782d(%rip),%rcx # 3096da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f46a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1a44(%rip),%rsi # 36b43918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee0>\n+\tlea 0x368a2a44(%rip),%rsi # 36b44918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee0>\n \tlea 0x6784e(%rip),%rcx # 309729 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f4b9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1a1e(%rip),%rsi # 36b43920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee8>\n+\tlea 0x368a2a1e(%rip),%rsi # 36b44920 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee8>\n \tlea 0x6786f(%rip),%rcx # 309778 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f508>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a19f8(%rip),%rsi # 36b43928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef0>\n+\tlea 0x368a29f8(%rip),%rsi # 36b44928 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef0>\n \tlea 0x6788e(%rip),%rcx # 3097c5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f555>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a19d2(%rip),%rsi # 36b43930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef8>\n+\tlea 0x368a29d2(%rip),%rsi # 36b44930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef8>\n \tlea 0x678ad(%rip),%rcx # 309812 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f5a2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a19ac(%rip),%rsi # 36b43938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f00>\n+\tlea 0x368a29ac(%rip),%rsi # 36b44938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f00>\n \tlea 0x678ce(%rip),%rcx # 309861 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f5f1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1986(%rip),%rsi # 36b43940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f08>\n+\tlea 0x368a2986(%rip),%rsi # 36b44940 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f08>\n \tlea 0x678ef(%rip),%rcx # 3098b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f640>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1960(%rip),%rsi # 36b43948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f10>\n+\tlea 0x368a2960(%rip),%rsi # 36b44948 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f10>\n \tlea 0x6790e(%rip),%rcx # 3098fd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f68d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a193a(%rip),%rsi # 36b43950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f18>\n+\tlea 0x368a293a(%rip),%rsi # 36b44950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f18>\n \tlea 0x6792d(%rip),%rcx # 30994a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f6da>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1914(%rip),%rsi # 36b43958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f20>\n+\tlea 0x368a2914(%rip),%rsi # 36b44958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f20>\n \tlea 0x6794e(%rip),%rcx # 309999 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f729>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a18ee(%rip),%rsi # 36b43960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f28>\n+\tlea 0x368a28ee(%rip),%rsi # 36b44960 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f28>\n \tlea 0x6796f(%rip),%rcx # 3099e8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f778>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a18c8(%rip),%rsi # 36b43968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f30>\n+\tlea 0x368a28c8(%rip),%rsi # 36b44968 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f30>\n \tlea 0x6798e(%rip),%rcx # 309a35 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f7c5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a18a2(%rip),%rsi # 36b43970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f38>\n+\tlea 0x368a28a2(%rip),%rsi # 36b44970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f38>\n \tlea 0x679ad(%rip),%rcx # 309a82 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f812>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a187c(%rip),%rsi # 36b43978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f40>\n+\tlea 0x368a287c(%rip),%rsi # 36b44978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f40>\n \tlea 0x679ce(%rip),%rcx # 309ad1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f861>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1856(%rip),%rsi # 36b43980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f48>\n+\tlea 0x368a2856(%rip),%rsi # 36b44980 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f48>\n \tlea 0x679ef(%rip),%rcx # 309b20 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f8b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1830(%rip),%rsi # 36b43988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f50>\n+\tlea 0x368a2830(%rip),%rsi # 36b44988 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f50>\n \tlea 0x67a0e(%rip),%rcx # 309b6d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f8fd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a180a(%rip),%rsi # 36b43990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f58>\n+\tlea 0x368a280a(%rip),%rsi # 36b44990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f58>\n \tlea 0x67a2d(%rip),%rcx # 309bba (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f94a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a17e4(%rip),%rsi # 36b43998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f60>\n+\tlea 0x368a27e4(%rip),%rsi # 36b44998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f60>\n \tlea 0x67a4e(%rip),%rcx # 309c09 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f999>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a17be(%rip),%rsi # 36b439a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f68>\n+\tlea 0x368a27be(%rip),%rsi # 36b449a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f68>\n \tlea 0x67a6f(%rip),%rcx # 309c58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f9e8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1798(%rip),%rsi # 36b439a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f70>\n+\tlea 0x368a2798(%rip),%rsi # 36b449a8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f70>\n \tlea 0x67a8e(%rip),%rcx # 309ca5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fa35>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1772(%rip),%rsi # 36b439b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f78>\n+\tlea 0x368a2772(%rip),%rsi # 36b449b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f78>\n \tlea 0x67aad(%rip),%rcx # 309cf2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fa82>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a174c(%rip),%rsi # 36b439b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f80>\n+\tlea 0x368a274c(%rip),%rsi # 36b449b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f80>\n \tlea 0x67ace(%rip),%rcx # 309d41 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fad1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1726(%rip),%rsi # 36b439c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f88>\n+\tlea 0x368a2726(%rip),%rsi # 36b449c0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f88>\n \tlea 0x67aef(%rip),%rcx # 309d90 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fb20>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1700(%rip),%rsi # 36b439c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f90>\n+\tlea 0x368a2700(%rip),%rsi # 36b449c8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f90>\n \tlea 0x67b0e(%rip),%rcx # 309ddd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fb6d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a16da(%rip),%rsi # 36b439d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f98>\n+\tlea 0x368a26da(%rip),%rsi # 36b449d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f98>\n \tlea 0x67b2d(%rip),%rcx # 309e2a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fbba>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a16b4(%rip),%rsi # 36b439d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa0>\n+\tlea 0x368a26b4(%rip),%rsi # 36b449d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa0>\n \tlea 0x67b4e(%rip),%rcx # 309e79 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fc09>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a168e(%rip),%rsi # 36b439e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa8>\n+\tlea 0x368a268e(%rip),%rsi # 36b449e0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa8>\n \tlea 0x67b6f(%rip),%rcx # 309ec8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fc58>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1668(%rip),%rsi # 36b439e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb0>\n+\tlea 0x368a2668(%rip),%rsi # 36b449e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb0>\n \tlea 0x67b8e(%rip),%rcx # 309f15 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fca5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1642(%rip),%rsi # 36b439f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb8>\n+\tlea 0x368a2642(%rip),%rsi # 36b449f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb8>\n \tlea 0x67bad(%rip),%rcx # 309f62 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fcf2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a161c(%rip),%rsi # 36b439f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc0>\n+\tlea 0x368a261c(%rip),%rsi # 36b449f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc0>\n \tlea 0x67bce(%rip),%rcx # 309fb1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fd41>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a15f6(%rip),%rsi # 36b43a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc8>\n+\tlea 0x368a25f6(%rip),%rsi # 36b44a00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc8>\n \tlea 0x67bef(%rip),%rcx # 30a000 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fd90>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a15d0(%rip),%rsi # 36b43a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd0>\n+\tlea 0x368a25d0(%rip),%rsi # 36b44a08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd0>\n \tlea 0x67c0f(%rip),%rcx # 30a04e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fdde>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a15aa(%rip),%rsi # 36b43a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd8>\n+\tlea 0x368a25aa(%rip),%rsi # 36b44a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd8>\n \tlea 0x67c2f(%rip),%rcx # 30a09c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fe2c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368a1584(%rip),%rsi # 36b43a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe0>\n+\tlea 0x368a2584(%rip),%rsi # 36b44a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe0>\n \tlea 0x67c51(%rip),%rcx # 30a0ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fe7c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a1547(%rip),%rsi # 36b43a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe8>\n+\tlea 0x368a2547(%rip),%rsi # 36b44a20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe8>\n \tlea 0x67c5c(%rip),%rcx # 30a13c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2fecc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a150a(%rip),%rsi # 36b43a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff0>\n+\tlea 0x368a250a(%rip),%rsi # 36b44a28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff0>\n \tlea 0x67c65(%rip),%rcx # 30a18a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ff1a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a14cd(%rip),%rsi # 36b43a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff8>\n+\tlea 0x368a24cd(%rip),%rsi # 36b44a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff8>\n \tlea 0x67c6e(%rip),%rcx # 30a1d8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ff68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a1490(%rip),%rsi # 36b43a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3000>\n+\tlea 0x368a2490(%rip),%rsi # 36b44a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3000>\n \tlea 0x67c79(%rip),%rcx # 30a228 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2ffb8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a1453(%rip),%rsi # 36b43a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3008>\n+\tlea 0x368a2453(%rip),%rsi # 36b44a40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3008>\n \tlea 0x67c84(%rip),%rcx # 30a278 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30008>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a1416(%rip),%rsi # 36b43a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3010>\n+\tlea 0x368a2416(%rip),%rsi # 36b44a48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3010>\n \tlea 0x67c8d(%rip),%rcx # 30a2c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30056>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a13d9(%rip),%rsi # 36b43a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3018>\n+\tlea 0x368a23d9(%rip),%rsi # 36b44a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3018>\n \tlea 0x67c96(%rip),%rcx # 30a314 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x300a4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a139c(%rip),%rsi # 36b43a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3020>\n+\tlea 0x368a239c(%rip),%rsi # 36b44a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3020>\n \tlea 0x67ca1(%rip),%rcx # 30a364 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x300f4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a135f(%rip),%rsi # 36b43a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3028>\n+\tlea 0x368a235f(%rip),%rsi # 36b44a60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3028>\n \tlea 0x67cac(%rip),%rcx # 30a3b4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30144>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a1322(%rip),%rsi # 36b43a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3030>\n+\tlea 0x368a2322(%rip),%rsi # 36b44a68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3030>\n \tlea 0x67cb5(%rip),%rcx # 30a402 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30192>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a12e5(%rip),%rsi # 36b43a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3038>\n+\tlea 0x368a22e5(%rip),%rsi # 36b44a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3038>\n \tlea 0x67cbe(%rip),%rcx # 30a450 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x301e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368a12a8(%rip),%rsi # 36b43a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3040>\n+\tlea 0x368a22a8(%rip),%rsi # 36b44a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3040>\n \tlea 0x67cc9(%rip),%rcx # 30a4a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30230>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 2a2800 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ea0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x368a3cd1(%rip),%rdi # 36b464d8 ::get_beta()::val@@Base+0x1c0>\n+\tmov 0x368a4cd1(%rip),%rdi # 36b474d8 ::get_beta()::val@@Base+0x1c0>\n \ttest %rdi,%rdi\n \tje 2a2821 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ec1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x368a3cbb(%rip) # 36b464d8 ::get_beta()::val@@Base+0x1c0>\n+\tmovq $0x0,0x368a4cbb(%rip) # 36b474d8 ::get_beta()::val@@Base+0x1c0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002a2830 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)14>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -569490,15 +569490,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689e399(%rip),%rdi # 36b43a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3020>\n+\tlea 0x3689f399(%rip),%rdi # 36b44a58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3020>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a59af (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x317f>\n \tmovabs $0x800000020,%rdx\n@@ -569634,15 +569634,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689e0c0(%rip),%rdi # 36b43a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3018>\n+\tlea 0x3689f0c0(%rip),%rdi # 36b44a50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3018>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -569793,15 +569793,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689dd63(%rip),%rdi # 36b439f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc0>\n+\tlea 0x3689ed63(%rip),%rdi # 36b449f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fc0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a5f85 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3755>\n \tmovabs $0x800000020,%rdx\n@@ -569937,15 +569937,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689da8a(%rip),%rdi # 36b439f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb8>\n+\tlea 0x3689ea8a(%rip),%rdi # 36b449f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -570096,15 +570096,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689d6ad(%rip),%rdi # 36b43918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee0>\n+\tlea 0x3689e6ad(%rip),%rdi # 36b44918 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ee0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a655b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3d2b>\n \tmovabs $0x800000020,%rdx\n@@ -570240,15 +570240,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689d3d4(%rip),%rdi # 36b43910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed8>\n+\tlea 0x3689e3d4(%rip),%rdi # 36b44910 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ed8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -570399,15 +570399,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689d1d7(%rip),%rdi # 36b43a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe0>\n+\tlea 0x3689e1d7(%rip),%rdi # 36b44a18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fe0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a6b31 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4301>\n \tmovabs $0x800000020,%rdx\n@@ -570543,15 +570543,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689cefe(%rip),%rdi # 36b43a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd8>\n+\tlea 0x3689defe(%rip),%rdi # 36b44a10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fd8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -570702,15 +570702,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689cba1(%rip),%rdi # 36b439b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f80>\n+\tlea 0x3689dba1(%rip),%rdi # 36b449b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a7107 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x48d7>\n \tmovabs $0x800000020,%rdx\n@@ -570846,15 +570846,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689c8c8(%rip),%rdi # 36b439b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f78>\n+\tlea 0x3689d8c8(%rip),%rdi # 36b449b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -571005,15 +571005,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689c4eb(%rip),%rdi # 36b438d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea0>\n+\tlea 0x3689d4eb(%rip),%rdi # 36b448d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ea0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a76dd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ead>\n \tmovabs $0x800000020,%rdx\n@@ -571149,15 +571149,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689c212(%rip),%rdi # 36b438d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e98>\n+\tlea 0x3689d212(%rip),%rdi # 36b448d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -571308,15 +571308,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689c0b5(%rip),%rdi # 36b43a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3040>\n+\tlea 0x3689d0b5(%rip),%rdi # 36b44a78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3040>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a7cb3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5483>\n \tmovabs $0x800000020,%rdx\n@@ -571452,15 +571452,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689bddc(%rip),%rdi # 36b43a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3038>\n+\tlea 0x3689cddc(%rip),%rdi # 36b44a70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3038>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -571611,15 +571611,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689b95f(%rip),%rdi # 36b438f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec0>\n+\tlea 0x3689c95f(%rip),%rdi # 36b448f8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ec0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a8289 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5a59>\n \tmovabs $0x800000020,%rdx\n@@ -571755,15 +571755,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689b686(%rip),%rdi # 36b438f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb8>\n+\tlea 0x3689c686(%rip),%rdi # 36b448f0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2eb8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -571914,15 +571914,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689b409(%rip),%rdi # 36b43978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f40>\n+\tlea 0x3689c409(%rip),%rdi # 36b44978 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f40>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a885f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x602f>\n \tmovabs $0x800000020,%rdx\n@@ -572058,15 +572058,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689b130(%rip),%rdi # 36b43970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f38>\n+\tlea 0x3689c130(%rip),%rdi # 36b44970 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f38>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -572217,15 +572217,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689ad53(%rip),%rdi # 36b43898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e60>\n+\tlea 0x3689bd53(%rip),%rdi # 36b44898 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a9116 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x68e6>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -572367,15 +572367,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689aa92(%rip),%rdi # 36b438b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e80>\n+\tlea 0x3689ba92(%rip),%rdi # 36b448b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e80>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a940b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6bdb>\n \tmovabs $0x800000020,%rdx\n@@ -572511,15 +572511,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689a799(%rip),%rdi # 36b43890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e58>\n+\tlea 0x3689b799(%rip),%rdi # 36b44890 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -572664,15 +572664,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689a4c4(%rip),%rdi # 36b438b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e78>\n+\tlea 0x3689b4c4(%rip),%rdi # 36b448b0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2e78>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -572823,15 +572823,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3689a247(%rip),%rdi # 36b43938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f00>\n+\tlea 0x3689b247(%rip),%rdi # 36b44938 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f00>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a99e1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x71b1>\n \tmovabs $0x800000020,%rdx\n@@ -572967,15 +572967,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36899f6e(%rip),%rdi # 36b43930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef8>\n+\tlea 0x3689af6e(%rip),%rdi # 36b44930 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ef8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -573126,15 +573126,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36899d71(%rip),%rdi # 36b43a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3000>\n+\tlea 0x3689ad71(%rip),%rdi # 36b44a38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3000>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2a9fb7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7787>\n \tmovabs $0x800000020,%rdx\n@@ -573270,15 +573270,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36899a98(%rip),%rdi # 36b43a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff8>\n+\tlea 0x3689aa98(%rip),%rdi # 36b44a30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2ff8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -573429,15 +573429,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368996bb(%rip),%rdi # 36b43958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f20>\n+\tlea 0x3689a6bb(%rip),%rdi # 36b44958 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f20>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2aa58d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7d5d>\n \tmovabs $0x800000020,%rdx\n@@ -573573,15 +573573,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368993e2(%rip),%rdi # 36b43950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f18>\n+\tlea 0x3689a3e2(%rip),%rdi # 36b44950 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f18>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -573732,15 +573732,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36899165(%rip),%rdi # 36b439d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa0>\n+\tlea 0x3689a165(%rip),%rdi # 36b449d8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2fa0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2aab63 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8333>\n \tmovabs $0x800000020,%rdx\n@@ -573876,15 +573876,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36898e8c(%rip),%rdi # 36b439d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f98>\n+\tlea 0x36899e8c(%rip),%rdi # 36b449d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f98>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -574035,15 +574035,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36898b4f(%rip),%rdi # 36b43998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f60>\n+\tlea 0x36899b4f(%rip),%rdi # 36b44998 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f60>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2ab139 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8909>\n \tmovabs $0x800000020,%rdx\n@@ -574179,15 +574179,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36898876(%rip),%rdi # 36b43990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f58>\n+\tlea 0x36899876(%rip),%rdi # 36b44990 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x2f58>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -576030,15 +576030,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 29ed30 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd3d0>\n \tadd $0x1c8,%rsp\n \tjmp 2ac98d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xa15d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36898587(%rip),%rax \n+\tmov 0x36899587(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x48e88(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x48e87(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -576328,15 +576328,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36896ae8(%rip),%rdi # 36b43a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3048>\n+\tlea 0x36897ae8(%rip),%rdi # 36b44a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3048>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576397,15 +576397,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36896930(%rip),%rdi # 36b43a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3050>\n+\tlea 0x36897930(%rip),%rdi # 36b44a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3050>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576446,15 +576446,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36896816(%rip),%rdi # 36b43a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3058>\n+\tlea 0x36897816(%rip),%rdi # 36b44a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3058>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576495,15 +576495,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368966fe(%rip),%rdi # 36b43a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3060>\n+\tlea 0x368976fe(%rip),%rdi # 36b44a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3060>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576564,15 +576564,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36896548(%rip),%rdi # 36b43aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3068>\n+\tlea 0x36897548(%rip),%rdi # 36b44aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3068>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576633,15 +576633,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36896390(%rip),%rdi # 36b43aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3070>\n+\tlea 0x36897390(%rip),%rdi # 36b44aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3070>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576682,15 +576682,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36896276(%rip),%rdi # 36b43ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3078>\n+\tlea 0x36897276(%rip),%rdi # 36b44ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3078>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576731,15 +576731,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689615e(%rip),%rdi # 36b43ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3080>\n+\tlea 0x3689715e(%rip),%rdi # 36b44ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3080>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576800,15 +576800,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36895fa8(%rip),%rdi # 36b43ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3088>\n+\tlea 0x36896fa8(%rip),%rdi # 36b44ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3088>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576869,15 +576869,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36895df0(%rip),%rdi # 36b43ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3090>\n+\tlea 0x36896df0(%rip),%rdi # 36b44ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3090>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576918,15 +576918,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36895cd6(%rip),%rdi # 36b43ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3098>\n+\tlea 0x36896cd6(%rip),%rdi # 36b44ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3098>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -576967,15 +576967,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36895bbe(%rip),%rdi # 36b43ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a0>\n+\tlea 0x36896bbe(%rip),%rdi # 36b44ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577036,15 +577036,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36895a08(%rip),%rdi # 36b43ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a8>\n+\tlea 0x36896a08(%rip),%rdi # 36b44ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577105,15 +577105,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36895850(%rip),%rdi # 36b43ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b0>\n+\tlea 0x36896850(%rip),%rdi # 36b44ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577154,15 +577154,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36895736(%rip),%rdi # 36b43af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b8>\n+\tlea 0x36896736(%rip),%rdi # 36b44af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577203,15 +577203,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689561e(%rip),%rdi # 36b43af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c0>\n+\tlea 0x3689661e(%rip),%rdi # 36b44af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577272,15 +577272,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36895468(%rip),%rdi # 36b43b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c8>\n+\tlea 0x36896468(%rip),%rdi # 36b44b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577341,15 +577341,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368952b0(%rip),%rdi # 36b43b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d0>\n+\tlea 0x368962b0(%rip),%rdi # 36b44b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577390,15 +577390,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36895196(%rip),%rdi # 36b43b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d8>\n+\tlea 0x36896196(%rip),%rdi # 36b44b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577439,15 +577439,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689507e(%rip),%rdi # 36b43b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e0>\n+\tlea 0x3689607e(%rip),%rdi # 36b44b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577508,15 +577508,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36894ec8(%rip),%rdi # 36b43b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e8>\n+\tlea 0x36895ec8(%rip),%rdi # 36b44b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577577,15 +577577,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36894d10(%rip),%rdi # 36b43b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f0>\n+\tlea 0x36895d10(%rip),%rdi # 36b44b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577626,15 +577626,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36894bf6(%rip),%rdi # 36b43b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f8>\n+\tlea 0x36895bf6(%rip),%rdi # 36b44b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577675,15 +577675,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36894ade(%rip),%rdi # 36b43b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3100>\n+\tlea 0x36895ade(%rip),%rdi # 36b44b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3100>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577744,15 +577744,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36894928(%rip),%rdi # 36b43b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3108>\n+\tlea 0x36895928(%rip),%rdi # 36b44b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3108>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577813,15 +577813,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36894770(%rip),%rdi # 36b43b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3110>\n+\tlea 0x36895770(%rip),%rdi # 36b44b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3110>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577862,15 +577862,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36894656(%rip),%rdi # 36b43b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3118>\n+\tlea 0x36895656(%rip),%rdi # 36b44b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3118>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577911,15 +577911,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689453e(%rip),%rdi # 36b43b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3120>\n+\tlea 0x3689553e(%rip),%rdi # 36b44b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3120>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -577980,15 +577980,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36894388(%rip),%rdi # 36b43b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3128>\n+\tlea 0x36895388(%rip),%rdi # 36b44b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3128>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578049,15 +578049,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368941d0(%rip),%rdi # 36b43b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3130>\n+\tlea 0x368951d0(%rip),%rdi # 36b44b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3130>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578098,15 +578098,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368940b6(%rip),%rdi # 36b43b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3138>\n+\tlea 0x368950b6(%rip),%rdi # 36b44b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3138>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578147,15 +578147,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36893f9e(%rip),%rdi # 36b43b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3140>\n+\tlea 0x36894f9e(%rip),%rdi # 36b44b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3140>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578216,15 +578216,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36893de8(%rip),%rdi # 36b43b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3148>\n+\tlea 0x36894de8(%rip),%rdi # 36b44b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3148>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578285,15 +578285,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36893c30(%rip),%rdi # 36b43b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3150>\n+\tlea 0x36894c30(%rip),%rdi # 36b44b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3150>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578334,15 +578334,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36893b16(%rip),%rdi # 36b43b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3158>\n+\tlea 0x36894b16(%rip),%rdi # 36b44b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3158>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578383,15 +578383,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368939fe(%rip),%rdi # 36b43b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3160>\n+\tlea 0x368949fe(%rip),%rdi # 36b44b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3160>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578452,15 +578452,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36893848(%rip),%rdi # 36b43ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3168>\n+\tlea 0x36894848(%rip),%rdi # 36b44ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3168>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578521,15 +578521,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36893690(%rip),%rdi # 36b43ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3170>\n+\tlea 0x36894690(%rip),%rdi # 36b44ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3170>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578570,15 +578570,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36893576(%rip),%rdi # 36b43bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3178>\n+\tlea 0x36894576(%rip),%rdi # 36b44bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3178>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578619,15 +578619,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689345e(%rip),%rdi # 36b43bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3180>\n+\tlea 0x3689445e(%rip),%rdi # 36b44bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3180>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578688,15 +578688,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368932a8(%rip),%rdi # 36b43bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3188>\n+\tlea 0x368942a8(%rip),%rdi # 36b44bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3188>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578757,15 +578757,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368930f0(%rip),%rdi # 36b43bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3190>\n+\tlea 0x368940f0(%rip),%rdi # 36b44bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3190>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578806,15 +578806,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36892fd6(%rip),%rdi # 36b43bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3198>\n+\tlea 0x36893fd6(%rip),%rdi # 36b44bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3198>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578855,15 +578855,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36892ebe(%rip),%rdi # 36b43bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a0>\n+\tlea 0x36893ebe(%rip),%rdi # 36b44bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578924,15 +578924,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36892d08(%rip),%rdi # 36b43be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a8>\n+\tlea 0x36893d08(%rip),%rdi # 36b44be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -578993,15 +578993,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36892b50(%rip),%rdi # 36b43be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b0>\n+\tlea 0x36893b50(%rip),%rdi # 36b44be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579042,15 +579042,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36892a36(%rip),%rdi # 36b43bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b8>\n+\tlea 0x36893a36(%rip),%rdi # 36b44bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579091,15 +579091,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689291e(%rip),%rdi # 36b43bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c0>\n+\tlea 0x3689391e(%rip),%rdi # 36b44bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579160,15 +579160,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36892768(%rip),%rdi # 36b43c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c8>\n+\tlea 0x36893768(%rip),%rdi # 36b44c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579229,15 +579229,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368925b0(%rip),%rdi # 36b43c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d0>\n+\tlea 0x368935b0(%rip),%rdi # 36b44c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579278,15 +579278,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36892496(%rip),%rdi # 36b43c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d8>\n+\tlea 0x36893496(%rip),%rdi # 36b44c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579327,15 +579327,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689237e(%rip),%rdi # 36b43c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e0>\n+\tlea 0x3689337e(%rip),%rdi # 36b44c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e0>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579396,15 +579396,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368921c8(%rip),%rdi # 36b43c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e8>\n+\tlea 0x368931c8(%rip),%rdi # 36b44c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e8>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579465,15 +579465,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36892010(%rip),%rdi # 36b43c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f0>\n+\tlea 0x36893010(%rip),%rdi # 36b44c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f0>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579514,15 +579514,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36891ef6(%rip),%rdi # 36b43c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f8>\n+\tlea 0x36892ef6(%rip),%rdi # 36b44c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f8>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579563,15 +579563,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36891dde(%rip),%rdi # 36b43c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3200>\n+\tlea 0x36892dde(%rip),%rdi # 36b44c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3200>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579632,15 +579632,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36891c28(%rip),%rdi # 36b43c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3208>\n+\tlea 0x36892c28(%rip),%rdi # 36b44c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3208>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579701,15 +579701,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36891a70(%rip),%rdi # 36b43c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3210>\n+\tlea 0x36892a70(%rip),%rdi # 36b44c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3210>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579750,15 +579750,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36891956(%rip),%rdi # 36b43c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3218>\n+\tlea 0x36892956(%rip),%rdi # 36b44c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3218>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579799,15 +579799,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689183e(%rip),%rdi # 36b43c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3220>\n+\tlea 0x3689283e(%rip),%rdi # 36b44c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3220>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579868,15 +579868,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x36891688(%rip),%rdi # 36b43c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3228>\n+\tlea 0x36892688(%rip),%rdi # 36b44c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3228>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579937,15 +579937,15 @@\n \tlea 0x8(%rsp),%rdx\n \tmov %rsp,%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x20(%rsp),%rsi\n \tmov 0x28(%rsp),%edx\n \tmov 0x10(%rsp),%rcx\n \tmov 0x18(%rsp),%r8d\n-\tlea 0x368914d0(%rip),%rdi # 36b43c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3230>\n+\tlea 0x368924d0(%rip),%rdi # 36b44c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3230>\n \tlea 0x60(%rsp),%r9\n \tpush (%rsp)\n \tpush 0x10(%rsp)\n \tcall 22100 \n \tadd $0x128,%rsp\n \tret\n \tdata16 data16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -579986,15 +579986,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368913b6(%rip),%rdi # 36b43c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3238>\n+\tlea 0x368923b6(%rip),%rdi # 36b44c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3238>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -580035,696 +580035,696 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3689129e(%rip),%rdi # 36b43c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3240>\n+\tlea 0x3689229e(%rip),%rdi # 36b44c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3240>\n \tlea 0x60(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0xd8,%rsp\n \tret\n \tdata16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36893ad4(%rip),%rbx # 36b464e0 ::get_beta()::val@@Base+0x1c8>\n+\tmov 0x36894ad4(%rip),%rbx # 36b474e0 ::get_beta()::val@@Base+0x1c8>\n \ttest %rbx,%rbx\n \tjne 2b2a27 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x101f7>\n-\tlea 0x36892d28(%rip),%rdi # 36b45740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d08>\n+\tlea 0x36893d28(%rip),%rdi # 36b46740 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d08>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36893ab9(%rip) # 36b464e0 ::get_beta()::val@@Base+0x1c8>\n+\tmov %rax,0x36894ab9(%rip) # 36b474e0 ::get_beta()::val@@Base+0x1c8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36891046(%rip),%rsi # 36b43a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3048>\n+\tlea 0x36892046(%rip),%rsi # 36b44a80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3048>\n \tlea 0x57aaf(%rip),%rcx # 30a4f0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30280>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36891020(%rip),%rsi # 36b43a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3050>\n+\tlea 0x36892020(%rip),%rsi # 36b44a88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3050>\n \tlea 0x57acc(%rip),%rcx # 30a53b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x302cb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890ffa(%rip),%rsi # 36b43a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3058>\n+\tlea 0x36891ffa(%rip),%rsi # 36b44a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3058>\n \tlea 0x57ae9(%rip),%rcx # 30a586 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30316>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890fd4(%rip),%rsi # 36b43a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3060>\n+\tlea 0x36891fd4(%rip),%rsi # 36b44a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3060>\n \tlea 0x57b08(%rip),%rcx # 30a5d3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30363>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890fae(%rip),%rsi # 36b43aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3068>\n+\tlea 0x36891fae(%rip),%rsi # 36b44aa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3068>\n \tlea 0x57b27(%rip),%rcx # 30a620 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x303b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890f88(%rip),%rsi # 36b43aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3070>\n+\tlea 0x36891f88(%rip),%rsi # 36b44aa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3070>\n \tlea 0x57b45(%rip),%rcx # 30a66c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x303fc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890f62(%rip),%rsi # 36b43ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3078>\n+\tlea 0x36891f62(%rip),%rsi # 36b44ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3078>\n \tlea 0x57b63(%rip),%rcx # 30a6b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30448>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890f3c(%rip),%rsi # 36b43ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3080>\n+\tlea 0x36891f3c(%rip),%rsi # 36b44ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3080>\n \tlea 0x57b83(%rip),%rcx # 30a706 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30496>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890f16(%rip),%rsi # 36b43ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3088>\n+\tlea 0x36891f16(%rip),%rsi # 36b44ac0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3088>\n \tlea 0x57ba3(%rip),%rcx # 30a754 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x304e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890ef0(%rip),%rsi # 36b43ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3090>\n+\tlea 0x36891ef0(%rip),%rsi # 36b44ac8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3090>\n \tlea 0x57bc1(%rip),%rcx # 30a7a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30530>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890eca(%rip),%rsi # 36b43ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3098>\n+\tlea 0x36891eca(%rip),%rsi # 36b44ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3098>\n \tlea 0x57bdf(%rip),%rcx # 30a7ec (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3057c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890ea4(%rip),%rsi # 36b43ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a0>\n+\tlea 0x36891ea4(%rip),%rsi # 36b44ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a0>\n \tlea 0x57bff(%rip),%rcx # 30a83a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x305ca>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890e7e(%rip),%rsi # 36b43ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a8>\n+\tlea 0x36891e7e(%rip),%rsi # 36b44ae0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a8>\n \tlea 0x57c1f(%rip),%rcx # 30a888 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30618>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890e58(%rip),%rsi # 36b43ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b0>\n+\tlea 0x36891e58(%rip),%rsi # 36b44ae8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b0>\n \tlea 0x57c3d(%rip),%rcx # 30a8d4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30664>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890e32(%rip),%rsi # 36b43af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b8>\n+\tlea 0x36891e32(%rip),%rsi # 36b44af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b8>\n \tlea 0x57c5b(%rip),%rcx # 30a920 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x306b0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890e0c(%rip),%rsi # 36b43af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c0>\n+\tlea 0x36891e0c(%rip),%rsi # 36b44af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c0>\n \tlea 0x57c7b(%rip),%rcx # 30a96e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x306fe>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890de6(%rip),%rsi # 36b43b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c8>\n+\tlea 0x36891de6(%rip),%rsi # 36b44b00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c8>\n \tlea 0x57c9b(%rip),%rcx # 30a9bc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3074c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890dc0(%rip),%rsi # 36b43b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d0>\n+\tlea 0x36891dc0(%rip),%rsi # 36b44b08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d0>\n \tlea 0x57cb9(%rip),%rcx # 30aa08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30798>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890d9a(%rip),%rsi # 36b43b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d8>\n+\tlea 0x36891d9a(%rip),%rsi # 36b44b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d8>\n \tlea 0x57cd7(%rip),%rcx # 30aa54 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x307e4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890d74(%rip),%rsi # 36b43b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e0>\n+\tlea 0x36891d74(%rip),%rsi # 36b44b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e0>\n \tlea 0x57cf7(%rip),%rcx # 30aaa2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30832>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890d4e(%rip),%rsi # 36b43b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e8>\n+\tlea 0x36891d4e(%rip),%rsi # 36b44b20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e8>\n \tlea 0x57d17(%rip),%rcx # 30aaf0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30880>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890d28(%rip),%rsi # 36b43b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f0>\n+\tlea 0x36891d28(%rip),%rsi # 36b44b28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f0>\n \tlea 0x57d35(%rip),%rcx # 30ab3c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x308cc>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890d02(%rip),%rsi # 36b43b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f8>\n+\tlea 0x36891d02(%rip),%rsi # 36b44b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f8>\n \tlea 0x57d53(%rip),%rcx # 30ab88 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30918>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890cdc(%rip),%rsi # 36b43b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3100>\n+\tlea 0x36891cdc(%rip),%rsi # 36b44b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3100>\n \tlea 0x57d73(%rip),%rcx # 30abd6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30966>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890cb6(%rip),%rsi # 36b43b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3108>\n+\tlea 0x36891cb6(%rip),%rsi # 36b44b40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3108>\n \tlea 0x57d93(%rip),%rcx # 30ac24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x309b4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890c90(%rip),%rsi # 36b43b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3110>\n+\tlea 0x36891c90(%rip),%rsi # 36b44b48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3110>\n \tlea 0x57db1(%rip),%rcx # 30ac70 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30a00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890c6a(%rip),%rsi # 36b43b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3118>\n+\tlea 0x36891c6a(%rip),%rsi # 36b44b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3118>\n \tlea 0x57dcf(%rip),%rcx # 30acbc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30a4c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890c44(%rip),%rsi # 36b43b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3120>\n+\tlea 0x36891c44(%rip),%rsi # 36b44b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3120>\n \tlea 0x57def(%rip),%rcx # 30ad0a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30a9a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890c1e(%rip),%rsi # 36b43b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3128>\n+\tlea 0x36891c1e(%rip),%rsi # 36b44b60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3128>\n \tlea 0x57e0f(%rip),%rcx # 30ad58 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30ae8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890bf8(%rip),%rsi # 36b43b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3130>\n+\tlea 0x36891bf8(%rip),%rsi # 36b44b68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3130>\n \tlea 0x57e2d(%rip),%rcx # 30ada4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30b34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890bd2(%rip),%rsi # 36b43b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3138>\n+\tlea 0x36891bd2(%rip),%rsi # 36b44b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3138>\n \tlea 0x57e4b(%rip),%rcx # 30adf0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30b80>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890bac(%rip),%rsi # 36b43b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3140>\n+\tlea 0x36891bac(%rip),%rsi # 36b44b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3140>\n \tlea 0x57e6b(%rip),%rcx # 30ae3e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30bce>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890b86(%rip),%rsi # 36b43b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3148>\n+\tlea 0x36891b86(%rip),%rsi # 36b44b80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3148>\n \tlea 0x57e8b(%rip),%rcx # 30ae8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30c1c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890b60(%rip),%rsi # 36b43b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3150>\n+\tlea 0x36891b60(%rip),%rsi # 36b44b88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3150>\n \tlea 0x57ea9(%rip),%rcx # 30aed8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30c68>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890b3a(%rip),%rsi # 36b43b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3158>\n+\tlea 0x36891b3a(%rip),%rsi # 36b44b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3158>\n \tlea 0x57ec7(%rip),%rcx # 30af24 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30cb4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890b14(%rip),%rsi # 36b43b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3160>\n+\tlea 0x36891b14(%rip),%rsi # 36b44b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3160>\n \tlea 0x57ee7(%rip),%rcx # 30af72 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30d02>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890aee(%rip),%rsi # 36b43ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3168>\n+\tlea 0x36891aee(%rip),%rsi # 36b44ba0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3168>\n \tlea 0x57f07(%rip),%rcx # 30afc0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30d50>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890ac8(%rip),%rsi # 36b43ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3170>\n+\tlea 0x36891ac8(%rip),%rsi # 36b44ba8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3170>\n \tlea 0x57f25(%rip),%rcx # 30b00c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30d9c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890aa2(%rip),%rsi # 36b43bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3178>\n+\tlea 0x36891aa2(%rip),%rsi # 36b44bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3178>\n \tlea 0x57f43(%rip),%rcx # 30b058 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30de8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890a7c(%rip),%rsi # 36b43bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3180>\n+\tlea 0x36891a7c(%rip),%rsi # 36b44bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3180>\n \tlea 0x57f63(%rip),%rcx # 30b0a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30e36>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890a56(%rip),%rsi # 36b43bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3188>\n+\tlea 0x36891a56(%rip),%rsi # 36b44bc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3188>\n \tlea 0x57f83(%rip),%rcx # 30b0f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30e84>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890a30(%rip),%rsi # 36b43bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3190>\n+\tlea 0x36891a30(%rip),%rsi # 36b44bc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3190>\n \tlea 0x57fa1(%rip),%rcx # 30b140 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30ed0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890a0a(%rip),%rsi # 36b43bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3198>\n+\tlea 0x36891a0a(%rip),%rsi # 36b44bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3198>\n \tlea 0x57fbf(%rip),%rcx # 30b18c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30f1c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368909e4(%rip),%rsi # 36b43bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a0>\n+\tlea 0x368919e4(%rip),%rsi # 36b44bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a0>\n \tlea 0x57fdf(%rip),%rcx # 30b1da (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30f6a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368909be(%rip),%rsi # 36b43be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a8>\n+\tlea 0x368919be(%rip),%rsi # 36b44be0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a8>\n \tlea 0x57fff(%rip),%rcx # 30b228 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x30fb8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890998(%rip),%rsi # 36b43be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b0>\n+\tlea 0x36891998(%rip),%rsi # 36b44be8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b0>\n \tlea 0x5801d(%rip),%rcx # 30b274 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31004>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890972(%rip),%rsi # 36b43bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b8>\n+\tlea 0x36891972(%rip),%rsi # 36b44bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b8>\n \tlea 0x5803b(%rip),%rcx # 30b2c0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31050>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3689094c(%rip),%rsi # 36b43bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c0>\n+\tlea 0x3689194c(%rip),%rsi # 36b44bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c0>\n \tlea 0x5805b(%rip),%rcx # 30b30e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3109e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890926(%rip),%rsi # 36b43c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c8>\n+\tlea 0x36891926(%rip),%rsi # 36b44c00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c8>\n \tlea 0x5807b(%rip),%rcx # 30b35c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x310ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36890900(%rip),%rsi # 36b43c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d0>\n+\tlea 0x36891900(%rip),%rsi # 36b44c08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d0>\n \tlea 0x5809a(%rip),%rcx # 30b3a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31139>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368908da(%rip),%rsi # 36b43c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d8>\n+\tlea 0x368918da(%rip),%rsi # 36b44c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d8>\n \tlea 0x580b9(%rip),%rcx # 30b3f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31186>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368908b4(%rip),%rsi # 36b43c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e0>\n+\tlea 0x368918b4(%rip),%rsi # 36b44c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e0>\n \tlea 0x580da(%rip),%rcx # 30b445 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x311d5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36890877(%rip),%rsi # 36b43c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e8>\n+\tlea 0x36891877(%rip),%rsi # 36b44c20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e8>\n \tlea 0x580e4(%rip),%rcx # 30b494 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31224>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3689083a(%rip),%rsi # 36b43c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f0>\n+\tlea 0x3689183a(%rip),%rsi # 36b44c28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f0>\n \tlea 0x580ec(%rip),%rcx # 30b4e1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31271>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368907fd(%rip),%rsi # 36b43c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f8>\n+\tlea 0x368917fd(%rip),%rsi # 36b44c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f8>\n \tlea 0x580f4(%rip),%rcx # 30b52e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x312be>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368907c0(%rip),%rsi # 36b43c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3200>\n+\tlea 0x368917c0(%rip),%rsi # 36b44c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3200>\n \tlea 0x580fe(%rip),%rcx # 30b57d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3130d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36890783(%rip),%rsi # 36b43c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3208>\n+\tlea 0x36891783(%rip),%rsi # 36b44c40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3208>\n \tlea 0x58108(%rip),%rcx # 30b5cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3135c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36890746(%rip),%rsi # 36b43c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3210>\n+\tlea 0x36891746(%rip),%rsi # 36b44c48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3210>\n \tlea 0x58110(%rip),%rcx # 30b619 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x313a9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36890709(%rip),%rsi # 36b43c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3218>\n+\tlea 0x36891709(%rip),%rsi # 36b44c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3218>\n \tlea 0x58118(%rip),%rcx # 30b666 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x313f6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368906cc(%rip),%rsi # 36b43c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3220>\n+\tlea 0x368916cc(%rip),%rsi # 36b44c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3220>\n \tlea 0x58122(%rip),%rcx # 30b6b5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31445>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x3689068f(%rip),%rsi # 36b43c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3228>\n+\tlea 0x3689168f(%rip),%rsi # 36b44c60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3228>\n \tlea 0x5812c(%rip),%rcx # 30b704 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31494>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36890652(%rip),%rsi # 36b43c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3230>\n+\tlea 0x36891652(%rip),%rsi # 36b44c68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3230>\n \tlea 0x58134(%rip),%rcx # 30b751 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x314e1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x36890615(%rip),%rsi # 36b43c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3238>\n+\tlea 0x36891615(%rip),%rsi # 36b44c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3238>\n \tlea 0x5813c(%rip),%rcx # 30b79e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3152e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tmovq $0x0,0x18(%rsp)\n \tmovq $0x0,0x10(%rsp)\n \tmovq $0x0,0x8(%rsp)\n \tmovq $0x0,(%rsp)\n-\tlea 0x368905d8(%rip),%rsi # 36b43c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3240>\n+\tlea 0x368915d8(%rip),%rsi # 36b44c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3240>\n \tlea 0x58146(%rip),%rcx # 30b7ed (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3157d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xe(%rip),%rdi # 2b36d0 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ea0>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \tnopl 0x0(%rax)\n __hip_module_dtor():\n-\tmov 0x36892e09(%rip),%rdi # 36b464e0 ::get_beta()::val@@Base+0x1c8>\n+\tmov 0x36893e09(%rip),%rdi # 36b474e0 ::get_beta()::val@@Base+0x1c8>\n \ttest %rdi,%rdi\n \tje 2b36f1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x10ec1>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36892df3(%rip) # 36b464e0 ::get_beta()::val@@Base+0x1c8>\n+\tmovq $0x0,0x36893df3(%rip) # 36b474e0 ::get_beta()::val@@Base+0x1c8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002b3700 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base>:\n void mul_mat_q_case<(ggml_type)8>(ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*):\n@@ -584337,15 +584337,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688d8a9(%rip),%rdi # 36b43c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3220>\n+\tlea 0x3688e8a9(%rip),%rdi # 36b44c58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3220>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b669f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x2f9f>\n \tmovabs $0x800000020,%rdx\n@@ -584481,15 +584481,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688d5d0(%rip),%rdi # 36b43c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3218>\n+\tlea 0x3688e5d0(%rip),%rdi # 36b44c50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3218>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -584640,15 +584640,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688d273(%rip),%rdi # 36b43bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c0>\n+\tlea 0x3688e273(%rip),%rdi # 36b44bf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b6c75 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3575>\n \tmovabs $0x800000020,%rdx\n@@ -584784,15 +584784,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688cf9a(%rip),%rdi # 36b43bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b8>\n+\tlea 0x3688df9a(%rip),%rdi # 36b44bf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -584943,15 +584943,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688cbbd(%rip),%rdi # 36b43b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e0>\n+\tlea 0x3688dbbd(%rip),%rdi # 36b44b18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b724b (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x3b4b>\n \tmovabs $0x800000020,%rdx\n@@ -585087,15 +585087,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688c8e4(%rip),%rdi # 36b43b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d8>\n+\tlea 0x3688d8e4(%rip),%rdi # 36b44b10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -585246,15 +585246,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688c6e7(%rip),%rdi # 36b43c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e0>\n+\tlea 0x3688d6e7(%rip),%rdi # 36b44c18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31e0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b7821 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4121>\n \tmovabs $0x800000020,%rdx\n@@ -585390,15 +585390,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688c40e(%rip),%rdi # 36b43c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d8>\n+\tlea 0x3688d40e(%rip),%rdi # 36b44c10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31d8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -585549,15 +585549,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688c0b1(%rip),%rdi # 36b43bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3180>\n+\tlea 0x3688d0b1(%rip),%rdi # 36b44bb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3180>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b7df7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x46f7>\n \tmovabs $0x800000020,%rdx\n@@ -585693,15 +585693,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688bdd8(%rip),%rdi # 36b43bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3178>\n+\tlea 0x3688cdd8(%rip),%rdi # 36b44bb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3178>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -585852,15 +585852,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688b9fb(%rip),%rdi # 36b43ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a0>\n+\tlea 0x3688c9fb(%rip),%rdi # 36b44ad8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b83cd (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x4ccd>\n \tmovabs $0x800000020,%rdx\n@@ -585996,15 +585996,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688b722(%rip),%rdi # 36b43ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3098>\n+\tlea 0x3688c722(%rip),%rdi # 36b44ad0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3098>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -586155,15 +586155,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688b5c5(%rip),%rdi # 36b43c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3240>\n+\tlea 0x3688c5c5(%rip),%rdi # 36b44c78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3240>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b89a3 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x52a3>\n \tmovabs $0x800000020,%rdx\n@@ -586299,15 +586299,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688b2ec(%rip),%rdi # 36b43c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3238>\n+\tlea 0x3688c2ec(%rip),%rdi # 36b44c70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3238>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -586458,15 +586458,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688ae6f(%rip),%rdi # 36b43af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c0>\n+\tlea 0x3688be6f(%rip),%rdi # 36b44af8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30c0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b8f79 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5879>\n \tmovabs $0x800000020,%rdx\n@@ -586602,15 +586602,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688ab96(%rip),%rdi # 36b43af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b8>\n+\tlea 0x3688bb96(%rip),%rdi # 36b44af0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30b8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -586761,15 +586761,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688a919(%rip),%rdi # 36b43b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3140>\n+\tlea 0x3688b919(%rip),%rdi # 36b44b78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3140>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b954f (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x5e4f>\n \tmovabs $0x800000020,%rdx\n@@ -586905,15 +586905,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688a640(%rip),%rdi # 36b43b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3138>\n+\tlea 0x3688b640(%rip),%rdi # 36b44b70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3138>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -587064,15 +587064,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688a263(%rip),%rdi # 36b43a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3060>\n+\tlea 0x3688b263(%rip),%rdi # 36b44a98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3060>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2b9e06 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6706>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3060\n@@ -587214,15 +587214,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36889fa2(%rip),%rdi # 36b43ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3080>\n+\tlea 0x3688afa2(%rip),%rdi # 36b44ab8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3080>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2ba0fb (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x69fb>\n \tmovabs $0x800000020,%rdx\n@@ -587358,15 +587358,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36889ca9(%rip),%rdi # 36b43a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3058>\n+\tlea 0x3688aca9(%rip),%rdi # 36b44a90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3058>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -587511,15 +587511,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368899d4(%rip),%rdi # 36b43ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3078>\n+\tlea 0x3688a9d4(%rip),%rdi # 36b44ab0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3078>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -587670,15 +587670,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36889757(%rip),%rdi # 36b43b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3100>\n+\tlea 0x3688a757(%rip),%rdi # 36b44b38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3100>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2ba6d1 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x6fd1>\n \tmovabs $0x800000020,%rdx\n@@ -587814,15 +587814,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688947e(%rip),%rdi # 36b43b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f8>\n+\tlea 0x3688a47e(%rip),%rdi # 36b44b30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x30f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -587973,15 +587973,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36889281(%rip),%rdi # 36b43c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3200>\n+\tlea 0x3688a281(%rip),%rdi # 36b44c38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3200>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2baca7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x75a7>\n \tmovabs $0x800000020,%rdx\n@@ -588117,15 +588117,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36888fa8(%rip),%rdi # 36b43c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f8>\n+\tlea 0x36889fa8(%rip),%rdi # 36b44c30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31f8>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -588276,15 +588276,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36888bcb(%rip),%rdi # 36b43b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3120>\n+\tlea 0x36889bcb(%rip),%rdi # 36b44b58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3120>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2bb27d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x7b7d>\n \tmovabs $0x800000020,%rdx\n@@ -588420,15 +588420,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x368888f2(%rip),%rdi # 36b43b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3118>\n+\tlea 0x368898f2(%rip),%rdi # 36b44b50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3118>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -588579,15 +588579,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36888675(%rip),%rdi # 36b43bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a0>\n+\tlea 0x36889675(%rip),%rdi # 36b44bd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x31a0>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2bb853 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8153>\n \tmovabs $0x800000020,%rdx\n@@ -588723,15 +588723,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688839c(%rip),%rdi # 36b43bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3198>\n+\tlea 0x3688939c(%rip),%rdi # 36b44bd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3198>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -588882,15 +588882,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x3688805f(%rip),%rdi # 36b43b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3160>\n+\tlea 0x3688905f(%rip),%rdi # 36b44b98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3160>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2bbe29 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x8729>\n \tmovabs $0x800000020,%rdx\n@@ -589026,15 +589026,15 @@\n \tlea 0x98(%rsp),%rdx\n \tlea 0x90(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0xb0(%rsp),%rsi\n \tmov 0xb8(%rsp),%edx\n \tmov 0xa0(%rsp),%rcx\n \tmov 0xa8(%rsp),%r8d\n-\tlea 0x36887d86(%rip),%rdi # 36b43b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3158>\n+\tlea 0x36888d86(%rip),%rdi # 36b44b90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3158>\n \tlea 0xe0(%rsp),%r9\n \tpush 0x90(%rsp)\n \tpush 0xa0(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../common.cuh:731\n \tmov 0x80(%rsp),%rsi\n@@ -590877,15 +590877,15 @@\n \tpush 0x88(%rsp)\n \tpush 0x70(%rsp)\n \tpush 0x80(%rsp)\n \tcall 2afc00 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xd3d0>\n \tadd $0x1c8,%rsp\n \tjmp 2bd67d (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0x9f7d>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3172\n-\tmov 0x36887897(%rip),%rax \n+\tmov 0x36888897(%rip),%rax \n \tmov (%rax),%rdi\n \tlea 0x38198(%rip),%rsi # 2f58e3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b673>\n \tmov %ecx,%edx\n \txor %eax,%eax\n \tcall 23600 \n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../mmq.cuh:3173\n \tlea 0x38197(%rip),%rdi # 2f58f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b682>\n@@ -591210,15 +591210,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36885eeb(%rip),%rdi # 36b43c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3248>\n+\tlea 0x36886eeb(%rip),%rdi # 36b44c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3248>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -591244,15 +591244,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36885e48(%rip),%rdi # 36b43c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3250>\n+\tlea 0x36886e48(%rip),%rdi # 36b44c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3250>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -591275,15 +591275,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36885dbe(%rip),%rdi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n+\tlea 0x36886dbe(%rip),%rdi # 36b44c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -591379,15 +591379,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36885b03(%rip),%rdi # 36b43c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3260>\n+\tlea 0x36886b03(%rip),%rdi # 36b44c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3260>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -591483,15 +591483,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3688583b(%rip),%rdi # 36b43ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3268>\n+\tlea 0x3688683b(%rip),%rdi # 36b44ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3268>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -591517,15 +591517,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36885798(%rip),%rdi # 36b43ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3270>\n+\tlea 0x36886798(%rip),%rdi # 36b44ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3270>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -591621,15 +591621,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x368854db(%rip),%rdi # 36b43cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3278>\n+\tlea 0x368864db(%rip),%rdi # 36b44cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3278>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -591725,15 +591725,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36885213(%rip),%rdi # 36b43cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3280>\n+\tlea 0x36886213(%rip),%rdi # 36b44cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3280>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -591759,15 +591759,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36885170(%rip),%rdi # 36b43cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3288>\n+\tlea 0x36886170(%rip),%rdi # 36b44cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3288>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -591863,15 +591863,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36884eb3(%rip),%rdi # 36b43cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3290>\n+\tlea 0x36885eb3(%rip),%rdi # 36b44cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3290>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -591967,15 +591967,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36884beb(%rip),%rdi # 36b43cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3298>\n+\tlea 0x36885beb(%rip),%rdi # 36b44cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3298>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -592001,15 +592001,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36884b48(%rip),%rdi # 36b43cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a0>\n+\tlea 0x36885b48(%rip),%rdi # 36b44cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -592105,174 +592105,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3688488b(%rip),%rdi # 36b43ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a8>\n+\tlea 0x3688588b(%rip),%rdi # 36b44ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3688705c(%rip),%rbx # 36b464e8 ::get_beta()::val@@Base+0x1d0>\n+\tmov 0x3688805c(%rip),%rbx # 36b474e8 ::get_beta()::val@@Base+0x1d0>\n \ttest %rbx,%rbx\n \tjne 2bf4a7 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xbda7>\n-\tlea 0x368862c0(%rip),%rdi # 36b45758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d20>\n+\tlea 0x368872c0(%rip),%rdi # 36b46758 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d20>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36887041(%rip) # 36b464e8 ::get_beta()::val@@Base+0x1d0>\n+\tmov %rax,0x36888041(%rip) # 36b474e8 ::get_beta()::val@@Base+0x1d0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368847c6(%rip),%rsi # 36b43c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3248>\n+\tlea 0x368857c6(%rip),%rsi # 36b44c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3248>\n \tlea 0x4c40b(%rip),%rcx # 30b8cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3165c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368847a0(%rip),%rsi # 36b43c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3250>\n+\tlea 0x368857a0(%rip),%rsi # 36b44c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3250>\n \tlea 0x4c463(%rip),%rcx # 30b952 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x316e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3688477a(%rip),%rsi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n+\tlea 0x3688577a(%rip),%rsi # 36b44c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n \tlea 0x1ef10(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36884754(%rip),%rsi # 36b43c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3260>\n+\tlea 0x36885754(%rip),%rsi # 36b44c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3260>\n \tlea 0x4c456(%rip),%rcx # 30b9a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31731>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3688472e(%rip),%rsi # 36b43ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3268>\n+\tlea 0x3688572e(%rip),%rsi # 36b44ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3268>\n \tlea 0x4c4ae(%rip),%rcx # 30ba27 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x317b7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36884708(%rip),%rsi # 36b43ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3270>\n+\tlea 0x36885708(%rip),%rsi # 36b44ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3270>\n \tlea 0x4c506(%rip),%rcx # 30baad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3183d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368846e2(%rip),%rsi # 36b43cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3278>\n+\tlea 0x368856e2(%rip),%rsi # 36b44cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3278>\n \tlea 0x4c527(%rip),%rcx # 30bafc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3188c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368846bc(%rip),%rsi # 36b43cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3280>\n+\tlea 0x368856bc(%rip),%rsi # 36b44cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3280>\n \tlea 0x4c57f(%rip),%rcx # 30bb82 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31912>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36884696(%rip),%rsi # 36b43cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3288>\n+\tlea 0x36885696(%rip),%rsi # 36b44cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3288>\n \tlea 0x4c5d7(%rip),%rcx # 30bc08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36884670(%rip),%rsi # 36b43cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3290>\n+\tlea 0x36885670(%rip),%rsi # 36b44cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3290>\n \tlea 0x4c5f8(%rip),%rcx # 30bc57 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x319e7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3688464a(%rip),%rsi # 36b43cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3298>\n+\tlea 0x3688564a(%rip),%rsi # 36b44cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3298>\n \tlea 0x4c650(%rip),%rcx # 30bcdd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31a6d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36884624(%rip),%rsi # 36b43cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a0>\n+\tlea 0x36885624(%rip),%rsi # 36b44cd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a0>\n \tlea 0x3486b(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x368845fe(%rip),%rsi # 36b43ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a8>\n+\tlea 0x368855fe(%rip),%rsi # 36b44ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a8>\n \tlea 0x4c67a(%rip),%rcx # 30bd63 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31af3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2bf710 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xc010>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x36886dd1(%rip),%rdi # 36b464e8 ::get_beta()::val@@Base+0x1d0>\n+\tmov 0x36887dd1(%rip),%rdi # 36b474e8 ::get_beta()::val@@Base+0x1d0>\n \ttest %rdi,%rdi\n \tje 2bf731 (ggml_backend_cuda_context&, mmq_args const&, ihipStream_t*)@@Base+0xc031>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36886dbb(%rip) # 36b464e8 ::get_beta()::val@@Base+0x1d0>\n+\tmovq $0x0,0x36887dbb(%rip) # 36b474e8 ::get_beta()::val@@Base+0x1d0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002bf740 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -592319,43 +592319,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:399\n \tucomiss %xmm0,%xmm1\n \tjne 2bf852 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n \tjp 2bf852 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 2, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368844c8(%rip),%rdx # 36b43ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3268>\n+\tlea 0x368854c8(%rip),%rdx # 36b44ca0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3268>\n \tjmp 2bf859 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:387\n \tucomiss %xmm0,%xmm1\n \tjne 2bf80f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n \tjp 2bf80f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 1, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3688448f(%rip),%rdx # 36b43c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3248>\n+\tlea 0x3688548f(%rip),%rdx # 36b44c80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3248>\n \tjmp 2bf816 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:409\n \tcmp $0x4,%rcx\n \tjg 2bf83c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:411\n \tjne 2bf87c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n \tjp 2bf87c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 4, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368844ab(%rip),%rdx # 36b43cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3280>\n+\tlea 0x368854ab(%rip),%rdx # 36b44cb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3280>\n \tjmp 2bf883 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x143>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 1, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36884482(%rip),%rdx # 36b43c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3260>\n+\tlea 0x36885482(%rip),%rdx # 36b44c98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3260>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -592367,49 +592367,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:422\n \tjne 2bf8a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n \tjp 2bf8a6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 8, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36884480(%rip),%rdx # 36b43cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3298>\n+\tlea 0x36885480(%rip),%rdx # 36b44cd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3298>\n \tjmp 2bf8ad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16d>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 2, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36884457(%rip),%rdx # 36b43cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3278>\n+\tlea 0x36885457(%rip),%rdx # 36b44cb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3278>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2bf8ce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 4, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36884445(%rip),%rdx # 36b43cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3290>\n+\tlea 0x36885445(%rip),%rdx # 36b44cc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3290>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2bf8ce (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 8, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36884433(%rip),%rdx # 36b43ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a8>\n+\tlea 0x36885433(%rip),%rdx # 36b44ce0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32a8>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -593277,15 +593277,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x3688375a(%rip),%rdi # 36b43c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3250>\n+\tlea 0x3688475a(%rip),%rdi # 36b44c88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3250>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2c0675 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd35>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -593333,15 +593333,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x3688363a(%rip),%rdi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n+\tlea 0x3688463a(%rip),%rdi # 36b44c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -594415,15 +594415,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36882633(%rip),%rdi # 36b43ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3270>\n+\tlea 0x36883633(%rip),%rdi # 36b44ca8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3270>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2c17ba (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -594471,15 +594471,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x368824f5(%rip),%rdi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n+\tlea 0x368834f5(%rip),%rdi # 36b44c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -595550,15 +595550,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x3688150b(%rip),%rdi # 36b43cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3288>\n+\tlea 0x3688250b(%rip),%rdi # 36b44cc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3288>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2c28fa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -595606,15 +595606,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x368813b5(%rip),%rdi # 36b43c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n+\tlea 0x368823b5(%rip),%rdi # 36b44c90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3258>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -595939,15 +595939,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36880d63(%rip),%rdi # 36b43ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b0>\n+\tlea 0x36881d63(%rip),%rdi # 36b44ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -595973,15 +595973,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36880cc0(%rip),%rdi # 36b43cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b8>\n+\tlea 0x36881cc0(%rip),%rdi # 36b44cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -596004,15 +596004,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x36880c36(%rip),%rdi # 36b43cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c0>\n+\tlea 0x36881c36(%rip),%rdi # 36b44cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -596108,15 +596108,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3688097b(%rip),%rdi # 36b43d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c8>\n+\tlea 0x3688197b(%rip),%rdi # 36b44d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -596212,15 +596212,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x368806b3(%rip),%rdi # 36b43d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d0>\n+\tlea 0x368816b3(%rip),%rdi # 36b44d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -596246,15 +596246,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36880610(%rip),%rdi # 36b43d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d8>\n+\tlea 0x36881610(%rip),%rdi # 36b44d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -596350,15 +596350,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36880353(%rip),%rdi # 36b43d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e0>\n+\tlea 0x36881353(%rip),%rdi # 36b44d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -596454,15 +596454,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3688008b(%rip),%rdi # 36b43d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e8>\n+\tlea 0x3688108b(%rip),%rdi # 36b44d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -596488,15 +596488,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687ffe8(%rip),%rdi # 36b43d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f0>\n+\tlea 0x36880fe8(%rip),%rdi # 36b44d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -596592,15 +596592,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687fd2b(%rip),%rdi # 36b43d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f8>\n+\tlea 0x36880d2b(%rip),%rdi # 36b44d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -596696,15 +596696,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687fa63(%rip),%rdi # 36b43d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3300>\n+\tlea 0x36880a63(%rip),%rdi # 36b44d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3300>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -596730,15 +596730,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687f9c0(%rip),%rdi # 36b43d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3308>\n+\tlea 0x368809c0(%rip),%rdi # 36b44d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3308>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -596834,174 +596834,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687f703(%rip),%rdi # 36b43d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3310>\n+\tlea 0x36880703(%rip),%rdi # 36b44d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3310>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x36881e74(%rip),%rbx # 36b464f0 ::get_beta()::val@@Base+0x1d8>\n+\tmov 0x36882e74(%rip),%rbx # 36b474f0 ::get_beta()::val@@Base+0x1d8>\n \ttest %rbx,%rbx\n \tjne 2c4697 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2af7>\n-\tlea 0x368810e8(%rip),%rdi # 36b45770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d38>\n+\tlea 0x368820e8(%rip),%rdi # 36b46770 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d38>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36881e59(%rip) # 36b464f0 ::get_beta()::val@@Base+0x1d8>\n+\tmov %rax,0x36882e59(%rip) # 36b474f0 ::get_beta()::val@@Base+0x1d8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f63e(%rip),%rsi # 36b43ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b0>\n+\tlea 0x3688063e(%rip),%rsi # 36b44ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b0>\n \tlea 0x477a4(%rip),%rcx # 30be55 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31be5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f618(%rip),%rsi # 36b43cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b8>\n+\tlea 0x36880618(%rip),%rsi # 36b44cf0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b8>\n \tlea 0x47273(%rip),%rcx # 30b952 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x316e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f5f2(%rip),%rsi # 36b43cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c0>\n+\tlea 0x368805f2(%rip),%rsi # 36b44cf8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c0>\n \tlea 0x19d20(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f5cc(%rip),%rsi # 36b43d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c8>\n+\tlea 0x368805cc(%rip),%rsi # 36b44d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c8>\n \tlea 0x477a0(%rip),%rcx # 30bedb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31c6b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f5a6(%rip),%rsi # 36b43d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d0>\n+\tlea 0x368805a6(%rip),%rsi # 36b44d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d0>\n \tlea 0x477f8(%rip),%rcx # 30bf61 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31cf1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f580(%rip),%rsi # 36b43d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d8>\n+\tlea 0x36880580(%rip),%rsi # 36b44d10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d8>\n \tlea 0x47316(%rip),%rcx # 30baad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3183d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f55a(%rip),%rsi # 36b43d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e0>\n+\tlea 0x3688055a(%rip),%rsi # 36b44d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e0>\n \tlea 0x47822(%rip),%rcx # 30bfe7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31d77>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f534(%rip),%rsi # 36b43d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e8>\n+\tlea 0x36880534(%rip),%rsi # 36b44d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e8>\n \tlea 0x4787a(%rip),%rcx # 30c06d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31dfd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f50e(%rip),%rsi # 36b43d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f0>\n+\tlea 0x3688050e(%rip),%rsi # 36b44d28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f0>\n \tlea 0x473e7(%rip),%rcx # 30bc08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f4e8(%rip),%rsi # 36b43d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f8>\n+\tlea 0x368804e8(%rip),%rsi # 36b44d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f8>\n \tlea 0x478a4(%rip),%rcx # 30c0f3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31e83>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f4c2(%rip),%rsi # 36b43d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3300>\n+\tlea 0x368804c2(%rip),%rsi # 36b44d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3300>\n \tlea 0x478fc(%rip),%rcx # 30c179 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31f09>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f49c(%rip),%rsi # 36b43d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3308>\n+\tlea 0x3688049c(%rip),%rsi # 36b44d40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3308>\n \tlea 0x2f67b(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687f476(%rip),%rsi # 36b43d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3310>\n+\tlea 0x36880476(%rip),%rsi # 36b44d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3310>\n \tlea 0x47926(%rip),%rcx # 30c1ff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31f8f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2c4900 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2d60>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x36881be9(%rip),%rdi # 36b464f0 ::get_beta()::val@@Base+0x1d8>\n+\tmov 0x36882be9(%rip),%rdi # 36b474f0 ::get_beta()::val@@Base+0x1d8>\n \ttest %rdi,%rdi\n \tje 2c4921 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2d81>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x36881bd3(%rip) # 36b464f0 ::get_beta()::val@@Base+0x1d8>\n+\tmovq $0x0,0x36882bd3(%rip) # 36b474f0 ::get_beta()::val@@Base+0x1d8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002c4930 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -597046,43 +597046,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:392\n \tucomiss %xmm0,%xmm1\n \tjne 2c4a38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n \tjp 2c4a38 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 2, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f34a(%rip),%rdx # 36b43d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d0>\n+\tlea 0x3688034a(%rip),%rdx # 36b44d08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32d0>\n \tjmp 2c4a3f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:380\n \tucomiss %xmm0,%xmm1\n \tjne 2c49f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n \tjp 2c49f5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 1, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f311(%rip),%rdx # 36b43ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b0>\n+\tlea 0x36880311(%rip),%rdx # 36b44ce8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32b0>\n \tjmp 2c49fc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:402\n \tcmp $0x4,%rcx\n \tjg 2c4a22 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf2>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:404\n \tjne 2c4a62 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n \tjp 2c4a62 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 4, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f32d(%rip),%rdx # 36b43d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e8>\n+\tlea 0x3688032d(%rip),%rdx # 36b44d20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e8>\n \tjmp 2c4a69 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x139>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 1, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f304(%rip),%rdx # 36b43d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c8>\n+\tlea 0x36880304(%rip),%rdx # 36b44d00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32c8>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -597094,49 +597094,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:415\n \tjne 2c4a8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n \tjp 2c4a8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 8, (ggml_type)2, (ggml_type)2, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f302(%rip),%rdx # 36b43d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3300>\n+\tlea 0x36880302(%rip),%rdx # 36b44d38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3300>\n \tjmp 2c4a93 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x163>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 2, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f2d9(%rip),%rdx # 36b43d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e0>\n+\tlea 0x368802d9(%rip),%rdx # 36b44d18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32e0>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2c4ab4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 4, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f2c7(%rip),%rdx # 36b43d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f8>\n+\tlea 0x368802c7(%rip),%rdx # 36b44d30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x32f8>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2c4ab4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 8, (ggml_type)2, (ggml_type)2, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687f2b5(%rip),%rdx # 36b43d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3310>\n+\tlea 0x368802b5(%rip),%rdx # 36b44d48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3310>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)2, (ggml_type)2>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -597259,15 +597259,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687ef9b(%rip),%rdi # 36b43d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3318>\n+\tlea 0x3687ff9b(%rip),%rdi # 36b44d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3318>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -597293,15 +597293,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687eef8(%rip),%rdi # 36b43d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3320>\n+\tlea 0x3687fef8(%rip),%rdi # 36b44d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3320>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -597324,15 +597324,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3687ee6e(%rip),%rdi # 36b43d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3328>\n+\tlea 0x3687fe6e(%rip),%rdi # 36b44d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3328>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -597428,15 +597428,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687ebb3(%rip),%rdi # 36b43d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3330>\n+\tlea 0x3687fbb3(%rip),%rdi # 36b44d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3330>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -597532,15 +597532,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687e8eb(%rip),%rdi # 36b43d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3338>\n+\tlea 0x3687f8eb(%rip),%rdi # 36b44d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3338>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -597566,15 +597566,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687e848(%rip),%rdi # 36b43d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3340>\n+\tlea 0x3687f848(%rip),%rdi # 36b44d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3340>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -597670,15 +597670,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687e58b(%rip),%rdi # 36b43d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3348>\n+\tlea 0x3687f58b(%rip),%rdi # 36b44d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3348>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -597774,15 +597774,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687e2c3(%rip),%rdi # 36b43d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3350>\n+\tlea 0x3687f2c3(%rip),%rdi # 36b44d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3350>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -597808,15 +597808,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687e220(%rip),%rdi # 36b43d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3358>\n+\tlea 0x3687f220(%rip),%rdi # 36b44d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3358>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -597912,15 +597912,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687df63(%rip),%rdi # 36b43d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3360>\n+\tlea 0x3687ef63(%rip),%rdi # 36b44d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3360>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -598016,15 +598016,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687dc9b(%rip),%rdi # 36b43da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3368>\n+\tlea 0x3687ec9b(%rip),%rdi # 36b44da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3368>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -598050,15 +598050,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687dbf8(%rip),%rdi # 36b43da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3370>\n+\tlea 0x3687ebf8(%rip),%rdi # 36b44da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3370>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -598154,174 +598154,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687d93b(%rip),%rdi # 36b43db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3378>\n+\tlea 0x3687e93b(%rip),%rdi # 36b44db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3378>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3688004c(%rip),%rbx # 36b464f8 ::get_beta()::val@@Base+0x1e0>\n+\tmov 0x3688104c(%rip),%rbx # 36b474f8 ::get_beta()::val@@Base+0x1e0>\n \ttest %rbx,%rbx\n \tjne 2c64c7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b97>\n-\tlea 0x3687f2d0(%rip),%rdi # 36b45788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d50>\n+\tlea 0x368802d0(%rip),%rdi # 36b46788 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d50>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36880031(%rip) # 36b464f8 ::get_beta()::val@@Base+0x1e0>\n+\tmov %rax,0x36881031(%rip) # 36b474f8 ::get_beta()::val@@Base+0x1e0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d876(%rip),%rsi # 36b43d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3318>\n+\tlea 0x3687e876(%rip),%rsi # 36b44d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3318>\n \tlea 0x45da4(%rip),%rcx # 30c285 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32015>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d850(%rip),%rsi # 36b43d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3320>\n+\tlea 0x3687e850(%rip),%rsi # 36b44d58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3320>\n \tlea 0x45443(%rip),%rcx # 30b952 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x316e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d82a(%rip),%rsi # 36b43d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3328>\n+\tlea 0x3687e82a(%rip),%rsi # 36b44d60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3328>\n \tlea 0x17ef0(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d804(%rip),%rsi # 36b43d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3330>\n+\tlea 0x3687e804(%rip),%rsi # 36b44d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3330>\n \tlea 0x45da0(%rip),%rcx # 30c30b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3209b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d7de(%rip),%rsi # 36b43d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3338>\n+\tlea 0x3687e7de(%rip),%rsi # 36b44d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3338>\n \tlea 0x45df8(%rip),%rcx # 30c391 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32121>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d7b8(%rip),%rsi # 36b43d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3340>\n+\tlea 0x3687e7b8(%rip),%rsi # 36b44d78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3340>\n \tlea 0x454e6(%rip),%rcx # 30baad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3183d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d792(%rip),%rsi # 36b43d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3348>\n+\tlea 0x3687e792(%rip),%rsi # 36b44d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3348>\n \tlea 0x45e22(%rip),%rcx # 30c417 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x321a7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d76c(%rip),%rsi # 36b43d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3350>\n+\tlea 0x3687e76c(%rip),%rsi # 36b44d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3350>\n \tlea 0x45e7a(%rip),%rcx # 30c49d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3222d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d746(%rip),%rsi # 36b43d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3358>\n+\tlea 0x3687e746(%rip),%rsi # 36b44d90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3358>\n \tlea 0x455b7(%rip),%rcx # 30bc08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d720(%rip),%rsi # 36b43d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3360>\n+\tlea 0x3687e720(%rip),%rsi # 36b44d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3360>\n \tlea 0x45ea4(%rip),%rcx # 30c523 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x322b3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d6fa(%rip),%rsi # 36b43da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3368>\n+\tlea 0x3687e6fa(%rip),%rsi # 36b44da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3368>\n \tlea 0x45efc(%rip),%rcx # 30c5a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32339>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d6d4(%rip),%rsi # 36b43da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3370>\n+\tlea 0x3687e6d4(%rip),%rsi # 36b44da8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3370>\n \tlea 0x2d84b(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687d6ae(%rip),%rsi # 36b43db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3378>\n+\tlea 0x3687e6ae(%rip),%rsi # 36b44db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3378>\n \tlea 0x45f26(%rip),%rcx # 30c62f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x323bf>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2c6730 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e00>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3687fdc1(%rip),%rdi # 36b464f8 ::get_beta()::val@@Base+0x1e0>\n+\tmov 0x36880dc1(%rip),%rdi # 36b474f8 ::get_beta()::val@@Base+0x1e0>\n \ttest %rdi,%rdi\n \tje 2c6751 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e21>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3687fdab(%rip) # 36b464f8 ::get_beta()::val@@Base+0x1e0>\n+\tmovq $0x0,0x36880dab(%rip) # 36b474f8 ::get_beta()::val@@Base+0x1e0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002c6760 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -598368,43 +598368,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:399\n \tucomiss %xmm0,%xmm1\n \tjne 2c6872 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n \tjp 2c6872 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 2, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d578(%rip),%rdx # 36b43d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3338>\n+\tlea 0x3687e578(%rip),%rdx # 36b44d70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3338>\n \tjmp 2c6879 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:387\n \tucomiss %xmm0,%xmm1\n \tjne 2c682f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n \tjp 2c682f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 1, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d53f(%rip),%rdx # 36b43d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3318>\n+\tlea 0x3687e53f(%rip),%rdx # 36b44d50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3318>\n \tjmp 2c6836 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:409\n \tcmp $0x4,%rcx\n \tjg 2c685c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:411\n \tjne 2c689c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n \tjp 2c689c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 4, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d55b(%rip),%rdx # 36b43d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3350>\n+\tlea 0x3687e55b(%rip),%rdx # 36b44d88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3350>\n \tjmp 2c68a3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x143>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 1, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d532(%rip),%rdx # 36b43d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3330>\n+\tlea 0x3687e532(%rip),%rdx # 36b44d68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3330>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -598416,49 +598416,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:422\n \tjne 2c68c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n \tjp 2c68c6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 8, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d530(%rip),%rdx # 36b43da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3368>\n+\tlea 0x3687e530(%rip),%rdx # 36b44da0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3368>\n \tjmp 2c68cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16d>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 2, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d507(%rip),%rdx # 36b43d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3348>\n+\tlea 0x3687e507(%rip),%rdx # 36b44d80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3348>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2c68ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 4, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d4f5(%rip),%rdx # 36b43d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3360>\n+\tlea 0x3687e4f5(%rip),%rdx # 36b44d98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3360>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2c68ee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 8, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687d4e3(%rip),%rdx # 36b43db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3378>\n+\tlea 0x3687e4e3(%rip),%rdx # 36b44db0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3378>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -598587,15 +598587,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687d1b3(%rip),%rdi # 36b43db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3380>\n+\tlea 0x3687e1b3(%rip),%rdi # 36b44db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3380>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -598621,15 +598621,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687d110(%rip),%rdi # 36b43dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3388>\n+\tlea 0x3687e110(%rip),%rdi # 36b44dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3388>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -598652,15 +598652,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3687d086(%rip),%rdi # 36b43dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3390>\n+\tlea 0x3687e086(%rip),%rdi # 36b44dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3390>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -598756,15 +598756,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687cdcb(%rip),%rdi # 36b43dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3398>\n+\tlea 0x3687ddcb(%rip),%rdi # 36b44dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3398>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -598860,15 +598860,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687cb03(%rip),%rdi # 36b43dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a0>\n+\tlea 0x3687db03(%rip),%rdi # 36b44dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -598894,15 +598894,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687ca60(%rip),%rdi # 36b43de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a8>\n+\tlea 0x3687da60(%rip),%rdi # 36b44de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -598998,15 +598998,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687c7a3(%rip),%rdi # 36b43de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b0>\n+\tlea 0x3687d7a3(%rip),%rdi # 36b44de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -599102,15 +599102,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687c4db(%rip),%rdi # 36b43df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b8>\n+\tlea 0x3687d4db(%rip),%rdi # 36b44df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -599136,15 +599136,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687c438(%rip),%rdi # 36b43df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c0>\n+\tlea 0x3687d438(%rip),%rdi # 36b44df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -599240,15 +599240,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687c17b(%rip),%rdi # 36b43e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c8>\n+\tlea 0x3687d17b(%rip),%rdi # 36b44e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -599344,15 +599344,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687beb3(%rip),%rdi # 36b43e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d0>\n+\tlea 0x3687ceb3(%rip),%rdi # 36b44e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -599378,15 +599378,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687be10(%rip),%rdi # 36b43e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d8>\n+\tlea 0x3687ce10(%rip),%rdi # 36b44e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -599482,174 +599482,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687bb53(%rip),%rdi # 36b43e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e0>\n+\tlea 0x3687cb53(%rip),%rdi # 36b44e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3687e204(%rip),%rbx # 36b46500 ::get_beta()::val@@Base+0x1e8>\n+\tmov 0x3687f204(%rip),%rbx # 36b47500 ::get_beta()::val@@Base+0x1e8>\n \ttest %rbx,%rbx\n \tjne 2c8317 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bb7>\n-\tlea 0x3687d498(%rip),%rdi # 36b457a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d68>\n+\tlea 0x3687e498(%rip),%rdi # 36b467a0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d68>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3687e1e9(%rip) # 36b46500 ::get_beta()::val@@Base+0x1e8>\n+\tmov %rax,0x3687f1e9(%rip) # 36b47500 ::get_beta()::val@@Base+0x1e8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687ba8e(%rip),%rsi # 36b43db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3380>\n+\tlea 0x3687ca8e(%rip),%rsi # 36b44db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3380>\n \tlea 0x44384(%rip),%rcx # 30c6b5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32445>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687ba68(%rip),%rsi # 36b43dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3388>\n+\tlea 0x3687ca68(%rip),%rsi # 36b44dc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3388>\n \tlea 0x435f3(%rip),%rcx # 30b952 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x316e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687ba42(%rip),%rsi # 36b43dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3390>\n+\tlea 0x3687ca42(%rip),%rsi # 36b44dc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3390>\n \tlea 0x160a0(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687ba1c(%rip),%rsi # 36b43dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3398>\n+\tlea 0x3687ca1c(%rip),%rsi # 36b44dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3398>\n \tlea 0x44380(%rip),%rcx # 30c73b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x324cb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b9f6(%rip),%rsi # 36b43dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a0>\n+\tlea 0x3687c9f6(%rip),%rsi # 36b44dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a0>\n \tlea 0x443d8(%rip),%rcx # 30c7c1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32551>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b9d0(%rip),%rsi # 36b43de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a8>\n+\tlea 0x3687c9d0(%rip),%rsi # 36b44de0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a8>\n \tlea 0x43696(%rip),%rcx # 30baad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3183d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b9aa(%rip),%rsi # 36b43de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b0>\n+\tlea 0x3687c9aa(%rip),%rsi # 36b44de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b0>\n \tlea 0x44402(%rip),%rcx # 30c847 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x325d7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b984(%rip),%rsi # 36b43df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b8>\n+\tlea 0x3687c984(%rip),%rsi # 36b44df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b8>\n \tlea 0x4445a(%rip),%rcx # 30c8cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3265d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b95e(%rip),%rsi # 36b43df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c0>\n+\tlea 0x3687c95e(%rip),%rsi # 36b44df8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c0>\n \tlea 0x43767(%rip),%rcx # 30bc08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b938(%rip),%rsi # 36b43e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c8>\n+\tlea 0x3687c938(%rip),%rsi # 36b44e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c8>\n \tlea 0x44484(%rip),%rcx # 30c953 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x326e3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b912(%rip),%rsi # 36b43e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d0>\n+\tlea 0x3687c912(%rip),%rsi # 36b44e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d0>\n \tlea 0x444dc(%rip),%rcx # 30c9d9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32769>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b8ec(%rip),%rsi # 36b43e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d8>\n+\tlea 0x3687c8ec(%rip),%rsi # 36b44e10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d8>\n \tlea 0x2b9fb(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3687b8c6(%rip),%rsi # 36b43e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e0>\n+\tlea 0x3687c8c6(%rip),%rsi # 36b44e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e0>\n \tlea 0x44506(%rip),%rcx # 30ca5f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x327ef>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2c8580 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e20>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3687df79(%rip),%rdi # 36b46500 ::get_beta()::val@@Base+0x1e8>\n+\tmov 0x3687ef79(%rip),%rdi # 36b47500 ::get_beta()::val@@Base+0x1e8>\n \ttest %rdi,%rdi\n \tje 2c85a1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e41>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3687df63(%rip) # 36b46500 ::get_beta()::val@@Base+0x1e8>\n+\tmovq $0x0,0x3687ef63(%rip) # 36b47500 ::get_beta()::val@@Base+0x1e8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002c85b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -599694,43 +599694,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:392\n \tucomiss %xmm0,%xmm1\n \tjne 2c86b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n \tjp 2c86b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 2, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b79a(%rip),%rdx # 36b43dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a0>\n+\tlea 0x3687c79a(%rip),%rdx # 36b44dd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33a0>\n \tjmp 2c86bf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:380\n \tucomiss %xmm0,%xmm1\n \tjne 2c8675 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n \tjp 2c8675 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 1, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b761(%rip),%rdx # 36b43db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3380>\n+\tlea 0x3687c761(%rip),%rdx # 36b44db8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3380>\n \tjmp 2c867c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:402\n \tcmp $0x4,%rcx\n \tjg 2c86a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf2>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:404\n \tjne 2c86e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n \tjp 2c86e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 4, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b77d(%rip),%rdx # 36b43df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b8>\n+\tlea 0x3687c77d(%rip),%rdx # 36b44df0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b8>\n \tjmp 2c86e9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x139>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 1, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b754(%rip),%rdx # 36b43dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3398>\n+\tlea 0x3687c754(%rip),%rdx # 36b44dd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3398>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -599742,49 +599742,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:415\n \tjne 2c870c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n \tjp 2c870c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 8, (ggml_type)8, (ggml_type)8, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b752(%rip),%rdx # 36b43e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d0>\n+\tlea 0x3687c752(%rip),%rdx # 36b44e08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33d0>\n \tjmp 2c8713 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x163>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 2, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b729(%rip),%rdx # 36b43de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b0>\n+\tlea 0x3687c729(%rip),%rdx # 36b44de8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33b0>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2c8734 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 4, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b717(%rip),%rdx # 36b43e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c8>\n+\tlea 0x3687c717(%rip),%rdx # 36b44e00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33c8>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2c8734 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 8, (ggml_type)8, (ggml_type)8, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3687b705(%rip),%rdx # 36b43e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e0>\n+\tlea 0x3687c705(%rip),%rdx # 36b44e18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e0>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)8, (ggml_type)8>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -599907,15 +599907,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687b3eb(%rip),%rdi # 36b43e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e8>\n+\tlea 0x3687c3eb(%rip),%rdi # 36b44e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -599941,15 +599941,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687b348(%rip),%rdi # 36b43e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f0>\n+\tlea 0x3687c348(%rip),%rdi # 36b44e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -599972,15 +599972,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3687b2be(%rip),%rdi # 36b43e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f8>\n+\tlea 0x3687c2be(%rip),%rdi # 36b44e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -600076,15 +600076,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687b003(%rip),%rdi # 36b43e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3400>\n+\tlea 0x3687c003(%rip),%rdi # 36b44e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3400>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -600180,15 +600180,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687ad3b(%rip),%rdi # 36b43e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3408>\n+\tlea 0x3687bd3b(%rip),%rdi # 36b44e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3408>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -600214,15 +600214,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687ac98(%rip),%rdi # 36b43e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3410>\n+\tlea 0x3687bc98(%rip),%rdi # 36b44e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3410>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -600318,15 +600318,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687a9db(%rip),%rdi # 36b43e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3418>\n+\tlea 0x3687b9db(%rip),%rdi # 36b44e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3418>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -600422,15 +600422,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687a713(%rip),%rdi # 36b43e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3420>\n+\tlea 0x3687b713(%rip),%rdi # 36b44e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3420>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -600456,15 +600456,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687a670(%rip),%rdi # 36b43e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3428>\n+\tlea 0x3687b670(%rip),%rdi # 36b44e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3428>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -600560,15 +600560,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687a3b3(%rip),%rdi # 36b43e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3430>\n+\tlea 0x3687b3b3(%rip),%rdi # 36b44e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3430>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -600664,15 +600664,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687a0eb(%rip),%rdi # 36b43e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3438>\n+\tlea 0x3687b0eb(%rip),%rdi # 36b44e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3438>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -600698,15 +600698,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3687a048(%rip),%rdi # 36b43e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3440>\n+\tlea 0x3687b048(%rip),%rdi # 36b44e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3440>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -600802,174 +600802,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36879d8b(%rip),%rdi # 36b43e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3448>\n+\tlea 0x3687ad8b(%rip),%rdi # 36b44e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3448>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3687c3dc(%rip),%rbx # 36b46508 ::get_beta()::val@@Base+0x1f0>\n+\tmov 0x3687d3dc(%rip),%rbx # 36b47508 ::get_beta()::val@@Base+0x1f0>\n \ttest %rbx,%rbx\n \tjne 2ca147 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b97>\n-\tlea 0x3687b680(%rip),%rdi # 36b457b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d80>\n+\tlea 0x3687c680(%rip),%rdi # 36b467b8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d80>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3687c3c1(%rip) # 36b46508 ::get_beta()::val@@Base+0x1f0>\n+\tmov %rax,0x3687d3c1(%rip) # 36b47508 ::get_beta()::val@@Base+0x1f0>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879cc6(%rip),%rsi # 36b43e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e8>\n+\tlea 0x3687acc6(%rip),%rsi # 36b44e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e8>\n \tlea 0x42984(%rip),%rcx # 30cae5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32875>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879ca0(%rip),%rsi # 36b43e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f0>\n+\tlea 0x3687aca0(%rip),%rsi # 36b44e28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f0>\n \tlea 0x417c3(%rip),%rcx # 30b952 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x316e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879c7a(%rip),%rsi # 36b43e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f8>\n+\tlea 0x3687ac7a(%rip),%rsi # 36b44e30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33f8>\n \tlea 0x14270(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879c54(%rip),%rsi # 36b43e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3400>\n+\tlea 0x3687ac54(%rip),%rsi # 36b44e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3400>\n \tlea 0x42980(%rip),%rcx # 30cb6b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x328fb>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879c2e(%rip),%rsi # 36b43e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3408>\n+\tlea 0x3687ac2e(%rip),%rsi # 36b44e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3408>\n \tlea 0x429d8(%rip),%rcx # 30cbf1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32981>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879c08(%rip),%rsi # 36b43e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3410>\n+\tlea 0x3687ac08(%rip),%rsi # 36b44e48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3410>\n \tlea 0x41866(%rip),%rcx # 30baad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3183d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879be2(%rip),%rsi # 36b43e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3418>\n+\tlea 0x3687abe2(%rip),%rsi # 36b44e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3418>\n \tlea 0x42a02(%rip),%rcx # 30cc77 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32a07>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879bbc(%rip),%rsi # 36b43e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3420>\n+\tlea 0x3687abbc(%rip),%rsi # 36b44e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3420>\n \tlea 0x42a5a(%rip),%rcx # 30ccfd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32a8d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879b96(%rip),%rsi # 36b43e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3428>\n+\tlea 0x3687ab96(%rip),%rsi # 36b44e60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3428>\n \tlea 0x41937(%rip),%rcx # 30bc08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879b70(%rip),%rsi # 36b43e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3430>\n+\tlea 0x3687ab70(%rip),%rsi # 36b44e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3430>\n \tlea 0x42a84(%rip),%rcx # 30cd83 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32b13>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879b4a(%rip),%rsi # 36b43e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3438>\n+\tlea 0x3687ab4a(%rip),%rsi # 36b44e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3438>\n \tlea 0x42adc(%rip),%rcx # 30ce09 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32b99>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879b24(%rip),%rsi # 36b43e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3440>\n+\tlea 0x3687ab24(%rip),%rsi # 36b44e78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3440>\n \tlea 0x29bcb(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36879afe(%rip),%rsi # 36b43e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3448>\n+\tlea 0x3687aafe(%rip),%rsi # 36b44e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3448>\n \tlea 0x42b06(%rip),%rcx # 30ce8f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32c1f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2ca3b0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e00>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3687c151(%rip),%rdi # 36b46508 ::get_beta()::val@@Base+0x1f0>\n+\tmov 0x3687d151(%rip),%rdi # 36b47508 ::get_beta()::val@@Base+0x1f0>\n \ttest %rdi,%rdi\n \tje 2ca3d1 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e21>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3687c13b(%rip) # 36b46508 ::get_beta()::val@@Base+0x1f0>\n+\tmovq $0x0,0x3687d13b(%rip) # 36b47508 ::get_beta()::val@@Base+0x1f0>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002ca3e0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -601016,43 +601016,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:399\n \tucomiss %xmm0,%xmm1\n \tjne 2ca4f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n \tjp 2ca4f2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 2, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368799c8(%rip),%rdx # 36b43e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3408>\n+\tlea 0x3687a9c8(%rip),%rdx # 36b44e40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3408>\n \tjmp 2ca4f9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:387\n \tucomiss %xmm0,%xmm1\n \tjne 2ca4af (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n \tjp 2ca4af (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 1, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x3687998f(%rip),%rdx # 36b43e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e8>\n+\tlea 0x3687a98f(%rip),%rdx # 36b44e20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x33e8>\n \tjmp 2ca4b6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:409\n \tcmp $0x4,%rcx\n \tjg 2ca4dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:411\n \tjne 2ca51c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n \tjp 2ca51c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 4, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368799ab(%rip),%rdx # 36b43e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3420>\n+\tlea 0x3687a9ab(%rip),%rdx # 36b44e58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3420>\n \tjmp 2ca523 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x143>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 1, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36879982(%rip),%rdx # 36b43e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3400>\n+\tlea 0x3687a982(%rip),%rdx # 36b44e38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3400>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -601064,49 +601064,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:422\n \tjne 2ca546 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n \tjp 2ca546 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 8, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36879980(%rip),%rdx # 36b43e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3438>\n+\tlea 0x3687a980(%rip),%rdx # 36b44e70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3438>\n \tjmp 2ca54d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16d>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 2, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36879957(%rip),%rdx # 36b43e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3418>\n+\tlea 0x3687a957(%rip),%rdx # 36b44e50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3418>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2ca56e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 4, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36879945(%rip),%rdx # 36b43e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3430>\n+\tlea 0x3687a945(%rip),%rdx # 36b44e68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3430>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2ca56e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<128, 8, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36879933(%rip),%rdx # 36b43e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3448>\n+\tlea 0x3687a933(%rip),%rdx # 36b44e80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3448>\n void ggml_cuda_flash_attn_ext_vec_f16_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -601235,15 +601235,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36879603(%rip),%rdi # 36b43e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3450>\n+\tlea 0x3687a603(%rip),%rdi # 36b44e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3450>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -601269,15 +601269,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36879560(%rip),%rdi # 36b43e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3458>\n+\tlea 0x3687a560(%rip),%rdi # 36b44e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3458>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -601300,15 +601300,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x368794d6(%rip),%rdi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n+\tlea 0x3687a4d6(%rip),%rdi # 36b44e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -601404,15 +601404,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687921b(%rip),%rdi # 36b43ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3468>\n+\tlea 0x3687a21b(%rip),%rdi # 36b44ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3468>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -601508,15 +601508,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36878f53(%rip),%rdi # 36b43ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3470>\n+\tlea 0x36879f53(%rip),%rdi # 36b44ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3470>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -601542,15 +601542,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36878eb0(%rip),%rdi # 36b43eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3478>\n+\tlea 0x36879eb0(%rip),%rdi # 36b44eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3478>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -601646,15 +601646,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36878bf3(%rip),%rdi # 36b43eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3480>\n+\tlea 0x36879bf3(%rip),%rdi # 36b44eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3480>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -601750,15 +601750,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687892b(%rip),%rdi # 36b43ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3488>\n+\tlea 0x3687992b(%rip),%rdi # 36b44ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3488>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -601784,15 +601784,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36878888(%rip),%rdi # 36b43ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3490>\n+\tlea 0x36879888(%rip),%rdi # 36b44ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3490>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -601888,15 +601888,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x368785cb(%rip),%rdi # 36b43ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3498>\n+\tlea 0x368795cb(%rip),%rdi # 36b44ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3498>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -601992,15 +601992,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36878303(%rip),%rdi # 36b43ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a0>\n+\tlea 0x36879303(%rip),%rdi # 36b44ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -602026,15 +602026,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36878260(%rip),%rdi # 36b43ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a8>\n+\tlea 0x36879260(%rip),%rdi # 36b44ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -602130,174 +602130,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36877fa3(%rip),%rdi # 36b43ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b0>\n+\tlea 0x36878fa3(%rip),%rdi # 36b44ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3687a594(%rip),%rbx # 36b46510 ::get_beta()::val@@Base+0x1f8>\n+\tmov 0x3687b594(%rip),%rbx # 36b47510 ::get_beta()::val@@Base+0x1f8>\n \ttest %rbx,%rbx\n \tjne 2cbf97 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1bb7>\n-\tlea 0x36879848(%rip),%rdi # 36b457d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d98>\n+\tlea 0x3687a848(%rip),%rdi # 36b467d0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4d98>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3687a579(%rip) # 36b46510 ::get_beta()::val@@Base+0x1f8>\n+\tmov %rax,0x3687b579(%rip) # 36b47510 ::get_beta()::val@@Base+0x1f8>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877ede(%rip),%rsi # 36b43e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3450>\n+\tlea 0x36878ede(%rip),%rsi # 36b44e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3450>\n \tlea 0x40f64(%rip),%rcx # 30cf15 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32ca5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877eb8(%rip),%rsi # 36b43e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3458>\n+\tlea 0x36878eb8(%rip),%rsi # 36b44e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3458>\n \tlea 0x40fbc(%rip),%rcx # 30cf9b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32d2b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877e92(%rip),%rsi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n+\tlea 0x36878e92(%rip),%rsi # 36b44e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n \tlea 0x13414(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877e6c(%rip),%rsi # 36b43ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3468>\n+\tlea 0x36878e6c(%rip),%rsi # 36b44ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3468>\n \tlea 0x40faf(%rip),%rcx # 30cfea (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32d7a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877e46(%rip),%rsi # 36b43ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3470>\n+\tlea 0x36878e46(%rip),%rsi # 36b44ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3470>\n \tlea 0x41007(%rip),%rcx # 30d070 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32e00>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877e20(%rip),%rsi # 36b43eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3478>\n+\tlea 0x36878e20(%rip),%rsi # 36b44eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3478>\n \tlea 0x4105f(%rip),%rcx # 30d0f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32e86>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877dfa(%rip),%rsi # 36b43eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3480>\n+\tlea 0x36878dfa(%rip),%rsi # 36b44eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3480>\n \tlea 0x41080(%rip),%rcx # 30d145 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32ed5>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877dd4(%rip),%rsi # 36b43ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3488>\n+\tlea 0x36878dd4(%rip),%rsi # 36b44ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3488>\n \tlea 0x410d8(%rip),%rcx # 30d1cb (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32f5b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877dae(%rip),%rsi # 36b43ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3490>\n+\tlea 0x36878dae(%rip),%rsi # 36b44ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3490>\n \tlea 0x41130(%rip),%rcx # 30d251 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32fe1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877d88(%rip),%rsi # 36b43ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3498>\n+\tlea 0x36878d88(%rip),%rsi # 36b44ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3498>\n \tlea 0x41151(%rip),%rcx # 30d2a0 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33030>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877d62(%rip),%rsi # 36b43ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a0>\n+\tlea 0x36878d62(%rip),%rsi # 36b44ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a0>\n \tlea 0x411a9(%rip),%rcx # 30d326 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x330b6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877d3c(%rip),%rsi # 36b43ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a8>\n+\tlea 0x36878d3c(%rip),%rsi # 36b44ee0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a8>\n \tlea 0x27ed4(%rip),%rcx # 2f407f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19e0f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36877d16(%rip),%rsi # 36b43ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b0>\n+\tlea 0x36878d16(%rip),%rsi # 36b44ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b0>\n \tlea 0x411d3(%rip),%rcx # 30d3ac (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3313c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2cc200 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e20>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3687a309(%rip),%rdi # 36b46510 ::get_beta()::val@@Base+0x1f8>\n+\tmov 0x3687b309(%rip),%rdi # 36b47510 ::get_beta()::val@@Base+0x1f8>\n \ttest %rdi,%rdi\n \tje 2cc221 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e41>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3687a2f3(%rip) # 36b46510 ::get_beta()::val@@Base+0x1f8>\n+\tmovq $0x0,0x3687b2f3(%rip) # 36b47510 ::get_beta()::val@@Base+0x1f8>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002cc230 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -602344,43 +602344,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:399\n \tucomiss %xmm0,%xmm1\n \tjne 2cc342 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n \tjp 2cc342 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 2, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877be0(%rip),%rdx # 36b43ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3470>\n+\tlea 0x36878be0(%rip),%rdx # 36b44ea8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3470>\n \tjmp 2cc349 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119>\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:387\n \tucomiss %xmm0,%xmm1\n \tjne 2cc2ff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n \tjp 2cc2ff (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 1, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877ba7(%rip),%rdx # 36b43e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3450>\n+\tlea 0x36878ba7(%rip),%rdx # 36b44e88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3450>\n \tjmp 2cc306 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6>\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:409\n \tcmp $0x4,%rcx\n \tjg 2cc32c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:411\n \tjne 2cc36c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n \tjp 2cc36c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 4, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877bc3(%rip),%rdx # 36b43ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3488>\n+\tlea 0x36878bc3(%rip),%rdx # 36b44ec0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3488>\n \tjmp 2cc373 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x143>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 1, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877b9a(%rip),%rdx # 36b43ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3468>\n+\tlea 0x36878b9a(%rip),%rdx # 36b44ea0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3468>\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n@@ -602392,49 +602392,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:422\n \tjne 2cc396 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n \tjp 2cc396 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 8, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877b98(%rip),%rdx # 36b43ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a0>\n+\tlea 0x36878b98(%rip),%rdx # 36b44ed8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34a0>\n \tjmp 2cc39d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16d>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 2, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877b6f(%rip),%rdx # 36b43eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3480>\n+\tlea 0x36878b6f(%rip),%rdx # 36b44eb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3480>\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 22fb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2cc3be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 4, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877b5d(%rip),%rdx # 36b43ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3498>\n+\tlea 0x36878b5d(%rip),%rdx # 36b44ed0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3498>\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 23360 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2cc3be (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<256, 8, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36877b4b(%rip),%rdx # 36b43ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b0>\n+\tlea 0x36878b4b(%rip),%rdx # 36b44ee8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b0>\n void ggml_cuda_flash_attn_ext_vec_f16_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n@@ -603302,15 +603302,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36876e72(%rip),%rdi # 36b43e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3458>\n+\tlea 0x36877e72(%rip),%rdi # 36b44e90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3458>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2cd165 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd35>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -603358,15 +603358,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36876d52(%rip),%rdi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n+\tlea 0x36877d52(%rip),%rdi # 36b44e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -604440,15 +604440,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36875d4b(%rip),%rdi # 36b43eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3478>\n+\tlea 0x36876d4b(%rip),%rdi # 36b44eb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3478>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2ce2aa (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -604496,15 +604496,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36875c0d(%rip),%rdi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n+\tlea 0x36876c0d(%rip),%rdi # 36b44e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -605575,15 +605575,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36874c23(%rip),%rdi # 36b43ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3490>\n+\tlea 0x36875c23(%rip),%rdi # 36b44ec8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3490>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2cf3ea (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -605631,15 +605631,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36874acd(%rip),%rdi # 36b43e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n+\tlea 0x36875acd(%rip),%rdi # 36b44e98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3460>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -605964,15 +605964,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687447b(%rip),%rdi # 36b43ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b8>\n+\tlea 0x3687547b(%rip),%rdi # 36b44ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -605998,15 +605998,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368743d8(%rip),%rdi # 36b43ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c0>\n+\tlea 0x368753d8(%rip),%rdi # 36b44ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -606029,15 +606029,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3687434e(%rip),%rdi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n+\tlea 0x3687534e(%rip),%rdi # 36b44f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -606133,15 +606133,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36874093(%rip),%rdi # 36b43f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d0>\n+\tlea 0x36875093(%rip),%rdi # 36b44f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -606237,15 +606237,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36873dcb(%rip),%rdi # 36b43f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d8>\n+\tlea 0x36874dcb(%rip),%rdi # 36b44f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -606271,15 +606271,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36873d28(%rip),%rdi # 36b43f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e0>\n+\tlea 0x36874d28(%rip),%rdi # 36b44f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -606375,15 +606375,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36873a6b(%rip),%rdi # 36b43f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e8>\n+\tlea 0x36874a6b(%rip),%rdi # 36b44f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -606479,15 +606479,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x368737a3(%rip),%rdi # 36b43f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f0>\n+\tlea 0x368747a3(%rip),%rdi # 36b44f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -606513,15 +606513,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x36873700(%rip),%rdi # 36b43f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f8>\n+\tlea 0x36874700(%rip),%rdi # 36b44f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -606617,15 +606617,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36873443(%rip),%rdi # 36b43f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3500>\n+\tlea 0x36874443(%rip),%rdi # 36b44f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3500>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -606721,15 +606721,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3687317b(%rip),%rdi # 36b43f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3508>\n+\tlea 0x3687417b(%rip),%rdi # 36b44f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3508>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -606755,15 +606755,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x368730d8(%rip),%rdi # 36b43f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3510>\n+\tlea 0x368740d8(%rip),%rdi # 36b44f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3510>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -606859,174 +606859,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x36872e1b(%rip),%rdi # 36b43f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3518>\n+\tlea 0x36873e1b(%rip),%rdi # 36b44f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3518>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368753ac(%rip),%rbx # 36b46518 ::get_beta()::val@@Base+0x200>\n+\tmov 0x368763ac(%rip),%rbx # 36b47518 ::get_beta()::val@@Base+0x200>\n \ttest %rbx,%rbx\n \tjne 2d1187 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2af7>\n-\tlea 0x36874670(%rip),%rdi # 36b457e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4db0>\n+\tlea 0x36875670(%rip),%rdi # 36b467e8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4db0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x36875391(%rip) # 36b46518 ::get_beta()::val@@Base+0x200>\n+\tmov %rax,0x36876391(%rip) # 36b47518 ::get_beta()::val@@Base+0x200>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872d56(%rip),%rsi # 36b43ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b8>\n+\tlea 0x36873d56(%rip),%rsi # 36b44ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b8>\n \tlea 0x3c291(%rip),%rcx # 30d432 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x331c2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872d30(%rip),%rsi # 36b43ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c0>\n+\tlea 0x36873d30(%rip),%rsi # 36b44ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c0>\n \tlea 0x3c2e8(%rip),%rcx # 30d4b7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33247>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872d0a(%rip),%rsi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n+\tlea 0x36873d0a(%rip),%rsi # 36b44f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n \tlea 0xd11f(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872ce4(%rip),%rsi # 36b43f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d0>\n+\tlea 0x36873ce4(%rip),%rsi # 36b44f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d0>\n \tlea 0x3c2da(%rip),%rcx # 30d505 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33295>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872cbe(%rip),%rsi # 36b43f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d8>\n+\tlea 0x36873cbe(%rip),%rsi # 36b44f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d8>\n \tlea 0x3c331(%rip),%rcx # 30d58a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3331a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872c98(%rip),%rsi # 36b43f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e0>\n+\tlea 0x36873c98(%rip),%rsi # 36b44f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e0>\n \tlea 0x3c388(%rip),%rcx # 30d60f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3339f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872c72(%rip),%rsi # 36b43f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e8>\n+\tlea 0x36873c72(%rip),%rsi # 36b44f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e8>\n \tlea 0x3c3a8(%rip),%rcx # 30d65d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x333ed>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872c4c(%rip),%rsi # 36b43f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f0>\n+\tlea 0x36873c4c(%rip),%rsi # 36b44f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f0>\n \tlea 0x3c3ff(%rip),%rcx # 30d6e2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33472>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872c26(%rip),%rsi # 36b43f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f8>\n+\tlea 0x36873c26(%rip),%rsi # 36b44f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f8>\n \tlea 0x3c456(%rip),%rcx # 30d767 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x334f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872c00(%rip),%rsi # 36b43f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3500>\n+\tlea 0x36873c00(%rip),%rsi # 36b44f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3500>\n \tlea 0x3c476(%rip),%rcx # 30d7b5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33545>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872bda(%rip),%rsi # 36b43f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3508>\n+\tlea 0x36873bda(%rip),%rsi # 36b44f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3508>\n \tlea 0x3c4cd(%rip),%rcx # 30d83a (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x335ca>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872bb4(%rip),%rsi # 36b43f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3510>\n+\tlea 0x36873bb4(%rip),%rsi # 36b44f48 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3510>\n \tlea 0x22632(%rip),%rcx # 2f39cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1975d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36872b8e(%rip),%rsi # 36b43f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3518>\n+\tlea 0x36873b8e(%rip),%rsi # 36b44f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3518>\n \tlea 0x3c4f6(%rip),%rcx # 30d8bf (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3364f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2d13f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2d60>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x36875121(%rip),%rdi # 36b46518 ::get_beta()::val@@Base+0x200>\n+\tmov 0x36876121(%rip),%rdi # 36b47518 ::get_beta()::val@@Base+0x200>\n \ttest %rdi,%rdi\n \tje 2d1411 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2d81>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3687510b(%rip) # 36b46518 ::get_beta()::val@@Base+0x200>\n+\tmovq $0x0,0x3687610b(%rip) # 36b47518 ::get_beta()::val@@Base+0x200>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002d1420 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -607073,43 +607073,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:399\n \tucomiss %xmm0,%xmm1\n \tjne 2d1532 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n \tjp 2d1532 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x112>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 2, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36872a58(%rip),%rdx # 36b43f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d8>\n+\tlea 0x36873a58(%rip),%rdx # 36b44f10 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d8>\n \tjmp 2d1539 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x119>\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:387\n \tucomiss %xmm0,%xmm1\n \tjne 2d14ef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n \tjp 2d14ef (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcf>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 1, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36872a1f(%rip),%rdx # 36b43ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b8>\n+\tlea 0x36873a1f(%rip),%rdx # 36b44ef0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34b8>\n \tjmp 2d14f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xd6>\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:409\n \tcmp $0x4,%rcx\n \tjg 2d151c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xfc>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:411\n \tjne 2d155c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n \tjp 2d155c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x13c>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 4, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36872a3b(%rip),%rdx # 36b43f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f0>\n+\tlea 0x36873a3b(%rip),%rdx # 36b44f28 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f0>\n \tjmp 2d1563 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x143>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 1, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36872a12(%rip),%rdx # 36b43f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d0>\n+\tlea 0x36873a12(%rip),%rdx # 36b44f08 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34d0>\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n@@ -607121,49 +607121,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:422\n \tjne 2d1586 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n \tjp 2d1586 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x166>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 8, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x36872a10(%rip),%rdx # 36b43f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3508>\n+\tlea 0x36873a10(%rip),%rdx # 36b44f40 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3508>\n \tjmp 2d158d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x16d>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 2, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368729e7(%rip),%rdx # 36b43f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e8>\n+\tlea 0x368739e7(%rip),%rdx # 36b44f20 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e8>\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x1\n \tcall 23220 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2d15ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 4, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368729d5(%rip),%rdx # 36b43f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3500>\n+\tlea 0x368739d5(%rip),%rdx # 36b44f38 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3500>\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x1\n \tcall 221f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2d15ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x18e>\n void ggml_cuda_flash_attn_ext_vec_f16_case_impl<64, 8, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f16.cuh:364\n-\tlea 0x368729c3(%rip),%rdx # 36b43f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3518>\n+\tlea 0x368739c3(%rip),%rdx # 36b44f50 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3518>\n void ggml_cuda_flash_attn_ext_vec_f16_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n@@ -608031,15 +608031,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36871cea(%rip),%rdi # 36b43ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c0>\n+\tlea 0x36872cea(%rip),%rdi # 36b44ef8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2d2355 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd35>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -608087,15 +608087,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36871bca(%rip),%rdi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n+\tlea 0x36872bca(%rip),%rdi # 36b44f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -609169,15 +609169,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36870bc3(%rip),%rdi # 36b43f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e0>\n+\tlea 0x36871bc3(%rip),%rdi # 36b44f18 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34e0>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2d349a (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -609225,15 +609225,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x36870a85(%rip),%rdi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n+\tlea 0x36871a85(%rip),%rdi # 36b44f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -610304,15 +610304,15 @@\n \tlea 0x130(%rsp),%rdx\n \tlea 0x108(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x3686fa9b(%rip),%rdi # 36b43f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f8>\n+\tlea 0x36870a9b(%rip),%rdi # 36b44f30 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34f8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x108(%rsp)\n \tpush 0x138(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n \tjmp 2d45da (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0xd5a>\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:874\n@@ -610360,15 +610360,15 @@\n \tlea 0x108(%rsp),%rdx\n \tlea 0x100(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x120(%rsp),%rsi\n \tmov 0x128(%rsp),%edx\n \tmov 0x110(%rsp),%rcx\n \tmov 0x118(%rsp),%r8d\n-\tlea 0x3686f945(%rip),%rdi # 36b43f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n+\tlea 0x36870945(%rip),%rdi # 36b44f00 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x34c8>\n \tlea 0x160(%rsp),%r9\n \tpush 0x100(%rsp)\n \tpush 0x110(%rsp)\n \tcall 22100 \n \tadd $0x10,%rsp\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-common.cuh:883\n \tcall 227e0 \n@@ -610693,15 +610693,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686f2f3(%rip),%rdi # 36b43f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3520>\n+\tlea 0x368702f3(%rip),%rdi # 36b44f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3520>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -610727,15 +610727,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686f250(%rip),%rdi # 36b43f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3528>\n+\tlea 0x36870250(%rip),%rdi # 36b44f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3528>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -610758,15 +610758,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3686f1c6(%rip),%rdi # 36b43f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3530>\n+\tlea 0x368701c6(%rip),%rdi # 36b44f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3530>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -610862,15 +610862,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686ef0b(%rip),%rdi # 36b43f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3538>\n+\tlea 0x3686ff0b(%rip),%rdi # 36b44f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3538>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -610966,15 +610966,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686ec43(%rip),%rdi # 36b43f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3540>\n+\tlea 0x3686fc43(%rip),%rdi # 36b44f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3540>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -611000,15 +611000,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686eba0(%rip),%rdi # 36b43f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3548>\n+\tlea 0x3686fba0(%rip),%rdi # 36b44f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3548>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -611104,15 +611104,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686e8e3(%rip),%rdi # 36b43f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3550>\n+\tlea 0x3686f8e3(%rip),%rdi # 36b44f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3550>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -611208,15 +611208,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686e61b(%rip),%rdi # 36b43f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3558>\n+\tlea 0x3686f61b(%rip),%rdi # 36b44f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3558>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -611242,15 +611242,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686e578(%rip),%rdi # 36b43f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3560>\n+\tlea 0x3686f578(%rip),%rdi # 36b44f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3560>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -611346,15 +611346,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686e2bb(%rip),%rdi # 36b43fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3568>\n+\tlea 0x3686f2bb(%rip),%rdi # 36b44fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3568>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -611450,15 +611450,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686dff3(%rip),%rdi # 36b43fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3570>\n+\tlea 0x3686eff3(%rip),%rdi # 36b44fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3570>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -611484,15 +611484,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686df50(%rip),%rdi # 36b43fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3578>\n+\tlea 0x3686ef50(%rip),%rdi # 36b44fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3578>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -611588,174 +611588,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686dc93(%rip),%rdi # 36b43fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3580>\n+\tlea 0x3686ec93(%rip),%rdi # 36b44fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3580>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x368701c4(%rip),%rbx # 36b46520 ::get_beta()::val@@Base+0x208>\n+\tmov 0x368711c4(%rip),%rbx # 36b47520 ::get_beta()::val@@Base+0x208>\n \ttest %rbx,%rbx\n \tjne 2d6377 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2af7>\n-\tlea 0x3686f498(%rip),%rdi # 36b45800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4dc8>\n+\tlea 0x36870498(%rip),%rdi # 36b46800 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4dc8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x368701a9(%rip) # 36b46520 ::get_beta()::val@@Base+0x208>\n+\tmov %rax,0x368711a9(%rip) # 36b47520 ::get_beta()::val@@Base+0x208>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686dbce(%rip),%rsi # 36b43f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3520>\n+\tlea 0x3686ebce(%rip),%rsi # 36b44f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3520>\n \tlea 0x375b3(%rip),%rcx # 30d944 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x336d4>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686dba8(%rip),%rsi # 36b43f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3528>\n+\tlea 0x3686eba8(%rip),%rsi # 36b44f60 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3528>\n \tlea 0x35593(%rip),%rcx # 30b952 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x316e2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686db82(%rip),%rsi # 36b43f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3530>\n+\tlea 0x3686eb82(%rip),%rsi # 36b44f68 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3530>\n \tlea 0x8040(%rip),%rcx # 2de42d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x41bd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686db5c(%rip),%rsi # 36b43f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3538>\n+\tlea 0x3686eb5c(%rip),%rsi # 36b44f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3538>\n \tlea 0x375af(%rip),%rcx # 30d9ca (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3375a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686db36(%rip),%rsi # 36b43f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3540>\n+\tlea 0x3686eb36(%rip),%rsi # 36b44f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3540>\n \tlea 0x37607(%rip),%rcx # 30da50 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x337e0>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686db10(%rip),%rsi # 36b43f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3548>\n+\tlea 0x3686eb10(%rip),%rsi # 36b44f80 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3548>\n \tlea 0x35636(%rip),%rcx # 30baad (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3183d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686daea(%rip),%rsi # 36b43f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3550>\n+\tlea 0x3686eaea(%rip),%rsi # 36b44f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3550>\n \tlea 0x37631(%rip),%rcx # 30dad6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33866>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686dac4(%rip),%rsi # 36b43f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3558>\n+\tlea 0x3686eac4(%rip),%rsi # 36b44f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3558>\n \tlea 0x37689(%rip),%rcx # 30db5c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x338ec>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686da9e(%rip),%rsi # 36b43f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3560>\n+\tlea 0x3686ea9e(%rip),%rsi # 36b44f98 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3560>\n \tlea 0x35707(%rip),%rcx # 30bc08 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x31998>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686da78(%rip),%rsi # 36b43fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3568>\n+\tlea 0x3686ea78(%rip),%rsi # 36b44fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3568>\n \tlea 0x376b3(%rip),%rcx # 30dbe2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33972>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686da52(%rip),%rsi # 36b43fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3570>\n+\tlea 0x3686ea52(%rip),%rsi # 36b44fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3570>\n \tlea 0x3770b(%rip),%rcx # 30dc68 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x339f8>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686da2c(%rip),%rsi # 36b43fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3578>\n+\tlea 0x3686ea2c(%rip),%rsi # 36b44fb0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3578>\n \tlea 0x1d99b(%rip),%rcx # 2f3f26 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19cb6>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686da06(%rip),%rsi # 36b43fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3580>\n+\tlea 0x3686ea06(%rip),%rsi # 36b44fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3580>\n \tlea 0x37735(%rip),%rcx # 30dcee (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33a7e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2d65e0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2d60>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3686ff39(%rip),%rdi # 36b46520 ::get_beta()::val@@Base+0x208>\n+\tmov 0x36870f39(%rip),%rdi # 36b47520 ::get_beta()::val@@Base+0x208>\n \ttest %rdi,%rdi\n \tje 2d6601 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@@Base+0x2d81>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3686ff23(%rip) # 36b46520 ::get_beta()::val@@Base+0x208>\n+\tmovq $0x0,0x36870f23(%rip) # 36b47520 ::get_beta()::val@@Base+0x208>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002d6610 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -611800,43 +611800,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:392\n \tucomiss %xmm0,%xmm1\n \tjne 2d6718 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n \tjp 2d6718 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 2, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d8da(%rip),%rdx # 36b43f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3540>\n+\tlea 0x3686e8da(%rip),%rdx # 36b44f78 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3540>\n \tjmp 2d671f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:380\n \tucomiss %xmm0,%xmm1\n \tjne 2d66d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n \tjp 2d66d5 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 1, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d8a1(%rip),%rdx # 36b43f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3520>\n+\tlea 0x3686e8a1(%rip),%rdx # 36b44f58 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3520>\n \tjmp 2d66dc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:402\n \tcmp $0x4,%rcx\n \tjg 2d6702 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf2>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:404\n \tjne 2d6742 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n \tjp 2d6742 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 4, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d8bd(%rip),%rdx # 36b43f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3558>\n+\tlea 0x3686e8bd(%rip),%rdx # 36b44f90 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3558>\n \tjmp 2d6749 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x139>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 1, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d894(%rip),%rdx # 36b43f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3538>\n+\tlea 0x3686e894(%rip),%rdx # 36b44f70 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3538>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -611848,49 +611848,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:415\n \tjne 2d676c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n \tjp 2d676c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 8, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d892(%rip),%rdx # 36b43fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3570>\n+\tlea 0x3686e892(%rip),%rdx # 36b44fa8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3570>\n \tjmp 2d6773 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x163>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 2, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d869(%rip),%rdx # 36b43f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3550>\n+\tlea 0x3686e869(%rip),%rdx # 36b44f88 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3550>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 232c0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2d6794 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 4, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d857(%rip),%rdx # 36b43fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3568>\n+\tlea 0x3686e857(%rip),%rdx # 36b44fa0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3568>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x0\n \tcall 23350 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2d6794 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<128, 8, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686d845(%rip),%rdx # 36b43fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3580>\n+\tlea 0x3686e845(%rip),%rdx # 36b44fb8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3580>\n void ggml_cuda_flash_attn_ext_vec_f32_case<128, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x4,%ecx\n \txor %r8d,%r8d\n \tmov $0x80,%r9d\n \tpush $0x20\n@@ -612013,15 +612013,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686d52b(%rip),%rdi # 36b43fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3588>\n+\tlea 0x3686e52b(%rip),%rdi # 36b44fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3588>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612047,15 +612047,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686d488(%rip),%rdi # 36b43fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3590>\n+\tlea 0x3686e488(%rip),%rdi # 36b44fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3590>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -612078,15 +612078,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3686d3fe(%rip),%rdi # 36b43fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3598>\n+\tlea 0x3686e3fe(%rip),%rdi # 36b44fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3598>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -612182,15 +612182,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686d143(%rip),%rdi # 36b43fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a0>\n+\tlea 0x3686e143(%rip),%rdi # 36b44fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612286,15 +612286,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686ce7b(%rip),%rdi # 36b43fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a8>\n+\tlea 0x3686de7b(%rip),%rdi # 36b44fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612320,15 +612320,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686cdd8(%rip),%rdi # 36b43fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b0>\n+\tlea 0x3686ddd8(%rip),%rdi # 36b44fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -612424,15 +612424,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686cb1b(%rip),%rdi # 36b43ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b8>\n+\tlea 0x3686db1b(%rip),%rdi # 36b44ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612528,15 +612528,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686c853(%rip),%rdi # 36b43ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c0>\n+\tlea 0x3686d853(%rip),%rdi # 36b44ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612562,15 +612562,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686c7b0(%rip),%rdi # 36b44000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c8>\n+\tlea 0x3686d7b0(%rip),%rdi # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -612666,15 +612666,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686c4f3(%rip),%rdi # 36b44008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d0>\n+\tlea 0x3686d4f3(%rip),%rdi # 36b45008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612770,15 +612770,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686c22b(%rip),%rdi # 36b44010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d8>\n+\tlea 0x3686d22b(%rip),%rdi # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -612804,15 +612804,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686c188(%rip),%rdi # 36b44018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e0>\n+\tlea 0x3686d188(%rip),%rdi # 36b45018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e0>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -612908,174 +612908,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686becb(%rip),%rdi # 36b44020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e8>\n+\tlea 0x3686cecb(%rip),%rdi # 36b45020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e8>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3686e39c(%rip),%rbx # 36b46528 ::get_beta()::val@@Base+0x210>\n+\tmov 0x3686f39c(%rip),%rbx # 36b47528 ::get_beta()::val@@Base+0x210>\n \ttest %rbx,%rbx\n \tjne 2d81a7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b97>\n-\tlea 0x3686d680(%rip),%rdi # 36b45818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4de0>\n+\tlea 0x3686e680(%rip),%rdi # 36b46818 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4de0>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3686e381(%rip) # 36b46528 ::get_beta()::val@@Base+0x210>\n+\tmov %rax,0x3686f381(%rip) # 36b47528 ::get_beta()::val@@Base+0x210>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686be06(%rip),%rsi # 36b43fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3588>\n+\tlea 0x3686ce06(%rip),%rsi # 36b44fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3588>\n \tlea 0x35bb3(%rip),%rcx # 30dd74 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33b04>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bde0(%rip),%rsi # 36b43fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3590>\n+\tlea 0x3686cde0(%rip),%rsi # 36b44fc8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3590>\n \tlea 0x34dac(%rip),%rcx # 30cf9b (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32d2b>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bdba(%rip),%rsi # 36b43fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3598>\n+\tlea 0x3686cdba(%rip),%rsi # 36b44fd0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3598>\n \tlea 0x7204(%rip),%rcx # 2df421 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x51b1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bd94(%rip),%rsi # 36b43fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a0>\n+\tlea 0x3686cd94(%rip),%rsi # 36b44fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a0>\n \tlea 0x35baf(%rip),%rcx # 30ddfa (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33b8a>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bd6e(%rip),%rsi # 36b43fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a8>\n+\tlea 0x3686cd6e(%rip),%rsi # 36b44fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a8>\n \tlea 0x35c07(%rip),%rcx # 30de80 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33c10>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bd48(%rip),%rsi # 36b43fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b0>\n+\tlea 0x3686cd48(%rip),%rsi # 36b44fe8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b0>\n \tlea 0x34e4f(%rip),%rcx # 30d0f6 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32e86>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bd22(%rip),%rsi # 36b43ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b8>\n+\tlea 0x3686cd22(%rip),%rsi # 36b44ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b8>\n \tlea 0x35c31(%rip),%rcx # 30df06 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33c96>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bcfc(%rip),%rsi # 36b43ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c0>\n+\tlea 0x3686ccfc(%rip),%rsi # 36b44ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c0>\n \tlea 0x35c89(%rip),%rcx # 30df8c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33d1c>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bcd6(%rip),%rsi # 36b44000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c8>\n+\tlea 0x3686ccd6(%rip),%rsi # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c8>\n \tlea 0x34f20(%rip),%rcx # 30d251 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x32fe1>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bcb0(%rip),%rsi # 36b44008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d0>\n+\tlea 0x3686ccb0(%rip),%rsi # 36b45008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d0>\n \tlea 0x35cb3(%rip),%rcx # 30e012 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33da2>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bc8a(%rip),%rsi # 36b44010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d8>\n+\tlea 0x3686cc8a(%rip),%rsi # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d8>\n \tlea 0x35d0b(%rip),%rcx # 30e098 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33e28>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bc64(%rip),%rsi # 36b44018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e0>\n+\tlea 0x3686cc64(%rip),%rsi # 36b45018 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e0>\n \tlea 0x1bcc4(%rip),%rcx # 2f407f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x19e0f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686bc3e(%rip),%rsi # 36b44020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e8>\n+\tlea 0x3686cc3e(%rip),%rsi # 36b45020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e8>\n \tlea 0x35d35(%rip),%rcx # 30e11e (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33eae>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2d8410 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e00>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3686e111(%rip),%rdi # 36b46528 ::get_beta()::val@@Base+0x210>\n+\tmov 0x3686f111(%rip),%rdi # 36b47528 ::get_beta()::val@@Base+0x210>\n \ttest %rdi,%rdi\n \tje 2d8431 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e21>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3686e0fb(%rip) # 36b46528 ::get_beta()::val@@Base+0x210>\n+\tmovq $0x0,0x3686f0fb(%rip) # 36b47528 ::get_beta()::val@@Base+0x210>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002d8440 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -613120,43 +613120,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:392\n \tucomiss %xmm0,%xmm1\n \tjne 2d8548 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n \tjp 2d8548 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 2, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686bb12(%rip),%rdx # 36b43fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a8>\n+\tlea 0x3686cb12(%rip),%rdx # 36b44fe0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a8>\n \tjmp 2d854f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f>\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:380\n \tucomiss %xmm0,%xmm1\n \tjne 2d8505 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n \tjp 2d8505 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 1, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686bad9(%rip),%rdx # 36b43fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3588>\n+\tlea 0x3686cad9(%rip),%rdx # 36b44fc0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3588>\n \tjmp 2d850c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc>\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:402\n \tcmp $0x4,%rcx\n \tjg 2d8532 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf2>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:404\n \tjne 2d8572 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n \tjp 2d8572 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 4, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686baf5(%rip),%rdx # 36b43ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c0>\n+\tlea 0x3686caf5(%rip),%rdx # 36b44ff8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35c0>\n \tjmp 2d8579 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x139>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 1, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686bacc(%rip),%rdx # 36b43fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a0>\n+\tlea 0x3686cacc(%rip),%rdx # 36b44fd8 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35a0>\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n@@ -613168,49 +613168,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:415\n \tjne 2d859c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n \tjp 2d859c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 8, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686baca(%rip),%rdx # 36b44010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d8>\n+\tlea 0x3686caca(%rip),%rdx # 36b45010 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d8>\n \tjmp 2d85a3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x163>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 2, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686baa1(%rip),%rdx # 36b43ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b8>\n+\tlea 0x3686caa1(%rip),%rdx # 36b44ff0 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35b8>\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 22fb0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2d85c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 4, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686ba8f(%rip),%rdx # 36b44008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d0>\n+\tlea 0x3686ca8f(%rip),%rdx # 36b45008 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35d0>\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x1\n \tpush $0x1\n \tcall 23360 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2d85c4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<256, 8, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x3686ba7d(%rip),%rdx # 36b44020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e8>\n+\tlea 0x3686ca7d(%rip),%rdx # 36b45020 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35e8>\n void ggml_cuda_flash_attn_ext_vec_f32_case<256, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x8,%ecx\n \txor %r8d,%r8d\n \tmov $0x100,%r9d\n \tpush $0x20\n@@ -613333,15 +613333,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686b763(%rip),%rdi # 36b44028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f0>\n+\tlea 0x3686c763(%rip),%rdi # 36b45028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f0>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -613367,15 +613367,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686b6c0(%rip),%rdi # 36b44030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f8>\n+\tlea 0x3686c6c0(%rip),%rdi # 36b45030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f8>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -613398,15 +613398,15 @@\n \tlea 0x10(%rsp),%rdx\n \tlea 0x8(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x28(%rsp),%rsi\n \tmov 0x30(%rsp),%edx\n \tmov 0x18(%rsp),%rcx\n \tmov 0x20(%rsp),%r8d\n-\tlea 0x3686b636(%rip),%rdi # 36b44038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3600>\n+\tlea 0x3686c636(%rip),%rdi # 36b45038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3600>\n \tlea 0x50(%rsp),%r9\n \tpush 0x8(%rsp)\n \tpush 0x18(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopl 0x0(%rax)\n@@ -613502,15 +613502,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686b37b(%rip),%rdi # 36b44040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3608>\n+\tlea 0x3686c37b(%rip),%rdi # 36b45040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3608>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -613606,15 +613606,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686b0b3(%rip),%rdi # 36b44048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3610>\n+\tlea 0x3686c0b3(%rip),%rdi # 36b45048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3610>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -613640,15 +613640,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686b010(%rip),%rdi # 36b44050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3618>\n+\tlea 0x3686c010(%rip),%rdi # 36b45050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3618>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -613744,15 +613744,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686ad53(%rip),%rdi # 36b44058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3620>\n+\tlea 0x3686bd53(%rip),%rdi # 36b45058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3620>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -613848,15 +613848,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686aa8b(%rip),%rdi # 36b44060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3628>\n+\tlea 0x3686ba8b(%rip),%rdi # 36b45060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3628>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -613882,15 +613882,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686a9e8(%rip),%rdi # 36b44068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3630>\n+\tlea 0x3686b9e8(%rip),%rdi # 36b45068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3630>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -613986,15 +613986,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686a72b(%rip),%rdi # 36b44070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3638>\n+\tlea 0x3686b72b(%rip),%rdi # 36b45070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3638>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -614090,15 +614090,15 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686a463(%rip),%rdi # 36b44078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3640>\n+\tlea 0x3686b463(%rip),%rdi # 36b45078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3640>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n@@ -614124,15 +614124,15 @@\n \tlea 0x18(%rsp),%rdx\n \tlea 0x10(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x30(%rsp),%rsi\n \tmov 0x38(%rsp),%edx\n \tmov 0x20(%rsp),%rcx\n \tmov 0x28(%rsp),%r8d\n-\tlea 0x3686a3c0(%rip),%rdi # 36b44080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3648>\n+\tlea 0x3686b3c0(%rip),%rdi # 36b45080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3648>\n \tlea 0x50(%rsp),%r9\n \tpush 0x10(%rsp)\n \tpush 0x20(%rsp)\n \tcall 22100 \n \tadd $0x88,%rsp\n \tret\n \tnopw 0x0(%rax,%rax,1)\n@@ -614228,174 +614228,174 @@\n \tlea 0x28(%rsp),%rdx\n \tlea 0x20(%rsp),%rcx\n \tcall 22340 <__hipPopCallConfiguration@plt>\n \tmov 0x40(%rsp),%rsi\n \tmov 0x48(%rsp),%edx\n \tmov 0x30(%rsp),%rcx\n \tmov 0x38(%rsp),%r8d\n-\tlea 0x3686a103(%rip),%rdi # 36b44088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3650>\n+\tlea 0x3686b103(%rip),%rdi # 36b45088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3650>\n \tlea 0x80(%rsp),%r9\n \tpush 0x20(%rsp)\n \tpush 0x30(%rsp)\n \tcall 22100 \n \tadd $0x1b8,%rsp\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __hip_module_ctor():\n \tpush %rbx\n \tsub $0x20,%rsp\n-\tmov 0x3686c574(%rip),%rbx # 36b46530 ::get_beta()::val@@Base+0x218>\n+\tmov 0x3686d574(%rip),%rbx # 36b47530 ::get_beta()::val@@Base+0x218>\n \ttest %rbx,%rbx\n \tjne 2d9fd7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1b97>\n-\tlea 0x3686b868(%rip),%rdi # 36b45830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4df8>\n+\tlea 0x3686c868(%rip),%rdi # 36b46830 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x4df8>\n \tcall 222d0 <__hipRegisterFatBinary@plt>\n \tmov %rax,%rbx\n-\tmov %rax,0x3686c559(%rip) # 36b46530 ::get_beta()::val@@Base+0x218>\n+\tmov %rax,0x3686d559(%rip) # 36b47530 ::get_beta()::val@@Base+0x218>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686a03e(%rip),%rsi # 36b44028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f0>\n+\tlea 0x3686b03e(%rip),%rsi # 36b45028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f0>\n \tlea 0x341b3(%rip),%rcx # 30e1a4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33f34>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x3686a018(%rip),%rsi # 36b44030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f8>\n+\tlea 0x3686b018(%rip),%rsi # 36b45030 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f8>\n \tlea 0x33498(%rip),%rcx # 30d4b7 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33247>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869ff2(%rip),%rsi # 36b44038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3600>\n+\tlea 0x3686aff2(%rip),%rsi # 36b45038 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3600>\n \tlea 0x42cf(%rip),%rcx # 2de31c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x40ac>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869fcc(%rip),%rsi # 36b44040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3608>\n+\tlea 0x3686afcc(%rip),%rsi # 36b45040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3608>\n \tlea 0x341ae(%rip),%rcx # 30e229 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x33fb9>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869fa6(%rip),%rsi # 36b44048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3610>\n+\tlea 0x3686afa6(%rip),%rsi # 36b45048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3610>\n \tlea 0x34205(%rip),%rcx # 30e2ae (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3403e>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869f80(%rip),%rsi # 36b44050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3618>\n+\tlea 0x3686af80(%rip),%rsi # 36b45050 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3618>\n \tlea 0x33538(%rip),%rcx # 30d60f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x3339f>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869f5a(%rip),%rsi # 36b44058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3620>\n+\tlea 0x3686af5a(%rip),%rsi # 36b45058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3620>\n \tlea 0x3422e(%rip),%rcx # 30e333 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x340c3>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869f34(%rip),%rsi # 36b44060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3628>\n+\tlea 0x3686af34(%rip),%rsi # 36b45060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3628>\n \tlea 0x34285(%rip),%rcx # 30e3b8 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x34148>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869f0e(%rip),%rsi # 36b44068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3630>\n+\tlea 0x3686af0e(%rip),%rsi # 36b45068 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3630>\n \tlea 0x33606(%rip),%rcx # 30d767 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x334f7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869ee8(%rip),%rsi # 36b44070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3638>\n+\tlea 0x3686aee8(%rip),%rsi # 36b45070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3638>\n \tlea 0x342ae(%rip),%rcx # 30e43d (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x341cd>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869ec2(%rip),%rsi # 36b44078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3640>\n+\tlea 0x3686aec2(%rip),%rsi # 36b45078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3640>\n \tlea 0x34305(%rip),%rcx # 30e4c2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x34252>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869e9c(%rip),%rsi # 36b44080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3648>\n+\tlea 0x3686ae9c(%rip),%rsi # 36b45080 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3648>\n \tlea 0x197e2(%rip),%rcx # 2f39cd (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1975d>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \txorps %xmm0,%xmm0\n \tmovups %xmm0,0x10(%rsp)\n \tmovups %xmm0,(%rsp)\n-\tlea 0x36869e76(%rip),%rsi # 36b44088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3650>\n+\tlea 0x3686ae76(%rip),%rsi # 36b45088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3650>\n \tlea 0x3432e(%rip),%rcx # 30e547 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x342d7>\n \tmov %rbx,%rdi\n \tmov %rcx,%rdx\n \tmov $0xffffffff,%r8d\n \txor %r9d,%r9d\n \tcall 23460 <__hipRegisterFunction@plt>\n \tlea 0xc(%rip),%rdi # 2da240 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e00>\n \tadd $0x20,%rsp\n \tpop %rbx\n \tjmp 2da560 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x2f0>\n \txchg %ax,%ax\n __hip_module_dtor():\n-\tmov 0x3686c2e9(%rip),%rdi # 36b46530 ::get_beta()::val@@Base+0x218>\n+\tmov 0x3686d2e9(%rip),%rdi # 36b47530 ::get_beta()::val@@Base+0x218>\n \ttest %rdi,%rdi\n \tje 2da261 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e21>\n \tpush %rax\n \tcall 22590 <__hipUnregisterFatBinary@plt>\n-\tmovq $0x0,0x3686c2d3(%rip) # 36b46530 ::get_beta()::val@@Base+0x218>\n+\tmovq $0x0,0x3686d2d3(%rip) # 36b47530 ::get_beta()::val@@Base+0x218>\n \tadd $0x8,%rsp\n \tret\n \tcs nopw 0x0(%rax,%rax,1)\n \tnopl 0x0(%rax)\n \n 00000000002da270 (ggml_backend_cuda_context&, ggml_tensor*)@@Base>:\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n@@ -614440,43 +614440,43 @@\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:392\n \tucomiss %xmm0,%xmm1\n \tjne 2da378 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n \tjp 2da378 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x108>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 2, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869d4a(%rip),%rdx # 36b44048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3610>\n+\tlea 0x3686ad4a(%rip),%rdx # 36b45048 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3610>\n \tjmp 2da37f (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x10f>\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \txorps %xmm0,%xmm0\n \tmovss 0x4(%rsp),%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:380\n \tucomiss %xmm0,%xmm1\n \tjne 2da335 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n \tjp 2da335 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xc5>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 1, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869d11(%rip),%rdx # 36b44028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f0>\n+\tlea 0x3686ad11(%rip),%rdx # 36b45028 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x35f0>\n \tjmp 2da33c (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xcc>\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:402\n \tcmp $0x4,%rcx\n \tjg 2da362 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0xf2>\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:404\n \tjne 2da3a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n \tjp 2da3a2 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x132>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 4, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869d2d(%rip),%rdx # 36b44060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3628>\n+\tlea 0x3686ad2d(%rip),%rdx # 36b45060 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3628>\n \tjmp 2da3a9 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x139>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 1, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869d04(%rip),%rdx # 36b44040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3608>\n+\tlea 0x3686ad04(%rip),%rdx # 36b45040 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3608>\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n@@ -614488,49 +614488,49 @@\n \tmovss 0x4(%rsp),%xmm1\n \tucomiss %xmm0,%xmm1\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:415\n \tjne 2da3cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n \tjp 2da3cc (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x15c>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 8, (ggml_type)1, (ggml_type)1, false>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869d02(%rip),%rdx # 36b44078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3640>\n+\tlea 0x3686ad02(%rip),%rdx # 36b45078 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3640>\n \tjmp 2da3d3 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x163>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 2, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869cd9(%rip),%rdx # 36b44058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3620>\n+\tlea 0x3686acd9(%rip),%rdx # 36b45058 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3620>\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x1\n \tcall 23220 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2da3f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 4, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869cc7(%rip),%rdx # 36b44070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3638>\n+\tlea 0x3686acc7(%rip),%rdx # 36b45070 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3638>\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n \tpush $0x0\n \tpush $0x0\n \tpush $0x1\n \tcall 221f0 (ggml_backend_cuda_context&, ggml_tensor*, void (*)(char const*, char const*, char const*, char const*, float*, HIP_vector_type*, float, float, float, float, unsigned int, float, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int, int), int, unsigned long, int, bool, bool, bool, int)@plt>\n \tjmp 2da3f4 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x184>\n void ggml_cuda_flash_attn_ext_vec_f32_case_impl<64, 8, (ggml_type)1, (ggml_type)1, true>(ggml_backend_cuda_context&, ggml_tensor*):\n /build/reproducible-path/ggml-0.0~git20250712.d62df60/src/ggml-cuda/template-instances/../fattn-vec-f32.cuh:360\n-\tlea 0x36869cb5(%rip),%rdx # 36b44088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3650>\n+\tlea 0x3686acb5(%rip),%rdx # 36b45088 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x3650>\n void ggml_cuda_flash_attn_ext_vec_f32_case<64, (ggml_type)1, (ggml_type)1>(ggml_backend_cuda_context&, ggml_tensor*):\n \tmov %r14,%rdi\n \tmov %rbx,%rsi\n \tmov $0x2,%ecx\n \txor %r8d,%r8d\n \tmov $0x40,%r9d\n \tpush $0x20\n@@ -614633,11 +614633,11 @@\n \tret\n \tdata16 data16 data16 data16 cs nopw 0x0(%rax,%rax,1)\n __gnu_f2h_ieee():\n \tendbr64\n \tjmp 2da450 (ggml_backend_cuda_context&, ggml_tensor*)@@Base+0x1e0>\n \tnopl 0x0(%rax)\n atexit():\n-\tmov 0x3686aa99(%rip),%rdx # 36b45000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n+\tmov 0x3686ba99(%rip),%rdx # 36b46000 (float const*, float const*, float const*, float const*, float const*, float const*, int const*, float*, int, int, int, int, int, int, int, int, int, int, int, long, long, long)@@Base+0x45c8>\n \txor %esi,%esi\n \tjmp 22580 <__cxa_atexit@plt>\n \txchg %ax,%ax\n"}, {"source1": "readelf --wide --decompress --hex-dump=.hip_fatbin {}", "source2": "readelf --wide --decompress --hex-dump=.hip_fatbin {}", "unified_diff": "@@ -4194297,8 +4194297,8 @@\n 0x0430ff60 049c17a4 17031105 9f0001b7 0204d010 ................\n 0x0430ff70 a4170390 a20c0001 b70204d0 10a41703 ................\n 0x0430ff80 90a30c00 01b70204 d0108011 0311009f ................\n 0x0430ff90 04801194 11031102 9f049411 98110311 ................\n 0x0430ffa0 069f0498 11a81103 11049f04 a811f011 ................\n 0x0430ffb0 0311089f 04f011a0 12031100 9f04a012 ................\n 0x0430ffc0 b4120311 029f04b4 12b81203 11069f04 ................\n-[ Too much input for diff (SHA256: 3cd9d8d56f2a952d0e46530c115ee90d5c423d289d465579f99a5f7d44711458) ]\n+[ Too much input for diff (SHA256: d5b377ac7c590da9f4f19534b889adf729796313c3ecfdd7d7cbb7e4da89c977) ]\n"}, {"source1": "readelf --wide --decompress --hex-dump=.eh_frame_hdr {}", "source2": "readelf --wide --decompress --hex-dump=.eh_frame_hdr {}", "unified_diff": "@@ -1,1596 +1,1596 @@\n \n Hex dump of section '.eh_frame_hdr':\n- 0x36ae3d18 011b033b bc220100 6f0c0000 08e353c9 ...;.\"..o.....S.\n- 0x36ae3d28 d8220100 68fb53c9 00230100 88fb53c9 .\"..h.S..#....S.\n- 0x36ae3d38 50850100 d8fb53c9 70850100 28fc53c9 P.....S.p...(.S.\n- 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{"source1": "readelf --wide --decompress --hex-dump=.gcc_except_table {}", "source2": "readelf --wide --decompress --hex-dump=.gcc_except_table {}", "unified_diff": "@@ -1,2647 +1,2647 @@\n \n Hex dump of section '.gcc_except_table':\n- 0x36aea09c ff9b3901 2f00c203 0000c203 d503920a ..9./...........\n- 0x36aea0ac 00970705 900a00a9 071b920a 00db0703 ................\n- 0x36aea0bc 880a01de 07d80100 00b60929 900a00df ...........)....\n- 0x36aea0cc 09480000 01000000 00000000 ff9b0d01 .H..............\n- 0x36aea0dc 0414061c 01010000 00000000 ff9bd001 ................\n- 0x36aea0ec 01c60100 8a050000 8a0556fa 2100ef05 ..........V.!...\n- 0x36aea0fc 30ec2100 b60605c2 2100c006 05c02100 0.!.....!.....!.\n- 0x36aea10c ef0757fa 2100d208 2eea2100 940905be ..W.!.....!.....\n- 0x36aea11c 2100a009 05bc2100 e30a1af8 2100ed0b !.....!.....!...\n- 0x36aea12c 03f02100 f50db301 f62100a8 0fae0100 ..!......!......\n- 0x36aea13c 00d61082 05ee2100 d81505f4 21009816 ......!.....!...\n- 0x36aea14c 9c02c821 00de18fc 01c42100 da1a05f2 ...!......!.....\n- 0x36aea15c 2100fe1a 03e22101 a11b03da 2101c41b !.....!.....!...\n- 0x36aea16c 03d22101 e71b03ca 2101ea1b 9a020000 ..!.....!.......\n- 0x36aea17c 841e29f8 2100ad1e 29f42100 d61e29f2 ..).!...).!...).\n- 0x36aea18c 2100ff1e 720000f1 1f21c621 009e2015 !...r....!.!.. .\n- 0x36aea19c f02100b3 204a0000 fd200efa 21009b21 .!.. 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01cc058c c702009a b10103bc c60201b2 ................\n- 0x36af0cfc b101cc05 cac70200 83b701cc 058ac702 ................\n- 0x36af0d0c 00f0bc01 03b4c602 0188bd01 cc05c8c7 ................\n- 0x36af0d1c 0200e9c2 01cc05c6 c70200ba c801cc05 ................\n- 0x36af0d2c 88c70200 a7ce0103 acc60201 afce01cc ................\n- 0x36af0d3c 0586c702 009cd401 03a4c602 01b4d401 ................\n- 0x36af0d4c cc05c4c7 020085da 01cc0584 c70200f2 ................\n- 0x36af0d5c df01039c c602018a e001cc05 c2c70200 ................\n- 0x36af0d6c dbe501cc 0582c702 00c8eb01 0394c602 ................\n- 0x36af0d7c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n- 0x36af0d8c c702009e f701038c c60201b6 f701cc05 ................\n- 0x36af0d9c bec70200 87fd01cc 05fec602 00f48202 ................\n- 0x36af0dac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af0dbc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af0dcc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af0ddc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af0dec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af0dfc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af0e0c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af0e1c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af0e2c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af0e3c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af0e4c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n- 0x36af0e5c 00000000 ff9bfc05 01f20500 a02c0000 .............,..\n- 0x36af0e6c a02c03ba c70200a3 2c9d0200 00c02e03 .,......,.......\n- 0x36af0e7c b8c70200 c32e9d02 0000e030 03b6c702 ...........0....\n- 0x36af0e8c 00e3309a 020000fd 3203b4c7 02008033 ..0.....2......3\n- 0x36af0e9c 9d020000 9d3503b2 c70200a0 359d0200 .....5......5...\n- 0x36af0eac 00bd3703 b0c70200 c0379002 0000d039 ..7......7.....9\n- 0x36af0ebc 03aec702 00d33990 020000e3 3b03acc7 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05fec602 00f48202 ................\n- 0x36af10ac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af10bc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af10cc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af10dc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af10ec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af10fc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af110c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af111c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af112c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af113c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af114c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n- 0x36af115c 00000000 ff9bfc05 01f20500 a02c0000 .............,..\n- 0x36af116c a02c03ba c70200a3 2c9d0200 00c02e03 .,......,.......\n- 0x36af117c b8c70200 c32e9d02 0000e030 03b6c702 ...........0....\n- 0x36af118c 00e3309a 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0x36af136c dbe501cc 0582c702 00c8eb01 0394c602 ................\n- 0x36af137c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n- 0x36af138c c702009e f701038c c60201b6 f701cc05 ................\n- 0x36af139c bec70200 87fd01cc 05fec602 00f48202 ................\n- 0x36af13ac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af13bc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af13cc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af13dc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af13ec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af13fc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af140c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af141c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af142c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af143c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af144c 02219cc7 0200fcc5 02f30100 00010000 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acc60201 afce01cc ................\n- 0x36af163c 0586c702 009cd401 03a4c602 01b4d401 ................\n- 0x36af164c cc05c4c7 020085da 01cc0584 c70200f2 ................\n- 0x36af165c df01039c c602018a e001cc05 c2c70200 ................\n- 0x36af166c dbe501cc 0582c702 00c8eb01 0394c602 ................\n- 0x36af167c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n- 0x36af168c c702009e f701038c c60201b6 f701cc05 ................\n- 0x36af169c bec70200 87fd01cc 05fec602 00f48202 ................\n- 0x36af16ac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af16bc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af16cc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af16dc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af16ec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af16fc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af170c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af171c 0221a8c7 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0x36af18fc b101cc05 cac70200 83b701cc 058ac702 ................\n- 0x36af190c 00f0bc01 03b4c602 0188bd01 cc05c8c7 ................\n- 0x36af191c 0200e9c2 01cc05c6 c70200ba c801cc05 ................\n- 0x36af192c 88c70200 a7ce0103 acc60201 afce01cc ................\n- 0x36af193c 0586c702 009cd401 03a4c602 01b4d401 ................\n- 0x36af194c cc05c4c7 020085da 01cc0584 c70200f2 ................\n- 0x36af195c df01039c c602018a e001cc05 c2c70200 ................\n- 0x36af196c dbe501cc 0582c702 00c8eb01 0394c602 ................\n- 0x36af197c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n- 0x36af198c c702009e f701038c c60201b6 f701cc05 ................\n- 0x36af199c bec70200 87fd01cc 05fec602 00f48202 ................\n- 0x36af19ac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af19bc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af19cc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af19dc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af19ec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af19fc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af1a0c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af1a1c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af1a2c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af1a3c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af1a4c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n- 0x36af1a5c 00000000 ff9bfc05 01f20500 a02c0000 .............,..\n- 0x36af1a6c a02c03ba c70200a3 2c9d0200 00c02e03 .,......,.......\n- 0x36af1a7c b8c70200 c32e9d02 0000e030 03b6c702 ...........0....\n- 0x36af1a8c 00e3309a 020000fd 3203b4c7 02008033 ..0.....2......3\n- 0x36af1a9c 9d020000 9d3503b2 c70200a0 359d0200 .....5......5...\n- 0x36af1aac 00bd3703 b0c70200 c0379002 0000d039 ..7......7.....9\n- 0x36af1abc 03aec702 00d33990 020000e3 3b03acc7 ......9.....;...\n- 0x36af1acc 0200e63b 90020000 f63d03aa c70200f9 ...;.....=......\n- 0x36af1adc 3d900200 00894003 a8c70200 8c409002 =.....@......@..\n- 0x36af1aec 00009c42 03a6c702 009f429d 020000bc ...B......B.....\n- 0x36af1afc 4403a4c7 0200bf44 9a020000 d94603a2 D......D.....F..\n- 0x36af1b0c c70200dc 469a0200 00f64803 a0c70200 ....F.....H.....\n- 0x36af1b1c f9489a02 0000934b 039ec702 00964b9d .H.....K......K.\n- 0x36af1b2c 020000b3 4d039cc7 02008254 cc05dac7 ....M......T....\n- 0x36af1b3c 0200d359 cc059ac7 0200c05f 03f4c602 ...Y......._....\n- 0x36af1b4c 01d85fcc 05d8c702 00a965cc 0598c702 .._.......e.....\n- 0x36af1b5c 00966b03 ecc60201 ae6bcc05 d6c70200 ..k......k......\n- 0x36af1b6c ff70cc05 96c70200 ec7603e4 c6020184 .p.......v......\n- 0x36af1b7c 77cc05d4 c70200d5 7ccc0594 c70200c2 w.......|.......\n- 0x36af1b8c 820103dc c60201da 8201cc05 d2c70200 ................\n- 0x36af1b9c ab8801cc 0592c702 00988e01 03d4c602 ................\n- 0x36af1bac 01b08e01 cc05d0c7 02008194 01cc0590 ................\n- 0x36af1bbc c70200ee 990103cc c6020186 9a01cc05 ................\n- 0x36af1bcc cec70200 d79f01cc 058ec702 00c4a501 ................\n- 0x36af1bdc 03c4c602 01dca501 cc05ccc7 0200adab ................\n- 0x36af1bec 01cc058c c702009a b10103bc c60201b2 ................\n- 0x36af1bfc b101cc05 cac70200 83b701cc 058ac702 ................\n- 0x36af1c0c 00f0bc01 03b4c602 0188bd01 cc05c8c7 ................\n- 0x36af1c1c 0200e9c2 01cc05c6 c70200ba c801cc05 ................\n- 0x36af1c2c 88c70200 a7ce0103 acc60201 afce01cc ................\n- 0x36af1c3c 0586c702 009cd401 03a4c602 01b4d401 ................\n- 0x36af1c4c cc05c4c7 020085da 01cc0584 c70200f2 ................\n- 0x36af1c5c df01039c c602018a e001cc05 c2c70200 ................\n- 0x36af1c6c dbe501cc 0582c702 00c8eb01 0394c602 ................\n- 0x36af1c7c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n- 0x36af1c8c c702009e f701038c c60201b6 f701cc05 ................\n- 0x36af1c9c bec70200 87fd01cc 05fec602 00f48202 ................\n- 0x36af1cac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af1cbc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af1ccc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af1cdc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af1cec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af1cfc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af1d0c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af1d1c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af1d2c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af1d3c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af1d4c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n- 0x36af1d5c 00000000 ff9bfc05 01f20500 a02c0000 .............,..\n- 0x36af1d6c a02c03ba c70200a3 2c9d0200 00c02e03 .,......,.......\n- 0x36af1d7c b8c70200 c32e9d02 0000e030 03b6c702 ...........0....\n- 0x36af1d8c 00e3309a 020000fd 3203b4c7 02008033 ..0.....2......3\n- 0x36af1d9c 9d020000 9d3503b2 c70200a0 359d0200 .....5......5...\n- 0x36af1dac 00bd3703 b0c70200 c0379002 0000d039 ..7......7.....9\n- 0x36af1dbc 03aec702 00d33990 020000e3 3b03acc7 ......9.....;...\n- 0x36af1dcc 0200e63b 90020000 f63d03aa c70200f9 ...;.....=......\n- 0x36af1ddc 3d900200 00894003 a8c70200 8c409002 =.....@......@..\n- 0x36af1dec 00009c42 03a6c702 009f429d 020000bc ...B......B.....\n- 0x36af1dfc 4403a4c7 0200bf44 9a020000 d94603a2 D......D.....F..\n- 0x36af1e0c c70200dc 469a0200 00f64803 a0c70200 ....F.....H.....\n- 0x36af1e1c f9489a02 0000934b 039ec702 00964b9d .H.....K......K.\n- 0x36af1e2c 020000b3 4d039cc7 02008254 cc05dac7 ....M......T....\n- 0x36af1e3c 0200d359 cc059ac7 0200c05f 03f4c602 ...Y......._....\n- 0x36af1e4c 01d85fcc 05d8c702 00a965cc 0598c702 .._.......e.....\n- 0x36af1e5c 00966b03 ecc60201 ae6bcc05 d6c70200 ..k......k......\n- 0x36af1e6c ff70cc05 96c70200 ec7603e4 c6020184 .p.......v......\n- 0x36af1e7c 77cc05d4 c70200d5 7ccc0594 c70200c2 w.......|.......\n- 0x36af1e8c 820103dc c60201da 8201cc05 d2c70200 ................\n- 0x36af1e9c ab8801cc 0592c702 00988e01 03d4c602 ................\n- 0x36af1eac 01b08e01 cc05d0c7 02008194 01cc0590 ................\n- 0x36af1ebc c70200ee 990103cc c6020186 9a01cc05 ................\n- 0x36af1ecc cec70200 d79f01cc 058ec702 00c4a501 ................\n- 0x36af1edc 03c4c602 01dca501 cc05ccc7 0200adab ................\n- 0x36af1eec 01cc058c c702009a b10103bc c60201b2 ................\n- 0x36af1efc b101cc05 cac70200 83b701cc 058ac702 ................\n- 0x36af1f0c 00f0bc01 03b4c602 0188bd01 cc05c8c7 ................\n- 0x36af1f1c 0200e9c2 01cc05c6 c70200ba c801cc05 ................\n- 0x36af1f2c 88c70200 a7ce0103 acc60201 afce01cc ................\n- 0x36af1f3c 0586c702 009cd401 03a4c602 01b4d401 ................\n- 0x36af1f4c cc05c4c7 020085da 01cc0584 c70200f2 ................\n- 0x36af1f5c df01039c c602018a e001cc05 c2c70200 ................\n- 0x36af1f6c dbe501cc 0582c702 00c8eb01 0394c602 ................\n- 0x36af1f7c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n- 0x36af1f8c c702009e f701038c c60201b6 f701cc05 ................\n- 0x36af1f9c bec70200 87fd01cc 05fec602 00f48202 ................\n- 0x36af1fac 0384c602 018c8302 cc05bcc7 0200dd88 ................\n- 0x36af1fbc 02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af1fcc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af1fdc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af1fec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af1ffc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af200c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af201c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af202c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af203c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af204c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n- 0x36af205c 00000000 ff9bfc05 01f20500 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................\n- 0x36af250c 00d0bf01 0394c902 01e8bf01 cc05a8ca ................\n- 0x36af251c 0200c9c5 01cc05a6 ca02009a cb01cc05 ................\n- 0x36af252c e8c90200 87d10103 8cc90201 8fd101cc ................\n- 0x36af253c 05e6c902 00fcd601 0384c902 0194d701 ................\n- 0x36af254c cc05a4ca 0200e5dc 01cc05e4 c90200d2 ................\n- 0x36af255c e20103fc c80201ea e201cc05 a2ca0200 ................\n- 0x36af256c bbe801cc 05e2c902 00a8ee01 03f4c802 ................\n- 0x36af257c 01c0ee01 cc05a0ca 020091f4 01cc05e0 ................\n- 0x36af258c c90200fe f90103ec c8020196 fa01cc05 ................\n- 0x36af259c 9eca0200 e7ff01cc 05dec902 00d48502 ................\n- 0x36af25ac 03e4c802 01ec8502 cc059cca 0200bd8b ................\n- 0x36af25bc 02cc05dc c90200aa 910203dc c80201ad ................\n- 0x36af25cc 91029f33 0000ccc4 02219aca 0200edc4 ...3.....!......\n- 0x36af25dc 022198ca 02008ec5 022196ca 0200afc5 .!.......!......\n- 0x36af25ec 022194ca 0200d0c5 022192ca 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02cc05fc c60200ca 8e0203fc c50201cd ................\n- 0x36af28cc 8e029f33 0000ecc1 0221bac7 02008dc2 ...3.....!......\n- 0x36af28dc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n- 0x36af28ec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n- 0x36af28fc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n- 0x36af290c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n- 0x36af291c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n- 0x36af292c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n- 0x36af293c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n- 0x36af294c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n- 0x36af295c 00000000 ff9bfc05 01f20500 a02c0000 .............,..\n- 0x36af296c a02c03ba c70200a3 2c9d0200 00c02e03 .,......,.......\n- 0x36af297c b8c70200 c32e9d02 0000e030 03b6c702 ...........0....\n- 0x36af298c 00e3309a 020000fd 3203b4c7 02008033 ..0.....2......3\n- 0x36af299c 9d020000 9d3503b2 c70200a0 359d0200 .....5......5...\n- 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0x36af1ddc 0221b8c7 0200aec2 0221b6c7 0200cfc2 .!.......!......\n+ 0x36af1dec 0221b4c7 0200f0c2 0221b2c7 020091c3 .!.......!......\n+ 0x36af1dfc 0221b0c7 0200b2c3 0221aec7 0200d3c3 .!.......!......\n+ 0x36af1e0c 0221acc7 0200f4c3 0221aac7 020095c4 .!.......!......\n+ 0x36af1e1c 0221a8c7 0200b6c4 0221a6c7 0200d7c4 .!.......!......\n+ 0x36af1e2c 0221a4c7 0200f8c4 0221a2c7 020099c5 .!.......!......\n+ 0x36af1e3c 0221a0c7 0200bac5 02219ec7 0200dbc5 .!.......!......\n+ 0x36af1e4c 02219cc7 0200fcc5 02f30100 00010000 .!..............\n+ 0x36af1e5c 00000000 ff9bfc05 01f20500 a02c0000 .............,..\n+ 0x36af1e6c a02c03ba c70200a3 2c9d0200 00c02e03 .,......,.......\n+ 0x36af1e7c b8c70200 c32e9d02 0000e030 03b6c702 ...........0....\n+ 0x36af1e8c 00e3309a 020000fd 3203b4c7 02008033 ..0.....2......3\n+ 0x36af1e9c 9d020000 9d3503b2 c70200a0 359d0200 .....5......5...\n+ 0x36af1eac 00bd3703 b0c70200 c0379002 0000d039 ..7......7.....9\n+ 0x36af1ebc 03aec702 00d33990 020000e3 3b03acc7 ......9.....;...\n+ 0x36af1ecc 0200e63b 90020000 f63d03aa c70200f9 ...;.....=......\n+ 0x36af1edc 3d900200 00894003 a8c70200 8c409002 =.....@......@..\n+ 0x36af1eec 00009c42 03a6c702 009f429d 020000bc ...B......B.....\n+ 0x36af1efc 4403a4c7 0200bf44 9a020000 d94603a2 D......D.....F..\n+ 0x36af1f0c c70200dc 469a0200 00f64803 a0c70200 ....F.....H.....\n+ 0x36af1f1c f9489a02 0000934b 039ec702 00964b9d .H.....K......K.\n+ 0x36af1f2c 020000b3 4d039cc7 02008254 cc05dac7 ....M......T....\n+ 0x36af1f3c 0200d359 cc059ac7 0200c05f 03f4c602 ...Y......._....\n+ 0x36af1f4c 01d85fcc 05d8c702 00a965cc 0598c702 .._.......e.....\n+ 0x36af1f5c 00966b03 ecc60201 ae6bcc05 d6c70200 ..k......k......\n+ 0x36af1f6c ff70cc05 96c70200 ec7603e4 c6020184 .p.......v......\n+ 0x36af1f7c 77cc05d4 c70200d5 7ccc0594 c70200c2 w.......|.......\n+ 0x36af1f8c 820103dc c60201da 8201cc05 d2c70200 ................\n+ 0x36af1f9c ab8801cc 0592c702 00988e01 03d4c602 ................\n+ 0x36af1fac 01b08e01 cc05d0c7 02008194 01cc0590 ................\n+ 0x36af1fbc c70200ee 990103cc c6020186 9a01cc05 ................\n+ 0x36af1fcc cec70200 d79f01cc 058ec702 00c4a501 ................\n+ 0x36af1fdc 03c4c602 01dca501 cc05ccc7 0200adab ................\n+ 0x36af1fec 01cc058c c702009a b10103bc c60201b2 ................\n+ 0x36af1ffc b101cc05 cac70200 83b701cc 058ac702 ................\n+ 0x36af200c 00f0bc01 03b4c602 0188bd01 cc05c8c7 ................\n+ 0x36af201c 0200e9c2 01cc05c6 c70200ba c801cc05 ................\n+ 0x36af202c 88c70200 a7ce0103 acc60201 afce01cc ................\n+ 0x36af203c 0586c702 009cd401 03a4c602 01b4d401 ................\n+ 0x36af204c cc05c4c7 020085da 01cc0584 c70200f2 ................\n+ 0x36af205c df01039c c602018a e001cc05 c2c70200 ................\n+ 0x36af206c dbe501cc 0582c702 00c8eb01 0394c602 ................\n+ 0x36af207c 01e0eb01 cc05c0c7 0200b1f1 01cc0580 ................\n+ 0x36af208c c702009e f701038c c60201b6 f701cc05 ................\n+ 0x36af209c bec70200 87fd01cc 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00000000 90450200 00000000 pB.......E......\n+ 0x36b3fce8 804a0200 00000000 e0230300 00000000 .J.......#......\n+ 0x36b3fcf8 e02f0300 00000000 a0440300 00000000 ./.......D......\n+ 0x36b3fd08 204c0300 00000000 b0520300 00000000 L.......R......\n+ 0x36b3fd18 905b0300 00000000 509e0300 00000000 .[......P.......\n+ 0x36b3fd28 70ab0300 00000000 10f10300 00000000 p...............\n+ 0x36b3fd38 e0000400 00000000 d0040400 00000000 ................\n+ 0x36b3fd48 10210400 00000000 e0840400 00000000 .!..............\n+ 0x36b3fd58 a01b0500 00000000 60310600 00000000 ........`1......\n+ 0x36b3fd68 a0380200 00000000 f0380200 00000000 .8.......8......\n+ 0x36b3fd78 40390200 00000000 c0450700 00000000 @9.......E......\n+ 0x36b3fd88 30a30700 00000000 a0ad0700 00000000 0...............\n+ 0x36b3fd98 c0b00700 00000000 80d80b00 00000000 ................\n+ 0x36b3fda8 f01e0e00 00000000 10550e00 00000000 .........U......\n+ 0x36b3fdb8 a05c0e00 00000000 b0660e00 00000000 .\\.......f......\n+ 0x36b3fdc8 906b0e00 00000000 c0760e00 00000000 .k.......v......\n+ 0x36b3fdd8 00a40e00 00000000 50f90e00 00000000 ........P.......\n+ 0x36b3fde8 902e0f00 00000000 203f0f00 00000000 ........ ?......\n+ 0x36b3fdf8 10480f00 00000000 60530f00 00000000 .H......`S......\n+ 0x36b3fe08 80560f00 00000000 a0c60f00 00000000 .V..............\n+ 0x36b3fe18 b0d90f00 00000000 a0e80f00 00000000 ................\n+ 0x36b3fe28 90f00f00 00000000 302c1000 00000000 ........0,......\n+ 0x36b3fe38 f0c31000 00000000 90f41000 00000000 ................\n+ 0x36b3fe48 b08c1100 00000000 20031200 00000000 ........ .......\n+ 0x36b3fe58 b03e1200 00000000 30d71200 00000000 .>......0.......\n+ 0x36b3fe68 b06f1300 00000000 50a01300 00000000 .o......P.......\n+ 0x36b3fe78 60161400 00000000 f0511400 00000000 `........Q......\n+ 0x36b3fe88 10ea1400 00000000 90821500 00000000 ................\n+ 0x36b3fe98 101b1600 00000000 30b31600 00000000 ........0.......\n+ 0x36b3fea8 504b1700 00000000 70e31700 00000000 PK......p.......\n+ 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"readelf --wide --decompress --hex-dump=.fini_array {}", "source2": "readelf --wide --decompress --hex-dump=.fini_array {}", "unified_diff": "@@ -1,4 +1,4 @@\n \n Hex dump of section '.fini_array':\n- 0x36b3efa0 c0390200 00000000 .9......\n+ 0x36b3ffa0 c0390200 00000000 .9......\n \n"}, {"source1": "readelf --wide --decompress --hex-dump=.data.rel.ro {}", "source2": "readelf --wide --decompress --hex-dump=.data.rel.ro {}", "unified_diff": "@@ -1,1298 +1,1298 @@\n \n Hex dump of section '.data.rel.ro':\n- 0x36b3efa8 303e0200 00000000 e0410200 00000000 0>.......A......\n- 0x36b3efb8 10450200 00000000 60490200 00000000 .E......`I......\n- 0x36b3efc8 f0490200 00000000 a0e10200 00000000 .I..............\n- 0x36b3efd8 40e30200 00000000 e0e40200 00000000 @...............\n- 0x36b3efe8 80e60200 00000000 20e80200 00000000 ........ .......\n- 0x36b3eff8 c0e90200 00000000 60eb0200 00000000 ........`.......\n- 0x36b3f008 00ed0200 00000000 a0ee0200 00000000 ................\n- 0x36b3f018 40f00200 00000000 e0f10200 00000000 @...............\n- 0x36b3f028 80f30200 00000000 20f50200 00000000 ........ .......\n- 0x36b3f038 c0f60200 00000000 60f80200 00000000 ........`.......\n- 0x36b3f048 00fa0200 00000000 a0fb0200 00000000 ................\n- 0x36b3f058 40fd0200 00000000 e0fe0200 00000000 @...............\n- 0x36b3f068 80000300 00000000 20020300 00000000 ........ .......\n- 0x36b3f078 c0030300 00000000 60050300 00000000 ........`.......\n- 0x36b3f088 00070300 00000000 a0080300 00000000 ................\n- 0x36b3f098 400a0300 00000000 e00b0300 00000000 @...............\n- 0x36b3f0a8 800d0300 00000000 200f0300 00000000 ........ .......\n- 0x36b3f0b8 c0100300 00000000 60120300 00000000 ........`.......\n- 0x36b3f0c8 00140300 00000000 a0150300 00000000 ................\n- 0x36b3f0d8 40170300 00000000 e0180300 00000000 @...............\n- 0x36b3f0e8 801a0300 00000000 201c0300 00000000 ........ .......\n- 0x36b3f0f8 c01d0300 00000000 601f0300 00000000 ........`.......\n- 0x36b3f108 00210300 00000000 a0220300 00000000 .!.......\"......\n- 0x36b3f118 a02e0300 00000000 402f0300 00000000 ........@/......\n- 0x36b3f128 803a0300 00000000 203b0300 00000000 .:...... ;......\n- 0x36b3f138 c03b0300 00000000 603c0300 00000000 .;......`<......\n- 0x36b3f148 703e0300 00000000 80400300 00000000 p>.......@......\n- 0x36b3f158 90420300 00000000 a04a0300 00000000 .B.......J......\n- 0x36b3f168 00000000 00000000 00000000 00000000 ................\n- 0x36b3f178 00000000 00000000 d0860300 00000000 ................\n- 0x36b3f188 50870300 00000000 d0870300 00000000 P...............\n- 0x36b3f198 50880300 00000000 d0880300 00000000 P...............\n- 0x36b3f1a8 50890300 00000000 d0890300 00000000 P...............\n- 0x36b3f1b8 508a0300 00000000 c08a0300 00000000 P...............\n- 0x36b3f1c8 308b0300 00000000 a08b0300 00000000 0...............\n- 0x36b3f1d8 108c0300 00000000 808c0300 00000000 ................\n- 0x36b3f1e8 f08c0300 00000000 608d0300 00000000 ........`.......\n- 0x36b3f1f8 d08d0300 00000000 408e0300 00000000 ........@.......\n- 0x36b3f208 b08e0300 00000000 208f0300 00000000 ........ .......\n- 0x36b3f218 908f0300 00000000 00900300 00000000 ................\n- 0x36b3f228 70900300 00000000 f0900300 00000000 p...............\n- 0x36b3f238 70910300 00000000 f0910300 00000000 p...............\n- 0x36b3f248 70920300 00000000 f0920300 00000000 p...............\n- 0x36b3f258 60930300 00000000 d0930300 00000000 `...............\n- 0x36b3f268 40940300 00000000 b0940300 00000000 @...............\n- 0x36b3f278 20950300 00000000 90950300 00000000 ...............\n- 0x36b3f288 00960300 00000000 70960300 00000000 ........p.......\n- 0x36b3f298 e0960300 00000000 50970300 00000000 ........P.......\n- 0x36b3f2a8 c0970300 00000000 30980300 00000000 ........0.......\n- 0x36b3f2b8 a0980300 00000000 10990300 00000000 ................\n- 0x36b3f2c8 f0990300 00000000 d09a0300 00000000 ................\n- 0x36b3f2d8 b09b0300 00000000 909c0300 00000000 ................\n- 0x36b3f2e8 709d0300 00000000 707d0300 00000000 p.......p}......\n- 0x36b3f2f8 706e0300 00000000 606f0300 00000000 pn......`o......\n- 0x36b3f308 00000000 00000000 00000000 00000000 ................\n- 0x36b3f318 50700300 00000000 30710300 00000000 Pp......0q......\n- 0x36b3f328 10720300 00000000 00000000 00000000 .r..............\n- 0x36b3f338 f0720300 00000000 b0730300 00000000 .r.......s......\n- 0x36b3f348 70740300 00000000 30750300 00000000 pt......0u......\n- 0x36b3f358 f0750300 00000000 00000000 00000000 .u..............\n- 0x36b3f368 b0760300 00000000 70770300 00000000 .v......pw......\n- 0x36b3f378 f0780300 00000000 b0790300 00000000 .x.......y......\n- 0x36b3f388 307b0300 00000000 b07c0300 00000000 0{.......|......\n- 0x36b3f398 30780300 00000000 f07b0300 00000000 0x.......{......\n- 0x36b3f3a8 00000000 00000000 00000000 00000000 ................\n- 0x36b3f3b8 00000000 00000000 00000000 00000000 ................\n- 0x36b3f3c8 00000000 00000000 707a0300 00000000 ........pz......\n- 0x36b3f3d8 a07d0300 00000000 c0aa0300 00000000 .}..............\n- 0x36b3f3e8 10d90300 00000000 90da0300 00000000 ................\n- 0x36b3f3f8 10dc0300 00000000 90dd0300 00000000 ................\n- 0x36b3f408 10df0300 00000000 90e00300 00000000 ................\n- 0x36b3f418 10e20300 00000000 90e30300 00000000 ................\n- 0x36b3f428 10e50300 00000000 90e60300 00000000 ................\n- 0x36b3f438 10e80300 00000000 90e90300 00000000 ................\n- 0x36b3f448 10eb0300 00000000 90ec0300 00000000 ................\n- 0x36b3f458 10ee0300 00000000 90ef0300 00000000 ................\n- 0x36b3f468 90f90300 00000000 30fa0300 00000000 ........0.......\n- 0x36b3f478 80ff0300 00000000 30000400 00000000 ........0.......\n- 0x36b3f488 30040400 00000000 f0060400 00000000 0...............\n- 0x36b3f498 c0090400 00000000 900c0400 00000000 ................\n- 0x36b3f4a8 300d0400 00000000 c00d0400 00000000 0...............\n- 0x36b3f4b8 600e0400 00000000 f00e0400 00000000 `...............\n- 0x36b3f4c8 c0110400 00000000 90140400 00000000 ................\n- 0x36b3f4d8 60170400 00000000 301a0400 00000000 `.......0.......\n- 0x36b3f4e8 d01a0400 00000000 701b0400 00000000 ........p.......\n- 0x36b3f4f8 401e0400 00000000 c06a0400 00000000 @........j......\n- 0x36b3f508 906d0400 00000000 60700400 00000000 .m......`p......\n- 0x36b3f518 00710400 00000000 90710400 00000000 .q.......q......\n- 0x36b3f528 30720400 00000000 c0720400 00000000 0r.......r......\n- 0x36b3f538 90750400 00000000 60780400 00000000 .u......`x......\n- 0x36b3f548 307b0400 00000000 007e0400 00000000 0{.......~......\n- 0x36b3f558 a07e0400 00000000 407f0400 00000000 .~......@.......\n- 0x36b3f568 10820400 00000000 608f0400 00000000 ........`.......\n- 0x36b3f578 30920400 00000000 00950400 00000000 0...............\n- 0x36b3f588 a0950400 00000000 30960400 00000000 ........0.......\n- 0x36b3f598 00990400 00000000 d09b0400 00000000 ................\n- 0x36b3f5a8 709c0400 00000000 009d0400 00000000 p...............\n- 0x36b3f5b8 d09f0400 00000000 a0a20400 00000000 ................\n- 0x36b3f5c8 40a30400 00000000 d0a30400 00000000 @...............\n- 0x36b3f5d8 a0a60400 00000000 70a90400 00000000 ........p.......\n- 0x36b3f5e8 10aa0400 00000000 a0aa0400 00000000 ................\n- 0x36b3f5f8 70ad0400 00000000 40b00400 00000000 p.......@.......\n- 0x36b3f608 e0b00400 00000000 70b10400 00000000 ........p.......\n- 0x36b3f618 40b40400 00000000 10b70400 00000000 @...............\n- 0x36b3f628 b0b70400 00000000 40b80400 00000000 ........@.......\n- 0x36b3f638 10bb0400 00000000 e0bd0400 00000000 ................\n- 0x36b3f648 80be0400 00000000 50c10400 00000000 ........P.......\n- 0x36b3f658 20c40400 00000000 c0c40400 00000000 ...............\n- 0x36b3f668 90c70400 00000000 60ca0400 00000000 ........`.......\n- 0x36b3f678 00cb0400 00000000 d0cd0400 00000000 ................\n- 0x36b3f688 a0d00400 00000000 40d10400 00000000 ........@.......\n- 0x36b3f698 10d40400 00000000 e0d60400 00000000 ................\n- 0x36b3f6a8 80d70400 00000000 50da0400 00000000 ........P.......\n- 0x36b3f6b8 20dd0400 00000000 f0df0400 00000000 ...............\n- 0x36b3f6c8 c0e20400 00000000 90e50400 00000000 ................\n- 0x36b3f6d8 60e80400 00000000 30eb0400 00000000 `.......0.......\n- 0x36b3f6e8 00ee0400 00000000 d0f00400 00000000 ................\n- 0x36b3f6f8 a0f30400 00000000 70f60400 00000000 ........p.......\n- 0x36b3f708 40f90400 00000000 10fc0400 00000000 @...............\n- 0x36b3f718 e0fe0400 00000000 b0010500 00000000 ................\n- 0x36b3f728 80040500 00000000 50070500 00000000 ........P.......\n- 0x36b3f738 200a0500 00000000 f00c0500 00000000 ...............\n- 0x36b3f748 c00f0500 00000000 90120500 00000000 ................\n- 0x36b3f758 60150500 00000000 30180500 00000000 `.......0.......\n- 0x36b3f768 001b0500 00000000 b0030600 00000000 ................\n- 0x36b3f778 60040600 00000000 a0050600 00000000 `...............\n- 0x36b3f788 e0060600 00000000 20080600 00000000 ........ .......\n- 0x36b3f798 60090600 00000000 a00a0600 00000000 `...............\n- 0x36b3f7a8 e00b0600 00000000 200d0600 00000000 ........ .......\n- 0x36b3f7b8 600e0600 00000000 a00f0600 00000000 `...............\n- 0x36b3f7c8 e0100600 00000000 20120600 00000000 ........ .......\n- 0x36b3f7d8 60130600 00000000 a0140600 00000000 `...............\n- 0x36b3f7e8 e0150600 00000000 20170600 00000000 ........ .......\n- 0x36b3f7f8 60180600 00000000 a0190600 00000000 `...............\n- 0x36b3f808 e01a0600 00000000 201c0600 00000000 ........ .......\n- 0x36b3f818 601d0600 00000000 a01e0600 00000000 `...............\n- 0x36b3f828 e01f0600 00000000 20210600 00000000 ........ !......\n- 0x36b3f838 60220600 00000000 a0230600 00000000 `\".......#......\n- 0x36b3f848 e0240600 00000000 20260600 00000000 .$...... &......\n- 0x36b3f858 60270600 00000000 a0280600 00000000 `'.......(......\n- 0x36b3f868 e0290600 00000000 202b0600 00000000 .)...... +......\n- 0x36b3f878 602c0600 00000000 a02d0600 00000000 `,.......-......\n- 0x36b3f888 e02e0600 00000000 20300600 00000000 ........ 0......\n- 0x36b3f898 305c0600 00000000 405c0600 00000000 0\\......@\\......\n- 0x36b3f8a8 705d0600 00000000 00000000 00000000 p]..............\n- 0x36b3f8b8 805d0600 00000000 00000000 00000000 .]..............\n- 0x36b3f8c8 40630600 00000000 50630600 00000000 @c......Pc......\n- 0x36b3f8d8 d0630600 00000000 00000000 00000000 .c..............\n- 0x36b3f8e8 e0630600 00000000 50650600 00000000 .c......Pe......\n- 0x36b3f8f8 a0720600 00000000 b0720600 00000000 .r.......r......\n- 0x36b3f908 c0720600 00000000 20730600 00000000 .r...... s......\n- 0x36b3f918 30730600 00000000 c0730600 00000000 0s.......s......\n- 0x36b3f928 d0730600 00000000 e0730600 00000000 .s.......s......\n- 0x36b3f938 00000000 00000000 f0730600 00000000 .........s......\n- 0x36b3f948 907c0600 00000000 507d0600 00000000 .|......P}......\n- 0x36b3f958 907d0600 00000000 007e0600 00000000 .}.......~......\n- 0x36b3f968 507e0600 00000000 907e0600 00000000 P~.......~......\n- 0x36b3f978 a07e0600 00000000 b07e0600 00000000 .~.......~......\n- 0x36b3f988 f07e0600 00000000 10810600 00000000 .~..............\n- 0x36b3f998 20810600 00000000 50810600 00000000 .......P.......\n- 0x36b3f9a8 70820600 00000000 90830600 00000000 p...............\n- 0x36b3f9b8 80860600 00000000 00000000 00000000 ................\n- 0x36b3f9c8 00000000 00000000 00000000 00000000 ................\n- 0x36b3f9d8 00000000 00000000 20870600 00000000 ........ .......\n- 0x36b3f9e8 00a20600 00000000 b0a20600 00000000 ................\n- 0x36b3f9f8 205e0600 00000000 905e0600 00000000 ^.......^......\n- 0x36b3fa08 a05e0600 00000000 605f0600 00000000 .^......`_......\n- 0x36b3fa18 10600600 00000000 c0600600 00000000 .`.......`......\n- 0x36b3fa28 70610600 00000000 a0620600 00000000 pa.......b......\n- 0x36b3fa38 00000000 00000000 60650600 00000000 ........`e......\n- 0x36b3fa48 80650600 00000000 90650600 00000000 .e.......e......\n- 0x36b3fa58 00000000 00000000 306a0600 00000000 ........0j......\n- 0x36b3fa68 f06c0600 00000000 00000000 00000000 .l..............\n- 0x36b3fa78 b06f0600 00000000 00000000 00000000 .o..............\n- 0x36b3fa88 10420700 00000000 00000000 00000000 .B..............\n- 0x36b3fa98 00000000 00000000 00000000 00000000 ................\n- 0x36b3faa8 00000000 00000000 00000000 00000000 ................\n- 0x36b3fab8 00000000 00000000 00000000 00000000 ................\n- 0x36b3fac8 00000000 00000000 00000000 00000000 ................\n- 0x36b3fad8 00000000 00000000 00000000 00000000 ................\n- 0x36b3fae8 10a10700 00000000 20a20700 00000000 ........ .......\n- 0x36b3faf8 80aa0700 00000000 10ac0700 00000000 ................\n- 0x36b3fb08 40b00700 00000000 60700800 00000000 @.......`p......\n- 0x36b3fb18 d0710800 00000000 40730800 00000000 .q......@s......\n- 0x36b3fb28 b0740800 00000000 20760800 00000000 .t...... v......\n- 0x36b3fb38 90770800 00000000 00790800 00000000 .w.......y......\n- 0x36b3fb48 707a0800 00000000 e07b0800 00000000 pz.......{......\n- 0x36b3fb58 507d0800 00000000 c07e0800 00000000 P}.......~......\n- 0x36b3fb68 30800800 00000000 a0810800 00000000 0...............\n- 0x36b3fb78 10830800 00000000 80840800 00000000 ................\n- 0x36b3fb88 f0850800 00000000 60870800 00000000 ........`.......\n- 0x36b3fb98 d0880800 00000000 408a0800 00000000 ........@.......\n- 0x36b3fba8 b08b0800 00000000 208d0800 00000000 ........ .......\n- 0x36b3fbb8 908e0800 00000000 00900800 00000000 ................\n- 0x36b3fbc8 70910800 00000000 e0920800 00000000 p...............\n- 0x36b3fbd8 50940800 00000000 c0950800 00000000 P...............\n- 0x36b3fbe8 30970800 00000000 a0980800 00000000 0...............\n- 0x36b3fbf8 109a0800 00000000 809b0800 00000000 ................\n- 0x36b3fc08 f09c0800 00000000 609e0800 00000000 ........`.......\n- 0x36b3fc18 d09f0800 00000000 40a10800 00000000 ........@.......\n- 0x36b3fc28 b0a20800 00000000 20a40800 00000000 ........ .......\n- 0x36b3fc38 90a50800 00000000 00a70800 00000000 ................\n- 0x36b3fc48 70a80800 00000000 e0a90800 00000000 p...............\n- 0x36b3fc58 50ab0800 00000000 c0ac0800 00000000 P...............\n- 0x36b3fc68 30ae0800 00000000 a0af0800 00000000 0...............\n- 0x36b3fc78 10b10800 00000000 80b20800 00000000 ................\n- 0x36b3fc88 f0b30800 00000000 60b50800 00000000 ........`.......\n- 0x36b3fc98 d0b60800 00000000 40b80800 00000000 ........@.......\n- 0x36b3fca8 b0b90800 00000000 20bb0800 00000000 ........ .......\n- 0x36b3fcb8 90bc0800 00000000 00be0800 00000000 ................\n- 0x36b3fcc8 70bf0800 00000000 e0c00800 00000000 p...............\n- 0x36b3fcd8 50c20800 00000000 c0c30800 00000000 P...............\n- 0x36b3fce8 30c50800 00000000 a0c60800 00000000 0...............\n- 0x36b3fcf8 10c80800 00000000 80c90800 00000000 ................\n- 0x36b3fd08 f0ca0800 00000000 c0fd0900 00000000 ................\n- 0x36b3fd18 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00000000 .j-.....`k-.....\n+ 0x36b44fd8 f06b2d00 00000000 c06e2d00 00000000 .k-......n-.....\n+ 0x36b44fe8 90712d00 00000000 30722d00 00000000 .q-.....0r-.....\n+ 0x36b44ff8 00752d00 00000000 d0772d00 00000000 .u-......w-.....\n+ 0x36b45008 70782d00 00000000 407b2d00 00000000 px-.....@{-.....\n+ 0x36b45018 107e2d00 00000000 b07e2d00 00000000 .~-......~-.....\n+ 0x36b45028 20862d00 00000000 f0882d00 00000000 .-.......-.....\n+ 0x36b45038 90892d00 00000000 208a2d00 00000000 ..-..... .-.....\n+ 0x36b45048 f08c2d00 00000000 c08f2d00 00000000 ..-.......-.....\n+ 0x36b45058 60902d00 00000000 30932d00 00000000 `.-.....0.-.....\n+ 0x36b45068 00962d00 00000000 a0962d00 00000000 ..-.......-.....\n+ 0x36b45078 70992d00 00000000 409c2d00 00000000 p.-.....@.-.....\n+ 0x36b45088 e09c2d00 00000000 ..-.....\n \n"}, {"source1": "readelf --wide --decompress --hex-dump=.got {}", "source2": "readelf --wide --decompress --hex-dump=.got {}", "unified_diff": "@@ -1,215 +1,215 @@\n \n Hex dump of section '.got':\n NOTE: This section has relocations against it, but these have NOT been applied to this dump.\n- 0x36b442d0 9040b436 00000000 00000000 00000000 .@.6............\n- 0x36b442e0 00000000 00000000 36200200 00000000 ........6 ......\n- 0x36b442f0 46200200 00000000 56200200 00000000 F ......V ......\n- 0x36b44300 66200200 00000000 76200200 00000000 f ......v ......\n- 0x36b44310 86200200 00000000 96200200 00000000 . ....... ......\n- 0x36b44320 a6200200 00000000 b6200200 00000000 . ....... ......\n- 0x36b44330 c6200200 00000000 d6200200 00000000 . ....... ......\n- 0x36b44340 e6200200 00000000 f6200200 00000000 . ....... ......\n- 0x36b44350 06210200 00000000 16210200 00000000 .!.......!......\n- 0x36b44360 26210200 00000000 36210200 00000000 &!......6!......\n- 0x36b44370 46210200 00000000 56210200 00000000 F!......V!......\n- 0x36b44380 66210200 00000000 76210200 00000000 f!......v!......\n- 0x36b44390 86210200 00000000 96210200 00000000 .!.......!......\n- 0x36b443a0 a6210200 00000000 b6210200 00000000 .!.......!......\n- 0x36b443b0 c6210200 00000000 d6210200 00000000 .!.......!......\n- 0x36b443c0 e6210200 00000000 f6210200 00000000 .!.......!......\n- 0x36b443d0 06220200 00000000 16220200 00000000 .\".......\"......\n- 0x36b443e0 26220200 00000000 36220200 00000000 &\"......6\"......\n- 0x36b443f0 46220200 00000000 56220200 00000000 F\"......V\"......\n- 0x36b44400 66220200 00000000 76220200 00000000 f\"......v\"......\n- 0x36b44410 86220200 00000000 96220200 00000000 .\".......\"......\n- 0x36b44420 a6220200 00000000 b6220200 00000000 .\".......\"......\n- 0x36b44430 c6220200 00000000 d6220200 00000000 .\".......\"......\n- 0x36b44440 e6220200 00000000 f6220200 00000000 .\".......\"......\n- 0x36b44450 06230200 00000000 16230200 00000000 .#.......#......\n- 0x36b44460 26230200 00000000 36230200 00000000 &#......6#......\n- 0x36b44470 46230200 00000000 56230200 00000000 F#......V#......\n- 0x36b44480 66230200 00000000 76230200 00000000 f#......v#......\n- 0x36b44490 86230200 00000000 96230200 00000000 .#.......#......\n- 0x36b444a0 a6230200 00000000 b6230200 00000000 .#.......#......\n- 0x36b444b0 c6230200 00000000 d6230200 00000000 .#.......#......\n- 0x36b444c0 e6230200 00000000 f6230200 00000000 .#.......#......\n- 0x36b444d0 06240200 00000000 16240200 00000000 .$.......$......\n- 0x36b444e0 26240200 00000000 36240200 00000000 &$......6$......\n- 0x36b444f0 46240200 00000000 56240200 00000000 F$......V$......\n- 0x36b44500 66240200 00000000 76240200 00000000 f$......v$......\n- 0x36b44510 86240200 00000000 96240200 00000000 .$.......$......\n- 0x36b44520 a6240200 00000000 b6240200 00000000 .$.......$......\n- 0x36b44530 c6240200 00000000 d6240200 00000000 .$.......$......\n- 0x36b44540 e6240200 00000000 f6240200 00000000 .$.......$......\n- 0x36b44550 06250200 00000000 16250200 00000000 .%.......%......\n- 0x36b44560 26250200 00000000 36250200 00000000 &%......6%......\n- 0x36b44570 46250200 00000000 56250200 00000000 F%......V%......\n- 0x36b44580 66250200 00000000 76250200 00000000 f%......v%......\n- 0x36b44590 86250200 00000000 96250200 00000000 .%.......%......\n- 0x36b445a0 a6250200 00000000 b6250200 00000000 .%.......%......\n- 0x36b445b0 c6250200 00000000 d6250200 00000000 .%.......%......\n- 0x36b445c0 e6250200 00000000 f6250200 00000000 .%.......%......\n- 0x36b445d0 06260200 00000000 16260200 00000000 .&.......&......\n- 0x36b445e0 26260200 00000000 36260200 00000000 &&......6&......\n- 0x36b445f0 46260200 00000000 56260200 00000000 F&......V&......\n- 0x36b44600 66260200 00000000 76260200 00000000 f&......v&......\n- 0x36b44610 86260200 00000000 96260200 00000000 .&.......&......\n- 0x36b44620 a6260200 00000000 b6260200 00000000 .&.......&......\n- 0x36b44630 c6260200 00000000 d6260200 00000000 .&.......&......\n- 0x36b44640 e6260200 00000000 f6260200 00000000 .&.......&......\n- 0x36b44650 06270200 00000000 16270200 00000000 .'.......'......\n- 0x36b44660 26270200 00000000 36270200 00000000 &'......6'......\n- 0x36b44670 46270200 00000000 56270200 00000000 F'......V'......\n- 0x36b44680 66270200 00000000 76270200 00000000 f'......v'......\n- 0x36b44690 86270200 00000000 96270200 00000000 .'.......'......\n- 0x36b446a0 a6270200 00000000 b6270200 00000000 .'.......'......\n- 0x36b446b0 c6270200 00000000 d6270200 00000000 .'.......'......\n- 0x36b446c0 e6270200 00000000 f6270200 00000000 .'.......'......\n- 0x36b446d0 06280200 00000000 16280200 00000000 .(.......(......\n- 0x36b446e0 26280200 00000000 36280200 00000000 &(......6(......\n- 0x36b446f0 46280200 00000000 56280200 00000000 F(......V(......\n- 0x36b44700 66280200 00000000 76280200 00000000 f(......v(......\n- 0x36b44710 86280200 00000000 96280200 00000000 .(.......(......\n- 0x36b44720 a6280200 00000000 b6280200 00000000 .(.......(......\n- 0x36b44730 c6280200 00000000 d6280200 00000000 .(.......(......\n- 0x36b44740 e6280200 00000000 f6280200 00000000 .(.......(......\n- 0x36b44750 06290200 00000000 16290200 00000000 .).......)......\n- 0x36b44760 26290200 00000000 36290200 00000000 &)......6)......\n- 0x36b44770 46290200 00000000 56290200 00000000 F)......V)......\n- 0x36b44780 66290200 00000000 76290200 00000000 f)......v)......\n- 0x36b44790 86290200 00000000 96290200 00000000 .).......)......\n- 0x36b447a0 a6290200 00000000 b6290200 00000000 .).......)......\n- 0x36b447b0 c6290200 00000000 d6290200 00000000 .).......)......\n- 0x36b447c0 e6290200 00000000 f6290200 00000000 .).......)......\n- 0x36b447d0 062a0200 00000000 162a0200 00000000 .*.......*......\n- 0x36b447e0 262a0200 00000000 362a0200 00000000 &*......6*......\n- 0x36b447f0 462a0200 00000000 562a0200 00000000 F*......V*......\n- 0x36b44800 662a0200 00000000 762a0200 00000000 f*......v*......\n- 0x36b44810 862a0200 00000000 962a0200 00000000 .*.......*......\n- 0x36b44820 a62a0200 00000000 b62a0200 00000000 .*.......*......\n- 0x36b44830 c62a0200 00000000 d62a0200 00000000 .*.......*......\n- 0x36b44840 e62a0200 00000000 f62a0200 00000000 .*.......*......\n- 0x36b44850 062b0200 00000000 162b0200 00000000 .+.......+......\n- 0x36b44860 262b0200 00000000 362b0200 00000000 &+......6+......\n- 0x36b44870 462b0200 00000000 562b0200 00000000 F+......V+......\n- 0x36b44880 662b0200 00000000 762b0200 00000000 f+......v+......\n- 0x36b44890 862b0200 00000000 962b0200 00000000 .+.......+......\n- 0x36b448a0 a62b0200 00000000 b62b0200 00000000 .+.......+......\n- 0x36b448b0 c62b0200 00000000 d62b0200 00000000 .+.......+......\n- 0x36b448c0 e62b0200 00000000 f62b0200 00000000 .+.......+......\n- 0x36b448d0 062c0200 00000000 162c0200 00000000 .,.......,......\n- 0x36b448e0 262c0200 00000000 362c0200 00000000 &,......6,......\n- 0x36b448f0 462c0200 00000000 562c0200 00000000 F,......V,......\n- 0x36b44900 662c0200 00000000 762c0200 00000000 f,......v,......\n- 0x36b44910 862c0200 00000000 962c0200 00000000 .,.......,......\n- 0x36b44920 a62c0200 00000000 b62c0200 00000000 .,.......,......\n- 0x36b44930 c62c0200 00000000 d62c0200 00000000 .,.......,......\n- 0x36b44940 e62c0200 00000000 f62c0200 00000000 .,.......,......\n- 0x36b44950 062d0200 00000000 162d0200 00000000 .-.......-......\n- 0x36b44960 262d0200 00000000 362d0200 00000000 &-......6-......\n- 0x36b44970 462d0200 00000000 562d0200 00000000 F-......V-......\n- 0x36b44980 662d0200 00000000 762d0200 00000000 f-......v-......\n- 0x36b44990 862d0200 00000000 962d0200 00000000 .-.......-......\n- 0x36b449a0 a62d0200 00000000 b62d0200 00000000 .-.......-......\n- 0x36b449b0 c62d0200 00000000 d62d0200 00000000 .-.......-......\n- 0x36b449c0 e62d0200 00000000 f62d0200 00000000 .-.......-......\n- 0x36b449d0 062e0200 00000000 162e0200 00000000 ................\n- 0x36b449e0 262e0200 00000000 362e0200 00000000 &.......6.......\n- 0x36b449f0 462e0200 00000000 562e0200 00000000 F.......V.......\n- 0x36b44a00 662e0200 00000000 762e0200 00000000 f.......v.......\n- 0x36b44a10 862e0200 00000000 962e0200 00000000 ................\n- 0x36b44a20 a62e0200 00000000 b62e0200 00000000 ................\n- 0x36b44a30 c62e0200 00000000 d62e0200 00000000 ................\n- 0x36b44a40 e62e0200 00000000 f62e0200 00000000 ................\n- 0x36b44a50 062f0200 00000000 162f0200 00000000 ./......./......\n- 0x36b44a60 262f0200 00000000 362f0200 00000000 &/......6/......\n- 0x36b44a70 462f0200 00000000 562f0200 00000000 F/......V/......\n- 0x36b44a80 662f0200 00000000 762f0200 00000000 f/......v/......\n- 0x36b44a90 862f0200 00000000 962f0200 00000000 ./......./......\n- 0x36b44aa0 a62f0200 00000000 b62f0200 00000000 ./......./......\n- 0x36b44ab0 c62f0200 00000000 d62f0200 00000000 ./......./......\n- 0x36b44ac0 e62f0200 00000000 f62f0200 00000000 ./......./......\n- 0x36b44ad0 06300200 00000000 16300200 00000000 .0.......0......\n- 0x36b44ae0 26300200 00000000 36300200 00000000 &0......60......\n- 0x36b44af0 46300200 00000000 56300200 00000000 F0......V0......\n- 0x36b44b00 66300200 00000000 76300200 00000000 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00000000 F2......V2......\n- 0x36b44c00 66320200 00000000 76320200 00000000 f2......v2......\n- 0x36b44c10 86320200 00000000 96320200 00000000 .2.......2......\n- 0x36b44c20 a6320200 00000000 b6320200 00000000 .2.......2......\n- 0x36b44c30 c6320200 00000000 d6320200 00000000 .2.......2......\n- 0x36b44c40 e6320200 00000000 f6320200 00000000 .2.......2......\n- 0x36b44c50 06330200 00000000 16330200 00000000 .3.......3......\n- 0x36b44c60 26330200 00000000 36330200 00000000 &3......63......\n- 0x36b44c70 46330200 00000000 56330200 00000000 F3......V3......\n- 0x36b44c80 66330200 00000000 76330200 00000000 f3......v3......\n- 0x36b44c90 86330200 00000000 96330200 00000000 .3.......3......\n- 0x36b44ca0 a6330200 00000000 b6330200 00000000 .3.......3......\n- 0x36b44cb0 c6330200 00000000 d6330200 00000000 .3.......3......\n- 0x36b44cc0 e6330200 00000000 f6330200 00000000 .3.......3......\n- 0x36b44cd0 06340200 00000000 16340200 00000000 .4.......4......\n- 0x36b44ce0 26340200 00000000 36340200 00000000 &4......64......\n- 0x36b44cf0 46340200 00000000 56340200 00000000 F4......V4......\n- 0x36b44d00 66340200 00000000 76340200 00000000 f4......v4......\n- 0x36b44d10 86340200 00000000 96340200 00000000 .4.......4......\n- 0x36b44d20 a6340200 00000000 b6340200 00000000 .4.......4......\n- 0x36b44d30 c6340200 00000000 d6340200 00000000 .4.......4......\n- 0x36b44d40 e6340200 00000000 f6340200 00000000 .4.......4......\n- 0x36b44d50 06350200 00000000 16350200 00000000 .5.......5......\n- 0x36b44d60 26350200 00000000 36350200 00000000 &5......65......\n- 0x36b44d70 46350200 00000000 56350200 00000000 F5......V5......\n- 0x36b44d80 66350200 00000000 76350200 00000000 f5......v5......\n- 0x36b44d90 86350200 00000000 96350200 00000000 .5.......5......\n- 0x36b44da0 a6350200 00000000 b6350200 00000000 .5.......5......\n- 0x36b44db0 c6350200 00000000 d6350200 00000000 .5.......5......\n- 0x36b44dc0 e6350200 00000000 f6350200 00000000 .5.......5......\n- 0x36b44dd0 06360200 00000000 16360200 00000000 .6.......6......\n- 0x36b44de0 26360200 00000000 36360200 00000000 &6......66......\n- 0x36b44df0 46360200 00000000 56360200 00000000 F6......V6......\n- 0x36b44e00 66360200 00000000 76360200 00000000 f6......v6......\n- 0x36b44e10 86360200 00000000 96360200 00000000 .6.......6......\n- 0x36b44e20 a6360200 00000000 b6360200 00000000 .6.......6......\n- 0x36b44e30 c6360200 00000000 d6360200 00000000 .6.......6......\n- 0x36b44e40 e6360200 00000000 f6360200 00000000 .6.......6......\n- 0x36b44e50 06370200 00000000 16370200 00000000 .7.......7......\n- 0x36b44e60 26370200 00000000 36370200 00000000 &7......67......\n- 0x36b44e70 46370200 00000000 56370200 00000000 F7......V7......\n- 0x36b44e80 66370200 00000000 76370200 00000000 f7......v7......\n- 0x36b44e90 86370200 00000000 96370200 00000000 .7.......7......\n- 0x36b44ea0 a6370200 00000000 b6370200 00000000 .7.......7......\n- 0x36b44eb0 c6370200 00000000 d6370200 00000000 .7.......7......\n- 0x36b44ec0 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0x36b44fb0 00000000 00000000 00000000 00000000 ................\n- 0x36b44fc0 00000000 00000000 00000000 00000000 ................\n- 0x36b44fd0 00000000 00000000 00000000 00000000 ................\n- 0x36b44fe0 00000000 00000000 00000000 00000000 ................\n- 0x36b44ff0 00000000 00000000 00000000 00000000 ................\n+ 0x36b452d0 9050b436 00000000 00000000 00000000 .P.6............\n+ 0x36b452e0 00000000 00000000 36200200 00000000 ........6 ......\n+ 0x36b452f0 46200200 00000000 56200200 00000000 F ......V ......\n+ 0x36b45300 66200200 00000000 76200200 00000000 f ......v ......\n+ 0x36b45310 86200200 00000000 96200200 00000000 . ....... ......\n+ 0x36b45320 a6200200 00000000 b6200200 00000000 . ....... ......\n+ 0x36b45330 c6200200 00000000 d6200200 00000000 . ....... ......\n+ 0x36b45340 e6200200 00000000 f6200200 00000000 . ....... ......\n+ 0x36b45350 06210200 00000000 16210200 00000000 .!.......!......\n+ 0x36b45360 26210200 00000000 36210200 00000000 &!......6!......\n+ 0x36b45370 46210200 00000000 56210200 00000000 F!......V!......\n+ 0x36b45380 66210200 00000000 76210200 00000000 f!......v!......\n+ 0x36b45390 86210200 00000000 96210200 00000000 .!.......!......\n+ 0x36b453a0 a6210200 00000000 b6210200 00000000 .!.......!......\n+ 0x36b453b0 c6210200 00000000 d6210200 00000000 .!.......!......\n+ 0x36b453c0 e6210200 00000000 f6210200 00000000 .!.......!......\n+ 0x36b453d0 06220200 00000000 16220200 00000000 .\".......\"......\n+ 0x36b453e0 26220200 00000000 36220200 00000000 &\"......6\"......\n+ 0x36b453f0 46220200 00000000 56220200 00000000 F\"......V\"......\n+ 0x36b45400 66220200 00000000 76220200 00000000 f\"......v\"......\n+ 0x36b45410 86220200 00000000 96220200 00000000 .\".......\"......\n+ 0x36b45420 a6220200 00000000 b6220200 00000000 .\".......\"......\n+ 0x36b45430 c6220200 00000000 d6220200 00000000 .\".......\"......\n+ 0x36b45440 e6220200 00000000 f6220200 00000000 .\".......\"......\n+ 0x36b45450 06230200 00000000 16230200 00000000 .#.......#......\n+ 0x36b45460 26230200 00000000 36230200 00000000 &#......6#......\n+ 0x36b45470 46230200 00000000 56230200 00000000 F#......V#......\n+ 0x36b45480 66230200 00000000 76230200 00000000 f#......v#......\n+ 0x36b45490 86230200 00000000 96230200 00000000 .#.......#......\n+ 0x36b454a0 a6230200 00000000 b6230200 00000000 .#.......#......\n+ 0x36b454b0 c6230200 00000000 d6230200 00000000 .#.......#......\n+ 0x36b454c0 e6230200 00000000 f6230200 00000000 .#.......#......\n+ 0x36b454d0 06240200 00000000 16240200 00000000 .$.......$......\n+ 0x36b454e0 26240200 00000000 36240200 00000000 &$......6$......\n+ 0x36b454f0 46240200 00000000 56240200 00000000 F$......V$......\n+ 0x36b45500 66240200 00000000 76240200 00000000 f$......v$......\n+ 0x36b45510 86240200 00000000 96240200 00000000 .$.......$......\n+ 0x36b45520 a6240200 00000000 b6240200 00000000 .$.......$......\n+ 0x36b45530 c6240200 00000000 d6240200 00000000 .$.......$......\n+ 0x36b45540 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00000000 f*......v*......\n+ 0x36b45810 862a0200 00000000 962a0200 00000000 .*.......*......\n+ 0x36b45820 a62a0200 00000000 b62a0200 00000000 .*.......*......\n+ 0x36b45830 c62a0200 00000000 d62a0200 00000000 .*.......*......\n+ 0x36b45840 e62a0200 00000000 f62a0200 00000000 .*.......*......\n+ 0x36b45850 062b0200 00000000 162b0200 00000000 .+.......+......\n+ 0x36b45860 262b0200 00000000 362b0200 00000000 &+......6+......\n+ 0x36b45870 462b0200 00000000 562b0200 00000000 F+......V+......\n+ 0x36b45880 662b0200 00000000 762b0200 00000000 f+......v+......\n+ 0x36b45890 862b0200 00000000 962b0200 00000000 .+.......+......\n+ 0x36b458a0 a62b0200 00000000 b62b0200 00000000 .+.......+......\n+ 0x36b458b0 c62b0200 00000000 d62b0200 00000000 .+.......+......\n+ 0x36b458c0 e62b0200 00000000 f62b0200 00000000 .+.......+......\n+ 0x36b458d0 062c0200 00000000 162c0200 00000000 .,.......,......\n+ 0x36b458e0 262c0200 00000000 362c0200 00000000 &,......6,......\n+ 0x36b458f0 462c0200 00000000 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00000000 362e0200 00000000 &.......6.......\n+ 0x36b459f0 462e0200 00000000 562e0200 00000000 F.......V.......\n+ 0x36b45a00 662e0200 00000000 762e0200 00000000 f.......v.......\n+ 0x36b45a10 862e0200 00000000 962e0200 00000000 ................\n+ 0x36b45a20 a62e0200 00000000 b62e0200 00000000 ................\n+ 0x36b45a30 c62e0200 00000000 d62e0200 00000000 ................\n+ 0x36b45a40 e62e0200 00000000 f62e0200 00000000 ................\n+ 0x36b45a50 062f0200 00000000 162f0200 00000000 ./......./......\n+ 0x36b45a60 262f0200 00000000 362f0200 00000000 &/......6/......\n+ 0x36b45a70 462f0200 00000000 562f0200 00000000 F/......V/......\n+ 0x36b45a80 662f0200 00000000 762f0200 00000000 f/......v/......\n+ 0x36b45a90 862f0200 00000000 962f0200 00000000 ./......./......\n+ 0x36b45aa0 a62f0200 00000000 b62f0200 00000000 ./......./......\n+ 0x36b45ab0 c62f0200 00000000 d62f0200 00000000 ./......./......\n+ 0x36b45ac0 e62f0200 00000000 f62f0200 00000000 ./......./......\n+ 0x36b45ad0 06300200 00000000 16300200 00000000 .0.......0......\n+ 0x36b45ae0 26300200 00000000 36300200 00000000 &0......60......\n+ 0x36b45af0 46300200 00000000 56300200 00000000 F0......V0......\n+ 0x36b45b00 66300200 00000000 76300200 00000000 f0......v0......\n+ 0x36b45b10 86300200 00000000 96300200 00000000 .0.......0......\n+ 0x36b45b20 a6300200 00000000 b6300200 00000000 .0.......0......\n+ 0x36b45b30 c6300200 00000000 d6300200 00000000 .0.......0......\n+ 0x36b45b40 e6300200 00000000 f6300200 00000000 .0.......0......\n+ 0x36b45b50 06310200 00000000 16310200 00000000 .1.......1......\n+ 0x36b45b60 26310200 00000000 36310200 00000000 &1......61......\n+ 0x36b45b70 46310200 00000000 56310200 00000000 F1......V1......\n+ 0x36b45b80 66310200 00000000 76310200 00000000 f1......v1......\n+ 0x36b45b90 86310200 00000000 96310200 00000000 .1.......1......\n+ 0x36b45ba0 a6310200 00000000 b6310200 00000000 .1.......1......\n+ 0x36b45bb0 c6310200 00000000 d6310200 00000000 .1.......1......\n+ 0x36b45bc0 e6310200 00000000 f6310200 00000000 .1.......1......\n+ 0x36b45bd0 06320200 00000000 16320200 00000000 .2.......2......\n+ 0x36b45be0 26320200 00000000 36320200 00000000 &2......62......\n+ 0x36b45bf0 46320200 00000000 56320200 00000000 F2......V2......\n+ 0x36b45c00 66320200 00000000 76320200 00000000 f2......v2......\n+ 0x36b45c10 86320200 00000000 96320200 00000000 .2.......2......\n+ 0x36b45c20 a6320200 00000000 b6320200 00000000 .2.......2......\n+ 0x36b45c30 c6320200 00000000 d6320200 00000000 .2.......2......\n+ 0x36b45c40 e6320200 00000000 f6320200 00000000 .2.......2......\n+ 0x36b45c50 06330200 00000000 16330200 00000000 .3.......3......\n+ 0x36b45c60 26330200 00000000 36330200 00000000 &3......63......\n+ 0x36b45c70 46330200 00000000 56330200 00000000 F3......V3......\n+ 0x36b45c80 66330200 00000000 76330200 00000000 f3......v3......\n+ 0x36b45c90 86330200 00000000 96330200 00000000 .3.......3......\n+ 0x36b45ca0 a6330200 00000000 b6330200 00000000 .3.......3......\n+ 0x36b45cb0 c6330200 00000000 d6330200 00000000 .3.......3......\n+ 0x36b45cc0 e6330200 00000000 f6330200 00000000 .3.......3......\n+ 0x36b45cd0 06340200 00000000 16340200 00000000 .4.......4......\n+ 0x36b45ce0 26340200 00000000 36340200 00000000 &4......64......\n+ 0x36b45cf0 46340200 00000000 56340200 00000000 F4......V4......\n+ 0x36b45d00 66340200 00000000 76340200 00000000 f4......v4......\n+ 0x36b45d10 86340200 00000000 96340200 00000000 .4.......4......\n+ 0x36b45d20 a6340200 00000000 b6340200 00000000 .4.......4......\n+ 0x36b45d30 c6340200 00000000 d6340200 00000000 .4.......4......\n+ 0x36b45d40 e6340200 00000000 f6340200 00000000 .4.......4......\n+ 0x36b45d50 06350200 00000000 16350200 00000000 .5.......5......\n+ 0x36b45d60 26350200 00000000 36350200 00000000 &5......65......\n+ 0x36b45d70 46350200 00000000 56350200 00000000 F5......V5......\n+ 0x36b45d80 66350200 00000000 76350200 00000000 f5......v5......\n+ 0x36b45d90 86350200 00000000 96350200 00000000 .5.......5......\n+ 0x36b45da0 a6350200 00000000 b6350200 00000000 .5.......5......\n+ 0x36b45db0 c6350200 00000000 d6350200 00000000 .5.......5......\n+ 0x36b45dc0 e6350200 00000000 f6350200 00000000 .5.......5......\n+ 0x36b45dd0 06360200 00000000 16360200 00000000 .6.......6......\n+ 0x36b45de0 26360200 00000000 36360200 00000000 &6......66......\n+ 0x36b45df0 46360200 00000000 56360200 00000000 F6......V6......\n+ 0x36b45e00 66360200 00000000 76360200 00000000 f6......v6......\n+ 0x36b45e10 86360200 00000000 96360200 00000000 .6.......6......\n+ 0x36b45e20 a6360200 00000000 b6360200 00000000 .6.......6......\n+ 0x36b45e30 c6360200 00000000 d6360200 00000000 .6.......6......\n+ 0x36b45e40 e6360200 00000000 f6360200 00000000 .6.......6......\n+ 0x36b45e50 06370200 00000000 16370200 00000000 .7.......7......\n+ 0x36b45e60 26370200 00000000 36370200 00000000 &7......67......\n+ 0x36b45e70 46370200 00000000 56370200 00000000 F7......V7......\n+ 0x36b45e80 66370200 00000000 76370200 00000000 f7......v7......\n+ 0x36b45e90 86370200 00000000 96370200 00000000 .7.......7......\n+ 0x36b45ea0 a6370200 00000000 b6370200 00000000 .7.......7......\n+ 0x36b45eb0 c6370200 00000000 d6370200 00000000 .7.......7......\n+ 0x36b45ec0 e6370200 00000000 f6370200 00000000 .7.......7......\n+ 0x36b45ed0 06380200 00000000 16380200 00000000 .8.......8......\n+ 0x36b45ee0 26380200 00000000 36380200 00000000 &8......68......\n+ 0x36b45ef0 46380200 00000000 56380200 00000000 F8......V8......\n+ 0x36b45f00 66380200 00000000 76380200 00000000 f8......v8......\n+ 0x36b45f10 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f20 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f30 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f40 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f50 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f60 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f70 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f80 00000000 00000000 00000000 00000000 ................\n+ 0x36b45f90 00000000 00000000 00000000 00000000 ................\n+ 0x36b45fa0 00000000 00000000 00000000 00000000 ................\n+ 0x36b45fb0 00000000 00000000 00000000 00000000 ................\n+ 0x36b45fc0 00000000 00000000 00000000 00000000 ................\n+ 0x36b45fd0 00000000 00000000 00000000 00000000 ................\n+ 0x36b45fe0 00000000 00000000 00000000 00000000 ................\n+ 0x36b45ff0 00000000 00000000 00000000 00000000 ................\n \n"}, {"source1": "readelf --wide --decompress --hex-dump=.data {}", "source2": "readelf --wide --decompress --hex-dump=.data {}", "unified_diff": "@@ -1,5 +1,5 @@\n \n Hex dump of section '.data':\n- 0x36b45000 0050b436 00000000 00000000 00000000 .P.6............\n- 0x36b45010 2cdde81c 65b36573 6a128861 1cc9dc25 ,...e.esj..a...%\n+ 0x36b46000 0060b436 00000000 00000000 00000000 .`.6............\n+ 0x36b46010 2cdde81c 65b36573 6a128861 1cc9dc25 ,...e.esj..a...%\n \n"}, {"source1": "readelf --wide --decompress --hex-dump=.hipFatBinSegment {}", "source2": "readelf --wide --decompress --hex-dump=.hipFatBinSegment {}", "unified_diff": "@@ -1,134 +1,134 @@\n \n Hex dump of section '.hipFatBinSegment':\n- 0x36b45020 46504948 01000000 00003100 00000000 FPIH......1.....\n- 0x36b45030 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45040 00503700 00000000 00000000 00000000 .P7.............\n- 0x36b45050 46504948 01000000 00003d00 00000000 FPIH......=.....\n- 0x36b45060 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45070 00504300 00000000 00000000 00000000 .PC.............\n- 0x36b45080 46504948 01000000 00a04900 00000000 FPIH......I.....\n- 0x36b45090 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b450a0 00006d00 00000000 00000000 00000000 ..m.............\n- 0x36b450b0 46504948 01000000 00507300 00000000 FPIH.....Ps.....\n- 0x36b450c0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b450d0 00207c00 00000000 00000000 00000000 . |.............\n- 0x36b450e0 46504948 01000000 00708200 00000000 FPIH.....p......\n- 0x36b450f0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45100 00008a00 00000000 00000000 00000000 ................\n- 0x36b45110 46504948 01000000 00909000 00000000 FPIH............\n- 0x36b45120 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45130 0000b000 00000000 00000000 00000000 ................\n- 0x36b45140 46504948 01000000 00f0b500 00000000 FPIH............\n- 0x36b45150 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45160 00a0d200 00000000 00000000 00000000 ................\n- 0x36b45170 46504948 01000000 00c0db00 00000000 FPIH............\n- 0x36b45180 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45190 00b0e100 00000000 00000000 00000000 ................\n- 0x36b451a0 46504948 01000000 00301e01 00000000 FPIH.....0......\n- 0x36b451b0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b451c0 00405401 00000000 00000000 00000000 .@T.............\n- 0x36b451d0 46504948 01000000 00e0f801 00000000 FPIH............\n- 0x36b451e0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b451f0 00801602 00000000 00000000 00000000 ................\n- 0x36b45200 46504948 01000000 00d01c02 00000000 FPIH............\n- 0x36b45210 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45220 00503f02 00000000 00000000 00000000 .P?.............\n- 0x36b45230 46504948 01000000 00804702 00000000 FPIH......G.....\n- 0x36b45240 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45250 00d04d02 00000000 00000000 00000000 ..M.............\n- 0x36b45260 46504948 01000000 00f0da03 00000000 FPIH............\n- 0x36b45270 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45280 0080b505 00000000 00000000 00000000 ................\n- 0x36b45290 46504948 01000000 0010c405 00000000 FPIH............\n- 0x36b452a0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b452b0 00d0c905 00000000 00000000 00000000 ................\n- 0x36b452c0 46504948 01000000 0020d005 00000000 FPIH..... ......\n- 0x36b452d0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b452e0 0070d605 00000000 00000000 00000000 .p..............\n- 0x36b452f0 46504948 01000000 00e0e005 00000000 FPIH............\n- 0x36b45300 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45310 00c01206 00000000 00000000 00000000 ................\n- 0x36b45320 46504948 01000000 00701806 00000000 FPIH.....p......\n- 0x36b45330 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45340 00604006 00000000 00000000 00000000 .`@.............\n- 0x36b45350 46504948 01000000 00504a06 00000000 FPIH.....PJ.....\n- 0x36b45360 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45370 00405506 00000000 00000000 00000000 .@U.............\n- 0x36b45380 46504948 01000000 00905b06 00000000 FPIH......[.....\n- 0x36b45390 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b453a0 00e06106 00000000 00000000 00000000 ..a.............\n- 0x36b453b0 46504948 01000000 00a07906 00000000 FPIH......y.....\n- 0x36b453c0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b453d0 00308106 00000000 00000000 00000000 .0..............\n- 0x36b453e0 46504948 01000000 0020b906 00000000 FPIH..... ......\n- 0x36b453f0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45400 0050c706 00000000 00000000 00000000 .P..............\n- 0x36b45410 46504948 01000000 00a0fc06 00000000 FPIH............\n- 0x36b45420 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45430 00f03107 00000000 00000000 00000000 ..1.............\n- 0x36b45440 46504948 01000000 00406707 00000000 FPIH.....@g.....\n- 0x36b45450 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45460 00909c07 00000000 00000000 00000000 ................\n- 0x36b45470 46504948 01000000 00c0aa07 00000000 FPIH............\n- 0x36b45480 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45490 0010e007 00000000 00000000 00000000 ................\n- 0x36b454a0 46504948 01000000 00601508 00000000 FPIH.....`......\n- 0x36b454b0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b454c0 00b04a08 00000000 00000000 00000000 ..J.............\n- 0x36b454d0 46504948 01000000 00008008 00000000 FPIH............\n- 0x36b454e0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b454f0 00308e08 00000000 00000000 00000000 .0..............\n- 0x36b45500 46504948 01000000 0080c308 00000000 FPIH............\n- 0x36b45510 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45520 00d0f808 00000000 00000000 00000000 ................\n- 0x36b45530 46504948 01000000 00202e09 00000000 FPIH..... ......\n- 0x36b45540 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45550 00706309 00000000 00000000 00000000 .pc.............\n- 0x36b45560 46504948 01000000 00c09809 00000000 FPIH............\n- 0x36b45570 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45580 0010ce09 00000000 00000000 00000000 ................\n- 0x36b45590 46504948 01000000 0060030a 00000000 FPIH.....`......\n- 0x36b455a0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b455b0 00b0380a 00000000 00000000 00000000 ..8.............\n- 0x36b455c0 46504948 01000000 00f0e40b 00000000 FPIH............\n- 0x36b455d0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b455e0 00500a0e 00000000 00000000 00000000 .P..............\n- 0x36b455f0 46504948 01000000 00400110 00000000 FPIH.....@......\n- 0x36b45600 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45610 0000e811 00000000 00000000 00000000 ................\n- 0x36b45620 46504948 01000000 0010e013 00000000 FPIH............\n- 0x36b45630 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45640 0050a815 00000000 00000000 00000000 .P..............\n- 0x36b45650 46504948 01000000 00e05b17 00000000 FPIH......[.....\n- 0x36b45660 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45670 00e02419 00000000 00000000 00000000 ..$.............\n- 0x36b45680 46504948 01000000 00a07e1d 00000000 FPIH......~.....\n- 0x36b45690 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b456a0 00505c1f 00000000 00000000 00000000 .P\\.............\n- 0x36b456b0 46504948 01000000 0030fc20 00000000 FPIH.....0. ....\n- 0x36b456c0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b456d0 0000a922 00000000 00000000 00000000 ...\"............\n- 0x36b456e0 46504948 01000000 00202625 00000000 FPIH..... &%....\n- 0x36b456f0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45700 00f0e226 00000000 00000000 00000000 ...&............\n- 0x36b45710 46504948 01000000 00d09228 00000000 FPIH.......(....\n- 0x36b45720 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45730 0030f12a 00000000 00000000 00000000 .0.*............\n- 0x36b45740 46504948 01000000 0030972d 00000000 FPIH.....0.-....\n- 0x36b45750 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45760 0070222f 00000000 00000000 00000000 .p\"/............\n- 0x36b45770 46504948 01000000 00701230 00000000 FPIH.....p.0....\n- 0x36b45780 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45790 0070e930 00000000 00000000 00000000 .p.0............\n- 0x36b457a0 46504948 01000000 00a0c731 00000000 FPIH.......1....\n- 0x36b457b0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b457c0 00009832 00000000 00000000 00000000 ...2............\n- 0x36b457d0 46504948 01000000 00305c33 00000000 FPIH.....0\\3....\n- 0x36b457e0 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b457f0 00604434 00000000 00000000 00000000 .`D4............\n- 0x36b45800 46504948 01000000 0000b034 00000000 FPIH.......4....\n- 0x36b45810 00000000 00000000 46504948 01000000 ........FPIH....\n- 0x36b45820 00706935 00000000 00000000 00000000 .pi5............\n- 0x36b45830 46504948 01000000 00c04936 00000000 FPIH......I6....\n- 0x36b45840 00000000 00000000 ........\n+ 0x36b46020 46504948 01000000 00003100 00000000 FPIH......1.....\n+ 0x36b46030 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46040 00503700 00000000 00000000 00000000 .P7.............\n+ 0x36b46050 46504948 01000000 00003d00 00000000 FPIH......=.....\n+ 0x36b46060 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46070 00504300 00000000 00000000 00000000 .PC.............\n+ 0x36b46080 46504948 01000000 00a04900 00000000 FPIH......I.....\n+ 0x36b46090 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b460a0 00006d00 00000000 00000000 00000000 ..m.............\n+ 0x36b460b0 46504948 01000000 00507300 00000000 FPIH.....Ps.....\n+ 0x36b460c0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b460d0 00207c00 00000000 00000000 00000000 . |.............\n+ 0x36b460e0 46504948 01000000 00708200 00000000 FPIH.....p......\n+ 0x36b460f0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46100 00008a00 00000000 00000000 00000000 ................\n+ 0x36b46110 46504948 01000000 00909000 00000000 FPIH............\n+ 0x36b46120 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46130 0000b000 00000000 00000000 00000000 ................\n+ 0x36b46140 46504948 01000000 00f0b500 00000000 FPIH............\n+ 0x36b46150 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46160 00a0d200 00000000 00000000 00000000 ................\n+ 0x36b46170 46504948 01000000 00c0db00 00000000 FPIH............\n+ 0x36b46180 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46190 00b0e100 00000000 00000000 00000000 ................\n+ 0x36b461a0 46504948 01000000 00301e01 00000000 FPIH.....0......\n+ 0x36b461b0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b461c0 00405401 00000000 00000000 00000000 .@T.............\n+ 0x36b461d0 46504948 01000000 00e0f801 00000000 FPIH............\n+ 0x36b461e0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b461f0 00801602 00000000 00000000 00000000 ................\n+ 0x36b46200 46504948 01000000 00d01c02 00000000 FPIH............\n+ 0x36b46210 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46220 00503f02 00000000 00000000 00000000 .P?.............\n+ 0x36b46230 46504948 01000000 00804702 00000000 FPIH......G.....\n+ 0x36b46240 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46250 00d04d02 00000000 00000000 00000000 ..M.............\n+ 0x36b46260 46504948 01000000 00f0da03 00000000 FPIH............\n+ 0x36b46270 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46280 0080b505 00000000 00000000 00000000 ................\n+ 0x36b46290 46504948 01000000 0010c405 00000000 FPIH............\n+ 0x36b462a0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b462b0 00d0c905 00000000 00000000 00000000 ................\n+ 0x36b462c0 46504948 01000000 0020d005 00000000 FPIH..... ......\n+ 0x36b462d0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b462e0 0070d605 00000000 00000000 00000000 .p..............\n+ 0x36b462f0 46504948 01000000 00e0e005 00000000 FPIH............\n+ 0x36b46300 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46310 00c01206 00000000 00000000 00000000 ................\n+ 0x36b46320 46504948 01000000 00701806 00000000 FPIH.....p......\n+ 0x36b46330 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46340 00604006 00000000 00000000 00000000 .`@.............\n+ 0x36b46350 46504948 01000000 00504a06 00000000 FPIH.....PJ.....\n+ 0x36b46360 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46370 00405506 00000000 00000000 00000000 .@U.............\n+ 0x36b46380 46504948 01000000 00905b06 00000000 FPIH......[.....\n+ 0x36b46390 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b463a0 00e06106 00000000 00000000 00000000 ..a.............\n+ 0x36b463b0 46504948 01000000 00a07906 00000000 FPIH......y.....\n+ 0x36b463c0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b463d0 00308106 00000000 00000000 00000000 .0..............\n+ 0x36b463e0 46504948 01000000 0020b906 00000000 FPIH..... ......\n+ 0x36b463f0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46400 0050c706 00000000 00000000 00000000 .P..............\n+ 0x36b46410 46504948 01000000 00a0fc06 00000000 FPIH............\n+ 0x36b46420 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46430 00f03107 00000000 00000000 00000000 ..1.............\n+ 0x36b46440 46504948 01000000 00406707 00000000 FPIH.....@g.....\n+ 0x36b46450 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46460 00909c07 00000000 00000000 00000000 ................\n+ 0x36b46470 46504948 01000000 00c0aa07 00000000 FPIH............\n+ 0x36b46480 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46490 0010e007 00000000 00000000 00000000 ................\n+ 0x36b464a0 46504948 01000000 00601508 00000000 FPIH.....`......\n+ 0x36b464b0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b464c0 00b04a08 00000000 00000000 00000000 ..J.............\n+ 0x36b464d0 46504948 01000000 00008008 00000000 FPIH............\n+ 0x36b464e0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b464f0 00308e08 00000000 00000000 00000000 .0..............\n+ 0x36b46500 46504948 01000000 0080c308 00000000 FPIH............\n+ 0x36b46510 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46520 00d0f808 00000000 00000000 00000000 ................\n+ 0x36b46530 46504948 01000000 00202e09 00000000 FPIH..... ......\n+ 0x36b46540 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46550 00706309 00000000 00000000 00000000 .pc.............\n+ 0x36b46560 46504948 01000000 00c09809 00000000 FPIH............\n+ 0x36b46570 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46580 0010ce09 00000000 00000000 00000000 ................\n+ 0x36b46590 46504948 01000000 0060030a 00000000 FPIH.....`......\n+ 0x36b465a0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b465b0 00b0380a 00000000 00000000 00000000 ..8.............\n+ 0x36b465c0 46504948 01000000 0000e50b 00000000 FPIH............\n+ 0x36b465d0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b465e0 00600a0e 00000000 00000000 00000000 .`..............\n+ 0x36b465f0 46504948 01000000 00500110 00000000 FPIH.....P......\n+ 0x36b46600 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46610 0020e811 00000000 00000000 00000000 . ..............\n+ 0x36b46620 46504948 01000000 0020e013 00000000 FPIH..... ......\n+ 0x36b46630 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46640 0060a815 00000000 00000000 00000000 .`..............\n+ 0x36b46650 46504948 01000000 00f05b17 00000000 FPIH......[.....\n+ 0x36b46660 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46670 00f02419 00000000 00000000 00000000 ..$.............\n+ 0x36b46680 46504948 01000000 00b07e1d 00000000 FPIH......~.....\n+ 0x36b46690 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b466a0 00605c1f 00000000 00000000 00000000 .`\\.............\n+ 0x36b466b0 46504948 01000000 0040fc20 00000000 FPIH.....@. ....\n+ 0x36b466c0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b466d0 0010a922 00000000 00000000 00000000 ...\"............\n+ 0x36b466e0 46504948 01000000 00302625 00000000 FPIH.....0&%....\n+ 0x36b466f0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46700 0000e326 00000000 00000000 00000000 ...&............\n+ 0x36b46710 46504948 01000000 00e09228 00000000 FPIH.......(....\n+ 0x36b46720 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46730 0030f12a 00000000 00000000 00000000 .0.*............\n+ 0x36b46740 46504948 01000000 0040972d 00000000 FPIH.....@.-....\n+ 0x36b46750 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46760 0080222f 00000000 00000000 00000000 ..\"/............\n+ 0x36b46770 46504948 01000000 00801230 00000000 FPIH.......0....\n+ 0x36b46780 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46790 0080e930 00000000 00000000 00000000 ...0............\n+ 0x36b467a0 46504948 01000000 00b0c731 00000000 FPIH.......1....\n+ 0x36b467b0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b467c0 00109832 00000000 00000000 00000000 ...2............\n+ 0x36b467d0 46504948 01000000 00405c33 00000000 FPIH.....@\\3....\n+ 0x36b467e0 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b467f0 00704434 00000000 00000000 00000000 .pD4............\n+ 0x36b46800 46504948 01000000 0010b034 00000000 FPIH.......4....\n+ 0x36b46810 00000000 00000000 46504948 01000000 ........FPIH....\n+ 0x36b46820 00806935 00000000 00000000 00000000 ..i5............\n+ 0x36b46830 46504948 01000000 00d04936 00000000 FPIH......I6....\n+ 0x36b46840 00000000 00000000 ........\n \n"}, {"source1": "readelf --wide --decompress --hex-dump=.gnu_debuglink {}", "source2": "readelf --wide --decompress --hex-dump=.gnu_debuglink {}", "comments": ["error from `readelf --wide --decompress --hex-dump=.gnu_debuglink {}`:", "readelf: Error: no .dynamic section in the dynamic segment"], "unified_diff": "@@ -1,7 +1,7 @@\n \n Hex dump of section '.gnu_debuglink':\n- 0x00000000 63386164 38373436 62376232 38313931 c8ad8746b7b28191\n- 0x00000010 36643965 61396331 65363661 65636536 6d9ea9c1e66aece6\n- 0x00000020 63393432 34622e64 65627567 00000000 c9424b.debug....\n- 0x00000030 49567f9b IV..\n+ 0x00000000 63393865 36376435 39306234 63613764 c98e67d590b4ca7d\n+ 0x00000010 30356536 66633336 61373164 39363538 05e6fc36a71d9658\n+ 0x00000020 35376530 34342e64 65627567 00000000 57e044.debug....\n+ 0x00000030 b05848b5 .XH.\n \n"}]}]}]}]}, {"source1": "libggml0-backend-hip-dbgsym_0.0~git20250712.d62df60-5_amd64.deb", "source2": "libggml0-backend-hip-dbgsym_0.0~git20250712.d62df60-5_amd64.deb", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,3 +1,3 @@\n -rw-r--r-- 0 0 0 4 2025-09-09 17:17:03.000000 debian-binary\n -rw-r--r-- 0 0 0 612 2025-09-09 17:17:03.000000 control.tar.xz\n--rw-r--r-- 0 0 0 1861140 2025-09-09 17:17:03.000000 data.tar.xz\n+-rw-r--r-- 0 0 0 1861016 2025-09-09 17:17:03.000000 data.tar.xz\n"}, {"source1": "control.tar.xz", "source2": "control.tar.xz", "unified_diff": null, "details": [{"source1": "control.tar", "source2": "control.tar", "unified_diff": null, "details": [{"source1": "./control", "source2": "./control", "unified_diff": "@@ -6,9 +6,9 @@\n Maintainer: Debian Deep Learning Team \n Installed-Size: 2479\n Depends: libggml0-backend-hip (= 0.0~git20250712.d62df60-5)\n Section: debug\n Priority: optional\n Multi-Arch: same\n Description: debug symbols for libggml0-backend-hip\n-Build-Ids: 92c8ad8746b7b281916d9ea9c1e66aece6c9424b\n+Build-Ids: 7fc98e67d590b4ca7d05e6fc36a71d965857e044\n X-Rocm-Gpu-Architecture: gfx803 gfx900 gfx906 gfx908 gfx90a gfx1010 gfx1030 gfx1100 gfx1101 gfx1102\n"}, {"source1": "./md5sums", "source2": "./md5sums", "unified_diff": null, "details": [{"source1": "./md5sums", "source2": "./md5sums", "comments": ["Files differ"], "unified_diff": null}, {"source1": "line order", "source2": "line order", "unified_diff": "@@ -1 +1 @@\n-usr/lib/debug/.build-id/92/c8ad8746b7b281916d9ea9c1e66aece6c9424b.debug\n+usr/lib/debug/.build-id/7f/c98e67d590b4ca7d05e6fc36a71d965857e044.debug\n"}]}]}]}, {"source1": "data.tar.xz", "source2": "data.tar.xz", "unified_diff": null, "details": [{"source1": "data.tar", "source2": "data.tar", "unified_diff": null, "details": [{"source1": "file list", "source2": "file list", "unified_diff": "@@ -1,10 +1,10 @@\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/debug/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/debug/.build-id/\n-drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/debug/.build-id/92/\n--rw-r--r-- 0 root (0) root (0) 2527840 2025-09-09 17:17:03.000000 ./usr/lib/debug/.build-id/92/c8ad8746b7b281916d9ea9c1e66aece6c9424b.debug\n+drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/lib/debug/.build-id/7f/\n+-rw-r--r-- 0 root (0) root (0) 2527832 2025-09-09 17:17:03.000000 ./usr/lib/debug/.build-id/7f/c98e67d590b4ca7d05e6fc36a71d965857e044.debug\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/\n drwxr-xr-x 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/doc/\n lrwxrwxrwx 0 root (0) root (0) 0 2025-09-09 17:17:03.000000 ./usr/share/doc/libggml0-backend-hip-dbgsym -> libggml0-backend-hip\n"}, {"source1": "./usr/lib/debug/.build-id/92/c8ad8746b7b281916d9ea9c1e66aece6c9424b.debug", "source2": "./usr/lib/debug/.build-id/7f/c98e67d590b4ca7d05e6fc36a71d965857e044.debug", "comments": ["File has been modified after NT_GNU_BUILD_ID has been applied.", "Files 99% similar despite different names"], "unified_diff": null, "details": [{"source1": "readelf --wide --file-header {}", "source2": "readelf --wide --file-header {}", "unified_diff": "@@ -6,15 +6,15 @@\n OS/ABI: UNIX - System V\n ABI Version: 0\n Type: DYN (Shared object file)\n Machine: Advanced Micro Devices X86-64\n Version: 0x1\n Entry point address: 0x0\n Start of program headers: 64 (bytes into file)\n- Start of section headers: 2525280 (bytes into file)\n+ Start of section headers: 2525272 (bytes into file)\n Flags: 0x0\n Size of this header: 64 (bytes)\n Size of program headers: 56 (bytes)\n Number of program headers: 9\n Size of section headers: 64 (bytes)\n Number of section headers: 40\n Section header string table index: 39\n"}, {"source1": "readelf --wide --program-header {}", "source2": "readelf --wide --program-header {}", "unified_diff": "@@ -3,21 +3,21 @@\n Entry point 0x0\n There are 9 program headers, starting at offset 64\n \n Program Headers:\n Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align\n LOAD 0x000000 0x0000000000000000 0x0000000000000000 0x00025c 0x021990 R 0x1000\n LOAD 0x001000 0x0000000000022000 0x0000000000022000 0x000000 0x2b8579 R E 0x1000\n- LOAD 0x001000 0x00000000002db000 0x00000000002db000 0x000000 0x368195d4 R 0x1000\n- LOAD 0x000fd8 0x0000000036af5fd8 0x0000000036af5fd8 0x000000 0x050560 RW 0x1000\n- DYNAMIC 0x000fd8 0x0000000036b44090 0x0000000036b44090 0x000000 0x000240 RW 0x8\n+ LOAD 0x001000 0x00000000002db000 0x00000000002db000 0x000000 0x3681a5d4 R 0x1000\n+ LOAD 0x000fd8 0x0000000036af6fd8 0x0000000036af6fd8 0x000000 0x050560 RW 0x1000\n+ DYNAMIC 0x000fd8 0x0000000036b45090 0x0000000036b45090 0x000000 0x000240 RW 0x8\n NOTE 0x000238 0x0000000000000238 0x0000000000000238 0x000024 0x000024 R 0x4\n- GNU_EH_FRAME 0x001000 0x0000000036ae3d18 0x0000000036ae3d18 0x000000 0x006384 R 0x4\n+ GNU_EH_FRAME 0x001000 0x0000000036ae4d18 0x0000000036ae4d18 0x000000 0x006384 R 0x4\n GNU_STACK 0x000000 0x0000000000000000 0x0000000000000000 0x000000 0x000000 RW 0x10\n- GNU_RELRO 0x000fd8 0x0000000036af5fd8 0x0000000036af5fd8 0x000000 0x04f028 R 0x1\n+ GNU_RELRO 0x000fd8 0x0000000036af6fd8 0x0000000036af6fd8 0x000000 0x04f028 R 0x1\n \n Section to Segment mapping:\n Segment Sections...\n 00 .note.gnu.build-id .gnu.hash .dynsym .dynstr .gnu.version .gnu.version_r .rela.dyn .rela.plt \n 01 .init .plt .plt.got .text .fini \n 02 .rodata .hip_fatbin .eh_frame_hdr .gcc_except_table \n 03 .eh_frame .init_array .fini_array .data.rel.ro .dynamic .got .data .hipFatBinSegment .bss \n"}, {"source1": "readelf --wide --sections {}", "source2": "readelf --wide --sections {}", "unified_diff": "@@ -1,8 +1,8 @@\n-There are 40 section headers, starting at offset 0x268860:\n+There are 40 section headers, starting at offset 0x268858:\n \n Section Headers:\n [Nr] Name Type Address Off Size ES Flg Lk Inf Al\n [ 0] NULL 0000000000000000 000000 000000 00 0 0 0\n [ 1] .note.gnu.build-id NOTE 0000000000000238 000238 000024 00 A 0 0 4\n [ 2] .gnu.hash NOBITS 0000000000000260 00025c 000c8c 00 A 3 0 8\n [ 3] .dynsym NOBITS 0000000000000ef0 00025c 0032b8 18 A 4 1 8\n@@ -13,37 +13,37 @@\n [ 8] .rela.plt NOBITS 000000000001f518 00025c 002478 18 A 3 23 8\n [ 9] .init NOBITS 0000000000022000 001000 000017 00 AX 0 0 4\n [10] .plt NOBITS 0000000000022020 001000 001860 10 AX 0 0 16\n [11] .plt.got NOBITS 0000000000023880 001000 000018 08 AX 0 0 8\n [12] .text NOBITS 00000000000238a0 001000 2b6cd0 00 AX 0 0 16\n [13] .fini NOBITS 00000000002da570 001000 000009 00 AX 0 0 4\n [14] .rodata NOBITS 00000000002db000 001000 034f64 00 A 0 0 16\n- [15] .hip_fatbin NOBITS 0000000000310000 001000 367d3d18 00 A 0 0 4096\n- [16] .eh_frame_hdr NOBITS 0000000036ae3d18 001000 006384 00 A 0 0 4\n- [17] .gcc_except_table NOBITS 0000000036aea09c 001000 00a538 00 A 0 0 4\n- [18] .eh_frame NOBITS 0000000036af5fd8 000fd8 048cf0 00 WA 0 0 8\n- [19] .init_array NOBITS 0000000036b3ecc8 000fd8 0002d8 08 WA 0 0 8\n- [20] .fini_array NOBITS 0000000036b3efa0 000fd8 000008 08 WA 0 0 8\n- [21] .data.rel.ro NOBITS 0000000036b3efa8 000fd8 0050e8 00 WA 0 0 8\n- [22] .dynamic NOBITS 0000000036b44090 000fd8 000240 10 WA 4 0 8\n- [23] .got NOBITS 0000000036b442d0 000fd8 000d30 08 WA 0 0 8\n- [24] .data NOBITS 0000000036b45000 000fd8 000020 00 WA 0 0 16\n- [25] .hipFatBinSegment NOBITS 0000000036b45020 000fd8 000828 00 WA 0 0 8\n- [26] .bss NOBITS 0000000036b45850 000fd8 000ce8 00 WA 0 0 16\n+ [15] .hip_fatbin NOBITS 0000000000310000 001000 367d4d18 00 A 0 0 4096\n+ [16] .eh_frame_hdr NOBITS 0000000036ae4d18 001000 006384 00 A 0 0 4\n+ [17] .gcc_except_table NOBITS 0000000036aeb09c 001000 00a538 00 A 0 0 4\n+ [18] .eh_frame NOBITS 0000000036af6fd8 000fd8 048cf0 00 WA 0 0 8\n+ [19] .init_array NOBITS 0000000036b3fcc8 000fd8 0002d8 08 WA 0 0 8\n+ [20] .fini_array NOBITS 0000000036b3ffa0 000fd8 000008 08 WA 0 0 8\n+ [21] .data.rel.ro NOBITS 0000000036b3ffa8 000fd8 0050e8 00 WA 0 0 8\n+ [22] .dynamic NOBITS 0000000036b45090 000fd8 000240 10 WA 4 0 8\n+ [23] .got NOBITS 0000000036b452d0 000fd8 000d30 08 WA 0 0 8\n+ [24] .data NOBITS 0000000036b46000 000fd8 000020 00 WA 0 0 16\n+ [25] .hipFatBinSegment NOBITS 0000000036b46020 000fd8 000828 00 WA 0 0 8\n+ [26] .bss NOBITS 0000000036b46850 000fd8 000ce8 00 WA 0 0 16\n [27] .comment PROGBITS 0000000000000000 00025c 000024 01 MS 0 0 1\n [28] .debug_info PROGBITS 0000000000000000 000280 147cbc 00 C 0 0 8\n [29] .debug_abbrev PROGBITS 0000000000000000 147f40 003cc0 00 C 0 0 8\n [30] .debug_line PROGBITS 0000000000000000 14bc00 00ddd4 00 C 0 0 8\n [31] .debug_str PROGBITS 0000000000000000 1599d8 009cb6 01 MSC 0 0 8\n- [32] .debug_addr PROGBITS 0000000000000000 163690 00c6b1 00 C 0 0 8\n- [33] .debug_line_str PROGBITS 0000000000000000 16fd48 0006cb 01 MSC 0 0 8\n- [34] .debug_loclists PROGBITS 0000000000000000 170418 05248a 00 C 0 0 8\n- [35] .debug_rnglists PROGBITS 0000000000000000 1c28a8 00747d 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FUNC LOCAL DEFAULT 12 _ZL18ggml_cuda_parse_idPc\n- 7: 0000000036aeab04 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table4\n- 8: 0000000036b46288 40 OBJECT LOCAL DEFAULT 26 _ZL14ggml_cuda_lock\n- 9: 0000000036aeab28 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table6\n+ 7: 0000000036aebb04 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table4\n+ 8: 0000000036b47288 40 OBJECT LOCAL DEFAULT 26 _ZL14ggml_cuda_lock\n+ 9: 0000000036aebb28 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table6\n 10: 00000000000643d0 33 FUNC LOCAL DEFAULT 12 _ZL20cublas_get_error_str15hipblasStatus_t\n- 11: 0000000036b45d40 40 OBJECT LOCAL DEFAULT 26 _ZZ29ggml_backend_cuda_buffer_typeE5mutex\n- 12: 0000000036b46170 1 OBJECT LOCAL DEFAULT 26 _ZZ29ggml_backend_cuda_buffer_typeE41ggml_backend_cuda_buffer_type_initialized\n- 13: 0000000036b46220 48 OBJECT LOCAL DEFAULT 26 _ZZ21ggml_backend_cuda_regE3reg\n- 14: 0000000036b3f898 48 OBJECT LOCAL DEFAULT 21 _ZL39ggml_backend_cuda_buffer_type_interface\n- 15: 0000000036b45d70 1024 OBJECT LOCAL DEFAULT 26 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0000000000000000 0 FILE LOCAL DEFAULT ABS arange.cu\n- 159: 0000000036b3efb0 8 OBJECT LOCAL DEFAULT 21 _ZL10arange_f32Pfiff\n+ 159: 0000000036b3ffb0 8 OBJECT LOCAL DEFAULT 21 _ZL10arange_f32Pfiff\n 160: 00000000000241e0 142 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__arange_f32Pfiff\n 161: 0000000000024270 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 162: 0000000036b458a8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 163: 0000000036b45038 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 162: 0000000036b468a8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 163: 0000000036b46038 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 164: 00000000000242e0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 165: 0000000000000000 0 FILE LOCAL DEFAULT ABS argmax.cu\n- 166: 0000000036b3efb8 8 OBJECT LOCAL DEFAULT 21 _ZL10argmax_f32PKfPil\n+ 166: 0000000036b3ffb8 8 OBJECT LOCAL DEFAULT 21 _ZL10argmax_f32PKfPil\n 167: 0000000000024510 123 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__argmax_f32PKfPil\n 168: 0000000000024590 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 169: 0000000036b458b0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 170: 0000000036b45050 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 169: 0000000036b468b0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 170: 0000000036b46050 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 171: 0000000000024600 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 172: 0000000000000000 0 FILE LOCAL DEFAULT ABS argsort.cu\n- 173: 0000000036b3efc0 8 OBJECT LOCAL DEFAULT 21 _ZL17k_argsort_f32_i32IL15ggml_sort_order0EEvPKfPiii\n- 174: 0000000036b3efc8 8 OBJECT LOCAL DEFAULT 21 _ZL17k_argsort_f32_i32IL15ggml_sort_order1EEvPKfPiii\n+ 173: 0000000036b3ffc0 8 OBJECT LOCAL DEFAULT 21 _ZL17k_argsort_f32_i32IL15ggml_sort_order0EEvPKfPiii\n+ 174: 0000000036b3ffc8 8 OBJECT LOCAL DEFAULT 21 _ZL17k_argsort_f32_i32IL15ggml_sort_order1EEvPKfPiii\n 175: 0000000000024960 139 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__k_argsort_f32_i32IL15ggml_sort_order0EEvPKfPiii\n 176: 00000000000249f0 139 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__k_argsort_f32_i32IL15ggml_sort_order1EEvPKfPiii\n 177: 0000000000024a80 148 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 178: 0000000036b458b8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 179: 0000000036b45068 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 178: 0000000036b468b8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 179: 0000000036b46068 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 180: 0000000000024b20 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 181: 0000000000000000 0 FILE LOCAL DEFAULT ABS binbcast.cu\n 182: 000000000002e1a0 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL9op_repeatffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 183: 000000000002e4e0 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 184: 000000000002e820 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 185: 000000000002e340 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL9op_repeatffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 186: 000000000002e680 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL9op_repeatffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n@@ -217,106 +217,106 @@\n 213: 0000000000031740 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL6op_divffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 214: 0000000000031f60 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 215: 0000000000032100 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL6op_divffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 216: 00000000000318e0 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 217: 0000000000031c20 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 218: 0000000000031a80 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL6op_divffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 219: 0000000000031dc0 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL6op_divffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 220: 0000000036b3f110 8 OBJECT LOCAL DEFAULT 21 _ZL13k_repeat_backIfEvPKT_PS0_llllmmmmllll\n- 221: 0000000036b3efd0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 222: 0000000036b3efd8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 223: 0000000036b3efe0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 224: 0000000036b3efe8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 225: 0000000036b3eff0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 226: 0000000036b3eff8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 220: 0000000036b40110 8 OBJECT LOCAL DEFAULT 21 _ZL13k_repeat_backIfEvPKT_PS0_llllmmmmllll\n+ 221: 0000000036b3ffd0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 222: 0000000036b3ffd8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 223: 0000000036b3ffe0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 224: 0000000036b3ffe8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 225: 0000000036b3fff0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 226: 0000000036b3fff8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 227: 000000000002eb60 403 FUNC LOCAL DEFAULT 12 _ZL34__device_stub__k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 228: 0000000036b3f000 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 228: 0000000036b40000 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL9op_repeatffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 229: 000000000002ed00 403 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__k_bin_bcastIXadL_ZL9op_repeatffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 230: 0000000036b3f008 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 231: 0000000036b3f010 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 232: 0000000036b3f018 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 233: 0000000036b3f020 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 234: 0000000036b3f028 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 235: 0000000036b3f030 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 236: 0000000036b3f038 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 237: 0000000036b3f040 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 238: 0000000036b3f048 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 239: 0000000036b3f050 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 240: 0000000036b3f058 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 241: 0000000036b3f060 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 242: 0000000036b3f068 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 243: 0000000036b3f070 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 244: 0000000036b3f078 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 245: 0000000036b3f080 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 246: 0000000036b3f088 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 247: 0000000036b3f090 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 248: 0000000036b3f098 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 249: 0000000036b3f0a0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 250: 0000000036b3f0a8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 251: 0000000036b3f0b0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 252: 0000000036b3f0b8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 253: 0000000036b3f0c0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 254: 0000000036b3f0c8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 255: 0000000036b3f0d0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 256: 0000000036b3f0d8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 257: 0000000036b3f0e0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 258: 0000000036b3f0e8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 259: 0000000036b3f0f0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 260: 0000000036b3f0f8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 261: 0000000036b3f100 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n- 262: 0000000036b3f108 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 230: 0000000036b40008 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL9op_repeatffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 231: 0000000036b40010 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 232: 0000000036b40018 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 233: 0000000036b40020 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 234: 0000000036b40028 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 235: 0000000036b40030 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 236: 0000000036b40038 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 237: 0000000036b40040 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_addffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 238: 0000000036b40048 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_addffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 239: 0000000036b40050 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 240: 0000000036b40058 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 241: 0000000036b40060 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 242: 0000000036b40068 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 243: 0000000036b40070 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 244: 0000000036b40078 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 245: 0000000036b40080 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_subffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 246: 0000000036b40088 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_subffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 247: 0000000036b40090 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 248: 0000000036b40098 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 249: 0000000036b400a0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 250: 0000000036b400a8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 251: 0000000036b400b0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 252: 0000000036b400b8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 253: 0000000036b400c0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_mulffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 254: 0000000036b400c8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_mulffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 255: 0000000036b400d0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 256: 0000000036b400d8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEEfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 257: 0000000036b400e0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 258: 0000000036b400e8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEE6__halfS0_S0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 259: 0000000036b400f0 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 260: 0000000036b400f8 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEE6__halffS0_EvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 261: 0000000036b40100 8 OBJECT LOCAL DEFAULT 21 _ZL19k_bin_bcast_unravelIXadL_ZL6op_divffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n+ 262: 0000000036b40108 8 OBJECT LOCAL DEFAULT 21 _ZL11k_bin_bcastIXadL_ZL6op_divffEE6__halfffEvPKT0_PKT1_PT2_iiiiiiiiiiiiiiiii\n 263: 00000000000322a0 305 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__k_repeat_backIfEvPKT_PS0_llllmmmmllll\n 264: 00000000000323e0 1942 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 265: 0000000036b458c0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 266: 0000000036b45080 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 265: 0000000036b468c0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 266: 0000000036b46080 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 267: 0000000000032b80 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 268: 0000000000000000 0 FILE LOCAL DEFAULT ABS clamp.cu\n- 269: 0000000036b3f118 8 OBJECT LOCAL DEFAULT 21 _ZL15op_clamp_kernelI6__halfEvPKT_PS1_S1_S1_i\n- 270: 0000000036b3f120 8 OBJECT LOCAL DEFAULT 21 _ZL15op_clamp_kernelIfEvPKT_PS0_S0_S0_i\n+ 269: 0000000036b40118 8 OBJECT LOCAL DEFAULT 21 _ZL15op_clamp_kernelI6__halfEvPKT_PS1_S1_S1_i\n+ 270: 0000000036b40120 8 OBJECT LOCAL DEFAULT 21 _ZL15op_clamp_kernelIfEvPKT_PS0_S0_S0_i\n 271: 0000000000032ea0 156 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__op_clamp_kernelI6__halfEvPKT_PS1_S1_S1_i\n 272: 0000000000032f40 157 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__op_clamp_kernelIfEvPKT_PS0_S0_S0_i\n 273: 0000000000032fe0 148 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 274: 0000000036b458c8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 275: 0000000036b45098 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 274: 0000000036b468c8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 275: 0000000036b46098 24 OBJECT LOCAL DEFAULT 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283: 0000000036b40128 8 OBJECT LOCAL DEFAULT 21 _ZL15concat_f32_dim0PKfS0_Pfii\n+ 284: 0000000036b40138 8 OBJECT LOCAL DEFAULT 21 _ZL15concat_f32_dim2PKfS0_Pfii\n 285: 0000000000033a80 152 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__concat_f32_dim0PKfS0_Pfii\n 286: 0000000000033b20 152 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__concat_f32_dim1PKfS0_Pfii\n 287: 0000000000033bc0 152 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__concat_f32_dim2PKfS0_Pfii\n- 288: 0000000036b3f140 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi0EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n- 289: 0000000036b3f148 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi1EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n- 290: 0000000036b3f150 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi2EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n- 291: 0000000036b3f158 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi3EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n+ 288: 0000000036b40140 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi0EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n+ 289: 0000000036b40148 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi1EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n+ 290: 0000000036b40150 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi2EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n+ 291: 0000000036b40158 8 OBJECT LOCAL DEFAULT 21 _ZL19concat_f32_non_contILi3EEvPKcS1_Pcllllmmmmllllmmmmllllmmmm\n 292: 00000000000344a0 378 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 293: 0000000036b458d0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 294: 0000000036b450b0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 293: 0000000036b468d0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 294: 0000000036b460b0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 295: 0000000000034620 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 296: 0000000000000000 0 FILE LOCAL DEFAULT ABS conv-transpose-1d.cu\n- 297: 0000000036b3f160 8 OBJECT LOCAL DEFAULT 21 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OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 306: 0000000036b460e0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 307: 0000000000035350 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 308: 0000000000000000 0 FILE LOCAL DEFAULT ABS conv2d-transpose.cu\n 309: 0000000000035b90 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 310: 0000000036b458e8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 311: 0000000036b450f8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 310: 0000000036b468e8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 311: 0000000036b460f8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 312: 0000000000035c00 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 313: 0000000000000000 0 FILE LOCAL DEFAULT ABS convert.cu\n 314: 0000000000035c80 36 FUNC LOCAL DEFAULT 12 _ZL23convert_unary_cont_cudaI6__half12hip_bfloat16EvPKvPT0_lP12ihipStream_t\n 315: 0000000000035c50 36 FUNC LOCAL DEFAULT 12 _ZL23convert_unary_cont_cudaIf12hip_bfloat16EvPKvPT0_lP12ihipStream_t\n 316: 00000000000380f0 365 FUNC LOCAL DEFAULT 12 _ZL18convert_unary_cudaIf12hip_bfloat16EvPKvPT0_lllllllP12ihipStream_t\n 317: 0000000000038260 365 FUNC LOCAL DEFAULT 12 _ZL18convert_unary_cudaI6__half12hip_bfloat16EvPKvPT0_lllllllP12ihipStream_t\n 318: 0000000000036df0 36 FUNC LOCAL DEFAULT 12 _ZL23convert_unary_cont_cudaIf6__halfEvPKvPT0_lP12ihipStream_t\n@@ -337,85 +337,85 @@\n 333: 0000000000036a30 183 FUNC LOCAL DEFAULT 12 _ZL25dequantize_row_iq1_s_cudaI6__halfEvPKvPT_lP12ihipStream_t\n 334: 0000000000036bb0 190 FUNC LOCAL DEFAULT 12 _ZL26dequantize_row_iq4_nl_cudaI6__halfEvPKvPT_lP12ihipStream_t\n 335: 0000000000036d30 183 FUNC LOCAL DEFAULT 12 _ZL25dequantize_row_iq3_s_cudaI6__halfEvPKvPT_lP12ihipStream_t\n 336: 00000000000368b0 183 FUNC LOCAL DEFAULT 12 _ZL25dequantize_row_iq2_s_cudaI6__halfEvPKvPT_lP12ihipStream_t\n 337: 0000000000036c70 190 FUNC LOCAL DEFAULT 12 _ZL26dequantize_row_iq4_xs_cudaI6__halfEvPKvPT_lP12ihipStream_t\n 338: 0000000000036af0 183 FUNC LOCAL DEFAULT 12 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374: 0000000036b3f250 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q2_KIfEvPKvPT_\n+ 374: 0000000036b40250 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q2_KIfEvPKvPT_\n 375: 00000000000373b0 183 FUNC LOCAL DEFAULT 12 _ZL24dequantize_row_q3_K_cudaIfEvPKvPT_lP12ihipStream_t\n- 376: 0000000036b3f258 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q3_KIfEvPKvPT_\n+ 376: 0000000036b40258 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q3_KIfEvPKvPT_\n 377: 0000000000037470 183 FUNC LOCAL DEFAULT 12 _ZL24dequantize_row_q4_K_cudaIfEvPKvPT_lP12ihipStream_t\n- 378: 0000000036b3f260 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q4_KIfEvPKvPT_\n+ 378: 0000000036b40260 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q4_KIfEvPKvPT_\n 379: 0000000000037530 183 FUNC LOCAL DEFAULT 12 _ZL24dequantize_row_q5_K_cudaIfEvPKvPT_lP12ihipStream_t\n- 380: 0000000036b3f268 8 OBJECT LOCAL DEFAULT 21 _ZL21dequantize_block_q5_KIfEvPKvPT_\n+ 380: 0000000036b40268 8 OBJECT LOCAL DEFAULT 21 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_ZL25dequantize_row_iq2_s_cudaIfEvPKvPT_lP12ihipStream_t\n- 388: 0000000036b3f288 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq2_sIfEvPKvPT_\n+ 388: 0000000036b40288 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq2_sIfEvPKvPT_\n 389: 00000000000378f0 183 FUNC LOCAL DEFAULT 12 _ZL27dequantize_row_iq3_xxs_cudaIfEvPKvPT_lP12ihipStream_t\n- 390: 0000000036b3f290 8 OBJECT LOCAL DEFAULT 21 _ZL24dequantize_block_iq3_xxsIfEvPKvPT_\n+ 390: 0000000036b40290 8 OBJECT LOCAL DEFAULT 21 _ZL24dequantize_block_iq3_xxsIfEvPKvPT_\n 391: 00000000000379b0 183 FUNC LOCAL DEFAULT 12 _ZL25dequantize_row_iq1_s_cudaIfEvPKvPT_lP12ihipStream_t\n- 392: 0000000036b3f298 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq1_sIfEvPKvPT_\n+ 392: 0000000036b40298 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq1_sIfEvPKvPT_\n 393: 0000000000037a70 183 FUNC LOCAL DEFAULT 12 _ZL25dequantize_row_iq1_m_cudaIfEvPKvPT_lP12ihipStream_t\n- 394: 0000000036b3f2a0 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq1_mIfEvPKvPT_\n+ 394: 0000000036b402a0 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq1_mIfEvPKvPT_\n 395: 0000000000037b30 190 FUNC LOCAL DEFAULT 12 _ZL26dequantize_row_iq4_nl_cudaIfEvPKvPT_lP12ihipStream_t\n- 396: 0000000036b3f2a8 8 OBJECT LOCAL DEFAULT 21 _ZL23dequantize_block_iq4_nlIfEvPKvPT_\n+ 396: 0000000036b402a8 8 OBJECT LOCAL DEFAULT 21 _ZL23dequantize_block_iq4_nlIfEvPKvPT_\n 397: 0000000000037bf0 190 FUNC LOCAL DEFAULT 12 _ZL26dequantize_row_iq4_xs_cudaIfEvPKvPT_lP12ihipStream_t\n- 398: 0000000036b3f2b0 8 OBJECT LOCAL DEFAULT 21 _ZL23dequantize_block_iq4_xsIfEvPKvPT_\n+ 398: 0000000036b402b0 8 OBJECT LOCAL DEFAULT 21 _ZL23dequantize_block_iq4_xsIfEvPKvPT_\n 399: 0000000000037cb0 183 FUNC LOCAL DEFAULT 12 _ZL25dequantize_row_iq3_s_cudaIfEvPKvPT_lP12ihipStream_t\n- 400: 0000000036b3f2b8 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq3_sIfEvPKvPT_\n+ 400: 0000000036b402b8 8 OBJECT LOCAL DEFAULT 21 _ZL22dequantize_block_iq3_sIfEvPKvPT_\n 401: 0000000000037d70 36 FUNC LOCAL DEFAULT 12 _ZL23convert_unary_cont_cudaI6__halffEvPKvPT0_lP12ihipStream_t\n 402: 00000000000383f0 365 FUNC LOCAL DEFAULT 12 _ZL18convert_unary_cudaI6__halffEvPKvPT0_lllllllP12ihipStream_t\n 403: 0000000000037da0 36 FUNC LOCAL DEFAULT 12 _ZL23convert_unary_cont_cudaI12hip_bfloat16fEvPKvPT0_lP12ihipStream_t\n 404: 0000000000038560 365 FUNC LOCAL DEFAULT 12 _ZL18convert_unary_cudaI12hip_bfloat16fEvPKvPT0_lllllllP12ihipStream_t\n- 405: 0000000036b3f2c0 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryIf6__halfEvPKvPT0_llllll\n- 406: 0000000036b3f2c8 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI12hip_bfloat166__halfEvPKvPT0_llllll\n- 407: 0000000036b3f2d0 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryIf12hip_bfloat16EvPKvPT0_llllll\n- 408: 0000000036b3f2d8 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI6__half12hip_bfloat16EvPKvPT0_llllll\n- 409: 0000000036b3f2e0 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI6__halffEvPKvPT0_llllll\n- 410: 0000000036b3f2e8 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI12hip_bfloat16fEvPKvPT0_llllll\n+ 405: 0000000036b402c0 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryIf6__halfEvPKvPT0_llllll\n+ 406: 0000000036b402c8 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI12hip_bfloat166__halfEvPKvPT0_llllll\n+ 407: 0000000036b402d0 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryIf12hip_bfloat16EvPKvPT0_llllll\n+ 408: 0000000036b402d8 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI6__half12hip_bfloat16EvPKvPT0_llllll\n+ 409: 0000000036b402e0 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI6__halffEvPKvPT0_llllll\n+ 410: 0000000036b402e8 8 OBJECT LOCAL DEFAULT 21 _ZL13convert_unaryI12hip_bfloat16fEvPKvPT0_llllll\n 411: 00000000000386d0 123 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__dequantize_block_q8_0_f16ILb0EEvPKvP6__halfl\n 412: 0000000000038750 123 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__dequantize_block_q8_0_f16ILb1EEvPKvP6__halfl\n 413: 00000000000387d0 122 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__dequantize_block_q4_0I6__halfEvPKvPT_i\n 414: 0000000000038850 122 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__dequantize_block_q4_1I6__halfEvPKvPT_i\n 415: 00000000000388d0 123 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__dequantize_blockILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PT2_l\n 416: 0000000000038950 123 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__dequantize_blockILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PT2_l\n 417: 00000000000389d0 123 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__dequantize_blockILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PT2_l\n@@ -455,45 +455,45 @@\n 451: 0000000000039910 209 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__convert_unaryIf6__halfEvPKvPT0_llllll\n 452: 00000000000399f0 209 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__convert_unaryI12hip_bfloat166__halfEvPKvPT0_llllll\n 453: 0000000000039ad0 209 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__convert_unaryIf12hip_bfloat16EvPKvPT0_llllll\n 454: 0000000000039bb0 209 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__convert_unaryI6__half12hip_bfloat16EvPKvPT0_llllll\n 455: 0000000000039c90 209 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__convert_unaryI6__halffEvPKvPT0_llllll\n 456: 0000000000039d70 209 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__convert_unaryI12hip_bfloat16fEvPKvPT0_llllll\n 457: 0000000000039e50 2172 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 458: 0000000036b458f0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 459: 0000000036b45110 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 458: 0000000036b468f0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 459: 0000000036b46110 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 460: 000000000003a6d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 461: 0000000000000000 0 FILE LOCAL DEFAULT ABS count-equal.cu\n- 462: 0000000036b3f3e0 8 OBJECT LOCAL DEFAULT 21 _ZL11count_equalIiEvPKT_S2_Plll\n+ 462: 0000000036b403e0 8 OBJECT LOCAL DEFAULT 21 _ZL11count_equalIiEvPKT_S2_Plll\n 463: 000000000003aac0 162 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__count_equalIiEvPKT_S2_Plll\n 464: 000000000003ab70 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 465: 0000000036b458f8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 466: 0000000036b45128 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 465: 0000000036b468f8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 466: 0000000036b46128 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 467: 000000000003abe0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 468: 0000000000000000 0 FILE LOCAL DEFAULT ABS cpy.cu\n- 469: 0000000036b3f3e8 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f32_f32PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 469: 0000000036b403e8 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f32_f32PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 470: 000000000003d510 632 FUNC LOCAL DEFAULT 12 _ZL21ggml_cpy_f16_f16_cudaPKcPciiiiiiiiiiiiiiiP12ihipStream_tPS1_Ri\n- 471: 0000000036b3f418 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n- 472: 0000000036b3f428 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n- 473: 0000000036b3f438 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n+ 471: 0000000036b40418 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n+ 472: 0000000036b40428 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n+ 473: 0000000036b40438 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n 474: 000000000003d2a0 618 FUNC LOCAL DEFAULT 12 _ZL22ggml_cpy_q5_1_f32_cudaPKcPciiiiiiiiiiiiiiiP12ihipStream_tPS1_Ri\n- 475: 0000000036b3f408 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL17cpy_blck_q8_0_f32PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 476: 0000000036b3f458 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f16_f32PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 477: 0000000036b3f3f8 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f32_f16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 478: 0000000036b3f410 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q4_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 479: 0000000036b3f420 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q4_1PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 480: 0000000036b3f430 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q5_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 475: 0000000036b40408 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL17cpy_blck_q8_0_f32PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 476: 0000000036b40458 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f16_f32PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 477: 0000000036b403f8 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f32_f16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 478: 0000000036b40410 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q4_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 479: 0000000036b40420 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q4_1PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 480: 0000000036b40430 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q5_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 481: 000000000003cff0 673 FUNC LOCAL DEFAULT 12 _ZL22ggml_cpy_f32_q5_1_cudaPKcPciiiiiiiiiiiiiiiP12ihipStream_tPS1_Ri\n 482: 000000000003cd40 673 FUNC LOCAL DEFAULT 12 _ZL24ggml_cpy_f32_iq4_nl_cudaPKcPciiiiiiiiiiiiiiiP12ihipStream_tPS1_Ri\n- 483: 0000000036b3f3f0 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL14cpy_1_f32_bf16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 484: 0000000036b3f400 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q8_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 485: 0000000036b3f440 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL19cpy_blck_f32_iq4_nlPKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 486: 0000000036b3f448 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q5_1PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n- 487: 0000000036b3f450 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n- 488: 0000000036b3f460 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f16_f16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 483: 0000000036b403f0 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL14cpy_1_f32_bf16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 484: 0000000036b40400 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q8_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 485: 0000000036b40440 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL19cpy_blck_f32_iq4_nlPKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 486: 0000000036b40448 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_f32_qIXadL_ZL17cpy_blck_f32_q5_1PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n+ 487: 0000000036b40450 8 OBJECT LOCAL DEFAULT 21 _ZL9cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n+ 488: 0000000036b40460 8 OBJECT LOCAL DEFAULT 21 _ZL11cpy_f32_f16IXadL_ZL13cpy_1_f16_f16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 489: 000000000003d910 377 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__cpy_f32_f16IXadL_ZL13cpy_1_f32_f32PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 490: 000000000003da90 377 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__cpy_f32_f16IXadL_ZL14cpy_1_f32_bf16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 491: 000000000003dc10 377 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__cpy_f32_f16IXadL_ZL13cpy_1_f32_f16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 492: 000000000003dd90 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_f32_qIXadL_ZL17cpy_blck_f32_q8_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 493: 000000000003df10 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_q_f32IXadL_ZL17cpy_blck_q8_0_f32PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 494: 000000000003e090 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_f32_qIXadL_ZL17cpy_blck_f32_q4_0PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 495: 000000000003e210 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n@@ -503,220 +503,220 @@\n 499: 000000000003e810 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n 500: 000000000003e990 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_f32_qIXadL_ZL19cpy_blck_f32_iq4_nlPKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 501: 000000000003eb10 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_f32_qIXadL_ZL17cpy_blck_f32_q5_1PKcPcEELi32EEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 502: 000000000003ec90 377 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__cpy_q_f32IXadL_ZL14cpy_blck_q_f32IXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEELi32EEvPKcPcEELi32EEvS7_S8_iiiiiiiiiiiiiiiPS8_i\n 503: 000000000003ee10 377 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__cpy_f32_f16IXadL_ZL13cpy_1_f16_f32PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 504: 000000000003ef90 377 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__cpy_f32_f16IXadL_ZL13cpy_1_f16_f16PKcPcEEEvS1_S2_iiiiiiiiiiiiiiiPS2_i\n 505: 000000000003f110 792 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 506: 0000000036b45900 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 507: 0000000036b45140 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 506: 0000000036b46900 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 507: 0000000036b46140 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 508: 000000000003f430 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 509: 0000000000000000 0 FILE LOCAL DEFAULT ABS cross-entropy-loss.cu\n- 510: 0000000036b3f470 8 OBJECT LOCAL DEFAULT 21 _ZL22cross_entropy_loss_f32ILb0EEvPKfS1_Pfii\n- 511: 0000000036b3f468 8 OBJECT LOCAL DEFAULT 21 _ZL22cross_entropy_loss_f32ILb1EEvPKfS1_Pfii\n- 512: 0000000036aea09c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 510: 0000000036b40470 8 OBJECT LOCAL DEFAULT 21 _ZL22cross_entropy_loss_f32ILb0EEvPKfS1_Pfii\n+ 511: 0000000036b40468 8 OBJECT LOCAL DEFAULT 21 _ZL22cross_entropy_loss_f32ILb1EEvPKfS1_Pfii\n+ 512: 0000000036aeb09c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n 513: 000000000003f990 152 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__cross_entropy_loss_f32ILb1EEvPKfS1_Pfii\n 514: 000000000003fa30 152 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__cross_entropy_loss_f32ILb0EEvPKfS1_Pfii\n- 515: 0000000036aea0d8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 516: 0000000036b3f480 8 OBJECT LOCAL DEFAULT 21 _ZL27cross_entropy_loss_back_f32ILb0EEvPKfS1_S1_Pfi\n- 517: 0000000036b3f478 8 OBJECT LOCAL DEFAULT 21 _ZL27cross_entropy_loss_back_f32ILb1EEvPKfS1_S1_Pfi\n+ 515: 0000000036aeb0d8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 516: 0000000036b40480 8 OBJECT LOCAL DEFAULT 21 _ZL27cross_entropy_loss_back_f32ILb0EEvPKfS1_S1_Pfi\n+ 517: 0000000036b40478 8 OBJECT LOCAL DEFAULT 21 _ZL27cross_entropy_loss_back_f32ILb1EEvPKfS1_S1_Pfi\n 518: 000000000003ff80 162 FUNC LOCAL DEFAULT 12 _ZL42__device_stub__cross_entropy_loss_back_f32ILb1EEvPKfS1_S1_Pfi\n 519: 0000000000040030 162 FUNC LOCAL DEFAULT 12 _ZL42__device_stub__cross_entropy_loss_back_f32ILb0EEvPKfS1_S1_Pfi\n 520: 00000000000400e0 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 521: 0000000036b45908 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 522: 0000000036b45158 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 521: 0000000036b46908 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 522: 0000000036b46158 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 523: 00000000000401d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 524: 0000000000000000 0 FILE LOCAL DEFAULT ABS diagmask.cu\n- 525: 0000000036b3f488 8 OBJECT LOCAL DEFAULT 21 _ZL17diag_mask_inf_f32PKfPfiii\n+ 525: 0000000036b40488 8 OBJECT LOCAL DEFAULT 21 _ZL17diag_mask_inf_f32PKfPfiii\n 526: 0000000000040430 154 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__diag_mask_inf_f32PKfPfiii\n 527: 00000000000404d0 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 528: 0000000036b45910 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 529: 0000000036b45170 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 528: 0000000036b46910 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 529: 0000000036b46170 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 530: 0000000000040540 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 531: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-tile-f16.cu\n- 532: 0000000036b3f490 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 533: 0000000036b3f4d0 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 534: 0000000036b3f4c0 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 535: 0000000036b3f4f0 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 536: 0000000036b3f498 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 537: 0000000036b3f4d8 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 538: 0000000036b3f4c8 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 539: 0000000036b3f4f8 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 532: 0000000036b40490 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 533: 0000000036b404d0 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 534: 0000000036b404c0 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 535: 0000000036b404f0 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi64ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 536: 0000000036b40498 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 537: 0000000036b404d8 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 538: 0000000036b404c8 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 539: 0000000036b404f8 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f16ILi128ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 540: 00000000000406f0 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi64ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 541: 0000000036b3f4a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 542: 0000000036b3f4a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 543: 0000000036aea0e8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n+ 541: 0000000036b404a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 542: 0000000036b404a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 543: 0000000036aeb0e8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n 544: 00000000000409c0 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi128ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 545: 0000000036b3f4b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 546: 0000000036b3f4b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 547: 0000000036aea1bc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table4\n+ 545: 0000000036b404b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 546: 0000000036b404b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 547: 0000000036aeb1bc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table4\n 548: 0000000000040c90 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 549: 0000000000040d30 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 550: 0000000036aea290 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 551: 0000000036aea2a0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table9\n+ 550: 0000000036aeb290 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 551: 0000000036aeb2a0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table9\n 552: 0000000000040dc0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 553: 0000000000040e60 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 554: 0000000000040ef0 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi64ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 555: 00000000000411c0 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi128ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 556: 0000000000041490 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi64ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 557: 0000000036b3f4e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 558: 0000000036aea2b0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table16\n+ 557: 0000000036b404e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 558: 0000000036aeb2b0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table16\n 559: 0000000000041760 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi128ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 560: 0000000036b3f4e8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 561: 0000000036aea384 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table18\n+ 560: 0000000036b404e8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 561: 0000000036aeb384 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table18\n 562: 0000000000041a30 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 563: 0000000000041ad0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 564: 0000000000041b70 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi64ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 565: 0000000000041e40 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f16ILi128ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 566: 0000000000042110 700 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 567: 0000000036b45918 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 568: 0000000036b45188 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 567: 0000000036b46918 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 568: 0000000036b46188 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 569: 00000000000423d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 570: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-tile-f32.cu\n- 571: 0000000036b3f500 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 572: 0000000036b3f540 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 573: 0000000036b3f530 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 574: 0000000036b3f560 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 575: 0000000036b3f508 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 576: 0000000036b3f548 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 577: 0000000036b3f538 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 578: 0000000036b3f568 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 571: 0000000036b40500 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 572: 0000000036b40540 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 573: 0000000036b40530 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 574: 0000000036b40560 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi64ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 575: 0000000036b40508 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 576: 0000000036b40548 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 577: 0000000036b40538 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 578: 0000000036b40568 8 OBJECT LOCAL DEFAULT 21 _ZL23flash_attn_tile_ext_f32ILi128ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 579: 0000000000046ac0 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi64ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 580: 0000000036b3f510 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 581: 0000000036b3f518 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 580: 0000000036b40510 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 581: 0000000036b40518 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 582: 0000000000046d90 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi128ELi16ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 583: 0000000036b3f520 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 584: 0000000036b3f528 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 583: 0000000036b40520 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 584: 0000000036b40528 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 585: 0000000000047060 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 586: 0000000000047100 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 587: 0000000000047190 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 588: 0000000000047230 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 589: 00000000000472c0 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi64ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 590: 0000000000047590 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi128ELi16ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 591: 0000000000047860 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi64ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 592: 0000000036b3f550 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 592: 0000000036b40550 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 593: 0000000000047b30 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi128ELi32ELi8ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 594: 0000000036b3f558 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 594: 0000000036b40558 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 595: 0000000000047e00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 596: 0000000000047ea0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 597: 0000000000047f40 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi64ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 598: 0000000000048210 706 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__flash_attn_tile_ext_f32ILi128ELi32ELi8ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 599: 00000000000484e0 700 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 600: 0000000036b45920 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 601: 0000000036b451a0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 600: 0000000036b46920 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 601: 0000000036b461a0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 602: 00000000000487a0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 603: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-wmma-f16.cu\n- 604: 0000000036b3f638 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 605: 0000000036b3f630 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 606: 0000000036b3f6b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 607: 0000000036b3f6a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 608: 0000000036b3f578 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 609: 0000000036b3f570 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 610: 0000000036b3f710 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 611: 0000000036b3f708 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 612: 0000000036b3f650 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 613: 0000000036b3f648 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 614: 0000000036b3f668 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 615: 0000000036b3f660 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 616: 0000000036b3f680 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 617: 0000000036b3f678 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 618: 0000000036b3f698 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 619: 0000000036b3f690 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 620: 0000000036b3f598 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 621: 0000000036b3f590 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 622: 0000000036b3f5b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 623: 0000000036b3f5b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 624: 0000000036b3f5d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 625: 0000000036b3f5d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 626: 0000000036b3f5f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 627: 0000000036b3f5f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 628: 0000000036b3f618 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 629: 0000000036b3f610 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 630: 0000000036b3f6c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 631: 0000000036b3f6b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 632: 0000000036b3f6d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 633: 0000000036b3f6c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 634: 0000000036b3f6e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 635: 0000000036b3f6d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 636: 0000000036b3f6f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 637: 0000000036b3f6e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 638: 0000000036b3f700 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 639: 0000000036b3f6f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 640: 0000000036b3f720 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 641: 0000000036b3f718 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 642: 0000000036b3f730 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 643: 0000000036b3f728 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 644: 0000000036b3f740 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 645: 0000000036b3f738 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 646: 0000000036b3f750 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 647: 0000000036b3f748 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 648: 0000000036b3f760 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 649: 0000000036b3f758 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 604: 0000000036b40638 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 605: 0000000036b40630 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 606: 0000000036b406b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 607: 0000000036b406a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 608: 0000000036b40578 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 609: 0000000036b40570 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 610: 0000000036b40710 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 611: 0000000036b40708 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 612: 0000000036b40650 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 613: 0000000036b40648 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 614: 0000000036b40668 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 615: 0000000036b40660 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 616: 0000000036b40680 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 617: 0000000036b40678 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 618: 0000000036b40698 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 619: 0000000036b40690 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 620: 0000000036b40598 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 621: 0000000036b40590 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 622: 0000000036b405b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 623: 0000000036b405b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 624: 0000000036b405d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 625: 0000000036b405d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 626: 0000000036b405f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 627: 0000000036b405f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 628: 0000000036b40618 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 629: 0000000036b40610 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 630: 0000000036b406c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 631: 0000000036b406b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi16ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 632: 0000000036b406d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 633: 0000000036b406c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi16ELi4ELi32E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 634: 0000000036b406e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 635: 0000000036b406d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi16ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 636: 0000000036b406f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 637: 0000000036b406e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 638: 0000000036b40700 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 639: 0000000036b406f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 640: 0000000036b40720 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 641: 0000000036b40718 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi32ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 642: 0000000036b40730 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 643: 0000000036b40728 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi32ELi4ELi32E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 644: 0000000036b40740 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 645: 0000000036b40738 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi32ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 646: 0000000036b40750 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 647: 0000000036b40748 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 648: 0000000036b40760 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 649: 0000000036b40758 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 650: 0000000000048f60 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 651: 0000000000049230 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 652: 0000000036b3f580 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 653: 0000000036b3f588 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 652: 0000000036b40580 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 653: 0000000036b40588 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 654: 0000000000049500 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 655: 00000000000495a0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 656: 0000000000049630 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi16ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 657: 0000000000049900 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi16ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 658: 0000000036b3f5a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 659: 0000000036b3f5a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 660: 0000000036aea458 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table12\n+ 658: 0000000036b405a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 659: 0000000036b405a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 660: 0000000036aeb458 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table12\n 661: 0000000000049bd0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 662: 0000000000049c70 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 663: 0000000000049d00 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi16ELi4ELi32EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 664: 0000000000049fd0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi16ELi4ELi32EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 665: 0000000036b3f5c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 666: 0000000036b3f5c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 667: 0000000036aea52c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table17\n+ 665: 0000000036b405c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 666: 0000000036b405c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 667: 0000000036aeb52c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table17\n 668: 000000000004a2a0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 669: 000000000004a340 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 670: 000000000004a3d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi16ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 671: 000000000004a6a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi16ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 672: 0000000036b3f5e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 673: 0000000036b3f5e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 674: 0000000036aea600 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table22\n+ 672: 0000000036b405e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 673: 0000000036b405e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 674: 0000000036aeb600 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table22\n 675: 000000000004a970 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 676: 000000000004aa10 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 677: 000000000004aaa0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 678: 000000000004ad70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 679: 0000000036b3f600 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 680: 0000000036b3f608 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 679: 0000000036b40600 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 680: 0000000036b40608 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 681: 000000000004b040 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 682: 000000000004b0e0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 683: 000000000004b170 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi16ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 684: 000000000004b440 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi16ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 685: 0000000036b3f620 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 686: 0000000036b3f628 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 687: 0000000036aea6d4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table32\n+ 685: 0000000036b40620 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 686: 0000000036b40628 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 687: 0000000036aeb6d4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table32\n 688: 000000000004b710 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 689: 000000000004b7b0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 690: 000000000004b840 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi32ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 691: 000000000004bb10 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi32ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 692: 0000000036b3f640 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 692: 0000000036b40640 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 693: 000000000004bde0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 694: 000000000004be80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi32ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 695: 000000000004c150 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi32ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 696: 0000000036b3f658 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 697: 0000000036aea7a8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table41\n+ 696: 0000000036b40658 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 697: 0000000036aeb7a8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table41\n 698: 000000000004c420 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 699: 000000000004c4c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi32ELi4ELi32EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 700: 000000000004c790 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi32ELi4ELi32EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 701: 0000000036b3f670 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 702: 0000000036aea87c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table45\n+ 701: 0000000036b40670 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 702: 0000000036aeb87c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table45\n 703: 000000000004ca60 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 704: 000000000004cb00 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi32ELi4ELi16EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 705: 000000000004cdd0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi32ELi4ELi16EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 706: 0000000036b3f688 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 707: 0000000036aea950 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table49\n+ 706: 0000000036b40688 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 707: 0000000036aeb950 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table49\n 708: 000000000004d0a0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 709: 000000000004d140 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi32ELi4ELi64EfLb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 710: 000000000004d410 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi32ELi4ELi64EfLb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 711: 0000000036b3f6a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 711: 0000000036b406a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 712: 000000000004d6e0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 713: 000000000004d780 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi16ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 714: 000000000004da50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi16ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 715: 000000000004dd20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi16ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 716: 000000000004dff0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi16ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 717: 000000000004e2c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi16ELi4ELi32E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 718: 000000000004e590 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi16ELi4ELi32E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n@@ -734,63 +734,63 @@\n 730: 0000000000050750 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi32ELi4ELi32E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 731: 0000000000050a20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi32ELi4ELi16E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 732: 0000000000050cf0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi32ELi4ELi16E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 733: 0000000000050fc0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 734: 0000000000051290 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 735: 0000000000051560 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi32ELi4ELi64E6__halfLb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 736: 0000000000051830 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi32ELi4ELi64E6__halfLb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 737: 0000000036b3f768 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 738: 0000000036aeaa24 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table79\n+ 737: 0000000036b40768 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 738: 0000000036aeba24 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table79\n 739: 0000000000051b00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 740: 0000000000051ba0 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 741: 0000000036b45928 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 742: 0000000036b451b8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 741: 0000000036b46928 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 742: 0000000036b461b8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 743: 0000000000052870 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 744: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn.cu\n 745: 000000000005b390 132 FUNC LOCAL DEFAULT 12 _ZL32ggml_cuda_flash_attn_ext_vec_f16R25ggml_backend_cuda_contextP11ggml_tensor\n 746: 000000000005b420 132 FUNC LOCAL DEFAULT 12 _ZL32ggml_cuda_flash_attn_ext_vec_f32R25ggml_backend_cuda_contextP11ggml_tensor\n 747: 000000000005b4b0 379 FUNC LOCAL DEFAULT 12 _ZL20on_no_fattn_vec_casei\n 748: 0000000000000000 0 FILE LOCAL DEFAULT ABS getrows.cu\n- 749: 0000000036b3f780 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIffEvPKT_PKiPT0_llmmmmmmmmm\n- 750: 0000000036b3f810 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIf6__halfEvPKT_PKiPT0_llmmmmmmmmm\n- 751: 0000000036b3f7c8 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIfiEvPKT_PKiPT0_llmmmmmmmmm\n- 752: 0000000036b3f858 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIf12hip_bfloat16EvPKT_PKiPT0_llmmmmmmmmm\n- 753: 0000000036b3f778 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__halffEvPKT_PKiPT0_llmmmmmmmmm\n- 754: 0000000036b3f798 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n- 755: 0000000036b3f7a0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n- 756: 0000000036b3f7a8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n- 757: 0000000036b3f7b0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n- 758: 0000000036b3f7b8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n- 759: 0000000036b3f788 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIifEvPKT_PKiPT0_llmmmmmmmmm\n- 760: 0000000036b3f790 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat16fEvPKT_PKiPT0_llmmmmmmmmm\n- 761: 0000000036b3f808 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__halfS0_EvPKT_PKiPT0_llmmmmmmmmm\n- 762: 0000000036b3f828 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n- 763: 0000000036b3f830 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n- 764: 0000000036b3f838 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n- 765: 0000000036b3f840 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n- 766: 0000000036b3f848 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n- 767: 0000000036b3f818 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIi6__halfEvPKT_PKiPT0_llmmmmmmmmm\n- 768: 0000000036b3f820 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat166__halfEvPKT_PKiPT0_llmmmmmmmmm\n- 769: 0000000036b3f7c0 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__halfiEvPKT_PKiPT0_llmmmmmmmmm\n- 770: 0000000036b3f7e0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n- 771: 0000000036b3f7e8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n- 772: 0000000036b3f7f0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n- 773: 0000000036b3f7f8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n- 774: 0000000036b3f800 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n- 775: 0000000036b3f7d0 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIiiEvPKT_PKiPT0_llmmmmmmmmm\n- 776: 0000000036b3f7d8 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat16iEvPKT_PKiPT0_llmmmmmmmmm\n- 777: 0000000036b3f850 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__half12hip_bfloat16EvPKT_PKiPT0_llmmmmmmmmm\n- 778: 0000000036b3f870 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n- 779: 0000000036b3f878 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n- 780: 0000000036b3f880 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n- 781: 0000000036b3f888 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n- 782: 0000000036b3f890 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n- 783: 0000000036b3f860 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIi12hip_bfloat16EvPKT_PKiPT0_llmmmmmmmmm\n- 784: 0000000036b3f868 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat16S0_EvPKT_PKiPT0_llmmmmmmmmm\n- 785: 0000000036b3f770 8 OBJECT LOCAL DEFAULT 21 _ZL21k_get_rows_back_floatIffEvPKT_PKiPT0_ll\n+ 749: 0000000036b40780 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIffEvPKT_PKiPT0_llmmmmmmmmm\n+ 750: 0000000036b40810 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIf6__halfEvPKT_PKiPT0_llmmmmmmmmm\n+ 751: 0000000036b407c8 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIfiEvPKT_PKiPT0_llmmmmmmmmm\n+ 752: 0000000036b40858 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIf12hip_bfloat16EvPKT_PKiPT0_llmmmmmmmmm\n+ 753: 0000000036b40778 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__halffEvPKT_PKiPT0_llmmmmmmmmm\n+ 754: 0000000036b40798 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n+ 755: 0000000036b407a0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n+ 756: 0000000036b407a8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n+ 757: 0000000036b407b0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n+ 758: 0000000036b407b8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n+ 759: 0000000036b40788 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIifEvPKT_PKiPT0_llmmmmmmmmm\n+ 760: 0000000036b40790 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat16fEvPKT_PKiPT0_llmmmmmmmmm\n+ 761: 0000000036b40808 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__halfS0_EvPKT_PKiPT0_llmmmmmmmmm\n+ 762: 0000000036b40828 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n+ 763: 0000000036b40830 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n+ 764: 0000000036b40838 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n+ 765: 0000000036b40840 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n+ 766: 0000000036b40848 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEE6__halfEvS1_PKiPT2_llmmmmmmmmm\n+ 767: 0000000036b40818 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIi6__halfEvPKT_PKiPT0_llmmmmmmmmm\n+ 768: 0000000036b40820 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat166__halfEvPKT_PKiPT0_llmmmmmmmmm\n+ 769: 0000000036b407c0 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__halfiEvPKT_PKiPT0_llmmmmmmmmm\n+ 770: 0000000036b407e0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n+ 771: 0000000036b407e8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n+ 772: 0000000036b407f0 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n+ 773: 0000000036b407f8 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n+ 774: 0000000036b40800 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEEiEvS1_PKiPT2_llmmmmmmmmm\n+ 775: 0000000036b407d0 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIiiEvPKT_PKiPT0_llmmmmmmmmm\n+ 776: 0000000036b407d8 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat16iEvPKT_PKiPT0_llmmmmmmmmm\n+ 777: 0000000036b40850 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI6__half12hip_bfloat16EvPKT_PKiPT0_llmmmmmmmmm\n+ 778: 0000000036b40870 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n+ 779: 0000000036b40878 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n+ 780: 0000000036b40880 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n+ 781: 0000000036b40888 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n+ 782: 0000000036b40890 8 OBJECT LOCAL DEFAULT 21 _ZL10k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n+ 783: 0000000036b40860 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatIi12hip_bfloat16EvPKT_PKiPT0_llmmmmmmmmm\n+ 784: 0000000036b40868 8 OBJECT LOCAL DEFAULT 21 _ZL16k_get_rows_floatI12hip_bfloat16S0_EvPKT_PKiPT0_llmmmmmmmmm\n+ 785: 0000000036b40770 8 OBJECT LOCAL DEFAULT 21 _ZL21k_get_rows_back_floatIffEvPKT_PKiPT0_ll\n 786: 00000000000603b0 162 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__k_get_rows_back_floatIffEvPKT_PKiPT0_ll\n 787: 0000000000060460 305 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__k_get_rows_floatI6__halffEvPKT_PKiPT0_llmmmmmmmmm\n 788: 00000000000605a0 305 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__k_get_rows_floatIffEvPKT_PKiPT0_llmmmmmmmmm\n 789: 00000000000606e0 305 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__k_get_rows_floatIifEvPKT_PKiPT0_llmmmmmmmmm\n 790: 0000000000060820 305 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__k_get_rows_floatI12hip_bfloat16fEvPKT_PKiPT0_llmmmmmmmmm\n 791: 0000000000060960 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n 792: 0000000000060aa0 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEEfEvS1_PKiPT2_llmmmmmmmmm\n@@ -821,116 +821,116 @@\n 817: 00000000000629e0 305 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__k_get_rows_floatI12hip_bfloat16S0_EvPKT_PKiPT0_llmmmmmmmmm\n 818: 0000000000062b20 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n 819: 0000000000062c60 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi2EXadL_ZL15dequantize_q4_1PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n 820: 0000000000062da0 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n 821: 0000000000062ee0 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi2EXadL_ZL15dequantize_q5_1PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n 822: 0000000000063020 305 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__k_get_rowsILi32ELi1EXadL_ZL15dequantize_q8_0PKvliR15HIP_vector_typeIfLj2EEEE12hip_bfloat16EvS1_PKiPT2_llmmmmmmmmm\n 823: 0000000000063160 1758 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 824: 0000000036b45930 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 825: 0000000036b451d0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 824: 0000000036b46930 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 825: 0000000036b461d0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 826: 0000000000063840 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 827: 0000000000000000 0 FILE LOCAL DEFAULT ABS gla.cu\n- 828: 0000000036b3faf0 8 OBJECT LOCAL DEFAULT 21 _ZL21gated_linear_attn_f32ILi128EEviiiifPKfS1_S1_S1_S1_Pf\n- 829: 0000000036b3fae8 8 OBJECT LOCAL DEFAULT 21 _ZL21gated_linear_attn_f32ILi64EEviiiifPKfS1_S1_S1_S1_Pf\n+ 828: 0000000036b40af0 8 OBJECT LOCAL DEFAULT 21 _ZL21gated_linear_attn_f32ILi128EEviiiifPKfS1_S1_S1_S1_Pf\n+ 829: 0000000036b40ae8 8 OBJECT LOCAL DEFAULT 21 _ZL21gated_linear_attn_f32ILi64EEviiiifPKfS1_S1_S1_S1_Pf\n 830: 000000000007a110 259 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__gated_linear_attn_f32ILi64EEviiiifPKfS1_S1_S1_S1_Pf\n 831: 000000000007a220 259 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__gated_linear_attn_f32ILi128EEviiiifPKfS1_S1_S1_S1_Pf\n 832: 000000000007a330 148 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 833: 0000000036b46320 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 834: 0000000036b45200 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 833: 0000000036b47320 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 834: 0000000036b46200 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 835: 000000000007a3d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 836: 0000000000000000 0 FILE LOCAL DEFAULT ABS im2col.cu\n- 837: 0000000036b3faf8 8 OBJECT LOCAL DEFAULT 21 _ZL13im2col_kernelI6__halfEvPKfPT_llllllllllliiiiii\n- 838: 0000000036b3fb00 8 OBJECT LOCAL DEFAULT 21 _ZL13im2col_kernelIfEvPKfPT_llllllllllliiiiii\n+ 837: 0000000036b40af8 8 OBJECT LOCAL DEFAULT 21 _ZL13im2col_kernelI6__halfEvPKfPT_llllllllllliiiiii\n+ 838: 0000000036b40b00 8 OBJECT LOCAL DEFAULT 21 _ZL13im2col_kernelIfEvPKfPT_llllllllllliiiiii\n 839: 000000000007aa80 385 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__im2col_kernelI6__halfEvPKfPT_llllllllllliiiiii\n 840: 000000000007ac10 385 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__im2col_kernelIfEvPKfPT_llllllllllliiiiii\n 841: 000000000007ada0 148 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 842: 0000000036b46328 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 843: 0000000036b45218 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 842: 0000000036b47328 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 843: 0000000036b46218 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 844: 000000000007ae40 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 845: 0000000000000000 0 FILE LOCAL DEFAULT ABS mean.cu\n- 846: 0000000036b3fb08 8 OBJECT LOCAL DEFAULT 21 _ZL15reduce_rows_f32ILb1EEvPKfPfi\n+ 846: 0000000036b40b08 8 OBJECT LOCAL DEFAULT 21 _ZL15reduce_rows_f32ILb1EEvPKfPfi\n 847: 000000000007b040 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__reduce_rows_f32ILb1EEvPKfPfi\n 848: 000000000007b0c0 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 849: 0000000036b46330 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 850: 0000000036b45230 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 849: 0000000036b47330 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 850: 0000000036b46230 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 851: 000000000007b130 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 852: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq.cu\n 853: 000000000007c8a0 144 FUNC LOCAL DEFAULT 12 _ZL31ggml_cuda_mul_mat_q_switch_typeR25ggml_backend_cuda_contextRK8mmq_argsP12ihipStream_t\n- 854: 0000000036aebee4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 855: 0000000036aec00c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n- 856: 0000000036aec01c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 854: 0000000036aecee4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 855: 0000000036aed00c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n+ 856: 0000000036aed01c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n 857: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmv.cu\n 858: 000000000007d7b0 39077 FUNC LOCAL DEFAULT 12 _ZL33mul_mat_vec_cuda_switch_ncols_dstIffEvPKT_PKfPKiPflllllllllllllllllP12ihipStream_t\n 859: 00000000000ab5c0 39077 FUNC LOCAL DEFAULT 12 _ZL33mul_mat_vec_cuda_switch_ncols_dstI12hip_bfloat16fEvPKT_PKfPKiPflllllllllllllllllP12ihipStream_t\n 860: 0000000000096510 39077 FUNC LOCAL DEFAULT 12 _ZL33mul_mat_vec_cuda_switch_ncols_dstI6__halffEvPKT_PKfPKiPflllllllllllllllllP12ihipStream_t\n 861: 000000000008cc60 39077 FUNC LOCAL DEFAULT 12 _ZL33mul_mat_vec_cuda_switch_ncols_dstI6__halfS0_EvPKT_PKfPKiPflllllllllllllllllP12ihipStream_t\n- 862: 0000000036b3fb10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 863: 0000000036b3fb90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 864: 0000000036b3fbd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 865: 0000000036b3fc10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 866: 0000000036b3fcd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 867: 0000000036b3fb50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 868: 0000000036b3fc50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 869: 0000000036b3fc90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 870: 0000000036b3fb18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 871: 0000000036b3fb20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 872: 0000000036b3fb28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 873: 0000000036b3fb30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 874: 0000000036b3fb38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 875: 0000000036b3fb40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 876: 0000000036b3fb48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 877: 0000000036b3fb98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 878: 0000000036b3fba0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 879: 0000000036b3fba8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 880: 0000000036b3fbb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 881: 0000000036b3fbb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 882: 0000000036b3fbc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 883: 0000000036b3fbc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 884: 0000000036b3fbd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 885: 0000000036b3fbe0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 886: 0000000036b3fbe8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 887: 0000000036b3fbf0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 888: 0000000036b3fbf8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 889: 0000000036b3fc00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 890: 0000000036b3fc08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 891: 0000000036b3fc18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 892: 0000000036b3fc20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 893: 0000000036b3fc28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 894: 0000000036b3fc30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 895: 0000000036b3fc38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 896: 0000000036b3fc40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 897: 0000000036b3fc48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 898: 0000000036b3fcd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 899: 0000000036b3fce0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 900: 0000000036b3fce8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 901: 0000000036b3fcf0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 902: 0000000036b3fcf8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 903: 0000000036b3fd00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 904: 0000000036b3fd08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 905: 0000000036b3fb58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 906: 0000000036b3fb60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 907: 0000000036b3fb68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 908: 0000000036b3fb70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 909: 0000000036b3fb78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 910: 0000000036b3fb80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 911: 0000000036b3fb88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 912: 0000000036b3fc58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 913: 0000000036b3fc60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 914: 0000000036b3fc68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 915: 0000000036b3fc70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 916: 0000000036b3fc78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 917: 0000000036b3fc80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 918: 0000000036b3fc88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 919: 0000000036b3fc98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 920: 0000000036b3fca0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 921: 0000000036b3fca8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 922: 0000000036b3fcb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 923: 0000000036b3fcb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 924: 0000000036b3fcc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 925: 0000000036b3fcc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 862: 0000000036b40b10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 863: 0000000036b40b90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 864: 0000000036b40bd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 865: 0000000036b40c10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 866: 0000000036b40cd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 867: 0000000036b40b50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 868: 0000000036b40c50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 869: 0000000036b40c90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 870: 0000000036b40b18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 871: 0000000036b40b20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 872: 0000000036b40b28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 873: 0000000036b40b30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 874: 0000000036b40b38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 875: 0000000036b40b40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 876: 0000000036b40b48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 877: 0000000036b40b98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 878: 0000000036b40ba0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 879: 0000000036b40ba8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 880: 0000000036b40bb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 881: 0000000036b40bb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 882: 0000000036b40bc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 883: 0000000036b40bc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 884: 0000000036b40bd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 885: 0000000036b40be0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 886: 0000000036b40be8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 887: 0000000036b40bf0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 888: 0000000036b40bf8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 889: 0000000036b40c00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 890: 0000000036b40c08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 891: 0000000036b40c18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 892: 0000000036b40c20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 893: 0000000036b40c28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 894: 0000000036b40c30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 895: 0000000036b40c38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 896: 0000000036b40c40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 897: 0000000036b40c48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 898: 0000000036b40cd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 899: 0000000036b40ce0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 900: 0000000036b40ce8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 901: 0000000036b40cf0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 902: 0000000036b40cf8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 903: 0000000036b40d00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 904: 0000000036b40d08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 905: 0000000036b40b58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 906: 0000000036b40b60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 907: 0000000036b40b68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 908: 0000000036b40b70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 909: 0000000036b40b78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 910: 0000000036b40b80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 911: 0000000036b40b88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 912: 0000000036b40c58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 913: 0000000036b40c60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 914: 0000000036b40c68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 915: 0000000036b40c70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 916: 0000000036b40c78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 917: 0000000036b40c80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 918: 0000000036b40c88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 919: 0000000036b40c98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 920: 0000000036b40ca0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 921: 0000000036b40ca8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 922: 0000000036b40cb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 923: 0000000036b40cb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 924: 0000000036b40cc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 925: 0000000036b40cc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecIffLi7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 926: 0000000000087060 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 927: 00000000000871d0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 928: 0000000000087340 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 929: 00000000000874b0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 930: 0000000000087620 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 931: 0000000000087790 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 932: 0000000000087900 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n@@ -987,142 +987,142 @@\n 983: 000000000008c250 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 984: 000000000008c3c0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 985: 000000000008c530 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 986: 000000000008c6a0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 987: 000000000008c810 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 988: 000000000008c980 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 989: 000000000008caf0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecIffLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 990: 0000000036b3fd10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 991: 0000000036b3fd90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 992: 0000000036b3fdd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 993: 0000000036b3fe10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 994: 0000000036b3fed0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 995: 0000000036b3fd50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 996: 0000000036b3fe50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 997: 0000000036b3fe90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 998: 0000000036b3fd18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 999: 0000000036b3fd20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1000: 0000000036b3fd28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1001: 0000000036b3fd30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1002: 0000000036b3fd38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1003: 0000000036b3fd40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1004: 0000000036b3fd48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1005: 0000000036b3fd98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1006: 0000000036b3fda0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1007: 0000000036b3fda8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1008: 0000000036b3fdb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1009: 0000000036b3fdb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1010: 0000000036b3fdc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1011: 0000000036b3fdc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1012: 0000000036b3fdd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1013: 0000000036b3fde0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1014: 0000000036b3fde8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1015: 0000000036b3fdf0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1016: 0000000036b3fdf8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1017: 0000000036b3fe00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1018: 0000000036b3fe08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1019: 0000000036b3fe18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1020: 0000000036b3fe20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1021: 0000000036b3fe28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1022: 0000000036b3fe30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1023: 0000000036b3fe38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1024: 0000000036b3fe40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1025: 0000000036b3fe48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1026: 0000000036b3fed8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1027: 0000000036b3fee0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1028: 0000000036b3fee8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1029: 0000000036b3fef0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1030: 0000000036b3fef8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1031: 0000000036b3ff00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1032: 0000000036b3ff08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1033: 0000000036b3fd58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1034: 0000000036b3fd60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1035: 0000000036b3fd68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1036: 0000000036b3fd70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1037: 0000000036b3fd78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1038: 0000000036b3fd80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1039: 0000000036b3fd88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1040: 0000000036b3fe58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1041: 0000000036b3fe60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1042: 0000000036b3fe68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1043: 0000000036b3fe70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1044: 0000000036b3fe78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1045: 0000000036b3fe80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1046: 0000000036b3fe88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1047: 0000000036b3fe98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1048: 0000000036b3fea0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1049: 0000000036b3fea8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1050: 0000000036b3feb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1051: 0000000036b3feb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1052: 0000000036b3fec0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1053: 0000000036b3fec8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1054: 0000000036b3ff10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1055: 0000000036b3ff90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1056: 0000000036b3ffd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1057: 0000000036b40010 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1058: 0000000036b400d0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1059: 0000000036b3ff50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1060: 0000000036b40050 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1061: 0000000036b40090 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1062: 0000000036b3ff18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1063: 0000000036b3ff20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1064: 0000000036b3ff28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1065: 0000000036b3ff30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1066: 0000000036b3ff38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1067: 0000000036b3ff40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1068: 0000000036b3ff48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1069: 0000000036b3ff98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1070: 0000000036b3ffa0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1071: 0000000036b3ffa8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1072: 0000000036b3ffb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1073: 0000000036b3ffb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1074: 0000000036b3ffc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1075: 0000000036b3ffc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1076: 0000000036b3ffd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1077: 0000000036b3ffe0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1078: 0000000036b3ffe8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1079: 0000000036b3fff0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1080: 0000000036b3fff8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1081: 0000000036b40000 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1082: 0000000036b40008 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1083: 0000000036b40018 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1084: 0000000036b40020 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1085: 0000000036b40028 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1086: 0000000036b40030 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1087: 0000000036b40038 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1088: 0000000036b40040 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1089: 0000000036b40048 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1090: 0000000036b400d8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1091: 0000000036b400e0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1092: 0000000036b400e8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1093: 0000000036b400f0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1094: 0000000036b400f8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1095: 0000000036b40100 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1096: 0000000036b40108 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1097: 0000000036b3ff58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1098: 0000000036b3ff60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1099: 0000000036b3ff68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1100: 0000000036b3ff70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1101: 0000000036b3ff78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1102: 0000000036b3ff80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1103: 0000000036b3ff88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1104: 0000000036b40058 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1105: 0000000036b40060 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1106: 0000000036b40068 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1107: 0000000036b40070 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1108: 0000000036b40078 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1109: 0000000036b40080 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1110: 0000000036b40088 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1111: 0000000036b40098 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1112: 0000000036b400a0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1113: 0000000036b400a8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1114: 0000000036b400b0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1115: 0000000036b400b8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1116: 0000000036b400c0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1117: 0000000036b400c8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 990: 0000000036b40d10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 991: 0000000036b40d90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 992: 0000000036b40dd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 993: 0000000036b40e10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 994: 0000000036b40ed0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 995: 0000000036b40d50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 996: 0000000036b40e50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 997: 0000000036b40e90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 998: 0000000036b40d18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 999: 0000000036b40d20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1000: 0000000036b40d28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1001: 0000000036b40d30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1002: 0000000036b40d38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1003: 0000000036b40d40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1004: 0000000036b40d48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1005: 0000000036b40d98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1006: 0000000036b40da0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1007: 0000000036b40da8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1008: 0000000036b40db0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1009: 0000000036b40db8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1010: 0000000036b40dc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1011: 0000000036b40dc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1012: 0000000036b40dd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1013: 0000000036b40de0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1014: 0000000036b40de8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1015: 0000000036b40df0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1016: 0000000036b40df8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1017: 0000000036b40e00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1018: 0000000036b40e08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1019: 0000000036b40e18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1020: 0000000036b40e20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1021: 0000000036b40e28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1022: 0000000036b40e30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1023: 0000000036b40e38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1024: 0000000036b40e40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1025: 0000000036b40e48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1026: 0000000036b40ed8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1027: 0000000036b40ee0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1028: 0000000036b40ee8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1029: 0000000036b40ef0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1030: 0000000036b40ef8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1031: 0000000036b40f00 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1032: 0000000036b40f08 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1033: 0000000036b40d58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1034: 0000000036b40d60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1035: 0000000036b40d68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1036: 0000000036b40d70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1037: 0000000036b40d78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1038: 0000000036b40d80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1039: 0000000036b40d88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1040: 0000000036b40e58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1041: 0000000036b40e60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1042: 0000000036b40e68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1043: 0000000036b40e70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1044: 0000000036b40e78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1045: 0000000036b40e80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1046: 0000000036b40e88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1047: 0000000036b40e98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1048: 0000000036b40ea0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1049: 0000000036b40ea8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1050: 0000000036b40eb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1051: 0000000036b40eb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1052: 0000000036b40ec0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1053: 0000000036b40ec8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halfS0_Li7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1054: 0000000036b40f10 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1055: 0000000036b40f90 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1056: 0000000036b40fd0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1057: 0000000036b41010 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1058: 0000000036b410d0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1059: 0000000036b40f50 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1060: 0000000036b41050 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1061: 0000000036b41090 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1062: 0000000036b40f18 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1063: 0000000036b40f20 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1064: 0000000036b40f28 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1065: 0000000036b40f30 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1066: 0000000036b40f38 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1067: 0000000036b40f40 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1068: 0000000036b40f48 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1069: 0000000036b40f98 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1070: 0000000036b40fa0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1071: 0000000036b40fa8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1072: 0000000036b40fb0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1073: 0000000036b40fb8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1074: 0000000036b40fc0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1075: 0000000036b40fc8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1076: 0000000036b40fd8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1077: 0000000036b40fe0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1078: 0000000036b40fe8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1079: 0000000036b40ff0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1080: 0000000036b40ff8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1081: 0000000036b41000 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1082: 0000000036b41008 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1083: 0000000036b41018 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1084: 0000000036b41020 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1085: 0000000036b41028 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1086: 0000000036b41030 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1087: 0000000036b41038 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1088: 0000000036b41040 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1089: 0000000036b41048 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1090: 0000000036b410d8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1091: 0000000036b410e0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1092: 0000000036b410e8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1093: 0000000036b410f0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1094: 0000000036b410f8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1095: 0000000036b41100 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1096: 0000000036b41108 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1097: 0000000036b40f58 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1098: 0000000036b40f60 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1099: 0000000036b40f68 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1100: 0000000036b40f70 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1101: 0000000036b40f78 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1102: 0000000036b40f80 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1103: 0000000036b40f88 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1104: 0000000036b41058 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1105: 0000000036b41060 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1106: 0000000036b41068 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1107: 0000000036b41070 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1108: 0000000036b41078 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1109: 0000000036b41080 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1110: 0000000036b41088 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1111: 0000000036b41098 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1112: 0000000036b410a0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1113: 0000000036b410a8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1114: 0000000036b410b0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1115: 0000000036b410b8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1116: 0000000036b410c0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1117: 0000000036b410c8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI6__halffLi7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1118: 000000000009fdc0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1119: 000000000009ff30 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1120: 00000000000a00a0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1121: 00000000000a0210 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1122: 00000000000a0380 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1123: 00000000000a04f0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1124: 00000000000a0660 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halfS0_Li1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n@@ -1243,78 +1243,78 @@\n 1239: 00000000000aabb0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1240: 00000000000aad20 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1241: 00000000000aae90 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1242: 00000000000ab000 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1243: 00000000000ab170 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1244: 00000000000ab2e0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1245: 00000000000ab450 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI6__halffLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1246: 0000000036b40110 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1247: 0000000036b40190 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1248: 0000000036b401d0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1249: 0000000036b40210 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1250: 0000000036b402d0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1251: 0000000036b40150 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1252: 0000000036b40250 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1253: 0000000036b40290 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1254: 0000000036b40118 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1255: 0000000036b40120 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1256: 0000000036b40128 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1257: 0000000036b40130 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1258: 0000000036b40138 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1259: 0000000036b40140 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1260: 0000000036b40148 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1261: 0000000036b40198 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1262: 0000000036b401a0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1263: 0000000036b401a8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1264: 0000000036b401b0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1265: 0000000036b401b8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1266: 0000000036b401c0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1267: 0000000036b401c8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1268: 0000000036b401d8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1269: 0000000036b401e0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1270: 0000000036b401e8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1271: 0000000036b401f0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1272: 0000000036b401f8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1273: 0000000036b40200 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1274: 0000000036b40208 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1275: 0000000036b40218 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1276: 0000000036b40220 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1277: 0000000036b40228 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1278: 0000000036b40230 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1279: 0000000036b40238 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1280: 0000000036b40240 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1281: 0000000036b40248 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1282: 0000000036b402d8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1283: 0000000036b402e0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1284: 0000000036b402e8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1285: 0000000036b402f0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1286: 0000000036b402f8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1287: 0000000036b40300 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1288: 0000000036b40308 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1289: 0000000036b40158 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1290: 0000000036b40160 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1291: 0000000036b40168 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1292: 0000000036b40170 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1293: 0000000036b40178 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1294: 0000000036b40180 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1295: 0000000036b40188 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1296: 0000000036b40258 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1297: 0000000036b40260 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1298: 0000000036b40268 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1299: 0000000036b40270 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1300: 0000000036b40278 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1301: 0000000036b40280 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1302: 0000000036b40288 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1303: 0000000036b40298 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1304: 0000000036b402a0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1305: 0000000036b402a8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1306: 0000000036b402b0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1307: 0000000036b402b8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1308: 0000000036b402c0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n- 1309: 0000000036b402c8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1246: 0000000036b41110 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1247: 0000000036b41190 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1248: 0000000036b411d0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1249: 0000000036b41210 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1250: 0000000036b412d0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1251: 0000000036b41150 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1252: 0000000036b41250 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1253: 0000000036b41290 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1254: 0000000036b41118 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1255: 0000000036b41120 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1256: 0000000036b41128 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1257: 0000000036b41130 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1258: 0000000036b41138 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1259: 0000000036b41140 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1260: 0000000036b41148 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi1ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1261: 0000000036b41198 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1262: 0000000036b411a0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1263: 0000000036b411a8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1264: 0000000036b411b0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1265: 0000000036b411b8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1266: 0000000036b411c0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1267: 0000000036b411c8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi3ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1268: 0000000036b411d8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1269: 0000000036b411e0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1270: 0000000036b411e8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1271: 0000000036b411f0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1272: 0000000036b411f8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1273: 0000000036b41200 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1274: 0000000036b41208 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi4ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1275: 0000000036b41218 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1276: 0000000036b41220 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1277: 0000000036b41228 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1278: 0000000036b41230 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1279: 0000000036b41238 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1280: 0000000036b41240 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1281: 0000000036b41248 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi5ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1282: 0000000036b412d8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1283: 0000000036b412e0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1284: 0000000036b412e8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1285: 0000000036b412f0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1286: 0000000036b412f8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1287: 0000000036b41300 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1288: 0000000036b41308 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1289: 0000000036b41158 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1290: 0000000036b41160 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1291: 0000000036b41168 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1292: 0000000036b41170 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1293: 0000000036b41178 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1294: 0000000036b41180 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1295: 0000000036b41188 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi2ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1296: 0000000036b41258 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1297: 0000000036b41260 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1298: 0000000036b41268 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1299: 0000000036b41270 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1300: 0000000036b41278 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1301: 0000000036b41280 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1302: 0000000036b41288 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi6ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1303: 0000000036b41298 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1304: 0000000036b412a0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1305: 0000000036b412a8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1306: 0000000036b412b0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1307: 0000000036b412b8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1308: 0000000036b412c0 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n+ 1309: 0000000036b412c8 8 OBJECT LOCAL DEFAULT 21 _ZL11mul_mat_vecI12hip_bfloat16fLi7ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1310: 00000000000b4e70 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi32EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1311: 00000000000b4fe0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi64EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1312: 00000000000b5150 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi96EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1313: 00000000000b52c0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1314: 00000000000b5430 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1315: 00000000000b55a0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1316: 00000000000b5710 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi1ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n@@ -1373,172 +1373,172 @@\n 1369: 00000000000ba340 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi8ELi128EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1370: 00000000000ba4b0 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi8ELi160EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1371: 00000000000ba620 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi8ELi192EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1372: 00000000000ba790 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi8ELi224EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1373: 00000000000ba900 356 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__mul_mat_vecI12hip_bfloat16fLi8ELi256EEvPKT_PKfPKiPfiiiiiiiiiiiii\n 1374: 00000000000baa70 11787 FUNC LOCAL DEFAULT 12 __hip_register_globals\n 1375: 00000000000bd880 53 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1376: 0000000036b46338 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1377: 0000000036b45248 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1376: 0000000036b47338 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1377: 0000000036b46248 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1378: 00000000000bd8c0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1379: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmvq.cu\n 1380: 00000000000be010 90971 FUNC LOCAL DEFAULT 12 _ZL25mul_mat_vec_q_switch_typePKv9ggml_typeS0_PKiPfiiiiiiiiiiiiiiiiiP12ihipStream_t\n- 1381: 0000000036aec02c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 1382: 0000000036b40310 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1383: 0000000036b40350 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1384: 0000000036b40390 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1385: 0000000036b403d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1386: 0000000036b40410 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1387: 0000000036b40450 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1388: 0000000036b40490 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1389: 0000000036b404d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1390: 0000000036b40510 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1391: 0000000036b40550 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1392: 0000000036b40590 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1393: 0000000036b405d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1394: 0000000036b40650 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1395: 0000000036b40690 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1396: 0000000036b40710 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1397: 0000000036b40790 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1398: 0000000036b40610 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1399: 0000000036b40750 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1400: 0000000036b406d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1401: 0000000036b40318 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1402: 0000000036b40320 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1403: 0000000036b40328 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1404: 0000000036b40330 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1405: 0000000036b40338 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1406: 0000000036b40340 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1407: 0000000036b40348 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1408: 0000000036b40358 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1409: 0000000036b40360 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1410: 0000000036b40368 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1411: 0000000036b40370 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1412: 0000000036b40378 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1413: 0000000036b40380 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1414: 0000000036b40388 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1415: 0000000036b40398 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1416: 0000000036b403a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1417: 0000000036b403a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1418: 0000000036b403b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1419: 0000000036b403b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1420: 0000000036b403c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1421: 0000000036b403c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1422: 0000000036b403d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1423: 0000000036b403e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1424: 0000000036b403e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1425: 0000000036b403f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1426: 0000000036b403f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1427: 0000000036b40400 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1428: 0000000036b40408 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1429: 0000000036b40418 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1430: 0000000036b40420 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1431: 0000000036b40428 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1432: 0000000036b40430 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1433: 0000000036b40438 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1434: 0000000036b40440 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1435: 0000000036b40448 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1436: 0000000036b40458 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1437: 0000000036b40460 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1438: 0000000036b40468 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1439: 0000000036b40470 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1440: 0000000036b40478 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1441: 0000000036b40480 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1442: 0000000036b40488 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1443: 0000000036b40498 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1444: 0000000036b404a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1445: 0000000036b404a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1446: 0000000036b404b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1447: 0000000036b404b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1448: 0000000036b404c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1449: 0000000036b404c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1450: 0000000036b404d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1451: 0000000036b404e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1452: 0000000036b404e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1453: 0000000036b404f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1454: 0000000036b404f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1455: 0000000036b40500 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1456: 0000000036b40508 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1457: 0000000036b40518 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1458: 0000000036b40520 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1459: 0000000036b40528 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1460: 0000000036b40530 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1461: 0000000036b40538 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1462: 0000000036b40540 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1463: 0000000036b40548 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1464: 0000000036b40558 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1465: 0000000036b40560 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1466: 0000000036b40568 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1467: 0000000036b40570 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1468: 0000000036b40578 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1469: 0000000036b40580 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1470: 0000000036b40588 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1471: 0000000036b40598 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1472: 0000000036b405a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1473: 0000000036b405a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1474: 0000000036b405b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1475: 0000000036b405b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1476: 0000000036b405c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1477: 0000000036b405c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1478: 0000000036b405d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1479: 0000000036b405e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1480: 0000000036b405e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1481: 0000000036b405f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1482: 0000000036b405f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1483: 0000000036b40600 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1484: 0000000036b40608 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1485: 0000000036b40658 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1486: 0000000036b40660 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1487: 0000000036b40668 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1488: 0000000036b40670 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1489: 0000000036b40678 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1490: 0000000036b40680 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1491: 0000000036b40688 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1492: 0000000036b40698 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1493: 0000000036b406a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1494: 0000000036b406a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1495: 0000000036b406b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1496: 0000000036b406b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1497: 0000000036b406c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1498: 0000000036b406c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1499: 0000000036b40718 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1500: 0000000036b40720 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1501: 0000000036b40728 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1502: 0000000036b40730 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1503: 0000000036b40738 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1504: 0000000036b40740 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1505: 0000000036b40748 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1506: 0000000036b40798 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1507: 0000000036b407a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1508: 0000000036b407a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1509: 0000000036b407b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1510: 0000000036b407b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1511: 0000000036b407c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1512: 0000000036b407c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1513: 0000000036b40618 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1514: 0000000036b40620 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1515: 0000000036b40628 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1516: 0000000036b40630 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1517: 0000000036b40638 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1518: 0000000036b40640 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1519: 0000000036b40648 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1520: 0000000036b40758 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1521: 0000000036b40760 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1522: 0000000036b40768 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1523: 0000000036b40770 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1524: 0000000036b40778 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1525: 0000000036b40780 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1526: 0000000036b40788 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1527: 0000000036b406d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1528: 0000000036b406e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1529: 0000000036b406e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1530: 0000000036b406f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1531: 0000000036b406f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1532: 0000000036b40700 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n- 1533: 0000000036b40708 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1381: 0000000036aed02c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 1382: 0000000036b41310 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1383: 0000000036b41350 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1384: 0000000036b41390 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1385: 0000000036b413d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1386: 0000000036b41410 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1387: 0000000036b41450 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1388: 0000000036b41490 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1389: 0000000036b414d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1390: 0000000036b41510 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1391: 0000000036b41550 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1392: 0000000036b41590 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1393: 0000000036b415d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1394: 0000000036b41650 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1395: 0000000036b41690 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1396: 0000000036b41710 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1397: 0000000036b41790 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1398: 0000000036b41610 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1399: 0000000036b41750 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1400: 0000000036b416d0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1401: 0000000036b41318 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1402: 0000000036b41320 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1403: 0000000036b41328 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1404: 0000000036b41330 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1405: 0000000036b41338 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1406: 0000000036b41340 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1407: 0000000036b41348 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type2ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1408: 0000000036b41358 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1409: 0000000036b41360 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1410: 0000000036b41368 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1411: 0000000036b41370 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1412: 0000000036b41378 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1413: 0000000036b41380 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1414: 0000000036b41388 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type3ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1415: 0000000036b41398 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1416: 0000000036b413a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1417: 0000000036b413a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1418: 0000000036b413b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1419: 0000000036b413b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1420: 0000000036b413c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1421: 0000000036b413c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type6ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1422: 0000000036b413d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1423: 0000000036b413e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1424: 0000000036b413e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1425: 0000000036b413f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1426: 0000000036b413f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1427: 0000000036b41400 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1428: 0000000036b41408 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type7ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1429: 0000000036b41418 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1430: 0000000036b41420 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1431: 0000000036b41428 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1432: 0000000036b41430 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1433: 0000000036b41438 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1434: 0000000036b41440 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1435: 0000000036b41448 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type8ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1436: 0000000036b41458 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1437: 0000000036b41460 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1438: 0000000036b41468 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1439: 0000000036b41470 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1440: 0000000036b41478 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1441: 0000000036b41480 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1442: 0000000036b41488 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type10ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1443: 0000000036b41498 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1444: 0000000036b414a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1445: 0000000036b414a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1446: 0000000036b414b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1447: 0000000036b414b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1448: 0000000036b414c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1449: 0000000036b414c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type11ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1450: 0000000036b414d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1451: 0000000036b414e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1452: 0000000036b414e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1453: 0000000036b414f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1454: 0000000036b414f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1455: 0000000036b41500 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1456: 0000000036b41508 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type12ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1457: 0000000036b41518 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1458: 0000000036b41520 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1459: 0000000036b41528 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1460: 0000000036b41530 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1461: 0000000036b41538 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1462: 0000000036b41540 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1463: 0000000036b41548 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type13ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1464: 0000000036b41558 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1465: 0000000036b41560 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1466: 0000000036b41568 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1467: 0000000036b41570 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1468: 0000000036b41578 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1469: 0000000036b41580 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1470: 0000000036b41588 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type14ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1471: 0000000036b41598 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1472: 0000000036b415a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1473: 0000000036b415a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1474: 0000000036b415b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1475: 0000000036b415b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1476: 0000000036b415c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1477: 0000000036b415c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type16ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1478: 0000000036b415d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1479: 0000000036b415e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1480: 0000000036b415e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1481: 0000000036b415f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1482: 0000000036b415f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1483: 0000000036b41600 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1484: 0000000036b41608 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type17ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1485: 0000000036b41658 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1486: 0000000036b41660 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1487: 0000000036b41668 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1488: 0000000036b41670 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1489: 0000000036b41678 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1490: 0000000036b41680 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1491: 0000000036b41688 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type18ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1492: 0000000036b41698 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1493: 0000000036b416a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1494: 0000000036b416a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1495: 0000000036b416b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1496: 0000000036b416b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1497: 0000000036b416c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1498: 0000000036b416c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type19ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1499: 0000000036b41718 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1500: 0000000036b41720 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1501: 0000000036b41728 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1502: 0000000036b41730 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1503: 0000000036b41738 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1504: 0000000036b41740 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1505: 0000000036b41748 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type20ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1506: 0000000036b41798 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1507: 0000000036b417a0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1508: 0000000036b417a8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1509: 0000000036b417b0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1510: 0000000036b417b8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1511: 0000000036b417c0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1512: 0000000036b417c8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type21ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1513: 0000000036b41618 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1514: 0000000036b41620 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1515: 0000000036b41628 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1516: 0000000036b41630 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1517: 0000000036b41638 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1518: 0000000036b41640 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1519: 0000000036b41648 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type22ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1520: 0000000036b41758 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1521: 0000000036b41760 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1522: 0000000036b41768 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1523: 0000000036b41770 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1524: 0000000036b41778 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1525: 0000000036b41780 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1526: 0000000036b41788 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type23ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1527: 0000000036b416d8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1528: 0000000036b416e0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1529: 0000000036b416e8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1530: 0000000036b416f0 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1531: 0000000036b416f8 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1532: 0000000036b41700 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n+ 1533: 0000000036b41708 8 OBJECT LOCAL DEFAULT 21 _ZL13mul_mat_vec_qIL9ggml_type29ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1534: 00000000000d4470 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi1EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1535: 00000000000d45e0 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi2EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1536: 00000000000d4750 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1537: 00000000000d48c0 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1538: 00000000000d4a30 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1539: 00000000000d4ba0 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1540: 00000000000d4d10 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type2ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n@@ -1684,111 +1684,111 @@\n 1680: 00000000000e1650 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type21ELi3EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1681: 00000000000e17c0 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type21ELi4EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1682: 00000000000e1930 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type21ELi5EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1683: 00000000000e1aa0 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type21ELi6EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1684: 00000000000e1c10 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type21ELi7EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1685: 00000000000e1d80 356 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__mul_mat_vec_qIL9ggml_type21ELi8EEvPKvS2_PKiPfiiiiiiiiiiiii\n 1686: 00000000000e1ef0 7048 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1687: 0000000036b46340 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1688: 0000000036b45260 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1687: 0000000036b47340 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1688: 0000000036b46260 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1689: 00000000000e3a80 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1690: 0000000000000000 0 FILE LOCAL DEFAULT ABS norm.cu\n- 1691: 0000000036b407d0 8 OBJECT LOCAL DEFAULT 21 _ZL8norm_f32ILi32EEvPKfPfilllf\n- 1692: 0000000036b407d8 8 OBJECT LOCAL DEFAULT 21 _ZL8norm_f32ILi1024EEvPKfPfilllf\n- 1693: 0000000036b407e0 8 OBJECT LOCAL DEFAULT 21 _ZL14group_norm_f32ILi32EEvPKfPfiif\n- 1694: 0000000036b407e8 8 OBJECT LOCAL DEFAULT 21 _ZL14group_norm_f32ILi1024EEvPKfPfiif\n- 1695: 0000000036b407f0 8 OBJECT LOCAL DEFAULT 21 _ZL12rms_norm_f32ILi32EEvPKfPfilllf\n- 1696: 0000000036b407f8 8 OBJECT LOCAL DEFAULT 21 _ZL12rms_norm_f32ILi1024EEvPKfPfilllf\n- 1697: 0000000036b40800 8 OBJECT LOCAL DEFAULT 21 _ZL17rms_norm_back_f32ILi32EEvPKfS1_Pfif\n- 1698: 0000000036b40808 8 OBJECT LOCAL DEFAULT 21 _ZL17rms_norm_back_f32ILi1024EEvPKfS1_Pfif\n- 1699: 0000000036b40810 8 OBJECT LOCAL DEFAULT 21 _ZL11l2_norm_f32ILi32EEvPKfPfilllf\n- 1700: 0000000036b40818 8 OBJECT LOCAL DEFAULT 21 _ZL11l2_norm_f32ILi1024EEvPKfPfilllf\n+ 1691: 0000000036b417d0 8 OBJECT LOCAL DEFAULT 21 _ZL8norm_f32ILi32EEvPKfPfilllf\n+ 1692: 0000000036b417d8 8 OBJECT LOCAL DEFAULT 21 _ZL8norm_f32ILi1024EEvPKfPfilllf\n+ 1693: 0000000036b417e0 8 OBJECT LOCAL DEFAULT 21 _ZL14group_norm_f32ILi32EEvPKfPfiif\n+ 1694: 0000000036b417e8 8 OBJECT LOCAL DEFAULT 21 _ZL14group_norm_f32ILi1024EEvPKfPfiif\n+ 1695: 0000000036b417f0 8 OBJECT LOCAL DEFAULT 21 _ZL12rms_norm_f32ILi32EEvPKfPfilllf\n+ 1696: 0000000036b417f8 8 OBJECT LOCAL DEFAULT 21 _ZL12rms_norm_f32ILi1024EEvPKfPfilllf\n+ 1697: 0000000036b41800 8 OBJECT LOCAL DEFAULT 21 _ZL17rms_norm_back_f32ILi32EEvPKfS1_Pfif\n+ 1698: 0000000036b41808 8 OBJECT LOCAL DEFAULT 21 _ZL17rms_norm_back_f32ILi1024EEvPKfS1_Pfif\n+ 1699: 0000000036b41810 8 OBJECT LOCAL DEFAULT 21 _ZL11l2_norm_f32ILi32EEvPKfPfilllf\n+ 1700: 0000000036b41818 8 OBJECT LOCAL DEFAULT 21 _ZL11l2_norm_f32ILi1024EEvPKfPfilllf\n 1701: 00000000000e4db0 195 FUNC LOCAL DEFAULT 12 _ZL23__device_stub__norm_f32ILi32EEvPKfPfilllf\n 1702: 00000000000e4e80 195 FUNC LOCAL DEFAULT 12 _ZL23__device_stub__norm_f32ILi1024EEvPKfPfilllf\n 1703: 00000000000e4f50 155 FUNC LOCAL DEFAULT 12 _ZL29__device_stub__group_norm_f32ILi32EEvPKfPfiif\n 1704: 00000000000e4ff0 155 FUNC LOCAL DEFAULT 12 _ZL29__device_stub__group_norm_f32ILi1024EEvPKfPfiif\n 1705: 00000000000e5090 195 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__rms_norm_f32ILi32EEvPKfPfilllf\n 1706: 00000000000e5160 195 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__rms_norm_f32ILi1024EEvPKfPfilllf\n 1707: 00000000000e5230 153 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__rms_norm_back_f32ILi32EEvPKfS1_Pfif\n 1708: 00000000000e52d0 153 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__rms_norm_back_f32ILi1024EEvPKfS1_Pfif\n 1709: 00000000000e5370 195 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__l2_norm_f32ILi32EEvPKfPfilllf\n 1710: 00000000000e5440 195 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__l2_norm_f32ILi1024EEvPKfPfilllf\n 1711: 00000000000e5510 516 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1712: 0000000036b46348 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1713: 0000000036b45278 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1712: 0000000036b47348 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1713: 0000000036b46278 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1714: 00000000000e5720 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1715: 0000000000000000 0 FILE LOCAL DEFAULT ABS opt-step-adamw.cu\n- 1716: 0000000036b40820 8 OBJECT LOCAL DEFAULT 21 _ZL18opt_step_adamw_f32PfPKfS_S_S1_l\n+ 1716: 0000000036b41820 8 OBJECT LOCAL DEFAULT 21 _ZL18opt_step_adamw_f32PfPKfS_S_S1_l\n 1717: 00000000000e5be0 177 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__opt_step_adamw_f32PfPKfS_S_S1_l\n 1718: 00000000000e5ca0 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1719: 0000000036b46350 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1720: 0000000036b45290 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1719: 0000000036b47350 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1720: 0000000036b46290 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1721: 00000000000e5d10 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1722: 0000000000000000 0 FILE LOCAL DEFAULT ABS out-prod.cu\n 1723: 00000000000e6370 33 FUNC LOCAL DEFAULT 12 _ZL20cublas_get_error_str15hipblasStatus_t\n 1724: 0000000000000000 0 FILE LOCAL DEFAULT ABS pad.cu\n- 1725: 0000000036b40828 8 OBJECT LOCAL DEFAULT 21 _ZL7pad_f32PKfPfiiiii\n+ 1725: 0000000036b41828 8 OBJECT LOCAL DEFAULT 21 _ZL7pad_f32PKfPfiiiii\n 1726: 00000000000e65f0 185 FUNC LOCAL DEFAULT 12 _ZL22__device_stub__pad_f32PKfPfiiiii\n 1727: 00000000000e66b0 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1728: 0000000036b46358 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1729: 0000000036b452a8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1728: 0000000036b47358 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1729: 0000000036b462a8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1730: 00000000000e6720 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1731: 0000000000000000 0 FILE LOCAL DEFAULT ABS pool2d.cu\n- 1732: 0000000036b40830 8 OBJECT LOCAL DEFAULT 21 _ZL18pool2d_nchw_kernelIffEviiiiiiiiiiiPKT_PT0_12ggml_op_pool\n+ 1732: 0000000036b41830 8 OBJECT LOCAL DEFAULT 21 _ZL18pool2d_nchw_kernelIffEviiiiiiiiiiiPKT_PT0_12ggml_op_pool\n 1733: 00000000000e6a60 298 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__pool2d_nchw_kernelIffEviiiiiiiiiiiPKT_PT0_12ggml_op_pool\n 1734: 00000000000e6b90 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1735: 0000000036b46360 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1736: 0000000036b452c0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1735: 0000000036b47360 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1736: 0000000036b462c0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1737: 00000000000e6c00 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1738: 0000000000000000 0 FILE LOCAL DEFAULT ABS quantize.cu\n- 1739: 0000000036b40838 8 OBJECT LOCAL DEFAULT 21 _ZL13quantize_q8_1PKfPvlllllii\n+ 1739: 0000000036b41838 8 OBJECT LOCAL DEFAULT 21 _ZL13quantize_q8_1PKfPvlllllii\n 1740: 00000000000e6e20 225 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__quantize_q8_1PKfPvlllllii\n- 1741: 0000000036b40840 8 OBJECT LOCAL DEFAULT 21 _ZL17quantize_mmq_q8_1IL18mmq_q8_1_ds_layout0EEvPKfPKiPvlllllii\n- 1742: 0000000036b40848 8 OBJECT LOCAL DEFAULT 21 _ZL17quantize_mmq_q8_1IL18mmq_q8_1_ds_layout1EEvPKfPKiPvlllllii\n- 1743: 0000000036b40850 8 OBJECT LOCAL DEFAULT 21 _ZL17quantize_mmq_q8_1IL18mmq_q8_1_ds_layout2EEvPKfPKiPvlllllii\n+ 1741: 0000000036b41840 8 OBJECT LOCAL DEFAULT 21 _ZL17quantize_mmq_q8_1IL18mmq_q8_1_ds_layout0EEvPKfPKiPvlllllii\n+ 1742: 0000000036b41848 8 OBJECT LOCAL DEFAULT 21 _ZL17quantize_mmq_q8_1IL18mmq_q8_1_ds_layout1EEvPKfPKiPvlllllii\n+ 1743: 0000000036b41850 8 OBJECT LOCAL DEFAULT 21 _ZL17quantize_mmq_q8_1IL18mmq_q8_1_ds_layout2EEvPKfPKiPvlllllii\n 1744: 00000000000e73c0 241 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__quantize_mmq_q8_1IL18mmq_q8_1_ds_layout0EEvPKfPKiPvlllllii\n 1745: 00000000000e74c0 241 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__quantize_mmq_q8_1IL18mmq_q8_1_ds_layout1EEvPKfPKiPvlllllii\n 1746: 00000000000e75c0 241 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__quantize_mmq_q8_1IL18mmq_q8_1_ds_layout2EEvPKfPKiPvlllllii\n 1747: 00000000000e76c0 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1748: 0000000036b46368 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1749: 0000000036b452d8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1748: 0000000036b47368 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1749: 0000000036b462d8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1750: 00000000000e77b0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1751: 0000000000000000 0 FILE LOCAL DEFAULT ABS rope.cu\n- 1752: 0000000036b40880 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1753: 0000000036b40860 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1754: 0000000036b408a0 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1755: 0000000036b40870 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1756: 0000000036b408c0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1757: 0000000036b40890 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1758: 0000000036b40858 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1759: 0000000036b40868 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1760: 0000000036b408b0 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1761: 0000000036b408d0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1762: 0000000036b40878 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1763: 0000000036b40888 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1764: 0000000036b40898 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1765: 0000000036b408b8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1766: 0000000036b408a8 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1767: 0000000036b408c8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1768: 0000000036b40900 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1769: 0000000036b408e0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1770: 0000000036b40920 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1771: 0000000036b408f0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1772: 0000000036b40940 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1773: 0000000036b40910 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1774: 0000000036b408d8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1775: 0000000036b408e8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1776: 0000000036b40930 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1777: 0000000036b40950 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n- 1778: 0000000036b408f8 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1779: 0000000036b40908 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1780: 0000000036b40918 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1781: 0000000036b40938 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n- 1782: 0000000036b40928 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n- 1783: 0000000036b40948 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1752: 0000000036b41880 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1753: 0000000036b41860 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1754: 0000000036b418a0 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1755: 0000000036b41870 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1756: 0000000036b418c0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1757: 0000000036b41890 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1758: 0000000036b41858 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1759: 0000000036b41868 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb1ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1760: 0000000036b418b0 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1761: 0000000036b418d0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1762: 0000000036b41878 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1763: 0000000036b41888 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb1ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1764: 0000000036b41898 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1765: 0000000036b418b8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1766: 0000000036b418a8 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb1ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1767: 0000000036b418c8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb1ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1768: 0000000036b41900 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1769: 0000000036b418e0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1770: 0000000036b41920 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1771: 0000000036b418f0 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1772: 0000000036b41940 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1773: 0000000036b41910 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1774: 0000000036b418d8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1775: 0000000036b418e8 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_neoxILb0ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1776: 0000000036b41930 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1777: 0000000036b41950 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1778: 0000000036b418f8 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1779: 0000000036b41908 8 OBJECT LOCAL DEFAULT 21 _ZL10rope_multiILb0ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1780: 0000000036b41918 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1781: 0000000036b41938 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n+ 1782: 0000000036b41928 8 OBJECT LOCAL DEFAULT 21 _ZL11rope_visionILb0ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n+ 1783: 0000000036b41948 8 OBJECT LOCAL DEFAULT 21 _ZL9rope_normILb0ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n 1784: 00000000000e7800 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_neoxILb1ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n 1785: 00000000000e7950 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_neoxILb1ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n 1786: 00000000000e7aa0 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_neoxILb1ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n 1787: 00000000000e7bf0 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_neoxILb1ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n 1788: 00000000000e7d40 358 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__rope_multiILb1ELb0EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n 1789: 00000000000e7eb0 358 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__rope_multiILb1ELb1EfEvPKT1_PS0_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n 1790: 00000000000e8020 358 FUNC LOCAL DEFAULT 12 _ZL25__device_stub__rope_multiILb1ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n@@ -1814,46 +1814,46 @@\n 1810: 00000000000e9be0 358 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__rope_visionILb0ELb0E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n 1811: 00000000000e9d50 358 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__rope_visionILb0ELb1E6__halfEvPKT1_PS1_iiiiiiPKifff14rope_corr_dimsfPKf14mrope_sections\n 1812: 00000000000e9ec0 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_normILb0ELb0EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n 1813: 00000000000ea010 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_normILb0ELb1EfEvPKT1_PS0_iiiiiPKifff14rope_corr_dimsfPKf\n 1814: 00000000000ea160 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_normILb0ELb0E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n 1815: 00000000000ea2b0 326 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__rope_normILb0ELb1E6__halfEvPKT1_PS1_iiiiiPKifff14rope_corr_dimsfPKf\n 1816: 00000000000ea400 1528 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1817: 0000000036b46370 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1818: 0000000036b452f0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1817: 0000000036b47370 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1818: 0000000036b462f0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1819: 00000000000eaa00 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1820: 0000000000000000 0 FILE LOCAL DEFAULT ABS scale.cu\n- 1821: 0000000036b40958 8 OBJECT LOCAL DEFAULT 21 _ZL9scale_f32PKfPfffi\n+ 1821: 0000000036b41958 8 OBJECT LOCAL DEFAULT 21 _ZL9scale_f32PKfPfffi\n 1822: 00000000000ef8b0 157 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__scale_f32PKfPfffi\n 1823: 00000000000ef950 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1824: 0000000036b46378 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1825: 0000000036b45308 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1824: 0000000036b47378 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1825: 0000000036b46308 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1826: 00000000000ef9c0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1827: 0000000000000000 0 FILE LOCAL DEFAULT ABS softmax.cu\n- 1828: 0000000036b40968 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb0ELi0ELi0E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1829: 0000000036b40980 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi64ELi64E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1830: 0000000036b409a0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi1024ELi1024E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1831: 0000000036b40990 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi256ELi256E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1832: 0000000036b409b0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi4096ELi1024E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1833: 0000000036b409b8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb0ELi0ELi0EfEvPKfPKT2_Pf15soft_max_params\n- 1834: 0000000036b409d0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi64ELi64EfEvPKfPKT2_Pf15soft_max_params\n- 1835: 0000000036b409f0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi1024ELi1024EfEvPKfPKT2_Pf15soft_max_params\n- 1836: 0000000036b409e0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi256ELi256EfEvPKfPKT2_Pf15soft_max_params\n- 1837: 0000000036b40a00 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi4096ELi1024EfEvPKfPKT2_Pf15soft_max_params\n- 1838: 0000000036b40978 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi32ELi32E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1839: 0000000036b40998 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi512ELi512E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1840: 0000000036b40988 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi128ELi128E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1841: 0000000036b409a8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi2048ELi1024E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1842: 0000000036b40970 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi0ELi0E6__halfEvPKfPKT2_Pf15soft_max_params\n- 1843: 0000000036b409c8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi32ELi32EfEvPKfPKT2_Pf15soft_max_params\n- 1844: 0000000036b409e8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi512ELi512EfEvPKfPKT2_Pf15soft_max_params\n- 1845: 0000000036b409d8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi128ELi128EfEvPKfPKT2_Pf15soft_max_params\n- 1846: 0000000036b409f8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi2048ELi1024EfEvPKfPKT2_Pf15soft_max_params\n- 1847: 0000000036b409c0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi0ELi0EfEvPKfPKT2_Pf15soft_max_params\n- 1848: 0000000036b40960 8 OBJECT LOCAL DEFAULT 21 _ZL17soft_max_back_f32PKfS0_Pfif\n+ 1828: 0000000036b41968 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb0ELi0ELi0E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1829: 0000000036b41980 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi64ELi64E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1830: 0000000036b419a0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi1024ELi1024E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1831: 0000000036b41990 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi256ELi256E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1832: 0000000036b419b0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi4096ELi1024E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1833: 0000000036b419b8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb0ELi0ELi0EfEvPKfPKT2_Pf15soft_max_params\n+ 1834: 0000000036b419d0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi64ELi64EfEvPKfPKT2_Pf15soft_max_params\n+ 1835: 0000000036b419f0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi1024ELi1024EfEvPKfPKT2_Pf15soft_max_params\n+ 1836: 0000000036b419e0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi256ELi256EfEvPKfPKT2_Pf15soft_max_params\n+ 1837: 0000000036b41a00 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi4096ELi1024EfEvPKfPKT2_Pf15soft_max_params\n+ 1838: 0000000036b41978 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi32ELi32E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1839: 0000000036b41998 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi512ELi512E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1840: 0000000036b41988 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi128ELi128E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1841: 0000000036b419a8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi2048ELi1024E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1842: 0000000036b41970 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi0ELi0E6__halfEvPKfPKT2_Pf15soft_max_params\n+ 1843: 0000000036b419c8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi32ELi32EfEvPKfPKT2_Pf15soft_max_params\n+ 1844: 0000000036b419e8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi512ELi512EfEvPKfPKT2_Pf15soft_max_params\n+ 1845: 0000000036b419d8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi128ELi128EfEvPKfPKT2_Pf15soft_max_params\n+ 1846: 0000000036b419f8 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi2048ELi1024EfEvPKfPKT2_Pf15soft_max_params\n+ 1847: 0000000036b419c0 8 OBJECT LOCAL DEFAULT 21 _ZL12soft_max_f32ILb1ELi0ELi0EfEvPKfPKT2_Pf15soft_max_params\n+ 1848: 0000000036b41960 8 OBJECT LOCAL DEFAULT 21 _ZL17soft_max_back_f32PKfS0_Pfif\n 1849: 00000000000f22b0 153 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__soft_max_back_f32PKfS0_Pfif\n 1850: 00000000000f2350 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb0ELi0ELi0E6__halfEvPKfPKT2_Pf15soft_max_params\n 1851: 00000000000f23e0 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi0ELi0E6__halfEvPKfPKT2_Pf15soft_max_params\n 1852: 00000000000f2470 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi32ELi32E6__halfEvPKfPKT2_Pf15soft_max_params\n 1853: 00000000000f2500 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi64ELi64E6__halfEvPKfPKT2_Pf15soft_max_params\n 1854: 00000000000f2590 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi128ELi128E6__halfEvPKfPKT2_Pf15soft_max_params\n 1855: 00000000000f2620 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi256ELi256E6__halfEvPKfPKT2_Pf15soft_max_params\n@@ -1868,103 +1868,103 @@\n 1864: 00000000000f2b30 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi128ELi128EfEvPKfPKT2_Pf15soft_max_params\n 1865: 00000000000f2bc0 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi256ELi256EfEvPKfPKT2_Pf15soft_max_params\n 1866: 00000000000f2c50 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi512ELi512EfEvPKfPKT2_Pf15soft_max_params\n 1867: 00000000000f2ce0 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi1024ELi1024EfEvPKfPKT2_Pf15soft_max_params\n 1868: 00000000000f2d70 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi2048ELi1024EfEvPKfPKT2_Pf15soft_max_params\n 1869: 00000000000f2e00 139 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__soft_max_f32ILb1ELi4096ELi1024EfEvPKfPKT2_Pf15soft_max_params\n 1870: 00000000000f2e90 1022 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1871: 0000000036b46380 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1872: 0000000036b45320 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1871: 0000000036b47380 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1872: 0000000036b46320 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1873: 00000000000f3290 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1874: 0000000000000000 0 FILE LOCAL DEFAULT ABS ssm-conv.cu\n- 1875: 0000000036b40a08 8 OBJECT LOCAL DEFAULT 21 _ZL12ssm_conv_f32ILm128ELm4EEvPKfS1_iiiiPfiiil\n- 1876: 0000000036b40a18 8 OBJECT LOCAL DEFAULT 21 _ZL23ssm_conv_long_token_f32ILm128ELm4ELl32EEvPKfS1_iiiiPfiiil\n- 1877: 0000000036b40a10 8 OBJECT LOCAL DEFAULT 21 _ZL12ssm_conv_f32ILm128ELm3EEvPKfS1_iiiiPfiiil\n- 1878: 0000000036b40a20 8 OBJECT LOCAL DEFAULT 21 _ZL23ssm_conv_long_token_f32ILm128ELm3ELl32EEvPKfS1_iiiiPfiiil\n+ 1875: 0000000036b41a08 8 OBJECT LOCAL DEFAULT 21 _ZL12ssm_conv_f32ILm128ELm4EEvPKfS1_iiiiPfiiil\n+ 1876: 0000000036b41a18 8 OBJECT LOCAL DEFAULT 21 _ZL23ssm_conv_long_token_f32ILm128ELm4ELl32EEvPKfS1_iiiiPfiiil\n+ 1877: 0000000036b41a10 8 OBJECT LOCAL DEFAULT 21 _ZL12ssm_conv_f32ILm128ELm3EEvPKfS1_iiiiPfiiil\n+ 1878: 0000000036b41a20 8 OBJECT LOCAL DEFAULT 21 _ZL23ssm_conv_long_token_f32ILm128ELm3ELl32EEvPKfS1_iiiiPfiiil\n 1879: 00000000000f3b20 249 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__ssm_conv_f32ILm128ELm4EEvPKfS1_iiiiPfiiil\n 1880: 00000000000f3c20 249 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__ssm_conv_f32ILm128ELm3EEvPKfS1_iiiiPfiiil\n 1881: 00000000000f3d20 249 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__ssm_conv_long_token_f32ILm128ELm4ELl32EEvPKfS1_iiiiPfiiil\n 1882: 00000000000f3e20 249 FUNC LOCAL DEFAULT 12 _ZL38__device_stub__ssm_conv_long_token_f32ILm128ELm3ELl32EEvPKfS1_iiiiPfiiil\n 1883: 00000000000f3f20 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1884: 0000000036b46388 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1885: 0000000036b45338 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1884: 0000000036b47388 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1885: 0000000036b46338 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1886: 00000000000f4010 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1887: 0000000000000000 0 FILE LOCAL DEFAULT ABS ssm-scan.cu\n 1888: 00000000000f4810 194 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1889: 0000000036b46390 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1890: 0000000036b45350 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1889: 0000000036b47390 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1890: 0000000036b46350 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1891: 00000000000f48e0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1892: 0000000000000000 0 FILE LOCAL DEFAULT ABS sum.cu\n 1893: 0000000000000000 0 FILE LOCAL DEFAULT ABS sumrows.cu\n- 1894: 0000000036b40a40 8 OBJECT LOCAL DEFAULT 21 _ZL15reduce_rows_f32ILb0EEvPKfPfi\n+ 1894: 0000000036b41a40 8 OBJECT LOCAL DEFAULT 21 _ZL15reduce_rows_f32ILb0EEvPKfPfi\n 1895: 00000000000f5110 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__reduce_rows_f32ILb0EEvPKfPfi\n 1896: 00000000000f5360 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1897: 0000000036b46398 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1898: 0000000036b45368 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1897: 0000000036b47398 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1898: 0000000036b46368 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1899: 00000000000f53d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1900: 0000000000000000 0 FILE LOCAL DEFAULT ABS tsembd.cu\n- 1901: 0000000036b40a48 8 OBJECT LOCAL DEFAULT 21 _ZL22timestep_embedding_f32PKfPfiii\n+ 1901: 0000000036b41a48 8 OBJECT LOCAL DEFAULT 21 _ZL22timestep_embedding_f32PKfPfiii\n 1902: 00000000000f55e0 154 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__timestep_embedding_f32PKfPfiii\n 1903: 00000000000f5680 97 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 1904: 0000000036b463a0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 1905: 0000000036b45380 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 1904: 0000000036b473a0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 1905: 0000000036b46380 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 1906: 00000000000f56f0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 1907: 0000000000000000 0 FILE LOCAL DEFAULT ABS unary.cu\n- 1908: 0000000036b40a50 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_absfEE6__halfEvPKT0_PS1_i\n- 1909: 0000000036b40a58 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_absfEEfEvPKT0_PS0_i\n- 1910: 0000000036b40a60 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sgnfEE6__halfEvPKT0_PS1_i\n- 1911: 0000000036b40a68 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sgnfEEfEvPKT0_PS0_i\n- 1912: 0000000036b40a70 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_negfEE6__halfEvPKT0_PS1_i\n- 1913: 0000000036b40a78 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_negfEEfEvPKT0_PS0_i\n- 1914: 0000000036b40a80 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_stepfEE6__halfEvPKT0_PS1_i\n- 1915: 0000000036b40a88 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_stepfEEfEvPKT0_PS0_i\n- 1916: 0000000036b40a90 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_gelufEE6__halfEvPKT0_PS1_i\n- 1917: 0000000036b40a98 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_gelufEEfEvPKT0_PS0_i\n- 1918: 0000000036b40aa0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL11op_gelu_erffEE6__halfEvPKT0_PS1_i\n- 1919: 0000000036b40aa8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL11op_gelu_erffEEfEvPKT0_PS0_i\n- 1920: 0000000036b40ab0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL13op_gelu_quickfEE6__halfEvPKT0_PS1_i\n- 1921: 0000000036b40ab8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL13op_gelu_quickfEEfEvPKT0_PS0_i\n- 1922: 0000000036b40ac0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_silufEE6__halfEvPKT0_PS1_i\n- 1923: 0000000036b40ac8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_silufEEfEvPKT0_PS0_i\n- 1924: 0000000036b40ad0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_tanhfEE6__halfEvPKT0_PS1_i\n- 1925: 0000000036b40ad8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_tanhfEEfEvPKT0_PS0_i\n- 1926: 0000000036b40ae0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_relufEE6__halfEvPKT0_PS1_i\n- 1927: 0000000036b40ae8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_relufEEfEvPKT0_PS0_i\n- 1928: 0000000036b40af0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL10op_sigmoidfEE6__halfEvPKT0_PS1_i\n- 1929: 0000000036b40af8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL10op_sigmoidfEEfEvPKT0_PS0_i\n- 1930: 0000000036b40b00 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL14op_hardsigmoidfEE6__halfEvPKT0_PS1_i\n- 1931: 0000000036b40b08 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL14op_hardsigmoidfEEfEvPKT0_PS0_i\n- 1932: 0000000036b40b10 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL12op_hardswishfEE6__halfEvPKT0_PS1_i\n- 1933: 0000000036b40b18 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL12op_hardswishfEEfEvPKT0_PS0_i\n- 1934: 0000000036b40b20 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_expfEE6__halfEvPKT0_PS1_i\n- 1935: 0000000036b40b28 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_expfEEfEvPKT0_PS0_i\n- 1936: 0000000036b40b30 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sqrfEE6__halfEvPKT0_PS1_i\n- 1937: 0000000036b40b38 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sqrfEEfEvPKT0_PS0_i\n- 1938: 0000000036b40b40 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_sqrtfEE6__halfEvPKT0_PS1_i\n- 1939: 0000000036b40b48 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_sqrtfEEfEvPKT0_PS0_i\n- 1940: 0000000036b40b50 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sinfEE6__halfEvPKT0_PS1_i\n- 1941: 0000000036b40b58 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sinfEEfEvPKT0_PS0_i\n- 1942: 0000000036b40b60 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_cosfEE6__halfEvPKT0_PS1_i\n- 1943: 0000000036b40b68 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_cosfEEfEvPKT0_PS0_i\n- 1944: 0000000036b40b70 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_logfEE6__halfEvPKT0_PS1_i\n- 1945: 0000000036b40b78 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_logfEEfEvPKT0_PS0_i\n- 1946: 0000000036b40b80 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_relufEE6__halfEvPKT0_S3_PS1_llll\n- 1947: 0000000036b40b88 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_relufEEfEvPKT0_S2_PS0_llll\n- 1948: 0000000036b40b90 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_gelufEE6__halfEvPKT0_S3_PS1_llll\n- 1949: 0000000036b40b98 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_gelufEEfEvPKT0_S2_PS0_llll\n- 1950: 0000000036b40ba0 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_silufEE6__halfEvPKT0_S3_PS1_llll\n- 1951: 0000000036b40ba8 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_silufEEfEvPKT0_S2_PS0_llll\n- 1952: 0000000036b40bb0 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL11op_gelu_erffEE6__halfEvPKT0_S3_PS1_llll\n- 1953: 0000000036b40bb8 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL11op_gelu_erffEEfEvPKT0_S2_PS0_llll\n- 1954: 0000000036b40bc0 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL13op_gelu_quickfEE6__halfEvPKT0_S3_PS1_llll\n- 1955: 0000000036b40bc8 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL13op_gelu_quickfEEfEvPKT0_S2_PS0_llll\n- 1956: 0000000036b40bd0 8 OBJECT LOCAL DEFAULT 21 _ZL16silu_back_kernelI6__halfEvPKT_S3_PS1_i\n- 1957: 0000000036b40bd8 8 OBJECT LOCAL DEFAULT 21 _ZL16silu_back_kernelIfEvPKT_S2_PS0_i\n- 1958: 0000000036b40be0 8 OBJECT LOCAL DEFAULT 21 _ZL17leaky_relu_kernelI6__halfEvPKT_PS1_if\n- 1959: 0000000036b40be8 8 OBJECT LOCAL DEFAULT 21 _ZL17leaky_relu_kernelIfEvPKT_PS0_if\n+ 1908: 0000000036b41a50 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_absfEE6__halfEvPKT0_PS1_i\n+ 1909: 0000000036b41a58 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_absfEEfEvPKT0_PS0_i\n+ 1910: 0000000036b41a60 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sgnfEE6__halfEvPKT0_PS1_i\n+ 1911: 0000000036b41a68 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sgnfEEfEvPKT0_PS0_i\n+ 1912: 0000000036b41a70 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_negfEE6__halfEvPKT0_PS1_i\n+ 1913: 0000000036b41a78 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_negfEEfEvPKT0_PS0_i\n+ 1914: 0000000036b41a80 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_stepfEE6__halfEvPKT0_PS1_i\n+ 1915: 0000000036b41a88 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_stepfEEfEvPKT0_PS0_i\n+ 1916: 0000000036b41a90 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_gelufEE6__halfEvPKT0_PS1_i\n+ 1917: 0000000036b41a98 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_gelufEEfEvPKT0_PS0_i\n+ 1918: 0000000036b41aa0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL11op_gelu_erffEE6__halfEvPKT0_PS1_i\n+ 1919: 0000000036b41aa8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL11op_gelu_erffEEfEvPKT0_PS0_i\n+ 1920: 0000000036b41ab0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL13op_gelu_quickfEE6__halfEvPKT0_PS1_i\n+ 1921: 0000000036b41ab8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL13op_gelu_quickfEEfEvPKT0_PS0_i\n+ 1922: 0000000036b41ac0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_silufEE6__halfEvPKT0_PS1_i\n+ 1923: 0000000036b41ac8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_silufEEfEvPKT0_PS0_i\n+ 1924: 0000000036b41ad0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_tanhfEE6__halfEvPKT0_PS1_i\n+ 1925: 0000000036b41ad8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_tanhfEEfEvPKT0_PS0_i\n+ 1926: 0000000036b41ae0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_relufEE6__halfEvPKT0_PS1_i\n+ 1927: 0000000036b41ae8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_relufEEfEvPKT0_PS0_i\n+ 1928: 0000000036b41af0 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL10op_sigmoidfEE6__halfEvPKT0_PS1_i\n+ 1929: 0000000036b41af8 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL10op_sigmoidfEEfEvPKT0_PS0_i\n+ 1930: 0000000036b41b00 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL14op_hardsigmoidfEE6__halfEvPKT0_PS1_i\n+ 1931: 0000000036b41b08 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL14op_hardsigmoidfEEfEvPKT0_PS0_i\n+ 1932: 0000000036b41b10 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL12op_hardswishfEE6__halfEvPKT0_PS1_i\n+ 1933: 0000000036b41b18 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL12op_hardswishfEEfEvPKT0_PS0_i\n+ 1934: 0000000036b41b20 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_expfEE6__halfEvPKT0_PS1_i\n+ 1935: 0000000036b41b28 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_expfEEfEvPKT0_PS0_i\n+ 1936: 0000000036b41b30 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sqrfEE6__halfEvPKT0_PS1_i\n+ 1937: 0000000036b41b38 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sqrfEEfEvPKT0_PS0_i\n+ 1938: 0000000036b41b40 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_sqrtfEE6__halfEvPKT0_PS1_i\n+ 1939: 0000000036b41b48 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL7op_sqrtfEEfEvPKT0_PS0_i\n+ 1940: 0000000036b41b50 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sinfEE6__halfEvPKT0_PS1_i\n+ 1941: 0000000036b41b58 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_sinfEEfEvPKT0_PS0_i\n+ 1942: 0000000036b41b60 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_cosfEE6__halfEvPKT0_PS1_i\n+ 1943: 0000000036b41b68 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_cosfEEfEvPKT0_PS0_i\n+ 1944: 0000000036b41b70 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_logfEE6__halfEvPKT0_PS1_i\n+ 1945: 0000000036b41b78 8 OBJECT LOCAL DEFAULT 21 _ZL15unary_op_kernelIXadL_ZL6op_logfEEfEvPKT0_PS0_i\n+ 1946: 0000000036b41b80 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_relufEE6__halfEvPKT0_S3_PS1_llll\n+ 1947: 0000000036b41b88 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_relufEEfEvPKT0_S2_PS0_llll\n+ 1948: 0000000036b41b90 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_gelufEE6__halfEvPKT0_S3_PS1_llll\n+ 1949: 0000000036b41b98 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_gelufEEfEvPKT0_S2_PS0_llll\n+ 1950: 0000000036b41ba0 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_silufEE6__halfEvPKT0_S3_PS1_llll\n+ 1951: 0000000036b41ba8 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL7op_silufEEfEvPKT0_S2_PS0_llll\n+ 1952: 0000000036b41bb0 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL11op_gelu_erffEE6__halfEvPKT0_S3_PS1_llll\n+ 1953: 0000000036b41bb8 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL11op_gelu_erffEEfEvPKT0_S2_PS0_llll\n+ 1954: 0000000036b41bc0 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL13op_gelu_quickfEE6__halfEvPKT0_S3_PS1_llll\n+ 1955: 0000000036b41bc8 8 OBJECT LOCAL DEFAULT 21 _ZL21unary_gated_op_kernelIXadL_ZL13op_gelu_quickfEEfEvPKT0_S2_PS0_llll\n+ 1956: 0000000036b41bd0 8 OBJECT LOCAL DEFAULT 21 _ZL16silu_back_kernelI6__halfEvPKT_S3_PS1_i\n+ 1957: 0000000036b41bd8 8 OBJECT LOCAL DEFAULT 21 _ZL16silu_back_kernelIfEvPKT_S2_PS0_i\n+ 1958: 0000000036b41be0 8 OBJECT LOCAL DEFAULT 21 _ZL17leaky_relu_kernelI6__halfEvPKT_PS1_if\n+ 1959: 0000000036b41be8 8 OBJECT LOCAL DEFAULT 21 _ZL17leaky_relu_kernelIfEvPKT_PS0_if\n 1960: 00000000000fa940 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL6op_absfEE6__halfEvPKT0_PS1_i\n 1961: 00000000000fa9c0 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL6op_absfEEfEvPKT0_PS0_i\n 1962: 00000000000faa40 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL6op_sgnfEE6__halfEvPKT0_PS1_i\n 1963: 00000000000faac0 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL6op_sgnfEEfEvPKT0_PS0_i\n 1964: 00000000000fab40 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL6op_negfEE6__halfEvPKT0_PS1_i\n 1965: 00000000000fabc0 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL6op_negfEEfEvPKT0_PS0_i\n 1966: 00000000000fac40 122 FUNC LOCAL DEFAULT 12 _ZL30__device_stub__unary_op_kernelIXadL_ZL7op_stepfEE6__halfEvPKT0_PS1_i\n@@ -2010,3757 +2010,3757 @@\n 2006: 00000000000fc2c0 193 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__unary_gated_op_kernelIXadL_ZL13op_gelu_quickfEE6__halfEvPKT0_S3_PS1_llll\n 2007: 00000000000fc390 193 FUNC LOCAL DEFAULT 12 _ZL36__device_stub__unary_gated_op_kernelIXadL_ZL13op_gelu_quickfEEfEvPKT0_S2_PS0_llll\n 2008: 00000000000fc460 140 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__silu_back_kernelI6__halfEvPKT_S3_PS1_i\n 2009: 00000000000fc4f0 140 FUNC LOCAL DEFAULT 12 _ZL31__device_stub__silu_back_kernelIfEvPKT_S2_PS0_i\n 2010: 00000000000fc580 141 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__leaky_relu_kernelI6__halfEvPKT_PS1_if\n 2011: 00000000000fc610 141 FUNC LOCAL DEFAULT 12 _ZL32__device_stub__leaky_relu_kernelIfEvPKT_PS0_if\n 2012: 00000000000fc6a0 2448 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2013: 0000000036b463a8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2014: 0000000036b45398 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2013: 0000000036b473a8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2014: 0000000036b46398 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2015: 00000000000fd030 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2016: 0000000000000000 0 FILE LOCAL DEFAULT ABS upscale.cu\n- 2017: 0000000036b40bf0 8 OBJECT LOCAL DEFAULT 21 _ZL11upscale_f32PKfPfiiiiiiiiffff\n- 2018: 0000000036b40bf8 8 OBJECT LOCAL DEFAULT 21 _ZL20upscale_f32_bilinearPKfPfiiiiiiiiiifffff\n+ 2017: 0000000036b41bf0 8 OBJECT LOCAL DEFAULT 21 _ZL11upscale_f32PKfPfiiiiiiiiffff\n+ 2018: 0000000036b41bf8 8 OBJECT LOCAL DEFAULT 21 _ZL20upscale_f32_bilinearPKfPfiiiiiiiiiifffff\n 2019: 00000000000fd6f0 315 FUNC LOCAL DEFAULT 12 _ZL26__device_stub__upscale_f32PKfPfiiiiiiiiffff\n 2020: 00000000000fd830 375 FUNC LOCAL DEFAULT 12 _ZL35__device_stub__upscale_f32_bilinearPKfPfiiiiiiiiiifffff\n 2021: 00000000000fd9b0 148 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2022: 0000000036b463b0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2023: 0000000036b453b0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2022: 0000000036b473b0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2023: 0000000036b463b0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2024: 00000000000fda50 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2025: 0000000000000000 0 FILE LOCAL DEFAULT ABS wkv.cu\n- 2026: 0000000036b40c08 8 OBJECT LOCAL DEFAULT 21 _ZL12rwkv_wkv_f32ILi128EEviiiiPKfS1_S1_S1_S1_S1_Pf\n- 2027: 0000000036b40c00 8 OBJECT LOCAL DEFAULT 21 _ZL12rwkv_wkv_f32ILi64EEviiiiPKfS1_S1_S1_S1_S1_Pf\n+ 2026: 0000000036b41c08 8 OBJECT LOCAL DEFAULT 21 _ZL12rwkv_wkv_f32ILi128EEviiiiPKfS1_S1_S1_S1_S1_Pf\n+ 2027: 0000000036b41c00 8 OBJECT LOCAL DEFAULT 21 _ZL12rwkv_wkv_f32ILi64EEviiiiPKfS1_S1_S1_S1_S1_Pf\n 2028: 00000000000fdf50 247 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__rwkv_wkv_f32ILi64EEviiiiPKfS1_S1_S1_S1_S1_Pf\n 2029: 00000000000fe050 247 FUNC LOCAL DEFAULT 12 _ZL27__device_stub__rwkv_wkv_f32ILi128EEviiiiPKfS1_S1_S1_S1_S1_Pf\n- 2030: 0000000036b40c18 8 OBJECT LOCAL DEFAULT 21 _ZL13rwkv_wkv7_f32ILi128EEviiiiPKfS1_S1_S1_S1_S1_S1_Pf\n- 2031: 0000000036b40c10 8 OBJECT LOCAL DEFAULT 21 _ZL13rwkv_wkv7_f32ILi64EEviiiiPKfS1_S1_S1_S1_S1_S1_Pf\n+ 2030: 0000000036b41c18 8 OBJECT LOCAL DEFAULT 21 _ZL13rwkv_wkv7_f32ILi128EEviiiiPKfS1_S1_S1_S1_S1_S1_Pf\n+ 2031: 0000000036b41c10 8 OBJECT LOCAL DEFAULT 21 _ZL13rwkv_wkv7_f32ILi64EEviiiiPKfS1_S1_S1_S1_S1_S1_Pf\n 2032: 00000000000fe680 263 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__rwkv_wkv7_f32ILi64EEviiiiPKfS1_S1_S1_S1_S1_S1_Pf\n 2033: 00000000000fe790 263 FUNC LOCAL DEFAULT 12 _ZL28__device_stub__rwkv_wkv7_f32ILi128EEviiiiPKfS1_S1_S1_S1_S1_S1_Pf\n 2034: 00000000000fe8a0 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2035: 0000000036b463b8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2036: 0000000036b453c8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2035: 0000000036b473b8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2036: 0000000036b463c8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2037: 00000000000fe990 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2038: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_1-ncols2_16.cu\n- 2039: 0000000036b40c28 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi1ELi16ELi2ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2040: 0000000036b40c20 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi1ELi16ELi2ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2039: 0000000036b41c28 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi1ELi16ELi2ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2040: 0000000036b41c20 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi1ELi16ELi2ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2041: 00000000000fe9c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi576ELi512ELi1ELi16ELi2ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2042: 00000000000fec90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi576ELi512ELi1ELi16ELi2ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2043: 0000000036b40c30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi512ELi1ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2044: 0000000036b40c38 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2045: 0000000036aec054 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2043: 0000000036b41c30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi512ELi1ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2044: 0000000036b41c38 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2045: 0000000036aed054 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n 2046: 00000000000fef60 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi512ELi1ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2047: 00000000000ff000 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2048: 00000000000ff090 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2049: 0000000036b463c0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2050: 0000000036b453e0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2049: 0000000036b473c0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2050: 0000000036b463e0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2051: 00000000000ff180 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2052: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_1-ncols2_8.cu\n- 2053: 0000000036b40c48 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2054: 0000000036b40c40 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2053: 0000000036b41c48 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2054: 0000000036b41c40 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2055: 0000000000100350 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2056: 0000000000100620 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2057: 0000000036b40ca0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2058: 0000000036b40ca8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2059: 0000000036aec128 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2060: 0000000036b40c58 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2061: 0000000036b40c50 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2057: 0000000036b41ca0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2058: 0000000036b41ca8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2059: 0000000036aed128 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2060: 0000000036b41c58 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2061: 0000000036b41c50 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2062: 00000000001008f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2063: 0000000000100bc0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2064: 0000000036b40cb0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2065: 0000000036b40cb8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2066: 0000000036aec1fc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2067: 0000000036b40c68 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2068: 0000000036b40c60 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2064: 0000000036b41cb0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2065: 0000000036b41cb8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2066: 0000000036aed1fc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2067: 0000000036b41c68 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2068: 0000000036b41c60 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2069: 0000000000100e90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2070: 0000000000101160 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2071: 0000000036b40cc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2072: 0000000036b40cc8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2073: 0000000036aec2d0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2074: 0000000036b40c78 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2075: 0000000036b40c70 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2071: 0000000036b41cc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2072: 0000000036b41cc8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2073: 0000000036aed2d0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2074: 0000000036b41c78 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2075: 0000000036b41c70 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2076: 0000000000101430 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2077: 0000000000101700 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2078: 0000000036b40cd0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2079: 0000000036b40cd8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2080: 0000000036aec3a4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2081: 0000000036b40c88 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2082: 0000000036b40c80 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2078: 0000000036b41cd0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2079: 0000000036b41cd8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2080: 0000000036aed3a4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2081: 0000000036b41c88 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2082: 0000000036b41c80 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2083: 00000000001019d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi1ELi8ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2084: 0000000000101ca0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi1ELi8ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2085: 0000000036b40ce0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2086: 0000000036b40ce8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2087: 0000000036aec478 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2088: 0000000036b40c98 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi1ELi8ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2089: 0000000036b40c90 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi1ELi8ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2085: 0000000036b41ce0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2086: 0000000036b41ce8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2087: 0000000036aed478 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2088: 0000000036b41c98 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi1ELi8ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2089: 0000000036b41c90 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi1ELi8ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2090: 0000000000101f70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi1ELi8ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2091: 0000000000102240 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi1ELi8ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2092: 0000000036b40cf0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2093: 0000000036b40cf8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2094: 0000000036aec54c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2092: 0000000036b41cf0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2093: 0000000036b41cf8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2094: 0000000036aed54c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2095: 0000000000102510 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2096: 00000000001025b0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2097: 0000000000102640 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2098: 00000000001026e0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2099: 0000000000102770 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2100: 0000000000102810 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2101: 00000000001028a0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2102: 0000000000102940 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2103: 00000000001029d0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2104: 0000000000102a70 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2105: 0000000000102b00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi1ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2106: 0000000000102ba0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2107: 0000000000102c30 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2108: 0000000036b463c8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2109: 0000000036b453f8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2108: 0000000036b473c8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2109: 0000000036b463f8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2110: 00000000001030c0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2111: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_16-ncols2_1.cu\n- 2112: 0000000036b40d08 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2113: 0000000036b40d00 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2112: 0000000036b41d08 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2113: 0000000036b41d00 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2114: 0000000000109b10 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2115: 0000000000109de0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2116: 0000000036b40d60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2117: 0000000036b40d68 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2118: 0000000036b40d18 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2119: 0000000036b40d10 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2116: 0000000036b41d60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2117: 0000000036b41d68 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2118: 0000000036b41d18 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2119: 0000000036b41d10 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2120: 000000000010a0b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2121: 000000000010a380 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2122: 0000000036b40d70 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2123: 0000000036b40d78 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2124: 0000000036b40d28 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2125: 0000000036b40d20 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2122: 0000000036b41d70 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2123: 0000000036b41d78 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2124: 0000000036b41d28 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2125: 0000000036b41d20 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2126: 000000000010a650 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2127: 000000000010a920 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2128: 0000000036b40d80 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2129: 0000000036b40d88 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2130: 0000000036b40d38 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2131: 0000000036b40d30 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2128: 0000000036b41d80 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2129: 0000000036b41d88 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2130: 0000000036b41d38 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2131: 0000000036b41d30 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2132: 000000000010abf0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2133: 000000000010aec0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2134: 0000000036b40d90 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2135: 0000000036b40d98 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2136: 0000000036b40d48 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2137: 0000000036b40d40 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2134: 0000000036b41d90 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2135: 0000000036b41d98 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2136: 0000000036b41d48 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2137: 0000000036b41d40 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2138: 000000000010b190 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi16ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2139: 000000000010b460 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi16ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2140: 0000000036b40da0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2141: 0000000036b40da8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2142: 0000000036b40d58 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi1ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2143: 0000000036b40d50 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi1ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2140: 0000000036b41da0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2141: 0000000036b41da8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2142: 0000000036b41d58 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi1ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2143: 0000000036b41d50 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi1ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2144: 000000000010b730 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi16ELi1ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2145: 000000000010ba00 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi16ELi1ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2146: 0000000036b40db0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2147: 0000000036b40db8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2146: 0000000036b41db0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2147: 0000000036b41db8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2148: 000000000010bcd0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2149: 000000000010bd70 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2150: 000000000010be00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2151: 000000000010bea0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2152: 000000000010bf30 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2153: 000000000010bfd0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2154: 000000000010c060 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2155: 000000000010c100 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2156: 000000000010c190 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2157: 000000000010c230 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2158: 000000000010c2c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi16ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2159: 000000000010c360 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2160: 000000000010c3f0 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2161: 0000000036b463d0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2162: 0000000036b45410 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2161: 0000000036b473d0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2162: 0000000036b46410 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2163: 000000000010c880 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2164: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_16-ncols2_2.cu\n- 2165: 0000000036b40dc8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2166: 0000000036b40dc0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2165: 0000000036b41dc8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2166: 0000000036b41dc0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2167: 000000000010cbb0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2168: 000000000010ce80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2169: 0000000036b40e20 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2170: 0000000036b40e28 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2171: 0000000036aec620 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2172: 0000000036b40dd8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2173: 0000000036b40dd0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2169: 0000000036b41e20 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2170: 0000000036b41e28 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2171: 0000000036aed620 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2172: 0000000036b41dd8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2173: 0000000036b41dd0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2174: 000000000010d150 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2175: 000000000010d420 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2176: 0000000036b40e30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2177: 0000000036b40e38 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2178: 0000000036aec6f4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2179: 0000000036b40de8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2180: 0000000036b40de0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2176: 0000000036b41e30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2177: 0000000036b41e38 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2178: 0000000036aed6f4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2179: 0000000036b41de8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2180: 0000000036b41de0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2181: 000000000010d6f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2182: 000000000010d9c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2183: 0000000036b40e40 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2184: 0000000036b40e48 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2185: 0000000036aec7c8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2186: 0000000036b40df8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2187: 0000000036b40df0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2183: 0000000036b41e40 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2184: 0000000036b41e48 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2185: 0000000036aed7c8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2186: 0000000036b41df8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2187: 0000000036b41df0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2188: 000000000010dc90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2189: 000000000010df60 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2190: 0000000036b40e50 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2191: 0000000036b40e58 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2192: 0000000036aec89c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2193: 0000000036b40e08 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2194: 0000000036b40e00 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2190: 0000000036b41e50 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2191: 0000000036b41e58 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2192: 0000000036aed89c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2193: 0000000036b41e08 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2194: 0000000036b41e00 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2195: 000000000010e230 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2196: 000000000010e500 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2197: 0000000036b40e60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2198: 0000000036b40e68 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2199: 0000000036aec970 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2200: 0000000036b40e18 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2201: 0000000036b40e10 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2197: 0000000036b41e60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2198: 0000000036b41e68 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2199: 0000000036aed970 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2200: 0000000036b41e18 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2201: 0000000036b41e10 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2202: 000000000010e7d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi16ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2203: 000000000010eaa0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi16ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2204: 0000000036b40e70 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2205: 0000000036b40e78 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2206: 0000000036aeca44 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2204: 0000000036b41e70 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2205: 0000000036b41e78 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2206: 0000000036aeda44 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2207: 000000000010ed70 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2208: 000000000010ee10 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2209: 000000000010eea0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2210: 000000000010ef40 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2211: 000000000010efd0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2212: 000000000010f070 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2213: 000000000010f100 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2214: 000000000010f1a0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2215: 000000000010f230 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2216: 000000000010f2d0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2217: 000000000010f360 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi16ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2218: 000000000010f400 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2219: 000000000010f490 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2220: 0000000036b463d8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2221: 0000000036b45428 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2220: 0000000036b473d8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2221: 0000000036b46428 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2222: 000000000010f920 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2223: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_16-ncols2_4.cu\n- 2224: 0000000036b40e88 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2225: 0000000036b40e80 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2224: 0000000036b41e88 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2225: 0000000036b41e80 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2226: 00000000001163d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2227: 00000000001166a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2228: 0000000036b40ee0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2229: 0000000036b40ee8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2230: 0000000036aecb18 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2231: 0000000036b40e98 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2232: 0000000036b40e90 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2228: 0000000036b41ee0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2229: 0000000036b41ee8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2230: 0000000036aedb18 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2231: 0000000036b41e98 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2232: 0000000036b41e90 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2233: 0000000000116970 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2234: 0000000000116c40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2235: 0000000036b40ef0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2236: 0000000036b40ef8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2237: 0000000036aecbec 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2238: 0000000036b40ea8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2239: 0000000036b40ea0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2235: 0000000036b41ef0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2236: 0000000036b41ef8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2237: 0000000036aedbec 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2238: 0000000036b41ea8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2239: 0000000036b41ea0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2240: 0000000000116f10 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2241: 00000000001171e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2242: 0000000036b40f00 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2243: 0000000036b40f08 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2244: 0000000036aeccc0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2245: 0000000036b40eb8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2246: 0000000036b40eb0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2242: 0000000036b41f00 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2243: 0000000036b41f08 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2244: 0000000036aedcc0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2245: 0000000036b41eb8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2246: 0000000036b41eb0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2247: 00000000001174b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2248: 0000000000117780 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2249: 0000000036b40f10 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2250: 0000000036b40f18 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2251: 0000000036aecd94 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2252: 0000000036b40ec8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2253: 0000000036b40ec0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2249: 0000000036b41f10 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2250: 0000000036b41f18 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2251: 0000000036aedd94 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2252: 0000000036b41ec8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2253: 0000000036b41ec0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2254: 0000000000117a50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2255: 0000000000117d20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2256: 0000000036b40f20 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2257: 0000000036b40f28 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2258: 0000000036aece68 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2259: 0000000036b40ed8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2260: 0000000036b40ed0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2256: 0000000036b41f20 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2257: 0000000036b41f28 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2258: 0000000036aede68 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2259: 0000000036b41ed8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2260: 0000000036b41ed0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2261: 0000000000117ff0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi16ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2262: 00000000001182c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi16ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2263: 0000000036b40f30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2264: 0000000036b40f38 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2265: 0000000036aecf3c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2263: 0000000036b41f30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2264: 0000000036b41f38 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2265: 0000000036aedf3c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2266: 0000000000118590 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2267: 0000000000118630 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2268: 00000000001186c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2269: 0000000000118760 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2270: 00000000001187f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2271: 0000000000118890 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2272: 0000000000118920 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2273: 00000000001189c0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2274: 0000000000118a50 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2275: 0000000000118af0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2276: 0000000000118b80 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi16ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2277: 0000000000118c20 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2278: 0000000000118cb0 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2279: 0000000036b463e0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2280: 0000000036b45440 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2279: 0000000036b473e0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2280: 0000000036b46440 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2281: 0000000000119140 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2282: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_2-ncols2_16.cu\n- 2283: 0000000036b40f48 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi2ELi16ELi4ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2284: 0000000036b40f40 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi2ELi16ELi4ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2283: 0000000036b41f48 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi2ELi16ELi4ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2284: 0000000036b41f40 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi2ELi16ELi4ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2285: 000000000011fc50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi576ELi512ELi2ELi16ELi4ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2286: 000000000011ff20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi576ELi512ELi2ELi16ELi4ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2287: 0000000036b40f50 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi512ELi2ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2288: 0000000036b40f58 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2289: 0000000036aed010 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2287: 0000000036b41f50 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi512ELi2ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2288: 0000000036b41f58 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2289: 0000000036aee010 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n 2290: 00000000001201f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi512ELi2ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2291: 0000000000120290 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2292: 0000000000120320 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2293: 0000000036b463e8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2294: 0000000036b45458 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2293: 0000000036b473e8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2294: 0000000036b46458 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2295: 0000000000120410 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2296: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_2-ncols2_4.cu\n- 2297: 0000000036b40f68 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2298: 0000000036b40f60 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2297: 0000000036b41f68 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2298: 0000000036b41f60 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2299: 00000000001215d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2300: 00000000001218a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2301: 0000000036b40fc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2302: 0000000036b40fc8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2303: 0000000036aed0e4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2304: 0000000036b40f78 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2305: 0000000036b40f70 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2301: 0000000036b41fc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2302: 0000000036b41fc8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2303: 0000000036aee0e4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2304: 0000000036b41f78 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2305: 0000000036b41f70 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2306: 0000000000121b70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2307: 0000000000121e40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2308: 0000000036b40fd0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2309: 0000000036b40fd8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2310: 0000000036aed1b8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2311: 0000000036b40f88 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2312: 0000000036b40f80 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2308: 0000000036b41fd0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2309: 0000000036b41fd8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2310: 0000000036aee1b8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2311: 0000000036b41f88 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2312: 0000000036b41f80 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2313: 0000000000122110 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2314: 00000000001223e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2315: 0000000036b40fe0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2316: 0000000036b40fe8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2317: 0000000036aed28c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2318: 0000000036b40f98 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2319: 0000000036b40f90 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2315: 0000000036b41fe0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2316: 0000000036b41fe8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2317: 0000000036aee28c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2318: 0000000036b41f98 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2319: 0000000036b41f90 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2320: 00000000001226b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2321: 0000000000122980 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2322: 0000000036b40ff0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2323: 0000000036b40ff8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2324: 0000000036aed360 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2325: 0000000036b40fa8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2326: 0000000036b40fa0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2322: 0000000036b41ff0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2323: 0000000036b41ff8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2324: 0000000036aee360 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2325: 0000000036b41fa8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2326: 0000000036b41fa0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2327: 0000000000122c50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi2ELi4ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2328: 0000000000122f20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi2ELi4ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2329: 0000000036b41000 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2330: 0000000036b41008 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2331: 0000000036aed434 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2332: 0000000036b40fb8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi4ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2333: 0000000036b40fb0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi4ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2329: 0000000036b42000 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2330: 0000000036b42008 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2331: 0000000036aee434 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2332: 0000000036b41fb8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi4ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2333: 0000000036b41fb0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi4ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2334: 00000000001231f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi2ELi4ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2335: 00000000001234c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi2ELi4ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2336: 0000000036b41010 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2337: 0000000036b41018 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2338: 0000000036aed508 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2336: 0000000036b42010 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2337: 0000000036b42018 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2338: 0000000036aee508 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2339: 0000000000123790 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2340: 0000000000123830 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2341: 00000000001238c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2342: 0000000000123960 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2343: 00000000001239f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2344: 0000000000123a90 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2345: 0000000000123b20 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2346: 0000000000123bc0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2347: 0000000000123c50 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2348: 0000000000123cf0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2349: 0000000000123d80 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi2ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2350: 0000000000123e20 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2351: 0000000000123eb0 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2352: 0000000036b463f0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2353: 0000000036b45470 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2352: 0000000036b473f0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2353: 0000000036b46470 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2354: 0000000000124340 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2355: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_2-ncols2_8.cu\n- 2356: 0000000036b41028 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2357: 0000000036b41020 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2356: 0000000036b42028 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2357: 0000000036b42020 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2358: 000000000012ae50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2359: 000000000012b120 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2360: 0000000036b41080 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2361: 0000000036b41088 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2362: 0000000036aed5dc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2363: 0000000036b41038 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2364: 0000000036b41030 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2360: 0000000036b42080 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2361: 0000000036b42088 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2362: 0000000036aee5dc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2363: 0000000036b42038 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2364: 0000000036b42030 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2365: 000000000012b3f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2366: 000000000012b6c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2367: 0000000036b41090 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2368: 0000000036b41098 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2369: 0000000036aed6b0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2370: 0000000036b41048 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2371: 0000000036b41040 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2367: 0000000036b42090 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2368: 0000000036b42098 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2369: 0000000036aee6b0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2370: 0000000036b42048 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2371: 0000000036b42040 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2372: 000000000012b990 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2373: 000000000012bc60 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2374: 0000000036b410a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2375: 0000000036b410a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2376: 0000000036aed784 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2377: 0000000036b41058 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2378: 0000000036b41050 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2374: 0000000036b420a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2375: 0000000036b420a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2376: 0000000036aee784 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2377: 0000000036b42058 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2378: 0000000036b42050 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2379: 000000000012bf30 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2380: 000000000012c200 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2381: 0000000036b410b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2382: 0000000036b410b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2383: 0000000036aed858 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2384: 0000000036b41068 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2385: 0000000036b41060 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2381: 0000000036b420b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2382: 0000000036b420b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2383: 0000000036aee858 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2384: 0000000036b42068 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2385: 0000000036b42060 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2386: 000000000012c4d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi2ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2387: 000000000012c7a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi2ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2388: 0000000036b410c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2389: 0000000036b410c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2390: 0000000036aed92c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2391: 0000000036b41078 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi8ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2392: 0000000036b41070 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi8ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2388: 0000000036b420c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2389: 0000000036b420c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2390: 0000000036aee92c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2391: 0000000036b42078 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi8ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2392: 0000000036b42070 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi2ELi8ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2393: 000000000012ca70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi2ELi8ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2394: 000000000012cd40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi2ELi8ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2395: 0000000036b410d0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2396: 0000000036b410d8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2397: 0000000036aeda00 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2395: 0000000036b420d0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2396: 0000000036b420d8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2397: 0000000036aeea00 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2398: 000000000012d010 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2399: 000000000012d0b0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2400: 000000000012d140 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2401: 000000000012d1e0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2402: 000000000012d270 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2403: 000000000012d310 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2404: 000000000012d3a0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2405: 000000000012d440 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2406: 000000000012d4d0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2407: 000000000012d570 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2408: 000000000012d600 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi2ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2409: 000000000012d6a0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2410: 000000000012d730 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2411: 0000000036b463f8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2412: 0000000036b45488 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2411: 0000000036b473f8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2412: 0000000036b46488 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2413: 000000000012dbc0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2414: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_32-ncols2_1.cu\n- 2415: 0000000036b410e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2416: 0000000036b410e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2415: 0000000036b420e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2416: 0000000036b420e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2417: 00000000001346d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2418: 00000000001349a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2419: 0000000036b41140 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2420: 0000000036b41148 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2421: 0000000036b410f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2422: 0000000036b410f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2419: 0000000036b42140 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2420: 0000000036b42148 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2421: 0000000036b420f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2422: 0000000036b420f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2423: 0000000000134c70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2424: 0000000000134f40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2425: 0000000036b41150 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2426: 0000000036b41158 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2427: 0000000036b41108 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2428: 0000000036b41100 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2425: 0000000036b42150 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2426: 0000000036b42158 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2427: 0000000036b42108 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2428: 0000000036b42100 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2429: 0000000000135210 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2430: 00000000001354e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2431: 0000000036b41160 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2432: 0000000036b41168 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2433: 0000000036b41118 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2434: 0000000036b41110 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2431: 0000000036b42160 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2432: 0000000036b42168 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2433: 0000000036b42118 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2434: 0000000036b42110 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2435: 00000000001357b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2436: 0000000000135a80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2437: 0000000036b41170 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2438: 0000000036b41178 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2439: 0000000036b41128 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2440: 0000000036b41120 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2437: 0000000036b42170 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2438: 0000000036b42178 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2439: 0000000036b42128 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2440: 0000000036b42120 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2441: 0000000000135d50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2442: 0000000000136020 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2443: 0000000036b41180 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2444: 0000000036b41188 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2445: 0000000036b41138 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2446: 0000000036b41130 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2443: 0000000036b42180 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2444: 0000000036b42188 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2445: 0000000036b42138 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2446: 0000000036b42130 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2447: 00000000001362f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi32ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2448: 00000000001365c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi32ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2449: 0000000036b41190 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2450: 0000000036b41198 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2449: 0000000036b42190 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2450: 0000000036b42198 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2451: 0000000000136890 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2452: 0000000000136930 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2453: 00000000001369c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2454: 0000000000136a60 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2455: 0000000000136af0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2456: 0000000000136b90 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2457: 0000000000136c20 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2458: 0000000000136cc0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2459: 0000000000136d50 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2460: 0000000000136df0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2461: 0000000000136e80 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi32ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2462: 0000000000136f20 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2463: 0000000000136fb0 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2464: 0000000036b46400 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2465: 0000000036b454a0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2464: 0000000036b47400 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2465: 0000000036b464a0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2466: 0000000000137440 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2467: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_32-ncols2_2.cu\n- 2468: 0000000036b411a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2469: 0000000036b411a0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2468: 0000000036b421a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2469: 0000000036b421a0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2470: 0000000000137770 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2471: 0000000000137a40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2472: 0000000036b41200 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2473: 0000000036b41208 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2474: 0000000036aedad4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2475: 0000000036b411b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2476: 0000000036b411b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2472: 0000000036b42200 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2473: 0000000036b42208 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2474: 0000000036aeead4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2475: 0000000036b421b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2476: 0000000036b421b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2477: 0000000000137d10 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2478: 0000000000137fe0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2479: 0000000036b41210 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2480: 0000000036b41218 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2481: 0000000036aedba8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2482: 0000000036b411c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2483: 0000000036b411c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2479: 0000000036b42210 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2480: 0000000036b42218 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2481: 0000000036aeeba8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2482: 0000000036b421c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2483: 0000000036b421c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2484: 00000000001382b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2485: 0000000000138580 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2486: 0000000036b41220 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2487: 0000000036b41228 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2488: 0000000036aedc7c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2489: 0000000036b411d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2490: 0000000036b411d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2486: 0000000036b42220 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2487: 0000000036b42228 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2488: 0000000036aeec7c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2489: 0000000036b421d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2490: 0000000036b421d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2491: 0000000000138850 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2492: 0000000000138b20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2493: 0000000036b41230 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2494: 0000000036b41238 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2495: 0000000036aedd50 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2496: 0000000036b411e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2497: 0000000036b411e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2493: 0000000036b42230 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2494: 0000000036b42238 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2495: 0000000036aeed50 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2496: 0000000036b421e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2497: 0000000036b421e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2498: 0000000000138df0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2499: 00000000001390c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2500: 0000000036b41240 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2501: 0000000036b41248 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2502: 0000000036aede24 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2503: 0000000036b411f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2504: 0000000036b411f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2500: 0000000036b42240 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2501: 0000000036b42248 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2502: 0000000036aeee24 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2503: 0000000036b421f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2504: 0000000036b421f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2505: 0000000000139390 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi32ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2506: 0000000000139660 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi32ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2507: 0000000036b41250 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2508: 0000000036b41258 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2509: 0000000036aedef8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2507: 0000000036b42250 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2508: 0000000036b42258 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2509: 0000000036aeeef8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2510: 0000000000139930 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2511: 00000000001399d0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2512: 0000000000139a60 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2513: 0000000000139b00 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2514: 0000000000139b90 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2515: 0000000000139c30 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2516: 0000000000139cc0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2517: 0000000000139d60 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2518: 0000000000139df0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2519: 0000000000139e90 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2520: 0000000000139f20 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi32ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2521: 0000000000139fc0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2522: 000000000013a050 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2523: 0000000036b46408 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2524: 0000000036b454b8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2523: 0000000036b47408 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2524: 0000000036b464b8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2525: 000000000013a4e0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2526: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_4-ncols2_16.cu\n- 2527: 0000000036b41268 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi4ELi16ELi8ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2528: 0000000036b41260 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi4ELi16ELi8ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2527: 0000000036b42268 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi4ELi16ELi8ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2528: 0000000036b42260 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi576ELi512ELi4ELi16ELi8ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2529: 0000000000140f90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi576ELi512ELi4ELi16ELi8ELi2ELb0ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2530: 0000000000141260 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi576ELi512ELi4ELi16ELi8ELi2ELb1ELb1EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2531: 0000000036b41270 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi512ELi4ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2532: 0000000036b41278 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2533: 0000000036aedfcc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2531: 0000000036b42270 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi512ELi4ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2532: 0000000036b42278 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2533: 0000000036aeefcc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n 2534: 0000000000141530 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi512ELi4ELi16EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2535: 00000000001415d0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi512EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2536: 0000000000141660 240 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2537: 0000000036b46410 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2538: 0000000036b454d0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2537: 0000000036b47410 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2538: 0000000036b464d0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2539: 0000000000141750 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2540: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_4-ncols2_2.cu\n- 2541: 0000000036b41288 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2542: 0000000036b41280 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2541: 0000000036b42288 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2542: 0000000036b42280 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2543: 0000000000142910 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2544: 0000000000142be0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2545: 0000000036b412e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2546: 0000000036b412e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2547: 0000000036aee0a0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2548: 0000000036b41298 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2549: 0000000036b41290 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2545: 0000000036b422e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2546: 0000000036b422e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2547: 0000000036aef0a0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2548: 0000000036b42298 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2549: 0000000036b42290 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2550: 0000000000142eb0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2551: 0000000000143180 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2552: 0000000036b412f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2553: 0000000036b412f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2554: 0000000036aee174 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2555: 0000000036b412a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2556: 0000000036b412a0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2552: 0000000036b422f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2553: 0000000036b422f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2554: 0000000036aef174 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2555: 0000000036b422a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2556: 0000000036b422a0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2557: 0000000000143450 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2558: 0000000000143720 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2559: 0000000036b41300 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2560: 0000000036b41308 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2561: 0000000036aee248 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2562: 0000000036b412b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2563: 0000000036b412b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2559: 0000000036b42300 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2560: 0000000036b42308 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2561: 0000000036aef248 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2562: 0000000036b422b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2563: 0000000036b422b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2564: 00000000001439f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2565: 0000000000143cc0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2566: 0000000036b41310 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2567: 0000000036b41318 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2568: 0000000036aee31c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2569: 0000000036b412c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2570: 0000000036b412c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2566: 0000000036b42310 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2567: 0000000036b42318 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2568: 0000000036aef31c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2569: 0000000036b422c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2570: 0000000036b422c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2571: 0000000000143f90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi4ELi2ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2572: 0000000000144260 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi4ELi2ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2573: 0000000036b41320 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2574: 0000000036b41328 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2575: 0000000036aee3f0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2576: 0000000036b412d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi2ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2577: 0000000036b412d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi2ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2573: 0000000036b42320 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2574: 0000000036b42328 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2575: 0000000036aef3f0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2576: 0000000036b422d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi2ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2577: 0000000036b422d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi2ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2578: 0000000000144530 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi4ELi2ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2579: 0000000000144800 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi4ELi2ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2580: 0000000036b41330 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2581: 0000000036b41338 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2582: 0000000036aee4c4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2580: 0000000036b42330 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2581: 0000000036b42338 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2582: 0000000036aef4c4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2583: 0000000000144ad0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2584: 0000000000144b70 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2585: 0000000000144c00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2586: 0000000000144ca0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2587: 0000000000144d30 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2588: 0000000000144dd0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2589: 0000000000144e60 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2590: 0000000000144f00 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2591: 0000000000144f90 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2592: 0000000000145030 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2593: 00000000001450c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi4ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2594: 0000000000145160 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2595: 00000000001451f0 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2596: 0000000036b46418 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2597: 0000000036b454e8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2596: 0000000036b47418 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2597: 0000000036b464e8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2598: 0000000000145680 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2599: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_4-ncols2_4.cu\n- 2600: 0000000036b41348 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2601: 0000000036b41340 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2600: 0000000036b42348 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2601: 0000000036b42340 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2602: 000000000014c130 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2603: 000000000014c400 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2604: 0000000036b413a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2605: 0000000036b413a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2606: 0000000036aee598 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2607: 0000000036b41358 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2608: 0000000036b41350 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2604: 0000000036b423a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2605: 0000000036b423a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2606: 0000000036aef598 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2607: 0000000036b42358 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2608: 0000000036b42350 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2609: 000000000014c6d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2610: 000000000014c9a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2611: 0000000036b413b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2612: 0000000036b413b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2613: 0000000036aee66c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2614: 0000000036b41368 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2615: 0000000036b41360 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2611: 0000000036b423b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2612: 0000000036b423b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2613: 0000000036aef66c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2614: 0000000036b42368 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2615: 0000000036b42360 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2616: 000000000014cc70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2617: 000000000014cf40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2618: 0000000036b413c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2619: 0000000036b413c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2620: 0000000036aee740 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2621: 0000000036b41378 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2622: 0000000036b41370 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2618: 0000000036b423c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2619: 0000000036b423c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2620: 0000000036aef740 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2621: 0000000036b42378 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2622: 0000000036b42370 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2623: 000000000014d210 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2624: 000000000014d4e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2625: 0000000036b413d0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2626: 0000000036b413d8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2627: 0000000036aee814 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2628: 0000000036b41388 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2629: 0000000036b41380 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2625: 0000000036b423d0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2626: 0000000036b423d8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2627: 0000000036aef814 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2628: 0000000036b42388 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2629: 0000000036b42380 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2630: 000000000014d7b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi4ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2631: 000000000014da80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi4ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2632: 0000000036b413e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2633: 0000000036b413e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2634: 0000000036aee8e8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2635: 0000000036b41398 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi4ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2636: 0000000036b41390 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi4ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2632: 0000000036b423e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2633: 0000000036b423e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2634: 0000000036aef8e8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2635: 0000000036b42398 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi4ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2636: 0000000036b42390 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi4ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2637: 000000000014dd50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi4ELi4ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2638: 000000000014e020 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi4ELi4ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2639: 0000000036b413f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2640: 0000000036b413f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2641: 0000000036aee9bc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2639: 0000000036b423f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2640: 0000000036b423f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2641: 0000000036aef9bc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2642: 000000000014e2f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2643: 000000000014e390 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2644: 000000000014e420 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2645: 000000000014e4c0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2646: 000000000014e550 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2647: 000000000014e5f0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2648: 000000000014e680 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2649: 000000000014e720 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2650: 000000000014e7b0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2651: 000000000014e850 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2652: 000000000014e8e0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi4ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2653: 000000000014e980 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2654: 000000000014ea10 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2655: 0000000036b46420 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2656: 0000000036b45500 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2655: 0000000036b47420 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2656: 0000000036b46500 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2657: 000000000014eea0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2658: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_4-ncols2_8.cu\n- 2659: 0000000036b41408 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2660: 0000000036b41400 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2659: 0000000036b42408 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2660: 0000000036b42400 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2661: 00000000001559b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2662: 0000000000155c80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2663: 0000000036b41460 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2664: 0000000036b41468 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2665: 0000000036aeea90 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2666: 0000000036b41418 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2667: 0000000036b41410 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2663: 0000000036b42460 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2664: 0000000036b42468 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2665: 0000000036aefa90 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2666: 0000000036b42418 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2667: 0000000036b42410 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2668: 0000000000155f50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2669: 0000000000156220 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2670: 0000000036b41470 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2671: 0000000036b41478 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2672: 0000000036aeeb64 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2673: 0000000036b41428 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2674: 0000000036b41420 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2670: 0000000036b42470 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2671: 0000000036b42478 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2672: 0000000036aefb64 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2673: 0000000036b42428 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2674: 0000000036b42420 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2675: 00000000001564f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2676: 00000000001567c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2677: 0000000036b41480 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2678: 0000000036b41488 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2679: 0000000036aeec38 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2680: 0000000036b41438 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2681: 0000000036b41430 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2677: 0000000036b42480 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2678: 0000000036b42488 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2679: 0000000036aefc38 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2680: 0000000036b42438 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2681: 0000000036b42430 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2682: 0000000000156a90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2683: 0000000000156d60 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2684: 0000000036b41490 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2685: 0000000036b41498 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2686: 0000000036aeed0c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2687: 0000000036b41448 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2688: 0000000036b41440 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2684: 0000000036b42490 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2685: 0000000036b42498 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2686: 0000000036aefd0c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2687: 0000000036b42448 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2688: 0000000036b42440 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2689: 0000000000157030 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2690: 0000000000157300 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2691: 0000000036b414a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2692: 0000000036b414a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2693: 0000000036aeede0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2694: 0000000036b41458 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2695: 0000000036b41450 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2691: 0000000036b424a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2692: 0000000036b424a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2693: 0000000036aefde0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2694: 0000000036b42458 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2695: 0000000036b42450 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2696: 00000000001575d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi4ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2697: 00000000001578a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi4ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2698: 0000000036b414b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2699: 0000000036b414b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2700: 0000000036aeeeb4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2698: 0000000036b424b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2699: 0000000036b424b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2700: 0000000036aefeb4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2701: 0000000000157b70 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2702: 0000000000157c10 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2703: 0000000000157ca0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2704: 0000000000157d40 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2705: 0000000000157dd0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2706: 0000000000157e70 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2707: 0000000000157f00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2708: 0000000000157fa0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2709: 0000000000158030 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2710: 00000000001580d0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2711: 0000000000158160 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi4ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2712: 0000000000158200 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2713: 0000000000158290 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2714: 0000000036b46428 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2715: 0000000036b45518 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2714: 0000000036b47428 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2715: 0000000036b46518 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2716: 0000000000158720 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2717: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_64-ncols2_1.cu\n- 2718: 0000000036b414c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2719: 0000000036b414c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2718: 0000000036b424c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2719: 0000000036b424c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2720: 000000000015f230 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2721: 000000000015f500 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2722: 0000000036b41520 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2723: 0000000036b41528 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2724: 0000000036aeef88 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2725: 0000000036b414d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2726: 0000000036b414d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2722: 0000000036b42520 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2723: 0000000036b42528 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2724: 0000000036aeff88 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2725: 0000000036b424d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2726: 0000000036b424d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2727: 000000000015f7d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2728: 000000000015faa0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2729: 0000000036b41530 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2730: 0000000036b41538 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2731: 0000000036aef05c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2732: 0000000036b414e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2733: 0000000036b414e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2729: 0000000036b42530 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2730: 0000000036b42538 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2731: 0000000036af005c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2732: 0000000036b424e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2733: 0000000036b424e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2734: 000000000015fd70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2735: 0000000000160040 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2736: 0000000036b41540 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2737: 0000000036b41548 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2738: 0000000036aef130 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2739: 0000000036b414f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2740: 0000000036b414f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2736: 0000000036b42540 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2737: 0000000036b42548 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2738: 0000000036af0130 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2739: 0000000036b424f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2740: 0000000036b424f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2741: 0000000000160310 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2742: 00000000001605e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2743: 0000000036b41550 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2744: 0000000036b41558 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2745: 0000000036aef204 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2746: 0000000036b41508 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2747: 0000000036b41500 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2743: 0000000036b42550 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2744: 0000000036b42558 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2745: 0000000036af0204 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2746: 0000000036b42508 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2747: 0000000036b42500 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2748: 00000000001608b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2749: 0000000000160b80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2750: 0000000036b41560 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2751: 0000000036b41568 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2752: 0000000036aef2d8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2753: 0000000036b41518 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2754: 0000000036b41510 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2750: 0000000036b42560 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2751: 0000000036b42568 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2752: 0000000036af02d8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2753: 0000000036b42518 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2754: 0000000036b42510 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2755: 0000000000160e50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi64ELi1ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2756: 0000000000161120 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi64ELi1ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2757: 0000000036b41570 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2758: 0000000036b41578 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2759: 0000000036aef3ac 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2757: 0000000036b42570 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2758: 0000000036b42578 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2759: 0000000036af03ac 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2760: 00000000001613f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2761: 0000000000161490 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2762: 0000000000161520 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2763: 00000000001615c0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2764: 0000000000161650 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2765: 00000000001616f0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2766: 0000000000161780 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2767: 0000000000161820 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2768: 00000000001618b0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2769: 0000000000161950 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2770: 00000000001619e0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi64ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2771: 0000000000161a80 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2772: 0000000000161b10 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2773: 0000000036b46430 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2774: 0000000036b45530 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2773: 0000000036b47430 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2774: 0000000036b46530 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2775: 0000000000161fa0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2776: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_8-ncols2_1.cu\n- 2777: 0000000036b41588 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2778: 0000000036b41580 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2777: 0000000036b42588 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2778: 0000000036b42580 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2779: 0000000000168a50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2780: 0000000000168d20 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2781: 0000000036b415e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2782: 0000000036b415e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2783: 0000000036aef480 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2784: 0000000036b41598 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2785: 0000000036b41590 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2781: 0000000036b425e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2782: 0000000036b425e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2783: 0000000036af0480 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2784: 0000000036b42598 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2785: 0000000036b42590 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2786: 0000000000168ff0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2787: 00000000001692c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2788: 0000000036b415f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2789: 0000000036b415f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2790: 0000000036aef554 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2791: 0000000036b415a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2792: 0000000036b415a0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2788: 0000000036b425f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2789: 0000000036b425f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2790: 0000000036af0554 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2791: 0000000036b425a8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2792: 0000000036b425a0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2793: 0000000000169590 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2794: 0000000000169860 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2795: 0000000036b41600 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2796: 0000000036b41608 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2797: 0000000036aef628 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2798: 0000000036b415b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2799: 0000000036b415b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2795: 0000000036b42600 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2796: 0000000036b42608 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2797: 0000000036af0628 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2798: 0000000036b425b8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2799: 0000000036b425b0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2800: 0000000000169b30 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2801: 0000000000169e00 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2802: 0000000036b41610 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2803: 0000000036b41618 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2804: 0000000036aef6fc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2805: 0000000036b415c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2806: 0000000036b415c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2802: 0000000036b42610 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2803: 0000000036b42618 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2804: 0000000036af06fc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2805: 0000000036b425c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2806: 0000000036b425c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2807: 000000000016a0d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi1ELi4ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2808: 000000000016a3a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi1ELi4ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2809: 0000000036b41620 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2810: 0000000036b41628 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2811: 0000000036aef7d0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2812: 0000000036b415d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi1ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2813: 0000000036b415d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi1ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2809: 0000000036b42620 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2810: 0000000036b42628 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2811: 0000000036af07d0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2812: 0000000036b425d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi1ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2813: 0000000036b425d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi1ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2814: 000000000016a670 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi1ELi2ELi1ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2815: 000000000016a940 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi1ELi2ELi1ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2816: 0000000036b41630 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2817: 0000000036b41638 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2818: 0000000036aef8a4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2816: 0000000036b42630 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2817: 0000000036b42638 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2818: 0000000036af08a4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2819: 000000000016ac10 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2820: 000000000016acb0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2821: 000000000016ad40 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2822: 000000000016ade0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2823: 000000000016ae70 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2824: 000000000016af10 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2825: 000000000016afa0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2826: 000000000016b040 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2827: 000000000016b0d0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2828: 000000000016b170 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2829: 000000000016b200 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2830: 000000000016b2a0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2831: 000000000016b330 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2832: 0000000036b46438 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2833: 0000000036b45548 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2832: 0000000036b47438 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2833: 0000000036b46548 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2834: 000000000016b7c0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2835: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_8-ncols2_2.cu\n- 2836: 0000000036b41648 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2837: 0000000036b41640 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2836: 0000000036b42648 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2837: 0000000036b42640 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2838: 0000000000172270 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2839: 0000000000172540 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2840: 0000000036b416a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2841: 0000000036b416a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2842: 0000000036aef978 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2843: 0000000036b41658 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2844: 0000000036b41650 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2840: 0000000036b426a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2841: 0000000036b426a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2842: 0000000036af0978 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2843: 0000000036b42658 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2844: 0000000036b42650 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2845: 0000000000172810 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2846: 0000000000172ae0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2847: 0000000036b416b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2848: 0000000036b416b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2849: 0000000036aefa4c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2850: 0000000036b41668 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2851: 0000000036b41660 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2847: 0000000036b426b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2848: 0000000036b426b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2849: 0000000036af0a4c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2850: 0000000036b42668 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2851: 0000000036b42660 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2852: 0000000000172db0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2853: 0000000000173080 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2854: 0000000036b416c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2855: 0000000036b416c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2856: 0000000036aefb20 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2857: 0000000036b41678 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2858: 0000000036b41670 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2854: 0000000036b426c0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2855: 0000000036b426c8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2856: 0000000036af0b20 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2857: 0000000036b42678 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2858: 0000000036b42670 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2859: 0000000000173350 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2860: 0000000000173620 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2861: 0000000036b416d0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2862: 0000000036b416d8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2863: 0000000036aefbf4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2864: 0000000036b41688 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2865: 0000000036b41680 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2861: 0000000036b426d0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2862: 0000000036b426d8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2863: 0000000036af0bf4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2864: 0000000036b42688 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2865: 0000000036b42680 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2866: 00000000001738f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi2ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2867: 0000000000173bc0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi2ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2868: 0000000036b416e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2869: 0000000036b416e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2870: 0000000036aefcc8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2871: 0000000036b41698 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi2ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2872: 0000000036b41690 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi2ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2868: 0000000036b426e0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2869: 0000000036b426e8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2870: 0000000036af0cc8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2871: 0000000036b42698 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi2ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2872: 0000000036b42690 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi2ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2873: 0000000000173e90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi2ELi2ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2874: 0000000000174160 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi2ELi2ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2875: 0000000036b416f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2876: 0000000036b416f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2877: 0000000036aefd9c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2875: 0000000036b426f0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2876: 0000000036b426f8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2877: 0000000036af0d9c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2878: 0000000000174430 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2879: 00000000001744d0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2880: 0000000000174560 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2881: 0000000000174600 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2882: 0000000000174690 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2883: 0000000000174730 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2884: 00000000001747c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2885: 0000000000174860 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2886: 00000000001748f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2887: 0000000000174990 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2888: 0000000000174a20 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi8ELi2EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2889: 0000000000174ac0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2890: 0000000000174b50 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2891: 0000000036b46440 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2892: 0000000036b45560 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2891: 0000000036b47440 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2892: 0000000036b46560 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2893: 0000000000174fe0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2894: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_8-ncols2_4.cu\n- 2895: 0000000036b41708 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2896: 0000000036b41700 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2895: 0000000036b42708 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2896: 0000000036b42700 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2897: 000000000017ba90 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2898: 000000000017bd60 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2899: 0000000036b41760 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2900: 0000000036b41768 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2901: 0000000036aefe70 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2902: 0000000036b41718 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2903: 0000000036b41710 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2899: 0000000036b42760 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2900: 0000000036b42768 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2901: 0000000036af0e70 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2902: 0000000036b42718 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2903: 0000000036b42710 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2904: 000000000017c030 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2905: 000000000017c300 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2906: 0000000036b41770 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2907: 0000000036b41778 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2908: 0000000036aeff44 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2909: 0000000036b41728 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2910: 0000000036b41720 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2906: 0000000036b42770 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2907: 0000000036b42778 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2908: 0000000036af0f44 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2909: 0000000036b42728 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2910: 0000000036b42720 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2911: 000000000017c5d0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2912: 000000000017c8a0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2913: 0000000036b41780 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2914: 0000000036b41788 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2915: 0000000036af0018 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2916: 0000000036b41738 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2917: 0000000036b41730 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2913: 0000000036b42780 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2914: 0000000036b42788 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2915: 0000000036af1018 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2916: 0000000036b42738 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2917: 0000000036b42730 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2918: 000000000017cb70 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2919: 000000000017ce40 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2920: 0000000036b41790 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2921: 0000000036b41798 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2922: 0000000036af00ec 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2923: 0000000036b41748 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2924: 0000000036b41740 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2920: 0000000036b42790 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2921: 0000000036b42798 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2922: 0000000036af10ec 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2923: 0000000036b42748 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2924: 0000000036b42740 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2925: 000000000017d110 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2926: 000000000017d3e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2927: 0000000036b417a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2928: 0000000036b417a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2929: 0000000036af01c0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2930: 0000000036b41758 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2931: 0000000036b41750 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2927: 0000000036b427a0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2928: 0000000036b427a8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2929: 0000000036af11c0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2930: 0000000036b42758 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2931: 0000000036b42750 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2932: 000000000017d6b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi4ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2933: 000000000017d980 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi4ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2934: 0000000036b417b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2935: 0000000036b417b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2936: 0000000036af0294 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2934: 0000000036b427b0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2935: 0000000036b427b8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2936: 0000000036af1294 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2937: 000000000017dc50 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2938: 000000000017dcf0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2939: 000000000017dd80 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2940: 000000000017de20 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2941: 000000000017deb0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2942: 000000000017df50 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2943: 000000000017dfe0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2944: 000000000017e080 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2945: 000000000017e110 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2946: 000000000017e1b0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2947: 000000000017e240 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi8ELi4EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2948: 000000000017e2e0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2949: 000000000017e370 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 2950: 0000000036b46448 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 2951: 0000000036b45578 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 2950: 0000000036b47448 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 2951: 0000000036b46578 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 2952: 000000000017e800 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 2953: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-mma-f16-instance-ncols1_8-ncols2_8.cu\n- 2954: 0000000036b417c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2955: 0000000036b417c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2954: 0000000036b427c8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2955: 0000000036b427c0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi64ELi64ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2956: 0000000000185310 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2957: 00000000001855e0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi64ELi64ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2958: 0000000036b41820 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2959: 0000000036b41828 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2960: 0000000036af0368 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n- 2961: 0000000036b417d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2962: 0000000036b417d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2958: 0000000036b42820 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2959: 0000000036b42828 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2960: 0000000036af1368 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table3\n+ 2961: 0000000036b427d8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2962: 0000000036b427d0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi80ELi80ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2963: 00000000001858b0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2964: 0000000000185b80 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi80ELi80ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2965: 0000000036b41830 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2966: 0000000036b41838 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2967: 0000000036af043c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n- 2968: 0000000036b417e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2969: 0000000036b417e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2965: 0000000036b42830 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi80ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2966: 0000000036b42838 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2967: 0000000036af143c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table7\n+ 2968: 0000000036b427e8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2969: 0000000036b427e0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi96ELi96ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2970: 0000000000185e50 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2971: 0000000000186120 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi96ELi96ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2972: 0000000036b41840 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2973: 0000000036b41848 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2974: 0000000036af0510 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n- 2975: 0000000036b417f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2976: 0000000036b417f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2972: 0000000036b42840 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi96ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2973: 0000000036b42848 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2974: 0000000036af1510 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 2975: 0000000036b427f8 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2976: 0000000036b427f0 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi112ELi112ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2977: 00000000001863f0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2978: 00000000001866c0 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi112ELi112ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2979: 0000000036b41850 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2980: 0000000036b41858 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2981: 0000000036af05e4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n- 2982: 0000000036b41808 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2983: 0000000036b41800 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2979: 0000000036b42850 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi112ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2980: 0000000036b42858 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2981: 0000000036af15e4 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 2982: 0000000036b42808 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2983: 0000000036b42800 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi128ELi128ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2984: 0000000000186990 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2985: 0000000000186c60 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi128ELi128ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2986: 0000000036b41860 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2987: 0000000036b41868 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2988: 0000000036af06b8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n- 2989: 0000000036b41818 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2990: 0000000036b41810 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2986: 0000000036b42860 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2987: 0000000036b42868 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2988: 0000000036af16b8 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table19\n+ 2989: 0000000036b42818 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 2990: 0000000036b42810 8 OBJECT LOCAL DEFAULT 21 _ZL18flash_attn_ext_f16ILi256ELi256ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2991: 0000000000186f30 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi8ELi4ELi2ELb0ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 2992: 0000000000187200 706 FUNC LOCAL DEFAULT 12 _ZL33__device_stub__flash_attn_ext_f16ILi256ELi256ELi8ELi8ELi4ELi2ELb1ELb0EEvPKcS1_S1_S1_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 2993: 0000000036b41870 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 2994: 0000000036b41878 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 2995: 0000000036af078c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n+ 2993: 0000000036b42870 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 2994: 0000000036b42878 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 2995: 0000000036af178c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table23\n 2996: 00000000001874d0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2997: 0000000000187570 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 2998: 0000000000187600 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi80ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 2999: 00000000001876a0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi80EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 3000: 0000000000187730 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi96ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 3001: 00000000001877d0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi96EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 3002: 0000000000187860 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi112ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 3003: 0000000000187900 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi112EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 3004: 0000000000187990 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 3005: 0000000000187a30 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 3006: 0000000000187ac0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi8ELi8EEvPfPK15HIP_vector_typeIfLj2EEiii\n 3007: 0000000000187b60 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 3008: 0000000000187bf0 1160 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3009: 0000000036b46450 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3010: 0000000036b45590 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3009: 0000000036b47450 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3010: 0000000036b46590 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3011: 0000000000188080 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3012: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq1_s.cu\n 3013: 0000000000193dd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3014: 0000000036b41a58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3014: 0000000036b42a58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3015: 0000000000193c10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3016: 0000000036b41a50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3016: 0000000036b42a50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3017: 0000000000192c90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3018: 0000000036b419f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3018: 0000000036b429f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3019: 0000000000192ad0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3020: 0000000036b419f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3020: 0000000036b429f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3021: 0000000000190450 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3022: 0000000036b41918 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3022: 0000000036b42918 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3023: 0000000000190290 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3024: 0000000036b41910 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3024: 0000000036b42910 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3025: 0000000000193250 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3026: 0000000036b41a18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3026: 0000000036b42a18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3027: 0000000000193090 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3028: 0000000036b41a10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3028: 0000000036b42a10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3029: 0000000000192110 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3030: 0000000036b419b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3030: 0000000036b429b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3031: 0000000000191f50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3032: 0000000036b419b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3032: 0000000036b429b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3033: 000000000018f8d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3034: 0000000036b418d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3034: 0000000036b428d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3035: 000000000018f710 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3036: 0000000036b418d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3036: 0000000036b428d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3037: 0000000000194390 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3038: 0000000036b41a78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3038: 0000000036b42a78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3039: 00000000001941d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3040: 0000000036b41a70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3040: 0000000036b42a70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3041: 000000000018fe90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3042: 0000000036b418f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3042: 0000000036b428f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3043: 000000000018fcd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3044: 0000000036b418f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3044: 0000000036b428f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3045: 0000000000191590 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3046: 0000000036b41978 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3046: 0000000036b42978 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3047: 00000000001913d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3048: 0000000036b41970 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3048: 0000000036b42970 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3049: 000000000018ed50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3050: 0000000036b41898 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3050: 0000000036b42898 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3051: 000000000018f310 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3052: 0000000036b418b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3052: 0000000036b428b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3053: 000000000018eb90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3054: 0000000036b41890 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3054: 0000000036b42890 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3055: 000000000018f150 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3056: 0000000036b418b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3056: 0000000036b428b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3057: 0000000000190a10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3058: 0000000036b41938 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3058: 0000000036b42938 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3059: 0000000000190850 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3060: 0000000036b41930 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3060: 0000000036b42930 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3061: 0000000000193810 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3062: 0000000036b41a38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3062: 0000000036b42a38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3063: 0000000000193650 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3064: 0000000036b41a30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3064: 0000000036b42a30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3065: 0000000000190fd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3066: 0000000036b41958 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3066: 0000000036b42958 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3067: 0000000000190e10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3068: 0000000036b41950 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3068: 0000000036b42950 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3069: 00000000001926d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3070: 0000000036b419d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3070: 0000000036b429d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3071: 0000000000192510 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3072: 0000000036b419d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3072: 0000000036b429d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3073: 0000000000191b50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3074: 0000000036b41998 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3074: 0000000036b42998 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3075: 0000000000191990 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type19ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3076: 0000000036b41990 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3077: 0000000036af0860 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3078: 0000000036b41880 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3079: 0000000036b41888 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3076: 0000000036b42990 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type19ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3077: 0000000036af1860 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3078: 0000000036b42880 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3079: 0000000036b42888 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3080: 000000000018ef10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3081: 000000000018f030 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3082: 0000000036b418a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3083: 0000000036b418a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3082: 0000000036b428a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3083: 0000000036b428a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3084: 000000000018f4d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3085: 000000000018f5f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3086: 0000000036b418c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3087: 0000000036b418c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3086: 0000000036b428c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3087: 0000000036b428c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3088: 000000000018fa90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3089: 000000000018fbb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3090: 0000000036b418e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3091: 0000000036b418e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3090: 0000000036b428e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3091: 0000000036b428e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3092: 0000000000190050 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3093: 0000000000190170 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3094: 0000000036b41900 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3095: 0000000036b41908 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3094: 0000000036b42900 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3095: 0000000036b42908 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3096: 0000000000190610 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3097: 0000000000190730 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3098: 0000000036b41920 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3099: 0000000036b41928 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3098: 0000000036b42920 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3099: 0000000036b42928 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3100: 0000000000190bd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3101: 0000000000190cf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3102: 0000000036b41940 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3103: 0000000036b41948 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3102: 0000000036b42940 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3103: 0000000036b42948 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3104: 0000000000191190 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3105: 00000000001912b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3106: 0000000036b41960 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3107: 0000000036b41968 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3106: 0000000036b42960 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3107: 0000000036b42968 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3108: 0000000000191750 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3109: 0000000000191870 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3110: 0000000036b41980 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3111: 0000000036b41988 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3110: 0000000036b42980 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3111: 0000000036b42988 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3112: 0000000000191d10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3113: 0000000000191e30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3114: 0000000036b419a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3115: 0000000036b419a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3114: 0000000036b429a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3115: 0000000036b429a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3116: 00000000001922d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3117: 00000000001923f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3118: 0000000036b419c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3119: 0000000036b419c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3118: 0000000036b429c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3119: 0000000036b429c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3120: 0000000000192890 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3121: 00000000001929b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3122: 0000000036b419e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3123: 0000000036b419e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3122: 0000000036b429e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3123: 0000000036b429e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3124: 0000000000192e50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3125: 0000000000192f70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3126: 0000000036b41a00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3127: 0000000036b41a08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3126: 0000000036b42a00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3127: 0000000036b42a08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3128: 0000000000193410 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3129: 0000000000193530 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3130: 0000000036b41a20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3131: 0000000036b41a28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3130: 0000000036b42a20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3131: 0000000036b42a28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3132: 00000000001939d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3133: 0000000000193af0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3134: 0000000036b41a40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3135: 0000000036b41a48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3134: 0000000036b42a40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3135: 0000000036b42a48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3136: 0000000000193f90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3137: 00000000001940b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3138: 0000000036b41a60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3139: 0000000036b41a68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3138: 0000000036b42a60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3139: 0000000036b42a68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type19ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3140: 0000000000194550 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3141: 0000000000194670 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type19ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3142: 0000000000194790 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3143: 0000000036b46458 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3144: 0000000036b455a8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3143: 0000000036b47458 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3144: 0000000036b465a8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3145: 0000000000195460 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3146: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq2_s.cu\n 3147: 00000000001a4ac0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3148: 0000000036b41c58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3148: 0000000036b42c58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3149: 00000000001a4900 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3150: 0000000036b41c50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3150: 0000000036b42c50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3151: 00000000001a3980 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3152: 0000000036b41bf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3152: 0000000036b42bf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3153: 00000000001a37c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3154: 0000000036b41bf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3154: 0000000036b42bf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3155: 00000000001a1140 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3156: 0000000036b41b18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3156: 0000000036b42b18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3157: 00000000001a0f80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3158: 0000000036b41b10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3158: 0000000036b42b10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3159: 00000000001a3f40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3160: 0000000036b41c18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3160: 0000000036b42c18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3161: 00000000001a3d80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3162: 0000000036b41c10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3162: 0000000036b42c10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3163: 00000000001a2e00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3164: 0000000036b41bb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3164: 0000000036b42bb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3165: 00000000001a2c40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3166: 0000000036b41bb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3166: 0000000036b42bb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3167: 00000000001a05c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3168: 0000000036b41ad8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3168: 0000000036b42ad8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3169: 00000000001a0400 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3170: 0000000036b41ad0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3170: 0000000036b42ad0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3171: 00000000001a5080 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3172: 0000000036b41c78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3172: 0000000036b42c78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3173: 00000000001a4ec0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3174: 0000000036b41c70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3174: 0000000036b42c70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3175: 00000000001a0b80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3176: 0000000036b41af8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3176: 0000000036b42af8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3177: 00000000001a09c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3178: 0000000036b41af0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3178: 0000000036b42af0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3179: 00000000001a2280 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3180: 0000000036b41b78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3180: 0000000036b42b78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3181: 00000000001a20c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3182: 0000000036b41b70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3182: 0000000036b42b70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3183: 000000000019fa40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3184: 0000000036b41a98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3184: 0000000036b42a98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3185: 00000000001a0000 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3186: 0000000036b41ab8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3186: 0000000036b42ab8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3187: 000000000019f880 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3188: 0000000036b41a90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3188: 0000000036b42a90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3189: 000000000019fe40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3190: 0000000036b41ab0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3190: 0000000036b42ab0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3191: 00000000001a1700 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3192: 0000000036b41b38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3192: 0000000036b42b38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3193: 00000000001a1540 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3194: 0000000036b41b30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3194: 0000000036b42b30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3195: 00000000001a4500 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3196: 0000000036b41c38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3196: 0000000036b42c38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3197: 00000000001a4340 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3198: 0000000036b41c30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3198: 0000000036b42c30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3199: 00000000001a1cc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3200: 0000000036b41b58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3200: 0000000036b42b58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3201: 00000000001a1b00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3202: 0000000036b41b50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3202: 0000000036b42b50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3203: 00000000001a33c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3204: 0000000036b41bd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3204: 0000000036b42bd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3205: 00000000001a3200 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3206: 0000000036b41bd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3206: 0000000036b42bd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3207: 00000000001a2840 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3208: 0000000036b41b98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3208: 0000000036b42b98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3209: 00000000001a2680 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type22ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3210: 0000000036b41b90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3211: 0000000036af0b60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3212: 0000000036b41a80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3213: 0000000036b41a88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3210: 0000000036b42b90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type22ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3211: 0000000036af1b60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3212: 0000000036b42a80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3213: 0000000036b42a88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3214: 000000000019fc00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3215: 000000000019fd20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3216: 0000000036b41aa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3217: 0000000036b41aa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3216: 0000000036b42aa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3217: 0000000036b42aa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3218: 00000000001a01c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3219: 00000000001a02e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3220: 0000000036b41ac0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3221: 0000000036b41ac8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3220: 0000000036b42ac0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3221: 0000000036b42ac8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3222: 00000000001a0780 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3223: 00000000001a08a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3224: 0000000036b41ae0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3225: 0000000036b41ae8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3224: 0000000036b42ae0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3225: 0000000036b42ae8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3226: 00000000001a0d40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3227: 00000000001a0e60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3228: 0000000036b41b00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3229: 0000000036b41b08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3228: 0000000036b42b00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3229: 0000000036b42b08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3230: 00000000001a1300 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3231: 00000000001a1420 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3232: 0000000036b41b20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3233: 0000000036b41b28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3232: 0000000036b42b20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3233: 0000000036b42b28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3234: 00000000001a18c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3235: 00000000001a19e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3236: 0000000036b41b40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3237: 0000000036b41b48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3236: 0000000036b42b40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3237: 0000000036b42b48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3238: 00000000001a1e80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3239: 00000000001a1fa0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3240: 0000000036b41b60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3241: 0000000036b41b68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3240: 0000000036b42b60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3241: 0000000036b42b68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3242: 00000000001a2440 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3243: 00000000001a2560 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3244: 0000000036b41b80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3245: 0000000036b41b88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3244: 0000000036b42b80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3245: 0000000036b42b88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3246: 00000000001a2a00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3247: 00000000001a2b20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3248: 0000000036b41ba0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3249: 0000000036b41ba8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3248: 0000000036b42ba0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3249: 0000000036b42ba8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3250: 00000000001a2fc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3251: 00000000001a30e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3252: 0000000036b41bc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3253: 0000000036b41bc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3252: 0000000036b42bc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3253: 0000000036b42bc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3254: 00000000001a3580 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3255: 00000000001a36a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3256: 0000000036b41be0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3257: 0000000036b41be8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3256: 0000000036b42be0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3257: 0000000036b42be8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3258: 00000000001a3b40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3259: 00000000001a3c60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3260: 0000000036b41c00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3261: 0000000036b41c08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3260: 0000000036b42c00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3261: 0000000036b42c08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3262: 00000000001a4100 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3263: 00000000001a4220 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3264: 0000000036b41c20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3265: 0000000036b41c28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3264: 0000000036b42c20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3265: 0000000036b42c28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3266: 00000000001a46c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3267: 00000000001a47e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3268: 0000000036b41c40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3269: 0000000036b41c48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3268: 0000000036b42c40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3269: 0000000036b42c48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3270: 00000000001a4c80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3271: 00000000001a4da0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3272: 0000000036b41c60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3273: 0000000036b41c68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3272: 0000000036b42c60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3273: 0000000036b42c68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type22ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3274: 00000000001a5240 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3275: 00000000001a5360 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type22ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3276: 00000000001a5480 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3277: 0000000036b46460 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3278: 0000000036b455c0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3277: 0000000036b47460 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3278: 0000000036b465c0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3279: 00000000001a6150 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3280: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq2_xs.cu\n 3281: 00000000001b57b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3282: 0000000036b41e58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3282: 0000000036b42e58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3283: 00000000001b55f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3284: 0000000036b41e50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3284: 0000000036b42e50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3285: 00000000001b4670 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3286: 0000000036b41df8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3286: 0000000036b42df8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3287: 00000000001b44b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3288: 0000000036b41df0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3288: 0000000036b42df0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3289: 00000000001b1e30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3290: 0000000036b41d18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3290: 0000000036b42d18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3291: 00000000001b1c70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3292: 0000000036b41d10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3292: 0000000036b42d10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3293: 00000000001b4c30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3294: 0000000036b41e18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3294: 0000000036b42e18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3295: 00000000001b4a70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3296: 0000000036b41e10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3296: 0000000036b42e10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3297: 00000000001b3af0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3298: 0000000036b41db8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3298: 0000000036b42db8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3299: 00000000001b3930 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3300: 0000000036b41db0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3300: 0000000036b42db0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3301: 00000000001b12b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3302: 0000000036b41cd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3302: 0000000036b42cd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3303: 00000000001b10f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3304: 0000000036b41cd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3304: 0000000036b42cd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3305: 00000000001b5d70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3306: 0000000036b41e78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3306: 0000000036b42e78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3307: 00000000001b5bb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3308: 0000000036b41e70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3308: 0000000036b42e70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3309: 00000000001b1870 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3310: 0000000036b41cf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3310: 0000000036b42cf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3311: 00000000001b16b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3312: 0000000036b41cf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3312: 0000000036b42cf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3313: 00000000001b2f70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3314: 0000000036b41d78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3314: 0000000036b42d78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3315: 00000000001b2db0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3316: 0000000036b41d70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3316: 0000000036b42d70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3317: 00000000001b0730 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3318: 0000000036b41c98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3318: 0000000036b42c98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3319: 00000000001b0cf0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3320: 0000000036b41cb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3320: 0000000036b42cb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3321: 00000000001b0570 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3322: 0000000036b41c90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3322: 0000000036b42c90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3323: 00000000001b0b30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3324: 0000000036b41cb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3324: 0000000036b42cb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3325: 00000000001b23f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3326: 0000000036b41d38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3326: 0000000036b42d38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3327: 00000000001b2230 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3328: 0000000036b41d30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3328: 0000000036b42d30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3329: 00000000001b51f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3330: 0000000036b41e38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3330: 0000000036b42e38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3331: 00000000001b5030 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3332: 0000000036b41e30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3332: 0000000036b42e30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3333: 00000000001b29b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3334: 0000000036b41d58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3334: 0000000036b42d58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3335: 00000000001b27f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3336: 0000000036b41d50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3336: 0000000036b42d50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3337: 00000000001b40b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3338: 0000000036b41dd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3338: 0000000036b42dd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3339: 00000000001b3ef0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3340: 0000000036b41dd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3340: 0000000036b42dd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3341: 00000000001b3530 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3342: 0000000036b41d98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3342: 0000000036b42d98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3343: 00000000001b3370 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type17ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3344: 0000000036b41d90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3345: 0000000036af0e60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3346: 0000000036b41c80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3347: 0000000036b41c88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3344: 0000000036b42d90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type17ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3345: 0000000036af1e60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3346: 0000000036b42c80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3347: 0000000036b42c88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3348: 00000000001b08f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3349: 00000000001b0a10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3350: 0000000036b41ca0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3351: 0000000036b41ca8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3350: 0000000036b42ca0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3351: 0000000036b42ca8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3352: 00000000001b0eb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3353: 00000000001b0fd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3354: 0000000036b41cc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3355: 0000000036b41cc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3354: 0000000036b42cc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3355: 0000000036b42cc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3356: 00000000001b1470 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3357: 00000000001b1590 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3358: 0000000036b41ce0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3359: 0000000036b41ce8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3358: 0000000036b42ce0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3359: 0000000036b42ce8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3360: 00000000001b1a30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3361: 00000000001b1b50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3362: 0000000036b41d00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3363: 0000000036b41d08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3362: 0000000036b42d00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3363: 0000000036b42d08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3364: 00000000001b1ff0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3365: 00000000001b2110 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3366: 0000000036b41d20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3367: 0000000036b41d28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3366: 0000000036b42d20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3367: 0000000036b42d28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3368: 00000000001b25b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3369: 00000000001b26d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3370: 0000000036b41d40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3371: 0000000036b41d48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3370: 0000000036b42d40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3371: 0000000036b42d48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3372: 00000000001b2b70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3373: 00000000001b2c90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3374: 0000000036b41d60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3375: 0000000036b41d68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3374: 0000000036b42d60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3375: 0000000036b42d68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3376: 00000000001b3130 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3377: 00000000001b3250 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3378: 0000000036b41d80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3379: 0000000036b41d88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3378: 0000000036b42d80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3379: 0000000036b42d88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3380: 00000000001b36f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3381: 00000000001b3810 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3382: 0000000036b41da0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3383: 0000000036b41da8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3382: 0000000036b42da0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3383: 0000000036b42da8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3384: 00000000001b3cb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3385: 00000000001b3dd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3386: 0000000036b41dc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3387: 0000000036b41dc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3386: 0000000036b42dc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3387: 0000000036b42dc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3388: 00000000001b4270 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3389: 00000000001b4390 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3390: 0000000036b41de0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3391: 0000000036b41de8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3390: 0000000036b42de0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3391: 0000000036b42de8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3392: 00000000001b4830 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3393: 00000000001b4950 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3394: 0000000036b41e00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3395: 0000000036b41e08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3394: 0000000036b42e00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3395: 0000000036b42e08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3396: 00000000001b4df0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3397: 00000000001b4f10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3398: 0000000036b41e20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3399: 0000000036b41e28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3398: 0000000036b42e20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3399: 0000000036b42e28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3400: 00000000001b53b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3401: 00000000001b54d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3402: 0000000036b41e40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3403: 0000000036b41e48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3402: 0000000036b42e40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3403: 0000000036b42e48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3404: 00000000001b5970 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3405: 00000000001b5a90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3406: 0000000036b41e60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3407: 0000000036b41e68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3406: 0000000036b42e60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3407: 0000000036b42e68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type17ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3408: 00000000001b5f30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3409: 00000000001b6050 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type17ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3410: 00000000001b6170 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3411: 0000000036b46468 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3412: 0000000036b455d8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3411: 0000000036b47468 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3412: 0000000036b465d8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3413: 00000000001b6e40 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3414: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq2_xxs.cu\n 3415: 00000000001c64a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3416: 0000000036b42058 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3416: 0000000036b43058 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3417: 00000000001c62e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3418: 0000000036b42050 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3418: 0000000036b43050 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3419: 00000000001c5360 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3420: 0000000036b41ff8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3420: 0000000036b42ff8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3421: 00000000001c51a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3422: 0000000036b41ff0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3422: 0000000036b42ff0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3423: 00000000001c2b20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3424: 0000000036b41f18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3424: 0000000036b42f18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3425: 00000000001c2960 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3426: 0000000036b41f10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3426: 0000000036b42f10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3427: 00000000001c5920 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3428: 0000000036b42018 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3428: 0000000036b43018 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3429: 00000000001c5760 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3430: 0000000036b42010 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3430: 0000000036b43010 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3431: 00000000001c47e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3432: 0000000036b41fb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3432: 0000000036b42fb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3433: 00000000001c4620 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3434: 0000000036b41fb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3434: 0000000036b42fb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3435: 00000000001c1fa0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3436: 0000000036b41ed8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3436: 0000000036b42ed8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3437: 00000000001c1de0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3438: 0000000036b41ed0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3438: 0000000036b42ed0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3439: 00000000001c6a60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3440: 0000000036b42078 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3440: 0000000036b43078 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3441: 00000000001c68a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3442: 0000000036b42070 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3442: 0000000036b43070 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3443: 00000000001c2560 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3444: 0000000036b41ef8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3444: 0000000036b42ef8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3445: 00000000001c23a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3446: 0000000036b41ef0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3446: 0000000036b42ef0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3447: 00000000001c3c60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3448: 0000000036b41f78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3448: 0000000036b42f78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3449: 00000000001c3aa0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3450: 0000000036b41f70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3450: 0000000036b42f70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3451: 00000000001c1420 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3452: 0000000036b41e98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3452: 0000000036b42e98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3453: 00000000001c19e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3454: 0000000036b41eb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3454: 0000000036b42eb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3455: 00000000001c1260 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3456: 0000000036b41e90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3456: 0000000036b42e90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3457: 00000000001c1820 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3458: 0000000036b41eb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3458: 0000000036b42eb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3459: 00000000001c30e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3460: 0000000036b41f38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3460: 0000000036b42f38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3461: 00000000001c2f20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3462: 0000000036b41f30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3462: 0000000036b42f30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3463: 00000000001c5ee0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3464: 0000000036b42038 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3464: 0000000036b43038 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3465: 00000000001c5d20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3466: 0000000036b42030 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3466: 0000000036b43030 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3467: 00000000001c36a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3468: 0000000036b41f58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3468: 0000000036b42f58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3469: 00000000001c34e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3470: 0000000036b41f50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3470: 0000000036b42f50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3471: 00000000001c4da0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3472: 0000000036b41fd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3472: 0000000036b42fd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3473: 00000000001c4be0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3474: 0000000036b41fd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3474: 0000000036b42fd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3475: 00000000001c4220 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3476: 0000000036b41f98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3476: 0000000036b42f98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3477: 00000000001c4060 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type16ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3478: 0000000036b41f90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3479: 0000000036af1160 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3480: 0000000036b41e80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3481: 0000000036b41e88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3478: 0000000036b42f90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type16ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3479: 0000000036af2160 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3480: 0000000036b42e80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3481: 0000000036b42e88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3482: 00000000001c15e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3483: 00000000001c1700 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3484: 0000000036b41ea0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3485: 0000000036b41ea8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3484: 0000000036b42ea0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3485: 0000000036b42ea8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3486: 00000000001c1ba0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3487: 00000000001c1cc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3488: 0000000036b41ec0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3489: 0000000036b41ec8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3488: 0000000036b42ec0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3489: 0000000036b42ec8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3490: 00000000001c2160 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3491: 00000000001c2280 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3492: 0000000036b41ee0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3493: 0000000036b41ee8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3492: 0000000036b42ee0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3493: 0000000036b42ee8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3494: 00000000001c2720 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3495: 00000000001c2840 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3496: 0000000036b41f00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3497: 0000000036b41f08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3496: 0000000036b42f00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3497: 0000000036b42f08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3498: 00000000001c2ce0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3499: 00000000001c2e00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3500: 0000000036b41f20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3501: 0000000036b41f28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3500: 0000000036b42f20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3501: 0000000036b42f28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3502: 00000000001c32a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3503: 00000000001c33c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3504: 0000000036b41f40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3505: 0000000036b41f48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3504: 0000000036b42f40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3505: 0000000036b42f48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3506: 00000000001c3860 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3507: 00000000001c3980 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3508: 0000000036b41f60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3509: 0000000036b41f68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3508: 0000000036b42f60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3509: 0000000036b42f68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3510: 00000000001c3e20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3511: 00000000001c3f40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3512: 0000000036b41f80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3513: 0000000036b41f88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3512: 0000000036b42f80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3513: 0000000036b42f88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3514: 00000000001c43e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3515: 00000000001c4500 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3516: 0000000036b41fa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3517: 0000000036b41fa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3516: 0000000036b42fa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3517: 0000000036b42fa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3518: 00000000001c49a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3519: 00000000001c4ac0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3520: 0000000036b41fc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3521: 0000000036b41fc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3520: 0000000036b42fc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3521: 0000000036b42fc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3522: 00000000001c4f60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3523: 00000000001c5080 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3524: 0000000036b41fe0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3525: 0000000036b41fe8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3524: 0000000036b42fe0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3525: 0000000036b42fe8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3526: 00000000001c5520 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3527: 00000000001c5640 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3528: 0000000036b42000 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3529: 0000000036b42008 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3528: 0000000036b43000 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3529: 0000000036b43008 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3530: 00000000001c5ae0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3531: 00000000001c5c00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3532: 0000000036b42020 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3533: 0000000036b42028 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3532: 0000000036b43020 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3533: 0000000036b43028 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3534: 00000000001c60a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3535: 00000000001c61c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3536: 0000000036b42040 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3537: 0000000036b42048 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3536: 0000000036b43040 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3537: 0000000036b43048 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3538: 00000000001c6660 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3539: 00000000001c6780 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3540: 0000000036b42060 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3541: 0000000036b42068 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3540: 0000000036b43060 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3541: 0000000036b43068 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type16ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3542: 00000000001c6c20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3543: 00000000001c6d40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type16ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3544: 00000000001c6e60 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3545: 0000000036b46470 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3546: 0000000036b455f0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3545: 0000000036b47470 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3546: 0000000036b465f0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3547: 00000000001c7b30 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3548: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq3_s.cu\n 3549: 00000000001d7190 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3550: 0000000036b42258 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3550: 0000000036b43258 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3551: 00000000001d6fd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3552: 0000000036b42250 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3552: 0000000036b43250 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3553: 00000000001d6050 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3554: 0000000036b421f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3554: 0000000036b431f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3555: 00000000001d5e90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3556: 0000000036b421f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3556: 0000000036b431f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3557: 00000000001d3810 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3558: 0000000036b42118 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3558: 0000000036b43118 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3559: 00000000001d3650 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3560: 0000000036b42110 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3560: 0000000036b43110 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3561: 00000000001d6610 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3562: 0000000036b42218 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3562: 0000000036b43218 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3563: 00000000001d6450 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3564: 0000000036b42210 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3564: 0000000036b43210 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3565: 00000000001d54d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3566: 0000000036b421b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3566: 0000000036b431b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3567: 00000000001d5310 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3568: 0000000036b421b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3568: 0000000036b431b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3569: 00000000001d2c90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3570: 0000000036b420d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3570: 0000000036b430d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3571: 00000000001d2ad0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3572: 0000000036b420d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3572: 0000000036b430d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3573: 00000000001d7750 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3574: 0000000036b42278 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3574: 0000000036b43278 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3575: 00000000001d7590 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3576: 0000000036b42270 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3576: 0000000036b43270 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3577: 00000000001d3250 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3578: 0000000036b420f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3578: 0000000036b430f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3579: 00000000001d3090 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3580: 0000000036b420f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3580: 0000000036b430f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3581: 00000000001d4950 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3582: 0000000036b42178 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3582: 0000000036b43178 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3583: 00000000001d4790 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3584: 0000000036b42170 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3584: 0000000036b43170 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3585: 00000000001d2110 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3586: 0000000036b42098 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3586: 0000000036b43098 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3587: 00000000001d26d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3588: 0000000036b420b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3588: 0000000036b430b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3589: 00000000001d1f50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3590: 0000000036b42090 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3590: 0000000036b43090 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3591: 00000000001d2510 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3592: 0000000036b420b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3592: 0000000036b430b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3593: 00000000001d3dd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3594: 0000000036b42138 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3594: 0000000036b43138 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3595: 00000000001d3c10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3596: 0000000036b42130 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3596: 0000000036b43130 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3597: 00000000001d6bd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3598: 0000000036b42238 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3598: 0000000036b43238 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3599: 00000000001d6a10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3600: 0000000036b42230 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3600: 0000000036b43230 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3601: 00000000001d4390 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3602: 0000000036b42158 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3602: 0000000036b43158 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3603: 00000000001d41d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3604: 0000000036b42150 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3604: 0000000036b43150 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3605: 00000000001d5a90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3606: 0000000036b421d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3606: 0000000036b431d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3607: 00000000001d58d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3608: 0000000036b421d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3608: 0000000036b431d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3609: 00000000001d4f10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3610: 0000000036b42198 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3610: 0000000036b43198 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3611: 00000000001d4d50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type21ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3612: 0000000036b42190 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3613: 0000000036af1460 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3614: 0000000036b42080 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3615: 0000000036b42088 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3612: 0000000036b43190 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type21ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3613: 0000000036af2460 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3614: 0000000036b43080 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3615: 0000000036b43088 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3616: 00000000001d22d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3617: 00000000001d23f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3618: 0000000036b420a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3619: 0000000036b420a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3618: 0000000036b430a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3619: 0000000036b430a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3620: 00000000001d2890 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3621: 00000000001d29b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3622: 0000000036b420c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3623: 0000000036b420c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3622: 0000000036b430c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3623: 0000000036b430c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3624: 00000000001d2e50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3625: 00000000001d2f70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3626: 0000000036b420e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3627: 0000000036b420e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3626: 0000000036b430e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3627: 0000000036b430e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3628: 00000000001d3410 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3629: 00000000001d3530 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3630: 0000000036b42100 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3631: 0000000036b42108 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3630: 0000000036b43100 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3631: 0000000036b43108 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3632: 00000000001d39d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3633: 00000000001d3af0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3634: 0000000036b42120 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3635: 0000000036b42128 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3634: 0000000036b43120 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3635: 0000000036b43128 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3636: 00000000001d3f90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3637: 00000000001d40b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3638: 0000000036b42140 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3639: 0000000036b42148 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3638: 0000000036b43140 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3639: 0000000036b43148 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3640: 00000000001d4550 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3641: 00000000001d4670 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3642: 0000000036b42160 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3643: 0000000036b42168 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3642: 0000000036b43160 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3643: 0000000036b43168 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3644: 00000000001d4b10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3645: 00000000001d4c30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3646: 0000000036b42180 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3647: 0000000036b42188 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3646: 0000000036b43180 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3647: 0000000036b43188 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3648: 00000000001d50d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3649: 00000000001d51f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3650: 0000000036b421a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3651: 0000000036b421a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3650: 0000000036b431a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3651: 0000000036b431a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3652: 00000000001d5690 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3653: 00000000001d57b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3654: 0000000036b421c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3655: 0000000036b421c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3654: 0000000036b431c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3655: 0000000036b431c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3656: 00000000001d5c50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3657: 00000000001d5d70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3658: 0000000036b421e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3659: 0000000036b421e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3658: 0000000036b431e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3659: 0000000036b431e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3660: 00000000001d6210 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3661: 00000000001d6330 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3662: 0000000036b42200 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3663: 0000000036b42208 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3662: 0000000036b43200 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3663: 0000000036b43208 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3664: 00000000001d67d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3665: 00000000001d68f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3666: 0000000036b42220 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3667: 0000000036b42228 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3666: 0000000036b43220 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3667: 0000000036b43228 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3668: 00000000001d6d90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3669: 00000000001d6eb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3670: 0000000036b42240 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3671: 0000000036b42248 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3670: 0000000036b43240 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3671: 0000000036b43248 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3672: 00000000001d7350 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3673: 00000000001d7470 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3674: 0000000036b42260 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3675: 0000000036b42268 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3674: 0000000036b43260 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3675: 0000000036b43268 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type21ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3676: 00000000001d7910 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3677: 00000000001d7a30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type21ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3678: 00000000001d7b50 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3679: 0000000036b46478 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3680: 0000000036b45608 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3679: 0000000036b47478 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3680: 0000000036b46608 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3681: 00000000001d8820 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3682: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq3_xxs.cu\n 3683: 00000000001e7e80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3684: 0000000036b42458 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3684: 0000000036b43458 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3685: 00000000001e7cc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3686: 0000000036b42450 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3686: 0000000036b43450 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3687: 00000000001e6d40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3688: 0000000036b423f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3688: 0000000036b433f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3689: 00000000001e6b80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3690: 0000000036b423f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3690: 0000000036b433f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3691: 00000000001e4500 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3692: 0000000036b42318 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3692: 0000000036b43318 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3693: 00000000001e4340 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3694: 0000000036b42310 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3694: 0000000036b43310 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3695: 00000000001e7300 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3696: 0000000036b42418 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3696: 0000000036b43418 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3697: 00000000001e7140 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3698: 0000000036b42410 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3698: 0000000036b43410 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3699: 00000000001e61c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3700: 0000000036b423b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3700: 0000000036b433b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3701: 00000000001e6000 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3702: 0000000036b423b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3702: 0000000036b433b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3703: 00000000001e3980 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3704: 0000000036b422d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3704: 0000000036b432d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3705: 00000000001e37c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3706: 0000000036b422d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3706: 0000000036b432d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3707: 00000000001e8440 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3708: 0000000036b42478 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3708: 0000000036b43478 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3709: 00000000001e8280 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3710: 0000000036b42470 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3710: 0000000036b43470 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3711: 00000000001e3f40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3712: 0000000036b422f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3712: 0000000036b432f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3713: 00000000001e3d80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3714: 0000000036b422f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3714: 0000000036b432f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3715: 00000000001e5640 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3716: 0000000036b42378 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3716: 0000000036b43378 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3717: 00000000001e5480 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3718: 0000000036b42370 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3718: 0000000036b43370 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3719: 00000000001e2e00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3720: 0000000036b42298 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3720: 0000000036b43298 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3721: 00000000001e33c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3722: 0000000036b422b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3722: 0000000036b432b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3723: 00000000001e2c40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3724: 0000000036b42290 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3724: 0000000036b43290 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3725: 00000000001e3200 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3726: 0000000036b422b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3726: 0000000036b432b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3727: 00000000001e4ac0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3728: 0000000036b42338 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3728: 0000000036b43338 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3729: 00000000001e4900 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3730: 0000000036b42330 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3730: 0000000036b43330 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3731: 00000000001e78c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3732: 0000000036b42438 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3732: 0000000036b43438 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3733: 00000000001e7700 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3734: 0000000036b42430 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3734: 0000000036b43430 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3735: 00000000001e5080 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3736: 0000000036b42358 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3736: 0000000036b43358 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3737: 00000000001e4ec0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3738: 0000000036b42350 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3738: 0000000036b43350 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3739: 00000000001e6780 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3740: 0000000036b423d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3740: 0000000036b433d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3741: 00000000001e65c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3742: 0000000036b423d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3742: 0000000036b433d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3743: 00000000001e5c00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3744: 0000000036b42398 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3744: 0000000036b43398 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3745: 00000000001e5a40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type18ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3746: 0000000036b42390 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3747: 0000000036af1760 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3748: 0000000036b42280 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3749: 0000000036b42288 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3746: 0000000036b43390 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type18ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3747: 0000000036af2760 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3748: 0000000036b43280 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3749: 0000000036b43288 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3750: 00000000001e2fc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3751: 00000000001e30e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3752: 0000000036b422a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3753: 0000000036b422a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3752: 0000000036b432a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3753: 0000000036b432a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3754: 00000000001e3580 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3755: 00000000001e36a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3756: 0000000036b422c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3757: 0000000036b422c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3756: 0000000036b432c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3757: 0000000036b432c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3758: 00000000001e3b40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3759: 00000000001e3c60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3760: 0000000036b422e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3761: 0000000036b422e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3760: 0000000036b432e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3761: 0000000036b432e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3762: 00000000001e4100 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3763: 00000000001e4220 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3764: 0000000036b42300 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3765: 0000000036b42308 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3764: 0000000036b43300 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3765: 0000000036b43308 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3766: 00000000001e46c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3767: 00000000001e47e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3768: 0000000036b42320 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3769: 0000000036b42328 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3768: 0000000036b43320 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3769: 0000000036b43328 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3770: 00000000001e4c80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3771: 00000000001e4da0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3772: 0000000036b42340 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3773: 0000000036b42348 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3772: 0000000036b43340 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3773: 0000000036b43348 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3774: 00000000001e5240 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3775: 00000000001e5360 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3776: 0000000036b42360 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3777: 0000000036b42368 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3776: 0000000036b43360 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3777: 0000000036b43368 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3778: 00000000001e5800 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3779: 00000000001e5920 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3780: 0000000036b42380 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3781: 0000000036b42388 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3780: 0000000036b43380 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3781: 0000000036b43388 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3782: 00000000001e5dc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3783: 00000000001e5ee0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3784: 0000000036b423a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3785: 0000000036b423a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3784: 0000000036b433a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3785: 0000000036b433a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3786: 00000000001e6380 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3787: 00000000001e64a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3788: 0000000036b423c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3789: 0000000036b423c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3788: 0000000036b433c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3789: 0000000036b433c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3790: 00000000001e6940 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3791: 00000000001e6a60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3792: 0000000036b423e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3793: 0000000036b423e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3792: 0000000036b433e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3793: 0000000036b433e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3794: 00000000001e6f00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3795: 00000000001e7020 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3796: 0000000036b42400 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3797: 0000000036b42408 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3796: 0000000036b43400 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3797: 0000000036b43408 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3798: 00000000001e74c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3799: 00000000001e75e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3800: 0000000036b42420 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3801: 0000000036b42428 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3800: 0000000036b43420 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3801: 0000000036b43428 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3802: 00000000001e7a80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3803: 00000000001e7ba0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3804: 0000000036b42440 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3805: 0000000036b42448 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3804: 0000000036b43440 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3805: 0000000036b43448 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3806: 00000000001e8040 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3807: 00000000001e8160 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3808: 0000000036b42460 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3809: 0000000036b42468 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3808: 0000000036b43460 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3809: 0000000036b43468 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type18ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3810: 00000000001e8600 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3811: 00000000001e8720 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type18ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3812: 00000000001e8840 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3813: 0000000036b46480 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3814: 0000000036b45620 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3813: 0000000036b47480 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3814: 0000000036b46620 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3815: 00000000001e9510 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3816: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq4_nl.cu\n 3817: 00000000001f8b70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3818: 0000000036b42658 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3818: 0000000036b43658 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3819: 00000000001f89b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3820: 0000000036b42650 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3820: 0000000036b43650 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3821: 00000000001f7a30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3822: 0000000036b425f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3822: 0000000036b435f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3823: 00000000001f7870 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3824: 0000000036b425f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3824: 0000000036b435f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3825: 00000000001f51f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3826: 0000000036b42518 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3826: 0000000036b43518 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3827: 00000000001f5030 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3828: 0000000036b42510 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3828: 0000000036b43510 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3829: 00000000001f7ff0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3830: 0000000036b42618 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3830: 0000000036b43618 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3831: 00000000001f7e30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3832: 0000000036b42610 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3832: 0000000036b43610 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3833: 00000000001f6eb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3834: 0000000036b425b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3834: 0000000036b435b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3835: 00000000001f6cf0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3836: 0000000036b425b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3836: 0000000036b435b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3837: 00000000001f4670 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3838: 0000000036b424d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3838: 0000000036b434d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3839: 00000000001f44b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3840: 0000000036b424d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3840: 0000000036b434d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3841: 00000000001f9130 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3842: 0000000036b42678 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3842: 0000000036b43678 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3843: 00000000001f8f70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3844: 0000000036b42670 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3844: 0000000036b43670 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3845: 00000000001f4c30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3846: 0000000036b424f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3846: 0000000036b434f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3847: 00000000001f4a70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3848: 0000000036b424f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3848: 0000000036b434f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3849: 00000000001f6330 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3850: 0000000036b42578 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3850: 0000000036b43578 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3851: 00000000001f6170 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3852: 0000000036b42570 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3852: 0000000036b43570 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3853: 00000000001f3af0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3854: 0000000036b42498 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3854: 0000000036b43498 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3855: 00000000001f40b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3856: 0000000036b424b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3856: 0000000036b434b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3857: 00000000001f3930 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3858: 0000000036b42490 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3858: 0000000036b43490 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3859: 00000000001f3ef0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3860: 0000000036b424b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3860: 0000000036b434b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3861: 00000000001f57b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3862: 0000000036b42538 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3862: 0000000036b43538 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3863: 00000000001f55f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3864: 0000000036b42530 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3864: 0000000036b43530 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3865: 00000000001f85b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3866: 0000000036b42638 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3866: 0000000036b43638 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3867: 00000000001f83f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3868: 0000000036b42630 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3868: 0000000036b43630 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3869: 00000000001f5d70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3870: 0000000036b42558 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3870: 0000000036b43558 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3871: 00000000001f5bb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3872: 0000000036b42550 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3872: 0000000036b43550 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3873: 00000000001f7470 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3874: 0000000036b425d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3874: 0000000036b435d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3875: 00000000001f72b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3876: 0000000036b425d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3876: 0000000036b435d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3877: 00000000001f68f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3878: 0000000036b42598 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3878: 0000000036b43598 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3879: 00000000001f6730 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type20ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3880: 0000000036b42590 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 3881: 0000000036af1a60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 3882: 0000000036b42480 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3883: 0000000036b42488 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3880: 0000000036b43590 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type20ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3881: 0000000036af2a60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 3882: 0000000036b43480 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3883: 0000000036b43488 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3884: 00000000001f3cb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3885: 00000000001f3dd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3886: 0000000036b424a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3887: 0000000036b424a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3886: 0000000036b434a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3887: 0000000036b434a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3888: 00000000001f4270 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3889: 00000000001f4390 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3890: 0000000036b424c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3891: 0000000036b424c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3890: 0000000036b434c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3891: 0000000036b434c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3892: 00000000001f4830 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3893: 00000000001f4950 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3894: 0000000036b424e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3895: 0000000036b424e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3894: 0000000036b434e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3895: 0000000036b434e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3896: 00000000001f4df0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3897: 00000000001f4f10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3898: 0000000036b42500 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3899: 0000000036b42508 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3898: 0000000036b43500 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3899: 0000000036b43508 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3900: 00000000001f53b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3901: 00000000001f54d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3902: 0000000036b42520 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3903: 0000000036b42528 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3902: 0000000036b43520 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3903: 0000000036b43528 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3904: 00000000001f5970 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3905: 00000000001f5a90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3906: 0000000036b42540 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3907: 0000000036b42548 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3906: 0000000036b43540 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3907: 0000000036b43548 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3908: 00000000001f5f30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3909: 00000000001f6050 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3910: 0000000036b42560 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3911: 0000000036b42568 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3910: 0000000036b43560 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3911: 0000000036b43568 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3912: 00000000001f64f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3913: 00000000001f6610 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3914: 0000000036b42580 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3915: 0000000036b42588 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3914: 0000000036b43580 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3915: 0000000036b43588 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3916: 00000000001f6ab0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3917: 00000000001f6bd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3918: 0000000036b425a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3919: 0000000036b425a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3918: 0000000036b435a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3919: 0000000036b435a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3920: 00000000001f7070 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3921: 00000000001f7190 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3922: 0000000036b425c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3923: 0000000036b425c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3922: 0000000036b435c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3923: 0000000036b435c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3924: 00000000001f7630 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3925: 00000000001f7750 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3926: 0000000036b425e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3927: 0000000036b425e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3926: 0000000036b435e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3927: 0000000036b435e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3928: 00000000001f7bf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3929: 00000000001f7d10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3930: 0000000036b42600 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3931: 0000000036b42608 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3930: 0000000036b43600 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3931: 0000000036b43608 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3932: 00000000001f81b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3933: 00000000001f82d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3934: 0000000036b42620 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3935: 0000000036b42628 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3934: 0000000036b43620 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3935: 0000000036b43628 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3936: 00000000001f8770 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3937: 00000000001f8890 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3938: 0000000036b42640 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3939: 0000000036b42648 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3938: 0000000036b43640 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3939: 0000000036b43648 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3940: 00000000001f8d30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3941: 00000000001f8e50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 3942: 0000000036b42660 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3943: 0000000036b42668 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3942: 0000000036b43660 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 3943: 0000000036b43668 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type20ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 3944: 00000000001f92f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3945: 00000000001f9410 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type20ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3946: 00000000001f9530 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 3947: 0000000036b46488 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 3948: 0000000036b45638 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 3947: 0000000036b47488 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 3948: 0000000036b46638 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 3949: 00000000001fa200 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 3950: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-iq4_xs.cu\n 3951: 0000000000209860 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3952: 0000000036b42858 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3952: 0000000036b43858 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3953: 00000000002096a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3954: 0000000036b42850 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3954: 0000000036b43850 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3955: 0000000000208720 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3956: 0000000036b427f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3956: 0000000036b437f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3957: 0000000000208560 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3958: 0000000036b427f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3958: 0000000036b437f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3959: 0000000000205ee0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3960: 0000000036b42718 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3960: 0000000036b43718 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3961: 0000000000205d20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3962: 0000000036b42710 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3962: 0000000036b43710 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3963: 0000000000208ce0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3964: 0000000036b42818 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3964: 0000000036b43818 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3965: 0000000000208b20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3966: 0000000036b42810 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3966: 0000000036b43810 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3967: 0000000000207ba0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3968: 0000000036b427b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3968: 0000000036b437b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3969: 00000000002079e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3970: 0000000036b427b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3970: 0000000036b437b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3971: 0000000000205360 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3972: 0000000036b426d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3972: 0000000036b436d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3973: 00000000002051a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3974: 0000000036b426d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3974: 0000000036b436d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3975: 0000000000209e20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3976: 0000000036b42878 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3976: 0000000036b43878 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3977: 0000000000209c60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3978: 0000000036b42870 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3978: 0000000036b43870 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3979: 0000000000205920 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3980: 0000000036b426f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3980: 0000000036b436f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3981: 0000000000205760 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3982: 0000000036b426f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3982: 0000000036b436f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3983: 0000000000207020 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3984: 0000000036b42778 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3984: 0000000036b43778 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3985: 0000000000206e60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3986: 0000000036b42770 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3986: 0000000036b43770 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3987: 00000000002047e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3988: 0000000036b42698 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3988: 0000000036b43698 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3989: 0000000000204da0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3990: 0000000036b426b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3990: 0000000036b436b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3991: 0000000000204620 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3992: 0000000036b42690 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3992: 0000000036b43690 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3993: 0000000000204be0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3994: 0000000036b426b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3994: 0000000036b436b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3995: 00000000002064a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3996: 0000000036b42738 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 3996: 0000000036b43738 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 3997: 00000000002062e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 3998: 0000000036b42730 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 3998: 0000000036b43730 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 3999: 00000000002092a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4000: 0000000036b42838 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4000: 0000000036b43838 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4001: 00000000002090e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4002: 0000000036b42830 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4002: 0000000036b43830 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4003: 0000000000206a60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4004: 0000000036b42758 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4004: 0000000036b43758 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4005: 00000000002068a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4006: 0000000036b42750 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4006: 0000000036b43750 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4007: 0000000000208160 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4008: 0000000036b427d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4008: 0000000036b437d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4009: 0000000000207fa0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4010: 0000000036b427d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4010: 0000000036b437d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4011: 00000000002075e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4012: 0000000036b42798 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4012: 0000000036b43798 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4013: 0000000000207420 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type23ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4014: 0000000036b42790 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4015: 0000000036af1d60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4016: 0000000036b42680 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4017: 0000000036b42688 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4014: 0000000036b43790 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type23ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4015: 0000000036af2d60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4016: 0000000036b43680 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4017: 0000000036b43688 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4018: 00000000002049a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4019: 0000000000204ac0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4020: 0000000036b426a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4021: 0000000036b426a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4020: 0000000036b436a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4021: 0000000036b436a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4022: 0000000000204f60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4023: 0000000000205080 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4024: 0000000036b426c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4025: 0000000036b426c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4024: 0000000036b436c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4025: 0000000036b436c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4026: 0000000000205520 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4027: 0000000000205640 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4028: 0000000036b426e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4029: 0000000036b426e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4028: 0000000036b436e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4029: 0000000036b436e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4030: 0000000000205ae0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4031: 0000000000205c00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4032: 0000000036b42700 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4033: 0000000036b42708 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4032: 0000000036b43700 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4033: 0000000036b43708 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4034: 00000000002060a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4035: 00000000002061c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4036: 0000000036b42720 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4037: 0000000036b42728 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4036: 0000000036b43720 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4037: 0000000036b43728 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4038: 0000000000206660 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4039: 0000000000206780 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4040: 0000000036b42740 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4041: 0000000036b42748 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4040: 0000000036b43740 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4041: 0000000036b43748 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4042: 0000000000206c20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4043: 0000000000206d40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4044: 0000000036b42760 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4045: 0000000036b42768 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4044: 0000000036b43760 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4045: 0000000036b43768 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4046: 00000000002071e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4047: 0000000000207300 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4048: 0000000036b42780 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4049: 0000000036b42788 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4048: 0000000036b43780 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4049: 0000000036b43788 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4050: 00000000002077a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4051: 00000000002078c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4052: 0000000036b427a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4053: 0000000036b427a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4052: 0000000036b437a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4053: 0000000036b437a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4054: 0000000000207d60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4055: 0000000000207e80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4056: 0000000036b427c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4057: 0000000036b427c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4056: 0000000036b437c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4057: 0000000036b437c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4058: 0000000000208320 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4059: 0000000000208440 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4060: 0000000036b427e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4061: 0000000036b427e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4060: 0000000036b437e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4061: 0000000036b437e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4062: 00000000002088e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4063: 0000000000208a00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4064: 0000000036b42800 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4065: 0000000036b42808 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4064: 0000000036b43800 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4065: 0000000036b43808 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4066: 0000000000208ea0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4067: 0000000000208fc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4068: 0000000036b42820 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4069: 0000000036b42828 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4068: 0000000036b43820 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4069: 0000000036b43828 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4070: 0000000000209460 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4071: 0000000000209580 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4072: 0000000036b42840 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4073: 0000000036b42848 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4072: 0000000036b43840 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4073: 0000000036b43848 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4074: 0000000000209a20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4075: 0000000000209b40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4076: 0000000036b42860 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4077: 0000000036b42868 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4076: 0000000036b43860 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4077: 0000000036b43868 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type23ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4078: 0000000000209fe0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4079: 000000000020a100 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type23ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4080: 000000000020a220 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4081: 0000000036b46490 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4082: 0000000036b45650 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4081: 0000000036b47490 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4082: 0000000036b46650 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4083: 000000000020aef0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4084: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q2_k.cu\n 4085: 000000000021a550 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4086: 0000000036b42a58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4086: 0000000036b43a58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4087: 000000000021a390 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4088: 0000000036b42a50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4088: 0000000036b43a50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4089: 0000000000219410 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4090: 0000000036b429f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4090: 0000000036b439f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4091: 0000000000219250 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4092: 0000000036b429f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4092: 0000000036b439f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4093: 0000000000216bd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4094: 0000000036b42918 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4094: 0000000036b43918 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4095: 0000000000216a10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4096: 0000000036b42910 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4096: 0000000036b43910 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4097: 00000000002199d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4098: 0000000036b42a18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4098: 0000000036b43a18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4099: 0000000000219810 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4100: 0000000036b42a10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4100: 0000000036b43a10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4101: 0000000000218890 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4102: 0000000036b429b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4102: 0000000036b439b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4103: 00000000002186d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4104: 0000000036b429b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4104: 0000000036b439b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4105: 0000000000216050 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4106: 0000000036b428d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4106: 0000000036b438d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4107: 0000000000215e90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4108: 0000000036b428d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4108: 0000000036b438d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4109: 000000000021ab10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4110: 0000000036b42a78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4110: 0000000036b43a78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4111: 000000000021a950 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4112: 0000000036b42a70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4112: 0000000036b43a70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4113: 0000000000216610 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4114: 0000000036b428f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4114: 0000000036b438f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4115: 0000000000216450 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4116: 0000000036b428f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4116: 0000000036b438f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4117: 0000000000217d10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4118: 0000000036b42978 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4118: 0000000036b43978 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4119: 0000000000217b50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4120: 0000000036b42970 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4120: 0000000036b43970 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4121: 00000000002154d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4122: 0000000036b42898 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4122: 0000000036b43898 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4123: 0000000000215a90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4124: 0000000036b428b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4124: 0000000036b438b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4125: 0000000000215310 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4126: 0000000036b42890 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4126: 0000000036b43890 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4127: 00000000002158d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4128: 0000000036b428b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4128: 0000000036b438b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4129: 0000000000217190 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4130: 0000000036b42938 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4130: 0000000036b43938 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4131: 0000000000216fd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4132: 0000000036b42930 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4132: 0000000036b43930 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4133: 0000000000219f90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4134: 0000000036b42a38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4134: 0000000036b43a38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4135: 0000000000219dd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4136: 0000000036b42a30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4136: 0000000036b43a30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4137: 0000000000217750 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4138: 0000000036b42958 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4138: 0000000036b43958 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4139: 0000000000217590 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4140: 0000000036b42950 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4140: 0000000036b43950 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4141: 0000000000218e50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4142: 0000000036b429d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4142: 0000000036b439d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4143: 0000000000218c90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4144: 0000000036b429d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4144: 0000000036b439d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4145: 00000000002182d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4146: 0000000036b42998 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4146: 0000000036b43998 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4147: 0000000000218110 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type10ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4148: 0000000036b42990 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4149: 0000000036af2060 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4150: 0000000036b42880 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4151: 0000000036b42888 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4148: 0000000036b43990 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type10ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4149: 0000000036af3060 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4150: 0000000036b43880 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4151: 0000000036b43888 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4152: 0000000000215690 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4153: 00000000002157b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4154: 0000000036b428a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4155: 0000000036b428a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4154: 0000000036b438a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4155: 0000000036b438a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4156: 0000000000215c50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4157: 0000000000215d70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4158: 0000000036b428c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4159: 0000000036b428c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4158: 0000000036b438c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4159: 0000000036b438c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4160: 0000000000216210 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4161: 0000000000216330 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4162: 0000000036b428e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4163: 0000000036b428e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4162: 0000000036b438e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4163: 0000000036b438e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4164: 00000000002167d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4165: 00000000002168f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4166: 0000000036b42900 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4167: 0000000036b42908 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4166: 0000000036b43900 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4167: 0000000036b43908 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4168: 0000000000216d90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4169: 0000000000216eb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4170: 0000000036b42920 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4171: 0000000036b42928 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4170: 0000000036b43920 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4171: 0000000036b43928 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4172: 0000000000217350 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4173: 0000000000217470 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4174: 0000000036b42940 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4175: 0000000036b42948 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4174: 0000000036b43940 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4175: 0000000036b43948 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4176: 0000000000217910 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4177: 0000000000217a30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4178: 0000000036b42960 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4179: 0000000036b42968 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4178: 0000000036b43960 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4179: 0000000036b43968 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4180: 0000000000217ed0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4181: 0000000000217ff0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4182: 0000000036b42980 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4183: 0000000036b42988 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4182: 0000000036b43980 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4183: 0000000036b43988 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4184: 0000000000218490 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4185: 00000000002185b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4186: 0000000036b429a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4187: 0000000036b429a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4186: 0000000036b439a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4187: 0000000036b439a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4188: 0000000000218a50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4189: 0000000000218b70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4190: 0000000036b429c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4191: 0000000036b429c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4190: 0000000036b439c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4191: 0000000036b439c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4192: 0000000000219010 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4193: 0000000000219130 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4194: 0000000036b429e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4195: 0000000036b429e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4194: 0000000036b439e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4195: 0000000036b439e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4196: 00000000002195d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4197: 00000000002196f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4198: 0000000036b42a00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4199: 0000000036b42a08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4198: 0000000036b43a00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4199: 0000000036b43a08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4200: 0000000000219b90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4201: 0000000000219cb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4202: 0000000036b42a20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4203: 0000000036b42a28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4202: 0000000036b43a20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4203: 0000000036b43a28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4204: 000000000021a150 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4205: 000000000021a270 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4206: 0000000036b42a40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4207: 0000000036b42a48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4206: 0000000036b43a40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4207: 0000000036b43a48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4208: 000000000021a710 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4209: 000000000021a830 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4210: 0000000036b42a60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4211: 0000000036b42a68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4210: 0000000036b43a60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4211: 0000000036b43a68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type10ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4212: 000000000021acd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4213: 000000000021adf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type10ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4214: 000000000021af10 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4215: 0000000036b46498 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4216: 0000000036b45668 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4215: 0000000036b47498 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4216: 0000000036b46668 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4217: 000000000021bbe0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4218: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q3_k.cu\n 4219: 000000000022b240 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4220: 0000000036b42c58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4220: 0000000036b43c58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4221: 000000000022b080 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4222: 0000000036b42c50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4222: 0000000036b43c50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4223: 000000000022a100 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4224: 0000000036b42bf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4224: 0000000036b43bf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4225: 0000000000229f40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4226: 0000000036b42bf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4226: 0000000036b43bf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4227: 00000000002278c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4228: 0000000036b42b18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4228: 0000000036b43b18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4229: 0000000000227700 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4230: 0000000036b42b10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4230: 0000000036b43b10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4231: 000000000022a6c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4232: 0000000036b42c18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4232: 0000000036b43c18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4233: 000000000022a500 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4234: 0000000036b42c10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4234: 0000000036b43c10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4235: 0000000000229580 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4236: 0000000036b42bb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4236: 0000000036b43bb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4237: 00000000002293c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4238: 0000000036b42bb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4238: 0000000036b43bb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4239: 0000000000226d40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4240: 0000000036b42ad8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4240: 0000000036b43ad8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4241: 0000000000226b80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4242: 0000000036b42ad0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4242: 0000000036b43ad0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4243: 000000000022b800 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4244: 0000000036b42c78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4244: 0000000036b43c78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4245: 000000000022b640 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4246: 0000000036b42c70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4246: 0000000036b43c70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4247: 0000000000227300 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4248: 0000000036b42af8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4248: 0000000036b43af8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4249: 0000000000227140 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4250: 0000000036b42af0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4250: 0000000036b43af0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4251: 0000000000228a00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4252: 0000000036b42b78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4252: 0000000036b43b78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4253: 0000000000228840 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4254: 0000000036b42b70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4254: 0000000036b43b70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4255: 00000000002261c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4256: 0000000036b42a98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4256: 0000000036b43a98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4257: 0000000000226780 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4258: 0000000036b42ab8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4258: 0000000036b43ab8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4259: 0000000000226000 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4260: 0000000036b42a90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4260: 0000000036b43a90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4261: 00000000002265c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4262: 0000000036b42ab0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4262: 0000000036b43ab0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4263: 0000000000227e80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4264: 0000000036b42b38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4264: 0000000036b43b38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4265: 0000000000227cc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4266: 0000000036b42b30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4266: 0000000036b43b30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4267: 000000000022ac80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4268: 0000000036b42c38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4268: 0000000036b43c38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4269: 000000000022aac0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4270: 0000000036b42c30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4270: 0000000036b43c30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4271: 0000000000228440 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4272: 0000000036b42b58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4272: 0000000036b43b58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4273: 0000000000228280 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4274: 0000000036b42b50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4274: 0000000036b43b50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4275: 0000000000229b40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4276: 0000000036b42bd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4276: 0000000036b43bd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4277: 0000000000229980 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4278: 0000000036b42bd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4278: 0000000036b43bd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4279: 0000000000228fc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4280: 0000000036b42b98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4280: 0000000036b43b98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4281: 0000000000228e00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type11ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4282: 0000000036b42b90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4283: 0000000036af2360 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4284: 0000000036b42a80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4285: 0000000036b42a88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4282: 0000000036b43b90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type11ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4283: 0000000036af3360 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4284: 0000000036b43a80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4285: 0000000036b43a88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4286: 0000000000226380 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4287: 00000000002264a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4288: 0000000036b42aa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4289: 0000000036b42aa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4288: 0000000036b43aa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4289: 0000000036b43aa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4290: 0000000000226940 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4291: 0000000000226a60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4292: 0000000036b42ac0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4293: 0000000036b42ac8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4292: 0000000036b43ac0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4293: 0000000036b43ac8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4294: 0000000000226f00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4295: 0000000000227020 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4296: 0000000036b42ae0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4297: 0000000036b42ae8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4296: 0000000036b43ae0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4297: 0000000036b43ae8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4298: 00000000002274c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4299: 00000000002275e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4300: 0000000036b42b00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4301: 0000000036b42b08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4300: 0000000036b43b00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4301: 0000000036b43b08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4302: 0000000000227a80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4303: 0000000000227ba0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4304: 0000000036b42b20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4305: 0000000036b42b28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4304: 0000000036b43b20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4305: 0000000036b43b28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4306: 0000000000228040 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4307: 0000000000228160 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4308: 0000000036b42b40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4309: 0000000036b42b48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4308: 0000000036b43b40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4309: 0000000036b43b48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4310: 0000000000228600 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4311: 0000000000228720 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4312: 0000000036b42b60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4313: 0000000036b42b68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4312: 0000000036b43b60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4313: 0000000036b43b68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4314: 0000000000228bc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4315: 0000000000228ce0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4316: 0000000036b42b80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4317: 0000000036b42b88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4316: 0000000036b43b80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4317: 0000000036b43b88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4318: 0000000000229180 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4319: 00000000002292a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4320: 0000000036b42ba0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4321: 0000000036b42ba8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4320: 0000000036b43ba0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4321: 0000000036b43ba8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4322: 0000000000229740 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4323: 0000000000229860 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4324: 0000000036b42bc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4325: 0000000036b42bc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4324: 0000000036b43bc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4325: 0000000036b43bc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4326: 0000000000229d00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4327: 0000000000229e20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4328: 0000000036b42be0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4329: 0000000036b42be8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4328: 0000000036b43be0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4329: 0000000036b43be8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4330: 000000000022a2c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4331: 000000000022a3e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4332: 0000000036b42c00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4333: 0000000036b42c08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4332: 0000000036b43c00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4333: 0000000036b43c08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4334: 000000000022a880 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4335: 000000000022a9a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4336: 0000000036b42c20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4337: 0000000036b42c28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4336: 0000000036b43c20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4337: 0000000036b43c28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4338: 000000000022ae40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4339: 000000000022af60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4340: 0000000036b42c40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4341: 0000000036b42c48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4340: 0000000036b43c40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4341: 0000000036b43c48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4342: 000000000022b400 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4343: 000000000022b520 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4344: 0000000036b42c60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4345: 0000000036b42c68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4344: 0000000036b43c60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4345: 0000000036b43c68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type11ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4346: 000000000022b9c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4347: 000000000022bae0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type11ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4348: 000000000022bc00 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4349: 0000000036b464a0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4350: 0000000036b45680 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4349: 0000000036b474a0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4350: 0000000036b46680 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4351: 000000000022c8d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4352: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q4_0.cu\n 4353: 000000000023c090 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4354: 0000000036b42e58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4354: 0000000036b43e58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4355: 000000000023bed0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4356: 0000000036b42e50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4356: 0000000036b43e50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4357: 000000000023af50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4358: 0000000036b42df8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4358: 0000000036b43df8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4359: 000000000023ad90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4360: 0000000036b42df0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4360: 0000000036b43df0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4361: 0000000000238710 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4362: 0000000036b42d18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4362: 0000000036b43d18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4363: 0000000000238550 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4364: 0000000036b42d10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4364: 0000000036b43d10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4365: 000000000023b510 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4366: 0000000036b42e18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4366: 0000000036b43e18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4367: 000000000023b350 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4368: 0000000036b42e10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4368: 0000000036b43e10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4369: 000000000023a3d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4370: 0000000036b42db8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4370: 0000000036b43db8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4371: 000000000023a210 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4372: 0000000036b42db0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4372: 0000000036b43db0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4373: 0000000000237b90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4374: 0000000036b42cd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4374: 0000000036b43cd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4375: 00000000002379d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4376: 0000000036b42cd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4376: 0000000036b43cd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4377: 000000000023c650 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4378: 0000000036b42e78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4378: 0000000036b43e78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4379: 000000000023c490 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4380: 0000000036b42e70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4380: 0000000036b43e70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4381: 0000000000238150 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4382: 0000000036b42cf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4382: 0000000036b43cf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4383: 0000000000237f90 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4384: 0000000036b42cf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4384: 0000000036b43cf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4385: 0000000000239850 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4386: 0000000036b42d78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4386: 0000000036b43d78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4387: 0000000000239690 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4388: 0000000036b42d70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4388: 0000000036b43d70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4389: 0000000000237010 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4390: 0000000036b42c98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4390: 0000000036b43c98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4391: 00000000002375d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4392: 0000000036b42cb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4392: 0000000036b43cb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4393: 0000000000236e50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4394: 0000000036b42c90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4394: 0000000036b43c90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4395: 0000000000237410 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4396: 0000000036b42cb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4396: 0000000036b43cb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4397: 0000000000238cd0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4398: 0000000036b42d38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4398: 0000000036b43d38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4399: 0000000000238b10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4400: 0000000036b42d30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4400: 0000000036b43d30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4401: 000000000023bad0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4402: 0000000036b42e38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4402: 0000000036b43e38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4403: 000000000023b910 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4404: 0000000036b42e30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4404: 0000000036b43e30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4405: 0000000000239290 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4406: 0000000036b42d58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4406: 0000000036b43d58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4407: 00000000002390d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4408: 0000000036b42d50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4408: 0000000036b43d50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4409: 000000000023a990 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4410: 0000000036b42dd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4410: 0000000036b43dd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4411: 000000000023a7d0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4412: 0000000036b42dd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4412: 0000000036b43dd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4413: 0000000000239e10 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4414: 0000000036b42d98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4414: 0000000036b43d98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4415: 0000000000239c50 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type2ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4416: 0000000036b42d90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4417: 0000000036af2660 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4418: 0000000036b42c80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4419: 0000000036b42c88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4416: 0000000036b43d90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type2ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4417: 0000000036af3660 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4418: 0000000036b43c80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4419: 0000000036b43c88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4420: 00000000002371d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4421: 00000000002372f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4422: 0000000036b42ca0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4423: 0000000036b42ca8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4422: 0000000036b43ca0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4423: 0000000036b43ca8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4424: 0000000000237790 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4425: 00000000002378b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4426: 0000000036b42cc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4427: 0000000036b42cc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4426: 0000000036b43cc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4427: 0000000036b43cc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4428: 0000000000237d50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4429: 0000000000237e70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4430: 0000000036b42ce0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4431: 0000000036b42ce8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4430: 0000000036b43ce0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4431: 0000000036b43ce8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4432: 0000000000238310 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4433: 0000000000238430 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4434: 0000000036b42d00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4435: 0000000036b42d08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4434: 0000000036b43d00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4435: 0000000036b43d08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4436: 00000000002388d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4437: 00000000002389f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4438: 0000000036b42d20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4439: 0000000036b42d28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4438: 0000000036b43d20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4439: 0000000036b43d28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4440: 0000000000238e90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4441: 0000000000238fb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4442: 0000000036b42d40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4443: 0000000036b42d48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4442: 0000000036b43d40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4443: 0000000036b43d48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4444: 0000000000239450 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4445: 0000000000239570 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4446: 0000000036b42d60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4447: 0000000036b42d68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4446: 0000000036b43d60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4447: 0000000036b43d68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4448: 0000000000239a10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4449: 0000000000239b30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4450: 0000000036b42d80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4451: 0000000036b42d88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4450: 0000000036b43d80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4451: 0000000036b43d88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4452: 0000000000239fd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4453: 000000000023a0f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4454: 0000000036b42da0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4455: 0000000036b42da8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4454: 0000000036b43da0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4455: 0000000036b43da8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4456: 000000000023a590 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4457: 000000000023a6b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4458: 0000000036b42dc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4459: 0000000036b42dc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4458: 0000000036b43dc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4459: 0000000036b43dc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4460: 000000000023ab50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4461: 000000000023ac70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4462: 0000000036b42de0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4463: 0000000036b42de8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4462: 0000000036b43de0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4463: 0000000036b43de8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4464: 000000000023b110 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4465: 000000000023b230 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4466: 0000000036b42e00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4467: 0000000036b42e08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4466: 0000000036b43e00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4467: 0000000036b43e08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4468: 000000000023b6d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4469: 000000000023b7f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4470: 0000000036b42e20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4471: 0000000036b42e28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4470: 0000000036b43e20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4471: 0000000036b43e28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4472: 000000000023bc90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4473: 000000000023bdb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4474: 0000000036b42e40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4475: 0000000036b42e48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4474: 0000000036b43e40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4475: 0000000036b43e48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4476: 000000000023c250 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4477: 000000000023c370 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4478: 0000000036b42e60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4479: 0000000036b42e68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4478: 0000000036b43e60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4479: 0000000036b43e68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type2ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4480: 000000000023c810 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4481: 000000000023c930 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type2ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4482: 000000000023ca50 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4483: 0000000036b464a8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4484: 0000000036b45698 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4483: 0000000036b474a8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4484: 0000000036b46698 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4485: 000000000023d720 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4486: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q4_1.cu\n 4487: 000000000024cd80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4488: 0000000036b43058 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4488: 0000000036b44058 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4489: 000000000024cbc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4490: 0000000036b43050 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4490: 0000000036b44050 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4491: 000000000024bc40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4492: 0000000036b42ff8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4492: 0000000036b43ff8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4493: 000000000024ba80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4494: 0000000036b42ff0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4494: 0000000036b43ff0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4495: 0000000000249400 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4496: 0000000036b42f18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4496: 0000000036b43f18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4497: 0000000000249240 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4498: 0000000036b42f10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4498: 0000000036b43f10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4499: 000000000024c200 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4500: 0000000036b43018 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4500: 0000000036b44018 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4501: 000000000024c040 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4502: 0000000036b43010 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4502: 0000000036b44010 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4503: 000000000024b0c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4504: 0000000036b42fb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4504: 0000000036b43fb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4505: 000000000024af00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4506: 0000000036b42fb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4506: 0000000036b43fb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4507: 0000000000248880 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4508: 0000000036b42ed8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4508: 0000000036b43ed8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4509: 00000000002486c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4510: 0000000036b42ed0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4510: 0000000036b43ed0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4511: 000000000024d340 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4512: 0000000036b43078 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4512: 0000000036b44078 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4513: 000000000024d180 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4514: 0000000036b43070 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4514: 0000000036b44070 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4515: 0000000000248e40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4516: 0000000036b42ef8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4516: 0000000036b43ef8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4517: 0000000000248c80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4518: 0000000036b42ef0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4518: 0000000036b43ef0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4519: 000000000024a540 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4520: 0000000036b42f78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4520: 0000000036b43f78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4521: 000000000024a380 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4522: 0000000036b42f70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4522: 0000000036b43f70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4523: 0000000000247d00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4524: 0000000036b42e98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4524: 0000000036b43e98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4525: 00000000002482c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4526: 0000000036b42eb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4526: 0000000036b43eb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4527: 0000000000247b40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4528: 0000000036b42e90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4528: 0000000036b43e90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4529: 0000000000248100 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4530: 0000000036b42eb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4530: 0000000036b43eb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4531: 00000000002499c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4532: 0000000036b42f38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4532: 0000000036b43f38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4533: 0000000000249800 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4534: 0000000036b42f30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4534: 0000000036b43f30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4535: 000000000024c7c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4536: 0000000036b43038 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4536: 0000000036b44038 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4537: 000000000024c600 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4538: 0000000036b43030 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4538: 0000000036b44030 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4539: 0000000000249f80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4540: 0000000036b42f58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4540: 0000000036b43f58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4541: 0000000000249dc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4542: 0000000036b42f50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4542: 0000000036b43f50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4543: 000000000024b680 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4544: 0000000036b42fd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4544: 0000000036b43fd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4545: 000000000024b4c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4546: 0000000036b42fd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4546: 0000000036b43fd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4547: 000000000024ab00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4548: 0000000036b42f98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4548: 0000000036b43f98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4549: 000000000024a940 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type3ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4550: 0000000036b42f90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4551: 0000000036af2960 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4552: 0000000036b42e80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4553: 0000000036b42e88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4550: 0000000036b43f90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type3ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4551: 0000000036af3960 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4552: 0000000036b43e80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4553: 0000000036b43e88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4554: 0000000000247ec0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4555: 0000000000247fe0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4556: 0000000036b42ea0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4557: 0000000036b42ea8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4556: 0000000036b43ea0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4557: 0000000036b43ea8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4558: 0000000000248480 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4559: 00000000002485a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4560: 0000000036b42ec0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4561: 0000000036b42ec8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4560: 0000000036b43ec0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4561: 0000000036b43ec8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4562: 0000000000248a40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4563: 0000000000248b60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4564: 0000000036b42ee0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4565: 0000000036b42ee8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4564: 0000000036b43ee0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4565: 0000000036b43ee8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4566: 0000000000249000 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4567: 0000000000249120 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4568: 0000000036b42f00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4569: 0000000036b42f08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4568: 0000000036b43f00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4569: 0000000036b43f08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4570: 00000000002495c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4571: 00000000002496e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4572: 0000000036b42f20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4573: 0000000036b42f28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4572: 0000000036b43f20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4573: 0000000036b43f28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4574: 0000000000249b80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4575: 0000000000249ca0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4576: 0000000036b42f40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4577: 0000000036b42f48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4576: 0000000036b43f40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4577: 0000000036b43f48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4578: 000000000024a140 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4579: 000000000024a260 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4580: 0000000036b42f60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4581: 0000000036b42f68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4580: 0000000036b43f60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4581: 0000000036b43f68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4582: 000000000024a700 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4583: 000000000024a820 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4584: 0000000036b42f80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4585: 0000000036b42f88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4584: 0000000036b43f80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4585: 0000000036b43f88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4586: 000000000024acc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4587: 000000000024ade0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4588: 0000000036b42fa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4589: 0000000036b42fa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4588: 0000000036b43fa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4589: 0000000036b43fa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4590: 000000000024b280 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4591: 000000000024b3a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4592: 0000000036b42fc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4593: 0000000036b42fc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4592: 0000000036b43fc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4593: 0000000036b43fc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4594: 000000000024b840 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4595: 000000000024b960 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4596: 0000000036b42fe0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4597: 0000000036b42fe8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4596: 0000000036b43fe0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4597: 0000000036b43fe8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4598: 000000000024be00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4599: 000000000024bf20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4600: 0000000036b43000 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4601: 0000000036b43008 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4600: 0000000036b44000 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4601: 0000000036b44008 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4602: 000000000024c3c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4603: 000000000024c4e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4604: 0000000036b43020 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4605: 0000000036b43028 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4604: 0000000036b44020 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4605: 0000000036b44028 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4606: 000000000024c980 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4607: 000000000024caa0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4608: 0000000036b43040 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4609: 0000000036b43048 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4608: 0000000036b44040 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4609: 0000000036b44048 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4610: 000000000024cf40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4611: 000000000024d060 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4612: 0000000036b43060 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4613: 0000000036b43068 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4612: 0000000036b44060 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4613: 0000000036b44068 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type3ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4614: 000000000024d500 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4615: 000000000024d620 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type3ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4616: 000000000024d740 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4617: 0000000036b464b0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4618: 0000000036b456b0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4617: 0000000036b474b0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4618: 0000000036b466b0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4619: 000000000024e410 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4620: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q4_k.cu\n 4621: 000000000025da70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4622: 0000000036b43258 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4622: 0000000036b44258 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4623: 000000000025d8b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4624: 0000000036b43250 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4624: 0000000036b44250 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4625: 000000000025c930 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4626: 0000000036b431f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4626: 0000000036b441f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4627: 000000000025c770 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4628: 0000000036b431f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4628: 0000000036b441f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4629: 000000000025a0f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4630: 0000000036b43118 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4630: 0000000036b44118 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4631: 0000000000259f30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4632: 0000000036b43110 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4632: 0000000036b44110 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4633: 000000000025cef0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4634: 0000000036b43218 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4634: 0000000036b44218 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4635: 000000000025cd30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4636: 0000000036b43210 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4636: 0000000036b44210 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4637: 000000000025bdb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4638: 0000000036b431b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4638: 0000000036b441b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4639: 000000000025bbf0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4640: 0000000036b431b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4640: 0000000036b441b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4641: 0000000000259570 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4642: 0000000036b430d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4642: 0000000036b440d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4643: 00000000002593b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4644: 0000000036b430d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4644: 0000000036b440d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4645: 000000000025e030 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4646: 0000000036b43278 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4646: 0000000036b44278 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4647: 000000000025de70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4648: 0000000036b43270 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4648: 0000000036b44270 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4649: 0000000000259b30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4650: 0000000036b430f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4650: 0000000036b440f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4651: 0000000000259970 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4652: 0000000036b430f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4652: 0000000036b440f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4653: 000000000025b230 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4654: 0000000036b43178 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4654: 0000000036b44178 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4655: 000000000025b070 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4656: 0000000036b43170 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4656: 0000000036b44170 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4657: 00000000002589f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4658: 0000000036b43098 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4658: 0000000036b44098 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4659: 0000000000258fb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4660: 0000000036b430b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4660: 0000000036b440b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4661: 0000000000258830 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4662: 0000000036b43090 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4662: 0000000036b44090 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4663: 0000000000258df0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4664: 0000000036b430b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4664: 0000000036b440b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4665: 000000000025a6b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4666: 0000000036b43138 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4666: 0000000036b44138 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4667: 000000000025a4f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4668: 0000000036b43130 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4668: 0000000036b44130 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4669: 000000000025d4b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4670: 0000000036b43238 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4670: 0000000036b44238 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4671: 000000000025d2f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4672: 0000000036b43230 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4672: 0000000036b44230 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4673: 000000000025ac70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4674: 0000000036b43158 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4674: 0000000036b44158 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4675: 000000000025aab0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4676: 0000000036b43150 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4676: 0000000036b44150 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4677: 000000000025c370 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4678: 0000000036b431d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4678: 0000000036b441d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4679: 000000000025c1b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4680: 0000000036b431d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4680: 0000000036b441d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4681: 000000000025b7f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4682: 0000000036b43198 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4682: 0000000036b44198 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4683: 000000000025b630 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type12ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4684: 0000000036b43190 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4685: 0000000036af2c60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4686: 0000000036b43080 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4687: 0000000036b43088 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4684: 0000000036b44190 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type12ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4685: 0000000036af3c60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4686: 0000000036b44080 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4687: 0000000036b44088 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4688: 0000000000258bb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4689: 0000000000258cd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4690: 0000000036b430a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4691: 0000000036b430a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4690: 0000000036b440a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4691: 0000000036b440a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4692: 0000000000259170 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4693: 0000000000259290 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4694: 0000000036b430c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4695: 0000000036b430c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4694: 0000000036b440c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4695: 0000000036b440c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4696: 0000000000259730 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4697: 0000000000259850 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4698: 0000000036b430e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4699: 0000000036b430e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4698: 0000000036b440e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4699: 0000000036b440e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4700: 0000000000259cf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4701: 0000000000259e10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4702: 0000000036b43100 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4703: 0000000036b43108 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4702: 0000000036b44100 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4703: 0000000036b44108 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4704: 000000000025a2b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4705: 000000000025a3d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4706: 0000000036b43120 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4707: 0000000036b43128 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4706: 0000000036b44120 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4707: 0000000036b44128 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4708: 000000000025a870 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4709: 000000000025a990 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4710: 0000000036b43140 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4711: 0000000036b43148 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4710: 0000000036b44140 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4711: 0000000036b44148 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4712: 000000000025ae30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4713: 000000000025af50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4714: 0000000036b43160 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4715: 0000000036b43168 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4714: 0000000036b44160 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4715: 0000000036b44168 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4716: 000000000025b3f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4717: 000000000025b510 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4718: 0000000036b43180 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4719: 0000000036b43188 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4718: 0000000036b44180 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4719: 0000000036b44188 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4720: 000000000025b9b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4721: 000000000025bad0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4722: 0000000036b431a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4723: 0000000036b431a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4722: 0000000036b441a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4723: 0000000036b441a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4724: 000000000025bf70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4725: 000000000025c090 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4726: 0000000036b431c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4727: 0000000036b431c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4726: 0000000036b441c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4727: 0000000036b441c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4728: 000000000025c530 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4729: 000000000025c650 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4730: 0000000036b431e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4731: 0000000036b431e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4730: 0000000036b441e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4731: 0000000036b441e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4732: 000000000025caf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4733: 000000000025cc10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4734: 0000000036b43200 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4735: 0000000036b43208 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4734: 0000000036b44200 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4735: 0000000036b44208 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4736: 000000000025d0b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4737: 000000000025d1d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4738: 0000000036b43220 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4739: 0000000036b43228 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4738: 0000000036b44220 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4739: 0000000036b44228 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4740: 000000000025d670 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4741: 000000000025d790 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4742: 0000000036b43240 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4743: 0000000036b43248 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4742: 0000000036b44240 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4743: 0000000036b44248 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4744: 000000000025dc30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4745: 000000000025dd50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4746: 0000000036b43260 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4747: 0000000036b43268 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4746: 0000000036b44260 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4747: 0000000036b44268 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type12ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4748: 000000000025e1f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4749: 000000000025e310 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type12ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4750: 000000000025e430 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4751: 0000000036b464b8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4752: 0000000036b456c8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4751: 0000000036b474b8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4752: 0000000036b466c8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4753: 000000000025f100 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4754: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q5_0.cu\n 4755: 000000000026e8c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4756: 0000000036b43458 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4756: 0000000036b44458 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4757: 000000000026e700 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4758: 0000000036b43450 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4758: 0000000036b44450 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4759: 000000000026d780 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4760: 0000000036b433f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4760: 0000000036b443f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4761: 000000000026d5c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4762: 0000000036b433f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4762: 0000000036b443f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4763: 000000000026af40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4764: 0000000036b43318 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4764: 0000000036b44318 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4765: 000000000026ad80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4766: 0000000036b43310 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4766: 0000000036b44310 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4767: 000000000026dd40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4768: 0000000036b43418 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4768: 0000000036b44418 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4769: 000000000026db80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4770: 0000000036b43410 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4770: 0000000036b44410 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4771: 000000000026cc00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4772: 0000000036b433b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4772: 0000000036b443b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4773: 000000000026ca40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4774: 0000000036b433b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4774: 0000000036b443b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4775: 000000000026a3c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4776: 0000000036b432d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4776: 0000000036b442d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4777: 000000000026a200 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4778: 0000000036b432d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4778: 0000000036b442d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4779: 000000000026ee80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4780: 0000000036b43478 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4780: 0000000036b44478 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4781: 000000000026ecc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4782: 0000000036b43470 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4782: 0000000036b44470 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4783: 000000000026a980 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4784: 0000000036b432f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4784: 0000000036b442f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4785: 000000000026a7c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4786: 0000000036b432f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4786: 0000000036b442f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4787: 000000000026c080 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4788: 0000000036b43378 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4788: 0000000036b44378 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4789: 000000000026bec0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4790: 0000000036b43370 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4790: 0000000036b44370 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4791: 0000000000269840 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4792: 0000000036b43298 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4792: 0000000036b44298 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4793: 0000000000269e00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4794: 0000000036b432b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4794: 0000000036b442b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4795: 0000000000269680 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4796: 0000000036b43290 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4796: 0000000036b44290 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4797: 0000000000269c40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4798: 0000000036b432b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4798: 0000000036b442b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4799: 000000000026b500 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4800: 0000000036b43338 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4800: 0000000036b44338 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4801: 000000000026b340 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4802: 0000000036b43330 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4802: 0000000036b44330 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4803: 000000000026e300 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4804: 0000000036b43438 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4804: 0000000036b44438 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4805: 000000000026e140 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4806: 0000000036b43430 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4806: 0000000036b44430 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4807: 000000000026bac0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4808: 0000000036b43358 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4808: 0000000036b44358 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4809: 000000000026b900 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4810: 0000000036b43350 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4810: 0000000036b44350 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4811: 000000000026d1c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4812: 0000000036b433d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4812: 0000000036b443d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4813: 000000000026d000 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4814: 0000000036b433d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4814: 0000000036b443d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4815: 000000000026c640 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4816: 0000000036b43398 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4816: 0000000036b44398 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4817: 000000000026c480 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type6ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4818: 0000000036b43390 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4819: 0000000036af2f60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4820: 0000000036b43280 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4821: 0000000036b43288 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4818: 0000000036b44390 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type6ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4819: 0000000036af3f60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4820: 0000000036b44280 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4821: 0000000036b44288 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4822: 0000000000269a00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4823: 0000000000269b20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4824: 0000000036b432a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4825: 0000000036b432a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4824: 0000000036b442a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4825: 0000000036b442a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4826: 0000000000269fc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4827: 000000000026a0e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4828: 0000000036b432c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4829: 0000000036b432c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4828: 0000000036b442c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4829: 0000000036b442c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4830: 000000000026a580 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4831: 000000000026a6a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4832: 0000000036b432e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4833: 0000000036b432e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4832: 0000000036b442e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4833: 0000000036b442e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4834: 000000000026ab40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4835: 000000000026ac60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4836: 0000000036b43300 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4837: 0000000036b43308 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4836: 0000000036b44300 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4837: 0000000036b44308 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4838: 000000000026b100 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4839: 000000000026b220 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4840: 0000000036b43320 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4841: 0000000036b43328 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4840: 0000000036b44320 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4841: 0000000036b44328 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4842: 000000000026b6c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4843: 000000000026b7e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4844: 0000000036b43340 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4845: 0000000036b43348 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4844: 0000000036b44340 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4845: 0000000036b44348 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4846: 000000000026bc80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4847: 000000000026bda0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4848: 0000000036b43360 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4849: 0000000036b43368 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4848: 0000000036b44360 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4849: 0000000036b44368 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4850: 000000000026c240 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4851: 000000000026c360 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4852: 0000000036b43380 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4853: 0000000036b43388 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4852: 0000000036b44380 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4853: 0000000036b44388 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4854: 000000000026c800 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4855: 000000000026c920 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4856: 0000000036b433a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4857: 0000000036b433a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4856: 0000000036b443a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4857: 0000000036b443a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4858: 000000000026cdc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4859: 000000000026cee0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4860: 0000000036b433c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4861: 0000000036b433c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4860: 0000000036b443c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4861: 0000000036b443c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4862: 000000000026d380 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4863: 000000000026d4a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4864: 0000000036b433e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4865: 0000000036b433e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4864: 0000000036b443e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4865: 0000000036b443e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4866: 000000000026d940 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4867: 000000000026da60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4868: 0000000036b43400 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4869: 0000000036b43408 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4868: 0000000036b44400 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4869: 0000000036b44408 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4870: 000000000026df00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4871: 000000000026e020 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4872: 0000000036b43420 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4873: 0000000036b43428 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4872: 0000000036b44420 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4873: 0000000036b44428 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4874: 000000000026e4c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4875: 000000000026e5e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4876: 0000000036b43440 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4877: 0000000036b43448 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4876: 0000000036b44440 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4877: 0000000036b44448 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4878: 000000000026ea80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4879: 000000000026eba0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4880: 0000000036b43460 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4881: 0000000036b43468 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4880: 0000000036b44460 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4881: 0000000036b44468 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type6ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4882: 000000000026f040 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4883: 000000000026f160 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type6ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4884: 000000000026f280 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 4885: 0000000036b464c0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 4886: 0000000036b456e0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 4885: 0000000036b474c0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 4886: 0000000036b466e0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 4887: 000000000026ff50 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 4888: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q5_1.cu\n 4889: 000000000027f5b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4890: 0000000036b43658 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4890: 0000000036b44658 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4891: 000000000027f3f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4892: 0000000036b43650 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4892: 0000000036b44650 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4893: 000000000027e470 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4894: 0000000036b435f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4894: 0000000036b445f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4895: 000000000027e2b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4896: 0000000036b435f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4896: 0000000036b445f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4897: 000000000027bc30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4898: 0000000036b43518 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4898: 0000000036b44518 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4899: 000000000027ba70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4900: 0000000036b43510 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4900: 0000000036b44510 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4901: 000000000027ea30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4902: 0000000036b43618 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4902: 0000000036b44618 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4903: 000000000027e870 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4904: 0000000036b43610 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4904: 0000000036b44610 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4905: 000000000027d8f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4906: 0000000036b435b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4906: 0000000036b445b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4907: 000000000027d730 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4908: 0000000036b435b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4908: 0000000036b445b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4909: 000000000027b0b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4910: 0000000036b434d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4910: 0000000036b444d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4911: 000000000027aef0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4912: 0000000036b434d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4912: 0000000036b444d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4913: 000000000027fb70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4914: 0000000036b43678 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4914: 0000000036b44678 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4915: 000000000027f9b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4916: 0000000036b43670 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4916: 0000000036b44670 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4917: 000000000027b670 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4918: 0000000036b434f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4918: 0000000036b444f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4919: 000000000027b4b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4920: 0000000036b434f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4920: 0000000036b444f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4921: 000000000027cd70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4922: 0000000036b43578 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4922: 0000000036b44578 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4923: 000000000027cbb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4924: 0000000036b43570 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4924: 0000000036b44570 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4925: 000000000027a530 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4926: 0000000036b43498 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4926: 0000000036b44498 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4927: 000000000027aaf0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4928: 0000000036b434b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4928: 0000000036b444b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4929: 000000000027a370 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4930: 0000000036b43490 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4930: 0000000036b44490 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4931: 000000000027a930 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4932: 0000000036b434b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4932: 0000000036b444b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4933: 000000000027c1f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4934: 0000000036b43538 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4934: 0000000036b44538 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4935: 000000000027c030 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4936: 0000000036b43530 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4936: 0000000036b44530 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4937: 000000000027eff0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4938: 0000000036b43638 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4938: 0000000036b44638 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4939: 000000000027ee30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4940: 0000000036b43630 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4940: 0000000036b44630 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4941: 000000000027c7b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4942: 0000000036b43558 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4942: 0000000036b44558 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4943: 000000000027c5f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4944: 0000000036b43550 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4944: 0000000036b44550 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4945: 000000000027deb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4946: 0000000036b435d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4946: 0000000036b445d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4947: 000000000027dcf0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4948: 0000000036b435d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4948: 0000000036b445d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4949: 000000000027d330 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4950: 0000000036b43598 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 4950: 0000000036b44598 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 4951: 000000000027d170 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type7ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4952: 0000000036b43590 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 4953: 0000000036af3260 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 4954: 0000000036b43480 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4955: 0000000036b43488 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4952: 0000000036b44590 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type7ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 4953: 0000000036af4260 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 4954: 0000000036b44480 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4955: 0000000036b44488 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4956: 000000000027a6f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4957: 000000000027a810 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4958: 0000000036b434a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4959: 0000000036b434a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4958: 0000000036b444a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4959: 0000000036b444a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4960: 000000000027acb0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4961: 000000000027add0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4962: 0000000036b434c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4963: 0000000036b434c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4962: 0000000036b444c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4963: 0000000036b444c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4964: 000000000027b270 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4965: 000000000027b390 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4966: 0000000036b434e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4967: 0000000036b434e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4966: 0000000036b444e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4967: 0000000036b444e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4968: 000000000027b830 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4969: 000000000027b950 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4970: 0000000036b43500 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4971: 0000000036b43508 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4970: 0000000036b44500 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4971: 0000000036b44508 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4972: 000000000027bdf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4973: 000000000027bf10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4974: 0000000036b43520 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4975: 0000000036b43528 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4974: 0000000036b44520 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4975: 0000000036b44528 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4976: 000000000027c3b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4977: 000000000027c4d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4978: 0000000036b43540 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4979: 0000000036b43548 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4978: 0000000036b44540 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4979: 0000000036b44548 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4980: 000000000027c970 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4981: 000000000027ca90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4982: 0000000036b43560 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4983: 0000000036b43568 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4982: 0000000036b44560 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4983: 0000000036b44568 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4984: 000000000027cf30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4985: 000000000027d050 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4986: 0000000036b43580 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4987: 0000000036b43588 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4986: 0000000036b44580 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4987: 0000000036b44588 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4988: 000000000027d4f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4989: 000000000027d610 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4990: 0000000036b435a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4991: 0000000036b435a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4990: 0000000036b445a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4991: 0000000036b445a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4992: 000000000027dab0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4993: 000000000027dbd0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4994: 0000000036b435c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4995: 0000000036b435c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4994: 0000000036b445c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4995: 0000000036b445c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 4996: 000000000027e070 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 4997: 000000000027e190 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 4998: 0000000036b435e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 4999: 0000000036b435e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4998: 0000000036b445e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 4999: 0000000036b445e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5000: 000000000027e630 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5001: 000000000027e750 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5002: 0000000036b43600 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5003: 0000000036b43608 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5002: 0000000036b44600 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5003: 0000000036b44608 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5004: 000000000027ebf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5005: 000000000027ed10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5006: 0000000036b43620 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5007: 0000000036b43628 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5006: 0000000036b44620 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5007: 0000000036b44628 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5008: 000000000027f1b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5009: 000000000027f2d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5010: 0000000036b43640 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5011: 0000000036b43648 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5010: 0000000036b44640 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5011: 0000000036b44648 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5012: 000000000027f770 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5013: 000000000027f890 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5014: 0000000036b43660 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5015: 0000000036b43668 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5014: 0000000036b44660 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5015: 0000000036b44668 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type7ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5016: 000000000027fd30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5017: 000000000027fe50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type7ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5018: 000000000027ff70 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5019: 0000000036b464c8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5020: 0000000036b456f8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5019: 0000000036b474c8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5020: 0000000036b466f8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5021: 0000000000280c40 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5022: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q5_k.cu\n 5023: 00000000002902a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5024: 0000000036b43858 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5024: 0000000036b44858 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5025: 00000000002900e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5026: 0000000036b43850 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5026: 0000000036b44850 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5027: 000000000028f160 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5028: 0000000036b437f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5028: 0000000036b447f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5029: 000000000028efa0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5030: 0000000036b437f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5030: 0000000036b447f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5031: 000000000028c920 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5032: 0000000036b43718 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5032: 0000000036b44718 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5033: 000000000028c760 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5034: 0000000036b43710 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5034: 0000000036b44710 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5035: 000000000028f720 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5036: 0000000036b43818 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5036: 0000000036b44818 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5037: 000000000028f560 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5038: 0000000036b43810 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5038: 0000000036b44810 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5039: 000000000028e5e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5040: 0000000036b437b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5040: 0000000036b447b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5041: 000000000028e420 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5042: 0000000036b437b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5042: 0000000036b447b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5043: 000000000028bda0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5044: 0000000036b436d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5044: 0000000036b446d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5045: 000000000028bbe0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5046: 0000000036b436d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5046: 0000000036b446d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5047: 0000000000290860 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5048: 0000000036b43878 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5048: 0000000036b44878 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5049: 00000000002906a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5050: 0000000036b43870 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5050: 0000000036b44870 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5051: 000000000028c360 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5052: 0000000036b436f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5052: 0000000036b446f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5053: 000000000028c1a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5054: 0000000036b436f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5054: 0000000036b446f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5055: 000000000028da60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5056: 0000000036b43778 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5056: 0000000036b44778 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5057: 000000000028d8a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5058: 0000000036b43770 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5058: 0000000036b44770 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5059: 000000000028b220 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5060: 0000000036b43698 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5060: 0000000036b44698 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5061: 000000000028b7e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5062: 0000000036b436b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5062: 0000000036b446b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5063: 000000000028b060 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5064: 0000000036b43690 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5064: 0000000036b44690 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5065: 000000000028b620 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5066: 0000000036b436b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5066: 0000000036b446b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5067: 000000000028cee0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5068: 0000000036b43738 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5068: 0000000036b44738 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5069: 000000000028cd20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5070: 0000000036b43730 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5070: 0000000036b44730 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5071: 000000000028fce0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5072: 0000000036b43838 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5072: 0000000036b44838 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5073: 000000000028fb20 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5074: 0000000036b43830 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5074: 0000000036b44830 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5075: 000000000028d4a0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5076: 0000000036b43758 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5076: 0000000036b44758 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5077: 000000000028d2e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5078: 0000000036b43750 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5078: 0000000036b44750 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5079: 000000000028eba0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5080: 0000000036b437d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5080: 0000000036b447d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5081: 000000000028e9e0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5082: 0000000036b437d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5082: 0000000036b447d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5083: 000000000028e020 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5084: 0000000036b43798 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5084: 0000000036b44798 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5085: 000000000028de60 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type13ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5086: 0000000036b43790 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 5087: 0000000036af3560 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 5088: 0000000036b43680 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5089: 0000000036b43688 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5086: 0000000036b44790 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type13ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5087: 0000000036af4560 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 5088: 0000000036b44680 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5089: 0000000036b44688 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5090: 000000000028b3e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5091: 000000000028b500 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5092: 0000000036b436a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5093: 0000000036b436a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5092: 0000000036b446a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5093: 0000000036b446a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5094: 000000000028b9a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5095: 000000000028bac0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5096: 0000000036b436c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5097: 0000000036b436c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5096: 0000000036b446c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5097: 0000000036b446c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5098: 000000000028bf60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5099: 000000000028c080 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5100: 0000000036b436e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5101: 0000000036b436e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5100: 0000000036b446e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5101: 0000000036b446e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5102: 000000000028c520 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5103: 000000000028c640 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5104: 0000000036b43700 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5105: 0000000036b43708 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5104: 0000000036b44700 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5105: 0000000036b44708 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5106: 000000000028cae0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5107: 000000000028cc00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5108: 0000000036b43720 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5109: 0000000036b43728 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5108: 0000000036b44720 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5109: 0000000036b44728 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5110: 000000000028d0a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5111: 000000000028d1c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5112: 0000000036b43740 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5113: 0000000036b43748 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5112: 0000000036b44740 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5113: 0000000036b44748 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5114: 000000000028d660 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5115: 000000000028d780 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5116: 0000000036b43760 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5117: 0000000036b43768 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5116: 0000000036b44760 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5117: 0000000036b44768 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5118: 000000000028dc20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5119: 000000000028dd40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5120: 0000000036b43780 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5121: 0000000036b43788 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5120: 0000000036b44780 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5121: 0000000036b44788 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5122: 000000000028e1e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5123: 000000000028e300 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5124: 0000000036b437a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5125: 0000000036b437a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5124: 0000000036b447a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5125: 0000000036b447a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5126: 000000000028e7a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5127: 000000000028e8c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5128: 0000000036b437c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5129: 0000000036b437c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5128: 0000000036b447c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5129: 0000000036b447c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5130: 000000000028ed60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5131: 000000000028ee80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5132: 0000000036b437e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5133: 0000000036b437e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5132: 0000000036b447e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5133: 0000000036b447e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5134: 000000000028f320 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5135: 000000000028f440 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5136: 0000000036b43800 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5137: 0000000036b43808 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5136: 0000000036b44800 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5137: 0000000036b44808 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5138: 000000000028f8e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5139: 000000000028fa00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5140: 0000000036b43820 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5141: 0000000036b43828 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5140: 0000000036b44820 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5141: 0000000036b44828 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5142: 000000000028fea0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5143: 000000000028ffc0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5144: 0000000036b43840 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5145: 0000000036b43848 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5144: 0000000036b44840 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5145: 0000000036b44848 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5146: 0000000000290460 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5147: 0000000000290580 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5148: 0000000036b43860 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5149: 0000000036b43868 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5148: 0000000036b44860 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5149: 0000000036b44868 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type13ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5150: 0000000000290a20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5151: 0000000000290b40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type13ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5152: 0000000000290c60 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5153: 0000000036b464d0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5154: 0000000036b45710 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5153: 0000000036b474d0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5154: 0000000036b46710 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5155: 0000000000291930 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5156: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q6_k.cu\n 5157: 00000000002a1170 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5158: 0000000036b43a58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5158: 0000000036b44a58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5159: 00000000002a0fb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5160: 0000000036b43a50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5160: 0000000036b44a50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5161: 00000000002a0030 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5162: 0000000036b439f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5162: 0000000036b449f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5163: 000000000029fe70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5164: 0000000036b439f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5164: 0000000036b449f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5165: 000000000029d7f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5166: 0000000036b43918 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5166: 0000000036b44918 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5167: 000000000029d630 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5168: 0000000036b43910 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5168: 0000000036b44910 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5169: 00000000002a05f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5170: 0000000036b43a18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5170: 0000000036b44a18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5171: 00000000002a0430 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5172: 0000000036b43a10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5172: 0000000036b44a10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5173: 000000000029f4b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5174: 0000000036b439b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5174: 0000000036b449b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5175: 000000000029f2f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5176: 0000000036b439b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5176: 0000000036b449b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5177: 000000000029cc70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5178: 0000000036b438d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5178: 0000000036b448d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5179: 000000000029cab0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5180: 0000000036b438d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5180: 0000000036b448d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5181: 00000000002a1730 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5182: 0000000036b43a78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5182: 0000000036b44a78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5183: 00000000002a1570 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5184: 0000000036b43a70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5184: 0000000036b44a70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5185: 000000000029d230 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5186: 0000000036b438f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5186: 0000000036b448f8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5187: 000000000029d070 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5188: 0000000036b438f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5188: 0000000036b448f0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5189: 000000000029e930 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5190: 0000000036b43978 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5190: 0000000036b44978 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5191: 000000000029e770 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5192: 0000000036b43970 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5192: 0000000036b44970 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5193: 000000000029c0f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5194: 0000000036b43898 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5194: 0000000036b44898 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5195: 000000000029c6b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5196: 0000000036b438b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5196: 0000000036b448b8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5197: 000000000029bf30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5198: 0000000036b43890 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5198: 0000000036b44890 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5199: 000000000029c4f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5200: 0000000036b438b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5200: 0000000036b448b0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5201: 000000000029ddb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5202: 0000000036b43938 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5202: 0000000036b44938 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5203: 000000000029dbf0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5204: 0000000036b43930 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5204: 0000000036b44930 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5205: 00000000002a0bb0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5206: 0000000036b43a38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5206: 0000000036b44a38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5207: 00000000002a09f0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5208: 0000000036b43a30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5208: 0000000036b44a30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5209: 000000000029e370 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5210: 0000000036b43958 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5210: 0000000036b44958 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5211: 000000000029e1b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5212: 0000000036b43950 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5212: 0000000036b44950 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5213: 000000000029fa70 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5214: 0000000036b439d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5214: 0000000036b449d8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5215: 000000000029f8b0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5216: 0000000036b439d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5216: 0000000036b449d0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5217: 000000000029eef0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5218: 0000000036b43998 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5218: 0000000036b44998 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5219: 000000000029ed30 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type14ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5220: 0000000036b43990 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 5221: 0000000036af3860 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 5222: 0000000036b43880 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5223: 0000000036b43888 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5220: 0000000036b44990 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type14ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5221: 0000000036af4860 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 5222: 0000000036b44880 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5223: 0000000036b44888 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5224: 000000000029c2b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5225: 000000000029c3d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5226: 0000000036b438a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5227: 0000000036b438a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5226: 0000000036b448a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5227: 0000000036b448a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5228: 000000000029c870 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5229: 000000000029c990 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5230: 0000000036b438c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5231: 0000000036b438c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5230: 0000000036b448c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5231: 0000000036b448c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5232: 000000000029ce30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5233: 000000000029cf50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5234: 0000000036b438e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5235: 0000000036b438e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5234: 0000000036b448e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5235: 0000000036b448e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5236: 000000000029d3f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5237: 000000000029d510 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5238: 0000000036b43900 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5239: 0000000036b43908 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5238: 0000000036b44900 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5239: 0000000036b44908 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5240: 000000000029d9b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5241: 000000000029dad0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5242: 0000000036b43920 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5243: 0000000036b43928 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5242: 0000000036b44920 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5243: 0000000036b44928 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5244: 000000000029df70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5245: 000000000029e090 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5246: 0000000036b43940 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5247: 0000000036b43948 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5246: 0000000036b44940 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5247: 0000000036b44948 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5248: 000000000029e530 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5249: 000000000029e650 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5250: 0000000036b43960 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5251: 0000000036b43968 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5250: 0000000036b44960 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5251: 0000000036b44968 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5252: 000000000029eaf0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5253: 000000000029ec10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5254: 0000000036b43980 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5255: 0000000036b43988 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5254: 0000000036b44980 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5255: 0000000036b44988 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5256: 000000000029f0b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5257: 000000000029f1d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5258: 0000000036b439a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5259: 0000000036b439a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5258: 0000000036b449a0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5259: 0000000036b449a8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5260: 000000000029f670 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5261: 000000000029f790 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5262: 0000000036b439c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5263: 0000000036b439c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5262: 0000000036b449c0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5263: 0000000036b449c8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5264: 000000000029fc30 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5265: 000000000029fd50 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5266: 0000000036b439e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5267: 0000000036b439e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5266: 0000000036b449e0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5267: 0000000036b449e8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5268: 00000000002a01f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5269: 00000000002a0310 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5270: 0000000036b43a00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5271: 0000000036b43a08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5270: 0000000036b44a00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5271: 0000000036b44a08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5272: 00000000002a07b0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5273: 00000000002a08d0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5274: 0000000036b43a20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5275: 0000000036b43a28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5274: 0000000036b44a20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5275: 0000000036b44a28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5276: 00000000002a0d70 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5277: 00000000002a0e90 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5278: 0000000036b43a40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5279: 0000000036b43a48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5278: 0000000036b44a40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5279: 0000000036b44a48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5280: 00000000002a1330 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5281: 00000000002a1450 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5282: 0000000036b43a60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5283: 0000000036b43a68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5282: 0000000036b44a60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5283: 0000000036b44a68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type14ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5284: 00000000002a18f0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5285: 00000000002a1a10 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type14ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5286: 00000000002a1b30 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5287: 0000000036b464d8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5288: 0000000036b45728 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5287: 0000000036b474d8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5288: 0000000036b46728 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5289: 00000000002a2800 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5290: 0000000000000000 0 FILE LOCAL DEFAULT ABS mmq-instance-q8_0.cu\n 5291: 00000000002b2040 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5292: 0000000036b43c58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5292: 0000000036b44c58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5293: 00000000002b1e80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5294: 0000000036b43c50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5294: 0000000036b44c50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5295: 00000000002b0f00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5296: 0000000036b43bf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5296: 0000000036b44bf8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5297: 00000000002b0d40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5298: 0000000036b43bf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5298: 0000000036b44bf0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5299: 00000000002ae6c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5300: 0000000036b43b18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5300: 0000000036b44b18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5301: 00000000002ae500 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5302: 0000000036b43b10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5302: 0000000036b44b10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5303: 00000000002b14c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5304: 0000000036b43c18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5304: 0000000036b44c18 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5305: 00000000002b1300 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5306: 0000000036b43c10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5306: 0000000036b44c10 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5307: 00000000002b0380 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5308: 0000000036b43bb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5308: 0000000036b44bb8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5309: 00000000002b01c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5310: 0000000036b43bb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5310: 0000000036b44bb0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5311: 00000000002adb40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5312: 0000000036b43ad8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5312: 0000000036b44ad8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5313: 00000000002ad980 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5314: 0000000036b43ad0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5314: 0000000036b44ad0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5315: 00000000002b2600 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5316: 0000000036b43c78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5316: 0000000036b44c78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5317: 00000000002b2440 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5318: 0000000036b43c70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5318: 0000000036b44c70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5319: 00000000002ae100 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5320: 0000000036b43af8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5320: 0000000036b44af8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5321: 00000000002adf40 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5322: 0000000036b43af0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5322: 0000000036b44af0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5323: 00000000002af800 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5324: 0000000036b43b78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5324: 0000000036b44b78 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5325: 00000000002af640 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5326: 0000000036b43b70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5326: 0000000036b44b70 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5327: 00000000002acfc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5328: 0000000036b43a98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5328: 0000000036b44a98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5329: 00000000002ad580 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5330: 0000000036b43ab8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5330: 0000000036b44ab8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5331: 00000000002ace00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5332: 0000000036b43a90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5332: 0000000036b44a90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5333: 00000000002ad3c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5334: 0000000036b43ab0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5334: 0000000036b44ab0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5335: 00000000002aec80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5336: 0000000036b43b38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5336: 0000000036b44b38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5337: 00000000002aeac0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5338: 0000000036b43b30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5338: 0000000036b44b30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5339: 00000000002b1a80 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5340: 0000000036b43c38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5340: 0000000036b44c38 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5341: 00000000002b18c0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5342: 0000000036b43c30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5342: 0000000036b44c30 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5343: 00000000002af240 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5344: 0000000036b43b58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5344: 0000000036b44b58 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5345: 00000000002af080 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5346: 0000000036b43b50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5346: 0000000036b44b50 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5347: 00000000002b0940 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5348: 0000000036b43bd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5348: 0000000036b44bd8 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5349: 00000000002b0780 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5350: 0000000036b43bd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5350: 0000000036b44bd0 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5351: 00000000002afdc0 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5352: 0000000036b43b98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n+ 5352: 0000000036b44b98 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5353: 00000000002afc00 433 FUNC LOCAL DEFAULT 12 _ZL24__device_stub__mul_mat_qIL9ggml_type8ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5354: 0000000036b43b90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n- 5355: 0000000036af3b60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n- 5356: 0000000036b43a80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5357: 0000000036b43a88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5354: 0000000036b44b90 8 OBJECT LOCAL DEFAULT 21 _ZL24mul_mat_q_stream_k_fixupIL9ggml_type8ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n+ 5355: 0000000036af4b60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table0\n+ 5356: 0000000036b44a80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi8ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5357: 0000000036b44a88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi8ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5358: 00000000002ad180 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi8ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5359: 00000000002ad2a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi8ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5360: 0000000036b43aa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5361: 0000000036b43aa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5360: 0000000036b44aa0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi16ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5361: 0000000036b44aa8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi16ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5362: 00000000002ad740 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi16ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5363: 00000000002ad860 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi16ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5364: 0000000036b43ac0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5365: 0000000036b43ac8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5364: 0000000036b44ac0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi24ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5365: 0000000036b44ac8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi24ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5366: 00000000002add00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi24ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5367: 00000000002ade20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi24ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5368: 0000000036b43ae0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5369: 0000000036b43ae8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5368: 0000000036b44ae0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi32ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5369: 0000000036b44ae8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi32ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5370: 00000000002ae2c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi32ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5371: 00000000002ae3e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi32ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5372: 0000000036b43b00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5373: 0000000036b43b08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5372: 0000000036b44b00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi40ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5373: 0000000036b44b08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi40ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5374: 00000000002ae880 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi40ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5375: 00000000002ae9a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi40ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5376: 0000000036b43b20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5377: 0000000036b43b28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5376: 0000000036b44b20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi48ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5377: 0000000036b44b28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi48ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5378: 00000000002aee40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi48ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5379: 00000000002aef60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi48ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5380: 0000000036b43b40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5381: 0000000036b43b48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5380: 0000000036b44b40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi56ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5381: 0000000036b44b48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi56ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5382: 00000000002af400 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi56ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5383: 00000000002af520 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi56ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5384: 0000000036b43b60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5385: 0000000036b43b68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5384: 0000000036b44b60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi64ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5385: 0000000036b44b68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi64ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5386: 00000000002af9c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi64ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5387: 00000000002afae0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi64ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5388: 0000000036b43b80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5389: 0000000036b43b88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5388: 0000000036b44b80 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi72ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5389: 0000000036b44b88 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi72ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5390: 00000000002aff80 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi72ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5391: 00000000002b00a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi72ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5392: 0000000036b43ba0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5393: 0000000036b43ba8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5392: 0000000036b44ba0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi80ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5393: 0000000036b44ba8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi80ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5394: 00000000002b0540 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi80ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5395: 00000000002b0660 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi80ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5396: 0000000036b43bc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5397: 0000000036b43bc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5396: 0000000036b44bc0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi88ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5397: 0000000036b44bc8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi88ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5398: 00000000002b0b00 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi88ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5399: 00000000002b0c20 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi88ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5400: 0000000036b43be0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5401: 0000000036b43be8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5400: 0000000036b44be0 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi96ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5401: 0000000036b44be8 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi96ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5402: 00000000002b10c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi96ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5403: 00000000002b11e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi96ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5404: 0000000036b43c00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5405: 0000000036b43c08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5404: 0000000036b44c00 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi104ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5405: 0000000036b44c08 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi104ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5406: 00000000002b1680 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi104ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5407: 00000000002b17a0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi104ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5408: 0000000036b43c20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5409: 0000000036b43c28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5408: 0000000036b44c20 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi112ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5409: 0000000036b44c28 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi112ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5410: 00000000002b1c40 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi112ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5411: 00000000002b1d60 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi112ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5412: 0000000036b43c40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5413: 0000000036b43c48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5412: 0000000036b44c40 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi120ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5413: 0000000036b44c48 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi120ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5414: 00000000002b2200 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi120ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5415: 00000000002b2320 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi120ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n- 5416: 0000000036b43c60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n- 5417: 0000000036b43c68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5416: 0000000036b44c60 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi128ELi8ELb0EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n+ 5417: 0000000036b44c68 8 OBJECT LOCAL DEFAULT 21 _ZL9mul_mat_qIL9ggml_type8ELi128ELi8ELb1EEvPKcPKiS4_S4_PfS5_iiiiiiiiiiiiiiii\n 5418: 00000000002b27c0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi128ELi8ELb0EEvPKiS2_PfPKfiiiiiiii\n 5419: 00000000002b28e0 276 FUNC LOCAL DEFAULT 12 _ZL39__device_stub__mul_mat_q_stream_k_fixupIL9ggml_type8ELi128ELi8ELb1EEvPKiS2_PfPKfiiiiiiii\n 5420: 00000000002b2a00 3276 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5421: 0000000036b464e0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5422: 0000000036b45740 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5421: 0000000036b474e0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5422: 0000000036b46740 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5423: 00000000002b36d0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5424: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f16-instance-hs128-q4_0-q4_0.cu\n- 5425: 0000000036b43ca0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5426: 0000000036b43c80 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5427: 0000000036b43cb8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5428: 0000000036b43c98 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5429: 0000000036b43cd0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5430: 0000000036b43cb0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5431: 0000000036b43cc8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5432: 0000000036b43ce0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5425: 0000000036b44ca0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5426: 0000000036b44c80 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5427: 0000000036b44cb8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5428: 0000000036b44c98 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5429: 0000000036b44cd0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5430: 0000000036b44cb0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5431: 0000000036b44cc8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5432: 0000000036b44ce0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5433: 00000000002bdaf0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5434: 0000000036b43c88 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5435: 0000000036b43c90 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 5436: 0000000036af3e60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n+ 5434: 0000000036b44c88 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5435: 0000000036b44c90 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5436: 0000000036af4e60 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n 5437: 00000000002bddc0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5438: 00000000002bde60 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5439: 00000000002bdef0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5440: 00000000002be1c0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5441: 0000000036b43ca8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5442: 0000000036af3f34 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 5441: 0000000036b44ca8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5442: 0000000036af4f34 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n 5443: 00000000002be490 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5444: 00000000002be530 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5445: 00000000002be800 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5446: 0000000036b43cc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5447: 0000000036af4008 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 5446: 0000000036b44cc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5447: 0000000036af5008 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n 5448: 00000000002bead0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5449: 00000000002beb70 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5450: 00000000002bee40 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5451: 0000000036b43cd8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5451: 0000000036b44cd8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5452: 00000000002bf110 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5453: 00000000002bf1b0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5454: 00000000002bf480 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5455: 0000000036b464e8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5456: 0000000036b45758 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5455: 0000000036b474e8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5456: 0000000036b46758 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5457: 00000000002bf710 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5458: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f32-instance-hs128-q4_0-q4_0.cu\n- 5459: 0000000036b43d08 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5460: 0000000036b43ce8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5461: 0000000036b43d20 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5462: 0000000036b43d00 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5463: 0000000036b43d38 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5464: 0000000036b43d18 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5465: 0000000036b43d30 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5466: 0000000036b43d48 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5459: 0000000036b44d08 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5460: 0000000036b44ce8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5461: 0000000036b44d20 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5462: 0000000036b44d00 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5463: 0000000036b44d38 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5464: 0000000036b44d18 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5465: 0000000036b44d30 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5466: 0000000036b44d48 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5467: 00000000002c2ce0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5468: 0000000036b43cf0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5469: 0000000036b43cf8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5468: 0000000036b44cf0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5469: 0000000036b44cf8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5470: 00000000002c2fb0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5471: 00000000002c3050 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5472: 00000000002c30e0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5473: 00000000002c33b0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5474: 0000000036b43d10 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5474: 0000000036b44d10 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5475: 00000000002c3680 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5476: 00000000002c3720 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5477: 00000000002c39f0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5478: 0000000036b43d28 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5478: 0000000036b44d28 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5479: 00000000002c3cc0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5480: 00000000002c3d60 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5481: 00000000002c4030 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type2ELS0_2ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5482: 0000000036b43d40 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5482: 0000000036b44d40 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5483: 00000000002c4300 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5484: 00000000002c43a0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type2ELS0_2ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5485: 00000000002c4670 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5486: 0000000036b464f0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5487: 0000000036b45770 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5486: 0000000036b474f0 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5487: 0000000036b46770 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5488: 00000000002c4900 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5489: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f16-instance-hs128-q8_0-q8_0.cu\n- 5490: 0000000036b43d70 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5491: 0000000036b43d50 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5492: 0000000036b43d88 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5493: 0000000036b43d68 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5494: 0000000036b43da0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5495: 0000000036b43d80 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5496: 0000000036b43d98 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5497: 0000000036b43db0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5490: 0000000036b44d70 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5491: 0000000036b44d50 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5492: 0000000036b44d88 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5493: 0000000036b44d68 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5494: 0000000036b44da0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5495: 0000000036b44d80 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5496: 0000000036b44d98 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5497: 0000000036b44db0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5498: 00000000002c4b10 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5499: 0000000036b43d58 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5500: 0000000036b43d60 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5499: 0000000036b44d58 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5500: 0000000036b44d60 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5501: 00000000002c4de0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5502: 00000000002c4e80 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5503: 00000000002c4f10 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5504: 00000000002c51e0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5505: 0000000036b43d78 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5505: 0000000036b44d78 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5506: 00000000002c54b0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5507: 00000000002c5550 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5508: 00000000002c5820 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5509: 0000000036b43d90 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5509: 0000000036b44d90 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5510: 00000000002c5af0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5511: 00000000002c5b90 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5512: 00000000002c5e60 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5513: 0000000036b43da8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5513: 0000000036b44da8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5514: 00000000002c6130 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5515: 00000000002c61d0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5516: 00000000002c64a0 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5517: 0000000036b464f8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5518: 0000000036b45788 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5517: 0000000036b474f8 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5518: 0000000036b46788 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5519: 00000000002c6730 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5520: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f32-instance-hs128-q8_0-q8_0.cu\n- 5521: 0000000036b43dd8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5522: 0000000036b43db8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5523: 0000000036b43df0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5524: 0000000036b43dd0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5525: 0000000036b43e08 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5526: 0000000036b43de8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5527: 0000000036b43e00 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5528: 0000000036b43e18 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5521: 0000000036b44dd8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5522: 0000000036b44db8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5523: 0000000036b44df0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5524: 0000000036b44dd0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5525: 0000000036b44e08 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5526: 0000000036b44de8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5527: 0000000036b44e00 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5528: 0000000036b44e18 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5529: 00000000002c6960 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5530: 0000000036b43dc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5531: 0000000036b43dc8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5530: 0000000036b44dc0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5531: 0000000036b44dc8 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5532: 00000000002c6c30 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5533: 00000000002c6cd0 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5534: 00000000002c6d60 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5535: 00000000002c7030 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5536: 0000000036b43de0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5536: 0000000036b44de0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5537: 00000000002c7300 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5538: 00000000002c73a0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5539: 00000000002c7670 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5540: 0000000036b43df8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5540: 0000000036b44df8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5541: 00000000002c7940 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5542: 00000000002c79e0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5543: 00000000002c7cb0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type8ELS0_8ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5544: 0000000036b43e10 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5544: 0000000036b44e10 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5545: 00000000002c7f80 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5546: 00000000002c8020 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type8ELS0_8ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5547: 00000000002c82f0 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5548: 0000000036b46500 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5549: 0000000036b457a0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5548: 0000000036b47500 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5549: 0000000036b467a0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5550: 00000000002c8580 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5551: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f16-instance-hs128-f16-f16.cu\n- 5552: 0000000036b43e40 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5553: 0000000036b43e20 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5554: 0000000036b43e58 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5555: 0000000036b43e38 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5556: 0000000036b43e70 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5557: 0000000036b43e50 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5558: 0000000036b43e68 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5559: 0000000036b43e80 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5552: 0000000036b44e40 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5553: 0000000036b44e20 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5554: 0000000036b44e58 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5555: 0000000036b44e38 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5556: 0000000036b44e70 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5557: 0000000036b44e50 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5558: 0000000036b44e68 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5559: 0000000036b44e80 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5560: 00000000002c8790 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5561: 0000000036b43e28 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5562: 0000000036b43e30 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5561: 0000000036b44e28 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5562: 0000000036b44e30 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5563: 00000000002c8a60 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5564: 00000000002c8b00 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5565: 00000000002c8b90 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5566: 00000000002c8e60 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5567: 0000000036b43e48 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5567: 0000000036b44e48 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5568: 00000000002c9130 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5569: 00000000002c91d0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5570: 00000000002c94a0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5571: 0000000036b43e60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5571: 0000000036b44e60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5572: 00000000002c9770 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5573: 00000000002c9810 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5574: 00000000002c9ae0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5575: 0000000036b43e78 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5575: 0000000036b44e78 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5576: 00000000002c9db0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5577: 00000000002c9e50 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi128ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5578: 00000000002ca120 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5579: 0000000036b46508 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5580: 0000000036b457b8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5579: 0000000036b47508 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5580: 0000000036b467b8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5581: 00000000002ca3b0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5582: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f16-instance-hs256-f16-f16.cu\n- 5583: 0000000036b43ea8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5584: 0000000036b43e88 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5585: 0000000036b43ec0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5586: 0000000036b43ea0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5587: 0000000036b43ed8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5588: 0000000036b43eb8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5589: 0000000036b43ed0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5590: 0000000036b43ee8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5583: 0000000036b44ea8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5584: 0000000036b44e88 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5585: 0000000036b44ec0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5586: 0000000036b44ea0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5587: 0000000036b44ed8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5588: 0000000036b44eb8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5589: 0000000036b44ed0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5590: 0000000036b44ee8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi256ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5591: 00000000002ca5e0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5592: 0000000036b43e90 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5593: 0000000036b43e98 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 5594: 0000000036af40dc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n+ 5592: 0000000036b44e90 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5593: 0000000036b44e98 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5594: 0000000036af50dc 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n 5595: 00000000002ca8b0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5596: 00000000002ca950 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5597: 00000000002ca9e0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5598: 00000000002cacb0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5599: 0000000036b43eb0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5600: 0000000036af41b0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 5599: 0000000036b44eb0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5600: 0000000036af51b0 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n 5601: 00000000002caf80 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5602: 00000000002cb020 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5603: 00000000002cb2f0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5604: 0000000036b43ec8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5605: 0000000036af4284 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 5604: 0000000036b44ec8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5605: 0000000036af5284 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n 5606: 00000000002cb5c0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5607: 00000000002cb660 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5608: 00000000002cb930 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5609: 0000000036b43ee0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5609: 0000000036b44ee0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5610: 00000000002cbc00 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5611: 00000000002cbca0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi256ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5612: 00000000002cbf70 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5613: 0000000036b46510 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5614: 0000000036b457d0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5613: 0000000036b47510 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5614: 0000000036b467d0 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5615: 00000000002cc200 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5616: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f16-instance-hs64-f16-f16.cu\n- 5617: 0000000036b43f10 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5618: 0000000036b43ef0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5619: 0000000036b43f28 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5620: 0000000036b43f08 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5621: 0000000036b43f40 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5622: 0000000036b43f20 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5623: 0000000036b43f38 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5624: 0000000036b43f50 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5617: 0000000036b44f10 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5618: 0000000036b44ef0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5619: 0000000036b44f28 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5620: 0000000036b44f08 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5621: 0000000036b44f40 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5622: 0000000036b44f20 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5623: 0000000036b44f38 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5624: 0000000036b44f50 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f16ILi64ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5625: 00000000002cf7d0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5626: 0000000036b43ef8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5627: 0000000036b43f00 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n- 5628: 0000000036af4358 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n+ 5626: 0000000036b44ef8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5627: 0000000036b44f00 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5628: 0000000036af5358 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table2\n 5629: 00000000002cfaa0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5630: 00000000002cfb40 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5631: 00000000002cfbd0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5632: 00000000002cfea0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5633: 0000000036b43f18 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5634: 0000000036af442c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n+ 5633: 0000000036b44f18 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5634: 0000000036af542c 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table11\n 5635: 00000000002d0170 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5636: 00000000002d0210 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5637: 00000000002d04e0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5638: 0000000036b43f30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5639: 0000000036af4500 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n+ 5638: 0000000036b44f30 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5639: 0000000036af5500 0 NOTYPE LOCAL DEFAULT 17 GCC_except_table15\n 5640: 00000000002d07b0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5641: 00000000002d0850 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5642: 00000000002d0b20 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5643: 0000000036b43f48 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5643: 0000000036b44f48 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5644: 00000000002d0df0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5645: 00000000002d0e90 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f16ILi64ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5646: 00000000002d1160 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5647: 0000000036b46518 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5648: 0000000036b457e8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5647: 0000000036b47518 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5648: 0000000036b467e8 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5649: 00000000002d13f0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5650: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f32-instance-hs128-f16-f16.cu\n- 5651: 0000000036b43f78 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5652: 0000000036b43f58 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5653: 0000000036b43f90 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5654: 0000000036b43f70 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5655: 0000000036b43fa8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5656: 0000000036b43f88 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5657: 0000000036b43fa0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5658: 0000000036b43fb8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5651: 0000000036b44f78 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5652: 0000000036b44f58 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5653: 0000000036b44f90 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5654: 0000000036b44f70 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5655: 0000000036b44fa8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5656: 0000000036b44f88 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5657: 0000000036b44fa0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5658: 0000000036b44fb8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5659: 00000000002d49c0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5660: 0000000036b43f60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5661: 0000000036b43f68 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5660: 0000000036b44f60 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5661: 0000000036b44f68 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5662: 00000000002d4c90 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5663: 00000000002d4d30 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi128EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5664: 00000000002d4dc0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5665: 00000000002d5090 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5666: 0000000036b43f80 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5666: 0000000036b44f80 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5667: 00000000002d5360 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5668: 00000000002d5400 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5669: 00000000002d56d0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5670: 0000000036b43f98 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5670: 0000000036b44f98 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5671: 00000000002d59a0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5672: 00000000002d5a40 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5673: 00000000002d5d10 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5674: 0000000036b43fb0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5674: 0000000036b44fb0 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5675: 00000000002d5fe0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi128ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5676: 00000000002d6080 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi128ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5677: 00000000002d6350 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5678: 0000000036b46520 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5679: 0000000036b45800 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5678: 0000000036b47520 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5679: 0000000036b46800 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5680: 00000000002d65e0 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5681: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f32-instance-hs256-f16-f16.cu\n- 5682: 0000000036b43fe0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5683: 0000000036b43fc0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5684: 0000000036b43ff8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5685: 0000000036b43fd8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5686: 0000000036b44010 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5687: 0000000036b43ff0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5688: 0000000036b44008 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5689: 0000000036b44020 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5682: 0000000036b44fe0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5683: 0000000036b44fc0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5684: 0000000036b44ff8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5685: 0000000036b44fd8 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5686: 0000000036b45010 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5687: 0000000036b44ff0 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5688: 0000000036b45008 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5689: 0000000036b45020 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi256ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5690: 00000000002d67f0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5691: 0000000036b43fc8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5692: 0000000036b43fd0 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5691: 0000000036b44fc8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5692: 0000000036b44fd0 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5693: 00000000002d6ac0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5694: 00000000002d6b60 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi256EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5695: 00000000002d6bf0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5696: 00000000002d6ec0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5697: 0000000036b43fe8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5697: 0000000036b44fe8 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5698: 00000000002d7190 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5699: 00000000002d7230 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5700: 00000000002d7500 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5701: 0000000036b44000 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5701: 0000000036b45000 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5702: 00000000002d77d0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5703: 00000000002d7870 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5704: 00000000002d7b40 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5705: 0000000036b44018 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5705: 0000000036b45018 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5706: 00000000002d7e10 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi256ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5707: 00000000002d7eb0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi256ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5708: 00000000002d8180 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5709: 0000000036b46528 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5710: 0000000036b45818 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5709: 0000000036b47528 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5710: 0000000036b46818 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5711: 00000000002d8410 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5712: 0000000000000000 0 FILE LOCAL DEFAULT ABS fattn-vec-f32-instance-hs64-f16-f16.cu\n- 5713: 0000000036b44048 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5714: 0000000036b44028 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5715: 0000000036b44060 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5716: 0000000036b44040 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5717: 0000000036b44078 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5718: 0000000036b44058 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5719: 0000000036b44070 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5720: 0000000036b44088 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5713: 0000000036b45048 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5714: 0000000036b45028 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5715: 0000000036b45060 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5716: 0000000036b45040 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5717: 0000000036b45078 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5718: 0000000036b45058 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5719: 0000000036b45070 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n+ 5720: 0000000036b45088 8 OBJECT LOCAL DEFAULT 21 _ZL22flash_attn_vec_ext_f32ILi64ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5721: 00000000002d8620 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi1EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5722: 0000000036b44030 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n- 5723: 0000000036b44038 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n+ 5722: 0000000036b45030 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5723: 0000000036b45038 8 OBJECT LOCAL DEFAULT 21 _ZL26flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5724: 00000000002d88f0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi1ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5725: 00000000002d8990 140 FUNC LOCAL DEFAULT 12 _ZL41__device_stub__flash_attn_combine_resultsILi64EEvPKfPK15HIP_vector_typeIfLj2EEPfi\n 5726: 00000000002d8a20 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi1EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5727: 00000000002d8cf0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi2EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5728: 0000000036b44050 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5728: 0000000036b45050 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5729: 00000000002d8fc0 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi2ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5730: 00000000002d9060 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi2EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5731: 00000000002d9330 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi4EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5732: 0000000036b44068 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5732: 0000000036b45068 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5733: 00000000002d9600 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi4ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5734: 00000000002d96a0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi4EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5735: 00000000002d9970 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi8EL9ggml_type1ELS0_1ELb0EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n- 5736: 0000000036b44080 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n+ 5736: 0000000036b45080 8 OBJECT LOCAL DEFAULT 21 _ZL25flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5737: 00000000002d9c40 154 FUNC LOCAL DEFAULT 12 _ZL40__device_stub__flash_attn_stream_k_fixupILi64ELi8ELi1EEvPfPK15HIP_vector_typeIfLj2EEiii\n 5738: 00000000002d9ce0 706 FUNC LOCAL DEFAULT 12 _ZL37__device_stub__flash_attn_vec_ext_f32ILi64ELi8EL9ggml_type1ELS0_1ELb1EEvPKcS2_S2_S2_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiii\n 5739: 00000000002d9fb0 654 FUNC LOCAL DEFAULT 12 __hip_module_ctor\n- 5740: 0000000036b46530 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n- 5741: 0000000036b45830 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n+ 5740: 0000000036b47530 8 OBJECT LOCAL DEFAULT 26 __hip_gpubin_handle\n+ 5741: 0000000036b46830 24 OBJECT LOCAL DEFAULT 25 __hip_fatbin_wrapper\n 5742: 00000000002da240 34 FUNC LOCAL DEFAULT 12 __hip_module_dtor\n 5743: 0000000000000000 0 FILE LOCAL DEFAULT ABS crtend.c\n 5744: 0000000000000000 0 FILE LOCAL DEFAULT ABS \n- 5745: 0000000036b45008 8 OBJECT LOCAL DEFAULT 24 DW.ref.__gxx_personality_v0\n- 5746: 0000000036ae3d18 0 NOTYPE LOCAL DEFAULT 16 __GNU_EH_FRAME_HDR\n+ 5745: 0000000036b46008 8 OBJECT LOCAL DEFAULT 24 DW.ref.__gxx_personality_v0\n+ 5746: 0000000036ae4d18 0 NOTYPE LOCAL DEFAULT 16 __GNU_EH_FRAME_HDR\n 5747: 00000000002da570 0 FUNC LOCAL DEFAULT 13 _fini\n- 5748: 0000000036b442d0 0 OBJECT LOCAL DEFAULT 23 _GLOBAL_OFFSET_TABLE_\n+ 5748: 0000000036b452d0 0 OBJECT LOCAL DEFAULT 23 _GLOBAL_OFFSET_TABLE_\n 5749: 0000000000040230 11 FUNC LOCAL DEFAULT 12 __clang_call_terminate\n 5750: 00000000002da560 14 FUNC LOCAL DEFAULT 12 atexit\n 5751: 00000000002da550 9 FUNC LOCAL DEFAULT 12 __gnu_f2h_ieee\n- 5752: 0000000036b45000 8 OBJECT LOCAL DEFAULT 24 __dso_handle\n+ 5752: 0000000036b46000 8 OBJECT LOCAL DEFAULT 24 __dso_handle\n 5753: 00000000002da450 242 FUNC LOCAL DEFAULT 12 __truncsfhf2\n- 5754: 0000000036b3ecc4 4 OBJECT LOCAL DEFAULT 18 __EH_FRAME_LIST_END__\n- 5755: 0000000036b44090 0 OBJECT LOCAL DEFAULT 22 _DYNAMIC\n+ 5754: 0000000036b3fcc4 4 OBJECT LOCAL DEFAULT 18 __EH_FRAME_LIST_END__\n+ 5755: 0000000036b45090 0 OBJECT LOCAL DEFAULT 22 _DYNAMIC\n 5756: 0000000000022000 0 FUNC LOCAL DEFAULT 9 _init\n 5757: 0000000000111cd0 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi96ELi96ELi16ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 5758: 0000000000065830 79 FUNC GLOBAL DEFAULT 12 ggml_backend_cuda_get_device_memory\n 5759: 0000000000024b50 4705 FUNC GLOBAL DEFAULT 12 _Z19ggml_cuda_op_repeatR25ggml_backend_cuda_contextP11ggml_tensor\n 5760: 0000000000000000 0 FUNC GLOBAL DEFAULT UND hipMalloc@hip_4.2\n 5761: 0000000000000000 0 FUNC GLOBAL DEFAULT UND hipStreamSynchronize@hip_4.2\n 5762: 000000000007cb50 36 FUNC WEAK DEFAULT 12 _ZN20ggml_cuda_pool_allocIcED2Ev\n@@ -5781,15 +5781,15 @@\n 5777: 0000000000146870 127 FUNC WEAK DEFAULT 12 _Z37ggml_cuda_flash_attn_ext_mma_f16_caseILi80ELi80ELi4ELi2EEvR25ggml_backend_cuda_contextP11ggml_tensor\n 5778: 00000000000446e0 4406 FUNC WEAK DEFAULT 12 _Z12launch_fattnILi64ELi32ELi1EEvR25ggml_backend_cuda_contextP11ggml_tensorPFvPKcS5_S5_S5_PfP15HIP_vector_typeIfLj2EEffffjfiiiiiiiiiiiiiiiiiiiiiiiiiEimibbbi\n 5779: 0000000000000000 0 FUNC GLOBAL DEFAULT UND hipLaunchKernel@hip_4.2\n 5780: 0000000000000000 0 FUNC GLOBAL DEFAULT UND hipOccupancyMaxActiveBlocksPerMultiprocessor@hip_4.2\n 5781: 00000000000fd060 1667 FUNC GLOBAL DEFAULT 12 _Z20ggml_cuda_op_upscaleR25ggml_backend_cuda_contextP11ggml_tensor\n 5782: 0000000000000000 0 FUNC GLOBAL DEFAULT UND hipblasCreate\n 5783: 0000000000000000 0 FUNC GLOBAL DEFAULT UND memset@GLIBC_2.2.5\n- 5784: 0000000036b46300 2 OBJECT WEAK DEFAULT 26 _ZZN22batched_mul_mat_traitsIL9ggml_type1EE9get_alphaEvE3val\n+ 5784: 0000000036b47300 2 OBJECT WEAK DEFAULT 26 _ZZN22batched_mul_mat_traitsIL9ggml_type1EE9get_alphaEvE3val\n 5785: 0000000000166750 4406 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