Wed Mar 12 00:10:58 UTC 2025 I: starting to build osmo-pcu/unstable/amd64 on jenkins on '2025-03-12 00:10' Wed Mar 12 00:10:58 UTC 2025 I: The jenkins build log is/was available at https://jenkins.debian.net/userContent/reproducible/debian/build_service/amd64_2/34077/console.log Wed Mar 12 00:10:58 UTC 2025 I: Downloading source for unstable/osmo-pcu=1.5.1-1 --2025-03-12 00:10:58-- http://deb.debian.org/debian/pool/main/o/osmo-pcu/osmo-pcu_1.5.1-1.dsc Connecting to 46.16.76.132:3128... connected. Proxy request sent, awaiting response... 200 OK Length: 2280 (2.2K) [text/prs.lines.tag] Saving to: ‘osmo-pcu_1.5.1-1.dsc’ 0K .. 100% 313M=0s 2025-03-12 00:10:58 (313 MB/s) - ‘osmo-pcu_1.5.1-1.dsc’ saved [2280/2280] Wed Mar 12 00:10:58 UTC 2025 I: osmo-pcu_1.5.1-1.dsc -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA512 Format: 3.0 (quilt) Source: osmo-pcu Binary: osmo-pcu Architecture: any Version: 1.5.1-1 Maintainer: Debian Mobcom Maintainers Uploaders: Thorsten Alteholz , Ruben Undheim , Nate Doris Homepage: http://osmocom.org/projects/osmopcu Standards-Version: 4.7.0 Vcs-Browser: https://salsa.debian.org/debian-mobcom-team/osmo-pcu Vcs-Git: https://salsa.debian.org/debian-mobcom-team/osmo-pcu.git Testsuite: autopkgtest Build-Depends: debhelper-compat (= 13), pkgconf, libosmocore-dev (>= 1.9.0), architecture-is-64-bit, libmnl-dev, help2man Package-List: osmo-pcu deb net optional arch=any Checksums-Sha1: f71141c7dc4a3a0a2647753013cc255ac9dc022c 409992 osmo-pcu_1.5.1.orig.tar.xz 450d5163481ff133eaabb1aa4a885d3bd2383abe 6768 osmo-pcu_1.5.1-1.debian.tar.xz Checksums-Sha256: 192323a15ee45e546ca14ddd4aa99f52f3d51be83ddc5380c9ae902482d41aea 409992 osmo-pcu_1.5.1.orig.tar.xz 916210fd934975b87b5b2ac7792414479549891187e8505d90993b55c1b07cc0 6768 osmo-pcu_1.5.1-1.debian.tar.xz Files: 7e53ca3d6d3ee4d572e1104e027d741b 409992 osmo-pcu_1.5.1.orig.tar.xz 33906a87387011fd4da9da06a11a665e 6768 osmo-pcu_1.5.1-1.debian.tar.xz -----BEGIN PGP SIGNATURE----- iQKnBAEBCgCRFiEEYgH7/9u94Hgi6ruWlvysDTh7WEcFAmfQhIBfFIAAAAAALgAo aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldDYy MDFGQkZGREJCREUwNzgyMkVBQkI5Njk2RkNBQzBEMzg3QjU4NDcTHGRlYmlhbkBh bHRlaG9sei5kZQAKCRCW/KwNOHtYR+5EEACl+naTA3QzWiIGoJRdDzX81o/kYHvo 2Zg4Zqv1ac+6Zi63M1dZmHn4X76pHpZXnfV0jbJt1OxBgMMSB3xjF0BaoQtDbSlx I4ravATuyWmZeEm968qCo1F2cfv3op8kWW2Bmwn4445vwVNejLY0e77RBQU/6flC MtV6lOZvfEDRUUI4zuCNpot9iXYnuj2cSCaLlI8soE0MqCHCB2M5iDmhlodnkThX RBbETfwDwpSZncrJpqQReuR/91AsnW5yo9IYjx9gSZi7KiHc3FsBcehIonkhrt5W 5TNTf7ie+lPV4YvYsOJgXfyQCbEZAsCEfi+4LyD5ACE7ttmJ9JHfAMQJI4kqV6Na cI6IFfzk6MCb9VMpsaOQvchFhql+A4lj1e3u2MT4D66Ynea0u/SuSWqLMO2J6Cvg gSFEpkxfKDR9fvZOBXGaYEU1aOZPHxNbUvkJTKNa6O6fC5y7I9i0DJcNWalanVaP jzip5L98lE4WUcw+0FlgNqqXQWCWqwfawaHkfHT2MVYCeDxkmFNSmuNeKC0k2yM8 Fm+48W5KVUeKxvHMNLpNWcyBstKCvjKYjzGDiDo5IG1F2uOJ/XWoiKLUaJR9aN1x mJJOgFNiXCrh/ocG0zMkJc1Bn+meb9VwRqbqZsWBPNR8DUXI0jNh7xC5qIusdhNU nxP3HUGL8O2h0w== =Wsy4 -----END PGP SIGNATURE----- Wed Mar 12 00:10:58 UTC 2025 I: Checking whether the package is not for us Wed Mar 12 00:10:58 UTC 2025 I: Starting 1st build on remote node ionos5-amd64.debian.net. Wed Mar 12 00:10:58 UTC 2025 I: Preparing to do remote build '1' on ionos5-amd64.debian.net. Wed Mar 12 00:12:38 UTC 2025 I: Deleting $TMPDIR on ionos5-amd64.debian.net. I: pbuilder: network access will be disabled during build I: Current time: Mon Apr 13 18:33:56 -12 2026 I: pbuilder-time-stamp: 1776148436 I: Building the build Environment I: extracting base tarball [/var/cache/pbuilder/unstable-reproducible-base.tgz] I: copying local configuration W: --override-config is not set; not updating apt.conf Read the manpage for details. I: mounting /proc filesystem I: mounting /sys filesystem I: creating /{dev,run}/shm I: mounting /dev/pts filesystem I: redirecting /dev/ptmx to /dev/pts/ptmx I: policy-rc.d already exists I: Copying source file I: copying [osmo-pcu_1.5.1-1.dsc] I: copying [./osmo-pcu_1.5.1.orig.tar.xz] I: copying [./osmo-pcu_1.5.1-1.debian.tar.xz] I: Extracting source dpkg-source: warning: cannot verify inline signature for ./osmo-pcu_1.5.1-1.dsc: unsupported subcommand dpkg-source: info: extracting osmo-pcu in osmo-pcu-1.5.1 dpkg-source: info: unpacking osmo-pcu_1.5.1.orig.tar.xz dpkg-source: info: unpacking osmo-pcu_1.5.1-1.debian.tar.xz dpkg-source: info: using patch list from debian/patches/series dpkg-source: info: applying osmo-pcu-manual-page.patch dpkg-source: info: applying Setting-library-version-explicitly.patch dpkg-source: info: applying spelling.patch dpkg-source: info: applying autotools-pkg-config-macro-not-cross-compilation-safe.patch dpkg-source: info: applying repeated-path-segment.patch I: Not using root during the build. I: Installing the build-deps I: user script /srv/workspace/pbuilder/1970829/tmp/hooks/D02_print_environment starting I: set BUILDDIR='/build/reproducible-path' BUILDUSERGECOS='first user,first room,first work-phone,first home-phone,first other' BUILDUSERNAME='pbuilder1' BUILD_ARCH='amd64' DEBIAN_FRONTEND='noninteractive' DEB_BUILD_OPTIONS='buildinfo=+all reproducible=+all parallel=42 ' DISTRIBUTION='unstable' HOME='/root' HOST_ARCH='amd64' IFS=' ' INVOCATION_ID='4f2193cc7c4d4b059ae18f06d5aff5e5' LANG='C' LANGUAGE='en_US:en' LC_ALL='C' MAIL='/var/mail/root' OPTIND='1' PATH='/usr/sbin:/usr/bin:/sbin:/bin:/usr/games' PBCURRENTCOMMANDLINEOPERATION='build' PBUILDER_OPERATION='build' PBUILDER_PKGDATADIR='/usr/share/pbuilder' PBUILDER_PKGLIBDIR='/usr/lib/pbuilder' PBUILDER_SYSCONFDIR='/etc' PPID='1970829' PS1='# ' PS2='> ' PS4='+ ' PWD='/' SHELL='/bin/bash' SHLVL='2' SUDO_COMMAND='/usr/bin/timeout -k 18.1h 18h /usr/bin/ionice -c 3 /usr/bin/nice /usr/sbin/pbuilder --build --configfile /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/pbuilderrc_DK1i --distribution unstable --hookdir /etc/pbuilder/first-build-hooks --debbuildopts -b --basetgz /var/cache/pbuilder/unstable-reproducible-base.tgz --buildresult /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/b1 --logfile b1/build.log osmo-pcu_1.5.1-1.dsc' SUDO_GID='110' SUDO_UID='105' SUDO_USER='jenkins' TERM='unknown' TZ='/usr/share/zoneinfo/Etc/GMT+12' USER='root' _='/usr/bin/systemd-run' http_proxy='http://213.165.73.152:3128' I: uname -a Linux ionos5-amd64 6.12.12+bpo-amd64 #1 SMP PREEMPT_DYNAMIC Debian 6.12.12-1~bpo12+1 (2025-02-23) x86_64 GNU/Linux I: ls -l /bin lrwxrwxrwx 1 root root 7 Mar 4 2025 /bin -> usr/bin I: user script /srv/workspace/pbuilder/1970829/tmp/hooks/D02_print_environment finished -> Attempting to satisfy build-dependencies -> Creating pbuilder-satisfydepends-dummy package Package: pbuilder-satisfydepends-dummy Version: 0.invalid.0 Architecture: amd64 Maintainer: Debian Pbuilder Team Description: Dummy package to satisfy dependencies with aptitude - created by pbuilder This package was created automatically by pbuilder to satisfy the build-dependencies of the package being currently built. Depends: debhelper-compat (= 13), pkgconf, libosmocore-dev (>= 1.9.0), architecture-is-64-bit, libmnl-dev, help2man dpkg-deb: building package 'pbuilder-satisfydepends-dummy' in '/tmp/satisfydepends-aptitude/pbuilder-satisfydepends-dummy.deb'. Selecting previously unselected package pbuilder-satisfydepends-dummy. (Reading database ... 19783 files and directories currently installed.) Preparing to unpack .../pbuilder-satisfydepends-dummy.deb ... Unpacking pbuilder-satisfydepends-dummy (0.invalid.0) ... dpkg: pbuilder-satisfydepends-dummy: dependency problems, but configuring anyway as you requested: pbuilder-satisfydepends-dummy depends on debhelper-compat (= 13); however: Package debhelper-compat is not installed. pbuilder-satisfydepends-dummy depends on pkgconf; however: Package pkgconf is not installed. pbuilder-satisfydepends-dummy depends on libosmocore-dev (>= 1.9.0); however: Package libosmocore-dev is not installed. pbuilder-satisfydepends-dummy depends on architecture-is-64-bit; however: Package architecture-is-64-bit is not installed. pbuilder-satisfydepends-dummy depends on libmnl-dev; however: Package libmnl-dev is not installed. pbuilder-satisfydepends-dummy depends on help2man; however: Package help2man is not installed. Setting up pbuilder-satisfydepends-dummy (0.invalid.0) ... Reading package lists... Building dependency tree... Reading state information... Initializing package states... Writing extended state information... Building tag database... pbuilder-satisfydepends-dummy is already installed at the requested version (0.invalid.0) pbuilder-satisfydepends-dummy is already installed at the requested version (0.invalid.0) The following NEW packages will be installed: architecture-properties{a} autoconf{a} automake{a} autopoint{a} autotools-dev{a} bsdextrautils{a} debhelper{a} dh-autoreconf{a} dh-strip-nondeterminism{a} dwz{a} file{a} gettext{a} gettext-base{a} groff-base{a} help2man{a} intltool-debian{a} libarchive-zip-perl{a} libdebhelper-perl{a} libelf1t64{a} libffi8{a} libfile-stripnondeterminism-perl{a} libgnutls30t64{a} libicu72{a} libidn2-0{a} liblocale-gettext-perl{a} libmagic-mgc{a} libmagic1t64{a} libmnl-dev{a} libmnl0{a} libosmocodec4{a} libosmocoding0{a} libosmocore-dev{a} libosmocore22{a} libosmoctrl0{a} libosmogb14{a} libosmogsm20{a} libosmoisdn0{a} libosmosim2{a} libosmovty13{a} libp11-kit0{a} libpcsclite1{a} libpipeline1{a} libpkgconf3{a} libsctp-dev{a} libsctp1{a} libtalloc-dev{a} libtalloc2{a} libtasn1-6{a} libtool{a} libuchardet0{a} libunistring5{a} liburing2{a} libxml2{a} m4{a} man-db{a} pkgconf{a} pkgconf-bin{a} po-debconf{a} sensible-utils{a} The following packages are RECOMMENDED but will NOT be installed: curl libarchive-cpio-perl libltdl-dev libmail-sendmail-perl lynx wget 0 packages upgraded, 59 newly installed, 0 to remove and 0 not upgraded. Need to get 24.2 MB of archives. After unpacking 89.4 MB will be used. Writing extended state information... Get: 1 http://deb.debian.org/debian unstable/main amd64 liblocale-gettext-perl amd64 1.07-7+b1 [15.3 kB] Get: 2 http://deb.debian.org/debian unstable/main amd64 sensible-utils all 0.0.24 [24.8 kB] Get: 3 http://deb.debian.org/debian unstable/main amd64 libmagic-mgc amd64 1:5.45-3+b1 [314 kB] Get: 4 http://deb.debian.org/debian unstable/main amd64 libmagic1t64 amd64 1:5.45-3+b1 [108 kB] Get: 5 http://deb.debian.org/debian unstable/main amd64 file amd64 1:5.45-3+b1 [43.3 kB] Get: 6 http://deb.debian.org/debian unstable/main amd64 gettext-base amd64 0.23.1-1 [243 kB] Get: 7 http://deb.debian.org/debian unstable/main amd64 libuchardet0 amd64 0.0.8-1+b2 [68.9 kB] Get: 8 http://deb.debian.org/debian unstable/main amd64 groff-base amd64 1.23.0-7 [1185 kB] Get: 9 http://deb.debian.org/debian unstable/main amd64 bsdextrautils amd64 2.40.4-5 [92.4 kB] Get: 10 http://deb.debian.org/debian unstable/main amd64 libpipeline1 amd64 1.5.8-1 [42.0 kB] Get: 11 http://deb.debian.org/debian unstable/main amd64 man-db amd64 2.13.0-1 [1420 kB] Get: 12 http://deb.debian.org/debian unstable/main amd64 architecture-properties amd64 0.2.6 [2336 B] Get: 13 http://deb.debian.org/debian unstable/main amd64 m4 amd64 1.4.19-7 [294 kB] Get: 14 http://deb.debian.org/debian unstable/main amd64 autoconf all 2.72-3 [493 kB] Get: 15 http://deb.debian.org/debian unstable/main amd64 autotools-dev all 20220109.1 [51.6 kB] Get: 16 http://deb.debian.org/debian unstable/main amd64 automake all 1:1.17-3 [862 kB] Get: 17 http://deb.debian.org/debian unstable/main amd64 autopoint all 0.23.1-1 [770 kB] Get: 18 http://deb.debian.org/debian unstable/main amd64 libdebhelper-perl all 13.24.1 [90.9 kB] Get: 19 http://deb.debian.org/debian unstable/main amd64 libtool all 2.5.4-4 [539 kB] Get: 20 http://deb.debian.org/debian unstable/main amd64 dh-autoreconf all 20 [17.1 kB] Get: 21 http://deb.debian.org/debian unstable/main amd64 libarchive-zip-perl all 1.68-1 [104 kB] Get: 22 http://deb.debian.org/debian unstable/main amd64 libfile-stripnondeterminism-perl all 1.14.1-2 [19.7 kB] Get: 23 http://deb.debian.org/debian unstable/main amd64 dh-strip-nondeterminism all 1.14.1-2 [8620 B] Get: 24 http://deb.debian.org/debian unstable/main amd64 libelf1t64 amd64 0.192-4 [189 kB] Get: 25 http://deb.debian.org/debian unstable/main amd64 dwz amd64 0.15-1+b1 [110 kB] Get: 26 http://deb.debian.org/debian unstable/main amd64 libunistring5 amd64 1.3-1 [476 kB] Get: 27 http://deb.debian.org/debian unstable/main amd64 libicu72 amd64 72.1-6 [9421 kB] Get: 28 http://deb.debian.org/debian unstable/main amd64 libxml2 amd64 2.12.7+dfsg+really2.9.14-0.2+b2 [699 kB] Get: 29 http://deb.debian.org/debian unstable/main amd64 gettext amd64 0.23.1-1 [1680 kB] Get: 30 http://deb.debian.org/debian unstable/main amd64 intltool-debian all 0.35.0+20060710.6 [22.9 kB] Get: 31 http://deb.debian.org/debian unstable/main amd64 po-debconf all 1.0.21+nmu1 [248 kB] Get: 32 http://deb.debian.org/debian unstable/main amd64 debhelper all 13.24.1 [920 kB] Get: 33 http://deb.debian.org/debian unstable/main amd64 help2man amd64 1.49.3 [198 kB] Get: 34 http://deb.debian.org/debian unstable/main amd64 libffi8 amd64 3.4.7-1 [23.9 kB] Get: 35 http://deb.debian.org/debian unstable/main amd64 libidn2-0 amd64 2.3.8-1 [109 kB] Get: 36 http://deb.debian.org/debian unstable/main amd64 libp11-kit0 amd64 0.25.5-3 [425 kB] Get: 37 http://deb.debian.org/debian unstable/main amd64 libtasn1-6 amd64 4.20.0-2 [49.9 kB] Get: 38 http://deb.debian.org/debian unstable/main amd64 libgnutls30t64 amd64 3.8.9-2 [1464 kB] Get: 39 http://deb.debian.org/debian unstable/main amd64 libmnl0 amd64 1.0.5-3 [11.9 kB] Get: 40 http://deb.debian.org/debian unstable/main amd64 libmnl-dev amd64 1.0.5-3 [23.2 kB] Get: 41 http://deb.debian.org/debian unstable/main amd64 libsctp1 amd64 1.0.21+dfsg-1 [25.8 kB] Get: 42 http://deb.debian.org/debian unstable/main amd64 libtalloc2 amd64 2:2.4.3+samba4.22.0+dfsg-1 [58.6 kB] Get: 43 http://deb.debian.org/debian unstable/main amd64 liburing2 amd64 2.9-1 [26.4 kB] Get: 44 http://deb.debian.org/debian unstable/main amd64 libosmocore22 amd64 1.11.0-2 [148 kB] Get: 45 http://deb.debian.org/debian unstable/main amd64 libosmocodec4 amd64 1.11.0-2 [24.3 kB] Get: 46 http://deb.debian.org/debian unstable/main amd64 libosmoisdn0 amd64 1.11.0-2 [43.5 kB] Get: 47 http://deb.debian.org/debian unstable/main amd64 libosmogsm20 amd64 1.11.0-2 [204 kB] Get: 48 http://deb.debian.org/debian unstable/main amd64 libosmocoding0 amd64 1.11.0-2 [43.8 kB] Get: 49 http://deb.debian.org/debian unstable/main amd64 libosmovty13 amd64 1.11.0-2 [77.6 kB] Get: 50 http://deb.debian.org/debian unstable/main amd64 libosmogb14 amd64 1.11.0-2 [151 kB] Get: 51 http://deb.debian.org/debian unstable/main amd64 libosmoctrl0 amd64 1.11.0-2 [32.8 kB] Get: 52 http://deb.debian.org/debian unstable/main amd64 libpcsclite1 amd64 2.3.1-1 [56.0 kB] Get: 53 http://deb.debian.org/debian unstable/main amd64 libosmosim2 amd64 1.11.0-2 [36.6 kB] Get: 54 http://deb.debian.org/debian unstable/main amd64 libtalloc-dev amd64 2:2.4.3+samba4.22.0+dfsg-1 [70.0 kB] Get: 55 http://deb.debian.org/debian unstable/main amd64 libsctp-dev amd64 1.0.21+dfsg-1 [74.2 kB] Get: 56 http://deb.debian.org/debian unstable/main amd64 libosmocore-dev amd64 1.11.0-2 [203 kB] Get: 57 http://deb.debian.org/debian unstable/main amd64 libpkgconf3 amd64 1.8.1-4 [36.4 kB] Get: 58 http://deb.debian.org/debian unstable/main amd64 pkgconf-bin amd64 1.8.1-4 [30.2 kB] Get: 59 http://deb.debian.org/debian unstable/main amd64 pkgconf amd64 1.8.1-4 [26.2 kB] Fetched 24.2 MB in 1s (46.8 MB/s) Preconfiguring packages ... Selecting previously unselected package liblocale-gettext-perl. (Reading database ... (Reading database ... 5% (Reading database ... 10% (Reading database ... 15% (Reading database ... 20% (Reading database ... 25% (Reading database ... 30% (Reading database ... 35% (Reading database ... 40% (Reading database ... 45% (Reading database ... 50% (Reading database ... 55% (Reading database ... 60% (Reading database ... 65% (Reading database ... 70% (Reading database ... 75% (Reading database ... 80% (Reading database ... 85% (Reading database ... 90% (Reading database ... 95% (Reading database ... 100% (Reading database ... 19783 files and directories currently installed.) Preparing to unpack .../00-liblocale-gettext-perl_1.07-7+b1_amd64.deb ... Unpacking liblocale-gettext-perl (1.07-7+b1) ... Selecting previously unselected package sensible-utils. Preparing to unpack .../01-sensible-utils_0.0.24_all.deb ... Unpacking sensible-utils (0.0.24) ... Selecting previously unselected package libmagic-mgc. Preparing to unpack .../02-libmagic-mgc_1%3a5.45-3+b1_amd64.deb ... Unpacking libmagic-mgc (1:5.45-3+b1) ... Selecting previously unselected package libmagic1t64:amd64. Preparing to unpack .../03-libmagic1t64_1%3a5.45-3+b1_amd64.deb ... Unpacking libmagic1t64:amd64 (1:5.45-3+b1) ... Selecting previously unselected package file. Preparing to unpack .../04-file_1%3a5.45-3+b1_amd64.deb ... Unpacking file (1:5.45-3+b1) ... Selecting previously unselected package gettext-base. Preparing to unpack .../05-gettext-base_0.23.1-1_amd64.deb ... Unpacking gettext-base (0.23.1-1) ... Selecting previously unselected package libuchardet0:amd64. Preparing to unpack .../06-libuchardet0_0.0.8-1+b2_amd64.deb ... Unpacking libuchardet0:amd64 (0.0.8-1+b2) ... Selecting previously unselected package groff-base. Preparing to unpack .../07-groff-base_1.23.0-7_amd64.deb ... Unpacking groff-base (1.23.0-7) ... Selecting previously unselected package bsdextrautils. Preparing to unpack .../08-bsdextrautils_2.40.4-5_amd64.deb ... Unpacking bsdextrautils (2.40.4-5) ... Selecting previously unselected package libpipeline1:amd64. Preparing to unpack .../09-libpipeline1_1.5.8-1_amd64.deb ... Unpacking libpipeline1:amd64 (1.5.8-1) ... Selecting previously unselected package man-db. Preparing to unpack .../10-man-db_2.13.0-1_amd64.deb ... Unpacking man-db (2.13.0-1) ... Selecting previously unselected package architecture-properties:amd64. Preparing to unpack .../11-architecture-properties_0.2.6_amd64.deb ... Unpacking architecture-properties:amd64 (0.2.6) ... Selecting previously unselected package m4. Preparing to unpack .../12-m4_1.4.19-7_amd64.deb ... Unpacking m4 (1.4.19-7) ... Selecting previously unselected package autoconf. Preparing to unpack .../13-autoconf_2.72-3_all.deb ... Unpacking autoconf (2.72-3) ... Selecting previously unselected package autotools-dev. Preparing to unpack .../14-autotools-dev_20220109.1_all.deb ... Unpacking autotools-dev (20220109.1) ... Selecting previously unselected package automake. Preparing to unpack .../15-automake_1%3a1.17-3_all.deb ... Unpacking automake (1:1.17-3) ... Selecting previously unselected package autopoint. Preparing to unpack .../16-autopoint_0.23.1-1_all.deb ... Unpacking autopoint (0.23.1-1) ... Selecting previously unselected package libdebhelper-perl. Preparing to unpack .../17-libdebhelper-perl_13.24.1_all.deb ... Unpacking libdebhelper-perl (13.24.1) ... Selecting previously unselected package libtool. Preparing to unpack .../18-libtool_2.5.4-4_all.deb ... Unpacking libtool (2.5.4-4) ... Selecting previously unselected package dh-autoreconf. Preparing to unpack .../19-dh-autoreconf_20_all.deb ... Unpacking dh-autoreconf (20) ... Selecting previously unselected package libarchive-zip-perl. Preparing to unpack .../20-libarchive-zip-perl_1.68-1_all.deb ... Unpacking libarchive-zip-perl (1.68-1) ... Selecting previously unselected package libfile-stripnondeterminism-perl. Preparing to unpack .../21-libfile-stripnondeterminism-perl_1.14.1-2_all.deb ... Unpacking libfile-stripnondeterminism-perl (1.14.1-2) ... Selecting previously unselected package dh-strip-nondeterminism. Preparing to unpack .../22-dh-strip-nondeterminism_1.14.1-2_all.deb ... Unpacking dh-strip-nondeterminism (1.14.1-2) ... Selecting previously unselected package libelf1t64:amd64. Preparing to unpack .../23-libelf1t64_0.192-4_amd64.deb ... Unpacking libelf1t64:amd64 (0.192-4) ... Selecting previously unselected package dwz. Preparing to unpack .../24-dwz_0.15-1+b1_amd64.deb ... Unpacking dwz (0.15-1+b1) ... Selecting previously unselected package libunistring5:amd64. Preparing to unpack .../25-libunistring5_1.3-1_amd64.deb ... Unpacking libunistring5:amd64 (1.3-1) ... Selecting previously unselected package libicu72:amd64. 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Setting up automake (1:1.17-3) ... update-alternatives: using /usr/bin/automake-1.17 to provide /usr/bin/automake (automake) in auto mode Setting up libfile-stripnondeterminism-perl (1.14.1-2) ... Setting up gettext (0.23.1-1) ... Setting up libtool (2.5.4-4) ... Setting up libidn2-0:amd64 (2.3.8-1) ... Setting up pkgconf:amd64 (1.8.1-4) ... Setting up intltool-debian (0.35.0+20060710.6) ... Setting up help2man (1.49.3) ... Setting up dh-autoreconf (20) ... Setting up libmnl-dev:amd64 (1.0.5-3) ... Setting up libp11-kit0:amd64 (0.25.5-3) ... Setting up libsctp-dev:amd64 (1.0.21+dfsg-1) ... Setting up dh-strip-nondeterminism (1.14.1-2) ... Setting up libosmocore22:amd64 (1.11.0-2) ... Setting up libosmocodec4:amd64 (1.11.0-2) ... Setting up groff-base (1.23.0-7) ... Setting up libgnutls30t64:amd64 (3.8.9-2) ... Setting up libosmovty13:amd64 (1.11.0-2) ... Setting up libosmoisdn0:amd64 (1.11.0-2) ... Setting up po-debconf (1.0.21+nmu1) ... Setting up man-db (2.13.0-1) ... Not building database; man-db/auto-update is not 'true'. Setting up libosmogsm20:amd64 (1.11.0-2) ... Setting up libosmoctrl0:amd64 (1.11.0-2) ... Setting up libosmogb14:amd64 (1.11.0-2) ... Setting up debhelper (13.24.1) ... Setting up libosmocoding0:amd64 (1.11.0-2) ... Setting up libosmosim2:amd64 (1.11.0-2) ... Setting up libosmocore-dev:amd64 (1.11.0-2) ... Processing triggers for libc-bin (2.41-4) ... Reading package lists... Building dependency tree... Reading state information... Reading extended state information... Initializing package states... Writing extended state information... Building tag database... -> Finished parsing the build-deps I: Building the package I: Running cd /build/reproducible-path/osmo-pcu-1.5.1/ && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games" HOME="/nonexistent/first-build" dpkg-buildpackage -us -uc -b && env PATH="/usr/sbin:/usr/bin:/sbin:/bin:/usr/games" HOME="/nonexistent/first-build" dpkg-genchanges -S > ../osmo-pcu_1.5.1-1_source.changes dpkg-buildpackage: info: source package osmo-pcu dpkg-buildpackage: info: source version 1.5.1-1 dpkg-buildpackage: info: source distribution unstable dpkg-buildpackage: info: source changed by Thorsten Alteholz dpkg-source --before-build . dpkg-buildpackage: info: host architecture amd64 debian/rules clean dh clean --with autoreconf debian/rules override_dh_clean make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_clean rm -f tests/package.m4 rm -f tests/testsuite rm -f .tarball-version make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' debian/rules binary dh binary --with autoreconf dh_update_autotools_config debian/rules override_dh_autoreconf make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' echo 1.5.1 > .tarball-version dh_autoreconf libtoolize: putting auxiliary files in AC_CONFIG_AUX_DIR, '.'. libtoolize: copying file './ltmain.sh' libtoolize: Consider adding 'AC_CONFIG_MACRO_DIRS([m4])' to configure.ac, libtoolize: and rerunning libtoolize and aclocal. libtoolize: Consider adding '-I m4' to ACLOCAL_AMFLAGS in Makefile.am. configure.ac:45: warning: The macro 'AC_HEADER_STDC' is obsolete. configure.ac:45: You should run autoupdate. ./lib/autoconf/headers.m4:663: AC_HEADER_STDC is expanded from... configure.ac:45: the top level configure.ac:96: warning: The macro 'AC_HELP_STRING' is obsolete. configure.ac:96: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:96: the top level configure.ac:137: warning: The macro 'AC_HELP_STRING' is obsolete. configure.ac:137: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:137: the top level configure.ac:156: warning: The macro 'AC_HELP_STRING' is obsolete. configure.ac:156: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:156: the top level configure.ac:175: warning: The macro 'AC_HELP_STRING' is obsolete. configure.ac:175: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:175: the top level configure.ac:186: warning: The macro 'AC_HELP_STRING' is obsolete. configure.ac:186: You should run autoupdate. ./lib/autoconf/general.m4:204: AC_HELP_STRING is expanded from... configure.ac:186: the top level configure.ac:266: warning: AC_OUTPUT should be used without arguments. configure.ac:266: You should run autoupdate. configure.ac:24: installing './compile' configure.ac:27: installing './config.guess' configure.ac:27: installing './config.sub' configure.ac:9: installing './install-sh' configure.ac:9: installing './missing' src/Makefile.am: installing './depcomp' tests/Makefile.am:34: warning: source file 'alloc/AllocTest.cpp' is in a subdirectory, tests/Makefile.am:34: but option 'subdir-objects' is disabled automake: warning: possible forward-incompatibility. automake: At least one source file is in a subdirectory, but the 'subdir-objects' automake: automake option hasn't been enabled. For now, the corresponding output automake: object file(s) will be placed in the top-level directory. However, this automake: behavior may change in a future Automake major version, with object automake: files being placed in the same subdirectory as the corresponding sources. automake: You are advised to start using 'subdir-objects' option throughout your automake: project, to avoid future incompatibility. tests/Makefile.am:47: warning: source file 'alloc/MslotTest.cpp' is in a subdirectory, tests/Makefile.am:47: but option 'subdir-objects' is disabled tests/Makefile.am:154: warning: source file 'app_info/AppInfoTest.cpp' is in a subdirectory, tests/Makefile.am:154: but option 'subdir-objects' is disabled tests/Makefile.am:69: warning: source file 'bitcomp/BitcompTest.cpp' is in a subdirectory, tests/Makefile.am:69: but option 'subdir-objects' is disabled tests/Makefile.am:69: warning: source file '../src/egprs_rlc_compression.cpp' is in a subdirectory, tests/Makefile.am:69: but option 'subdir-objects' is disabled tests/Makefile.am:138: warning: source file 'codel/codel_test.c' is in a subdirectory, tests/Makefile.am:138: but option 'subdir-objects' is disabled tests/Makefile.am:76: warning: source file 'edge/EdgeTest.cpp' is in a subdirectory, tests/Makefile.am:76: but option 'subdir-objects' is disabled tests/Makefile.am:85: warning: source file 'emu/pcu_emu.cpp' is in a subdirectory, tests/Makefile.am:85: but option 'subdir-objects' is disabled tests/Makefile.am:85: warning: source file 'emu/test_replay_gprs_attach.cpp' is in a subdirectory, tests/Makefile.am:85: but option 'subdir-objects' is disabled tests/Makefile.am:85: warning: source file 'emu/openbsc_clone.c' is in a subdirectory, tests/Makefile.am:85: but option 'subdir-objects' is disabled tests/Makefile.am:85: warning: source file 'emu/test_pdp_activation.cpp' is in a subdirectory, tests/Makefile.am:85: but option 'subdir-objects' is disabled tests/Makefile.am:145: warning: source file 'fn/FnTest.cpp' is in a subdirectory, tests/Makefile.am:145: but option 'subdir-objects' is disabled tests/Makefile.am:119: warning: source file 'llc/LlcTest.cpp' is in a subdirectory, tests/Makefile.am:119: but option 'subdir-objects' is disabled tests/Makefile.am:133: warning: source file 'llist/LListTest.cpp' is in a subdirectory, tests/Makefile.am:133: but option 'subdir-objects' is disabled tests/Makefile.am:105: warning: source file 'ms/MsTest.cpp' is in a subdirectory, tests/Makefile.am:105: but option 'subdir-objects' is disabled tests/Makefile.am:28: warning: source file 'rlcmac/RLCMACTest.cpp' is in a subdirectory, tests/Makefile.am:28: but option 'subdir-objects' is disabled tests/Makefile.am:56: warning: source file 'tbf/TbfTest.cpp' is in a subdirectory, tests/Makefile.am:56: but option 'subdir-objects' is disabled tests/Makefile.am:96: warning: source file 'types/TypesTest.cpp' is in a subdirectory, tests/Makefile.am:96: but option 'subdir-objects' is disabled tests/Makefile.am:167: warning: source file 'ulc/PdchUlcTest.cpp' is in a subdirectory, tests/Makefile.am:167: but option 'subdir-objects' is disabled make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' debian/rules override_dh_auto_configure make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_auto_configure -- --with-systemdsystemunitdir=no ./configure --build=x86_64-linux-gnu --prefix=/usr --includedir=\${prefix}/include --mandir=\${prefix}/share/man --infodir=\${prefix}/share/info --sysconfdir=/etc --localstatedir=/var --disable-option-checking --disable-silent-rules --libdir=\${prefix}/lib/x86_64-linux-gnu --runstatedir=/run --disable-maintainer-mode --disable-dependency-tracking --with-systemdsystemunitdir=no checking for a BSD-compatible install... /usr/bin/install -c checking whether sleep supports fractional seconds... yes checking filesystem timestamp resolution... 0.01 checking whether build environment is sane... yes checking for a race-free mkdir -p... /usr/bin/mkdir -p checking for gawk... no checking for mawk... mawk checking whether make sets $(MAKE)... yes checking whether make supports nested variables... yes checking xargs -n works... yes checking whether make sets $(MAKE)... (cached) yes checking for gcc... gcc checking whether the C compiler works... yes checking for C compiler default output file name... a.out checking for suffix of executables... checking whether we are cross compiling... no checking for suffix of object files... o checking whether the compiler supports GNU C... yes checking whether gcc accepts -g... yes checking for gcc option to enable C11 features... none needed checking whether gcc understands -c and -o together... yes checking whether make supports the include directive... yes (GNU style) checking dependency style of gcc... none checking for g++... g++ checking whether the compiler supports GNU C++... yes checking whether g++ accepts -g... yes checking for g++ option to enable C++11 features... unsupported checking for g++ option to enable C++98 features... none needed checking dependency style of g++... none checking build system type... x86_64-pc-linux-gnu checking host system type... x86_64-pc-linux-gnu checking how to print strings... printf checking for a sed that does not truncate output... /usr/bin/sed checking for grep that handles long lines and -e... /usr/bin/grep checking for egrep... /usr/bin/grep -E checking for fgrep... /usr/bin/grep -F checking for ld used by gcc... /usr/bin/ld checking if the linker (/usr/bin/ld) is GNU ld... yes checking for BSD- or MS-compatible name lister (nm)... /usr/bin/nm -B checking the name lister (/usr/bin/nm -B) interface... BSD nm checking whether ln -s works... yes checking the maximum length of command line arguments... 1572864 checking how to convert x86_64-pc-linux-gnu file names to x86_64-pc-linux-gnu format... func_convert_file_noop checking how to convert x86_64-pc-linux-gnu file names to toolchain format... func_convert_file_noop checking for /usr/bin/ld option to reload object files... -r checking for file... file checking for objdump... objdump checking how to recognize dependent libraries... pass_all checking for dlltool... no checking how to associate runtime and link libraries... printf %s\n checking for ranlib... ranlib checking for ar... ar checking for archiver @FILE support... @ checking for strip... strip checking command to parse /usr/bin/nm -B output from gcc object... ok checking for sysroot... no checking for a working dd... /usr/bin/dd checking how to truncate binary pipes... /usr/bin/dd bs=4096 count=1 checking for mt... no checking if : is a manifest tool... no checking for stdio.h... yes checking for stdlib.h... yes checking for string.h... yes checking for inttypes.h... yes checking for stdint.h... yes checking for strings.h... yes checking for sys/stat.h... yes checking for sys/types.h... yes checking for unistd.h... yes checking for dlfcn.h... yes checking for objdir... .libs checking if gcc supports -fno-rtti -fno-exceptions... no checking for gcc option to produce PIC... -fPIC -DPIC checking if gcc PIC flag -fPIC -DPIC works... yes checking if gcc static flag -static works... yes checking if gcc supports -c -o file.o... yes checking if gcc supports -c -o file.o... (cached) yes checking whether the gcc linker (/usr/bin/ld -m elf_x86_64) supports shared libraries... yes checking whether -lc should be explicitly linked in... no checking dynamic linker characteristics... GNU/Linux ld.so checking how to hardcode library paths into programs... immediate checking whether stripping libraries is possible... yes checking if libtool supports shared libraries... yes checking whether to build shared libraries... yes checking whether to build static libraries... yes checking how to run the C++ preprocessor... g++ -E checking for ld used by g++... /usr/bin/ld -m elf_x86_64 checking if the linker (/usr/bin/ld -m elf_x86_64) is GNU ld... yes checking whether the g++ linker (/usr/bin/ld -m elf_x86_64) supports shared libraries... yes checking for g++ option to produce PIC... -fPIC -DPIC checking if g++ PIC flag -fPIC -DPIC works... yes checking if g++ static flag -static works... yes checking if g++ supports -c -o file.o... yes checking if g++ supports -c -o file.o... (cached) yes checking whether the g++ linker (/usr/bin/ld -m elf_x86_64) supports shared libraries... yes checking dynamic linker characteristics... (cached) GNU/Linux ld.so checking how to hardcode library paths into programs... immediate checking for pkg-config... /usr/bin/pkg-config checking for pkg-config... /usr/bin/pkg-config checking pkg-config is at least version 0.20... yes checking for help2man... /usr/bin/help2man checking for egrep... (cached) /usr/bin/grep -E checking for libosmocore >= 1.10.0... yes checking for libosmovty >= 1.10.0... yes checking for libosmoctrl >= 1.10.0... yes checking for libosmogsm >= 1.10.0... yes checking for libosmogb >= 1.10.0... yes checking whether to enable direct DSP access for PDCH of sysmocom-bts... unset checking whether to enable direct PHY access for PDCH of NuRAN Wireless Litecell 1.5 BTS... no checking whether to enable direct PHY access for PDCH of NuRAN Wireless OC-2G BTS... no checking whether to enable direct E1 CCU access for PDCH of Ericsson RBS... no checking whether to enable VTY tests... no CPPFLAGS="-Wdate-time -D_FORTIFY_SOURCE=2" CFLAGS="-g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11" CXXFLAGS="-g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03" LDFLAGS="-Wl,-z,relro -Wl,-z,now" checking that generated files are newer than configure... done configure: creating ./config.status config.status: creating include/Makefile config.status: creating src/Makefile config.status: creating doc/Makefile config.status: creating doc/examples/Makefile config.status: creating tests/Makefile config.status: creating doc/manuals/Makefile config.status: creating contrib/Makefile config.status: creating contrib/systemd/Makefile config.status: creating Makefile config.status: executing tests/atconfig commands config.status: executing depfiles commands config.status: executing libtool commands make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_auto_build make -j42 make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' echo 1.5.1 > .version-t && mv .version-t .version make all-recursive make[2]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' Making all in include make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/include' make[3]: Nothing to be done for 'all'. make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/include' Making all in src make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/src' g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o pcu_main.o pcu_main.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o alloc_algo.lo alloc_algo.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gprs_debug.lo gprs_debug.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o csn1.lo csn1.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o csn1_dec.lo csn1_dec.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o csn1_enc.lo csn1_enc.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gsm_rlcmac.lo gsm_rlcmac.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gprs_bssgp_pcu.lo gprs_bssgp_pcu.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gprs_bssgp_rim.lo gprs_bssgp_rim.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gprs_rlcmac.lo gprs_rlcmac.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o gprs_rlcmac_sched.lo gprs_rlcmac_sched.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o gprs_rlcmac_meas.lo gprs_rlcmac_meas.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gprs_ms.lo gprs_ms.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time 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-fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o pcu_vty.lo pcu_vty.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c 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-DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o encoding.lo encoding.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o sba.lo sba.c /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o decoding.lo decoding.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 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-I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o rlc.lo rlc.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread 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-fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o rlc_window_dl.lo rlc_window_dl.cpp /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o rlc_window_ul.lo rlc_window_ul.cpp /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o pcuif_sock.lo pcuif_sock.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_bssgp_pcu.c -fPIC -DPIC -o .libs/gprs_bssgp_pcu.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gsm_rlcmac.c -fPIC -DPIC -o .libs/gsm_rlcmac.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_debug.c -fPIC -DPIC -o .libs/gprs_debug.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c csn1.c -fPIC -DPIC -o .libs/csn1.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_rlcmac.c -fPIC -DPIC -o .libs/gprs_rlcmac.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c csn1_enc.c -fPIC -DPIC -o .libs/csn1_enc.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c csn1_dec.c -fPIC -DPIC -o .libs/csn1_dec.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c neigh_cache.c -fPIC -DPIC -o .libs/neigh_cache.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_bssgp_rim.c -fPIC -DPIC -o .libs/gprs_bssgp_rim.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_fsm.c -fPIC -DPIC -o .libs/tbf_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_ul_fsm.c -fPIC -DPIC -o .libs/tbf_ul_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_ul_ass_fsm.c -fPIC -DPIC -o .libs/tbf_ul_ass_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_ms.c -fPIC -DPIC -o .libs/gprs_ms.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c alloc_algo.cpp -fPIC -DPIC -o .libs/alloc_algo.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c nacc_fsm.c -fPIC -DPIC -o .libs/nacc_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_pcu.c -fPIC -DPIC -o .libs/gprs_pcu.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c gprs_rlcmac_sched.cpp -fPIC -DPIC -o .libs/gprs_rlcmac_sched.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c tbf.cpp -fPIC -DPIC -o .libs/tbf.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c bts_pch_timer.c -fPIC -DPIC -o .libs/bts_pch_timer.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c pcu_vty.c -fPIC -DPIC -o .libs/pcu_vty.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c mslot_class.c -fPIC -DPIC -o .libs/mslot_class.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_dl_ass_fsm.c -fPIC -DPIC -o .libs/tbf_dl_ass_fsm.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c pcu_l1_if.cpp -fPIC -DPIC -o .libs/pcu_l1_if.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c pcu_vty_functions.cpp -fPIC -DPIC -o .libs/pcu_vty_functions.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_dl_fsm.c -fPIC -DPIC -o .libs/tbf_dl_fsm.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c tbf_dl.cpp -fPIC -DPIC -o .libs/tbf_dl.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_ul_ack_fsm.c -fPIC -DPIC -o .libs/tbf_ul_ack_fsm.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c llc.c -fPIC -DPIC -o .libs/llc.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c gprs_rlcmac_meas.cpp -fPIC -DPIC -o .libs/gprs_rlcmac_meas.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c tbf_ul.cpp -fPIC -DPIC -o .libs/tbf_ul.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c sba.c -fPIC -DPIC -o .libs/sba.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c bts.cpp -fPIC -DPIC -o .libs/bts.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c decoding.cpp -fPIC -DPIC -o .libs/decoding.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c encoding.cpp -fPIC -DPIC -o .libs/encoding.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c pdch_ul_controller.c -fPIC -DPIC -o .libs/pdch_ul_controller.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c pcuif_sock.c -fPIC -DPIC -o .libs/pcuif_sock.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc_window_dl.cpp -fPIC -DPIC -o .libs/rlc_window_dl.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c pdch.cpp -fPIC -DPIC -o .libs/pdch.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc.cpp -fPIC -DPIC -o .libs/rlc.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc_window.cpp -fPIC -DPIC -o .libs/rlc_window.o libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc_window_ul.cpp -fPIC -DPIC -o .libs/rlc_window_ul.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_debug.c -o gprs_debug.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c csn1.c -o csn1.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_fsm.c -o tbf_fsm.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc_window.cpp -o rlc_window.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o gprs_codel.lo gprs_codel.c /bin/bash ../libtool --tag=CC --mode=compile gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o coding_scheme.lo coding_scheme.c libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c sba.c -o sba.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_rlcmac.c -o gprs_rlcmac.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc_window_ul.cpp -o rlc_window_ul.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CXX --mode=compile g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o egprs_rlc_compression.lo egprs_rlc_compression.cpp libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_codel.c -fPIC -DPIC -o .libs/gprs_codel.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_pcu.c -o gprs_pcu.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c coding_scheme.c -fPIC -DPIC -o .libs/coding_scheme.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_ul_ack_fsm.c -o tbf_ul_ack_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c bts_pch_timer.c -o bts_pch_timer.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c mslot_class.c -o mslot_class.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_dl_ass_fsm.c -o tbf_dl_ass_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_ul_fsm.c -o tbf_ul_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c neigh_cache.c -o neigh_cache.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c pcuif_sock.c -o pcuif_sock.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c pdch_ul_controller.c -o pdch_ul_controller.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c egprs_rlc_compression.cpp -fPIC -DPIC -o .libs/egprs_rlc_compression.o libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_bssgp_rim.c -o gprs_bssgp_rim.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_ul_ass_fsm.c -o tbf_ul_ass_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c llc.c -o llc.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c gprs_rlcmac_meas.cpp -o gprs_rlcmac_meas.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_codel.c -o gprs_codel.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c tbf_dl_fsm.c -o tbf_dl_fsm.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c coding_scheme.c -o coding_scheme.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc_window_dl.cpp -o rlc_window_dl.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c rlc.cpp -o rlc.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c pcu_vty.c -o pcu_vty.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c decoding.cpp -o decoding.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c pcu_vty_functions.cpp -o pcu_vty_functions.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_ms.c -o gprs_ms.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c nacc_fsm.c -o nacc_fsm.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c egprs_rlc_compression.cpp -o egprs_rlc_compression.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c gprs_rlcmac_sched.cpp -o gprs_rlcmac_sched.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gsm_rlcmac.c -o gsm_rlcmac.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c csn1_enc.c -o csn1_enc.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c gprs_bssgp_pcu.c -o gprs_bssgp_pcu.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c alloc_algo.cpp -o alloc_algo.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c tbf_ul.cpp -o tbf_ul.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c tbf.cpp -o tbf.o >/dev/null 2>&1 libtool: compile: gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c csn1_dec.c -o csn1_dec.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c encoding.cpp -o encoding.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c bts.cpp -o bts.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c pdch.cpp -o pdch.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c tbf_dl.cpp -o tbf_dl.o >/dev/null 2>&1 libtool: compile: g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" "-DPACKAGE_STRING=\"osmo-pcu 1.5.1\"" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -I../include -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -Wdate-time -D_FORTIFY_SOURCE=2 -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c pcu_l1_if.cpp -o pcu_l1_if.o >/dev/null 2>&1 /bin/bash ../libtool --tag=CXX --mode=link g++ -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z,relro -Wl,-z,now -o libgprs.la alloc_algo.lo gprs_debug.lo csn1.lo csn1_dec.lo csn1_enc.lo gsm_rlcmac.lo gprs_bssgp_pcu.lo gprs_bssgp_rim.lo gprs_rlcmac.lo gprs_rlcmac_sched.lo gprs_rlcmac_meas.lo gprs_ms.lo gprs_pcu.lo pcu_l1_if.lo pcu_vty.lo pcu_vty_functions.lo mslot_class.lo nacc_fsm.lo neigh_cache.lo tbf.lo tbf_fsm.lo tbf_ul.lo tbf_ul_fsm.lo tbf_ul_ack_fsm.lo tbf_ul_ass_fsm.lo tbf_dl.lo tbf_dl_fsm.lo tbf_dl_ass_fsm.lo bts.lo bts_pch_timer.lo pdch.lo pdch_ul_controller.lo encoding.lo sba.lo decoding.lo llc.lo rlc.lo rlc_window.lo rlc_window_dl.lo rlc_window_ul.lo pcuif_sock.lo gprs_codel.lo coding_scheme.lo egprs_rlc_compression.lo gprs_rlcmac_sched.lo copying selected object files to avoid basename conflicts... libtool: link: ln .libs/gprs_rlcmac_sched.o .libs/libgprs.lax/lt1-gprs_rlcmac_sched.o || cp .libs/gprs_rlcmac_sched.o .libs/libgprs.lax/lt1-gprs_rlcmac_sched.o libtool: link: ar cr .libs/libgprs.a .libs/alloc_algo.o .libs/gprs_debug.o .libs/csn1.o .libs/csn1_dec.o .libs/csn1_enc.o .libs/gsm_rlcmac.o .libs/gprs_bssgp_pcu.o .libs/gprs_bssgp_rim.o .libs/gprs_rlcmac.o .libs/gprs_rlcmac_sched.o .libs/gprs_rlcmac_meas.o .libs/gprs_ms.o .libs/gprs_pcu.o .libs/pcu_l1_if.o .libs/pcu_vty.o .libs/pcu_vty_functions.o .libs/mslot_class.o .libs/nacc_fsm.o .libs/neigh_cache.o .libs/tbf.o .libs/tbf_fsm.o .libs/tbf_ul.o .libs/tbf_ul_fsm.o .libs/tbf_ul_ack_fsm.o .libs/tbf_ul_ass_fsm.o .libs/tbf_dl.o .libs/tbf_dl_fsm.o .libs/tbf_dl_ass_fsm.o .libs/bts.o .libs/bts_pch_timer.o .libs/pdch.o .libs/pdch_ul_controller.o .libs/encoding.o .libs/sba.o .libs/decoding.o .libs/llc.o .libs/rlc.o .libs/rlc_window.o .libs/rlc_window_dl.o .libs/rlc_window_ul.o .libs/pcuif_sock.o .libs/gprs_codel.o .libs/coding_scheme.o .libs/egprs_rlc_compression.o .libs/libgprs.lax/lt1-gprs_rlcmac_sched.o libtool: link: ranlib .libs/libgprs.a libtool: link: rm -fr .libs/libgprs.lax libtool: link: ( cd ".libs" && rm -f "libgprs.la" && ln -s "../libgprs.la" "libgprs.la" ) /bin/bash ../libtool --tag=CXX --mode=link g++ -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z,relro -Wl,-z,now -o osmo-pcu pcu_main.o libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -Wall -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o osmo-pcu pcu_main.o ./.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/src' Making all in doc make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' Making all in examples make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' make[4]: Nothing to be done for 'all'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' Making all in manuals make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[4]: Nothing to be done for 'all'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[4]: Nothing to be done for 'all-am'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' Making all in tests make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o pcu_emu.o `test -f 'emu/pcu_emu.cpp' || echo './'`emu/pcu_emu.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o test_replay_gprs_attach.o `test -f 'emu/test_replay_gprs_attach.cpp' || echo './'`emu/test_replay_gprs_attach.cpp gcc -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -Werror=implicit-function-declaration -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu11 -c -o openbsc_clone.o `test -f 'emu/openbsc_clone.c' || echo './'`emu/openbsc_clone.c g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o test_pdp_activation.o `test -f 'emu/test_pdp_activation.cpp' || echo './'`emu/test_pdp_activation.cpp /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o emu/pcu_emu pcu_emu.o test_replay_gprs_attach.o openbsc_clone.o test_pdp_activation.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o emu/pcu_emu pcu_emu.o test_replay_gprs_attach.o openbsc_clone.o test_pdp_activation.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' Making all in contrib make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' Making all in systemd make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[4]: Nothing to be done for 'all'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[4]: Nothing to be done for 'all-am'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' make[3]: Nothing to be done for 'all-am'. make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[2]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' debian/rules override_dh_auto_test make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' echo amd64 amd64 if [ "amd64" = "s390x" ] || \ [ "amd64" = "hppa" ] || \ [ "amd64" = "powerpc" ] || \ [ "amd64" = "ppc64" ] || \ [ "amd64" = "sparc64" ] || \ [ "amd64" = "mips" ] ; then \ echo "Do not care of test result on this architecture" ;\ else \ echo "Do make tests on this architecture" ;\ dh_auto_test || (find . -name testsuite.log -exec cat {} \; ; false) \ fi Do make tests on this architecture make -j42 check "TESTSUITEFLAGS=-j42 --verbose" VERBOSE=1 make[2]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' make check-recursive make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' Making check in include make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/include' make[4]: Nothing to be done for 'check'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/include' Making check in src make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/src' make[4]: Nothing to be done for 'check'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/src' Making check in doc make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' Making check in examples make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' make[5]: Nothing to be done for 'check'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' Making check in manuals make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[5]: Nothing to be done for 'check'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[5]: Nothing to be done for 'check-am'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' Making check in tests make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make rlcmac/RLCMACTest alloc/AllocTest alloc/MslotTest tbf/TbfTest types/TypesTest ms/MsTest llist/LListTest llc/LlcTest codel/codel_test edge/EdgeTest bitcomp/BitcompTest fn/FnTest app_info/AppInfoTest ulc/PdchUlcTest make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o RLCMACTest.o `test -f 'rlcmac/RLCMACTest.cpp' || echo './'`rlcmac/RLCMACTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o AllocTest.o `test -f 'alloc/AllocTest.cpp' || echo './'`alloc/AllocTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o MslotTest.o `test -f 'alloc/MslotTest.cpp' || echo './'`alloc/MslotTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" 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'./'`app_info/AppInfoTest.cpp g++ -DPACKAGE_NAME=\"osmo-pcu\" -DPACKAGE_TARNAME=\"osmo-pcu\" -DPACKAGE_VERSION=\"1.5.1\" -DPACKAGE_STRING=\"osmo-pcu\ 1.5.1\" -DPACKAGE_BUGREPORT=\"osmocom-net-gprs@lists.osmocom.org\" -DPACKAGE_URL=\"\" -DPACKAGE=\"osmo-pcu\" -DVERSION=\"1.5.1\" -DHAVE_STDIO_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_STRINGS_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_UNISTD_H=1 -DSTDC_HEADERS=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -I. -Wall -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I/usr/include/ -pthread -I../src/ -I../include/ -Wdate-time -D_FORTIFY_SOURCE=2 -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -c -o PdchUlcTest.o `test -f 'ulc/PdchUlcTest.cpp' || echo './'`ulc/PdchUlcTest.cpp /bin/bash ../libtool --tag=CC --mode=link gcc -g -O2 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codel_test.o ../src/.libs/libgprs.a -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o llist/LListTest LListTest.o -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o fn/FnTest FnTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 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-Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o rlcmac/RLCMACTest RLCMACTest.o ../src/libgprs.la -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,--wrap=pcu_sock_send -no-install -Wl,-z,relro -Wl,-z,now -o app_info/AppInfoTest AppInfoTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o bitcomp/BitcompTest BitcompTest.o egprs_rlc_compression.o ../src/libgprs.la -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o ulc/PdchUlcTest PdchUlcTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-u,bssgp_prim_cb -no-install -Wl,-z,relro -Wl,-z,now -o ms/MsTest MsTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-u,bssgp_prim_cb -no-install -Wl,-z,relro -Wl,-z,now -o llc/LlcTest LlcTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o alloc/MslotTest MslotTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,--wrap=pcu_sock_send -no-install -Wl,-z,relro -Wl,-z,now -o alloc/AllocTest AllocTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,--wrap=pcu_sock_send -Wl,-z -Wl,relro -Wl,-z -Wl,now -o app_info/AppInfoTest AppInfoTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o bitcomp/BitcompTest BitcompTest.o egprs_rlc_compression.o ../src/.libs/libgprs.a -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o rlcmac/RLCMACTest RLCMACTest.o ../src/.libs/libgprs.a -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o ulc/PdchUlcTest PdchUlcTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-u -Wl,bssgp_prim_cb -Wl,-z -Wl,relro -Wl,-z -Wl,now -o ms/MsTest MsTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-u -Wl,bssgp_prim_cb -Wl,-z -Wl,relro -Wl,-z -Wl,now -o llc/LlcTest LlcTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,--wrap=pcu_sock_send -Wl,-z -Wl,relro -Wl,-z -Wl,now -o alloc/AllocTest AllocTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o types/TypesTest TypesTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -no-install -Wl,-z,relro -Wl,-z,now -o edge/EdgeTest EdgeTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o types/TypesTest TypesTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,-z -Wl,relro -Wl,-z -Wl,now -o edge/EdgeTest EdgeTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt /bin/bash ../libtool --tag=CXX --mode=link g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,--wrap=pcu_sock_send -no-install -Wl,-z,relro -Wl,-z,now -o tbf/TbfTest TbfTest.o ../src/libgprs.la -losmogb -losmovty -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -losmocore -ltalloc -lmnl -lrt libtool: link: g++ -g -O2 -ffile-prefix-map=/build/reproducible-path/osmo-pcu-1.5.1=. -fstack-protector-strong -fstack-clash-protection -Wformat -Werror=format-security -fcf-protection -std=gnu++03 -Wl,--wrap=pcu_sock_send -Wl,-z -Wl,relro -Wl,-z -Wl,now -o tbf/TbfTest TbfTest.o ../src/.libs/libgprs.a -losmogb -losmovty -losmoctrl -losmogsm -losmoisdn -losmocore -ltalloc -lmnl -lrt make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make check-local make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' :;{ \ echo '# Signature of the current package.' && \ echo 'm4_define([AT_PACKAGE_NAME],' && \ echo ' [osmo-pcu])' && \ echo 'm4_define([AT_PACKAGE_TARNAME],' && \ echo ' [osmo-pcu])' && \ echo 'm4_define([AT_PACKAGE_VERSION],' && \ echo ' [1.5.1])' && \ echo 'm4_define([AT_PACKAGE_STRING],' && \ echo ' [osmo-pcu 1.5.1])' && \ echo 'm4_define([AT_PACKAGE_BUGREPORT],' && \ echo ' [osmocom-net-gprs@lists.osmocom.org])'; \ echo 'm4_define([AT_PACKAGE_URL],' && \ echo ' [])'; \ } >'./package.m4' /bin/bash ../missing --run autom4te --language=autotest -I '.' -o testsuite.tmp testsuite.at mv testsuite.tmp testsuite /bin/bash './testsuite' -j42 --verbose ## -------------------------- ## ## osmo-pcu 1.5.1 test suite. ## ## -------------------------- ## 1. testsuite.at:5: testing rlcmac ... ./testsuite.at:9: $OSMO_QEMU $abs_top_builddir/tests/rlcmac/RLCMACTest 2. testsuite.at:12: testing multi_slot ... ./testsuite.at:15: $OSMO_QEMU $abs_top_builddir/tests/alloc/MslotTest 5. testsuite.at:31: testing bitcomp ... 4. testsuite.at:25: testing tbf ... 3. testsuite.at:18: testing ts_alloc ... 8. testsuite.at:52: testing ms ... 9. testsuite.at:59: testing llc ... 6. testsuite.at:38: testing edge ... ./testsuite.at:28: $OSMO_QEMU $abs_top_builddir/tests/tbf/TbfTest cat: 7. testsuite.at:45: testing types ... 14. testsuite.at:92: testing ulc ... 11. testsuite.at:73: testing codel ... ./testsuite.at:35: $OSMO_QEMU $abs_top_builddir/tests/bitcomp/BitcompTest /build/reproducible-path/osmo-pcu-1.5.1/tests/edge/EdgeTest.err: No such file or directory ./testsuite.at:63: $OSMO_QEMU $abs_top_builddir/tests/llc/LlcTest 10. testsuite.at:66: testing llist ... 13. testsuite.at:85: testing app_info ... 12. testsuite.at:79: testing fn ... ./testsuite.at:96: $OSMO_QEMU $abs_top_builddir/tests/ulc/PdchUlcTest ./testsuite.at:70: $OSMO_QEMU $abs_top_builddir/tests/llist/LListTest ./testsuite.at:42: $OSMO_QEMU $abs_top_builddir/tests/edge/EdgeTest ./testsuite.at:76: $OSMO_QEMU $abs_top_builddir/tests/codel/codel_test ./testsuite.at:49: $OSMO_QEMU $abs_top_builddir/tests/types/TypesTest ./testsuite.at:56: $OSMO_QEMU $abs_top_builddir/tests/ms/MsTest 1. testsuite.at:5: ok ./testsuite.at:89: $OSMO_QEMU $abs_top_builddir/tests/app_info/AppInfoTest stderr: <0000> CoDel decided to drop packet, window = 0.099ms, count = 1 <0000> CoDel decided to drop packet, window = 0.070ms, count = 2 <0000> CoDel decided to drop packet, window = 0.057ms, count = 3 <0000> CoDel decided to drop packet, window = 0.050ms, count = 4 <0000> CoDel decided to drop packet, window = 0.044ms, count = 5 <0000> CoDel decided to drop packet, window = 0.040ms, count = 6 <0000> CoDel decided to drop packet, window = 0.037ms, count = 7 <0000> CoDel decided to drop packet, window = 0.035ms, count = 8 <0000> CoDel decided to drop packet, window = 0.033ms, count = 9 <0000> CoDel decided to drop packet, window = 0.031ms, count = 10 <0000> CoDel decided to drop packet, window = 0.030ms, count = 11 <0000> CoDel decided to drop packet, window = 0.028ms, count = 12 <0000> CoDel decided to drop packet, window = 0.027ms, count = 13 <0000> CoDel decided to drop packet, window = 0.026ms, count = 14 <0000> CoDel decided to drop packet, window = 0.025ms, count = 15 <0000> CoDel decided to drop packet, window = 0.025ms, count = 16 <0000> CoDel decided to drop packet, window = 0.024ms, count = 17 <0000> CoDel decided to drop packet, window = 0.023ms, count = 18 <0000> CoDel decided to drop packet, window = 0.022ms, count = 19 <0000> CoDel decided to drop packet, window = 0.022ms, count = 20 <0000> CoDel decided to drop packet, window = 0.099ms, count = 1 <0000> CoDel decided to drop packet, window = 0.070ms, count = 2 ./testsuite.at:82: $OSMO_QEMU $abs_top_builddir/tests/fn/FnTest 11. testsuite.at:73: ok 5. testsuite.at:31: ok stderr: stderr: 9. testsuite.at:59: ok <0011> validating counter group 0x55a723ecbcc0(bts) with 102 counters <0002> Detected FN jump! 1320462 -> 8246 (expected 1320466, delta 1312216) <0002> Detected FN jump! 8246 -> 10270 (expected 8250, delta 2024) <0002> Detected FN jump! 10270 -> 311276 (expected 10274, delta 301006) <0002> Detected FN jump! 311276 -> 42462 (expected 311280, delta 268814) <0002> Race condition between rfn (42422) and m_cur_fn (42462) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 42462 -> 42433 (expected 42466, delta 29) <0002> Race condition between rfn (42431) and m_cur_fn (42433) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 42433 -> 509200 (expected 42436, delta 466767) <0002> Race condition between rfn (42428) and m_cur_fn (509200) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 509200 -> 509635 (expected 509205, delta 435) <0002> Race condition between rfn (42257) and m_cur_fn (509635) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 509635 -> 0 (expected 509639, delta 509635) <0002> Race condition between rfn (42419) and m_cur_fn (0) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 0 -> 453 (expected 4, delta 453) <0002> Race condition between rfn (42330) and m_cur_fn (453) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 453 -> 10 (expected 459, delta 443) <0002> Race condition between rfn (42422) and m_cur_fn (10) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 10 -> 23 (expected 13, delta 13) <0002> Race condition between rfn (42390) and m_cur_fn (23) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 23 -> 2715647 (expected 26, delta 24) <0002> Detected FN jump! 2715647 -> 0 (expected 4, delta 1) <0002> Race condition between rfn (42431) and m_cur_fn (0) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Cornercase detected: wrapping crosses 2715648 border <0002> Detected FN jump! 0 -> 2715647 (expected 4, delta 1) <0002> Race condition between rfn (0) and m_cur_fn (2715647) detected: rfn belongs to the previous modulus 42432 cycle, wrapping... <0002> Detected FN jump! 2715647 -> 0 (expected 4, delta 1) Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 ff Encoded message block, CS-1, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 ff Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 00 Encoded message block, CS-1, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 00 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c ff Encoded message block, CS-2, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c ff 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 00 Encoded message block, CS-2, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 00 ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 ff Encoded message block, CS-3, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 ff 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 00 Encoded message block, CS-3, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 00 ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ff Encoded message block, CS-4, idx 0, pattern 00: 00 00 00 ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ff 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 00 Encoded message block, CS-4, idx 0, pattern ff: ff ff ff 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 00 ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 ff Encoded message block, MCS-1, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 00 Encoded message block, MCS-1, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a ff Encoded message block, MCS-2, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 00 Encoded message block, MCS-2, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 ff Encoded message block, MCS-3, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 00 Encoded message block, MCS-3, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a ff Encoded message block, MCS-4, idx 0, pattern 00: 00 00 00 00 fe 03 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 48 4a 4c 4e 50 52 54 fe 01 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 00 Encoded message block, MCS-4, idx 0, pattern ff: ff ff ff ff 01 02 04 06 08 0a 0c 0e 10 12 14 16 18 1a 1c 1e 20 22 24 26 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 48 4a 4c 4e 50 52 54 00 fe Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Encoded message block, MCS-5, idx 0, pattern 00: 00 00 00 c0 7f 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d cd 3f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Encoded message block, MCS-5, idx 0, pattern ff: ff ff ff 3f 40 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d 0d c0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Encoded message block, MCS-6, idx 0, pattern 00: 00 00 00 c0 7f 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d cd 0d 4e 8e ce 0e 4f 8f cf 0f 50 90 d0 10 51 91 d1 11 d2 3f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Encoded message block, MCS-6, idx 0, pattern ff: ff ff ff 3f 40 80 c0 00 41 81 c1 01 42 82 c2 02 43 83 c3 03 44 84 c4 04 45 85 c5 05 46 86 c6 06 47 87 c7 07 48 88 c8 08 49 89 c9 09 4a 8a ca 0a 4b 8b cb 0b 4c 8c cc 0c 4d 8d cd 0d 4e 8e ce 0e 4f 8f cf 0f 50 90 d0 10 51 91 d1 11 12 c0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Encoded message block, MCS-7, idx 0, pattern 00: 00 00 00 00 00 fc 07 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 fc 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Encoded message block, MCS-7, idx 1, pattern 00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0 1f 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 f3 0f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Encoded message block, MCS-7, idx 0, pattern ff: ff ff ff ff ff 03 04 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 00 fc ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Encoded message block, MCS-7, idx 1, pattern ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 0f 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 03 f0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Encoded message block, MCS-8, idx 0, pattern 00: 00 00 00 00 00 fc 07 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 fd 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Encoded message block, MCS-8, idx 1, pattern 00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0 1f 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 f4 0f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Encoded message block, MCS-8, idx 0, pattern ff: ff ff ff ff ff 03 04 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 01 fc ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Encoded message block, MCS-8, idx 1, pattern ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 0f 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 04 f0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 00 Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Encoded message block, MCS-9, idx 0, pattern 00: 00 00 00 00 00 fc 07 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 0d 11 15 19 1d 21 fd 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Test data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Encoded message block, MCS-9, idx 1, pattern 00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0 1f 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 34 44 54 64 74 84 f4 0f Out data block: ff 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 ff Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Encoded message block, MCS-9, idx 0, pattern ff: ff ff ff ff ff 03 04 08 0c 10 14 18 1c 20 24 28 2c 30 34 38 3c 40 44 48 4c 50 54 58 5c 60 64 68 6c 70 74 78 7c 80 84 88 8c 90 94 98 9c a0 a4 a8 ac b0 b4 b8 bc c0 c4 c8 cc d0 d4 d8 dc e0 e4 e8 ec f0 f4 f8 fc 00 05 09 0d 11 15 19 1d 21 01 fc ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Test data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 Encoded message block, MCS-9, idx 1, pattern ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 0f 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 01 12 22 32 42 52 62 72 82 92 a2 b2 c2 d2 e2 f2 02 13 23 33 43 53 63 73 83 93 a3 b3 c3 d3 e3 f3 03 14 24 34 44 54 64 74 84 04 f0 Out data block: 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 3a 3b 3c 3d 3e 3f 40 41 42 43 44 45 46 47 48 00 10. testsuite.at:66: ok 12. testsuite.at:79: ok 13. testsuite.at:85: ok 6. testsuite.at:38: ok 14. testsuite.at:92: ok ./testsuite.at:22: $OSMO_QEMU $abs_top_builddir/tests/alloc/AllocTest 7. testsuite.at:45: ok stderr: <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CC......"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCC....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DCC....."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)".C......"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCC...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCC.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCC."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)".......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=6) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......CC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=5) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....CCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....DCC"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....CCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....DDCD"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Possible DL/UL slots: (TS=0)"......C."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...CCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...DDCD."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Possible DL/UL slots: (TS=0)".....C.."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..DDCD.."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Possible DL/UL slots: (TS=0)"....C..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=1) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".CCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)".DDCD..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> - Possible DL/UL slots: (TS=0)"CCCCCCCC"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Possible DL/UL slots: (TS=0)"DDCD...."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Possible DL/UL slots: (TS=0)"..C....."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=2) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=3) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=4) PDCH state: disabled => enabled <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..CCC..."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"..DCC..."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 0, because not enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Skipping TS 7, because not enabled <0002> - Possible DL/UL slots: (TS=0)"...C...."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. <0011> validating counter group 0x556e1b8d9240(bts) with 102 counters <0002> PDCH(bts=0,trx=0,ts=0) PDCH state: disabled => enabled <0002> PDCH(bts=0,trx=0,ts=7) PDCH state: disabled => enabled <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......C"(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 1 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=1 Tx=1 Sum Rx+Tx=2, Tta=3 Ttb=2, Tra=4 Trb=2, Type=1 <0002> Slot Allocation (Algorithm B) for class 2 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=1 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 3 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=3, Tta=3 Ttb=2, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 4 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=1 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 5 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=2 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 6 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 7 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=4, Tta=3 Ttb=1, Tra=3 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 8 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=1 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 9 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 10 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=2 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 11 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 12 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 13 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=3 Tx=3 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 14 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=4 Tx=4 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 15 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=3 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 16 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=2 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 17 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=7 Tx=7 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=1 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 18 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=N/A Ttb=0, Tra=0 Trb=0, Type=2 <0002> Slot Allocation (Algorithm B) for class 19 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 20 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 21 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 22 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 23 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 24 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=2 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 25 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=3 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 26 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 27 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=4 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 28 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=6 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 29 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=8 Tx=8 Sum Rx+Tx=N/A, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 30 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 31 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 32 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 33 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 34 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 35 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=1 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 36 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=2 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 37 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=3 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 38 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=4 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 39 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=5 Tx=5 Sum Rx+Tx=6, Tta=2 Ttb=1, Tra=1 Trb=1, Type=1 <0002> Slot Allocation (Algorithm B) for class 40 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=1 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 41 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=2 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 42 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=3 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 43 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=4 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 44 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=5 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 45 <0002> - Skipping TS 1, because not enabled <0002> - Skipping TS 2, because not enabled <0002> - Skipping TS 3, because not enabled <0002> - Skipping TS 4, because not enabled <0002> - Skipping TS 5, because not enabled <0002> - Skipping TS 6, because not enabled <0002> - Possible DL/UL slots: (TS=0)"C......."(TS=7) <0002> Rx=6 Tx=6 Sum Rx+Tx=7, Tta=1 Ttb=1, Tra=1 Trb=0, Type=1 <0002> Slot Allocation (Algorithm B) for class 46 <0002> Multislot class 46 not applicable. 2. testsuite.at:12: ok stdout: 4. testsuite.at:25: ok 8. testsuite.at:52: ok 3. testsuite.at:18: ok ## ------------- ## ## Test results. ## ## ------------- ## All 14 tests were successful. make python-tests make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' Not running python-based tests (determined at configure-time) make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' Making check in contrib make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' Making check in systemd make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[5]: Nothing to be done for 'check'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[5]: Nothing to be done for 'check-am'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' make[4]: Nothing to be done for 'check-am'. make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[2]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' create-stamp debian/debhelper-build-stamp dh_prep debian/rules override_dh_auto_install make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_auto_install make -j1 install DESTDIR=/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu AM_UPDATE_INFO_DIR=no make[2]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' make install-recursive make[3]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' Making install in include make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/include' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/include' make[5]: Nothing to be done for 'install-exec-am'. make[5]: Nothing to be done for 'install-data-am'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/include' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/include' Making install in src make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/src' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/src' /usr/bin/mkdir -p '/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/usr/bin' /bin/bash ../libtool --mode=install /usr/bin/install -c osmo-pcu '/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/usr/bin' libtool: install: /usr/bin/install -c osmo-pcu /build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/usr/bin/osmo-pcu make install-data-hook make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/src' mkdir -p /build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/usr/share/man/man1 make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/src' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/src' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/src' Making install in doc make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' Making install in examples make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' make[6]: Nothing to be done for 'install-exec-am'. /usr/bin/mkdir -p '/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/usr/share/doc/osmo-pcu/examples/' /usr/bin/install -c -m 644 osmo-pcu.cfg '/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/usr/share/doc/osmo-pcu/examples/' /usr/bin/mkdir -p '/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/etc/osmocom' /usr/bin/install -c -m 644 osmo-pcu.cfg '/build/reproducible-path/osmo-pcu-1.5.1/debian/osmo-pcu/etc/osmocom' make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/examples' Making install in manuals make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[6]: Nothing to be done for 'install-exec-am'. make[6]: Nothing to be done for 'install-data-am'. make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc/manuals' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[6]: Nothing to be done for 'install-exec-am'. make[6]: Nothing to be done for 'install-data-am'. make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/doc' Making install in tests make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make[5]: Nothing to be done for 'install-exec-am'. make[5]: Nothing to be done for 'install-data-am'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/tests' Making install in contrib make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' Making install in systemd make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[6]: Nothing to be done for 'install-exec-am'. make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib/systemd' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[6]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[6]: Nothing to be done for 'install-exec-am'. make[6]: Nothing to be done for 'install-data-am'. make[6]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1/contrib' make[4]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' make[5]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' make[5]: Nothing to be done for 'install-exec-am'. make[5]: Nothing to be done for 'install-data-am'. make[5]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[4]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[3]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[2]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_install dh_installdocs dh_installchangelogs dh_installman dh_installinit debian/rules override_dh_installsystemd make[1]: Entering directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_installsystemd --no-enable --no-start make[1]: Leaving directory '/build/reproducible-path/osmo-pcu-1.5.1' dh_lintian dh_perl dh_link dh_strip_nondeterminism dh_compress dh_fixperms dh_missing dh_dwz -a dh_strip -a dh_makeshlibs -a dh_shlibdeps -a dh_installdeb dh_gencontrol dh_md5sums dh_builddeb dpkg-deb: building package 'osmo-pcu-dbgsym' in '../osmo-pcu-dbgsym_1.5.1-1_amd64.deb'. dpkg-deb: building package 'osmo-pcu' in '../osmo-pcu_1.5.1-1_amd64.deb'. dpkg-genbuildinfo --build=binary -O../osmo-pcu_1.5.1-1_amd64.buildinfo dpkg-genchanges --build=binary -O../osmo-pcu_1.5.1-1_amd64.changes dpkg-genchanges: info: binary-only upload (no source code included) dpkg-source --after-build . dpkg-buildpackage: info: binary-only upload (no source included) dpkg-genchanges: info: including full source code in upload I: copying local configuration I: unmounting dev/ptmx filesystem I: unmounting dev/pts filesystem I: unmounting dev/shm filesystem I: unmounting proc filesystem I: unmounting sys filesystem I: cleaning the build env I: removing directory /srv/workspace/pbuilder/1970829 and its subdirectories I: Current time: Mon Apr 13 18:35:34 -12 2026 I: pbuilder-time-stamp: 1776148534 Wed Mar 12 00:12:38 UTC 2025 I: 1st build successful. Starting 2nd build on remote node ionos1-amd64.debian.net. Wed Mar 12 00:12:38 UTC 2025 I: Preparing to do remote build '2' on ionos1-amd64.debian.net. Wed Mar 12 00:14:09 UTC 2025 I: Deleting $TMPDIR on ionos1-amd64.debian.net. Wed Mar 12 00:14:09 UTC 2025 I: osmo-pcu_1.5.1-1_amd64.changes: Format: 1.8 Date: Tue, 11 Mar 2025 18:38:37 +0100 Source: osmo-pcu Binary: osmo-pcu osmo-pcu-dbgsym Architecture: amd64 Version: 1.5.1-1 Distribution: unstable Urgency: medium Maintainer: Debian Mobcom Maintainers Changed-By: Thorsten Alteholz Description: osmo-pcu - Osmocom GPRS/EDGE Packet Control Unit (PCU) Changes: osmo-pcu (1.5.1-1) unstable; urgency=medium . * New upstream release. Checksums-Sha1: 1bb08c5bbaef4c0a77a14ea97e97c1633f8206c8 652684 osmo-pcu-dbgsym_1.5.1-1_amd64.deb 327c050913a3791c206cfb792751f52cf2b0b94b 5770 osmo-pcu_1.5.1-1_amd64.buildinfo d2320ef7ad26efd6f785fe7e00851e072e709e17 212764 osmo-pcu_1.5.1-1_amd64.deb Checksums-Sha256: 9540e4b4834c6d52951c8772c1fc62407f92420187b99354f87b1ddecf192f31 652684 osmo-pcu-dbgsym_1.5.1-1_amd64.deb e01433ce52eb5b939047e1d36673709b7a2be0e61f8d675bcf16ecc77e984b3b 5770 osmo-pcu_1.5.1-1_amd64.buildinfo 70a850f1ba8c81c093a1fbbb55d3c6d9cb9e788d8a001f132a249c0f06719632 212764 osmo-pcu_1.5.1-1_amd64.deb Files: b1eb1c3f4b266924acd989a9aaea0a50 652684 debug optional osmo-pcu-dbgsym_1.5.1-1_amd64.deb 5b24f7fad564930a3722ba8cec27e502 5770 net optional osmo-pcu_1.5.1-1_amd64.buildinfo 8f567482082b6ff0391853a395041a3e 212764 net optional osmo-pcu_1.5.1-1_amd64.deb Wed Mar 12 00:14:10 UTC 2025 I: diffoscope 289 will be used to compare the two builds: Running as unit: rb-diffoscope-amd64_2-34077.service # Profiling output for: /usr/bin/diffoscope --timeout 7200 --html /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/osmo-pcu_1.5.1-1.diffoscope.html --text /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/osmo-pcu_1.5.1-1.diffoscope.txt --json /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/osmo-pcu_1.5.1-1.diffoscope.json --profile=- /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/b1/osmo-pcu_1.5.1-1_amd64.changes /srv/reproducible-results/rbuild-debian/r-b-build.IzxIe5wo/b2/osmo-pcu_1.5.1-1_amd64.changes ## command (total time: 0.000s) 0.000s 1 call cmp (internal) ## has_same_content_as (total time: 0.000s) 0.000s 1 call diffoscope.comparators.binary.FilesystemFile ## main (total time: 0.003s) 0.003s 2 calls outputs 0.000s 1 call cleanup Finished with result: success Main processes terminated with: code=exited/status=0 Service runtime: 237ms CPU time consumed: 236ms Wed Mar 12 00:14:11 UTC 2025 I: diffoscope 289 found no differences in the changes files, and a .buildinfo file also exists. Wed Mar 12 00:14:11 UTC 2025 I: osmo-pcu from unstable built successfully and reproducibly on amd64. Wed Mar 12 00:14:12 UTC 2025 I: Submitting .buildinfo files to external archives: Wed Mar 12 00:14:12 UTC 2025 I: Submitting 8.0K b1/osmo-pcu_1.5.1-1_amd64.buildinfo.asc Wed Mar 12 00:14:13 UTC 2025 I: Submitting 8.0K b2/osmo-pcu_1.5.1-1_amd64.buildinfo.asc Wed Mar 12 00:14:14 UTC 2025 I: Done submitting .buildinfo files to http://buildinfo.debian.net/api/submit. Wed Mar 12 00:14:14 UTC 2025 I: Done submitting .buildinfo files. Wed Mar 12 00:14:14 UTC 2025 I: Removing signed osmo-pcu_1.5.1-1_amd64.buildinfo.asc files: removed './b1/osmo-pcu_1.5.1-1_amd64.buildinfo.asc' removed './b2/osmo-pcu_1.5.1-1_amd64.buildinfo.asc'